|
d7341d3435
|
renamed file with pcb 3d models so it its consistent with iaq.
|
2023-11-11 09:32:25 +01:00 |
|
|
92f6f79530
|
renamed imaged.
|
2023-11-11 09:31:25 +01:00 |
|
|
3fe4227704
|
clean-up latex. fixed path to pcb 3d render.
|
2023-11-11 09:30:35 +01:00 |
|
|
e08aa238b0
|
Fixed logo i nschematic and datasheet. Added images to readme.
|
2023-11-11 09:28:32 +01:00 |
|
Jan Mrna
|
0b8badd131
|
Added README
|
2023-11-10 22:18:26 +01:00 |
|
Jan Mrna
|
8ad06726c0
|
Moved interactive BOM
|
2023-11-10 21:52:07 +01:00 |
|
Jan Mrna
|
70c7c40499
|
Deleted old Outputs folder
|
2023-11-10 21:50:09 +01:00 |
|
Jan Mrna
|
9c92d4abb4
|
Moved submodules to https
|
2023-11-10 21:41:16 +01:00 |
|
Jan Mrna
|
430a6f80e9
|
Deleted log submodule
|
2023-11-10 21:39:52 +01:00 |
|
David Žaitlík
|
b38fcbd259
|
Updated the registers in the documentation.
|
2022-07-30 20:38:29 +02:00 |
|
David Žaitlík
|
eaebd0fa56
|
Started datasheet.
|
2022-07-25 22:35:06 +02:00 |
|
David Žaitlík
|
0b9a64901b
|
Created techdraw of views and the connector.
|
2022-07-25 22:34:37 +02:00 |
|
David Žaitlík
|
f14d98365f
|
Reorganized folders.
|
2022-07-25 22:34:16 +02:00 |
|
Jan Mrna
|
23fc8ff33b
|
Updated submodules
|
2022-07-02 08:30:02 +02:00 |
|
Jan Mrna
|
6b2f778dd9
|
Updated submodules remote url to veleslabs.org
|
2022-07-02 08:29:09 +02:00 |
|
Jan Mrna
|
654b063833
|
Metadata
|
2022-07-01 21:01:21 +02:00 |
|
Jan Mrna
|
ffc7f50adf
|
Added .veles_metadata
|
2022-07-01 21:00:52 +02:00 |
|
David Žaitlík
|
dc9b138923
|
Updated the library.
|
2022-06-19 13:15:54 +02:00 |
|
David Žaitlík
|
0e94c679f8
|
minor changes to the project.
|
2022-06-19 13:08:06 +02:00 |
|
David Žaitlík
|
e0e7c8489e
|
Added more registers and achecks.
|
2022-06-19 12:51:34 +02:00 |
|
David Žaitlík
|
06ec3f82eb
|
Changed the registers.
|
2022-06-18 13:53:21 +02:00 |
|
David Žaitlík
|
4b3a9927ba
|
Added modbus registers and stuff.
|
2022-06-17 23:15:59 +02:00 |
|
David Žaitlík
|
eaab788dde
|
Added submodules.
|
2022-06-17 18:28:47 +02:00 |
|
David Žaitlík
|
5b8121635d
|
Regenerated the 3D model.
|
2022-05-23 21:36:42 +02:00 |
|
David Žaitlík
|
e56f3ec990
|
Started working on the fw. Created LTR329 light sensor library. Fixed the error in SHT4x library.
|
2022-05-23 21:36:09 +02:00 |
|
David Žaitlík
|
bc37e9b45b
|
Tweaked the bottom and holder to hide the holes.
|
2022-03-29 21:19:38 +02:00 |
|
David Žaitlík
|
dd0f6d57bd
|
Tweaked the bottom and the holder.
|
2022-03-28 17:16:49 +02:00 |
|
David Žaitlík
|
aa3fc3d87e
|
Prolonged holes to dig into the chamber walls.
|
2022-03-28 10:21:24 +02:00 |
|
David Žaitlík
|
1eb22e95e8
|
Created the first version of the enclosure including the bottom and the holder (the same as IAQ sensor).
|
2022-03-27 22:32:09 +02:00 |
|
David Žaitlík
|
3f9e35810f
|
Generated 3D model.
|
2022-03-27 22:31:23 +02:00 |
|
David Žaitlík
|
cee55c5387
|
Deleted the 2 layer version. It won't be used.
|
2022-03-27 22:30:46 +02:00 |
|
David Žaitlík
|
e9305aeec5
|
Migrated to KiCAD6.
|
2021-12-30 16:05:15 +01:00 |
|
David Žaitlík
|
7118ca15c7
|
Created 3x3 panel.
|
2021-12-22 18:25:54 +01:00 |
|
David Žaitlík
|
f62375bb37
|
Added light sensor. Recreated the panel.
|
2021-12-22 17:37:38 +01:00 |
|
David Žaitlík
|
3670dcf381
|
Cache.
|
2021-11-24 22:46:31 +01:00 |
|
David Žaitlík
|
8b6c134d04
|
Created a testing panel
|
2021-11-24 20:48:42 +01:00 |
|
David Žaitlík
|
6f610a474a
|
Finished the 4 layer design.
|
2021-11-24 20:48:25 +01:00 |
|
David Žaitlík
|
2cad8e7d10
|
Redesigned the PCB with breakaway tabs.
|
2021-11-17 23:25:18 +01:00 |
|
David Žaitlík
|
6a4cb81662
|
Minor changes.
|
2021-10-03 17:23:30 +02:00 |
|
David Žaitlík
|
d64a4b19b8
|
Added testpoints and labels. Rounded tracks. Created 2layer and 4 layer variants of the 25x25mm size. Created longer and thinner version.
|
2021-10-02 23:22:36 +02:00 |
|
David Žaitlík
|
f877684eb1
|
Created PCB.
|
2021-03-03 16:09:26 +01:00 |
|