Moved the old firmware for STM32L011 to fw_old and migrated the firmware to STM32L031 in fw. I2C and TIM21 seem functional. USART2 is receiving correctly, but the modbus test is not receiving messages.

This commit is contained in:
David Žaitlík 2021-10-21 22:45:22 +02:00
parent 8445a1100c
commit bb3b6ada06
177 changed files with 78202 additions and 765 deletions

View File

@ -1,396 +1,191 @@
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[PreviousLibFiles]
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SourceFiles=Core/Src/main.c;Core/Src/stm32l0xx_it.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Core/Src/system_stm32l0xx.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Core/Src/system_stm32l0xx.c;;;
HeaderPath=Drivers/STM32L0xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32L0xx/Include;Drivers/CMSIS/Include;Core/Inc;
CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32L011xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32L031xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
[PreviousGenFiles]
AdvancedFolderStructure=true

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@ -24,7 +24,6 @@
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>

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@ -1,3 +1,4 @@
8DF89ED150041C4CBC7CB9A9CAA90856=295E78E9D51884086204F31037537306
DC22A860405A8BF2F2C095E5B6529F12=295E78E9D51884086204F31037537306
66BE74F758C12D739921AEA421D593D3=11
8DF89ED150041C4CBC7CB9A9CAA90856=807411C90E25B050C1E13646B7FEB5AA
DC22A860405A8BF2F2C095E5B6529F12=807411C90E25B050C1E13646B7FEB5AA
eclipse.preferences.version=1

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@ -29,9 +29,8 @@ extern "C" {
/* Includes ------------------------------------------------------------------*/
#include "stm32l0xx_ll_i2c.h"
#include "stm32l0xx_ll_lpuart.h"
#include "stm32l0xx_ll_rcc.h"
#include "stm32l0xx_ll_crs.h"
#include "stm32l0xx_ll_rcc.h"
#include "stm32l0xx_ll_bus.h"
#include "stm32l0xx_ll_system.h"
#include "stm32l0xx_ll_exti.h"
@ -40,6 +39,7 @@ extern "C" {
#include "stm32l0xx_ll_pwr.h"
#include "stm32l0xx_ll_dma.h"
#include "stm32l0xx_ll_tim.h"
#include "stm32l0xx_ll_usart.h"
#include "stm32l0xx_ll_gpio.h"
#if defined(USE_FULL_ASSERT)
@ -102,10 +102,10 @@ int8_t uart_enable_interrupts(void);
/* USER CODE BEGIN Private defines */
#define MEASUREMENT_PERIOD_MS 600000
extern uint16_t lpuart1_rx_message_index;
extern uint16_t lpuart1_rx_message_len;
extern uint8_t lpuart1_rx_done;
extern uint8_t lpuart1_rx_message_too_long;
extern uint16_t usart2_rx_message_index;
extern uint16_t usart2_rx_message_len;
extern uint8_t usart2_rx_done;
extern uint8_t usart2_rx_message_too_long;
extern uint8_t tim21_elapsed_period;

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@ -52,7 +52,7 @@ void SVC_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void TIM21_IRQHandler(void);
void LPUART1_IRQHandler(void);
void USART2_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */

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@ -6,7 +6,7 @@
*/
#include "i2c.h"
#include "stm32l0xx_ll_lpuart.h"
#include "stm32l0xx_ll_usart.h"
i2c_context_t *i2c_context;

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@ -118,10 +118,10 @@ uint8_t co2_valid = 0;
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_I2C1_Init(void);
static void MX_LPUART1_UART_Init(void);
static void MX_USART2_UART_Init(void);
static void MX_TIM21_Init(void);
/* USER CODE BEGIN PFP */
void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len);
void USART2_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len);
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@ -147,6 +147,8 @@ int main(void)
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
/* System interrupt init*/
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, 3);
/* USER CODE BEGIN Init */
@ -174,7 +176,7 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_I2C1_Init();
MX_LPUART1_UART_Init();
MX_USART2_UART_Init();
MX_TIM21_Init();
/* USER CODE BEGIN 2 */
@ -191,7 +193,7 @@ int main(void)
modbus_slave_set_address(sensor_config.modbus_addr);
/* Enable UART for RS485 */
LL_LPUART_Enable(LPUART1);
LL_USART_Enable(USART2);
/* Start the timer for measurement triggering */
LL_TIM_EnableCounter(TIM21);
@ -202,6 +204,8 @@ int main(void)
i2c_context.i2c = I2C1;
i2c_init(&i2c_context);
LL_mDelay(2000);
scd4x_start_periodic_measurement();
uint8_t scd4x_is_connected = 1;
uint8_t sps30_is_connected = 0;
@ -227,34 +231,34 @@ int main(void)
/* SHT4x Init Time: max 1 ms (datasheet pg. 8) */
/* SCD4x Init Time: max 1000 ms (datasheet pg. 6) */
/* SPS30 Init Time: max 30000 ms (datasheet pg. 2) */
LL_mDelay(1000);
LL_mDelay(5000);
static uint32_t new_baud;
/* Enter the main loop */
while (1)
{
if (lpuart1_rx_done == 1)
if (usart2_rx_done == 1)
{
/* Process the message */
if (lpuart1_rx_message_too_long)
if (usart2_rx_message_too_long)
{
/* Do nothing, just delete the buffer and set the flag back to zero*/
lpuart1_rx_message_too_long = 0;
usart2_rx_message_too_long = 0;
} else
{
/* Process the message:
* message is stored in modbus_buffer[], no copying necessary;
* but we need to make sure that modbus_buffer[] will not be used while
* processing the message: this can be done by disabling RX interrupt */
LL_LPUART_DisableIT_RXNE(LPUART1);
modbus_slave_process_msg(modbus_buffer, lpuart1_rx_message_len);
LL_USART_DisableIT_RXNE(USART2);
modbus_slave_process_msg(modbus_buffer, usart2_rx_message_len);
/* Reset the RX DONE flag */
lpuart1_rx_done = 0;
LL_LPUART_EnableIT_RXNE(LPUART1);
usart2_rx_done = 0;
LL_USART_EnableIT_RXNE(USART2);
}
/* Reset the RX DONE flag */
lpuart1_rx_done = 0;
usart2_rx_done = 0;
}
/* if config changed (MODBUS write), reflect changes to EEPROM */
if (sensor_config_pending_write) {
@ -268,23 +272,16 @@ int main(void)
}
if (baudrate_changed)
{
while (!LL_LPUART_IsActiveFlag_TXE(LPUART1));
while (!LL_USART_IsActiveFlag_TXE(USART2));
uart_disable_interrupts();
// LL_LPUART_Disable(LPUART1);
// LL_LPUART_DisableIT_IDLE(LPUART1);
// LL_LPUART_EnableIT_RXNE(LPUART1);
LL_LPUART_SetBaudRate(LPUART1, SYSTICK_FREQ_HZ, config_baudrates[sensor_config.baudrate_index]);
// LL_LPUART_Enable(LPUART1);
// LL_LPUART_EnableIT_IDLE(LPUART1);
// LL_LPUART_EnableIT_RXNE(LPUART1);
LL_USART_SetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16, config_baudrates[sensor_config.baudrate_index]);
uart_enable_interrupts();
LL_LPUART_EnableDirectionRx(LPUART1);
LL_LPUART_EnableDirectionTx(LPUART1);
LL_USART_EnableDirectionRx(USART2);
LL_USART_EnableDirectionTx(USART2);
baudrate_changed = 0;
new_baud = LL_LPUART_GetBaudRate(LPUART1, SYSTICK_FREQ_HZ);
new_baud = LL_USART_GetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16);
}
/* It is time for measurement */
@ -399,7 +396,7 @@ void SystemClock_Config(void)
LL_Init1msTick(12000000);
LL_SetSystemCoreClock(12000000);
LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1);
LL_RCC_SetUSARTClockSource(LL_RCC_USART2_CLKSOURCE_PCLK1);
LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1);
}
@ -466,89 +463,6 @@ static void MX_I2C1_Init(void)
}
/**
* @brief LPUART1 Initialization Function
* @param None
* @retval None
*/
static void MX_LPUART1_UART_Init(void)
{
/* USER CODE BEGIN LPUART1_Init 0 */
/* USER CODE END LPUART1_Init 0 */
LL_LPUART_InitTypeDef LPUART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
/**LPUART1 GPIO Configuration
PA0-CK_IN ------> LPUART1_RX
PA1 ------> LPUART1_TX
PB1 ------> LPUART1_DE
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_0;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* LPUART1 interrupt Init */
NVIC_SetPriority(LPUART1_IRQn, 0);
NVIC_EnableIRQ(LPUART1_IRQn);
/* USER CODE BEGIN LPUART1_Init 1 */
/* USER CODE END LPUART1_Init 1 */
LPUART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index];
LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_9B;
LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1;
LPUART_InitStruct.Parity = LL_LPUART_PARITY_EVEN;
LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX;
LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE;
LL_LPUART_Init(LPUART1, &LPUART_InitStruct);
LL_LPUART_EnableDEMode(LPUART1);
LL_LPUART_SetDESignalPolarity(LPUART1, LL_LPUART_DE_POLARITY_HIGH);
LL_LPUART_SetDEAssertionTime(LPUART1, 0);
LL_LPUART_SetDEDeassertionTime(LPUART1, 0);
/* USER CODE BEGIN LPUART1_Init 2 */
/* Enable IDLE Interrupt */
LL_LPUART_EnableIT_IDLE(LPUART1);
/* Enable RX Not Empty Interrupt */
LL_LPUART_EnableIT_RXNE(LPUART1);
LL_LPUART_EnableDirectionRx(LPUART1);
LL_LPUART_EnableDirectionTx(LPUART1);
LL_LPUART_Enable(LPUART1);
/* USER CODE END LPUART1_Init 2 */
}
/**
* @brief TIM21 Initialization Function
* @param None
@ -588,6 +502,91 @@ static void MX_TIM21_Init(void)
}
/**
* @brief USART2 Initialization Function
* @param None
* @retval None
*/
static void MX_USART2_UART_Init(void)
{
/* USER CODE BEGIN USART2_Init 0 */
/* USER CODE END USART2_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
/**USART2 GPIO Configuration
PA1 ------> USART2_DE
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART2 interrupt Init */
NVIC_SetPriority(USART2_IRQn, 0);
NVIC_EnableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
USART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index];
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_9B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
USART_InitStruct.Parity = LL_USART_PARITY_EVEN;
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
LL_USART_Init(USART2, &USART_InitStruct);
LL_USART_EnableDEMode(USART2);
LL_USART_SetDESignalPolarity(USART2, LL_USART_DE_POLARITY_HIGH);
LL_USART_SetDEAssertionTime(USART2, 0);
LL_USART_SetDEDeassertionTime(USART2, 0);
LL_USART_ConfigAsyncMode(USART2);
LL_USART_Enable(USART2);
/* USER CODE BEGIN USART2_Init 2 */
/* Enable IDLE Interrupt */
LL_USART_EnableIT_IDLE(USART2);
/* Enable RX Not Empty Interrupt */
LL_USART_EnableIT_RXNE(USART2);
LL_USART_EnableDirectionRx(USART2);
LL_USART_EnableDirectionTx(USART2);
LL_USART_Enable(USART2);
/* USER CODE END USART2_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
@ -601,13 +600,13 @@ static void MX_GPIO_Init(void)
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
/**/
LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
/**/
LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
/**/
LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
/**/
GPIO_InitStruct.Pin = LED_B_Pin;
@ -636,31 +635,31 @@ static void MX_GPIO_Init(void)
}
/* USER CODE BEGIN 4 */
void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len)
void USART2_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len)
{
__disable_irq();
for (uint16_t i = 0; i < buffer_tx_len; i++)
{
LL_LPUART_TransmitData9(LPUART1, buffer_tx[i]);
while (!LL_LPUART_IsActiveFlag_TXE(LPUART1));
LL_USART_TransmitData9(USART2, buffer_tx[i]);
while (!LL_USART_IsActiveFlag_TXE(USART2));
}
__enable_irq();
}
int8_t uart_disable_interrupts(void)
{
LL_LPUART_Disable(LPUART1);
LL_LPUART_DisableIT_IDLE(LPUART1);
LL_LPUART_EnableIT_RXNE(LPUART1);
LL_USART_Disable(USART2);
LL_USART_DisableIT_IDLE(USART2);
LL_USART_EnableIT_RXNE(USART2);
return 0;
}
int8_t uart_enable_interrupts(void)
{
LL_LPUART_Enable(LPUART1);
LL_LPUART_EnableIT_IDLE(LPUART1);
LL_LPUART_EnableIT_RXNE(LPUART1);
LL_USART_Enable(USART2);
LL_USART_EnableIT_IDLE(USART2);
LL_USART_EnableIT_RXNE(USART2);
return 0;
}
@ -787,7 +786,7 @@ int8_t modbus_slave_callback(modbus_transaction_t *transaction)
int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len)
{
/* TODO */
LPUART1_TX_Buffer(buffer, data_len);
USART2_TX_Buffer(buffer, data_len);
return MODBUS_OK;
}
/* USER CODE END 4 */

View File

@ -43,17 +43,17 @@
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
uint16_t lpuart1_rx_message_index = 0;
uint16_t lpuart1_rx_message_len = 0;
uint8_t lpuart1_rx_done = 0;
uint8_t lpuart1_rx_message_too_long = 0;
uint16_t usart2_rx_message_index = 0;
uint16_t usart2_rx_message_len = 0;
uint8_t usart2_rx_done = 0;
uint8_t usart2_rx_message_too_long = 0;
uint8_t tim21_elapsed_period = 0;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
void LPUART1_CharReception_Callback( void );
void USART2_CharReception_Callback( void );
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@ -71,7 +71,7 @@ void LPUART1_CharReception_Callback( void );
/* Cortex-M0+ Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
* @brief This function handles Non maskable Interrupt.
*/
void NMI_Handler(void)
{
@ -154,7 +154,6 @@ void TIM21_IRQHandler(void)
/* USER CODE BEGIN TIM21_IRQn 0 */
LL_TIM_ClearFlag_UPDATE(TIM21);
tim21_elapsed_period = 1;
/* USER CODE END TIM21_IRQn 0 */
/* USER CODE BEGIN TIM21_IRQn 1 */
@ -162,47 +161,47 @@ void TIM21_IRQHandler(void)
}
/**
* @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28.
* @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI line 26.
*/
void LPUART1_IRQHandler(void)
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN LPUART1_IRQn 0 */
/* USER CODE BEGIN USART2_IRQn 0 */
/* Check RXNE flag value in SR register */
if(LL_LPUART_IsActiveFlag_RXNE(LPUART1) && LL_LPUART_IsEnabledIT_RXNE(LPUART1))
if(LL_USART_IsActiveFlag_RXNE(USART2) && LL_USART_IsEnabledIT_RXNE(USART2))
{
/* RXNE flag will be cleared by reading of DR register (done in call) */
/* Call function in charge of handling Character reception */
LPUART1_CharReception_Callback();
USART2_CharReception_Callback();
}
/* USER CODE END LPUART1_IRQn 0 */
/* USER CODE BEGIN LPUART1_IRQn 1 */
/* USER CODE END USART2_IRQn 0 */
/* USER CODE BEGIN USART2_IRQn 1 */
/* If the IDLE flag is active */
if (LL_LPUART_IsActiveFlag_IDLE(LPUART1) && LL_LPUART_IsEnabledIT_IDLE(LPUART1))
if (LL_USART_IsActiveFlag_IDLE(USART2) && LL_USART_IsEnabledIT_IDLE(USART2))
{
/* Clear the IDLE flag */
LL_LPUART_ClearFlag_IDLE(LPUART1);
LL_USART_ClearFlag_IDLE(USART2);
/* Reset the buffer index */
lpuart1_rx_message_len = lpuart1_rx_message_index;
lpuart1_rx_message_index = 0;
lpuart1_rx_done = 1;
if (lpuart1_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE)
usart2_rx_message_len = usart2_rx_message_index;
usart2_rx_message_index = 0;
usart2_rx_done = 1;
if (usart2_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE)
{
lpuart1_rx_message_too_long = 1;
usart2_rx_message_too_long = 1;
}
}
/* USER CODE END LPUART1_IRQn 1 */
/* USER CODE END USART2_IRQn 1 */
}
/* USER CODE BEGIN 1 */
void LPUART1_CharReception_Callback( void )
void USART2_CharReception_Callback( void )
{
uint16_t lpuart1_rx_bit = LL_LPUART_ReceiveData9(LPUART1);
if (lpuart1_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE)
uint16_t usart2_rx_bit = LL_USART_ReceiveData9(USART2);
if (usart2_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE)
{
modbus_buffer[lpuart1_rx_message_index] = (uint8_t)lpuart1_rx_bit;
modbus_buffer[usart2_rx_message_index] = (uint8_t)usart2_rx_bit;
}
lpuart1_rx_message_index++;
usart2_rx_message_index++;
}
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

View File

@ -0,0 +1,261 @@
/**
******************************************************************************
* @file startup_stm32l031xx.s
* @author MCD Application Team
* @brief STM32L031xx Devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M0+ processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m0plus
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
mov sp, r0 /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
ldr r2, =_sidata
movs r3, #0
b LoopCopyDataInit
CopyDataInit:
ldr r4, [r2, r3]
str r4, [r0, r3]
adds r3, r3, #4
LoopCopyDataInit:
adds r4, r0, r3
cmp r4, r1
bcc CopyDataInit
/* Zero fill the bss segment. */
ldr r2, =_sbss
ldr r4, =_ebss
movs r3, #0
b LoopFillZerobss
FillZerobss:
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M0. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word 0
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detection */
.word RTC_IRQHandler /* RTC through the EXTI line */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
.word 0 /* Reserved */
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
.word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
.word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */
.word LPTIM1_IRQHandler /* LPTIM1 */
.word 0 /* Reserved */
.word TIM2_IRQHandler /* TIM2 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word TIM21_IRQHandler /* TIM21 */
.word 0 /* Reserved */
.word TIM22_IRQHandler /* TIM22 */
.word I2C1_IRQHandler /* I2C1 */
.word 0 /* Reserved */
.word SPI1_IRQHandler /* SPI1 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word USART2_IRQHandler /* USART2 */
.word LPUART1_IRQHandler /* LPUART1 */
.word 0 /* Reserved */
.word 0 /* Reserved */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_1_IRQHandler
.thumb_set EXTI0_1_IRQHandler,Default_Handler
.weak EXTI2_3_IRQHandler
.thumb_set EXTI2_3_IRQHandler,Default_Handler
.weak EXTI4_15_IRQHandler
.thumb_set EXTI4_15_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_3_IRQHandler
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
.weak DMA1_Channel4_5_6_7_IRQHandler
.thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
.weak ADC1_COMP_IRQHandler
.thumb_set ADC1_COMP_IRQHandler,Default_Handler
.weak LPTIM1_IRQHandler
.thumb_set LPTIM1_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM21_IRQHandler
.thumb_set TIM21_IRQHandler,Default_Handler
.weak TIM22_IRQHandler
.thumb_set TIM22_IRQHandler,Default_Handler
.weak I2C1_IRQHandler
.thumb_set I2C1_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak LPUART1_IRQHandler
.thumb_set LPUART1_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

File diff suppressed because it is too large Load Diff

View File

@ -104,7 +104,7 @@
*/
#define __STM32L0xx_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32L0xx_CMSIS_VERSION_SUB1 (0x09) /*!< [23:16] sub1 version */
#define __STM32L0xx_CMSIS_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
#define __STM32L0xx_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32L0xx_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32L0xx_CMSIS_VERSION ((__STM32L0xx_CMSIS_VERSION_MAIN << 24)\
|(__STM32L0xx_CMSIS_VERSION_SUB1 << 16)\
@ -208,6 +208,46 @@ typedef enum
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
/* Use of interrupt control for register exclusive access */
/* Atomic 32-bit register access macro to set one or several bits */
#define ATOMIC_SET_BIT(REG, BIT) \
do { \
uint32_t primask; \
primask = __get_PRIMASK(); \
__set_PRIMASK(1); \
SET_BIT((REG), (BIT)); \
__set_PRIMASK(primask); \
} while(0)
/* Atomic 32-bit register access macro to clear one or several bits */
#define ATOMIC_CLEAR_BIT(REG, BIT) \
do { \
uint32_t primask; \
primask = __get_PRIMASK(); \
__set_PRIMASK(1); \
CLEAR_BIT((REG), (BIT)); \
__set_PRIMASK(primask); \
} while(0)
/* Atomic 32-bit register access macro to clear and set one or several bits */
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
do { \
uint32_t primask; \
primask = __get_PRIMASK(); \
__set_PRIMASK(1); \
MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \
__set_PRIMASK(primask); \
} while(0)
/* Atomic 16-bit register access macro to set one or several bits */
#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT) \
/* Atomic 16-bit register access macro to clear one or several bits */
#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT) \
/* Atomic 16-bit register access macro to clear and set one or several bits */
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
/**
* @}
*/

View File

@ -10,7 +10,7 @@
[..]
The LL CORTEX driver contains a set of generic APIs that can be
used by user:
(+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick
(+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick
functions
(+) Low power mode configuration (SCB register of Cortex-MCU)
(+) MPU API to configure and enable regions

View File

@ -69,38 +69,46 @@ typedef struct
uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE.
This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
This feature can be modified afterwards using unitary function
@ref LL_I2C_SetMode(). */
uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
This parameter must be set by referring to the STM32CubeMX Tool and
the helper macro @ref __LL_I2C_CONVERT_TIMINGS().
This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
This feature can be modified afterwards using unitary function
@ref LL_I2C_SetTiming(). */
uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION.
This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
This feature can be modified afterwards using unitary functions
@ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
uint32_t DigitalFilter; /*!< Configures the digital noise filter.
This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F.
This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
This feature can be modified afterwards using unitary function
@ref LL_I2C_SetDigitalFilter(). */
uint32_t OwnAddress1; /*!< Specifies the device own address 1.
This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF.
This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
This feature can be modified afterwards using unitary function
@ref LL_I2C_SetOwnAddress1(). */
uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive
match code or next received byte.
This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE.
This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
This feature can be modified afterwards using unitary function
@ref LL_I2C_AcknowledgeNextData(). */
uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1.
This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
This feature can be modified afterwards using unitary function
@ref LL_I2C_SetOwnAddress1(). */
} LL_I2C_InitTypeDef;
/**
* @}
@ -170,10 +178,11 @@ typedef struct
/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
* @{
*/
#define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */
#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */
#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode (Default address not acknowledge) */
#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */
#define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */
#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */
#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode
(Default address not acknowledge) */
#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */
/**
* @}
*/
@ -208,14 +217,15 @@ typedef struct
/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
* @{
*/
#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */
#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */
#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */
#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */
#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */
#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */
#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */
#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done. All Address2 are acknowledged.*/
#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */
#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */
#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */
#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */
#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */
#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */
#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */
#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done.
All Address2 are acknowledged. */
/**
* @}
*/
@ -250,14 +260,21 @@ typedef struct
/** @defgroup I2C_LL_EC_MODE Transfer End Mode
* @{
*/
#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */
#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode with no HW PEC comparison. */
#define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode with no HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode with HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Software end mode with HW PEC comparison. */
#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */
#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode
with no HW PEC comparison. */
#define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode
with no HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode
with HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode
with HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode
with HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE)
/*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE)
/*!< Enable SMBUS Software end mode with HW PEC comparison. */
/**
* @}
*/
@ -265,14 +282,23 @@ typedef struct
/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
* @{
*/
#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /*!< Don't Generate Stop and Start condition. */
#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) /*!< Generate Stop condition (Size should be set to 0). */
#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Start for read request. */
#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Start for write request. */
#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Restart for read request, slave 7Bit address. */
#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Restart for write request, slave 7Bit address. */
#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN | I2C_CR2_HEAD10R) /*!< Generate Restart for read request, slave 10Bit address. */
#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Restart for write request, slave 10Bit address.*/
#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U
/*!< Don't Generate Stop and Start condition. */
#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
/*!< Generate Stop condition (Size should be set to 0). */
#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
/*!< Generate Start for read request. */
#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
/*!< Generate Start for write request. */
#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
/*!< Generate Restart for read request, slave 7Bit address. */
#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
/*!< Generate Restart for write request, slave 7Bit address. */
#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | \
I2C_CR2_RD_WRN | I2C_CR2_HEAD10R)
/*!< Generate Restart for read request, slave 10Bit address. */
#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
/*!< Generate Restart for write request, slave 10Bit address.*/
/**
* @}
*/
@ -280,8 +306,10 @@ typedef struct
/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
* @{
*/
#define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master, slave enters receiver mode. */
#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master, slave enters transmitter mode.*/
#define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master,
slave enters receiver mode. */
#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master,
slave enters transmitter mode.*/
/**
* @}
*/
@ -289,8 +317,10 @@ typedef struct
/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
* @{
*/
#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */
#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */
#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for
transmission */
#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for
reception */
/**
* @}
*/
@ -298,8 +328,10 @@ typedef struct
/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
* @{
*/
#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect SCL low level timeout. */
#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect both SCL and SDA high level timeout.*/
#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect
SCL low level timeout. */
#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect
both SCL and SDA high level timeout.*/
/**
* @}
*/
@ -307,9 +339,12 @@ typedef struct
/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
* @{
*/
#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */
#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock) enable bit */
#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB (extended clock) enable bits */
#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */
#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock)
enable bit */
#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | \
I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB
(extended clock) enable bits */
/**
* @}
*/
@ -353,18 +388,22 @@ typedef struct
/**
* @brief Configure the SDA setup, hold time and the SCL high, low period.
* @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
* @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
* @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
* @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
* @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
* @param __SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
(tscldel = (SCLDEL+1)xtpresc)
* @param __HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
(tsdadel = SDADELxtpresc)
* @param __SCLH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF.
(tsclh = (SCLH+1)xtpresc)
* @param __SCLL_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF.
(tscll = (SCLL+1)xtpresc)
* @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
*/
#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \
(((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \
(((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \
(((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \
(((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __SETUP_TIME__, __HOLD_TIME__, __SCLH_PERIOD__, __SCLL_PERIOD__) \
((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \
(((uint32_t)(__SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \
(((uint32_t)(__HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \
(((uint32_t)(__SCLH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \
(((uint32_t)(__SCLL_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
/**
* @}
*/
@ -428,7 +467,8 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
* @param AnalogFilter This parameter can be one of the following values:
* @arg @ref LL_I2C_ANALOGFILTER_ENABLE
* @arg @ref LL_I2C_ANALOGFILTER_DISABLE
* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled)
and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
* This parameter is used to configure the digital noise filter on SDA and SCL input.
* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
* @retval None
@ -444,7 +484,8 @@ __STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilt
* This filter can only be programmed when the I2C is disabled (PE = 0).
* @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
* @param I2Cx I2C Instance.
* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled)
and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
* This parameter is used to configure the digital noise filter on SDA and SCL input.
* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
* @retval None
@ -664,7 +705,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
/**
* @brief Enable Wakeup from STOP.
* @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
* WakeUpFromStop feature is supported by the I2Cx Instance.
* @note This bit can only be programmed when Digital Filter is disabled.
* @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
@ -678,7 +719,7 @@ __STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
/**
* @brief Disable Wakeup from STOP.
* @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
* WakeUpFromStop feature is supported by the I2Cx Instance.
* @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
* @param I2Cx I2C Instance.
@ -691,7 +732,7 @@ __STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
/**
* @brief Check if Wakeup from STOP is enabled or disabled.
* @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
* WakeUpFromStop feature is supported by the I2Cx Instance.
* @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
* @param I2Cx I2C Instance.
@ -941,7 +982,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
/**
* @brief Configure peripheral mode.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
* CR1 SMBDEN LL_I2C_SetMode
@ -960,7 +1001,7 @@ __STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
/**
* @brief Get peripheral mode.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
* CR1 SMBDEN LL_I2C_GetMode
@ -978,7 +1019,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
/**
* @brief Enable SMBus alert (Host or Device mode)
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note SMBus Device mode:
* - SMBus Alert pin is drived low and
@ -996,7 +1037,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
/**
* @brief Disable SMBus alert (Host or Device mode)
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note SMBus Device mode:
* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
@ -1014,7 +1055,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
/**
* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
* @param I2Cx I2C Instance.
@ -1027,7 +1068,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
/**
* @brief Enable SMBus Packet Error Calculation (PEC).
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
* @param I2Cx I2C Instance.
@ -1040,7 +1081,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
/**
* @brief Disable SMBus Packet Error Calculation (PEC).
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
* @param I2Cx I2C Instance.
@ -1053,7 +1094,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
/**
* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
* @param I2Cx I2C Instance.
@ -1066,7 +1107,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
/**
* @brief Configure the SMBus Clock Timeout.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
@ -1089,7 +1130,7 @@ __STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Timeo
/**
* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note These bits can only be programmed when TimeoutA is disabled.
* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
@ -1104,7 +1145,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t Timeout
/**
* @brief Get the SMBus Clock TimeoutA setting.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
* @param I2Cx I2C Instance.
@ -1117,7 +1158,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
/**
* @brief Set the SMBus Clock TimeoutA mode.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note This bit can only be programmed when TimeoutA is disabled.
* @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
@ -1134,7 +1175,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t Tim
/**
* @brief Get the SMBus Clock TimeoutA mode.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
* @param I2Cx I2C Instance.
@ -1149,7 +1190,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
/**
* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note These bits can only be programmed when TimeoutB is disabled.
* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
@ -1164,7 +1205,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t Timeout
/**
* @brief Get the SMBus Extended Cumulative Clock TimeoutB setting.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
* @param I2Cx I2C Instance.
@ -1177,7 +1218,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
/**
* @brief Enable the SMBus Clock Timeout.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
* TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
@ -1195,7 +1236,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Clock
/**
* @brief Disable the SMBus Clock Timeout.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
* TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
@ -1213,7 +1254,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Cloc
/**
* @brief Check if the SMBus Clock Timeout is enabled or disabled.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
* TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
@ -1226,7 +1267,8 @@ __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Cloc
*/
__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
{
return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)) ? 1UL : 0UL);
return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == \
(ClockTimeout)) ? 1UL : 0UL);
}
/**
@ -1443,7 +1485,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
/**
* @brief Enable Error interrupts.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note Any of these errors will generate interrupt :
* Arbitration Loss (ARLO)
@ -1463,7 +1505,7 @@ __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
/**
* @brief Disable Error interrupts.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note Any of these errors will generate interrupt :
* Arbitration Loss (ARLO)
@ -1645,7 +1687,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus PEC error flag in reception.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: Clear default value.
* SET: When the received PEC does not match with the PEC register content.
@ -1660,7 +1702,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus Timeout detection flag.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: Clear default value.
* SET: When a timeout or extended clock timeout occurs.
@ -1675,7 +1717,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus alert flag.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: Clear default value.
* SET: When SMBus host configuration, SMBus alert enabled and
@ -1782,7 +1824,7 @@ __STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
/**
* @brief Clear SMBus PEC error flag.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
* @param I2Cx I2C Instance.
@ -1795,7 +1837,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
/**
* @brief Clear SMBus Timeout detection flag.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
* @param I2Cx I2C Instance.
@ -1808,7 +1850,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
/**
* @brief Clear SMBus Alert flag.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
* @param I2Cx I2C Instance.
@ -1923,7 +1965,8 @@ __STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
}
/**
* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code
or next received byte.
* @note Usage in Slave mode only.
* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
* @param I2Cx I2C Instance.
@ -1964,7 +2007,8 @@ __STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
/**
* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
* @note The master sends the complete 10bit slave address read sequence :
* Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
* Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address
in Read direction.
* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
* @param I2Cx I2C Instance.
* @retval None
@ -2125,9 +2169,10 @@ __STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
/**
* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition
or an Address Matched is received.
* This bit has no effect when RELOAD bit is set.
* This bit has no effect in device mode when SBC bit is not set.
* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
@ -2141,7 +2186,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
/**
* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
* @param I2Cx I2C Instance.
@ -2154,7 +2199,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
/**
* @brief Get the SMBus Packet Error byte calculated.
* @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
* @param I2Cx I2C Instance.

View File

@ -150,24 +150,29 @@ typedef struct
uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_SetPrescaler().*/
uint32_t CounterMode; /*!< Specifies the counter mode.
This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_SetCounterMode().*/
uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active
Auto-Reload Register at the next update event.
This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF.
Some timer instances may support 32 bits counters. In that case this parameter must
be a number between 0x0000 and 0xFFFFFFFF.
This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_SetAutoReload().*/
uint32_t ClockDivision; /*!< Specifies the clock division.
This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_SetClockDivision().*/
} LL_TIM_InitTypeDef;
/**
@ -178,22 +183,26 @@ typedef struct
uint32_t OCMode; /*!< Specifies the output mode.
This parameter can be a value of @ref TIM_LL_EC_OCMODE.
This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_OC_SetMode().*/
uint32_t OCState; /*!< Specifies the TIM Output Compare state.
This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
This feature can be modified afterwards using unitary functions
@ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register.
This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/
This feature can be modified afterwards using unitary function
LL_TIM_OC_SetCompareCHx (x=1..6).*/
uint32_t OCPolarity; /*!< Specifies the output polarity.
This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_OC_SetPolarity().*/
} LL_TIM_OC_InitTypeDef;
@ -208,22 +217,26 @@ typedef struct
uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetPolarity().*/
uint32_t ICActiveInput; /*!< Specifies the input.
This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetActiveInput().*/
uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
This parameter can be a value of @ref TIM_LL_EC_ICPSC.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetPrescaler().*/
uint32_t ICFilter; /*!< Specifies the input capture filter.
This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetFilter().*/
} LL_TIM_IC_InitTypeDef;
@ -235,47 +248,56 @@ typedef struct
uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_SetEncoderMode().*/
uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetPolarity().*/
uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetActiveInput().*/
uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
This parameter can be a value of @ref TIM_LL_EC_ICPSC.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetPrescaler().*/
uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetFilter().*/
uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input.
This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetPolarity().*/
uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source
This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetActiveInput().*/
uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value.
This parameter can be a value of @ref TIM_LL_EC_ICPSC.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetPrescaler().*/
uint32_t IC2Filter; /*!< Specifies the TI2 input filter.
This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
This feature can be modified afterwards using unitary function
@ref LL_TIM_IC_SetFilter().*/
} LL_TIM_ENCODER_InitTypeDef;
@ -334,8 +356,8 @@ typedef struct
/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
* @{
*/
#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter is not stopped at update event */
#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter stops counting at the next update event */
#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at the next update event */
#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at update event */
/**
* @}
*/
@ -822,7 +844,8 @@ typedef struct
((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U)
/**
* @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay.
* @brief HELPER macro calculating the compare value required to achieve the required timer output compare
* active/inactive delay.
* @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
* @param __TIMCLK__ timer input clock frequency (in Hz)
* @param __PSC__ prescaler
@ -834,7 +857,8 @@ typedef struct
/ ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
/**
* @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode).
* @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration
* (when the timer operates in one pulse mode).
* @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
* @param __TIMCLK__ timer input clock frequency (in Hz)
* @param __PSC__ prescaler
@ -1091,7 +1115,8 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx)
}
/**
* @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
* @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators
* (when supported) and the digital filters.
* @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
* whether or not the clock division feature is supported by the timer
* instance.
@ -1109,7 +1134,8 @@ __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDi
}
/**
* @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
* @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time
* generators (when supported) and the digital filters.
* @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
* whether or not the clock division feature is supported by the timer
* instance.
@ -1368,7 +1394,7 @@ __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
}
/**
@ -1397,7 +1423,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
}
/**
@ -1804,7 +1830,8 @@ __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint3
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]),
((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]);
((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) \
<< SHIFT_TAB_ICxx[iChannel]);
MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
(Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
}
@ -2685,7 +2712,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
}
/**
* @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending).
* @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set
* (Capture/Compare 1 interrupt is pending).
* @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
@ -2707,7 +2735,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
}
/**
* @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending).
* @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set
* (Capture/Compare 2 over-capture interrupt is pending).
* @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
@ -2729,7 +2758,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
}
/**
* @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending).
* @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set
* (Capture/Compare 3 over-capture interrupt is pending).
* @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
@ -2751,7 +2781,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
}
/**
* @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending).
* @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set
* (Capture/Compare 4 over-capture interrupt is pending).
* @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
@ -2970,7 +3001,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
* @}
*/
/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
/** @defgroup TIM_LL_EF_DMA_Management DMA Management
* @{
*/
/**

File diff suppressed because it is too large Load Diff

View File

@ -25,7 +25,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32L0xx_LL_Driver
* @{
@ -109,7 +109,7 @@ ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx)
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
}
#endif
#endif /* I2C2 */
#if defined(I2C3)
else if (I2Cx == I2C3)
{
@ -119,7 +119,7 @@ ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx)
/* Release reset of I2C clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
}
#endif
#endif /* I2C3 */
else
{
status = ERROR;

View File

@ -75,11 +75,11 @@
/** @defgroup RCC_LL_Private_Functions RCC Private functions
* @{
*/
uint32_t RCC_GetSystemClockFreq(void);
uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency);
uint32_t RCC_PLL_GetFreqDomain_SYS(void);
static uint32_t RCC_GetSystemClockFreq(void);
static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency);
static uint32_t RCC_PLL_GetFreqDomain_SYS(void);
/**
* @}
*/
@ -576,7 +576,7 @@ uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
* @brief Return SYSTEM clock frequency
* @retval SYSTEM clock frequency (in Hz)
*/
uint32_t RCC_GetSystemClockFreq(void)
static uint32_t RCC_GetSystemClockFreq(void)
{
uint32_t frequency;
@ -619,7 +619,7 @@ uint32_t RCC_GetSystemClockFreq(void)
* @param SYSCLK_Frequency SYSCLK clock frequency
* @retval HCLK clock frequency (in Hz)
*/
uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
{
/* HCLK clock frequency */
return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
@ -630,7 +630,7 @@ uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
* @param HCLK_Frequency HCLK clock frequency
* @retval PCLK1 clock frequency (in Hz)
*/
uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
{
/* PCLK1 clock frequency */
return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
@ -641,7 +641,7 @@ uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
* @param HCLK_Frequency HCLK clock frequency
* @retval PCLK2 clock frequency (in Hz)
*/
uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
{
/* PCLK2 clock frequency */
return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler());
@ -651,7 +651,7 @@ uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
* @brief Return PLL clock frequency used for system domain
* @retval PLL clock frequency (in Hz)
*/
uint32_t RCC_PLL_GetFreqDomain_SYS(void)
static uint32_t RCC_PLL_GetFreqDomain_SYS(void)
{
uint32_t pllinputfreq, pllsource;

View File

@ -214,7 +214,8 @@ void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct)
/**
* @brief Configure the TIMx time base unit.
* @param TIMx Timer Instance
* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure)
* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure
* (TIMx time base unit configuration data structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
@ -260,7 +261,8 @@ ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)
/**
* @brief Set the fields of the TIMx output channel configuration data
* structure to their default values.
* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure)
* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure
* (the output channel configuration data structure)
* @retval None
*/
void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
@ -280,7 +282,8 @@ void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
* @arg @ref LL_TIM_CHANNEL_CH2
* @arg @ref LL_TIM_CHANNEL_CH3
* @arg @ref LL_TIM_CHANNEL_CH4
* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure)
* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration
* data structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx output channel is initialized
* - ERROR: TIMx output channel is not initialized
@ -313,7 +316,8 @@ ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTy
/**
* @brief Set the fields of the TIMx input channel configuration data
* structure to their default values.
* @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure)
* @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration
* data structure)
* @retval None
*/
void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
@ -333,7 +337,8 @@ void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
* @arg @ref LL_TIM_CHANNEL_CH2
* @arg @ref LL_TIM_CHANNEL_CH3
* @arg @ref LL_TIM_CHANNEL_CH4
* @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure)
* @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data
* structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx output channel is initialized
* - ERROR: TIMx output channel is not initialized
@ -365,7 +370,8 @@ ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTy
/**
* @brief Fills each TIM_EncoderInitStruct field with its default value
* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure)
* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface
* configuration data structure)
* @retval None
*/
void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
@ -385,7 +391,8 @@ void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct
/**
* @brief Configure the encoder interface of the timer instance.
* @param TIMx Timer Instance
* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure)
* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface
* configuration data structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable

View File

@ -0,0 +1,420 @@
/**
******************************************************************************
* @file stm32l0xx_ll_usart.c
* @author MCD Application Team
* @brief USART LL module driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if defined(USE_FULL_LL_DRIVER)
/* Includes ------------------------------------------------------------------*/
#include "stm32l0xx_ll_usart.h"
#include "stm32l0xx_ll_rcc.h"
#include "stm32l0xx_ll_bus.h"
#ifdef USE_FULL_ASSERT
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32L0xx_LL_Driver
* @{
*/
#if defined (USART1) || defined (USART2) || defined (USART4) || defined (USART5)
/** @addtogroup USART_LL
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup USART_LL_Private_Macros
* @{
*/
/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
* divided by the smallest oversampling used on the USART (i.e. 8) */
#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4000000U)
/* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
#define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
|| ((__VALUE__) == LL_USART_DIRECTION_RX) \
|| ((__VALUE__) == LL_USART_DIRECTION_TX) \
|| ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
|| ((__VALUE__) == LL_USART_PARITY_EVEN) \
|| ((__VALUE__) == LL_USART_PARITY_ODD))
#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
|| ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
|| ((__VALUE__) == LL_USART_DATAWIDTH_9B))
#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
|| ((__VALUE__) == LL_USART_OVERSAMPLING_8))
#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
|| ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
|| ((__VALUE__) == LL_USART_PHASE_2EDGE))
#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
|| ((__VALUE__) == LL_USART_POLARITY_HIGH))
#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
|| ((__VALUE__) == LL_USART_CLOCK_ENABLE))
#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
|| ((__VALUE__) == LL_USART_STOPBITS_1) \
|| ((__VALUE__) == LL_USART_STOPBITS_1_5) \
|| ((__VALUE__) == LL_USART_STOPBITS_2))
#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
|| ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup USART_LL_Exported_Functions
* @{
*/
/** @addtogroup USART_LL_EF_Init
* @{
*/
/**
* @brief De-initialize USART registers (Registers restored to their default values).
* @param USARTx USART Instance
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers are de-initialized
* - ERROR: USART registers are not de-initialized
*/
ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_UART_INSTANCE(USARTx));
#if defined(USART1)
if (USARTx == USART1)
{
/* Force reset of USART clock */
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
/* Release reset of USART clock */
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
}
#endif /* USART1 */
#if defined(USART1)
else if (USARTx == USART2)
#else
if (USARTx == USART2)
#endif /* USART1 */
{
/* Force reset of USART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
/* Release reset of USART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
}
#if defined(USART4)
else if (USARTx == USART4)
{
/* Force reset of USART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
/* Release reset of USART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
}
#endif /* USART4 */
#if defined(USART5)
else if (USARTx == USART5)
{
/* Force reset of USART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5);
/* Release reset of USART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5);
}
#endif /* USART5 */
else
{
status = ERROR;
}
return (status);
}
/**
* @brief Initialize USART registers according to the specified
* parameters in USART_InitStruct.
* @note As some bits in USART configuration registers can only be written when
* the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
* this function. Otherwise, ERROR result will be returned.
* @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
* @param USARTx USART Instance
* @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
* that contains the configuration information for the specified USART peripheral.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers are initialized according to USART_InitStruct content
* - ERROR: Problem occurred during USART Registers initialization
*/
ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
{
ErrorStatus status = ERROR;
uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
#if defined(USART4) || defined(USART5)
LL_RCC_ClocksTypeDef RCC_Clocks;
#endif /* USART4 || USART5 */
/* Check the parameters */
assert_param(IS_UART_INSTANCE(USARTx));
assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
/* USART needs to be in disabled state, in order to be able to configure some bits in
CRx registers */
if (LL_USART_IsEnabled(USARTx) == 0U)
{
/*---------------------------- USART CR1 Configuration ---------------------
* Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
* - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
* - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
* - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
* - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
*/
MODIFY_REG(USARTx->CR1,
(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
(USART_InitStruct->DataWidth | USART_InitStruct->Parity |
USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
/*---------------------------- USART CR2 Configuration ---------------------
* Configure USARTx CR2 (Stop bits) with parameters:
* - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
* - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
*/
LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
/*---------------------------- USART CR3 Configuration ---------------------
* Configure USARTx CR3 (Hardware Flow Control) with parameters:
* - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
* USART_InitStruct->HardwareFlowControl value.
*/
LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
/*---------------------------- USART BRR Configuration ---------------------
* Retrieve Clock frequency used for USART Peripheral
*/
#if defined(USART1)
if (USARTx == USART1)
{
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
}
#endif /* USART1 */
#if defined(USART1)
else if (USARTx == USART2)
#else
if (USARTx == USART2)
#endif /* USART1 */
{
periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
}
#if defined(USART4)
else if (USARTx == USART4)
{
/* USART4 clock is PCLK1 */
LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
periphclk = RCC_Clocks.PCLK1_Frequency;
}
#endif /* USART4 */
#if defined(USART5)
else if (USARTx == USART5)
{
/* USART5 clock is PCLK1 */
LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
periphclk = RCC_Clocks.PCLK1_Frequency;
}
#endif /* USART5 */
else
{
/* Nothing to do, as error code is already assigned to ERROR value */
}
/* Configure the USART Baud Rate :
- valid baud rate value (different from 0) is required
- Peripheral clock as returned by RCC service, should be valid (different from 0).
*/
if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
&& (USART_InitStruct->BaudRate != 0U))
{
status = SUCCESS;
LL_USART_SetBaudRate(USARTx,
periphclk,
USART_InitStruct->OverSampling,
USART_InitStruct->BaudRate);
/* Check BRR is greater than or equal to 16d */
assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
}
}
/* Endif (=> USART not in Disabled state => return ERROR) */
return (status);
}
/**
* @brief Set each @ref LL_USART_InitTypeDef field to default value.
* @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
{
/* Set USART_InitStruct fields to default values */
USART_InitStruct->BaudRate = 9600U;
USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
}
/**
* @brief Initialize USART Clock related settings according to the
* specified parameters in the USART_ClockInitStruct.
* @note As some bits in USART configuration registers can only be written when
* the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
* this function. Otherwise, ERROR result will be returned.
* @param USARTx USART Instance
* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
* that contains the Clock configuration information for the specified USART peripheral.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers related to Clock settings are initialized according
* to USART_ClockInitStruct content
* - ERROR: Problem occurred during USART Registers initialization
*/
ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
{
ErrorStatus status = SUCCESS;
/* Check USART Instance and Clock signal output parameters */
assert_param(IS_UART_INSTANCE(USARTx));
assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
/* USART needs to be in disabled state, in order to be able to configure some bits in
CRx registers */
if (LL_USART_IsEnabled(USARTx) == 0U)
{
/* If USART Clock signal is disabled */
if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
{
/* Deactivate Clock signal delivery :
* - Disable Clock Output: USART_CR2_CLKEN cleared
*/
LL_USART_DisableSCLKOutput(USARTx);
}
else
{
/* Ensure USART instance is USART capable */
assert_param(IS_USART_INSTANCE(USARTx));
/* Check clock related parameters */
assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
/*---------------------------- USART CR2 Configuration -----------------------
* Configure USARTx CR2 (Clock signal related bits) with parameters:
* - Enable Clock Output: USART_CR2_CLKEN set
* - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
* - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
* - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
*/
MODIFY_REG(USARTx->CR2,
USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
}
}
/* Else (USART not in Disabled state => return ERROR */
else
{
status = ERROR;
}
return (status);
}
/**
* @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
{
/* Set LL_USART_ClockInitStruct fields with default values */
USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
LL_USART_CLOCK_DISABLE */
USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
LL_USART_CLOCK_DISABLE */
USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
LL_USART_CLOCK_DISABLE */
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* USART1 || USART2 || USART4 || USART5 */
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

186
fw/STM32L031G6UX_FLASH.ld Normal file
View File

@ -0,0 +1,186 @@
/*
******************************************************************************
**
** @file : LinkerScript.ld
**
** @author : Auto-generated by STM32CubeIDE
**
** @brief : Linker script for STM32L031G6Ux Device from STM32L0 series
** 32Kbytes FLASH
** 8Kbytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed as is, without any warranty
** of any kind.
**
******************************************************************************
** @attention
**
** <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
** All rights reserved.</center></h2>
**
** This software component is licensed by ST under BSD 3-Clause license,
** the "License"; You may not use this file except in compliance with the
** License. You may obtain a copy of the License at:
** opensource.org/licenses/BSD-3-Clause
**
******************************************************************************
*/
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200 ; /* required amount of heap */
_Min_Stack_Size = 0x400 ; /* required amount of stack */
/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K
}
/* Sections */
SECTIONS
{
/* The startup code into "FLASH" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
/* The program code and other data into "FLASH" Rom type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
/* Constant data into "FLASH" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH
.ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
.ARM : {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >FLASH
.preinit_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH
.init_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH
.fini_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >FLASH
/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM
/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

View File

@ -5,6 +5,8 @@
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.enable_swv" value="false"/>
<intAttribute key="com.st.stm32cube.ide.mcu.debug.launch.formatVersion" value="2"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.ip_address_local" value="localhost"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.limit_swo_clock.enabled" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.limit_swo_clock.value" value=""/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.loadList" value="{&quot;fItems&quot;:[{&quot;fIsFromMainTab&quot;:true,&quot;fPath&quot;:&quot;Debug/iaq_wired_sensor.elf&quot;,&quot;fProjectName&quot;:&quot;iaq_wired_sensor&quot;,&quot;fPerformBuild&quot;:true,&quot;fDownload&quot;:true,&quot;fLoadSymbols&quot;:true}]}"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.override_start_address_mode" value="default"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.remoteCommand" value="target remote"/>
@ -14,7 +16,6 @@
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.haltonexception" value="true"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swd_mode" value="true"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_port" value="61235"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_trace_div" value="8"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_trace_hclk" value="16000000"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.useRemoteTarget" value="true"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.vector_table" value=""/>
@ -27,22 +28,28 @@
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_shared_stlink" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader" value=""/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader_init" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="0"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="24000"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.halt_all_on_reset" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="/home/user/STM32CubeIDE/workspace_1.5.0/iaq_wired_sensor/Debug/st-link_gdbserver_log.txt"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Debug/st-link_gdbserver_log.txt"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="enable"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.max_halt_delay" value="2"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.reset_strategy" value="connect_under_reset"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_check_serial_number" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value=""/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkenable_rtos" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{&quot;fItems&quot;:[{&quot;fDisplayName&quot;:&quot;Reset&quot;,&quot;fIsSuppressible&quot;:false,&quot;fResetAttribute&quot;:&quot;Software system reset&quot;,&quot;fResetStrategies&quot;:[{&quot;fDisplayName&quot;:&quot;Software system reset&quot;,&quot;fLaunchAttribute&quot;:&quot;system_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Hardware reset&quot;,&quot;fLaunchAttribute&quot;:&quot;hardware_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset hardware\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Core reset&quot;,&quot;fLaunchAttribute&quot;:&quot;core_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset core\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;None&quot;,&quot;fLaunchAttribute&quot;:&quot;no_reset&quot;,&quot;fGdbCommands&quot;:[],&quot;fCmdOptions&quot;:[&quot;-g&quot;]}],&quot;fGdbCommandGroup&quot;:{&quot;name&quot;:&quot;Additional commands&quot;,&quot;commands&quot;:[]}}]}"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.swv.swv_wait_for_sync" value="true"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.enableRtosProxy" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyCustomProperties" value=""/>
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriver" value="threadx"/>
<booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriverAuto" value="false"/>
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriverPort" value="cortex_m0"/>
<intAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyPort" value="60000"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="ST-LINK (ST-LINK GDB server)"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDeviceId" value="com.st.stm32cube.ide.mcu.debug.stlink"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="61234"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
@ -61,13 +68,13 @@
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/iaq_wired_sensor.elf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="iaq_wired_sensor"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1512690796"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.583977815"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/iaq_wired_sensor"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/>
</listAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;&gt;&lt;gdbmemoryBlockExpression address=&quot;134742016&quot; label=&quot;0x08080000&quot;/&gt;&lt;gdbmemoryBlockExpression address=&quot;134742020&quot; label=&quot;0x08080004&quot;/&gt;&lt;gdbmemoryBlockExpression address=&quot;134742016&quot; label=&quot;0x08080000&quot;/&gt;&lt;/memoryBlockExpressionList&gt;"/>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;"/>
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
</launchConfiguration>

View File

@ -4,77 +4,70 @@ GPIO.groupedBy=Group By Peripherals
I2C1.IPParameters=Timing
I2C1.Timing=0x40000A0B
KeepUserPlacement=false
LPUART1.BaudRate=115200
LPUART1.IPParameters=BaudRate,SwapParam,OneBitSampling,WordLength,Parity
LPUART1.OneBitSampling=UART_ONE_BIT_SAMPLE_ENABLE
LPUART1.Parity=UART_PARITY_EVEN
LPUART1.SwapParam=UART_ADVFEATURE_SWAP_ENABLE
LPUART1.WordLength=UART_WORDLENGTH_9B
Mcu.Family=STM32L0
Mcu.IP0=I2C1
Mcu.IP1=LPUART1
Mcu.IP2=NVIC
Mcu.IP3=RCC
Mcu.IP4=SYS
Mcu.IP5=TIM21
Mcu.IP1=NVIC
Mcu.IP2=RCC
Mcu.IP3=SYS
Mcu.IP4=TIM21
Mcu.IP5=USART2
Mcu.IPNb=6
Mcu.Name=STM32L011F(3-4)Ux
Mcu.Package=UFQFPN20
Mcu.Pin0=PA0-CK_IN
Mcu.Pin1=PA1
Mcu.Pin10=VP_TIM21_VS_ClockSourceINT
Mcu.Pin2=PA5
Mcu.Pin3=PA6
Mcu.Pin4=PA7
Mcu.Pin5=PA9
Mcu.Pin6=PA10
Mcu.Pin7=PA13
Mcu.Pin8=PA14
Mcu.Pin9=VP_SYS_VS_Systick
Mcu.PinsNb=11
Mcu.Name=STM32L031G(4-6)Ux
Mcu.Package=UFQFPN28
Mcu.Pin0=PA1
Mcu.Pin1=PA2
Mcu.Pin10=VP_SYS_VS_Systick
Mcu.Pin11=VP_TIM21_VS_ClockSourceINT
Mcu.Pin2=PA3
Mcu.Pin3=PA5
Mcu.Pin4=PA6
Mcu.Pin5=PA7
Mcu.Pin6=PA9
Mcu.Pin7=PA10
Mcu.Pin8=PA13
Mcu.Pin9=PA14
Mcu.PinsNb=12
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32L011F4Ux
MxCube.Version=6.2.1
MxDb.Version=DB.6.0.21
Mcu.UserName=STM32L031G6Ux
MxCube.Version=6.3.0
MxDb.Version=DB.6.0.30
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.LPUART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true
NVIC.TIM21_IRQn=true\:0\:0\:false\:false\:true\:true\:true
PA0-CK_IN.GPIOParameters=GPIO_PuPd
PA0-CK_IN.GPIO_PuPd=GPIO_PULLUP
PA0-CK_IN.Mode=Asynchronous
PA0-CK_IN.Signal=LPUART1_RX
PA1.GPIOParameters=GPIO_PuPd
PA1.GPIO_PuPd=GPIO_PULLUP
PA1.Mode=Asynchronous
PA1.Signal=LPUART1_TX
NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
PA1.Mode=Hardware Flow Control (RS485)
PA1.Signal=USART2_DE
PA10.GPIOParameters=GPIO_Pu
PA10.GPIO_Pu=GPIO_PULLUP
PA10.Mode=I2C
PA10.Signal=I2C1_SDA
PA13.Mode=Serial_Wire
PA13.Signal=SYS_SWDIO
PA14.Mode=Serial_Wire
PA14.Signal=SYS_SWCLK
PA5.GPIOParameters=PinState,GPIO_Label
PA2.Mode=Asynchronous
PA2.Signal=USART2_TX
PA3.Mode=Asynchronous
PA3.Signal=USART2_RX
PA5.GPIOParameters=GPIO_Label
PA5.GPIO_Label=LED_B
PA5.Locked=true
PA5.PinState=GPIO_PIN_SET
PA5.Signal=GPIO_Output
PA6.GPIOParameters=PinState,GPIO_Label
PA6.GPIOParameters=GPIO_Label
PA6.GPIO_Label=LED_G
PA6.Locked=true
PA6.PinState=GPIO_PIN_SET
PA6.Signal=GPIO_Output
PA7.GPIOParameters=PinState,GPIO_Label
PA7.GPIOParameters=GPIO_Label
PA7.GPIO_Label=LED_R
PA7.Locked=true
PA7.PinState=GPIO_PIN_SET
PA7.Signal=GPIO_Output
PA9.Locked=true
PA9.GPIOParameters=GPIO_Pu
PA9.GPIO_Pu=GPIO_PULLUP
PA9.Mode=I2C
PA9.Signal=I2C1_SCL
PinOutPanel.RotationAngle=0
@ -86,8 +79,8 @@ ProjectManager.CoupleFile=false
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32L011F4Ux
ProjectManager.FirmwarePackage=STM32Cube FW_L0 V1.12.0
ProjectManager.DeviceId=STM32L031G6Ux
ProjectManager.FirmwarePackage=STM32Cube FW_L0 V1.12.1
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
@ -105,7 +98,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-SystemClock_Config-RCC-false-LL-false,3-MX_I2C1_Init-I2C1-false-LL-true,4-MX_LPUART1_UART_Init-LPUART1-false-LL-true,5-MX_TIM21_Init-TIM21-false-LL-true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_I2C1_Init-I2C1-false-LL-true,4-MX_USART2_UART_Init-USART2-false-LL-true,5-MX_TIM21_Init-TIM21-false-LL-true
RCC.AHBFreq_Value=12000000
RCC.APB1Freq_Value=12000000
RCC.APB1TimFreq_Value=12000000
@ -138,13 +131,20 @@ RCC.USART2Freq_Value=12000000
RCC.VCOOutputFreq_Value=48000000
RCC.WatchDogFreq_Value=37000
TIM21.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE
TIM21.ClockDivision=TIM_CLOCKDIVISION_DIV1
TIM21.IPParameters=Prescaler,Period,AutoReloadPreload,ClockDivision
TIM21.IPParameters=Prescaler,Period,AutoReloadPreload
TIM21.IPParametersWithoutCheck=Prescaler,Period
TIM21.Period=tim21_period
TIM21.Prescaler=tim21_prescaler
USART2.BaudRate=config_baudrates[sensor_config.baudrate_index]
USART2.IPParameters=VirtualMode-Asynchronous,VirtualMode-Hardware Flow Control (RS485),BaudRate,WordLength,Parity
USART2.IPParametersWithoutCheck=BaudRate
USART2.Parity=PARITY_EVEN
USART2.VirtualMode-Asynchronous=VM_ASYNC
USART2.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC
USART2.WordLength=WORDLENGTH_9B
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TIM21_VS_ClockSourceINT.Mode=Internal
VP_TIM21_VS_ClockSourceINT.Signal=TIM21_VS_ClockSourceINT
board=custom
isbadioc=false

396
fw_old/.cproject Normal file
View File

@ -0,0 +1,396 @@
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<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
</projectDescription>

View File

@ -0,0 +1,72 @@
com.st.stm32cube.ide.mcu.ide.oss.source.checker.libnano.problem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Float formatting support\\")"}
eclipse.preferences.version=1
org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false}
org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused return value\\")"}
org.eclipse.cdt.codan.checkers.localvarreturn=-Warning
org.eclipse.cdt.codan.checkers.localvarreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Returning the address of a local variable\\")"}
org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Nesting comments\\")"}
org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Line comments\\")"}
org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return value\\")",implicit\=>false}
org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Abstract class cannot be instantiated\\")"}
org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Ambiguous problem\\")"}
org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment in condition\\")"}
org.eclipse.cdt.codan.internal.checkers.AssignmentToItselfProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment to itself\\")"}
org.eclipse.cdt.codan.internal.checkers.BlacklistProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.BlacklistProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function or method is blacklisted\\")",blacklist\=>()}
org.eclipse.cdt.codan.internal.checkers.CStyleCastProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.CStyleCastProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"C-Style cast instead of C++ cast\\")",checkMacro\=>true}
org.eclipse.cdt.codan.internal.checkers.CaseBreakProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No break at end of case\\")",no_break_comment\=>"no break",last_case_param\=>false,empty_case_param\=>false,enable_fallthrough_quickfix_param\=>false}
org.eclipse.cdt.codan.internal.checkers.CatchByReference.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Catching by reference is recommended\\")",unknown\=>false,exceptions\=>()}
org.eclipse.cdt.codan.internal.checkers.CircularReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Circular inheritance\\")"}
org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class members should be properly initialized\\")",skip\=>true}
org.eclipse.cdt.codan.internal.checkers.CopyrightProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.CopyrightProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Lack of copyright information\\")",regex\=>".*Copyright.*"}
org.eclipse.cdt.codan.internal.checkers.DecltypeAutoProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid 'decltype(auto)' specifier\\")"}
org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Field cannot be resolved\\")"}
org.eclipse.cdt.codan.internal.checkers.FloatCompareProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.FloatCompareProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Direct float comparison\\")"}
org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function cannot be resolved\\")"}
org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Goto statement used\\")"}
org.eclipse.cdt.codan.internal.checkers.InvalidArguments.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid arguments\\")"}
org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid template argument\\")"}
org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Label statement not found\\")"}
org.eclipse.cdt.codan.internal.checkers.MagicNumberProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.MagicNumberProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Avoid magic numbers\\")",checkArray\=>true,checkOperatorParen\=>true,exceptions\=>(1,0,-1,2,1.0,0.0,-1.0)}
org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Member declaration not found\\")"}
org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Method cannot be resolved\\")"}
org.eclipse.cdt.codan.internal.checkers.MissCaseProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.MissCaseProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing cases in switch\\")"}
org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing default in switch\\")",defaultWithAllEnums\=>false}
org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing reference return value in assignment operator\\")"}
org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing self check in assignment operator\\")"}
org.eclipse.cdt.codan.internal.checkers.MultipleDeclarationsProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.MultipleDeclarationsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Multiple variable declaration\\")"}
org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Name convention for function\\")",pattern\=>"^[a-z]",macro\=>true,exceptions\=>()}
org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class has a virtual method and non-virtual destructor\\")"}
org.eclipse.cdt.codan.internal.checkers.OverloadProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid overload\\")"}
org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redeclaration\\")"}
org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redefinition\\")"}
org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"}
org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"}
org.eclipse.cdt.codan.internal.checkers.ShallowCopyProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.ShallowCopyProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Miss copy constructor or assignment operator\\")",onlynew\=>false}
org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Statement has no effect\\")",macro\=>true,exceptions\=>()}
org.eclipse.cdt.codan.internal.checkers.StaticVariableInHeaderProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.StaticVariableInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Static variable in header file\\")"}
org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suggested parenthesis around expression\\")",paramNot\=>false}
org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suspicious semicolon\\")",else\=>false,afterelse\=>false}
org.eclipse.cdt.codan.internal.checkers.SymbolShadowingProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.SymbolShadowingProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol shadowing\\")",paramFuncParameters\=>true}
org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Type cannot be resolved\\")"}
org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused function declaration\\")",macro\=>true}
org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused static function\\")",macro\=>true}
org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")}
org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Using directive in header\\")"}
org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"}
org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem=-Error
org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Virtual method call in constructor/destructor\\")"}

View File

@ -0,0 +1,6 @@
doxygen/doxygen_new_line_after_brief=true
doxygen/doxygen_use_brief_tag=false
doxygen/doxygen_use_javadoc_tags=true
doxygen/doxygen_use_pre_tag=false
doxygen/doxygen_use_structural_commands=false
eclipse.preferences.version=1

View File

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8DF89ED150041C4CBC7CB9A9CAA90856=295E78E9D51884086204F31037537306
DC22A860405A8BF2F2C095E5B6529F12=295E78E9D51884086204F31037537306
eclipse.preferences.version=1

145
fw_old/Core/Inc/config.h Normal file
View File

@ -0,0 +1,145 @@
/*
* config.h
*
* Created on: Sep 5, 2021
* Author: david
*/
#ifndef INC_CONFIG_H_
#define INC_CONFIG_H_
/* TODO: add comments to everything */
/* EXAMPLE of USAGE */
/*
config_t new_config;
new_config.led_co2_alert_limit1 = 1000;
new_config.led_co2_alert_limit2 = 2000;
new_config.led_on = 1;
new_config.modbus_addr = 0x11;
config_write(&new_config);
config_t config;
config_read(&config);
*/
#include "stdint.h"
#include "stm32l0xx.h"
/* DESCRIPTION OF THE DATA STRUCTURE */
/*
* Data are divided into two groups:
* A) DEVICE DESCRIPTION
* Can not be changed by the user.
* These data can be only read.
* These data are:
* * VENDOR NAME
* * PRODUCT CODE
* * PRODUCT NAME
* * REVISION
* * SERIAL NUMBER
* B) DEVICE CONFIGURATION
* Can be changed by the user.
* These data are:
* * MODBUS ADDRESS - Modbus Address of the device. Default is 254
* * LED ON - Whether the CO2 Level Indication LED should be on or off
* * LED CO2 ALERT LIMIT 1 - CO2 Level when the LED color changes Green<->Yellow
* * LED CO2 ALERT LIMIT 2 - CO2 Level when the LED color changes Yellow<->Red
*
* Device description data can be accessed using direct readout from the memory
* Device configuration data can be accessed using config_t struct.
*/
#define CONFIG_DEFAULT_LED_ON 1
#define CONFIG_DEFAULT_LED_BRIGHTNESS 100 /* TODO: set according to the timers when this will be implemented */
#define CONFIG_DEFAULT_LED_ALERT1_LIMIT 1500
#define CONFIG_DEFAULT_LED_ALERT2_LIMIT 3000
#define CONFIG_DEFAULT_LED_SMOOTH 0
#define CONFIG_DEFAULT_SCD4x_T_OFFSET 0
#define CONFIG_DEFAULT_BAUDRATE_INDEX 0
#define CONFIG_MODBUS_ADDR_LENGTH 2
#define CONFIG_BAUDRATE_INDEX_LENGTH 2
#define CONFIG_LED_ON_LENGTH 2
#define CONFIG_LED_BRIGHTNESS_LENGTH 2
#define CONFIG_LED_SMOOTH_LENGTH 2
#define CONFIG_LED_ALERT1_LENGTH 2
#define CONFIG_LED_ALERT2_LENGTH 2
#define CONFIG_LED_ALERT2_LENGTH 2
#define CONFIG_SCD4x_T_OFFSET_LENGTH 2
#define VENDOR_NAME_LENGTH 64
#define PRODUCT_CODE_LENGTH 64
#define PRODUCT_NAME_LENGTH 64
#define REVISION_LENGTH 16
#define SERIAL_NUMBER_LENGTH 64
#define EEPROM_EMPTY_BYTE 0x00
#define EEPROM_ADDR_START ((uint32_t)0x08080000)
#define EEPROM_ADDR_END ((uint32_t)0x080801FF)
#define CONFIG_EEPROM_ADDR_MODBUS_ADDR EEPROM_ADDR_START
#define CONFIG_EEPROM_ADDR_BAUDRATE_INDEX (CONFIG_EEPROM_ADDR_MODBUS_ADDR + CONFIG_MODBUS_ADDR_LENGTH)
#define CONFIG_EEPROM_ADDR_LED_ON (CONFIG_EEPROM_ADDR_BAUDRATE_INDEX + CONFIG_BAUDRATE_INDEX_LENGTH)
#define CONFIG_EEPROM_ADDR_LED_BRIGHTNESS (CONFIG_EEPROM_ADDR_LED_ON + CONFIG_LED_ON_LENGTH)
#define CONFIG_EEPROM_ADDR_LED_SMOOTH (CONFIG_EEPROM_ADDR_LED_BRIGHTNESS + CONFIG_LED_BRIGHTNESS_LENGTH)
#define CONFIG_EEPROM_ADDR_LED_ALERT1 (CONFIG_EEPROM_ADDR_LED_SMOOTH + CONFIG_LED_SMOOTH_LENGTH)
#define CONFIG_EEPROM_ADDR_LED_ALERT2 (CONFIG_EEPROM_ADDR_LED_ALERT1 + CONFIG_LED_ALERT1_LENGTH)
#define CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET (CONFIG_EEPROM_ADDR_LED_ALERT2 + CONFIG_LED_ALERT2_LENGTH)
#define CONFIG_EEPROM_ADDR_VENDOR_NAME (CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET + CONFIG_SCD4x_T_OFFSET_LENGTH)
#define CONFIG_EEPROM_ADDR_PRODUCT_CODE (CONFIG_EEPROM_ADDR_VENDOR_NAME + VENDOR_NAME_LENGTH)
#define CONFIG_EEPROM_ADDR_PRODUCT_NAME (CONFIG_EEPROM_ADDR_PRODUCT_CODE + PRODUCT_CODE_LENGTH)
#define CONFIG_EEPROM_ADDR_REVISION (CONFIG_EEPROM_ADDR_PRODUCT_NAME + PRODUCT_NAME_LENGTH)
#define CONFIG_EEPROM_ADDR_SERIAL_NUMBER (CONFIG_EEPROM_ADDR_REVISION + REVISION_LENGTH)
#define FLASH_PEKEY1 ((uint32_t)0x89ABCDEF)
#define FLASH_PEKEY2 ((uint32_t)0x02030405)
#define CONFIG_OK 0
#define CONFIG_ERROR -1
#define EEPROM_OK 0
#define EEPROM_ERROR -1
#define EEPROM_UNLOCK_ERROR -2
#define EEPROM_LOCK_ERROR -3
#define EEPROM_WRITE_ERROR -4
#define EEPROM_ADDR_ERROR -5
#define SYSTICK_FREQ_HZ 12000000
#define EEPROM_TIMEOUT_MAX_MS_INV 200
/*
* Variables
*/
extern const uint32_t config_baudrates[];
extern const uint8_t config_baudrates_length;
/*
* Type definitions
*/
typedef struct
{
/* LED CONFIG */
uint8_t led_on;
uint16_t led_brightness;
uint8_t led_smooth;
uint16_t led_co2_alert_limit1;
uint16_t led_co2_alert_limit2;
/* SCD4x Temperature sensor offset */
int16_t scd4x_t_offset;
/* MODBUS CONFIG */
uint16_t modbus_addr;
uint32_t baudrate_index;
} config_t;
/* const uint32_t baudrates [] = {19200, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400, 57600, 76800, 115200}; */
int8_t config_read(config_t *config);
int8_t config_write(config_t *config);
#endif /* INC_CONFIG_H_ */

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/*
* crc.h
*
* Created on: Jun 9, 2021
* Author: user
*/
#ifndef INC_CRC8_H_
#define INC_CRC8_H_
#include "stdint.h"
/*
* Definitions & macros
*/
#define CRC8_POLYNOMIAL 0x31
#define CRC8_INIT 0xFF
uint8_t crc8_calculate(const uint8_t *data, uint16_t count);
#endif /* INC_CRC8_H_ */

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/*
* i2c.h
*
* Created on: Jun 8, 2021
* Author: user
*/
#ifndef INC_I2C_H_
#define INC_I2C_H_
#include "stdint.h"
#include "stm32l0xx_ll_i2c.h"
/*
* Defines & macros
*/
#define NULL 0
/*
* Return values for I2C functions
*/
#define I2C_OK 0
#define I2C_ERROR -1 // generic error
#define I2C_ERROR_NACK -2 // NACK was received during transfer
#define I2C_ERROR_TX_INCOMPLETE -3 // number of TXed bytes != buffer length
#define I2C_ERROR_RX_INCOMPLETE -4 // number of RXed bytes != buffer length
/*
* Type definitions
*/
typedef struct {
I2C_TypeDef *i2c;
} i2c_context_t;
/*
* Function declarations
*/
int i2c_init(i2c_context_t *context);
int i2c_transmit(uint8_t address, uint8_t *buffer, int len);
int i2c_receive(uint8_t address, uint8_t *buffer, int len);
#endif /* INC_I2C_H_ */

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l0xx_ll_i2c.h"
#include "stm32l0xx_ll_lpuart.h"
#include "stm32l0xx_ll_rcc.h"
#include "stm32l0xx_ll_crs.h"
#include "stm32l0xx_ll_bus.h"
#include "stm32l0xx_ll_system.h"
#include "stm32l0xx_ll_exti.h"
#include "stm32l0xx_ll_cortex.h"
#include "stm32l0xx_ll_utils.h"
#include "stm32l0xx_ll_pwr.h"
#include "stm32l0xx_ll_dma.h"
#include "stm32l0xx_ll_tim.h"
#include "stm32l0xx_ll_gpio.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "i2c.h"
#include "scd4x.h"
#include "sht4x.h"
#include "sps30.h"
#include "modbus.h"
#include "config.h"
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
int8_t uart_disable_interrupts(void);
int8_t uart_enable_interrupts(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define LED_B_Pin LL_GPIO_PIN_5
#define LED_B_GPIO_Port GPIOA
#define LED_G_Pin LL_GPIO_PIN_6
#define LED_G_GPIO_Port GPIOA
#define LED_R_Pin LL_GPIO_PIN_7
#define LED_R_GPIO_Port GPIOA
#ifndef NVIC_PRIORITYGROUP_0
#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,
4 bits for subpriority */
#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority,
3 bits for subpriority */
#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
2 bits for subpriority */
#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
1 bit for subpriority */
#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
0 bit for subpriority */
#endif
/* USER CODE BEGIN Private defines */
#define MEASUREMENT_PERIOD_MS 600000
extern uint16_t lpuart1_rx_message_index;
extern uint16_t lpuart1_rx_message_len;
extern uint8_t lpuart1_rx_done;
extern uint8_t lpuart1_rx_message_too_long;
extern uint8_t tim21_elapsed_period;
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/*
* modbus.h
*
* Created on: Jul 18, 2021
* Author: user
*
* Modbus slave RTU library (does NOT support ASCII and TCP)
*
* Useful links:
* https://www.picotech.com/library/oscilloscopes/modbus-serial-protocol-decoding
* https://ipc2u.com/articles/knowledge-base/modbus-rtu-made-simple-with-detailed-descriptions-and-examples/
* https://modbus.org/docs/Modbus_over_serial_line_V1_02.pdf
* https://www.modbus.org/docs/Modbus_Application_Protocol_V1_1b.pdf
*
* Note that byte order is big endian.
*
* USAGE:
*
* 1) Implement functions modbus_callback_function() and modbus_uart_transmit_function()
* - modbus_uart_transmit_function() sends data via UART
* - modbus_callback_function() does the real work: read sensors, set outputs...
* note that when filling buffers (e.g. input_registers[]) user must
* ensure that all data is big-endian
* These functions are implementation-specific.
* 2) Set device address (variable modbus_device_address); you can do this either
* - setting modbus_device_address directly (modbus.h needs to be included, duh)
* - using modbus_set_device_address(uint8_t address) function
* Or you can leave address as-is (MODBUS_DEFAULT_SLAVE_ADDRESS) and set it via
* Modbus during runtime
* 3) Call modbus_process_msg() after message reception; you need to observe Modbus RTU timing:
* - pauses between chars in frame are less or equal to 1.5 char
* - pauses between frames are at least 3.5 chars (of silence)
* For more information see section 2.5.1.1 (MODBUS Message RTU Framing)
* in "MODBUS over Serial Line: Specification and Implementation Guide"
*
*/
#ifndef SRC_MODBUS_H_
#define SRC_MODBUS_H_
#include "stdint.h"
/*
* Defines & macros
*/
#define MODBUS_BROADCAST_ADDR 0
#define MODBUS_DEFAULT_SLAVE_ADDRESS 254 /* 255 may be used for bridge device */
/* minimal frame length is 4 bytes: 1 B slave address, 1 B function code, 2 B CRC */
#define MODBUS_MINIMAL_FRAME_LEN 4
#define MODBUS_MAX_RTU_FRAME_SIZE 256
#define MODBUS_BUFFER_SIZE MODBUS_MAX_RTU_FRAME_SIZE /* alias */
#define MODBUS_ERROR_FLAG 0x80
#define MODBUS_MAX_REGISTERS 125
/*
* Return values
*/
#define MODBUS_OK 0
#define MODBUS_ERROR -1 // generic error
#define MODBUS_ERROR_CRC -2 // checksum failed
#define MODBUS_ERROR_FRAME_INVALID -3 // invalid frame format / length
#define MODBUS_ERROR_OUT_OF_BOUNDS -4 // requested register is out of bounds
#define MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED -5 // function not implemented in callback
#define MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED -6 // register not implemented in callback
/*
* Data types
*/
/* Public functions codes (Modbus Application protocol specification, section 5.1) */
typedef enum {
/* single bit access functions */
MODBUS_READ_COILS = 1,
MODBUS_READ_DO = 1, // alias
MODBUS_READ_DISCRETE_INPUTS = 2,
MODBUS_READ_DI = 2, // alias
MODBUS_WRITE_SINGLE_COIL = 5,
MODBUS_WRITE_SINGLE_DO = 5, // alias
MODBUS_WRITE_MULTIPLE_COILS = 15,
MODBUS_WRITE_MULTIPLE_DO = 15, // alias
/* 16-bit access functions */
MODBUS_READ_HOLDING_REGISTERS = 3,
MODBUS_READ_AO = 3, // alias
MODBUS_READ_INPUT_REGISTERS = 4,
MODBUS_READ_AI = 4, // alias
MODBUS_WRITE_SINGLE_REGISTER = 6,
MODBUS_WRITE_SINGLE_AO = 6, // alias
MODBUS_WRITE_MULTIPLE_REGISTERS = 16,
MODBUS_WRITE_MULTIPLE_AO = 16, // alias
MODBUS_MASK_WRITE_REGISTER = 22,
MODBUS_READ_WRITE_MULTIPLE_REGISTERS = 23,
MODBUS_READ_FIFO_QUEUE = 24,
/* file record access */
MODBUS_READ_FILE_RECORD = 20,
MODBUS_WRITE_FILE_RECORD = 21,
/* diagnostics */
MODBUS_READ_EXCEPTION_STATUS = 7,
MODBUS_DIAGNOSTIC = 8, /* sub codes: 00-18,20 */
MODBUS_GET_COM_EVENT_COUNTER = 11,
MODBUS_GET_COM_EVENT_LOG = 12,
MODBUS_REPORT_SLAVE_ID = 17,
MODBUS_READ_DEVICE_IDENTIFICATION = 43, /* sub codes: 14 */
} modbus_function_code_t;
typedef enum {
MODBUS_EXCEPTION_ILLEGAL_FUNCTION = 1,
MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS = 2,
MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY = 2,
MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE = 3,
MODBUS_EXCEPTION_SLAVE_DEVICE_FAILURE = 4,
MODBUS_EXCEPTION_ACKNOWLEDGE = 5,
MODBUS_EXCEPTION_SLAVE_DEVICE_BUSY = 6,
MODBUS_EXCEPTION_MEMORY_PARITY_ERROR = 8,
MODBUS_EXCEPTION_GATEWAY_PATH_UNAVAILABLE = 10,
MODBUS_EXCEPTION_GATEWAY_TARGET_DEVICE_FAILED_TO_RESPOND = 11,
} modbus_exception_code_t;
typedef struct {
uint8_t exception_code;
} exception_t;
typedef struct {
modbus_function_code_t function_code : 8;
uint16_t register_address; // e.g. first register of A0: 0
uint16_t register_number; // e.g. first register of A0: 40001
uint8_t register_count; // number of registers to be read/written
exception_t exception;
union {
uint8_t buffer8b[MODBUS_MAX_RTU_FRAME_SIZE];
uint16_t buffer16b[MODBUS_MAX_RTU_FRAME_SIZE/2];
uint16_t input_registers[MODBUS_MAX_REGISTERS];
uint16_t holding_registers[MODBUS_MAX_REGISTERS];
int16_t input_registers_signed[MODBUS_MAX_REGISTERS];
int16_t holding_registers_signed[MODBUS_MAX_REGISTERS];
};
} modbus_transaction_t;
typedef enum {
MODBUS_DO_START_NUMBER = 1, // Discrete output coils
MODBUS_DO_END_NUMBER = 9999,
MODBUS_DI_START_NUMBER = 10001, // Discrete input contacts
MODBUS_DI_END_NUMBER = 19999,
MODBUS_AI_START_NUMBER = 30001, // Analog input registers
MODBUS_AI_END_NUMBER = 39999,
MODBUS_AO_START_NUMBER = 40001, // Analog output (holding registers)
MODBUS_AO_END_NUMBER = 49999
} modbus_register_number_t;
/*
* Global variables
*/
/* device address: declared in modbus.c */
extern uint8_t modbus_slave_address;
/* shared modbus buffer; defined in modbus.c; may be used elsewhere in code */
extern uint8_t modbus_buffer[];
/*
* Function prototypes
*/
/* process message: should be called in when modbus message was received (e.g. in main.c)
* modbus_process_msg() may call following functions:
* - modbus_callback_function() if data readout is requested
* - modbus_uart_transmit_function() if response is required
* Both functions have to be implemented by user.
*/
int8_t modbus_slave_process_msg(const uint8_t *buffer, int len);
int8_t modbus_slave_set_address(uint8_t address);
/* modbus callback function type - should be implemented by user (e.g. in main.c) */
int8_t modbus_slave_callback(modbus_transaction_t *transaction);
/* UART transmit function type - should be implemented by user (e.g. in main.c) */
int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len);
#endif /* SRC_MODBUS_H_ */

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/*
* sht4x.h
*
* Created on: Jun 8, 2021
* Author: user
*/
#ifndef INC_SCD4X_H_
#define INC_SCD4X_H_
#include "stdint.h"
#include "stm32l0xx_ll_i2c.h"
#include "stm32l0xx_ll_utils.h"
#include "i2c.h"
#include "crc8.h"
/*
* Defines & macros
*/
#define SCD4X_I2C_ADDRESS 0x62
/*
* Return values
*/
#define SCD4X_OK 0
#define SCD4X_ERROR -1 // generic error
#define SCD4X_CRC8_ERROR -2 // checksum failed
/*
* Data types
*/
typedef enum {
SCD4X_START_PERIODIC_MEASUREMENT = 0x21B1,
SCD4X_READ_MEASUREMENT = 0xEC05,
SCD4X_STOP_PERIODIC_MEASUREMENT = 0x3F86,
SCD4X_GET_DATA_READY_STATUS = 0xe4b8,
SCD4X_PERFORM_FACTORY_RESET = 0x3632
} scd4x_cmd_t;
/*
* Function prototypes
*/
int8_t scd4x_send_cmd(scd4x_cmd_t cmd);
int8_t scd4x_read_data(uint8_t *buffer, int len);
int8_t scd4x_start_periodic_measurement( void );
int8_t scd4x_stop_periodic_measurement( void );
int8_t scd4x_perform_factory_reset( void );
int8_t scd4x_read_measurement(uint16_t * co2, int16_t *temperature, uint16_t *relative_humidity);
#endif /* INC_SCD4X_H_ */

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/*
* sht4x.h
*
* Created on: Jun 8, 2021
* Author: user
*/
#ifndef INC_SHT4X_H_
#define INC_SHT4X_H_
#include "stdint.h"
#include "stm32l0xx_ll_i2c.h"
#include "stm32l0xx_ll_utils.h"
#include "i2c.h"
#include "crc8.h"
/*
* Defines & macros
*/
#define SHT4X_I2C_ADDRESS 0x44
/*
* Return values
*/
#define SHT4X_OK 0
#define SHT4X_ERROR -1 // generic error
#define SHT4X_CRC8_ERROR -2 // checksum failed
/*
* Data types
*/
typedef enum {
SHT4X_START_MEAS_HIGH_PRECISION = 0xFD,
SHT4X_START_MEAS_MEDIUM_PRECISION = 0xF6,
SHT4X_START_MEAS_LOW_PRECISION = 0xE0,
SHT4X_READ_SERIAL = 0x89,
SHT4X_SOFT_RESET = 0x94,
SHT4X_HEATER_200_mW_1_s = 0x39,
SHT4X_HEATER_200_mW_01_s = 0x32,
SHT4X_HEATER_110_mW_1_s = 0x2F,
SHT4X_HEATER_110_mW_01_s = 0x24,
SHT4X_HEATER_20_mW_1_s = 0x1E,
SHT4X_HEATER_20_mW_01_s = 0x15
} sht4x_cmd_t;
/*
* Function prototypes
*/
int8_t sht4x_send_cmd(sht4x_cmd_t cmd);
int8_t sht4x_read_data(uint8_t *buffer, int len);
int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity);
#endif /* INC_SHT4X_H_ */

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/*
* sps30.h
*
* Created on: Jul 18, 2021
* Author: mrs
*/
#ifndef INC_SPS30_H_
#define INC_SPS30_H_
#include "stdint.h"
#include "stm32l0xx_ll_i2c.h"
#include "stm32l0xx_ll_utils.h"
#include "i2c.h"
#include "crc8.h"
/*
* Defines & macros
*/
#define SPS30_I2C_ADDRESS 0x69
/*
* Return values
*/
#define SPS30_OK 0
#define SPS30_ERROR -1 // generic error
#define SPS30_CRC8_ERROR -2 // checksum failed
/*
* Data types
*/
typedef enum {
SPS30_START_MEASUREMENT = 0x0010,
SPS30_STOP_MEASUREMENT = 0x0104,
SPS30_READ_DATA_READY_FLAG = 0x0202,
SPS30_READ_MEASURED_VALUES = 0x0300,
SPS30_SLEEP = 0x1001,
SPS30_WAKE_UP = 0x1103,
SPS30_START_FAN_CLEANING = 0x5607,
SPS30_READ_AUTO_CLEANING_INTERVAL = 0x8004,
SPS30_WRITE_AUTO_CLEANING_INTERVAL = 0x8004,
SPS30_READ_PRODUCT_TYPE = 0xD002,
SPS30_READ_SERIAL_NUMBER = 0xD033,
SPS30_READ_VERSION = 0xD100,
SPS30_READ_DEVICE_STATUS_REGISTER = 0xD206,
SPS30_CLEAR_DEVICE_STATUS_REGISTER = 0xD210,
SPS30_RESET = 0xD304
} sps30_cmd_t;
typedef enum {
SPS30_FLOAT_FORMAT = 0x03,
SPS30_UINT16_FORMAT = 0x05
} sps30_data_format;
int8_t sps30_send_cmd(sps30_cmd_t cmd);
int8_t sps30_start_measurement( void );
int8_t sps30_stop_measurement( void );
int8_t sps30_read_measured_values(uint16_t *measured_values, uint8_t measured_values_len);
int8_t sps30_sleep( void );
int8_t sps30_wake_up( void );
int8_t sps30_start_fan_cleaning( void );
int8_t sps30_reset( void );
int8_t sps30_read_status_register ( void );
int8_t sps30_read_firmware_version ( uint8_t * fw_ver_hi, uint8_t * fw_ver_lo );
uint8_t calculate_crc(uint8_t data[2]);
#endif /* INC_SPS30_H_ */

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/**
******************************************************************************
* @file stm32_assert.h
* @brief STM32 assert file.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l0xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L0xx_IT_H
#define __STM32L0xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void SVC_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void TIM21_IRQHandler(void);
void LPUART1_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L0xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/*
* config.c
*
* Created on: Sep 5, 2021
* Author: david
*/
#include "config.h"
/*
* Variables
*/
/* Baudrates - STM32L0xx can do baudrates from 1200 to 115200
* - default value has index 0 */
const uint32_t config_baudrates[] = {
19200, // 0
4800, // 1
9600, // 2
14400, // 3
19200, // 4
28800, // 5
38400, // 6
57600, // 7
76800, // 8
115200 // 9
};
const uint8_t config_baudrates_length = 10;
/* Function to lock the EEPROM */
static int8_t eeprom_lock(void);
/* Function to unlock the EEPROM */
static int8_t eeprom_unlock(void);
/* Function to write one byte to the EEPROM */
/* IMPORTANT: EEPROM must be unlocked first */
static int8_t eeprom_program_byte(uint32_t addr, uint8_t ee_data);
/* Function to write two bytes to the EEPROM */
/* IMPORTANT: EEPROM must be unlocked first */
static int8_t eeprom_program_halfword(uint32_t addr, uint16_t ee_data);
/* Function to write four bytes to the EEPROM */
/* IMPORTANT: EEPROM must be unlocked first */
static int8_t eeprom_program_word(uint32_t addr, uint32_t ee_data);
int8_t config_read(config_t *config)
{
config->modbus_addr = *(uint16_t *) (CONFIG_EEPROM_ADDR_MODBUS_ADDR);
config->baudrate_index = *(uint16_t *) (CONFIG_EEPROM_ADDR_BAUDRATE_INDEX);
config->led_on = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ON);
config->led_brightness = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_BRIGHTNESS);
config->led_smooth = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_SMOOTH);
config->led_co2_alert_limit1 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT1);
config->led_co2_alert_limit2 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT2);
config->scd4x_t_offset = *(int16_t *) (CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET);
/* Check if the EEPROM is initialized - do not check:
* LED ON
* LED SMOOTH
* SCD4x T OFFSET
* BAUDRATE INDEX
* those can be 0 */
if ((config->modbus_addr == EEPROM_EMPTY_BYTE) ||
(config->led_co2_alert_limit1 == EEPROM_EMPTY_BYTE) ||
(config->led_co2_alert_limit2 == EEPROM_EMPTY_BYTE) ||
(config->led_brightness == EEPROM_EMPTY_BYTE))
{
return CONFIG_ERROR;
}
return CONFIG_OK;
}
int8_t config_write(config_t *config)
{
/* Unlock the EEPROM */
if (eeprom_unlock() != EEPROM_OK)
{
return EEPROM_UNLOCK_ERROR;
}
/* Reset the ERASE and DATA bits in the FLASH_PECR register to disable any residual erase */
FLASH->PECR = FLASH->PECR & ~(FLASH_PECR_ERASE | FLASH_PECR_DATA);
/* Write MODBUS ADDRESS */
if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_MODBUS_ADDR, config->modbus_addr) != EEPROM_OK)
{
return EEPROM_WRITE_ERROR;
}
/* Write BAUDRATE */
if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_BAUDRATE_INDEX, config->baudrate_index) != EEPROM_OK)
{
return EEPROM_WRITE_ERROR;
}
/* Write LED ON */
if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_ON, config->led_on) != EEPROM_OK)
{
return EEPROM_WRITE_ERROR;
}
/* Write LED BRIGHTNESS */
if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_BRIGHTNESS, config->led_brightness) != EEPROM_OK)
{
return EEPROM_WRITE_ERROR;
}
/* Write LED SMOOTH */
if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_SMOOTH, config->led_smooth) != EEPROM_OK)
{
return EEPROM_WRITE_ERROR;
}
/* Write LED CO2 ALERT LIMIT 1 */
if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT1, config->led_co2_alert_limit1) != EEPROM_OK)
{
return EEPROM_WRITE_ERROR;
}
/* Write LED CO2 ALERT LIMIT 2 */
if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT2, config->led_co2_alert_limit2) != EEPROM_OK)
{
return EEPROM_WRITE_ERROR;
}
/* Write LED SCD4x TEMPERATURE OFFSET */
if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET, config->scd4x_t_offset) != EEPROM_OK)
{
return EEPROM_WRITE_ERROR;
}
/* Lock EEPROM*/
if (eeprom_lock() != EEPROM_OK)
{
return EEPROM_LOCK_ERROR;
}
return CONFIG_OK;
}
static int8_t eeprom_lock(void)
{
uint32_t tick_start = SysTick->VAL;
while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
{
/* Timeout test */
/* The maximum writing time is 3.94ms (half-word) */
uint32_t tick_last = SysTick->VAL;
uint32_t tick_diff;
if (tick_start <= tick_last)
{
tick_diff = tick_last - tick_start;
} else
{
tick_diff = (0xFFFFFFFF - tick_last) + tick_start;
}
/* If the time difference is more than 5ms */
if (tick_diff >= (uint32_t)((uint32_t)SYSTICK_FREQ_HZ*(uint32_t)EEPROM_TIMEOUT_MAX_MS_INV))
{
return EEPROM_LOCK_ERROR;
}
}
FLASH->PECR = FLASH->PECR & ~(FLASH_PECR_ERRIE | FLASH_PECR_EOPIE); /* disable flash interrupts */
FLASH->PECR = FLASH->PECR | FLASH_PECR_PELOCK; /* Lock memory with PELOCK */
return EEPROM_OK;
}
static int8_t eeprom_unlock(void)
{
uint32_t tick_start = SysTick->VAL;
while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
{
/* Timeout test */
/* The maximum writing time is 3.94ms (half-word) */
uint32_t tick_last = SysTick->VAL;
uint32_t tick_diff;
if (tick_start <= tick_last)
{
tick_diff = tick_last - tick_start;
} else
{
tick_diff = (0xFFFFFFFF - tick_last) + tick_start;
}
/* If the time difference is more than 5ms */
if (tick_diff >= (uint32_t)((uint32_t)SYSTICK_FREQ_HZ*(uint32_t)EEPROM_TIMEOUT_MAX_MS_INV))
{
return EEPROM_UNLOCK_ERROR;
}
}
if ((FLASH->PECR & FLASH_PECR_PELOCK) != 0) /* If PELOCK is locked */
{
/* Unlock PELOCK */
FLASH->PEKEYR = FLASH_PEKEY1; /* PEKEY1 */
FLASH->PEKEYR = FLASH_PEKEY2; /* PEKEY2 */
}
FLASH->PECR = FLASH->PECR | (FLASH_PECR_ERRIE | FLASH_PECR_EOPIE); /* enable flash interrupts */
return EEPROM_OK;
}
static int8_t eeprom_program_byte(uint32_t addr, uint8_t ee_data)
{
if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 1))
{
*(uint8_t *)(addr) = ee_data; /* write data to EEPROM */
if (*(uint8_t *)(addr) != ee_data)
{
return EEPROM_WRITE_ERROR;
}
return EEPROM_OK;
} else
{
return EEPROM_ADDR_ERROR;
}
}
static int8_t eeprom_program_halfword(uint32_t addr, uint16_t ee_data)
{
if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 2))
{
*(uint16_t *)(addr) = ee_data; /* write data to EEPROM */
if (*(uint16_t *)(addr) != ee_data)
{
return EEPROM_WRITE_ERROR;
}
return EEPROM_OK;
} else
{
return EEPROM_ADDR_ERROR;
}
}
static int8_t eeprom_program_word(uint32_t addr, uint32_t ee_data)
{
if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 4))
{
*(uint32_t *)(addr) = ee_data; /* write data to EEPROM */
if (*(uint32_t *)(addr) != ee_data)
{
return EEPROM_WRITE_ERROR;
}
return EEPROM_OK;
} else
{
return EEPROM_ADDR_ERROR;
}
}

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/*
* crc.c
*
* Created on: Jun 9, 2021
* Author: user
*/
#include "crc8.h"
/* Stolen from Sensirion SCD4x datasheet, section 3.11 */
uint8_t crc8_calculate(const uint8_t *data, uint16_t count)
{
uint16_t current_byte;
uint8_t crc = CRC8_INIT;
uint8_t crc_bit;
/* calculates 8-Bit checksum with given polynomial */
for (current_byte = 0; current_byte < count; ++current_byte) {
crc ^= (data[current_byte]);
for(crc_bit = 8; crc_bit > 0; --crc_bit) {
if (crc & 0x80) {
crc =(crc << 1) ^ CRC8_POLYNOMIAL;
} else {
crc = (crc << 1);
}
}
}
return crc;
}

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/*
* i2c.c
*
* Created on: Jun 8, 2021
* Author: user
*/
#include "i2c.h"
#include "stm32l0xx_ll_lpuart.h"
i2c_context_t *i2c_context;
int i2c_init(i2c_context_t *context)
{
if (context == NULL) {
return I2C_ERROR;
}
i2c_context = context;
return I2C_OK;
}
int i2c_transmit(uint8_t address, uint8_t *buffer, int len)
{
/* prevent interrupts during I2C communication (e.g. collision with MODBUS) */
// LL_LPUART_Disable(LPUART1);
// LL_LPUART_DisableIT_RXNE(LPUART1);
// __disable_irq();
LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_WRITE);
int i = 0;
// Autoend mode will raise STOP flag if NACK is detected
// (or if desired number of bytes is transmitted)
while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
if (LL_I2C_IsActiveFlag_TXE(i2c_context->i2c)) {
if (i < len) {
LL_I2C_TransmitData8(i2c_context->i2c, buffer[i++]);
}
}
}
LL_I2C_ClearFlag_STOP(i2c_context->i2c);
if (LL_I2C_IsActiveFlag_NACK(i2c_context->i2c)) {
return I2C_ERROR_NACK;
}
if (len != i) {
// this will probably never happen, as NACK flag
// is raised everytime len != number of TXed bytes
return I2C_ERROR_TX_INCOMPLETE;
}
// __enable_irq();
// LL_LPUART_Enable(LPUART1);
// LL_LPUART_EnableIT_RXNE(LPUART1);
return I2C_OK;
}
int i2c_receive(uint8_t address, uint8_t *buffer, int len)
{
// __disable_irq();
// LL_LPUART_Disable(LPUART1);
// LL_LPUART_DisableIT_RXNE(LPUART1);
LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_READ);
int i = 0;
while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
if (LL_I2C_IsActiveFlag_RXNE(i2c_context->i2c)) {
if (i < len) {
buffer[i++] = LL_I2C_ReceiveData8(i2c_context->i2c);
}
}
}
LL_I2C_ClearFlag_STOP(i2c_context->i2c);
if (len != i) {
return I2C_ERROR_RX_INCOMPLETE;
}
// __enable_irq();
// LL_LPUART_Enable(LPUART1);
// LL_LPUART_EnableIT_RXNE(LPUART1);
return I2C_OK; // TODO error detection
}

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/*
* BASE CLOCK 12MHz
* Desired interrupt period 60s
*/
const uint16_t tim21_prescaler = 60000-1; // 100Hz
//const uint16_t tim21_period = 12000-1; // 60s
const uint16_t tim21_period = 1200-1; // 6s
//const uint16_t tim21_period = 200-1; // 1s
/* Input register memory map
* (All registers are 16-bit)
* -------------------------
*
* 30010 : CO2 [ppm] Unsigned value in range [0,40000]
* 30011 : T [deg_C * 10] From SHT4x; unsigned value in range [0; 1250]; e.g. 21.5 C => 215
* 30012 : RH [%] From SHT4x; unsigned value in range [0; 100]
*
* Backup T and RH sensor:
* 30013 : T [deg_C * 10] From SCD4x; unsigned value in range [0; 600]; e.g. 21.5 C => 215
* 30014 : RH [%] From SCD4x; unsigned value in range [0; 100]
*
* Extended temperature range (signed values):
* 30015 : T [deg_C * 10] From SHT4x; signed value (two's complement) in range [-400;1250]
* 30016 : T [deg_C * 10] From SCD4x; signed value (two's complement) in range [-100;600]; e.g. -12.3 C => -123
*
*/
/* Input registers memory map implementation */
enum
{
REGISTER_NUM_CO2 = 30010,
REGISTER_NUM_T_SHT4x = 30011,
REGISTER_NUM_RH_SHT4x = 30012,
REGISTER_NUM_T_SCD4x = 30013,
REGISTER_NUM_RH_SCD4x = 30014,
REGISTER_NUM_T_SHT4x_SIGNED = 30015,
REGISTER_NUM_T_SCD4x_SIGNED = 30016
} data_registers_numbers;
enum
{
REGISTER_NUM_LED_ON = 40001,
REGISTER_NUM_LED_BRIGHTNESS = 40002,
REGISTER_NUM_LED_SMOOTH = 40003,
REGISTER_NUM_CO2_ALERT_LIMIT1 = 40004,
REGISTER_NUM_CO2_ALERT_LIMIT2 = 40005,
REGISTER_NUM_SCD4x_T_OFFSET = 40006,
REGISTER_NUM_MODBUS_ADDR = 40007,
REGISTER_NUM_BAUDRATE = 40008
} config_registers_numbers;
enum
{
REGISTER_NUM_VENDOR_NAME = 30010,
REGISTER_NUM_PRODUCT_CODE = 30011,
REGISTER_NUM_REVISION = 30012,
REGISTER_NUM_PRODUCT_NAME = 30013,
REGISTER_NUM_SERIAL_NUMBER = 30014
} identification_registers_numbers;
/* Variables to store the measured data */
int CO2, T_SCD4x, RH_SCD4x;
int T_SHT4x, RH_SHT4x;
uint16_t sps30_measured_data[10];
/* Struct to store the sensor config */
config_t sensor_config;
uint8_t sensor_config_pending_write = 0;
uint8_t baudrate_changed = 0;
uint8_t modbus_address_changed = 0;
uint8_t co2_valid = 0;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_I2C1_Init(void);
static void MX_LPUART1_UART_Init(void);
static void MX_TIM21_Init(void);
/* USER CODE BEGIN PFP */
void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len);
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
/* System interrupt init*/
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* Read config from EEPROM - if unsuccessful, set the default values*/
int8_t config_read_status = config_read(&sensor_config);
if (config_read_status != CONFIG_OK)
{
sensor_config.modbus_addr = MODBUS_DEFAULT_SLAVE_ADDRESS;
sensor_config.led_co2_alert_limit1 = CONFIG_DEFAULT_LED_ALERT1_LIMIT;
sensor_config.led_co2_alert_limit2 = CONFIG_DEFAULT_LED_ALERT2_LIMIT;
sensor_config.led_on = CONFIG_DEFAULT_LED_ON;
sensor_config.led_brightness = CONFIG_DEFAULT_LED_BRIGHTNESS;
sensor_config.led_smooth = CONFIG_DEFAULT_LED_SMOOTH;
sensor_config.scd4x_t_offset = CONFIG_DEFAULT_SCD4x_T_OFFSET;
sensor_config.baudrate_index = CONFIG_DEFAULT_BAUDRATE_INDEX;
}
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_I2C1_Init();
MX_LPUART1_UART_Init();
MX_TIM21_Init();
/* USER CODE BEGIN 2 */
/* Turn on MAGENTA LED to signal startup state */
LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
/* Enable I2C for sensors */
LL_I2C_Enable(I2C1);
/* Set the modbus address */
modbus_slave_set_address(sensor_config.modbus_addr);
/* Enable UART for RS485 */
LL_LPUART_Enable(LPUART1);
/* Start the timer for measurement triggering */
LL_TIM_EnableCounter(TIM21);
LL_TIM_EnableIT_UPDATE(TIM21);
/* I2C context init (for SHT4x and SCD4x) */
i2c_context_t i2c_context;
i2c_context.i2c = I2C1;
i2c_init(&i2c_context);
scd4x_start_periodic_measurement();
uint8_t scd4x_is_connected = 1;
uint8_t sps30_is_connected = 0;
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
/*uint8_t scd4x_is_connected = 0;
if (scd4x_start_periodic_measurement() == SCD4X_OK)
{
scd4x_is_connected = 1;
}*/
/* Attempt to start SPS30 measurement and check if it's connected */
/*sps30_reset();
uint8_t sps30_is_connected = 0;
if (sps30_start_measurement() == SPS30_OK)
{
sps30_is_connected = 1;
}*/
/* Wait 1000ms for sensors initialization */
/* SHT4x Init Time: max 1 ms (datasheet pg. 8) */
/* SCD4x Init Time: max 1000 ms (datasheet pg. 6) */
/* SPS30 Init Time: max 30000 ms (datasheet pg. 2) */
LL_mDelay(1000);
static uint32_t new_baud;
/* Enter the main loop */
while (1)
{
if (lpuart1_rx_done == 1)
{
/* Process the message */
if (lpuart1_rx_message_too_long)
{
/* Do nothing, just delete the buffer and set the flag back to zero*/
lpuart1_rx_message_too_long = 0;
} else
{
/* Process the message:
* message is stored in modbus_buffer[], no copying necessary;
* but we need to make sure that modbus_buffer[] will not be used while
* processing the message: this can be done by disabling RX interrupt */
LL_LPUART_DisableIT_RXNE(LPUART1);
modbus_slave_process_msg(modbus_buffer, lpuart1_rx_message_len);
/* Reset the RX DONE flag */
lpuart1_rx_done = 0;
LL_LPUART_EnableIT_RXNE(LPUART1);
}
/* Reset the RX DONE flag */
lpuart1_rx_done = 0;
}
/* if config changed (MODBUS write), reflect changes to EEPROM */
if (sensor_config_pending_write) {
config_write(&sensor_config);
sensor_config_pending_write = 0;
}
if (modbus_address_changed)
{
modbus_slave_set_address(sensor_config.modbus_addr);
modbus_address_changed = 0;
}
if (baudrate_changed)
{
while (!LL_LPUART_IsActiveFlag_TXE(LPUART1));
uart_disable_interrupts();
// LL_LPUART_Disable(LPUART1);
// LL_LPUART_DisableIT_IDLE(LPUART1);
// LL_LPUART_EnableIT_RXNE(LPUART1);
LL_LPUART_SetBaudRate(LPUART1, SYSTICK_FREQ_HZ, config_baudrates[sensor_config.baudrate_index]);
// LL_LPUART_Enable(LPUART1);
// LL_LPUART_EnableIT_IDLE(LPUART1);
// LL_LPUART_EnableIT_RXNE(LPUART1);
uart_enable_interrupts();
LL_LPUART_EnableDirectionRx(LPUART1);
LL_LPUART_EnableDirectionTx(LPUART1);
baudrate_changed = 0;
new_baud = LL_LPUART_GetBaudRate(LPUART1, SYSTICK_FREQ_HZ);
}
/* It is time for measurement */
if (tim21_elapsed_period == 1)
{
/* TODO: Check the data */
/* Read SHT4x data (always connected) */
sht4x_measure(&T_SHT4x, &RH_SHT4x);
/* Read SCD4x data (if connected) */
if (scd4x_is_connected == 1)
{
scd4x_read_measurement(&CO2,
&T_SCD4x,
&RH_SCD4x);
if (CO2 > 0) {
co2_valid = 1;
} else {
co2_valid = 0;
}
}
/* Read SPS30 data (if connected) */
if (sps30_is_connected == 1)
{
sps30_read_measured_values(sps30_measured_data, 10);
}
/* TODO: Process data and light a desired color of LED */
/* TODO: Add hystheresis */
/* Reset the TIM21 Elapsed Period Flag */
tim21_elapsed_period = 0;
}
/* TEST END */
if (sensor_config.led_on) {
if (co2_valid == 1) {
if (CO2 <= sensor_config.led_co2_alert_limit1) {
/* CO2 is OK -> GREEN */
LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
} else if ((sensor_config.led_co2_alert_limit1 < CO2) && (CO2 <= sensor_config.led_co2_alert_limit2)) {
/* CO2 is NOT OK -> YELLOW */
LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
} else if (sensor_config.led_co2_alert_limit2 < CO2) {
/* CO2 is CRITICAL -> RED */
LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
}
} else {
LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
}
} else {
LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
}
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_0)
{
}
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
LL_RCC_HSI_Enable();
/* Wait till HSI is ready */
while(LL_RCC_HSI_IsReady() != 1)
{
}
LL_RCC_HSI_SetCalibTrimming(16);
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLL_MUL_3, LL_RCC_PLL_DIV_4);
LL_RCC_PLL_Enable();
/* Wait till PLL is ready */
while(LL_RCC_PLL_IsReady() != 1)
{
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
/* Wait till System clock is ready */
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
}
LL_Init1msTick(12000000);
LL_SetSystemCoreClock(12000000);
LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1);
LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1);
}
/**
* @brief I2C1 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C1_Init(void)
{
/* USER CODE BEGIN I2C1_Init 0 */
/* USER CODE END I2C1_Init 0 */
LL_I2C_InitTypeDef I2C_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
/**I2C1 GPIO Configuration
PA9 ------> I2C1_SCL
PA10 ------> I2C1_SDA
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
/** I2C Initialization
*/
LL_I2C_EnableAutoEndMode(I2C1);
LL_I2C_DisableOwnAddress2(I2C1);
LL_I2C_DisableGeneralCall(I2C1);
LL_I2C_EnableClockStretching(I2C1);
I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C;
I2C_InitStruct.Timing = 0x40000A0B;
I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
I2C_InitStruct.DigitalFilter = 0;
I2C_InitStruct.OwnAddress1 = 0;
I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK;
I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
LL_I2C_Init(I2C1, &I2C_InitStruct);
LL_I2C_SetOwnAddress2(I2C1, 0, LL_I2C_OWNADDRESS2_NOMASK);
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
/**
* @brief LPUART1 Initialization Function
* @param None
* @retval None
*/
static void MX_LPUART1_UART_Init(void)
{
/* USER CODE BEGIN LPUART1_Init 0 */
/* USER CODE END LPUART1_Init 0 */
LL_LPUART_InitTypeDef LPUART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
/**LPUART1 GPIO Configuration
PA0-CK_IN ------> LPUART1_RX
PA1 ------> LPUART1_TX
PB1 ------> LPUART1_DE
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_0;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* LPUART1 interrupt Init */
NVIC_SetPriority(LPUART1_IRQn, 0);
NVIC_EnableIRQ(LPUART1_IRQn);
/* USER CODE BEGIN LPUART1_Init 1 */
/* USER CODE END LPUART1_Init 1 */
LPUART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index];
LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_9B;
LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1;
LPUART_InitStruct.Parity = LL_LPUART_PARITY_EVEN;
LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX;
LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE;
LL_LPUART_Init(LPUART1, &LPUART_InitStruct);
LL_LPUART_EnableDEMode(LPUART1);
LL_LPUART_SetDESignalPolarity(LPUART1, LL_LPUART_DE_POLARITY_HIGH);
LL_LPUART_SetDEAssertionTime(LPUART1, 0);
LL_LPUART_SetDEDeassertionTime(LPUART1, 0);
/* USER CODE BEGIN LPUART1_Init 2 */
/* Enable IDLE Interrupt */
LL_LPUART_EnableIT_IDLE(LPUART1);
/* Enable RX Not Empty Interrupt */
LL_LPUART_EnableIT_RXNE(LPUART1);
LL_LPUART_EnableDirectionRx(LPUART1);
LL_LPUART_EnableDirectionTx(LPUART1);
LL_LPUART_Enable(LPUART1);
/* USER CODE END LPUART1_Init 2 */
}
/**
* @brief TIM21 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM21_Init(void)
{
/* USER CODE BEGIN TIM21_Init 0 */
/* USER CODE END TIM21_Init 0 */
LL_TIM_InitTypeDef TIM_InitStruct = {0};
/* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM21);
/* TIM21 interrupt Init */
NVIC_SetPriority(TIM21_IRQn, 0);
NVIC_EnableIRQ(TIM21_IRQn);
/* USER CODE BEGIN TIM21_Init 1 */
/* USER CODE END TIM21_Init 1 */
TIM_InitStruct.Prescaler = tim21_prescaler;
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct.Autoreload = tim21_period;
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
LL_TIM_Init(TIM21, &TIM_InitStruct);
LL_TIM_EnableARRPreload(TIM21);
LL_TIM_SetClockSource(TIM21, LL_TIM_CLOCKSOURCE_INTERNAL);
LL_TIM_SetTriggerOutput(TIM21, LL_TIM_TRGO_RESET);
LL_TIM_DisableMasterSlaveMode(TIM21);
/* USER CODE BEGIN TIM21_Init 2 */
/* USER CODE END TIM21_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
/**/
LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
/**/
LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
/**/
LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
/**/
GPIO_InitStruct.Pin = LED_B_Pin;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
LL_GPIO_Init(LED_B_GPIO_Port, &GPIO_InitStruct);
/**/
GPIO_InitStruct.Pin = LED_G_Pin;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
LL_GPIO_Init(LED_G_GPIO_Port, &GPIO_InitStruct);
/**/
GPIO_InitStruct.Pin = LED_R_Pin;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
LL_GPIO_Init(LED_R_GPIO_Port, &GPIO_InitStruct);
}
/* USER CODE BEGIN 4 */
void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len)
{
__disable_irq();
for (uint16_t i = 0; i < buffer_tx_len; i++)
{
LL_LPUART_TransmitData9(LPUART1, buffer_tx[i]);
while (!LL_LPUART_IsActiveFlag_TXE(LPUART1));
}
__enable_irq();
}
int8_t uart_disable_interrupts(void)
{
LL_LPUART_Disable(LPUART1);
LL_LPUART_DisableIT_IDLE(LPUART1);
LL_LPUART_EnableIT_RXNE(LPUART1);
return 0;
}
int8_t uart_enable_interrupts(void)
{
LL_LPUART_Enable(LPUART1);
LL_LPUART_EnableIT_IDLE(LPUART1);
LL_LPUART_EnableIT_RXNE(LPUART1);
return 0;
}
int8_t modbus_slave_callback(modbus_transaction_t *transaction)
{
uint16_t register_number = transaction->register_number;
switch (transaction->function_code)
{
case MODBUS_READ_INPUT_REGISTERS:
for (int i = 0; i < transaction->register_count; i++, register_number++)
{
switch (register_number)
{
case REGISTER_NUM_CO2:
transaction->input_registers[i] = (uint16_t)CO2;
break;
case REGISTER_NUM_T_SHT4x:
transaction->input_registers[i] = (uint16_t)T_SHT4x;
break;
case REGISTER_NUM_RH_SHT4x:
transaction->input_registers[i] = (uint16_t)RH_SHT4x;
break;
case REGISTER_NUM_T_SCD4x:
transaction->input_registers[i] = (uint16_t)T_SCD4x;
break;
case REGISTER_NUM_RH_SCD4x:
transaction->input_registers[i] = (uint16_t)RH_SCD4x;
break;
case REGISTER_NUM_T_SHT4x_SIGNED:
transaction->input_registers_signed[i] = (int16_t)T_SHT4x;
break;
case REGISTER_NUM_T_SCD4x_SIGNED:
transaction->input_registers_signed[i] = (int16_t)T_SCD4x;
break;
default:
return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
}
}
return MODBUS_OK;
case MODBUS_READ_HOLDING_REGISTERS:
for (int i = 0; i < transaction->register_count; i++, register_number++)
{
switch (register_number)
{
case REGISTER_NUM_LED_ON:
transaction->holding_registers[i] = (uint16_t)(sensor_config.led_on);
break;
case REGISTER_NUM_LED_BRIGHTNESS:
transaction->holding_registers[i] = (uint16_t)(sensor_config.led_brightness);
break;
case REGISTER_NUM_LED_SMOOTH:
transaction->holding_registers[i] = (uint16_t)(sensor_config.led_smooth);
break;
case REGISTER_NUM_CO2_ALERT_LIMIT1:
transaction->holding_registers[i] = (uint16_t)(sensor_config.led_co2_alert_limit1);
break;
case REGISTER_NUM_CO2_ALERT_LIMIT2:
transaction->holding_registers[i] = (uint16_t)(sensor_config.led_co2_alert_limit2);
break;
case REGISTER_NUM_SCD4x_T_OFFSET:
transaction->holding_registers[i] = (uint16_t)(sensor_config.scd4x_t_offset);
break;
case REGISTER_NUM_MODBUS_ADDR:
transaction->holding_registers[i] = (uint16_t)(sensor_config.modbus_addr);
break;
case REGISTER_NUM_BAUDRATE:
transaction->holding_registers[i] = (uint16_t)(sensor_config.baudrate_index);
break;
default:
return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
}
}
return MODBUS_OK;
case MODBUS_WRITE_SINGLE_REGISTER:
transaction->register_count = 1;
case MODBUS_WRITE_MULTIPLE_REGISTERS:
for (int i = 0; i < transaction->register_count; i++, register_number++)
{
switch (register_number)
{
case REGISTER_NUM_LED_ON:
sensor_config.led_on = (uint8_t) transaction->holding_registers[i];
break;
case REGISTER_NUM_LED_BRIGHTNESS:
sensor_config.led_brightness = (uint16_t) transaction->holding_registers[i];
break;
case REGISTER_NUM_LED_SMOOTH:
sensor_config.led_smooth = (uint16_t) transaction->holding_registers[i];
break;
case REGISTER_NUM_CO2_ALERT_LIMIT1:
sensor_config.led_co2_alert_limit1 = (uint16_t) transaction->holding_registers[i];
break;
case REGISTER_NUM_CO2_ALERT_LIMIT2:
sensor_config.led_co2_alert_limit2 = (uint16_t) transaction->holding_registers[i];
break;
case REGISTER_NUM_SCD4x_T_OFFSET:
sensor_config.scd4x_t_offset = (int16_t) transaction->holding_registers[i];
break;
case REGISTER_NUM_MODBUS_ADDR:
sensor_config.modbus_addr = (uint16_t) transaction->holding_registers[i];
modbus_address_changed = 1;
break;
case REGISTER_NUM_BAUDRATE:
if (transaction->holding_registers[0] < config_baudrates_length)
{
sensor_config.baudrate_index = (uint16_t) (transaction->holding_registers[i]);
baudrate_changed = 1;
}
break;
default:
return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
}
}
sensor_config_pending_write = 1;
return MODBUS_OK;
default:
return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
}
/* Catch-all error */
return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; /* nothing implemented yet! TODO */
}
int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len)
{
/* TODO */
LPUART1_TX_Buffer(buffer, data_len);
return MODBUS_OK;
}
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/*
* modbus.c
*
* Created on: Jul 18, 2021
* Author: user
*/
#include "modbus.h"
/*
* Global variables
*/
/* Modbus TX buffer; can be also used for RX in memory constrained systems (e.g. in main.c);
* NOTE if shared buffer is used for TX/RX, care must be taken to prevent writing into buffer
* during execution of modbus_process_message() */
uint8_t modbus_buffer[MODBUS_MAX_RTU_FRAME_SIZE];
/* device address: declared */
uint8_t modbus_slave_address = MODBUS_DEFAULT_SLAVE_ADDRESS;
/*
* CRC16 functions
* see https://modbus.org/docs/Modbus_over_serial_line_V1_02.pdf
* section 6.2.2
*/
/* CRC16 (without memory mapped values)
* taken from https://ctlsys.com/support/how_to_compute_the_modbus_rtu_message_crc/ */
uint16_t modbus_CRC16(const uint8_t *buf, int len)
{
uint16_t crc = 0xFFFF;
for (int pos = 0; pos < len; pos++) {
crc ^= (uint16_t)buf[pos]; // XOR byte into least sig. byte of crc
for (int i = 8; i != 0; i--) { // Loop over each bit
if ((crc & 0x0001) != 0) { // If the LSB is set
crc >>= 1; // Shift right and XOR 0xA001
crc ^= 0xA001;
} else { // Else LSB is not set
crc >>= 1; // Just shift right
}
}
}
// Note, this number has low and high bytes swapped, so use it accordingly (or swap bytes)
return crc;
}
/*
* Private functions
*/
/* here we assume buffer has minimal size of MODBUS_MAX_RTU_FRAME_SIZE;
* this function is private, so hopefully it's going to be ok */
int8_t modbus_copy_reply_to_buffer(uint8_t *buffer, uint8_t *msg_len, modbus_transaction_t *transaction)
{
uint16_t crc16;
uint8_t byte_count;
// TODO use relative indices (increments) instead of absolute
buffer[0] = modbus_slave_address;
buffer[1] = transaction->function_code;
*msg_len = 5;
if (transaction->function_code & MODBUS_ERROR_FLAG) {
/* sending error reply */
buffer[2] = transaction->exception.exception_code;
} else {
switch (transaction->function_code) {
case MODBUS_READ_HOLDING_REGISTERS:
case MODBUS_READ_INPUT_REGISTERS:
byte_count = transaction->register_count * 2;
buffer[2] = byte_count;
*msg_len = byte_count + 5;
for (int i = 0; i < transaction->register_count; i++) {
// TODO endianness handling
/* buffer16b is alias for both holding and input register buffers */
buffer[3 + 2*i] = transaction->buffer16b[i] >> 8;
buffer[4 + 2*i] = transaction->buffer16b[i] & 0xff;
}
break;
case MODBUS_WRITE_SINGLE_REGISTER:
buffer[2] = (uint8_t) (transaction->register_address >> 8);
buffer[3] = (uint8_t) transaction->register_address;
buffer[4] = (uint8_t) (transaction->holding_registers[0] >> 8);
buffer[5] = (uint8_t) transaction->holding_registers[0];
*msg_len = 8;
break;
case MODBUS_WRITE_MULTIPLE_REGISTERS:
buffer[2] = (uint8_t) (transaction->register_address >> 8);
buffer[3] = (uint8_t) transaction->register_address;
buffer[4] = (uint8_t) (transaction->register_count >> 8);
buffer[5] = (uint8_t) transaction->register_count;
*msg_len = 8;
break;
}
}
crc16 = modbus_CRC16(buffer, *msg_len - 2); /* last two bytes is the checksum itself */
buffer[*msg_len - 2] = crc16 & 0xff;
buffer[*msg_len - 1] = crc16 >> 8;
}
/*
* Public function definitions
*/
int8_t modbus_slave_set_address(uint8_t address)
{
if (address == 0) {
/* address 0 is broadcast address */
return MODBUS_ERROR;
}
modbus_slave_address = address;
return MODBUS_OK;
}
int8_t modbus_slave_process_msg(const uint8_t *buffer, int len)
{
/*
* TODO list:
*
* 1) check that errors and exceptions are handled according to Modbus_Application_Protocol_V1_1b.pdf
* 2) buffer overflow prevention: for each function code, check that buffer is long enough
*/
/* transaction holds message context and content:
* it wraps all necessary buffers and variables */
modbus_transaction_t transaction;
int8_t callback_result;
uint8_t buffer_pos = 0;
uint8_t byte_count;
if (len < MODBUS_MINIMAL_FRAME_LEN) {
/* frame too short; return error */
return MODBUS_ERROR_FRAME_INVALID;
}
/* check CRC first */
uint16_t crc_received = (buffer[len - 1] << 8) | buffer[len - 2];
uint16_t crc_calculated = modbus_CRC16(buffer, len - 2);
if (crc_received != crc_calculated) {
/* CRC mismatch, return error */
//printf("crc mismatch: received 0x%x, calculated 0x%x\n", crc_received, crc_calculated);
return MODBUS_ERROR_CRC;
}
/* check if address matches ours */
uint8_t address = buffer[buffer_pos++];
if (address != modbus_slave_address && address != MODBUS_BROADCAST_ADDR) {
/* Message is not for us */
return MODBUS_OK;
}
/* get function code */
transaction.function_code = buffer[buffer_pos++];
transaction.exception.exception_code = 0;
if (transaction.function_code == MODBUS_READ_DEVICE_IDENTIFICATION) {
// TODO
goto modbus_send;
}
/* set starting register number */
switch (transaction.function_code) {
/* coils */
case MODBUS_READ_DO:
case MODBUS_WRITE_SINGLE_DO:
case MODBUS_WRITE_MULTIPLE_DO:
transaction.register_number = MODBUS_DO_START_NUMBER;
break;
/* discrete inputs */
case MODBUS_READ_DI:
transaction.register_number = MODBUS_DI_START_NUMBER;
break;
/* input registers */
case MODBUS_READ_AI:
transaction.register_number = MODBUS_AI_START_NUMBER;
break;
/* holding registers */
case MODBUS_READ_AO:
case MODBUS_WRITE_SINGLE_AO:
case MODBUS_WRITE_MULTIPLE_AO:
case MODBUS_READ_WRITE_MULTIPLE_REGISTERS:
transaction.register_number = MODBUS_AO_START_NUMBER;
break;
}
#define MODBUS_FLAG_WRITE 0x01
#define MODBUS_FLAG_SINGLE 0x02
uint8_t flags = 0x00;
/* process message */
switch (transaction.function_code) {
case MODBUS_WRITE_SINGLE_COIL:
case MODBUS_WRITE_SINGLE_REGISTER: /* holding register */
flags |= MODBUS_FLAG_SINGLE;
case MODBUS_WRITE_MULTIPLE_COILS:
case MODBUS_WRITE_MULTIPLE_REGISTERS:
flags |= MODBUS_FLAG_WRITE;
case MODBUS_READ_DISCRETE_INPUTS:
case MODBUS_READ_COILS:
case MODBUS_READ_INPUT_REGISTERS:
case MODBUS_READ_HOLDING_REGISTERS:
if (len < (MODBUS_MINIMAL_FRAME_LEN + 4)) {
/* buffer too short to contain everything we need */
return MODBUS_ERROR;
}
transaction.register_address = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++];
// TODO check length!
if (flags & MODBUS_FLAG_WRITE) {
if (flags & MODBUS_FLAG_SINGLE) {
transaction.holding_registers[0] = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++];
} else {
/* Write multiple registers */
transaction.register_count = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++];
byte_count = buffer[buffer_pos++];
if (transaction.register_count > 123 || 2*transaction.register_count != byte_count) {
/* Max number of register is defined by Modbus_Application_Protocol_V1_1b, section 6.12 */
transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY;
} else {
for (uint8_t i = 0; i < transaction.register_count; i++) {
transaction.holding_registers[i] = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++];
}
}
}
} else {
transaction.register_count = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++];
if (
transaction.register_count < 1 ||
transaction.register_count > MODBUS_MAX_REGISTERS
) {
transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE;
}
}
// add offset to register number
transaction.register_number += transaction.register_address;
break;
default:
/* function code not known / not implemented, reply with
* ExceptionCode 1 */
transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
break;
}
/* data in modbus_buffer have been processed and buffer can be re-used for TX */
/* handle reply */
if (transaction.exception.exception_code != 0) {
/* indicate error */
transaction.function_code |= MODBUS_ERROR_FLAG;
} else {
callback_result = modbus_slave_callback(&transaction);
/* error handling */
if (callback_result != MODBUS_OK) {
transaction.function_code |= MODBUS_ERROR_FLAG;
if (callback_result == MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED) {
transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
} else if (callback_result == MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED) {
transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS;
}
}
}
uint8_t msg_len = 0;
modbus_send:
if (address != MODBUS_BROADCAST_ADDR) {
/* send only if master request was not broadcast */
modbus_copy_reply_to_buffer(modbus_buffer, &msg_len, &transaction);
modbus_transmit_function(modbus_buffer, msg_len);
}
}

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/*
* sht4x.c
*
* Created on: Jun 8, 2021
* Author: user
*/
#include "scd4x.h"
#include "main.h" /* for uart_disable_interrupts() */
int8_t scd4x_send_cmd(scd4x_cmd_t cmd)
{
uint8_t buffer[32];
int result;
// start measurement
buffer[0] = cmd >> 8;
buffer[1] = cmd & 0x00ff;
result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2);
if (result != I2C_OK) {
return SCD4X_ERROR;
}
return SCD4X_OK;
}
int8_t scd4x_read_data(uint8_t *buffer, int len)
{
return SCD4X_OK;
}
int8_t scd4x_start_periodic_measurement( void )
{
return scd4x_send_cmd(SCD4X_START_PERIODIC_MEASUREMENT);
}
int8_t scd4x_stop_periodic_measurement( void )
{
return scd4x_send_cmd(SCD4X_STOP_PERIODIC_MEASUREMENT);
}
int8_t scd4x_perform_factory_reset( void )
{
return scd4x_send_cmd(SCD4X_PERFORM_FACTORY_RESET);
}
int8_t scd4x_read_measurement(uint16_t * co2, int16_t *temperature, uint16_t *relative_humidity)
{
uint8_t buffer[32];
int result;
// start measurement
// TODO: Check for data ready
/*
buffer[0] = GET_DATA_READY_STATUS >> 8;
buffer[1] = GET_DATA_READY_STATUS & 0x00ff;
result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2);
if (result != I2C_OK) {
return SCD4X_ERROR;
}
LL_mDelay(100); // 10 ms should be enough
// read out
result = i2c_receive(SCD4X_I2C_ADDRESS<<1, buffer, 6);
if (result != I2C_OK) {
return SCD4X_ERROR;
}*/
// start measurement
buffer[0] = SCD4X_READ_MEASUREMENT >> 8;
buffer[1] = SCD4X_READ_MEASUREMENT & 0x00ff;
result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2);
// TODO: Proc to vraci NACK? Vyresit.
/*if (result != I2C_OK) {
return SCD4X_ERROR;
}*/
uart_disable_interrupts();
LL_mDelay(1); // 10 ms should be enough
uart_enable_interrupts();
// read out
result = i2c_receive(SCD4X_I2C_ADDRESS<<1, buffer, 9);
if (result != I2C_OK)
{
return SCD4X_ERROR;
}
// TODO checksum
// Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3
uint32_t co2_ticks = (buffer[0] << 8) + buffer[1];
uint32_t t_ticks = (buffer[3] << 8) + buffer[4];
uint32_t rh_ticks = (buffer[6] << 8) + buffer[7];
int t_degC = -450 + 10 * 175 * t_ticks / 65535;
int rh_pRH = 100 * rh_ticks / 65535;
if (rh_pRH > 100) {
rh_pRH = 100;
}
if (rh_pRH < 0) {
rh_pRH = 0;
}
*co2 = co2_ticks;
*temperature = t_degC;
*relative_humidity = rh_pRH;
return SCD4X_OK;
}

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/*
* sht4x.c
*
* Created on: Jun 8, 2021
* Author: user
*/
#include "sht4x.h"
#include "main.h" /* for uart_disable_interrupts() */
int8_t sht4x_send_cmd(sht4x_cmd_t cmd)
{
return SHT4X_OK;
}
int8_t sht4x_read_data(uint8_t *buffer, int len)
{
return SHT4X_OK;
}
int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity)
{
uint8_t buffer[32];
int result;
// start measurement
buffer[0] = SHT4X_START_MEAS_HIGH_PRECISION;
result = i2c_transmit(SHT4X_I2C_ADDRESS<<1, buffer, 1);
// TODO: Proc to vraci NACK? Vyresit.
/*
if (result != I2C_OK) {
return SHT4X_ERROR;
}*/
uart_disable_interrupts();
LL_mDelay(10); // 10 ms should be enough
uart_enable_interrupts();
// read out
result = i2c_receive(SHT4X_I2C_ADDRESS<<1, buffer, 6);
if (result != I2C_OK) {
return SHT4X_ERROR;
}
// TODO checksum
// Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3
uint32_t t_ticks = (buffer[0] << 8) + buffer[1];
uint32_t rh_ticks = (buffer[3] << 8) + buffer[4];
int t_degC = -450 + 10 * 175 * t_ticks / 65535; /* temperature * 10 */
int rh_pRH = -6 + 125 * rh_ticks / 65535;
if (rh_pRH > 100) {
rh_pRH = 100;
}
if (rh_pRH < 0) {
rh_pRH = 0;
}
*temperature = t_degC;
*relative_humidity = rh_pRH;
return SHT4X_OK;
}

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/*
* sps30.c
*
* Created on: Jul 18, 2021
* Author: david
*/
#include "sps30.h"
int8_t sps30_send_cmd(sps30_cmd_t cmd)
{
uint8_t buffer[32];
uint8_t result;
// start measurement
buffer[0] = cmd >> 8;
buffer[1] = cmd & 0x00ff;
result = i2c_transmit(SPS30_I2C_ADDRESS<<1, buffer, 2);
// TODO: Proc to vraci NACK? Vyresit.
if (result != I2C_OK) {
return SPS30_ERROR;
}
return SPS30_OK;
}
int8_t sps30_start_measurement( void )
{
uint8_t i2c_tx_buffer[5];
uint8_t data_for_crc = {SPS30_UINT16_FORMAT, 0x00};
uint8_t result;
i2c_tx_buffer[0] = SPS30_START_MEASUREMENT >> 8;
i2c_tx_buffer[1] = SPS30_START_MEASUREMENT & 0x00ff;
i2c_tx_buffer[2] = SPS30_UINT16_FORMAT;
i2c_tx_buffer[3] = 0x00;
i2c_tx_buffer[4] = calculate_crc(data_for_crc);
result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 5);
// TODO: Proc to vraci NACK? Vyresit.
if (result != I2C_OK) {
return SPS30_ERROR;
}
return SPS30_OK;
}
int8_t sps30_stop_measurement( void )
{
return sps30_send_cmd(SPS30_STOP_MEASUREMENT);
}
int8_t sps30_read_measured_values(uint16_t *measured_values, uint8_t measured_values_len)
{
if (measured_values_len != 10)
{
return -5;
}
uint8_t i2c_tx_buffer[2];
uint8_t i2c_rx_buffer[30];
uint8_t result;
// start measurement
i2c_tx_buffer[0] = SPS30_READ_MEASURED_VALUES >> 8;
i2c_tx_buffer[1] = SPS30_READ_MEASURED_VALUES & 0x00ff;
result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 2);
// TODO: Proc to vraci NACK? Vyresit.
/*if (result != I2C_OK) {
return SPS30_ERROR;
}
return SPS30_OK;*/
LL_mDelay(1); // 10 ms should be enough
// read out
result = i2c_receive(SPS30_I2C_ADDRESS<<1, i2c_rx_buffer, 30);
if (result != I2C_OK)
{
return SPS30_ERROR;
}
uint8_t checksums[10];
uint8_t j = 0;
for (uint8_t i = 0; i < 10; i++)
{
measured_values[i] = (i2c_rx_buffer[j++] << 8) + i2c_rx_buffer[j++];
checksums[i] = i2c_rx_buffer[j++];
}
return SPS30_OK;
}
int8_t sps30_sleep( void )
{
return sps30_send_cmd(SPS30_SLEEP);
}
int8_t sps30_wake_up( void )
{
return sps30_send_cmd(SPS30_WAKE_UP);
return sps30_send_cmd(SPS30_WAKE_UP);
}
int8_t sps30_start_fan_cleaning( void )
{
return sps30_send_cmd(SPS30_START_FAN_CLEANING);
}
int8_t sps30_reset( void )
{
return sps30_send_cmd(SPS30_RESET);
}
int8_t sps30_read_status_register ( void )
{
uint8_t i2c_tx_buffer[2];
uint8_t i2c_rx_buffer[6];
uint8_t result;
// start measurement
i2c_tx_buffer[0] = SPS30_READ_DEVICE_STATUS_REGISTER >> 8;
i2c_tx_buffer[1] = SPS30_READ_DEVICE_STATUS_REGISTER & 0x00ff;
result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 2);
// TODO: Proc to vraci NACK? Vyresit.
/*if (result != I2C_OK) {
return SPS30_ERROR;
}
return SPS30_OK;*/
LL_mDelay(1); // 10 ms should be enough
// read out
result = i2c_receive(SPS30_I2C_ADDRESS<<1, i2c_rx_buffer, 6);
return 0;
}
int8_t sps30_read_firmware_version ( uint8_t * fw_ver_hi, uint8_t * fw_ver_lo )
{
uint8_t i2c_tx_buffer[2];
uint8_t i2c_rx_buffer[3];
uint8_t result;
// start measurement
i2c_tx_buffer[0] = SPS30_READ_VERSION >> 8;
i2c_tx_buffer[1] = SPS30_READ_VERSION & 0x00ff;
result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 2);
// TODO: Proc to vraci NACK? Vyresit.
/*if (result != I2C_OK) {
return SPS30_ERROR;
}
return SPS30_OK;*/
LL_mDelay(1); // 10 ms should be enough
// read out
result = i2c_receive(SPS30_I2C_ADDRESS<<1, i2c_rx_buffer, 3);
/*if (result != I2C_OK)
{
return SPS30_ERROR;
}*/
*fw_ver_hi = i2c_rx_buffer[0];
*fw_ver_lo = i2c_rx_buffer[1];
return SPS30_OK;
}
uint8_t calculate_crc(uint8_t data[2])
{
uint8_t crc = 0xFF;
for(uint8_t i = 0; i < 2; i++) {
crc ^= data[i];
for(uint8_t bit = 8; bit > 0; --bit) {
if(crc & 0x80) {
crc = (crc << 1) ^ 0x31u;
} else {
crc = (crc << 1);
}
}
}
return crc;
}

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l0xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32l0xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "modbus.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
uint16_t lpuart1_rx_message_index = 0;
uint16_t lpuart1_rx_message_len = 0;
uint8_t lpuart1_rx_done = 0;
uint8_t lpuart1_rx_message_too_long = 0;
uint8_t tim21_elapsed_period = 0;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
void LPUART1_CharReception_Callback( void );
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M0+ Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVC_IRQn 0 */
/* USER CODE END SVC_IRQn 0 */
/* USER CODE BEGIN SVC_IRQn 1 */
/* USER CODE END SVC_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32L0xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32l0xx.s). */
/******************************************************************************/
/**
* @brief This function handles TIM21 global interrupt.
*/
void TIM21_IRQHandler(void)
{
/* USER CODE BEGIN TIM21_IRQn 0 */
LL_TIM_ClearFlag_UPDATE(TIM21);
tim21_elapsed_period = 1;
/* USER CODE END TIM21_IRQn 0 */
/* USER CODE BEGIN TIM21_IRQn 1 */
/* USER CODE END TIM21_IRQn 1 */
}
/**
* @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28.
*/
void LPUART1_IRQHandler(void)
{
/* USER CODE BEGIN LPUART1_IRQn 0 */
/* Check RXNE flag value in SR register */
if(LL_LPUART_IsActiveFlag_RXNE(LPUART1) && LL_LPUART_IsEnabledIT_RXNE(LPUART1))
{
/* RXNE flag will be cleared by reading of DR register (done in call) */
/* Call function in charge of handling Character reception */
LPUART1_CharReception_Callback();
}
/* USER CODE END LPUART1_IRQn 0 */
/* USER CODE BEGIN LPUART1_IRQn 1 */
/* If the IDLE flag is active */
if (LL_LPUART_IsActiveFlag_IDLE(LPUART1) && LL_LPUART_IsEnabledIT_IDLE(LPUART1))
{
/* Clear the IDLE flag */
LL_LPUART_ClearFlag_IDLE(LPUART1);
/* Reset the buffer index */
lpuart1_rx_message_len = lpuart1_rx_message_index;
lpuart1_rx_message_index = 0;
lpuart1_rx_done = 1;
if (lpuart1_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE)
{
lpuart1_rx_message_too_long = 1;
}
}
/* USER CODE END LPUART1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
void LPUART1_CharReception_Callback( void )
{
uint16_t lpuart1_rx_bit = LL_LPUART_ReceiveData9(LPUART1);
if (lpuart1_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE)
{
modbus_buffer[lpuart1_rx_message_index] = (uint8_t)lpuart1_rx_bit;
}
lpuart1_rx_message_index++;
}
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeIDE
* @brief STM32CubeIDE Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib libc-manual
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes */
#include <sys/stat.h>
#include <stdlib.h>
#include <errno.h>
#include <stdio.h>
#include <signal.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
/* Variables */
//#undef errno
extern int errno;
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
register char * stack_ptr asm("sp");
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
int _close(int file)
{
return -1;
}
int _fstat(int file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
return 1;
}
int _lseek(int file, int ptr, int dir)
{
return 0;
}
int _open(char *path, int flags, ...)
{
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
errno = ENOENT;
return -1;
}
int _times(struct tms *buf)
{
return -1;
}
int _stat(char *file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
errno = ENOMEM;
return -1;
}

80
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/**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeIDE
* @brief STM32CubeIDE System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the newlib libc manual
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes */
#include <errno.h>
#include <stdint.h>
/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;
/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}
prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;
return (void *)prev_heap_end;
}

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/**
******************************************************************************
* @file system_stm32l0xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32l0xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32l0xx_system
* @{
*/
/** @addtogroup STM32L0xx_System_Private_Includes
* @{
*/
#include "stm32l0xx.h"
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (MSI_VALUE)
#define MSI_VALUE ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/
#endif /* MSI_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @}
*/
/** @addtogroup STM32L0xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L0xx_System_Private_Defines
* @{
*/
/************************* Miscellaneous Configuration ************************/
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in Flash or Sram, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32L0xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L0xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 2097152U; /* 32.768 kHz * 2^6 */
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
/**
* @}
*/
/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L0xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Configure the Vector Table location add offset address ------------------*/
#if defined (USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
* value as defined by the MSI range.
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmul = 0U, plldiv = 0U, pllsource = 0U, msirange = 0U;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* MSI used as system clock */
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> RCC_ICSCR_MSIRANGE_Pos;
SystemCoreClock = (32768U * (1U << (msirange + 1U)));
break;
case 0x04U: /* HSI used as system clock */
if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)
{
SystemCoreClock = HSI_VALUE / 4U;
}
else
{
SystemCoreClock = HSI_VALUE;
}
break;
case 0x08U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
default: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)];
plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
if (pllsource == 0x00U)
{
/* HSI oscillator clock selected as PLL clock entry */
if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)
{
SystemCoreClock = (((HSI_VALUE / 4U) * pllmul) / plldiv);
}
else
{
SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
}
}
else
{
/* HSE selected as PLL clock entry */
SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
}
break;
}
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Core/Src/config.o: ../Core/Src/config.c ../Core/Inc/config.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h
../Core/Inc/config.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:

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config.c:43:8:config_read 16 static
config.c:70:8:config_write 16 static
config.c:135:15:eeprom_lock 24 static
config.c:165:15:eeprom_unlock 24 static
config.c:198:15:eeprom_program_byte 16 static
config.c:213:15:eeprom_program_halfword 16 static
config.c:229:15:eeprom_program_word 16 static

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Core/Src/crc8.o: ../Core/Src/crc8.c ../Core/Inc/crc8.h
../Core/Inc/crc8.h:

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crc8.c:11:9:crc8_calculate 24 static

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Core/Src/i2c.o: ../Core/Src/i2c.c ../Core/Inc/i2c.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h
../Core/Inc/i2c.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h:

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fw_old/Debug/Core/Src/i2c.o Normal file

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stm32l0xx_ll_i2c.h:1511:26:LL_I2C_IsActiveFlag_TXE 16 static
stm32l0xx_ll_i2c.h:1537:26:LL_I2C_IsActiveFlag_RXNE 16 static
stm32l0xx_ll_i2c.h:1563:26:LL_I2C_IsActiveFlag_NACK 16 static
stm32l0xx_ll_i2c.h:1576:26:LL_I2C_IsActiveFlag_STOP 16 static
stm32l0xx_ll_i2c.h:1733:22:LL_I2C_ClearFlag_STOP 16 static
stm32l0xx_ll_i2c.h:2090:22:LL_I2C_HandleTransfer 24 static
stm32l0xx_ll_i2c.h:2174:25:LL_I2C_ReceiveData8 16 static
stm32l0xx_ll_i2c.h:2186:22:LL_I2C_TransmitData8 16 static
i2c.c:13:5:i2c_init 16 static
i2c.c:22:5:i2c_transmit 40 static
i2c.c:55:5:i2c_receive 48 static

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Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
../Core/Inc/i2c.h ../Core/Inc/scd4x.h ../Core/Inc/crc8.h \
../Core/Inc/sht4x.h ../Core/Inc/sps30.h ../Core/Inc/modbus.h \
../Core/Inc/config.h
../Core/Inc/main.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h:
../Core/Inc/i2c.h:
../Core/Inc/scd4x.h:
../Core/Inc/crc8.h:
../Core/Inc/sht4x.h:
../Core/Inc/sps30.h:
../Core/Inc/modbus.h:
../Core/Inc/config.h:

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core_cm0plus.h:741:22:__NVIC_EnableIRQ 16 static
core_cm0plus.h:848:22:__NVIC_SetPriority 24 static
stm32l0xx_ll_i2c.h:391:22:LL_I2C_Enable 16 static
stm32l0xx_ll_i2c.h:604:22:LL_I2C_EnableClockStretching 16 static
stm32l0xx_ll_i2c.h:724:22:LL_I2C_DisableGeneralCall 16 static
stm32l0xx_ll_i2c.h:835:22:LL_I2C_SetOwnAddress2 24 static
stm32l0xx_ll_i2c.h:857:22:LL_I2C_DisableOwnAddress2 16 static
stm32l0xx_ll_i2c.h:1838:22:LL_I2C_EnableAutoEndMode 16 static
stm32l0xx_ll_lpuart.h:396:22:LL_LPUART_Enable 16 static
stm32l0xx_ll_lpuart.h:415:22:LL_LPUART_Disable 16 static
stm32l0xx_ll_lpuart.h:510:22:LL_LPUART_EnableDirectionRx 16 static
stm32l0xx_ll_lpuart.h:532:22:LL_LPUART_EnableDirectionTx 16 static
stm32l0xx_ll_lpuart.h:1118:22:LL_LPUART_SetBaudRate 56 static
stm32l0xx_ll_lpuart.h:1135:26:LL_LPUART_GetBaudRate 40 static
stm32l0xx_ll_lpuart.h:1210:22:LL_LPUART_SetDEDeassertionTime 16 static
stm32l0xx_ll_lpuart.h:1233:22:LL_LPUART_SetDEAssertionTime 16 static
stm32l0xx_ll_lpuart.h:1255:22:LL_LPUART_EnableDEMode 16 static
stm32l0xx_ll_lpuart.h:1291:22:LL_LPUART_SetDESignalPolarity 16 static
stm32l0xx_ll_lpuart.h:1400:26:LL_LPUART_IsActiveFlag_TXE 16 static
stm32l0xx_ll_lpuart.h:1619:22:LL_LPUART_EnableIT_IDLE 16 static
stm32l0xx_ll_lpuart.h:1631:22:LL_LPUART_EnableIT_RXNE 16 static
stm32l0xx_ll_lpuart.h:1726:22:LL_LPUART_DisableIT_IDLE 16 static
stm32l0xx_ll_lpuart.h:1738:22:LL_LPUART_DisableIT_RXNE 16 static
stm32l0xx_ll_lpuart.h:2114:22:LL_LPUART_TransmitData9 16 static
stm32l0xx_ll_rcc.h:782:22:LL_RCC_HSI_Enable 8 static
stm32l0xx_ll_rcc.h:802:26:LL_RCC_HSI_IsReady 8 static
stm32l0xx_ll_rcc.h:893:22:LL_RCC_HSI_SetCalibTrimming 16 static
stm32l0xx_ll_rcc.h:1275:22:LL_RCC_SetSysClkSource 16 static
stm32l0xx_ll_rcc.h:1289:26:LL_RCC_GetSysClkSource 8 static
stm32l0xx_ll_rcc.h:1309:22:LL_RCC_SetAHBPrescaler 16 static
stm32l0xx_ll_rcc.h:1325:22:LL_RCC_SetAPB1Prescaler 16 static
stm32l0xx_ll_rcc.h:1341:22:LL_RCC_SetAPB2Prescaler 16 static
stm32l0xx_ll_rcc.h:1496:22:LL_RCC_SetLPUARTClockSource 16 static
stm32l0xx_ll_rcc.h:1515:22:LL_RCC_SetI2CClockSource 16 static
stm32l0xx_ll_rcc.h:1784:22:LL_RCC_PLL_Enable 8 static
stm32l0xx_ll_rcc.h:1805:26:LL_RCC_PLL_IsReady 8 static
stm32l0xx_ll_rcc.h:1834:22:LL_RCC_PLL_ConfigDomain_SYS 24 static
stm32l0xx_ll_bus.h:440:22:LL_APB1_GRP1_EnableClock 24 static
stm32l0xx_ll_bus.h:786:22:LL_APB2_GRP1_EnableClock 24 static
stm32l0xx_ll_bus.h:987:22:LL_IOP_GRP1_EnableClock 24 static
stm32l0xx_ll_system.h:912:22:LL_FLASH_SetLatency 16 static
stm32l0xx_ll_system.h:924:26:LL_FLASH_GetLatency 8 static
stm32l0xx_ll_pwr.h:272:22:LL_PWR_SetRegulVoltageScaling 16 static
stm32l0xx_ll_tim.h:886:22:LL_TIM_EnableCounter 16 static
stm32l0xx_ll_tim.h:1066:22:LL_TIM_EnableARRPreload 16 static
stm32l0xx_ll_tim.h:2201:22:LL_TIM_SetClockSource 16 static
stm32l0xx_ll_tim.h:2247:22:LL_TIM_SetTriggerOutput 16 static
stm32l0xx_ll_tim.h:2313:22:LL_TIM_DisableMasterSlaveMode 16 static
stm32l0xx_ll_tim.h:2777:22:LL_TIM_EnableIT_UPDATE 16 static
stm32l0xx_ll_gpio.h:844:22:LL_GPIO_SetOutputPin 16 static
stm32l0xx_ll_gpio.h:873:22:LL_GPIO_ResetOutputPin 16 static
main.c:136:5:main 24 static
main.c:365:6:SystemClock_Config 8 static
main.c:411:13:MX_I2C1_Init 72 static
main.c:474:13:MX_LPUART1_UART_Init 64 static
main.c:557:13:MX_TIM21_Init 24 static
main.c:596:13:MX_GPIO_Init 32 static
main.c:639:6:LPUART1_TX_Buffer 24 static,ignoring_inline_asm
main.c:650:8:uart_disable_interrupts 8 static
main.c:659:8:uart_enable_interrupts 8 static
main.c:668:8:modbus_slave_callback 32 static
main.c:787:8:modbus_transmit_function 16 static
main.c:799:6:Error_Handler 8 static,ignoring_inline_asm

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Core/Src/modbus.o: ../Core/Src/modbus.c ../Core/Inc/modbus.h
../Core/Inc/modbus.h:

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modbus.c:30:10:modbus_CRC16 32 static
modbus.c:56:8:modbus_copy_reply_to_buffer 40 static
modbus.c:108:8:modbus_slave_set_address 16 static
modbus.c:118:8:modbus_slave_process_msg 312 static

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Core/Src/scd4x.o: ../Core/Src/scd4x.c ../Core/Inc/scd4x.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
../Core/Inc/i2c.h ../Core/Inc/crc8.h ../Core/Inc/main.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
../Core/Inc/scd4x.h ../Core/Inc/sht4x.h ../Core/Inc/sps30.h \
../Core/Inc/modbus.h ../Core/Inc/config.h
../Core/Inc/scd4x.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
../Core/Inc/i2c.h:
../Core/Inc/crc8.h:
../Core/Inc/main.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h:
../Core/Inc/scd4x.h:
../Core/Inc/sht4x.h:
../Core/Inc/sps30.h:
../Core/Inc/modbus.h:
../Core/Inc/config.h:

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scd4x.c:11:8:scd4x_send_cmd 56 static
scd4x.c:27:8:scd4x_read_data 16 static
scd4x.c:32:8:scd4x_start_periodic_measurement 8 static
scd4x.c:37:8:scd4x_stop_periodic_measurement 8 static
scd4x.c:42:8:scd4x_perform_factory_reset 8 static
scd4x.c:47:8:scd4x_read_measurement 88 static

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Core/Src/sht4x.o: ../Core/Src/sht4x.c ../Core/Inc/sht4x.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
../Core/Inc/i2c.h ../Core/Inc/crc8.h ../Core/Inc/main.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
../Core/Inc/scd4x.h ../Core/Inc/sht4x.h ../Core/Inc/sps30.h \
../Core/Inc/modbus.h ../Core/Inc/config.h
../Core/Inc/sht4x.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
../Core/Inc/i2c.h:
../Core/Inc/crc8.h:
../Core/Inc/main.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h:
../Core/Inc/scd4x.h:
../Core/Inc/sht4x.h:
../Core/Inc/sps30.h:
../Core/Inc/modbus.h:
../Core/Inc/config.h:

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sht4x.c:11:8:sht4x_send_cmd 16 static
sht4x.c:16:8:sht4x_read_data 16 static
sht4x.c:21:8:sht4x_measure 80 static

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Core/Src/sps30.o: ../Core/Src/sps30.c ../Core/Inc/sps30.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
../Core/Inc/i2c.h ../Core/Inc/crc8.h
../Core/Inc/sps30.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
../Core/Inc/i2c.h:
../Core/Inc/crc8.h:

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sps30.c:10:8:sps30_send_cmd 56 static
sps30.c:27:8:sps30_start_measurement 16 static
sps30.c:49:8:sps30_stop_measurement 8 static
sps30.c:54:8:sps30_read_measured_values 88 static
sps30.c:99:8:sps30_sleep 8 static
sps30.c:104:8:sps30_wake_up 8 static
sps30.c:110:8:sps30_start_fan_cleaning 8 static
sps30.c:115:8:sps30_reset 8 static
sps30.c:121:8:sps30_read_status_register 32 static
sps30.c:146:8:sps30_read_firmware_version 32 static
sps30.c:179:9:calculate_crc 24 static

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Core/Src/stm32l0xx_it.o: ../Core/Src/stm32l0xx_it.c ../Core/Inc/main.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
../Core/Inc/i2c.h ../Core/Inc/scd4x.h ../Core/Inc/crc8.h \
../Core/Inc/sht4x.h ../Core/Inc/sps30.h ../Core/Inc/modbus.h \
../Core/Inc/config.h ../Core/Inc/stm32l0xx_it.h ../Core/Inc/modbus.h
../Core/Inc/main.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h:
../Core/Inc/i2c.h:
../Core/Inc/scd4x.h:
../Core/Inc/crc8.h:
../Core/Inc/sht4x.h:
../Core/Inc/sps30.h:
../Core/Inc/modbus.h:
../Core/Inc/config.h:
../Core/Inc/stm32l0xx_it.h:
../Core/Inc/modbus.h:

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stm32l0xx_ll_lpuart.h:1367:26:LL_LPUART_IsActiveFlag_IDLE 16 static
stm32l0xx_ll_lpuart.h:1378:26:LL_LPUART_IsActiveFlag_RXNE 16 static
stm32l0xx_ll_lpuart.h:1555:22:LL_LPUART_ClearFlag_IDLE 16 static
stm32l0xx_ll_lpuart.h:1833:26:LL_LPUART_IsEnabledIT_IDLE 16 static
stm32l0xx_ll_lpuart.h:1845:26:LL_LPUART_IsEnabledIT_RXNE 16 static
stm32l0xx_ll_lpuart.h:2090:26:LL_LPUART_ReceiveData9 16 static
stm32l0xx_ll_tim.h:2550:22:LL_TIM_ClearFlag_UPDATE 16 static
stm32l0xx_it.c:76:6:NMI_Handler 8 static
stm32l0xx_it.c:91:6:HardFault_Handler 8 static
stm32l0xx_it.c:106:6:SVC_Handler 8 static
stm32l0xx_it.c:119:6:PendSV_Handler 8 static
stm32l0xx_it.c:132:6:SysTick_Handler 8 static
stm32l0xx_it.c:152:6:TIM21_IRQHandler 8 static
stm32l0xx_it.c:167:6:LPUART1_IRQHandler 8 static
stm32l0xx_it.c:198:6:LPUART1_CharReception_Callback 24 static

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################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Core/Src/config.c \
../Core/Src/crc8.c \
../Core/Src/i2c.c \
../Core/Src/main.c \
../Core/Src/modbus.c \
../Core/Src/scd4x.c \
../Core/Src/sht4x.c \
../Core/Src/sps30.c \
../Core/Src/stm32l0xx_it.c \
../Core/Src/syscalls.c \
../Core/Src/sysmem.c \
../Core/Src/system_stm32l0xx.c
OBJS += \
./Core/Src/config.o \
./Core/Src/crc8.o \
./Core/Src/i2c.o \
./Core/Src/main.o \
./Core/Src/modbus.o \
./Core/Src/scd4x.o \
./Core/Src/sht4x.o \
./Core/Src/sps30.o \
./Core/Src/stm32l0xx_it.o \
./Core/Src/syscalls.o \
./Core/Src/sysmem.o \
./Core/Src/system_stm32l0xx.o
C_DEPS += \
./Core/Src/config.d \
./Core/Src/crc8.d \
./Core/Src/i2c.d \
./Core/Src/main.d \
./Core/Src/modbus.d \
./Core/Src/scd4x.d \
./Core/Src/sht4x.d \
./Core/Src/sps30.d \
./Core/Src/stm32l0xx_it.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32l0xx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Src/%.o: ../Core/Src/%.c Core/Src/subdir.mk
arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"

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Core/Src/syscalls.o: ../Core/Src/syscalls.c

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syscalls.c:48:6:initialise_monitor_handles 8 static
syscalls.c:52:5:_getpid 8 static
syscalls.c:57:5:_kill 16 static
syscalls.c:63:6:_exit 16 static
syscalls.c:69:27:_read 32 static
syscalls.c:81:27:_write 32 static
syscalls.c:92:5:_close 16 static
syscalls.c:98:5:_fstat 16 static
syscalls.c:104:5:_isatty 16 static
syscalls.c:109:5:_lseek 24 static
syscalls.c:114:5:_open 20 static
syscalls.c:120:5:_wait 16 static
syscalls.c:126:5:_unlink 16 static
syscalls.c:132:5:_times 16 static
syscalls.c:137:5:_stat 16 static
syscalls.c:143:5:_link 16 static
syscalls.c:149:5:_fork 8 static
syscalls.c:155:5:_execve 24 static

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Core/Src/sysmem.o: ../Core/Src/sysmem.c

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sysmem.c:54:7:_sbrk 32 static

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Core/Src/system_stm32l0xx.o: ../Core/Src/system_stm32l0xx.c \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:

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system_stm32l0xx.c:154:6:SystemInit 8 static
system_stm32l0xx.c:200:6:SystemCoreClockUpdate 32 static

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Core/Startup/startup_stm32l011f4ux.o: \
../Core/Startup/startup_stm32l011f4ux.s

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################################################################################
# Automatically-generated file. Do not edit!
# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
S_SRCS += \
../Core/Startup/startup_stm32l011f4ux.s
OBJS += \
./Core/Startup/startup_stm32l011f4ux.o
S_DEPS += \
./Core/Startup/startup_stm32l011f4ux.d
# Each subdirectory must supply rules for building sources it contributes
Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
arm-none-eabi-gcc -mcpu=cortex-m0plus -g3 -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<"

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Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o: \
../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h:

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stm32l0xx_ll_dma.h:580:22:LL_DMA_ConfigTransfer 24 static
stm32l0xx_ll_dma.h:933:22:LL_DMA_SetDataLength 24 static
stm32l0xx_ll_dma.h:1018:22:LL_DMA_SetMemoryAddress 24 static
stm32l0xx_ll_dma.h:1040:22:LL_DMA_SetPeriphAddress 24 static
stm32l0xx_ll_dma.h:1207:22:LL_DMA_SetPeriphRequest 24 static
stm32l0xx_ll_dma.h:1593:22:LL_DMA_ClearFlag_GI1 16 static
stm32l0xx_ll_dma.h:1604:22:LL_DMA_ClearFlag_GI2 16 static
stm32l0xx_ll_dma.h:1615:22:LL_DMA_ClearFlag_GI3 16 static
stm32l0xx_ll_dma.h:1626:22:LL_DMA_ClearFlag_GI4 16 static
stm32l0xx_ll_dma.h:1637:22:LL_DMA_ClearFlag_GI5 16 static
stm32l0xx_ll_bus.h:301:22:LL_AHB1_GRP1_ForceReset 16 static
stm32l0xx_ll_bus.h:326:22:LL_AHB1_GRP1_ReleaseReset 16 static
stm32l0xx_ll_dma.c:150:13:LL_DMA_DeInit 24 static
stm32l0xx_ll_dma.c:275:13:LL_DMA_Init 24 static
stm32l0xx_ll_dma.c:343:6:LL_DMA_StructInit 16 static

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@ -0,0 +1,26 @@
Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o: \
../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:

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@ -0,0 +1,11 @@
stm32l0xx_ll_exti.h:274:22:LL_EXTI_EnableIT_0_31 16 static
stm32l0xx_ll_exti.h:322:22:LL_EXTI_DisableIT_0_31 16 static
stm32l0xx_ll_exti.h:425:22:LL_EXTI_EnableEvent_0_31 16 static
stm32l0xx_ll_exti.h:472:22:LL_EXTI_DisableEvent_0_31 16 static
stm32l0xx_ll_exti.h:572:22:LL_EXTI_EnableRisingTrig_0_31 16 static
stm32l0xx_ll_exti.h:618:22:LL_EXTI_DisableRisingTrig_0_31 16 static
stm32l0xx_ll_exti.h:710:22:LL_EXTI_EnableFallingTrig_0_31 16 static
stm32l0xx_ll_exti.h:754:22:LL_EXTI_DisableFallingTrig_0_31 16 static
stm32l0xx_ll_exti.c:80:10:LL_EXTI_DeInit 8 static
stm32l0xx_ll_exti.c:105:10:LL_EXTI_Init 24 static
stm32l0xx_ll_exti.c:186:6:LL_EXTI_StructInit 16 static

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@ -0,0 +1,29 @@
Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o: \
../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \
../Drivers/CMSIS/Include/core_cm0plus.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h:
../Drivers/CMSIS/Include/core_cm0plus.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h:

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