diff --git a/fw/.cproject b/fw/.cproject
index 30a87ca..0005a9c 100644
--- a/fw/.cproject
+++ b/fw/.cproject
@@ -1,396 +1,191 @@
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+ org.eclipse.cdt.core.cnature
com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
- com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
com.st.stm32cube.ide.mcu.MCURootProjectNature
org.eclipse.cdt.managedbuilder.core.managedBuildNature
diff --git a/fw/.settings/stm32cubeide.project.prefs b/fw/.settings/stm32cubeide.project.prefs
index ae186d6..2a751da 100644
--- a/fw/.settings/stm32cubeide.project.prefs
+++ b/fw/.settings/stm32cubeide.project.prefs
@@ -1,3 +1,4 @@
-8DF89ED150041C4CBC7CB9A9CAA90856=295E78E9D51884086204F31037537306
-DC22A860405A8BF2F2C095E5B6529F12=295E78E9D51884086204F31037537306
+66BE74F758C12D739921AEA421D593D3=11
+8DF89ED150041C4CBC7CB9A9CAA90856=807411C90E25B050C1E13646B7FEB5AA
+DC22A860405A8BF2F2C095E5B6529F12=807411C90E25B050C1E13646B7FEB5AA
eclipse.preferences.version=1
diff --git a/fw/Core/Inc/main.h b/fw/Core/Inc/main.h
index a144a49..dd3504d 100644
--- a/fw/Core/Inc/main.h
+++ b/fw/Core/Inc/main.h
@@ -29,9 +29,8 @@ extern "C" {
/* Includes ------------------------------------------------------------------*/
#include "stm32l0xx_ll_i2c.h"
-#include "stm32l0xx_ll_lpuart.h"
-#include "stm32l0xx_ll_rcc.h"
#include "stm32l0xx_ll_crs.h"
+#include "stm32l0xx_ll_rcc.h"
#include "stm32l0xx_ll_bus.h"
#include "stm32l0xx_ll_system.h"
#include "stm32l0xx_ll_exti.h"
@@ -40,6 +39,7 @@ extern "C" {
#include "stm32l0xx_ll_pwr.h"
#include "stm32l0xx_ll_dma.h"
#include "stm32l0xx_ll_tim.h"
+#include "stm32l0xx_ll_usart.h"
#include "stm32l0xx_ll_gpio.h"
#if defined(USE_FULL_ASSERT)
@@ -102,10 +102,10 @@ int8_t uart_enable_interrupts(void);
/* USER CODE BEGIN Private defines */
#define MEASUREMENT_PERIOD_MS 600000
-extern uint16_t lpuart1_rx_message_index;
-extern uint16_t lpuart1_rx_message_len;
-extern uint8_t lpuart1_rx_done;
-extern uint8_t lpuart1_rx_message_too_long;
+extern uint16_t usart2_rx_message_index;
+extern uint16_t usart2_rx_message_len;
+extern uint8_t usart2_rx_done;
+extern uint8_t usart2_rx_message_too_long;
extern uint8_t tim21_elapsed_period;
diff --git a/fw/Core/Inc/stm32l0xx_it.h b/fw/Core/Inc/stm32l0xx_it.h
index e4fecd6..c2f720d 100644
--- a/fw/Core/Inc/stm32l0xx_it.h
+++ b/fw/Core/Inc/stm32l0xx_it.h
@@ -52,7 +52,7 @@ void SVC_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void TIM21_IRQHandler(void);
-void LPUART1_IRQHandler(void);
+void USART2_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
diff --git a/fw/Core/Src/i2c.c b/fw/Core/Src/i2c.c
index 07aeaaf..b0991b8 100644
--- a/fw/Core/Src/i2c.c
+++ b/fw/Core/Src/i2c.c
@@ -6,7 +6,7 @@
*/
#include "i2c.h"
-#include "stm32l0xx_ll_lpuart.h"
+#include "stm32l0xx_ll_usart.h"
i2c_context_t *i2c_context;
diff --git a/fw/Core/Src/main.c b/fw/Core/Src/main.c
index 23f6270..930de14 100644
--- a/fw/Core/Src/main.c
+++ b/fw/Core/Src/main.c
@@ -118,10 +118,10 @@ uint8_t co2_valid = 0;
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_I2C1_Init(void);
-static void MX_LPUART1_UART_Init(void);
+static void MX_USART2_UART_Init(void);
static void MX_TIM21_Init(void);
/* USER CODE BEGIN PFP */
-void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len);
+void USART2_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len);
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@@ -147,6 +147,8 @@ int main(void)
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
/* System interrupt init*/
+ /* SysTick_IRQn interrupt configuration */
+ NVIC_SetPriority(SysTick_IRQn, 3);
/* USER CODE BEGIN Init */
@@ -174,7 +176,7 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_I2C1_Init();
- MX_LPUART1_UART_Init();
+ MX_USART2_UART_Init();
MX_TIM21_Init();
/* USER CODE BEGIN 2 */
@@ -191,7 +193,7 @@ int main(void)
modbus_slave_set_address(sensor_config.modbus_addr);
/* Enable UART for RS485 */
- LL_LPUART_Enable(LPUART1);
+ LL_USART_Enable(USART2);
/* Start the timer for measurement triggering */
LL_TIM_EnableCounter(TIM21);
@@ -202,6 +204,8 @@ int main(void)
i2c_context.i2c = I2C1;
i2c_init(&i2c_context);
+ LL_mDelay(2000);
+
scd4x_start_periodic_measurement();
uint8_t scd4x_is_connected = 1;
uint8_t sps30_is_connected = 0;
@@ -227,34 +231,34 @@ int main(void)
/* SHT4x Init Time: max 1 ms (datasheet pg. 8) */
/* SCD4x Init Time: max 1000 ms (datasheet pg. 6) */
/* SPS30 Init Time: max 30000 ms (datasheet pg. 2) */
- LL_mDelay(1000);
+ LL_mDelay(5000);
static uint32_t new_baud;
/* Enter the main loop */
while (1)
{
- if (lpuart1_rx_done == 1)
+ if (usart2_rx_done == 1)
{
/* Process the message */
- if (lpuart1_rx_message_too_long)
+ if (usart2_rx_message_too_long)
{
/* Do nothing, just delete the buffer and set the flag back to zero*/
- lpuart1_rx_message_too_long = 0;
+ usart2_rx_message_too_long = 0;
} else
{
/* Process the message:
* message is stored in modbus_buffer[], no copying necessary;
* but we need to make sure that modbus_buffer[] will not be used while
* processing the message: this can be done by disabling RX interrupt */
- LL_LPUART_DisableIT_RXNE(LPUART1);
- modbus_slave_process_msg(modbus_buffer, lpuart1_rx_message_len);
+ LL_USART_DisableIT_RXNE(USART2);
+ modbus_slave_process_msg(modbus_buffer, usart2_rx_message_len);
/* Reset the RX DONE flag */
- lpuart1_rx_done = 0;
- LL_LPUART_EnableIT_RXNE(LPUART1);
+ usart2_rx_done = 0;
+ LL_USART_EnableIT_RXNE(USART2);
}
/* Reset the RX DONE flag */
- lpuart1_rx_done = 0;
+ usart2_rx_done = 0;
}
/* if config changed (MODBUS write), reflect changes to EEPROM */
if (sensor_config_pending_write) {
@@ -268,23 +272,16 @@ int main(void)
}
if (baudrate_changed)
{
- while (!LL_LPUART_IsActiveFlag_TXE(LPUART1));
+ while (!LL_USART_IsActiveFlag_TXE(USART2));
uart_disable_interrupts();
-// LL_LPUART_Disable(LPUART1);
-// LL_LPUART_DisableIT_IDLE(LPUART1);
-// LL_LPUART_EnableIT_RXNE(LPUART1);
- LL_LPUART_SetBaudRate(LPUART1, SYSTICK_FREQ_HZ, config_baudrates[sensor_config.baudrate_index]);
-
-// LL_LPUART_Enable(LPUART1);
-// LL_LPUART_EnableIT_IDLE(LPUART1);
-// LL_LPUART_EnableIT_RXNE(LPUART1);
+ LL_USART_SetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16, config_baudrates[sensor_config.baudrate_index]);
uart_enable_interrupts();
- LL_LPUART_EnableDirectionRx(LPUART1);
- LL_LPUART_EnableDirectionTx(LPUART1);
+ LL_USART_EnableDirectionRx(USART2);
+ LL_USART_EnableDirectionTx(USART2);
baudrate_changed = 0;
- new_baud = LL_LPUART_GetBaudRate(LPUART1, SYSTICK_FREQ_HZ);
+ new_baud = LL_USART_GetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16);
}
/* It is time for measurement */
@@ -399,7 +396,7 @@ void SystemClock_Config(void)
LL_Init1msTick(12000000);
LL_SetSystemCoreClock(12000000);
- LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1);
+ LL_RCC_SetUSARTClockSource(LL_RCC_USART2_CLKSOURCE_PCLK1);
LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1);
}
@@ -466,89 +463,6 @@ static void MX_I2C1_Init(void)
}
-/**
- * @brief LPUART1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_LPUART1_UART_Init(void)
-{
-
- /* USER CODE BEGIN LPUART1_Init 0 */
-
- /* USER CODE END LPUART1_Init 0 */
-
- LL_LPUART_InitTypeDef LPUART_InitStruct = {0};
-
- LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1);
-
- LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
- LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
- /**LPUART1 GPIO Configuration
- PA0-CK_IN ------> LPUART1_RX
- PA1 ------> LPUART1_TX
- PB1 ------> LPUART1_DE
- */
- GPIO_InitStruct.Pin = LL_GPIO_PIN_0;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
- LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
- LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
- LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- /* LPUART1 interrupt Init */
- NVIC_SetPriority(LPUART1_IRQn, 0);
- NVIC_EnableIRQ(LPUART1_IRQn);
-
- /* USER CODE BEGIN LPUART1_Init 1 */
-
- /* USER CODE END LPUART1_Init 1 */
- LPUART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index];
- LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_9B;
- LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1;
- LPUART_InitStruct.Parity = LL_LPUART_PARITY_EVEN;
- LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX;
- LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE;
- LL_LPUART_Init(LPUART1, &LPUART_InitStruct);
- LL_LPUART_EnableDEMode(LPUART1);
- LL_LPUART_SetDESignalPolarity(LPUART1, LL_LPUART_DE_POLARITY_HIGH);
- LL_LPUART_SetDEAssertionTime(LPUART1, 0);
- LL_LPUART_SetDEDeassertionTime(LPUART1, 0);
- /* USER CODE BEGIN LPUART1_Init 2 */
-
- /* Enable IDLE Interrupt */
- LL_LPUART_EnableIT_IDLE(LPUART1);
-
- /* Enable RX Not Empty Interrupt */
- LL_LPUART_EnableIT_RXNE(LPUART1);
-
- LL_LPUART_EnableDirectionRx(LPUART1);
- LL_LPUART_EnableDirectionTx(LPUART1);
- LL_LPUART_Enable(LPUART1);
- /* USER CODE END LPUART1_Init 2 */
-
-}
-
/**
* @brief TIM21 Initialization Function
* @param None
@@ -588,6 +502,91 @@ static void MX_TIM21_Init(void)
}
+/**
+ * @brief USART2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_USART2_UART_Init(void)
+{
+
+ /* USER CODE BEGIN USART2_Init 0 */
+
+ /* USER CODE END USART2_Init 0 */
+
+ LL_USART_InitTypeDef USART_InitStruct = {0};
+
+ LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+ /* Peripheral clock enable */
+ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
+
+ LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
+ /**USART2 GPIO Configuration
+ PA1 ------> USART2_DE
+ PA2 ------> USART2_TX
+ PA3 ------> USART2_RX
+ */
+ GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
+ GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
+ LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
+ GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
+ LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
+ GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
+ LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USART2 interrupt Init */
+ NVIC_SetPriority(USART2_IRQn, 0);
+ NVIC_EnableIRQ(USART2_IRQn);
+
+ /* USER CODE BEGIN USART2_Init 1 */
+
+ /* USER CODE END USART2_Init 1 */
+ USART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index];
+ USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_9B;
+ USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+ USART_InitStruct.Parity = LL_USART_PARITY_EVEN;
+ USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+ USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+ USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+ LL_USART_Init(USART2, &USART_InitStruct);
+ LL_USART_EnableDEMode(USART2);
+ LL_USART_SetDESignalPolarity(USART2, LL_USART_DE_POLARITY_HIGH);
+ LL_USART_SetDEAssertionTime(USART2, 0);
+ LL_USART_SetDEDeassertionTime(USART2, 0);
+ LL_USART_ConfigAsyncMode(USART2);
+ LL_USART_Enable(USART2);
+ /* USER CODE BEGIN USART2_Init 2 */
+
+ /* Enable IDLE Interrupt */
+ LL_USART_EnableIT_IDLE(USART2);
+
+ /* Enable RX Not Empty Interrupt */
+ LL_USART_EnableIT_RXNE(USART2);
+
+ LL_USART_EnableDirectionRx(USART2);
+ LL_USART_EnableDirectionTx(USART2);
+ LL_USART_Enable(USART2);
+ /* USER CODE END USART2_Init 2 */
+
+}
+
/**
* @brief GPIO Initialization Function
* @param None
@@ -601,13 +600,13 @@ static void MX_GPIO_Init(void)
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
/**/
- LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
+ LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
/**/
- LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
+ LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
/**/
- LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
+ LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
/**/
GPIO_InitStruct.Pin = LED_B_Pin;
@@ -636,31 +635,31 @@ static void MX_GPIO_Init(void)
}
/* USER CODE BEGIN 4 */
-void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len)
+void USART2_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len)
{
__disable_irq();
for (uint16_t i = 0; i < buffer_tx_len; i++)
{
- LL_LPUART_TransmitData9(LPUART1, buffer_tx[i]);
- while (!LL_LPUART_IsActiveFlag_TXE(LPUART1));
+ LL_USART_TransmitData9(USART2, buffer_tx[i]);
+ while (!LL_USART_IsActiveFlag_TXE(USART2));
}
__enable_irq();
}
int8_t uart_disable_interrupts(void)
{
- LL_LPUART_Disable(LPUART1);
- LL_LPUART_DisableIT_IDLE(LPUART1);
- LL_LPUART_EnableIT_RXNE(LPUART1);
+ LL_USART_Disable(USART2);
+ LL_USART_DisableIT_IDLE(USART2);
+ LL_USART_EnableIT_RXNE(USART2);
return 0;
}
int8_t uart_enable_interrupts(void)
{
- LL_LPUART_Enable(LPUART1);
- LL_LPUART_EnableIT_IDLE(LPUART1);
- LL_LPUART_EnableIT_RXNE(LPUART1);
+ LL_USART_Enable(USART2);
+ LL_USART_EnableIT_IDLE(USART2);
+ LL_USART_EnableIT_RXNE(USART2);
return 0;
}
@@ -787,7 +786,7 @@ int8_t modbus_slave_callback(modbus_transaction_t *transaction)
int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len)
{
/* TODO */
- LPUART1_TX_Buffer(buffer, data_len);
+ USART2_TX_Buffer(buffer, data_len);
return MODBUS_OK;
}
/* USER CODE END 4 */
diff --git a/fw/Core/Src/stm32l0xx_it.c b/fw/Core/Src/stm32l0xx_it.c
index 504a5a5..5eb65f3 100644
--- a/fw/Core/Src/stm32l0xx_it.c
+++ b/fw/Core/Src/stm32l0xx_it.c
@@ -43,17 +43,17 @@
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
-uint16_t lpuart1_rx_message_index = 0;
-uint16_t lpuart1_rx_message_len = 0;
-uint8_t lpuart1_rx_done = 0;
-uint8_t lpuart1_rx_message_too_long = 0;
+uint16_t usart2_rx_message_index = 0;
+uint16_t usart2_rx_message_len = 0;
+uint8_t usart2_rx_done = 0;
+uint8_t usart2_rx_message_too_long = 0;
uint8_t tim21_elapsed_period = 0;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
-void LPUART1_CharReception_Callback( void );
+void USART2_CharReception_Callback( void );
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
@@ -71,7 +71,7 @@ void LPUART1_CharReception_Callback( void );
/* Cortex-M0+ Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
- * @brief This function handles Non maskable interrupt.
+ * @brief This function handles Non maskable Interrupt.
*/
void NMI_Handler(void)
{
@@ -154,7 +154,6 @@ void TIM21_IRQHandler(void)
/* USER CODE BEGIN TIM21_IRQn 0 */
LL_TIM_ClearFlag_UPDATE(TIM21);
tim21_elapsed_period = 1;
-
/* USER CODE END TIM21_IRQn 0 */
/* USER CODE BEGIN TIM21_IRQn 1 */
@@ -162,47 +161,47 @@ void TIM21_IRQHandler(void)
}
/**
- * @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28.
+ * @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI line 26.
*/
-void LPUART1_IRQHandler(void)
+void USART2_IRQHandler(void)
{
- /* USER CODE BEGIN LPUART1_IRQn 0 */
+ /* USER CODE BEGIN USART2_IRQn 0 */
/* Check RXNE flag value in SR register */
- if(LL_LPUART_IsActiveFlag_RXNE(LPUART1) && LL_LPUART_IsEnabledIT_RXNE(LPUART1))
+ if(LL_USART_IsActiveFlag_RXNE(USART2) && LL_USART_IsEnabledIT_RXNE(USART2))
{
/* RXNE flag will be cleared by reading of DR register (done in call) */
/* Call function in charge of handling Character reception */
- LPUART1_CharReception_Callback();
+ USART2_CharReception_Callback();
}
- /* USER CODE END LPUART1_IRQn 0 */
- /* USER CODE BEGIN LPUART1_IRQn 1 */
+ /* USER CODE END USART2_IRQn 0 */
+ /* USER CODE BEGIN USART2_IRQn 1 */
/* If the IDLE flag is active */
- if (LL_LPUART_IsActiveFlag_IDLE(LPUART1) && LL_LPUART_IsEnabledIT_IDLE(LPUART1))
+ if (LL_USART_IsActiveFlag_IDLE(USART2) && LL_USART_IsEnabledIT_IDLE(USART2))
{
/* Clear the IDLE flag */
- LL_LPUART_ClearFlag_IDLE(LPUART1);
+ LL_USART_ClearFlag_IDLE(USART2);
/* Reset the buffer index */
- lpuart1_rx_message_len = lpuart1_rx_message_index;
- lpuart1_rx_message_index = 0;
- lpuart1_rx_done = 1;
- if (lpuart1_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE)
+ usart2_rx_message_len = usart2_rx_message_index;
+ usart2_rx_message_index = 0;
+ usart2_rx_done = 1;
+ if (usart2_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE)
{
- lpuart1_rx_message_too_long = 1;
+ usart2_rx_message_too_long = 1;
}
}
- /* USER CODE END LPUART1_IRQn 1 */
+ /* USER CODE END USART2_IRQn 1 */
}
/* USER CODE BEGIN 1 */
-void LPUART1_CharReception_Callback( void )
+void USART2_CharReception_Callback( void )
{
- uint16_t lpuart1_rx_bit = LL_LPUART_ReceiveData9(LPUART1);
- if (lpuart1_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE)
+ uint16_t usart2_rx_bit = LL_USART_ReceiveData9(USART2);
+ if (usart2_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE)
{
- modbus_buffer[lpuart1_rx_message_index] = (uint8_t)lpuart1_rx_bit;
+ modbus_buffer[usart2_rx_message_index] = (uint8_t)usart2_rx_bit;
}
- lpuart1_rx_message_index++;
+ usart2_rx_message_index++;
}
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/fw/Core/Startup/startup_stm32l031g6ux.s b/fw/Core/Startup/startup_stm32l031g6ux.s
new file mode 100644
index 0000000..62608af
--- /dev/null
+++ b/fw/Core/Startup/startup_stm32l031g6ux.s
@@ -0,0 +1,261 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32l031xx.s
+ * @author MCD Application Team
+ * @brief STM32L031xx Devices vector table for GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M0+ processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved. © Copyright(c) 2016 STMicroelectronics.
+ * All rights reserved.
+
+/** @addtogroup Peripheral_registers_structures
+ * @{
+ */
+
+/**
+ * @brief Analog to Digital Converter
+ */
+
+typedef struct
+{
+ __IO uint32_t ISR; /*!< ADC Interrupt and Status register, Address offset:0x00 */
+ __IO uint32_t IER; /*!< ADC Interrupt Enable register, Address offset:0x04 */
+ __IO uint32_t CR; /*!< ADC Control register, Address offset:0x08 */
+ __IO uint32_t CFGR1; /*!< ADC Configuration register 1, Address offset:0x0C */
+ __IO uint32_t CFGR2; /*!< ADC Configuration register 2, Address offset:0x10 */
+ __IO uint32_t SMPR; /*!< ADC Sampling time register, Address offset:0x14 */
+ uint32_t RESERVED1; /*!< Reserved, 0x18 */
+ uint32_t RESERVED2; /*!< Reserved, 0x1C */
+ __IO uint32_t TR; /*!< ADC watchdog threshold register, Address offset:0x20 */
+ uint32_t RESERVED3; /*!< Reserved, 0x24 */
+ __IO uint32_t CHSELR; /*!< ADC channel selection register, Address offset:0x28 */
+ uint32_t RESERVED4[5]; /*!< Reserved, 0x2C */
+ __IO uint32_t DR; /*!< ADC data register, Address offset:0x40 */
+ uint32_t RESERVED5[28]; /*!< Reserved, 0x44 - 0xB0 */
+ __IO uint32_t CALFACT; /*!< ADC data register, Address offset:0xB4 */
+} ADC_TypeDef;
+
+typedef struct
+{
+ __IO uint32_t CCR;
+} ADC_Common_TypeDef;
+
+
+/**
+ * @brief Comparator
+ */
+
+typedef struct
+{
+ __IO uint32_t CSR; /*!< COMP comparator control and status register, Address offset: 0x18 */
+} COMP_TypeDef;
+
+typedef struct
+{
+ __IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */
+} COMP_Common_TypeDef;
+
+
+/**
+* @brief CRC calculation unit
+*/
+
+typedef struct
+{
+__IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */
+__IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */
+uint8_t RESERVED0; /*!< Reserved, 0x05 */
+uint16_t RESERVED1; /*!< Reserved, 0x06 */
+__IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */
+uint32_t RESERVED2; /*!< Reserved, 0x0C */
+__IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */
+__IO uint32_t POL; /*!< CRC polynomial register, Address offset: 0x14 */
+} CRC_TypeDef;
+
+/**
+ * @brief Debug MCU
+ */
+
+typedef struct
+{
+ __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */
+ __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */
+ __IO uint32_t APB1FZ; /*!< Debug MCU APB1 freeze register, Address offset: 0x08 */
+ __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x0C */
+}DBGMCU_TypeDef;
+
+/**
+ * @brief DMA Controller
+ */
+
+typedef struct
+{
+ __IO uint32_t CCR; /*!< DMA channel x configuration register */
+ __IO uint32_t CNDTR; /*!< DMA channel x number of data register */
+ __IO uint32_t CPAR; /*!< DMA channel x peripheral address register */
+ __IO uint32_t CMAR; /*!< DMA channel x memory address register */
+} DMA_Channel_TypeDef;
+
+typedef struct
+{
+ __IO uint32_t ISR; /*!< DMA interrupt status register, Address offset: 0x00 */
+ __IO uint32_t IFCR; /*!< DMA interrupt flag clear register, Address offset: 0x04 */
+} DMA_TypeDef;
+
+typedef struct
+{
+ __IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8 */
+} DMA_Request_TypeDef;
+
+/**
+ * @brief External Interrupt/Event Controller
+ */
+
+typedef struct
+{
+ __IO uint32_t IMR; /*!TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)) ? 1UL : 0UL);
+ return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == \
+ (ClockTimeout)) ? 1UL : 0UL);
}
/**
@@ -1443,7 +1485,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
/**
* @brief Enable Error interrupts.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note Any of these errors will generate interrupt :
* Arbitration Loss (ARLO)
@@ -1463,7 +1505,7 @@ __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
/**
* @brief Disable Error interrupts.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note Any of these errors will generate interrupt :
* Arbitration Loss (ARLO)
@@ -1645,7 +1687,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus PEC error flag in reception.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: Clear default value.
* SET: When the received PEC does not match with the PEC register content.
@@ -1660,7 +1702,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus Timeout detection flag.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: Clear default value.
* SET: When a timeout or extended clock timeout occurs.
@@ -1675,7 +1717,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
/**
* @brief Indicate the status of SMBus alert flag.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @note RESET: Clear default value.
* SET: When SMBus host configuration, SMBus alert enabled and
@@ -1782,7 +1824,7 @@ __STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
/**
* @brief Clear SMBus PEC error flag.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
* @param I2Cx I2C Instance.
@@ -1795,7 +1837,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
/**
* @brief Clear SMBus Timeout detection flag.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
* @param I2Cx I2C Instance.
@@ -1808,7 +1850,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
/**
* @brief Clear SMBus Alert flag.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
* @param I2Cx I2C Instance.
@@ -1923,7 +1965,8 @@ __STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
}
/**
- * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
+ * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code
+ or next received byte.
* @note Usage in Slave mode only.
* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
* @param I2Cx I2C Instance.
@@ -1964,7 +2007,8 @@ __STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
/**
* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
* @note The master sends the complete 10bit slave address read sequence :
- * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
+ * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address
+ in Read direction.
* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
* @param I2Cx I2C Instance.
* @retval None
@@ -2125,9 +2169,10 @@ __STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
/**
* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
- * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
+ * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition
+ or an Address Matched is received.
* This bit has no effect when RELOAD bit is set.
* This bit has no effect in device mode when SBC bit is not set.
* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
@@ -2141,7 +2186,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
/**
* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
* @param I2Cx I2C Instance.
@@ -2154,7 +2199,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
/**
* @brief Get the SMBus Packet Error byte calculated.
- * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
+ * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
* SMBus feature is supported by the I2Cx Instance.
* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
* @param I2Cx I2C Instance.
diff --git a/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h b/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h
index 74d4271..1c4e241 100644
--- a/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h
+++ b/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h
@@ -150,24 +150,29 @@ typedef struct
uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
- This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_SetPrescaler().*/
uint32_t CounterMode; /*!< Specifies the counter mode.
This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
- This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_SetCounterMode().*/
uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active
Auto-Reload Register at the next update event.
This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
- Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF.
+ Some timer instances may support 32 bits counters. In that case this parameter must
+ be a number between 0x0000 and 0xFFFFFFFF.
- This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_SetAutoReload().*/
uint32_t ClockDivision; /*!< Specifies the clock division.
This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
- This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_SetClockDivision().*/
} LL_TIM_InitTypeDef;
/**
@@ -178,22 +183,26 @@ typedef struct
uint32_t OCMode; /*!< Specifies the output mode.
This parameter can be a value of @ref TIM_LL_EC_OCMODE.
- This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_OC_SetMode().*/
uint32_t OCState; /*!< Specifies the TIM Output Compare state.
This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
- This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
+ This feature can be modified afterwards using unitary functions
+ @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register.
This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
- This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/
+ This feature can be modified afterwards using unitary function
+ LL_TIM_OC_SetCompareCHx (x=1..6).*/
uint32_t OCPolarity; /*!< Specifies the output polarity.
This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
- This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_OC_SetPolarity().*/
} LL_TIM_OC_InitTypeDef;
@@ -208,22 +217,26 @@ typedef struct
uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetPolarity().*/
uint32_t ICActiveInput; /*!< Specifies the input.
This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetActiveInput().*/
uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
This parameter can be a value of @ref TIM_LL_EC_ICPSC.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetPrescaler().*/
uint32_t ICFilter; /*!< Specifies the input capture filter.
This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetFilter().*/
} LL_TIM_IC_InitTypeDef;
@@ -235,47 +248,56 @@ typedef struct
uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
- This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_SetEncoderMode().*/
uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetPolarity().*/
uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetActiveInput().*/
uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
This parameter can be a value of @ref TIM_LL_EC_ICPSC.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetPrescaler().*/
uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetFilter().*/
uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input.
This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetPolarity().*/
uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source
This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetActiveInput().*/
uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value.
This parameter can be a value of @ref TIM_LL_EC_ICPSC.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetPrescaler().*/
uint32_t IC2Filter; /*!< Specifies the TI2 input filter.
This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
- This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
+ This feature can be modified afterwards using unitary function
+ @ref LL_TIM_IC_SetFilter().*/
} LL_TIM_ENCODER_InitTypeDef;
@@ -334,8 +356,8 @@ typedef struct
/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
* @{
*/
-#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter is not stopped at update event */
-#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter stops counting at the next update event */
+#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at the next update event */
+#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at update event */
/**
* @}
*/
@@ -822,7 +844,8 @@ typedef struct
((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U)
/**
- * @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay.
+ * @brief HELPER macro calculating the compare value required to achieve the required timer output compare
+ * active/inactive delay.
* @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
* @param __TIMCLK__ timer input clock frequency (in Hz)
* @param __PSC__ prescaler
@@ -834,7 +857,8 @@ typedef struct
/ ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
/**
- * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode).
+ * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration
+ * (when the timer operates in one pulse mode).
* @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
* @param __TIMCLK__ timer input clock frequency (in Hz)
* @param __PSC__ prescaler
@@ -1091,7 +1115,8 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx)
}
/**
- * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
+ * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators
+ * (when supported) and the digital filters.
* @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
* whether or not the clock division feature is supported by the timer
* instance.
@@ -1109,7 +1134,8 @@ __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDi
}
/**
- * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
+ * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time
+ * generators (when supported) and the digital filters.
* @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
* whether or not the clock division feature is supported by the timer
* instance.
@@ -1368,7 +1394,7 @@ __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
+ MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
}
/**
@@ -1397,7 +1423,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
+ return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
}
/**
@@ -1804,7 +1830,8 @@ __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint3
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
__IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]),
- ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]);
+ ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) \
+ << SHIFT_TAB_ICxx[iChannel]);
MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
(Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
}
@@ -2685,7 +2712,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
}
/**
- * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending).
+ * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set
+ * (Capture/Compare 1 interrupt is pending).
* @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
@@ -2707,7 +2735,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
}
/**
- * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending).
+ * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set
+ * (Capture/Compare 2 over-capture interrupt is pending).
* @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
@@ -2729,7 +2758,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
}
/**
- * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending).
+ * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set
+ * (Capture/Compare 3 over-capture interrupt is pending).
* @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
@@ -2751,7 +2781,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
}
/**
- * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending).
+ * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set
+ * (Capture/Compare 4 over-capture interrupt is pending).
* @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
@@ -2970,7 +3001,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
* @}
*/
-/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
+/** @defgroup TIM_LL_EF_DMA_Management DMA Management
* @{
*/
/**
diff --git a/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h b/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h
new file mode 100644
index 0000000..c4887f5
--- /dev/null
+++ b/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h
@@ -0,0 +1,3751 @@
+/**
+ ******************************************************************************
+ * @file stm32l0xx_ll_usart.h
+ * @author MCD Application Team
+ * @brief Header file of USART LL module.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2021 STMicroelectronics.
+** All rights reserved.
-
+
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diff --git a/fw_old/.mxproject b/fw_old/.mxproject
new file mode 100644
index 0000000..4d4db74
--- /dev/null
+++ b/fw_old/.mxproject
@@ -0,0 +1,24 @@
+[PreviousLibFiles]
+LibFiles=Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm3.h;
+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core/Src/main.c;Core/Src/stm32l0xx_it.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Core/Src/system_stm32l0xx.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Core/Src/system_stm32l0xx.c;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;;
+HeaderPath=Drivers/STM32L0xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32L0xx/Include;Drivers/CMSIS/Include;Core/Inc;
+CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32L011xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;
+
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=3
+HeaderFiles#0=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Inc/stm32l0xx_it.h
+HeaderFiles#1=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Inc/stm32_assert.h
+HeaderFiles#2=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Inc/main.h
+HeaderFolderListSize=1
+HeaderPath#0=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Inc
+HeaderFiles=;
+SourceFileListSize=2
+SourceFiles#0=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Src/stm32l0xx_it.c
+SourceFiles#1=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Src/main.c
+SourceFolderListSize=1
+SourcePath#0=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Src
+SourceFiles=;
+
diff --git a/fw_old/.project b/fw_old/.project
new file mode 100644
index 0000000..6232ccb
--- /dev/null
+++ b/fw_old/.project
@@ -0,0 +1,33 @@
+
+
+ iaq_wired_sensor
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
diff --git a/fw_old/.settings/org.eclipse.cdt.codan.core.prefs b/fw_old/.settings/org.eclipse.cdt.codan.core.prefs
new file mode 100644
index 0000000..19f7155
--- /dev/null
+++ b/fw_old/.settings/org.eclipse.cdt.codan.core.prefs
@@ -0,0 +1,72 @@
+com.st.stm32cube.ide.mcu.ide.oss.source.checker.libnano.problem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Float formatting support\\")"}
+eclipse.preferences.version=1
+org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false}
+org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused return value\\")"}
+org.eclipse.cdt.codan.checkers.localvarreturn=-Warning
+org.eclipse.cdt.codan.checkers.localvarreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Returning the address of a local variable\\")"}
+org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Nesting comments\\")"}
+org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Line comments\\")"}
+org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return value\\")",implicit\=>false}
+org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Abstract class cannot be instantiated\\")"}
+org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Ambiguous problem\\")"}
+org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment in condition\\")"}
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+org.eclipse.cdt.codan.internal.checkers.BlacklistProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.BlacklistProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function or method is blacklisted\\")",blacklist\=>()}
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+org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class members should be properly initialized\\")",skip\=>true}
+org.eclipse.cdt.codan.internal.checkers.CopyrightProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.CopyrightProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Lack of copyright information\\")",regex\=>".*Copyright.*"}
+org.eclipse.cdt.codan.internal.checkers.DecltypeAutoProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid 'decltype(auto)' specifier\\")"}
+org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Field cannot be resolved\\")"}
+org.eclipse.cdt.codan.internal.checkers.FloatCompareProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.FloatCompareProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Direct float comparison\\")"}
+org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function cannot be resolved\\")"}
+org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Goto statement used\\")"}
+org.eclipse.cdt.codan.internal.checkers.InvalidArguments.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid arguments\\")"}
+org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid template argument\\")"}
+org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Label statement not found\\")"}
+org.eclipse.cdt.codan.internal.checkers.MagicNumberProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.MagicNumberProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Avoid magic numbers\\")",checkArray\=>true,checkOperatorParen\=>true,exceptions\=>(1,0,-1,2,1.0,0.0,-1.0)}
+org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Member declaration not found\\")"}
+org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Method cannot be resolved\\")"}
+org.eclipse.cdt.codan.internal.checkers.MissCaseProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.MissCaseProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing cases in switch\\")"}
+org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing default in switch\\")",defaultWithAllEnums\=>false}
+org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing reference return value in assignment operator\\")"}
+org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing self check in assignment operator\\")"}
+org.eclipse.cdt.codan.internal.checkers.MultipleDeclarationsProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.MultipleDeclarationsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Multiple variable declaration\\")"}
+org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Name convention for function\\")",pattern\=>"^[a-z]",macro\=>true,exceptions\=>()}
+org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class has a virtual method and non-virtual destructor\\")"}
+org.eclipse.cdt.codan.internal.checkers.OverloadProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid overload\\")"}
+org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redeclaration\\")"}
+org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redefinition\\")"}
+org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"}
+org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"}
+org.eclipse.cdt.codan.internal.checkers.ShallowCopyProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.ShallowCopyProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Miss copy constructor or assignment operator\\")",onlynew\=>false}
+org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Statement has no effect\\")",macro\=>true,exceptions\=>()}
+org.eclipse.cdt.codan.internal.checkers.StaticVariableInHeaderProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.StaticVariableInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Static variable in header file\\")"}
+org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suggested parenthesis around expression\\")",paramNot\=>false}
+org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suspicious semicolon\\")",else\=>false,afterelse\=>false}
+org.eclipse.cdt.codan.internal.checkers.SymbolShadowingProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.SymbolShadowingProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol shadowing\\")",paramFuncParameters\=>true}
+org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Type cannot be resolved\\")"}
+org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused function declaration\\")",macro\=>true}
+org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused static function\\")",macro\=>true}
+org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")}
+org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem=-Warning
+org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Using directive in header\\")"}
+org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"}
+org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem=-Error
+org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Virtual method call in constructor/destructor\\")"}
diff --git a/fw_old/.settings/org.eclipse.cdt.core.prefs b/fw_old/.settings/org.eclipse.cdt.core.prefs
new file mode 100644
index 0000000..c8ec5df
--- /dev/null
+++ b/fw_old/.settings/org.eclipse.cdt.core.prefs
@@ -0,0 +1,6 @@
+doxygen/doxygen_new_line_after_brief=true
+doxygen/doxygen_use_brief_tag=false
+doxygen/doxygen_use_javadoc_tags=true
+doxygen/doxygen_use_pre_tag=false
+doxygen/doxygen_use_structural_commands=false
+eclipse.preferences.version=1
diff --git a/fw_old/.settings/stm32cubeide.project.prefs b/fw_old/.settings/stm32cubeide.project.prefs
new file mode 100644
index 0000000..ae186d6
--- /dev/null
+++ b/fw_old/.settings/stm32cubeide.project.prefs
@@ -0,0 +1,3 @@
+8DF89ED150041C4CBC7CB9A9CAA90856=295E78E9D51884086204F31037537306
+DC22A860405A8BF2F2C095E5B6529F12=295E78E9D51884086204F31037537306
+eclipse.preferences.version=1
diff --git a/fw_old/Core/Inc/config.h b/fw_old/Core/Inc/config.h
new file mode 100644
index 0000000..c512299
--- /dev/null
+++ b/fw_old/Core/Inc/config.h
@@ -0,0 +1,145 @@
+/*
+ * config.h
+ *
+ * Created on: Sep 5, 2021
+ * Author: david
+ */
+
+#ifndef INC_CONFIG_H_
+#define INC_CONFIG_H_
+
+/* TODO: add comments to everything */
+
+/* EXAMPLE of USAGE */
+/*
+config_t new_config;
+new_config.led_co2_alert_limit1 = 1000;
+new_config.led_co2_alert_limit2 = 2000;
+new_config.led_on = 1;
+new_config.modbus_addr = 0x11;
+config_write(&new_config);
+
+config_t config;
+config_read(&config);
+*/
+
+#include "stdint.h"
+#include "stm32l0xx.h"
+/* DESCRIPTION OF THE DATA STRUCTURE */
+/*
+ * Data are divided into two groups:
+ * A) DEVICE DESCRIPTION
+ * Can not be changed by the user.
+ * These data can be only read.
+ * These data are:
+ * * VENDOR NAME
+ * * PRODUCT CODE
+ * * PRODUCT NAME
+ * * REVISION
+ * * SERIAL NUMBER
+ * B) DEVICE CONFIGURATION
+ * Can be changed by the user.
+ * These data are:
+ * * MODBUS ADDRESS - Modbus Address of the device. Default is 254
+ * * LED ON - Whether the CO2 Level Indication LED should be on or off
+ * * LED CO2 ALERT LIMIT 1 - CO2 Level when the LED color changes Green<->Yellow
+ * * LED CO2 ALERT LIMIT 2 - CO2 Level when the LED color changes Yellow<->Red
+ *
+ * Device description data can be accessed using direct readout from the memory
+ * Device configuration data can be accessed using config_t struct.
+ */
+#define CONFIG_DEFAULT_LED_ON 1
+#define CONFIG_DEFAULT_LED_BRIGHTNESS 100 /* TODO: set according to the timers when this will be implemented */
+#define CONFIG_DEFAULT_LED_ALERT1_LIMIT 1500
+#define CONFIG_DEFAULT_LED_ALERT2_LIMIT 3000
+#define CONFIG_DEFAULT_LED_SMOOTH 0
+#define CONFIG_DEFAULT_SCD4x_T_OFFSET 0
+#define CONFIG_DEFAULT_BAUDRATE_INDEX 0
+
+#define CONFIG_MODBUS_ADDR_LENGTH 2
+#define CONFIG_BAUDRATE_INDEX_LENGTH 2
+#define CONFIG_LED_ON_LENGTH 2
+#define CONFIG_LED_BRIGHTNESS_LENGTH 2
+#define CONFIG_LED_SMOOTH_LENGTH 2
+#define CONFIG_LED_ALERT1_LENGTH 2
+#define CONFIG_LED_ALERT2_LENGTH 2
+#define CONFIG_LED_ALERT2_LENGTH 2
+#define CONFIG_SCD4x_T_OFFSET_LENGTH 2
+#define VENDOR_NAME_LENGTH 64
+#define PRODUCT_CODE_LENGTH 64
+#define PRODUCT_NAME_LENGTH 64
+#define REVISION_LENGTH 16
+#define SERIAL_NUMBER_LENGTH 64
+
+#define EEPROM_EMPTY_BYTE 0x00
+
+#define EEPROM_ADDR_START ((uint32_t)0x08080000)
+#define EEPROM_ADDR_END ((uint32_t)0x080801FF)
+
+#define CONFIG_EEPROM_ADDR_MODBUS_ADDR EEPROM_ADDR_START
+#define CONFIG_EEPROM_ADDR_BAUDRATE_INDEX (CONFIG_EEPROM_ADDR_MODBUS_ADDR + CONFIG_MODBUS_ADDR_LENGTH)
+#define CONFIG_EEPROM_ADDR_LED_ON (CONFIG_EEPROM_ADDR_BAUDRATE_INDEX + CONFIG_BAUDRATE_INDEX_LENGTH)
+#define CONFIG_EEPROM_ADDR_LED_BRIGHTNESS (CONFIG_EEPROM_ADDR_LED_ON + CONFIG_LED_ON_LENGTH)
+#define CONFIG_EEPROM_ADDR_LED_SMOOTH (CONFIG_EEPROM_ADDR_LED_BRIGHTNESS + CONFIG_LED_BRIGHTNESS_LENGTH)
+#define CONFIG_EEPROM_ADDR_LED_ALERT1 (CONFIG_EEPROM_ADDR_LED_SMOOTH + CONFIG_LED_SMOOTH_LENGTH)
+#define CONFIG_EEPROM_ADDR_LED_ALERT2 (CONFIG_EEPROM_ADDR_LED_ALERT1 + CONFIG_LED_ALERT1_LENGTH)
+#define CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET (CONFIG_EEPROM_ADDR_LED_ALERT2 + CONFIG_LED_ALERT2_LENGTH)
+
+#define CONFIG_EEPROM_ADDR_VENDOR_NAME (CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET + CONFIG_SCD4x_T_OFFSET_LENGTH)
+#define CONFIG_EEPROM_ADDR_PRODUCT_CODE (CONFIG_EEPROM_ADDR_VENDOR_NAME + VENDOR_NAME_LENGTH)
+#define CONFIG_EEPROM_ADDR_PRODUCT_NAME (CONFIG_EEPROM_ADDR_PRODUCT_CODE + PRODUCT_CODE_LENGTH)
+#define CONFIG_EEPROM_ADDR_REVISION (CONFIG_EEPROM_ADDR_PRODUCT_NAME + PRODUCT_NAME_LENGTH)
+#define CONFIG_EEPROM_ADDR_SERIAL_NUMBER (CONFIG_EEPROM_ADDR_REVISION + REVISION_LENGTH)
+
+#define FLASH_PEKEY1 ((uint32_t)0x89ABCDEF)
+#define FLASH_PEKEY2 ((uint32_t)0x02030405)
+
+#define CONFIG_OK 0
+#define CONFIG_ERROR -1
+
+#define EEPROM_OK 0
+#define EEPROM_ERROR -1
+#define EEPROM_UNLOCK_ERROR -2
+#define EEPROM_LOCK_ERROR -3
+#define EEPROM_WRITE_ERROR -4
+#define EEPROM_ADDR_ERROR -5
+
+#define SYSTICK_FREQ_HZ 12000000
+#define EEPROM_TIMEOUT_MAX_MS_INV 200
+
+/*
+ * Variables
+ */
+
+extern const uint32_t config_baudrates[];
+extern const uint8_t config_baudrates_length;
+
+/*
+ * Type definitions
+ */
+
+typedef struct
+{
+ /* LED CONFIG */
+ uint8_t led_on;
+ uint16_t led_brightness;
+ uint8_t led_smooth;
+ uint16_t led_co2_alert_limit1;
+ uint16_t led_co2_alert_limit2;
+
+ /* SCD4x Temperature sensor offset */
+ int16_t scd4x_t_offset;
+
+ /* MODBUS CONFIG */
+ uint16_t modbus_addr;
+ uint32_t baudrate_index;
+} config_t;
+
+
+/* const uint32_t baudrates [] = {19200, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400, 57600, 76800, 115200}; */
+
+int8_t config_read(config_t *config);
+int8_t config_write(config_t *config);
+
+#endif /* INC_CONFIG_H_ */
+
diff --git a/fw_old/Core/Inc/crc8.h b/fw_old/Core/Inc/crc8.h
new file mode 100644
index 0000000..e799f7e
--- /dev/null
+++ b/fw_old/Core/Inc/crc8.h
@@ -0,0 +1,22 @@
+/*
+ * crc.h
+ *
+ * Created on: Jun 9, 2021
+ * Author: user
+ */
+
+#ifndef INC_CRC8_H_
+#define INC_CRC8_H_
+
+#include "stdint.h"
+
+/*
+ * Definitions & macros
+ */
+
+#define CRC8_POLYNOMIAL 0x31
+#define CRC8_INIT 0xFF
+
+uint8_t crc8_calculate(const uint8_t *data, uint16_t count);
+
+#endif /* INC_CRC8_H_ */
diff --git a/fw_old/Core/Inc/i2c.h b/fw_old/Core/Inc/i2c.h
new file mode 100644
index 0000000..f346e68
--- /dev/null
+++ b/fw_old/Core/Inc/i2c.h
@@ -0,0 +1,46 @@
+/*
+ * i2c.h
+ *
+ * Created on: Jun 8, 2021
+ * Author: user
+ */
+
+#ifndef INC_I2C_H_
+#define INC_I2C_H_
+
+#include "stdint.h"
+#include "stm32l0xx_ll_i2c.h"
+
+/*
+ * Defines & macros
+ */
+
+#define NULL 0
+
+/*
+ * Return values for I2C functions
+ */
+
+#define I2C_OK 0
+#define I2C_ERROR -1 // generic error
+#define I2C_ERROR_NACK -2 // NACK was received during transfer
+#define I2C_ERROR_TX_INCOMPLETE -3 // number of TXed bytes != buffer length
+#define I2C_ERROR_RX_INCOMPLETE -4 // number of RXed bytes != buffer length
+
+/*
+ * Type definitions
+ */
+
+typedef struct {
+ I2C_TypeDef *i2c;
+} i2c_context_t;
+
+/*
+ * Function declarations
+ */
+
+int i2c_init(i2c_context_t *context);
+int i2c_transmit(uint8_t address, uint8_t *buffer, int len);
+int i2c_receive(uint8_t address, uint8_t *buffer, int len);
+
+#endif /* INC_I2C_H_ */
diff --git a/fw_old/Core/Inc/main.h b/fw_old/Core/Inc/main.h
new file mode 100644
index 0000000..a144a49
--- /dev/null
+++ b/fw_old/Core/Inc/main.h
@@ -0,0 +1,120 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2018 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+//#undef errno
+extern int errno;
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+register char * stack_ptr asm("sp");
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/fw_old/Core/Src/sysmem.c b/fw_old/Core/Src/sysmem.c
new file mode 100644
index 0000000..d7cc52c
--- /dev/null
+++ b/fw_old/Core/Src/sysmem.c
@@ -0,0 +1,80 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/fw_old/Core/Src/system_stm32l0xx.c b/fw_old/Core/Src/system_stm32l0xx.c
new file mode 100644
index 0000000..9189ed8
--- /dev/null
+++ b/fw_old/Core/Src/system_stm32l0xx.c
@@ -0,0 +1,275 @@
+/**
+ ******************************************************************************
+ * @file system_stm32l0xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32l0xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright(c) 2016 STMicroelectronics.
+ * All rights reserved. :
+ 80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc )
+ 80000ea: b510 push {r4, lr}
+ 80000ec: 2b00 cmp r3, #0
+ 80000ee: d003 beq.n 80000f8
+ 80000f0: 4903 ldr r1, [pc, #12] ; (8000100 )
+ 80000f2: 4804 ldr r0, [pc, #16] ; (8000104 )
+ 80000f4: e000 b.n 80000f8
+ 80000f6: bf00 nop
+ 80000f8: bd10 pop {r4, pc}
+ 80000fa: 46c0 nop ; (mov r8, r8)
+ 80000fc: 00000000 .word 0x00000000
+ 8000100: 2000000c .word 0x2000000c
+ 8000104: 08003620 .word 0x08003620
+
+08000108 <__udivsi3>:
+ 8000108: 2200 movs r2, #0
+ 800010a: 0843 lsrs r3, r0, #1
+ 800010c: 428b cmp r3, r1
+ 800010e: d374 bcc.n 80001fa <__udivsi3+0xf2>
+ 8000110: 0903 lsrs r3, r0, #4
+ 8000112: 428b cmp r3, r1
+ 8000114: d35f bcc.n 80001d6 <__udivsi3+0xce>
+ 8000116: 0a03 lsrs r3, r0, #8
+ 8000118: 428b cmp r3, r1
+ 800011a: d344 bcc.n 80001a6 <__udivsi3+0x9e>
+ 800011c: 0b03 lsrs r3, r0, #12
+ 800011e: 428b cmp r3, r1
+ 8000120: d328 bcc.n 8000174 <__udivsi3+0x6c>
+ 8000122: 0c03 lsrs r3, r0, #16
+ 8000124: 428b cmp r3, r1
+ 8000126: d30d bcc.n 8000144 <__udivsi3+0x3c>
+ 8000128: 22ff movs r2, #255 ; 0xff
+ 800012a: 0209 lsls r1, r1, #8
+ 800012c: ba12 rev r2, r2
+ 800012e: 0c03 lsrs r3, r0, #16
+ 8000130: 428b cmp r3, r1
+ 8000132: d302 bcc.n 800013a <__udivsi3+0x32>
+ 8000134: 1212 asrs r2, r2, #8
+ 8000136: 0209 lsls r1, r1, #8
+ 8000138: d065 beq.n 8000206 <__udivsi3+0xfe>
+ 800013a: 0b03 lsrs r3, r0, #12
+ 800013c: 428b cmp r3, r1
+ 800013e: d319 bcc.n 8000174 <__udivsi3+0x6c>
+ 8000140: e000 b.n 8000144 <__udivsi3+0x3c>
+ 8000142: 0a09 lsrs r1, r1, #8
+ 8000144: 0bc3 lsrs r3, r0, #15
+ 8000146: 428b cmp r3, r1
+ 8000148: d301 bcc.n 800014e <__udivsi3+0x46>
+ 800014a: 03cb lsls r3, r1, #15
+ 800014c: 1ac0 subs r0, r0, r3
+ 800014e: 4152 adcs r2, r2
+ 8000150: 0b83 lsrs r3, r0, #14
+ 8000152: 428b cmp r3, r1
+ 8000154: d301 bcc.n 800015a <__udivsi3+0x52>
+ 8000156: 038b lsls r3, r1, #14
+ 8000158: 1ac0 subs r0, r0, r3
+ 800015a: 4152 adcs r2, r2
+ 800015c: 0b43 lsrs r3, r0, #13
+ 800015e: 428b cmp r3, r1
+ 8000160: d301 bcc.n 8000166 <__udivsi3+0x5e>
+ 8000162: 034b lsls r3, r1, #13
+ 8000164: 1ac0 subs r0, r0, r3
+ 8000166: 4152 adcs r2, r2
+ 8000168: 0b03 lsrs r3, r0, #12
+ 800016a: 428b cmp r3, r1
+ 800016c: d301 bcc.n 8000172 <__udivsi3+0x6a>
+ 800016e: 030b lsls r3, r1, #12
+ 8000170: 1ac0 subs r0, r0, r3
+ 8000172: 4152 adcs r2, r2
+ 8000174: 0ac3 lsrs r3, r0, #11
+ 8000176: 428b cmp r3, r1
+ 8000178: d301 bcc.n 800017e <__udivsi3+0x76>
+ 800017a: 02cb lsls r3, r1, #11
+ 800017c: 1ac0 subs r0, r0, r3
+ 800017e: 4152 adcs r2, r2
+ 8000180: 0a83 lsrs r3, r0, #10
+ 8000182: 428b cmp r3, r1
+ 8000184: d301 bcc.n 800018a <__udivsi3+0x82>
+ 8000186: 028b lsls r3, r1, #10
+ 8000188: 1ac0 subs r0, r0, r3
+ 800018a: 4152 adcs r2, r2
+ 800018c: 0a43 lsrs r3, r0, #9
+ 800018e: 428b cmp r3, r1
+ 8000190: d301 bcc.n 8000196 <__udivsi3+0x8e>
+ 8000192: 024b lsls r3, r1, #9
+ 8000194: 1ac0 subs r0, r0, r3
+ 8000196: 4152 adcs r2, r2
+ 8000198: 0a03 lsrs r3, r0, #8
+ 800019a: 428b cmp r3, r1
+ 800019c: d301 bcc.n 80001a2 <__udivsi3+0x9a>
+ 800019e: 020b lsls r3, r1, #8
+ 80001a0: 1ac0 subs r0, r0, r3
+ 80001a2: 4152 adcs r2, r2
+ 80001a4: d2cd bcs.n 8000142 <__udivsi3+0x3a>
+ 80001a6: 09c3 lsrs r3, r0, #7
+ 80001a8: 428b cmp r3, r1
+ 80001aa: d301 bcc.n 80001b0 <__udivsi3+0xa8>
+ 80001ac: 01cb lsls r3, r1, #7
+ 80001ae: 1ac0 subs r0, r0, r3
+ 80001b0: 4152 adcs r2, r2
+ 80001b2: 0983 lsrs r3, r0, #6
+ 80001b4: 428b cmp r3, r1
+ 80001b6: d301 bcc.n 80001bc <__udivsi3+0xb4>
+ 80001b8: 018b lsls r3, r1, #6
+ 80001ba: 1ac0 subs r0, r0, r3
+ 80001bc: 4152 adcs r2, r2
+ 80001be: 0943 lsrs r3, r0, #5
+ 80001c0: 428b cmp r3, r1
+ 80001c2: d301 bcc.n 80001c8 <__udivsi3+0xc0>
+ 80001c4: 014b lsls r3, r1, #5
+ 80001c6: 1ac0 subs r0, r0, r3
+ 80001c8: 4152 adcs r2, r2
+ 80001ca: 0903 lsrs r3, r0, #4
+ 80001cc: 428b cmp r3, r1
+ 80001ce: d301 bcc.n 80001d4 <__udivsi3+0xcc>
+ 80001d0: 010b lsls r3, r1, #4
+ 80001d2: 1ac0 subs r0, r0, r3
+ 80001d4: 4152 adcs r2, r2
+ 80001d6: 08c3 lsrs r3, r0, #3
+ 80001d8: 428b cmp r3, r1
+ 80001da: d301 bcc.n 80001e0 <__udivsi3+0xd8>
+ 80001dc: 00cb lsls r3, r1, #3
+ 80001de: 1ac0 subs r0, r0, r3
+ 80001e0: 4152 adcs r2, r2
+ 80001e2: 0883 lsrs r3, r0, #2
+ 80001e4: 428b cmp r3, r1
+ 80001e6: d301 bcc.n 80001ec <__udivsi3+0xe4>
+ 80001e8: 008b lsls r3, r1, #2
+ 80001ea: 1ac0 subs r0, r0, r3
+ 80001ec: 4152 adcs r2, r2
+ 80001ee: 0843 lsrs r3, r0, #1
+ 80001f0: 428b cmp r3, r1
+ 80001f2: d301 bcc.n 80001f8 <__udivsi3+0xf0>
+ 80001f4: 004b lsls r3, r1, #1
+ 80001f6: 1ac0 subs r0, r0, r3
+ 80001f8: 4152 adcs r2, r2
+ 80001fa: 1a41 subs r1, r0, r1
+ 80001fc: d200 bcs.n 8000200 <__udivsi3+0xf8>
+ 80001fe: 4601 mov r1, r0
+ 8000200: 4152 adcs r2, r2
+ 8000202: 4610 mov r0, r2
+ 8000204: 4770 bx lr
+ 8000206: e7ff b.n 8000208 <__udivsi3+0x100>
+ 8000208: b501 push {r0, lr}
+ 800020a: 2000 movs r0, #0
+ 800020c: f000 f806 bl 800021c <__aeabi_idiv0>
+ 8000210: bd02 pop {r1, pc}
+ 8000212: 46c0 nop ; (mov r8, r8)
+
+08000214 <__aeabi_uidivmod>:
+ 8000214: 2900 cmp r1, #0
+ 8000216: d0f7 beq.n 8000208 <__udivsi3+0x100>
+ 8000218: e776 b.n 8000108 <__udivsi3>
+ 800021a: 4770 bx lr
+
+0800021c <__aeabi_idiv0>:
+ 800021c: 4770 bx lr
+ 800021e: 46c0 nop ; (mov r8, r8)
+
+08000220 <__aeabi_uldivmod>:
+ 8000220: 2b00 cmp r3, #0
+ 8000222: d111 bne.n 8000248 <__aeabi_uldivmod+0x28>
+ 8000224: 2a00 cmp r2, #0
+ 8000226: d10f bne.n 8000248 <__aeabi_uldivmod+0x28>
+ 8000228: 2900 cmp r1, #0
+ 800022a: d100 bne.n 800022e <__aeabi_uldivmod+0xe>
+ 800022c: 2800 cmp r0, #0
+ 800022e: d002 beq.n 8000236 <__aeabi_uldivmod+0x16>
+ 8000230: 2100 movs r1, #0
+ 8000232: 43c9 mvns r1, r1
+ 8000234: 1c08 adds r0, r1, #0
+ 8000236: b407 push {r0, r1, r2}
+ 8000238: 4802 ldr r0, [pc, #8] ; (8000244 <__aeabi_uldivmod+0x24>)
+ 800023a: a102 add r1, pc, #8 ; (adr r1, 8000244 <__aeabi_uldivmod+0x24>)
+ 800023c: 1840 adds r0, r0, r1
+ 800023e: 9002 str r0, [sp, #8]
+ 8000240: bd03 pop {r0, r1, pc}
+ 8000242: 46c0 nop ; (mov r8, r8)
+ 8000244: ffffffd9 .word 0xffffffd9
+ 8000248: b403 push {r0, r1}
+ 800024a: 4668 mov r0, sp
+ 800024c: b501 push {r0, lr}
+ 800024e: 9802 ldr r0, [sp, #8]
+ 8000250: f000 f806 bl 8000260 <__udivmoddi4>
+ 8000254: 9b01 ldr r3, [sp, #4]
+ 8000256: 469e mov lr, r3
+ 8000258: b002 add sp, #8
+ 800025a: bc0c pop {r2, r3}
+ 800025c: 4770 bx lr
+ 800025e: 46c0 nop ; (mov r8, r8)
+
+08000260 <__udivmoddi4>:
+ 8000260: b5f0 push {r4, r5, r6, r7, lr}
+ 8000262: 4657 mov r7, sl
+ 8000264: 464e mov r6, r9
+ 8000266: 4645 mov r5, r8
+ 8000268: 46de mov lr, fp
+ 800026a: b5e0 push {r5, r6, r7, lr}
+ 800026c: 0004 movs r4, r0
+ 800026e: 000d movs r5, r1
+ 8000270: 4692 mov sl, r2
+ 8000272: 4699 mov r9, r3
+ 8000274: b083 sub sp, #12
+ 8000276: 428b cmp r3, r1
+ 8000278: d830 bhi.n 80002dc <__udivmoddi4+0x7c>
+ 800027a: d02d beq.n 80002d8 <__udivmoddi4+0x78>
+ 800027c: 4649 mov r1, r9
+ 800027e: 4650 mov r0, sl
+ 8000280: f000 f8ba bl 80003f8 <__clzdi2>
+ 8000284: 0029 movs r1, r5
+ 8000286: 0006 movs r6, r0
+ 8000288: 0020 movs r0, r4
+ 800028a: f000 f8b5 bl 80003f8 <__clzdi2>
+ 800028e: 1a33 subs r3, r6, r0
+ 8000290: 4698 mov r8, r3
+ 8000292: 3b20 subs r3, #32
+ 8000294: 469b mov fp, r3
+ 8000296: d433 bmi.n 8000300 <__udivmoddi4+0xa0>
+ 8000298: 465a mov r2, fp
+ 800029a: 4653 mov r3, sl
+ 800029c: 4093 lsls r3, r2
+ 800029e: 4642 mov r2, r8
+ 80002a0: 001f movs r7, r3
+ 80002a2: 4653 mov r3, sl
+ 80002a4: 4093 lsls r3, r2
+ 80002a6: 001e movs r6, r3
+ 80002a8: 42af cmp r7, r5
+ 80002aa: d83a bhi.n 8000322 <__udivmoddi4+0xc2>
+ 80002ac: 42af cmp r7, r5
+ 80002ae: d100 bne.n 80002b2 <__udivmoddi4+0x52>
+ 80002b0: e078 b.n 80003a4 <__udivmoddi4+0x144>
+ 80002b2: 465b mov r3, fp
+ 80002b4: 1ba4 subs r4, r4, r6
+ 80002b6: 41bd sbcs r5, r7
+ 80002b8: 2b00 cmp r3, #0
+ 80002ba: da00 bge.n 80002be <__udivmoddi4+0x5e>
+ 80002bc: e075 b.n 80003aa <__udivmoddi4+0x14a>
+ 80002be: 2200 movs r2, #0
+ 80002c0: 2300 movs r3, #0
+ 80002c2: 9200 str r2, [sp, #0]
+ 80002c4: 9301 str r3, [sp, #4]
+ 80002c6: 2301 movs r3, #1
+ 80002c8: 465a mov r2, fp
+ 80002ca: 4093 lsls r3, r2
+ 80002cc: 9301 str r3, [sp, #4]
+ 80002ce: 2301 movs r3, #1
+ 80002d0: 4642 mov r2, r8
+ 80002d2: 4093 lsls r3, r2
+ 80002d4: 9300 str r3, [sp, #0]
+ 80002d6: e028 b.n 800032a <__udivmoddi4+0xca>
+ 80002d8: 4282 cmp r2, r0
+ 80002da: d9cf bls.n 800027c <__udivmoddi4+0x1c>
+ 80002dc: 2200 movs r2, #0
+ 80002de: 2300 movs r3, #0
+ 80002e0: 9200 str r2, [sp, #0]
+ 80002e2: 9301 str r3, [sp, #4]
+ 80002e4: 9b0c ldr r3, [sp, #48] ; 0x30
+ 80002e6: 2b00 cmp r3, #0
+ 80002e8: d001 beq.n 80002ee <__udivmoddi4+0x8e>
+ 80002ea: 601c str r4, [r3, #0]
+ 80002ec: 605d str r5, [r3, #4]
+ 80002ee: 9800 ldr r0, [sp, #0]
+ 80002f0: 9901 ldr r1, [sp, #4]
+ 80002f2: b003 add sp, #12
+ 80002f4: bcf0 pop {r4, r5, r6, r7}
+ 80002f6: 46bb mov fp, r7
+ 80002f8: 46b2 mov sl, r6
+ 80002fa: 46a9 mov r9, r5
+ 80002fc: 46a0 mov r8, r4
+ 80002fe: bdf0 pop {r4, r5, r6, r7, pc}
+ 8000300: 4642 mov r2, r8
+ 8000302: 2320 movs r3, #32
+ 8000304: 1a9b subs r3, r3, r2
+ 8000306: 4652 mov r2, sl
+ 8000308: 40da lsrs r2, r3
+ 800030a: 4641 mov r1, r8
+ 800030c: 0013 movs r3, r2
+ 800030e: 464a mov r2, r9
+ 8000310: 408a lsls r2, r1
+ 8000312: 0017 movs r7, r2
+ 8000314: 4642 mov r2, r8
+ 8000316: 431f orrs r7, r3
+ 8000318: 4653 mov r3, sl
+ 800031a: 4093 lsls r3, r2
+ 800031c: 001e movs r6, r3
+ 800031e: 42af cmp r7, r5
+ 8000320: d9c4 bls.n 80002ac <__udivmoddi4+0x4c>
+ 8000322: 2200 movs r2, #0
+ 8000324: 2300 movs r3, #0
+ 8000326: 9200 str r2, [sp, #0]
+ 8000328: 9301 str r3, [sp, #4]
+ 800032a: 4643 mov r3, r8
+ 800032c: 2b00 cmp r3, #0
+ 800032e: d0d9 beq.n 80002e4 <__udivmoddi4+0x84>
+ 8000330: 07fb lsls r3, r7, #31
+ 8000332: 0872 lsrs r2, r6, #1
+ 8000334: 431a orrs r2, r3
+ 8000336: 4646 mov r6, r8
+ 8000338: 087b lsrs r3, r7, #1
+ 800033a: e00e b.n 800035a <__udivmoddi4+0xfa>
+ 800033c: 42ab cmp r3, r5
+ 800033e: d101 bne.n 8000344 <__udivmoddi4+0xe4>
+ 8000340: 42a2 cmp r2, r4
+ 8000342: d80c bhi.n 800035e <__udivmoddi4+0xfe>
+ 8000344: 1aa4 subs r4, r4, r2
+ 8000346: 419d sbcs r5, r3
+ 8000348: 2001 movs r0, #1
+ 800034a: 1924 adds r4, r4, r4
+ 800034c: 416d adcs r5, r5
+ 800034e: 2100 movs r1, #0
+ 8000350: 3e01 subs r6, #1
+ 8000352: 1824 adds r4, r4, r0
+ 8000354: 414d adcs r5, r1
+ 8000356: 2e00 cmp r6, #0
+ 8000358: d006 beq.n 8000368 <__udivmoddi4+0x108>
+ 800035a: 42ab cmp r3, r5
+ 800035c: d9ee bls.n 800033c <__udivmoddi4+0xdc>
+ 800035e: 3e01 subs r6, #1
+ 8000360: 1924 adds r4, r4, r4
+ 8000362: 416d adcs r5, r5
+ 8000364: 2e00 cmp r6, #0
+ 8000366: d1f8 bne.n 800035a <__udivmoddi4+0xfa>
+ 8000368: 9800 ldr r0, [sp, #0]
+ 800036a: 9901 ldr r1, [sp, #4]
+ 800036c: 465b mov r3, fp
+ 800036e: 1900 adds r0, r0, r4
+ 8000370: 4169 adcs r1, r5
+ 8000372: 2b00 cmp r3, #0
+ 8000374: db24 blt.n 80003c0 <__udivmoddi4+0x160>
+ 8000376: 002b movs r3, r5
+ 8000378: 465a mov r2, fp
+ 800037a: 4644 mov r4, r8
+ 800037c: 40d3 lsrs r3, r2
+ 800037e: 002a movs r2, r5
+ 8000380: 40e2 lsrs r2, r4
+ 8000382: 001c movs r4, r3
+ 8000384: 465b mov r3, fp
+ 8000386: 0015 movs r5, r2
+ 8000388: 2b00 cmp r3, #0
+ 800038a: db2a blt.n 80003e2 <__udivmoddi4+0x182>
+ 800038c: 0026 movs r6, r4
+ 800038e: 409e lsls r6, r3
+ 8000390: 0033 movs r3, r6
+ 8000392: 0026 movs r6, r4
+ 8000394: 4647 mov r7, r8
+ 8000396: 40be lsls r6, r7
+ 8000398: 0032 movs r2, r6
+ 800039a: 1a80 subs r0, r0, r2
+ 800039c: 4199 sbcs r1, r3
+ 800039e: 9000 str r0, [sp, #0]
+ 80003a0: 9101 str r1, [sp, #4]
+ 80003a2: e79f b.n 80002e4 <__udivmoddi4+0x84>
+ 80003a4: 42a3 cmp r3, r4
+ 80003a6: d8bc bhi.n 8000322 <__udivmoddi4+0xc2>
+ 80003a8: e783 b.n 80002b2 <__udivmoddi4+0x52>
+ 80003aa: 4642 mov r2, r8
+ 80003ac: 2320 movs r3, #32
+ 80003ae: 2100 movs r1, #0
+ 80003b0: 1a9b subs r3, r3, r2
+ 80003b2: 2200 movs r2, #0
+ 80003b4: 9100 str r1, [sp, #0]
+ 80003b6: 9201 str r2, [sp, #4]
+ 80003b8: 2201 movs r2, #1
+ 80003ba: 40da lsrs r2, r3
+ 80003bc: 9201 str r2, [sp, #4]
+ 80003be: e786 b.n 80002ce <__udivmoddi4+0x6e>
+ 80003c0: 4642 mov r2, r8
+ 80003c2: 2320 movs r3, #32
+ 80003c4: 1a9b subs r3, r3, r2
+ 80003c6: 002a movs r2, r5
+ 80003c8: 4646 mov r6, r8
+ 80003ca: 409a lsls r2, r3
+ 80003cc: 0023 movs r3, r4
+ 80003ce: 40f3 lsrs r3, r6
+ 80003d0: 4644 mov r4, r8
+ 80003d2: 4313 orrs r3, r2
+ 80003d4: 002a movs r2, r5
+ 80003d6: 40e2 lsrs r2, r4
+ 80003d8: 001c movs r4, r3
+ 80003da: 465b mov r3, fp
+ 80003dc: 0015 movs r5, r2
+ 80003de: 2b00 cmp r3, #0
+ 80003e0: dad4 bge.n 800038c <__udivmoddi4+0x12c>
+ 80003e2: 4642 mov r2, r8
+ 80003e4: 002f movs r7, r5
+ 80003e6: 2320 movs r3, #32
+ 80003e8: 0026 movs r6, r4
+ 80003ea: 4097 lsls r7, r2
+ 80003ec: 1a9b subs r3, r3, r2
+ 80003ee: 40de lsrs r6, r3
+ 80003f0: 003b movs r3, r7
+ 80003f2: 4333 orrs r3, r6
+ 80003f4: e7cd b.n 8000392 <__udivmoddi4+0x132>
+ 80003f6: 46c0 nop ; (mov r8, r8)
+
+080003f8 <__clzdi2>:
+ 80003f8: b510 push {r4, lr}
+ 80003fa: 2900 cmp r1, #0
+ 80003fc: d103 bne.n 8000406 <__clzdi2+0xe>
+ 80003fe: f000 f807 bl 8000410 <__clzsi2>
+ 8000402: 3020 adds r0, #32
+ 8000404: e002 b.n 800040c <__clzdi2+0x14>
+ 8000406: 1c08 adds r0, r1, #0
+ 8000408: f000 f802 bl 8000410 <__clzsi2>
+ 800040c: bd10 pop {r4, pc}
+ 800040e: 46c0 nop ; (mov r8, r8)
+
+08000410 <__clzsi2>:
+ 8000410: 211c movs r1, #28
+ 8000412: 2301 movs r3, #1
+ 8000414: 041b lsls r3, r3, #16
+ 8000416: 4298 cmp r0, r3
+ 8000418: d301 bcc.n 800041e <__clzsi2+0xe>
+ 800041a: 0c00 lsrs r0, r0, #16
+ 800041c: 3910 subs r1, #16
+ 800041e: 0a1b lsrs r3, r3, #8
+ 8000420: 4298 cmp r0, r3
+ 8000422: d301 bcc.n 8000428 <__clzsi2+0x18>
+ 8000424: 0a00 lsrs r0, r0, #8
+ 8000426: 3908 subs r1, #8
+ 8000428: 091b lsrs r3, r3, #4
+ 800042a: 4298 cmp r0, r3
+ 800042c: d301 bcc.n 8000432 <__clzsi2+0x22>
+ 800042e: 0900 lsrs r0, r0, #4
+ 8000430: 3904 subs r1, #4
+ 8000432: a202 add r2, pc, #8 ; (adr r2, 800043c <__clzsi2+0x2c>)
+ 8000434: 5c10 ldrb r0, [r2, r0]
+ 8000436: 1840 adds r0, r0, r1
+ 8000438: 4770 bx lr
+ 800043a: 46c0 nop ; (mov r8, r8)
+ 800043c: 02020304 .word 0x02020304
+ 8000440: 01010101 .word 0x01010101
+ ...
+
+0800044c :
+/* Function to write four bytes to the EEPROM */
+/* IMPORTANT: EEPROM must be unlocked first */
+static int8_t eeprom_program_word(uint32_t addr, uint32_t ee_data);
+
+int8_t config_read(config_t *config)
+{
+ 800044c: b580 push {r7, lr}
+ 800044e: b082 sub sp, #8
+ 8000450: af00 add r7, sp, #0
+ 8000452: 6078 str r0, [r7, #4]
+ config->modbus_addr = *(uint16_t *) (CONFIG_EEPROM_ADDR_MODBUS_ADDR);
+ 8000454: 4b1d ldr r3, [pc, #116] ; (80004cc )
+ 8000456: 881a ldrh r2, [r3, #0]
+ 8000458: 687b ldr r3, [r7, #4]
+ 800045a: 819a strh r2, [r3, #12]
+ config->baudrate_index = *(uint16_t *) (CONFIG_EEPROM_ADDR_BAUDRATE_INDEX);
+ 800045c: 4b1c ldr r3, [pc, #112] ; (80004d0 )
+ 800045e: 881b ldrh r3, [r3, #0]
+ 8000460: 001a movs r2, r3
+ 8000462: 687b ldr r3, [r7, #4]
+ 8000464: 611a str r2, [r3, #16]
+ config->led_on = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ON);
+ 8000466: 4b1b ldr r3, [pc, #108] ; (80004d4 )
+ 8000468: 881b ldrh r3, [r3, #0]
+ 800046a: b2da uxtb r2, r3
+ 800046c: 687b ldr r3, [r7, #4]
+ 800046e: 701a strb r2, [r3, #0]
+ config->led_brightness = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_BRIGHTNESS);
+ 8000470: 4b19 ldr r3, [pc, #100] ; (80004d8 )
+ 8000472: 881a ldrh r2, [r3, #0]
+ 8000474: 687b ldr r3, [r7, #4]
+ 8000476: 805a strh r2, [r3, #2]
+ config->led_smooth = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_SMOOTH);
+ 8000478: 4b18 ldr r3, [pc, #96] ; (80004dc )
+ 800047a: 881b ldrh r3, [r3, #0]
+ 800047c: b2da uxtb r2, r3
+ 800047e: 687b ldr r3, [r7, #4]
+ 8000480: 711a strb r2, [r3, #4]
+ config->led_co2_alert_limit1 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT1);
+ 8000482: 4b17 ldr r3, [pc, #92] ; (80004e0 )
+ 8000484: 881a ldrh r2, [r3, #0]
+ 8000486: 687b ldr r3, [r7, #4]
+ 8000488: 80da strh r2, [r3, #6]
+ config->led_co2_alert_limit2 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT2);
+ 800048a: 4b16 ldr r3, [pc, #88] ; (80004e4 )
+ 800048c: 881a ldrh r2, [r3, #0]
+ 800048e: 687b ldr r3, [r7, #4]
+ 8000490: 811a strh r2, [r3, #8]
+ config->scd4x_t_offset = *(int16_t *) (CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET);
+ 8000492: 4b15 ldr r3, [pc, #84] ; (80004e8 )
+ 8000494: 2200 movs r2, #0
+ 8000496: 5e9a ldrsh r2, [r3, r2]
+ 8000498: 687b ldr r3, [r7, #4]
+ 800049a: 815a strh r2, [r3, #10]
+ * LED ON
+ * LED SMOOTH
+ * SCD4x T OFFSET
+ * BAUDRATE INDEX
+ * those can be 0 */
+ if ((config->modbus_addr == EEPROM_EMPTY_BYTE) ||
+ 800049c: 687b ldr r3, [r7, #4]
+ 800049e: 899b ldrh r3, [r3, #12]
+ 80004a0: 2b00 cmp r3, #0
+ 80004a2: d00b beq.n 80004bc
+ (config->led_co2_alert_limit1 == EEPROM_EMPTY_BYTE) ||
+ 80004a4: 687b ldr r3, [r7, #4]
+ 80004a6: 88db ldrh r3, [r3, #6]
+ if ((config->modbus_addr == EEPROM_EMPTY_BYTE) ||
+ 80004a8: 2b00 cmp r3, #0
+ 80004aa: d007 beq.n 80004bc
+ (config->led_co2_alert_limit2 == EEPROM_EMPTY_BYTE) ||
+ 80004ac: 687b ldr r3, [r7, #4]
+ 80004ae: 891b ldrh r3, [r3, #8]
+ (config->led_co2_alert_limit1 == EEPROM_EMPTY_BYTE) ||
+ 80004b0: 2b00 cmp r3, #0
+ 80004b2: d003 beq.n 80004bc
+ (config->led_brightness == EEPROM_EMPTY_BYTE))
+ 80004b4: 687b ldr r3, [r7, #4]
+ 80004b6: 885b ldrh r3, [r3, #2]
+ (config->led_co2_alert_limit2 == EEPROM_EMPTY_BYTE) ||
+ 80004b8: 2b00 cmp r3, #0
+ 80004ba: d102 bne.n 80004c2
+ {
+ return CONFIG_ERROR;
+ 80004bc: 2301 movs r3, #1
+ 80004be: 425b negs r3, r3
+ 80004c0: e000 b.n 80004c4
+ }
+ return CONFIG_OK;
+ 80004c2: 2300 movs r3, #0
+}
+ 80004c4: 0018 movs r0, r3
+ 80004c6: 46bd mov sp, r7
+ 80004c8: b002 add sp, #8
+ 80004ca: bd80 pop {r7, pc}
+ 80004cc: 08080000 .word 0x08080000
+ 80004d0: 08080002 .word 0x08080002
+ 80004d4: 08080004 .word 0x08080004
+ 80004d8: 08080006 .word 0x08080006
+ 80004dc: 08080008 .word 0x08080008
+ 80004e0: 0808000a .word 0x0808000a
+ 80004e4: 0808000c .word 0x0808000c
+ 80004e8: 0808000e .word 0x0808000e
+
+080004ec :
+
+int8_t config_write(config_t *config)
+{
+ 80004ec: b580 push {r7, lr}
+ 80004ee: b082 sub sp, #8
+ 80004f0: af00 add r7, sp, #0
+ 80004f2: 6078 str r0, [r7, #4]
+ /* Unlock the EEPROM */
+ if (eeprom_unlock() != EEPROM_OK)
+ 80004f4: f000 f8cc bl 8000690
+ 80004f8: 1e03 subs r3, r0, #0
+ 80004fa: d002 beq.n 8000502
+ {
+ return EEPROM_UNLOCK_ERROR;
+ 80004fc: 2302 movs r3, #2
+ 80004fe: 425b negs r3, r3
+ 8000500: e070 b.n 80005e4
+ }
+ /* Reset the ERASE and DATA bits in the FLASH_PECR register to disable any residual erase */
+ FLASH->PECR = FLASH->PECR & ~(FLASH_PECR_ERASE | FLASH_PECR_DATA);
+ 8000502: 4b3a ldr r3, [pc, #232] ; (80005ec )
+ 8000504: 685a ldr r2, [r3, #4]
+ 8000506: 4b39 ldr r3, [pc, #228] ; (80005ec )
+ 8000508: 4939 ldr r1, [pc, #228] ; (80005f0 )
+ 800050a: 400a ands r2, r1
+ 800050c: 605a str r2, [r3, #4]
+
+ /* Write MODBUS ADDRESS */
+ if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_MODBUS_ADDR, config->modbus_addr) != EEPROM_OK)
+ 800050e: 687b ldr r3, [r7, #4]
+ 8000510: 899b ldrh r3, [r3, #12]
+ 8000512: 4a38 ldr r2, [pc, #224] ; (80005f4 )
+ 8000514: 0019 movs r1, r3
+ 8000516: 0010 movs r0, r2
+ 8000518: f000 f928 bl 800076c
+ 800051c: 1e03 subs r3, r0, #0
+ 800051e: d002 beq.n 8000526
+ {
+ return EEPROM_WRITE_ERROR;
+ 8000520: 2304 movs r3, #4
+ 8000522: 425b negs r3, r3
+ 8000524: e05e b.n 80005e4
+ }
+ /* Write BAUDRATE */
+ if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_BAUDRATE_INDEX, config->baudrate_index) != EEPROM_OK)
+ 8000526: 687b ldr r3, [r7, #4]
+ 8000528: 691b ldr r3, [r3, #16]
+ 800052a: b29b uxth r3, r3
+ 800052c: 4a32 ldr r2, [pc, #200] ; (80005f8 )
+ 800052e: 0019 movs r1, r3
+ 8000530: 0010 movs r0, r2
+ 8000532: f000 f91b bl 800076c
+ 8000536: 1e03 subs r3, r0, #0
+ 8000538: d002 beq.n 8000540
+ {
+ return EEPROM_WRITE_ERROR;
+ 800053a: 2304 movs r3, #4
+ 800053c: 425b negs r3, r3
+ 800053e: e051 b.n 80005e4
+ }
+
+ /* Write LED ON */
+ if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_ON, config->led_on) != EEPROM_OK)
+ 8000540: 687b ldr r3, [r7, #4]
+ 8000542: 781b ldrb r3, [r3, #0]
+ 8000544: 4a2d ldr r2, [pc, #180] ; (80005fc )
+ 8000546: 0019 movs r1, r3
+ 8000548: 0010 movs r0, r2
+ 800054a: f000 f8e7 bl 800071c
+ 800054e: 1e03 subs r3, r0, #0
+ 8000550: d002 beq.n 8000558
+ {
+ return EEPROM_WRITE_ERROR;
+ 8000552: 2304 movs r3, #4
+ 8000554: 425b negs r3, r3
+ 8000556: e045 b.n 80005e4
+ }
+
+ /* Write LED BRIGHTNESS */
+ if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_BRIGHTNESS, config->led_brightness) != EEPROM_OK)
+ 8000558: 687b ldr r3, [r7, #4]
+ 800055a: 885b ldrh r3, [r3, #2]
+ 800055c: 4a28 ldr r2, [pc, #160] ; (8000600 )
+ 800055e: 0019 movs r1, r3
+ 8000560: 0010 movs r0, r2
+ 8000562: f000 f903 bl 800076c
+ 8000566: 1e03 subs r3, r0, #0
+ 8000568: d002 beq.n 8000570
+ {
+ return EEPROM_WRITE_ERROR;
+ 800056a: 2304 movs r3, #4
+ 800056c: 425b negs r3, r3
+ 800056e: e039 b.n 80005e4
+ }
+
+ /* Write LED SMOOTH */
+ if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_SMOOTH, config->led_smooth) != EEPROM_OK)
+ 8000570: 687b ldr r3, [r7, #4]
+ 8000572: 791b ldrb r3, [r3, #4]
+ 8000574: 4a23 ldr r2, [pc, #140] ; (8000604 )
+ 8000576: 0019 movs r1, r3
+ 8000578: 0010 movs r0, r2
+ 800057a: f000 f8cf bl 800071c
+ 800057e: 1e03 subs r3, r0, #0
+ 8000580: d002 beq.n 8000588
+ {
+ return EEPROM_WRITE_ERROR;
+ 8000582: 2304 movs r3, #4
+ 8000584: 425b negs r3, r3
+ 8000586: e02d b.n 80005e4
+ }
+
+ /* Write LED CO2 ALERT LIMIT 1 */
+ if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT1, config->led_co2_alert_limit1) != EEPROM_OK)
+ 8000588: 687b ldr r3, [r7, #4]
+ 800058a: 88db ldrh r3, [r3, #6]
+ 800058c: 4a1e ldr r2, [pc, #120] ; (8000608 )
+ 800058e: 0019 movs r1, r3
+ 8000590: 0010 movs r0, r2
+ 8000592: f000 f8eb bl 800076c
+ 8000596: 1e03 subs r3, r0, #0
+ 8000598: d002 beq.n 80005a0
+ {
+ return EEPROM_WRITE_ERROR;
+ 800059a: 2304 movs r3, #4
+ 800059c: 425b negs r3, r3
+ 800059e: e021 b.n 80005e4
+ }
+
+ /* Write LED CO2 ALERT LIMIT 2 */
+ if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT2, config->led_co2_alert_limit2) != EEPROM_OK)
+ 80005a0: 687b ldr r3, [r7, #4]
+ 80005a2: 891b ldrh r3, [r3, #8]
+ 80005a4: 4a19 ldr r2, [pc, #100] ; (800060c )
+ 80005a6: 0019 movs r1, r3
+ 80005a8: 0010 movs r0, r2
+ 80005aa: f000 f8df bl 800076c
+ 80005ae: 1e03 subs r3, r0, #0
+ 80005b0: d002 beq.n 80005b8
+ {
+ return EEPROM_WRITE_ERROR;
+ 80005b2: 2304 movs r3, #4
+ 80005b4: 425b negs r3, r3
+ 80005b6: e015 b.n 80005e4
+ }
+
+ /* Write LED SCD4x TEMPERATURE OFFSET */
+ if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET, config->scd4x_t_offset) != EEPROM_OK)
+ 80005b8: 687b ldr r3, [r7, #4]
+ 80005ba: 220a movs r2, #10
+ 80005bc: 5e9b ldrsh r3, [r3, r2]
+ 80005be: b29b uxth r3, r3
+ 80005c0: 4a13 ldr r2, [pc, #76] ; (8000610 )
+ 80005c2: 0019 movs r1, r3
+ 80005c4: 0010 movs r0, r2
+ 80005c6: f000 f8d1 bl 800076c
+ 80005ca: 1e03 subs r3, r0, #0
+ 80005cc: d002 beq.n 80005d4
+ {
+ return EEPROM_WRITE_ERROR;
+ 80005ce: 2304 movs r3, #4
+ 80005d0: 425b negs r3, r3
+ 80005d2: e007 b.n 80005e4
+ }
+
+ /* Lock EEPROM*/
+ if (eeprom_lock() != EEPROM_OK)
+ 80005d4: f000 f81e bl 8000614
+ 80005d8: 1e03 subs r3, r0, #0
+ 80005da: d002 beq.n 80005e2
+ {
+ return EEPROM_LOCK_ERROR;
+ 80005dc: 2303 movs r3, #3
+ 80005de: 425b negs r3, r3
+ 80005e0: e000 b.n 80005e4
+ }
+ return CONFIG_OK;
+ 80005e2: 2300 movs r3, #0
+}
+ 80005e4: 0018 movs r0, r3
+ 80005e6: 46bd mov sp, r7
+ 80005e8: b002 add sp, #8
+ 80005ea: bd80 pop {r7, pc}
+ 80005ec: 40022000 .word 0x40022000
+ 80005f0: fffffdef .word 0xfffffdef
+ 80005f4: 08080000 .word 0x08080000
+ 80005f8: 08080002 .word 0x08080002
+ 80005fc: 08080004 .word 0x08080004
+ 8000600: 08080006 .word 0x08080006
+ 8000604: 08080008 .word 0x08080008
+ 8000608: 0808000a .word 0x0808000a
+ 800060c: 0808000c .word 0x0808000c
+ 8000610: 0808000e .word 0x0808000e
+
+08000614 :
+
+static int8_t eeprom_lock(void)
+{
+ 8000614: b580 push {r7, lr}
+ 8000616: b084 sub sp, #16
+ 8000618: af00 add r7, sp, #0
+ uint32_t tick_start = SysTick->VAL;
+ 800061a: 4b19 ldr r3, [pc, #100] ; (8000680 )
+ 800061c: 689b ldr r3, [r3, #8]
+ 800061e: 60bb str r3, [r7, #8]
+ while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
+ 8000620: e017 b.n 8000652
+ {
+ /* Timeout test */
+ /* The maximum writing time is 3.94ms (half-word) */
+ uint32_t tick_last = SysTick->VAL;
+ 8000622: 4b17 ldr r3, [pc, #92] ; (8000680 )
+ 8000624: 689b ldr r3, [r3, #8]
+ 8000626: 607b str r3, [r7, #4]
+ uint32_t tick_diff;
+ if (tick_start <= tick_last)
+ 8000628: 68ba ldr r2, [r7, #8]
+ 800062a: 687b ldr r3, [r7, #4]
+ 800062c: 429a cmp r2, r3
+ 800062e: d804 bhi.n 800063a
+ {
+ tick_diff = tick_last - tick_start;
+ 8000630: 687a ldr r2, [r7, #4]
+ 8000632: 68bb ldr r3, [r7, #8]
+ 8000634: 1ad3 subs r3, r2, r3
+ 8000636: 60fb str r3, [r7, #12]
+ 8000638: e004 b.n 8000644
+ } else
+ {
+ tick_diff = (0xFFFFFFFF - tick_last) + tick_start;
+ 800063a: 68ba ldr r2, [r7, #8]
+ 800063c: 687b ldr r3, [r7, #4]
+ 800063e: 1ad3 subs r3, r2, r3
+ 8000640: 3b01 subs r3, #1
+ 8000642: 60fb str r3, [r7, #12]
+ }
+
+ /* If the time difference is more than 5ms */
+ if (tick_diff >= (uint32_t)((uint32_t)SYSTICK_FREQ_HZ*(uint32_t)EEPROM_TIMEOUT_MAX_MS_INV))
+ 8000644: 68fb ldr r3, [r7, #12]
+ 8000646: 4a0f ldr r2, [pc, #60] ; (8000684 )
+ 8000648: 4293 cmp r3, r2
+ 800064a: d902 bls.n 8000652
+ {
+ return EEPROM_LOCK_ERROR;
+ 800064c: 2303 movs r3, #3
+ 800064e: 425b negs r3, r3
+ 8000650: e011 b.n 8000676
+ while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
+ 8000652: 4b0d ldr r3, [pc, #52] ; (8000688 )
+ 8000654: 699b ldr r3, [r3, #24]
+ 8000656: 2201 movs r2, #1
+ 8000658: 4013 ands r3, r2
+ 800065a: d1e2 bne.n 8000622
+ }
+ }
+
+ FLASH->PECR = FLASH->PECR & ~(FLASH_PECR_ERRIE | FLASH_PECR_EOPIE); /* disable flash interrupts */
+ 800065c: 4b0a ldr r3, [pc, #40] ; (8000688 )
+ 800065e: 685a ldr r2, [r3, #4]
+ 8000660: 4b09 ldr r3, [pc, #36] ; (8000688 )
+ 8000662: 490a ldr r1, [pc, #40] ; (800068c )
+ 8000664: 400a ands r2, r1
+ 8000666: 605a str r2, [r3, #4]
+ FLASH->PECR = FLASH->PECR | FLASH_PECR_PELOCK; /* Lock memory with PELOCK */
+ 8000668: 4b07 ldr r3, [pc, #28] ; (8000688 )
+ 800066a: 685a ldr r2, [r3, #4]
+ 800066c: 4b06 ldr r3, [pc, #24] ; (8000688 )
+ 800066e: 2101 movs r1, #1
+ 8000670: 430a orrs r2, r1
+ 8000672: 605a str r2, [r3, #4]
+
+ return EEPROM_OK;
+ 8000674: 2300 movs r3, #0
+}
+ 8000676: 0018 movs r0, r3
+ 8000678: 46bd mov sp, r7
+ 800067a: b004 add sp, #16
+ 800067c: bd80 pop {r7, pc}
+ 800067e: 46c0 nop ; (mov r8, r8)
+ 8000680: e000e010 .word 0xe000e010
+ 8000684: 8f0d17ff .word 0x8f0d17ff
+ 8000688: 40022000 .word 0x40022000
+ 800068c: fffcffff .word 0xfffcffff
+
+08000690 :
+
+static int8_t eeprom_unlock(void)
+{
+ 8000690: b580 push {r7, lr}
+ 8000692: b084 sub sp, #16
+ 8000694: af00 add r7, sp, #0
+ uint32_t tick_start = SysTick->VAL;
+ 8000696: 4b1c ldr r3, [pc, #112] ; (8000708 )
+ 8000698: 689b ldr r3, [r3, #8]
+ 800069a: 60bb str r3, [r7, #8]
+ while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
+ 800069c: e017 b.n 80006ce
+ {
+ /* Timeout test */
+ /* The maximum writing time is 3.94ms (half-word) */
+ uint32_t tick_last = SysTick->VAL;
+ 800069e: 4b1a ldr r3, [pc, #104] ; (8000708 )
+ 80006a0: 689b ldr r3, [r3, #8]
+ 80006a2: 607b str r3, [r7, #4]
+ uint32_t tick_diff;
+ if (tick_start <= tick_last)
+ 80006a4: 68ba ldr r2, [r7, #8]
+ 80006a6: 687b ldr r3, [r7, #4]
+ 80006a8: 429a cmp r2, r3
+ 80006aa: d804 bhi.n 80006b6
+ {
+ tick_diff = tick_last - tick_start;
+ 80006ac: 687a ldr r2, [r7, #4]
+ 80006ae: 68bb ldr r3, [r7, #8]
+ 80006b0: 1ad3 subs r3, r2, r3
+ 80006b2: 60fb str r3, [r7, #12]
+ 80006b4: e004 b.n 80006c0
+ } else
+ {
+ tick_diff = (0xFFFFFFFF - tick_last) + tick_start;
+ 80006b6: 68ba ldr r2, [r7, #8]
+ 80006b8: 687b ldr r3, [r7, #4]
+ 80006ba: 1ad3 subs r3, r2, r3
+ 80006bc: 3b01 subs r3, #1
+ 80006be: 60fb str r3, [r7, #12]
+ }
+
+ /* If the time difference is more than 5ms */
+ if (tick_diff >= (uint32_t)((uint32_t)SYSTICK_FREQ_HZ*(uint32_t)EEPROM_TIMEOUT_MAX_MS_INV))
+ 80006c0: 68fb ldr r3, [r7, #12]
+ 80006c2: 4a12 ldr r2, [pc, #72] ; (800070c )
+ 80006c4: 4293 cmp r3, r2
+ 80006c6: d902 bls.n 80006ce
+ {
+ return EEPROM_UNLOCK_ERROR;
+ 80006c8: 2302 movs r3, #2
+ 80006ca: 425b negs r3, r3
+ 80006cc: e017 b.n 80006fe
+ while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
+ 80006ce: 4b10 ldr r3, [pc, #64] ; (8000710 )
+ 80006d0: 699b ldr r3, [r3, #24]
+ 80006d2: 2201 movs r2, #1
+ 80006d4: 4013 ands r3, r2
+ 80006d6: d1e2 bne.n 800069e
+ }
+ }
+ if ((FLASH->PECR & FLASH_PECR_PELOCK) != 0) /* If PELOCK is locked */
+ 80006d8: 4b0d ldr r3, [pc, #52] ; (8000710 )
+ 80006da: 685b ldr r3, [r3, #4]
+ 80006dc: 2201 movs r2, #1
+ 80006de: 4013 ands r3, r2
+ 80006e0: d005 beq.n 80006ee
+ {
+ /* Unlock PELOCK */
+ FLASH->PEKEYR = FLASH_PEKEY1; /* PEKEY1 */
+ 80006e2: 4b0b ldr r3, [pc, #44] ; (8000710 )
+ 80006e4: 4a0b ldr r2, [pc, #44] ; (8000714 )
+ 80006e6: 60da str r2, [r3, #12]
+ FLASH->PEKEYR = FLASH_PEKEY2; /* PEKEY2 */
+ 80006e8: 4b09 ldr r3, [pc, #36] ; (8000710 )
+ 80006ea: 4a0b ldr r2, [pc, #44] ; (8000718 )
+ 80006ec: 60da str r2, [r3, #12]
+ }
+ FLASH->PECR = FLASH->PECR | (FLASH_PECR_ERRIE | FLASH_PECR_EOPIE); /* enable flash interrupts */
+ 80006ee: 4b08 ldr r3, [pc, #32] ; (8000710 )
+ 80006f0: 685a ldr r2, [r3, #4]
+ 80006f2: 4b07 ldr r3, [pc, #28] ; (8000710 )
+ 80006f4: 21c0 movs r1, #192 ; 0xc0
+ 80006f6: 0289 lsls r1, r1, #10
+ 80006f8: 430a orrs r2, r1
+ 80006fa: 605a str r2, [r3, #4]
+ return EEPROM_OK;
+ 80006fc: 2300 movs r3, #0
+}
+ 80006fe: 0018 movs r0, r3
+ 8000700: 46bd mov sp, r7
+ 8000702: b004 add sp, #16
+ 8000704: bd80 pop {r7, pc}
+ 8000706: 46c0 nop ; (mov r8, r8)
+ 8000708: e000e010 .word 0xe000e010
+ 800070c: 8f0d17ff .word 0x8f0d17ff
+ 8000710: 40022000 .word 0x40022000
+ 8000714: 89abcdef .word 0x89abcdef
+ 8000718: 02030405 .word 0x02030405
+
+0800071c :
+
+static int8_t eeprom_program_byte(uint32_t addr, uint8_t ee_data)
+{
+ 800071c: b580 push {r7, lr}
+ 800071e: b082 sub sp, #8
+ 8000720: af00 add r7, sp, #0
+ 8000722: 6078 str r0, [r7, #4]
+ 8000724: 000a movs r2, r1
+ 8000726: 1cfb adds r3, r7, #3
+ 8000728: 701a strb r2, [r3, #0]
+ if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 1))
+ 800072a: 687b ldr r3, [r7, #4]
+ 800072c: 4a0d ldr r2, [pc, #52] ; (8000764 )
+ 800072e: 4293 cmp r3, r2
+ 8000730: d912 bls.n 8000758
+ 8000732: 687b ldr r3, [r7, #4]
+ 8000734: 4a0c ldr r2, [pc, #48] ; (8000768 )
+ 8000736: 4293 cmp r3, r2
+ 8000738: d80e bhi.n 8000758
+ {
+ *(uint8_t *)(addr) = ee_data; /* write data to EEPROM */
+ 800073a: 687b ldr r3, [r7, #4]
+ 800073c: 1cfa adds r2, r7, #3
+ 800073e: 7812 ldrb r2, [r2, #0]
+ 8000740: 701a strb r2, [r3, #0]
+ if (*(uint8_t *)(addr) != ee_data)
+ 8000742: 687b ldr r3, [r7, #4]
+ 8000744: 781b ldrb r3, [r3, #0]
+ 8000746: 1cfa adds r2, r7, #3
+ 8000748: 7812 ldrb r2, [r2, #0]
+ 800074a: 429a cmp r2, r3
+ 800074c: d002 beq.n 8000754
+ {
+ return EEPROM_WRITE_ERROR;
+ 800074e: 2304 movs r3, #4
+ 8000750: 425b negs r3, r3
+ 8000752: e003 b.n 800075c
+ }
+ return EEPROM_OK;
+ 8000754: 2300 movs r3, #0
+ 8000756: e001 b.n 800075c
+ } else
+ {
+ return EEPROM_ADDR_ERROR;
+ 8000758: 2305 movs r3, #5
+ 800075a: 425b negs r3, r3
+ }
+}
+ 800075c: 0018 movs r0, r3
+ 800075e: 46bd mov sp, r7
+ 8000760: b002 add sp, #8
+ 8000762: bd80 pop {r7, pc}
+ 8000764: 0807ffff .word 0x0807ffff
+ 8000768: 080801fe .word 0x080801fe
+
+0800076c :
+static int8_t eeprom_program_halfword(uint32_t addr, uint16_t ee_data)
+{
+ 800076c: b580 push {r7, lr}
+ 800076e: b082 sub sp, #8
+ 8000770: af00 add r7, sp, #0
+ 8000772: 6078 str r0, [r7, #4]
+ 8000774: 000a movs r2, r1
+ 8000776: 1cbb adds r3, r7, #2
+ 8000778: 801a strh r2, [r3, #0]
+ if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 2))
+ 800077a: 687b ldr r3, [r7, #4]
+ 800077c: 4a0d ldr r2, [pc, #52] ; (80007b4 )
+ 800077e: 4293 cmp r3, r2
+ 8000780: d912 bls.n 80007a8
+ 8000782: 687b ldr r3, [r7, #4]
+ 8000784: 4a0c ldr r2, [pc, #48] ; (80007b8 )
+ 8000786: 4293 cmp r3, r2
+ 8000788: d80e bhi.n 80007a8
+ {
+ *(uint16_t *)(addr) = ee_data; /* write data to EEPROM */
+ 800078a: 687b ldr r3, [r7, #4]
+ 800078c: 1cba adds r2, r7, #2
+ 800078e: 8812 ldrh r2, [r2, #0]
+ 8000790: 801a strh r2, [r3, #0]
+ if (*(uint16_t *)(addr) != ee_data)
+ 8000792: 687b ldr r3, [r7, #4]
+ 8000794: 881b ldrh r3, [r3, #0]
+ 8000796: 1cba adds r2, r7, #2
+ 8000798: 8812 ldrh r2, [r2, #0]
+ 800079a: 429a cmp r2, r3
+ 800079c: d002 beq.n 80007a4
+ {
+ return EEPROM_WRITE_ERROR;
+ 800079e: 2304 movs r3, #4
+ 80007a0: 425b negs r3, r3
+ 80007a2: e003 b.n 80007ac
+ }
+ return EEPROM_OK;
+ 80007a4: 2300 movs r3, #0
+ 80007a6: e001 b.n 80007ac
+ } else
+ {
+ return EEPROM_ADDR_ERROR;
+ 80007a8: 2305 movs r3, #5
+ 80007aa: 425b negs r3, r3
+ }
+}
+ 80007ac: 0018 movs r0, r3
+ 80007ae: 46bd mov sp, r7
+ 80007b0: b002 add sp, #8
+ 80007b2: bd80 pop {r7, pc}
+ 80007b4: 0807ffff .word 0x0807ffff
+ 80007b8: 080801fd .word 0x080801fd
+
+080007bc :
+ * @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
+ * @param I2Cx I2C Instance.
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
+{
+ 80007bc: b580 push {r7, lr}
+ 80007be: b082 sub sp, #8
+ 80007c0: af00 add r7, sp, #0
+ 80007c2: 6078 str r0, [r7, #4]
+ return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)) ? 1UL : 0UL);
+ 80007c4: 687b ldr r3, [r7, #4]
+ 80007c6: 699b ldr r3, [r3, #24]
+ 80007c8: 2201 movs r2, #1
+ 80007ca: 4013 ands r3, r2
+ 80007cc: 2b01 cmp r3, #1
+ 80007ce: d101 bne.n 80007d4
+ 80007d0: 2301 movs r3, #1
+ 80007d2: e000 b.n 80007d6
+ 80007d4: 2300 movs r3, #0
+}
+ 80007d6: 0018 movs r0, r3
+ 80007d8: 46bd mov sp, r7
+ 80007da: b002 add sp, #8
+ 80007dc: bd80 pop {r7, pc}
+
+080007de :
+ * @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
+ * @param I2Cx I2C Instance.
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
+{
+ 80007de: b580 push {r7, lr}
+ 80007e0: b082 sub sp, #8
+ 80007e2: af00 add r7, sp, #0
+ 80007e4: 6078 str r0, [r7, #4]
+ return ((READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)) ? 1UL : 0UL);
+ 80007e6: 687b ldr r3, [r7, #4]
+ 80007e8: 699b ldr r3, [r3, #24]
+ 80007ea: 2204 movs r2, #4
+ 80007ec: 4013 ands r3, r2
+ 80007ee: 2b04 cmp r3, #4
+ 80007f0: d101 bne.n 80007f6
+ 80007f2: 2301 movs r3, #1
+ 80007f4: e000 b.n 80007f8
+ 80007f6: 2300 movs r3, #0
+}
+ 80007f8: 0018 movs r0, r3
+ 80007fa: 46bd mov sp, r7
+ 80007fc: b002 add sp, #8
+ 80007fe: bd80 pop {r7, pc}
+
+08000800 :
+ * @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
+ * @param I2Cx I2C Instance.
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
+{
+ 8000800: b580 push {r7, lr}
+ 8000802: b082 sub sp, #8
+ 8000804: af00 add r7, sp, #0
+ 8000806: 6078 str r0, [r7, #4]
+ return ((READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF)) ? 1UL : 0UL);
+ 8000808: 687b ldr r3, [r7, #4]
+ 800080a: 699b ldr r3, [r3, #24]
+ 800080c: 2210 movs r2, #16
+ 800080e: 4013 ands r3, r2
+ 8000810: 2b10 cmp r3, #16
+ 8000812: d101 bne.n 8000818
+ 8000814: 2301 movs r3, #1
+ 8000816: e000 b.n 800081a
+ 8000818: 2300 movs r3, #0
+}
+ 800081a: 0018 movs r0, r3
+ 800081c: 46bd mov sp, r7
+ 800081e: b002 add sp, #8
+ 8000820: bd80 pop {r7, pc}
+
+08000822 :
+ * @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
+ * @param I2Cx I2C Instance.
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
+{
+ 8000822: b580 push {r7, lr}
+ 8000824: b082 sub sp, #8
+ 8000826: af00 add r7, sp, #0
+ 8000828: 6078 str r0, [r7, #4]
+ return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
+ 800082a: 687b ldr r3, [r7, #4]
+ 800082c: 699b ldr r3, [r3, #24]
+ 800082e: 2220 movs r2, #32
+ 8000830: 4013 ands r3, r2
+ 8000832: 2b20 cmp r3, #32
+ 8000834: d101 bne.n 800083a
+ 8000836: 2301 movs r3, #1
+ 8000838: e000 b.n 800083c
+ 800083a: 2300 movs r3, #0
+}
+ 800083c: 0018 movs r0, r3
+ 800083e: 46bd mov sp, r7
+ 8000840: b002 add sp, #8
+ 8000842: bd80 pop {r7, pc}
+
+08000844 :
+ * @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
+ * @param I2Cx I2C Instance.
+ * @retval None
+ */
+__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
+{
+ 8000844: b580 push {r7, lr}
+ 8000846: b082 sub sp, #8
+ 8000848: af00 add r7, sp, #0
+ 800084a: 6078 str r0, [r7, #4]
+ SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
+ 800084c: 687b ldr r3, [r7, #4]
+ 800084e: 69db ldr r3, [r3, #28]
+ 8000850: 2220 movs r2, #32
+ 8000852: 431a orrs r2, r3
+ 8000854: 687b ldr r3, [r7, #4]
+ 8000856: 61da str r2, [r3, #28]
+}
+ 8000858: 46c0 nop ; (mov r8, r8)
+ 800085a: 46bd mov sp, r7
+ 800085c: b002 add sp, #8
+ 800085e: bd80 pop {r7, pc}
+
+08000860 :
+ * @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
+ * @retval None
+ */
+__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
+ uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
+{
+ 8000860: b580 push {r7, lr}
+ 8000862: b084 sub sp, #16
+ 8000864: af00 add r7, sp, #0
+ 8000866: 60f8 str r0, [r7, #12]
+ 8000868: 60b9 str r1, [r7, #8]
+ 800086a: 607a str r2, [r7, #4]
+ 800086c: 603b str r3, [r7, #0]
+ MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 |
+ 800086e: 68fb ldr r3, [r7, #12]
+ 8000870: 685b ldr r3, [r3, #4]
+ 8000872: 69fa ldr r2, [r7, #28]
+ 8000874: 0d51 lsrs r1, r2, #21
+ 8000876: 2280 movs r2, #128 ; 0x80
+ 8000878: 00d2 lsls r2, r2, #3
+ 800087a: 400a ands r2, r1
+ 800087c: 490a ldr r1, [pc, #40] ; (80008a8 )
+ 800087e: 430a orrs r2, r1
+ 8000880: 43d2 mvns r2, r2
+ 8000882: 401a ands r2, r3
+ 8000884: 68b9 ldr r1, [r7, #8]
+ 8000886: 687b ldr r3, [r7, #4]
+ 8000888: 4319 orrs r1, r3
+ 800088a: 683b ldr r3, [r7, #0]
+ 800088c: 041b lsls r3, r3, #16
+ 800088e: 4319 orrs r1, r3
+ 8000890: 69bb ldr r3, [r7, #24]
+ 8000892: 4319 orrs r1, r3
+ 8000894: 69fb ldr r3, [r7, #28]
+ 8000896: 430b orrs r3, r1
+ 8000898: 431a orrs r2, r3
+ 800089a: 68fb ldr r3, [r7, #12]
+ 800089c: 605a str r2, [r3, #4]
+ (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) |
+ I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
+ I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
+ SlaveAddr | SlaveAddrSize | (TransferSize << I2C_CR2_NBYTES_Pos) | EndMode | Request);
+}
+ 800089e: 46c0 nop ; (mov r8, r8)
+ 80008a0: 46bd mov sp, r7
+ 80008a2: b004 add sp, #16
+ 80008a4: bd80 pop {r7, pc}
+ 80008a6: 46c0 nop ; (mov r8, r8)
+ 80008a8: 03ff7bff .word 0x03ff7bff
+
+080008ac :
+ * @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
+ * @param I2Cx I2C Instance.
+ * @retval Value between Min_Data=0x00 and Max_Data=0xFF
+ */
+__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
+{
+ 80008ac: b580 push {r7, lr}
+ 80008ae: b082 sub sp, #8
+ 80008b0: af00 add r7, sp, #0
+ 80008b2: 6078 str r0, [r7, #4]
+ return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
+ 80008b4: 687b ldr r3, [r7, #4]
+ 80008b6: 6a5b ldr r3, [r3, #36] ; 0x24
+ 80008b8: b2db uxtb r3, r3
+}
+ 80008ba: 0018 movs r0, r3
+ 80008bc: 46bd mov sp, r7
+ 80008be: b002 add sp, #8
+ 80008c0: bd80 pop {r7, pc}
+
+080008c2 :
+ * @param I2Cx I2C Instance.
+ * @param Data Value between Min_Data=0x00 and Max_Data=0xFF
+ * @retval None
+ */
+__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
+{
+ 80008c2: b580 push {r7, lr}
+ 80008c4: b082 sub sp, #8
+ 80008c6: af00 add r7, sp, #0
+ 80008c8: 6078 str r0, [r7, #4]
+ 80008ca: 000a movs r2, r1
+ 80008cc: 1cfb adds r3, r7, #3
+ 80008ce: 701a strb r2, [r3, #0]
+ WRITE_REG(I2Cx->TXDR, Data);
+ 80008d0: 1cfb adds r3, r7, #3
+ 80008d2: 781a ldrb r2, [r3, #0]
+ 80008d4: 687b ldr r3, [r7, #4]
+ 80008d6: 629a str r2, [r3, #40] ; 0x28
+}
+ 80008d8: 46c0 nop ; (mov r8, r8)
+ 80008da: 46bd mov sp, r7
+ 80008dc: b002 add sp, #8
+ 80008de: bd80 pop {r7, pc}
+
+080008e0 :
+#include "stm32l0xx_ll_lpuart.h"
+
+i2c_context_t *i2c_context;
+
+int i2c_init(i2c_context_t *context)
+{
+ 80008e0: b580 push {r7, lr}
+ 80008e2: b082 sub sp, #8
+ 80008e4: af00 add r7, sp, #0
+ 80008e6: 6078 str r0, [r7, #4]
+ if (context == NULL) {
+ 80008e8: 687b ldr r3, [r7, #4]
+ 80008ea: 2b00 cmp r3, #0
+ 80008ec: d102 bne.n 80008f4
+ return I2C_ERROR;
+ 80008ee: 2301 movs r3, #1
+ 80008f0: 425b negs r3, r3
+ 80008f2: e003 b.n 80008fc
+ }
+ i2c_context = context;
+ 80008f4: 4b03 ldr r3, [pc, #12] ; (8000904 )
+ 80008f6: 687a ldr r2, [r7, #4]
+ 80008f8: 601a str r2, [r3, #0]
+ return I2C_OK;
+ 80008fa: 2300 movs r3, #0
+}
+ 80008fc: 0018 movs r0, r3
+ 80008fe: 46bd mov sp, r7
+ 8000900: b002 add sp, #8
+ 8000902: bd80 pop {r7, pc}
+ 8000904: 20000034 .word 0x20000034
+
+08000908 :
+
+int i2c_transmit(uint8_t address, uint8_t *buffer, int len)
+{
+ 8000908: b580 push {r7, lr}
+ 800090a: b088 sub sp, #32
+ 800090c: af02 add r7, sp, #8
+ 800090e: 60b9 str r1, [r7, #8]
+ 8000910: 607a str r2, [r7, #4]
+ 8000912: 210f movs r1, #15
+ 8000914: 187b adds r3, r7, r1
+ 8000916: 1c02 adds r2, r0, #0
+ 8000918: 701a strb r2, [r3, #0]
+ /* prevent interrupts during I2C communication (e.g. collision with MODBUS) */
+// LL_LPUART_Disable(LPUART1);
+// LL_LPUART_DisableIT_RXNE(LPUART1);
+// __disable_irq();
+ LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
+ 800091a: 4b28 ldr r3, [pc, #160] ; (80009bc )
+ 800091c: 681b ldr r3, [r3, #0]
+ 800091e: 6818 ldr r0, [r3, #0]
+ 8000920: 187b adds r3, r7, r1
+ 8000922: 7819 ldrb r1, [r3, #0]
+ 8000924: 687a ldr r2, [r7, #4]
+ 8000926: 4b26 ldr r3, [pc, #152] ; (80009c0 )
+ 8000928: 9301 str r3, [sp, #4]
+ 800092a: 2380 movs r3, #128 ; 0x80
+ 800092c: 049b lsls r3, r3, #18
+ 800092e: 9300 str r3, [sp, #0]
+ 8000930: 0013 movs r3, r2
+ 8000932: 2200 movs r2, #0
+ 8000934: f7ff ff94 bl 8000860
+ LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_WRITE);
+ int i = 0;
+ 8000938: 2300 movs r3, #0
+ 800093a: 617b str r3, [r7, #20]
+ // Autoend mode will raise STOP flag if NACK is detected
+ // (or if desired number of bytes is transmitted)
+ while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
+ 800093c: e018 b.n 8000970
+ if (LL_I2C_IsActiveFlag_TXE(i2c_context->i2c)) {
+ 800093e: 4b1f ldr r3, [pc, #124] ; (80009bc )
+ 8000940: 681b ldr r3, [r3, #0]
+ 8000942: 681b ldr r3, [r3, #0]
+ 8000944: 0018 movs r0, r3
+ 8000946: f7ff ff39 bl 80007bc
+ 800094a: 1e03 subs r3, r0, #0
+ 800094c: d010 beq.n 8000970
+ if (i < len) {
+ 800094e: 697a ldr r2, [r7, #20]
+ 8000950: 687b ldr r3, [r7, #4]
+ 8000952: 429a cmp r2, r3
+ 8000954: da0c bge.n 8000970
+ LL_I2C_TransmitData8(i2c_context->i2c, buffer[i++]);
+ 8000956: 4b19 ldr r3, [pc, #100] ; (80009bc )
+ 8000958: 681b ldr r3, [r3, #0]
+ 800095a: 6818 ldr r0, [r3, #0]
+ 800095c: 697b ldr r3, [r7, #20]
+ 800095e: 1c5a adds r2, r3, #1
+ 8000960: 617a str r2, [r7, #20]
+ 8000962: 001a movs r2, r3
+ 8000964: 68bb ldr r3, [r7, #8]
+ 8000966: 189b adds r3, r3, r2
+ 8000968: 781b ldrb r3, [r3, #0]
+ 800096a: 0019 movs r1, r3
+ 800096c: f7ff ffa9 bl 80008c2
+ while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
+ 8000970: 4b12 ldr r3, [pc, #72] ; (80009bc )
+ 8000972: 681b ldr r3, [r3, #0]
+ 8000974: 681b ldr r3, [r3, #0]
+ 8000976: 0018 movs r0, r3
+ 8000978: f7ff ff53 bl 8000822
+ 800097c: 1e03 subs r3, r0, #0
+ 800097e: d0de beq.n 800093e
+ }
+ }
+ }
+ LL_I2C_ClearFlag_STOP(i2c_context->i2c);
+ 8000980: 4b0e ldr r3, [pc, #56] ; (80009bc )
+ 8000982: 681b ldr r3, [r3, #0]
+ 8000984: 681b ldr r3, [r3, #0]
+ 8000986: 0018 movs r0, r3
+ 8000988: f7ff ff5c bl 8000844
+ if (LL_I2C_IsActiveFlag_NACK(i2c_context->i2c)) {
+ 800098c: 4b0b ldr r3, [pc, #44] ; (80009bc )
+ 800098e: 681b ldr r3, [r3, #0]
+ 8000990: 681b ldr r3, [r3, #0]
+ 8000992: 0018 movs r0, r3
+ 8000994: f7ff ff34 bl 8000800
+ 8000998: 1e03 subs r3, r0, #0
+ 800099a: d002 beq.n 80009a2
+ return I2C_ERROR_NACK;
+ 800099c: 2302 movs r3, #2
+ 800099e: 425b negs r3, r3
+ 80009a0: e007 b.n 80009b2
+ }
+ if (len != i) {
+ 80009a2: 687a ldr r2, [r7, #4]
+ 80009a4: 697b ldr r3, [r7, #20]
+ 80009a6: 429a cmp r2, r3
+ 80009a8: d002 beq.n 80009b0
+ // this will probably never happen, as NACK flag
+ // is raised everytime len != number of TXed bytes
+ return I2C_ERROR_TX_INCOMPLETE;
+ 80009aa: 2303 movs r3, #3
+ 80009ac: 425b negs r3, r3
+ 80009ae: e000 b.n 80009b2
+ }
+// __enable_irq();
+// LL_LPUART_Enable(LPUART1);
+// LL_LPUART_EnableIT_RXNE(LPUART1);
+ return I2C_OK;
+ 80009b0: 2300 movs r3, #0
+}
+ 80009b2: 0018 movs r0, r3
+ 80009b4: 46bd mov sp, r7
+ 80009b6: b006 add sp, #24
+ 80009b8: bd80 pop {r7, pc}
+ 80009ba: 46c0 nop ; (mov r8, r8)
+ 80009bc: 20000034 .word 0x20000034
+ 80009c0: 80002000 .word 0x80002000
+
+080009c4 :
+
+int i2c_receive(uint8_t address, uint8_t *buffer, int len)
+{
+ 80009c4: b590 push {r4, r7, lr}
+ 80009c6: b089 sub sp, #36 ; 0x24
+ 80009c8: af02 add r7, sp, #8
+ 80009ca: 60b9 str r1, [r7, #8]
+ 80009cc: 607a str r2, [r7, #4]
+ 80009ce: 210f movs r1, #15
+ 80009d0: 187b adds r3, r7, r1
+ 80009d2: 1c02 adds r2, r0, #0
+ 80009d4: 701a strb r2, [r3, #0]
+// __disable_irq();
+// LL_LPUART_Disable(LPUART1);
+// LL_LPUART_DisableIT_RXNE(LPUART1);
+ LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
+ 80009d6: 4b23 ldr r3, [pc, #140] ; (8000a64 )
+ 80009d8: 681b ldr r3, [r3, #0]
+ 80009da: 6818 ldr r0, [r3, #0]
+ 80009dc: 187b adds r3, r7, r1
+ 80009de: 7819 ldrb r1, [r3, #0]
+ 80009e0: 687a ldr r2, [r7, #4]
+ 80009e2: 4b21 ldr r3, [pc, #132] ; (8000a68 )
+ 80009e4: 9301 str r3, [sp, #4]
+ 80009e6: 2380 movs r3, #128 ; 0x80
+ 80009e8: 049b lsls r3, r3, #18
+ 80009ea: 9300 str r3, [sp, #0]
+ 80009ec: 0013 movs r3, r2
+ 80009ee: 2200 movs r2, #0
+ 80009f0: f7ff ff36 bl 8000860
+ LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_READ);
+ int i = 0;
+ 80009f4: 2300 movs r3, #0
+ 80009f6: 617b str r3, [r7, #20]
+ while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
+ 80009f8: e019 b.n 8000a2e
+ if (LL_I2C_IsActiveFlag_RXNE(i2c_context->i2c)) {
+ 80009fa: 4b1a ldr r3, [pc, #104] ; (8000a64 )
+ 80009fc: 681b ldr r3, [r3, #0]
+ 80009fe: 681b ldr r3, [r3, #0]
+ 8000a00: 0018 movs r0, r3
+ 8000a02: f7ff feec bl 80007de
+ 8000a06: 1e03 subs r3, r0, #0
+ 8000a08: d011 beq.n 8000a2e
+ if (i < len) {
+ 8000a0a: 697a ldr r2, [r7, #20]
+ 8000a0c: 687b ldr r3, [r7, #4]
+ 8000a0e: 429a cmp r2, r3
+ 8000a10: da0d bge.n 8000a2e
+ buffer[i++] = LL_I2C_ReceiveData8(i2c_context->i2c);
+ 8000a12: 4b14 ldr r3, [pc, #80] ; (8000a64 )
+ 8000a14: 681b ldr r3, [r3, #0]
+ 8000a16: 6819 ldr r1, [r3, #0]
+ 8000a18: 697b ldr r3, [r7, #20]
+ 8000a1a: 1c5a adds r2, r3, #1
+ 8000a1c: 617a str r2, [r7, #20]
+ 8000a1e: 001a movs r2, r3
+ 8000a20: 68bb ldr r3, [r7, #8]
+ 8000a22: 189c adds r4, r3, r2
+ 8000a24: 0008 movs r0, r1
+ 8000a26: f7ff ff41 bl 80008ac
+ 8000a2a: 0003 movs r3, r0
+ 8000a2c: 7023 strb r3, [r4, #0]
+ while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
+ 8000a2e: 4b0d ldr r3, [pc, #52] ; (8000a64 )
+ 8000a30: 681b ldr r3, [r3, #0]
+ 8000a32: 681b ldr r3, [r3, #0]
+ 8000a34: 0018 movs r0, r3
+ 8000a36: f7ff fef4 bl 8000822
+ 8000a3a: 1e03 subs r3, r0, #0
+ 8000a3c: d0dd beq.n 80009fa
+ }
+ }
+ }
+ LL_I2C_ClearFlag_STOP(i2c_context->i2c);
+ 8000a3e: 4b09 ldr r3, [pc, #36] ; (8000a64 )
+ 8000a40: 681b ldr r3, [r3, #0]
+ 8000a42: 681b ldr r3, [r3, #0]
+ 8000a44: 0018 movs r0, r3
+ 8000a46: f7ff fefd bl 8000844
+ if (len != i) {
+ 8000a4a: 687a ldr r2, [r7, #4]
+ 8000a4c: 697b ldr r3, [r7, #20]
+ 8000a4e: 429a cmp r2, r3
+ 8000a50: d002 beq.n 8000a58
+ return I2C_ERROR_RX_INCOMPLETE;
+ 8000a52: 2304 movs r3, #4
+ 8000a54: 425b negs r3, r3
+ 8000a56: e000 b.n 8000a5a
+ }
+// __enable_irq();
+// LL_LPUART_Enable(LPUART1);
+// LL_LPUART_EnableIT_RXNE(LPUART1);
+ return I2C_OK; // TODO error detection
+ 8000a58: 2300 movs r3, #0
+}
+ 8000a5a: 0018 movs r0, r3
+ 8000a5c: 46bd mov sp, r7
+ 8000a5e: b007 add sp, #28
+ 8000a60: bd90 pop {r4, r7, pc}
+ 8000a62: 46c0 nop ; (mov r8, r8)
+ 8000a64: 20000034 .word 0x20000034
+ 8000a68: 80002400 .word 0x80002400
+
+08000a6c <__NVIC_EnableIRQ>:
+ \details Enables a device specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8000a6c: b580 push {r7, lr}
+ 8000a6e: b082 sub sp, #8
+ 8000a70: af00 add r7, sp, #0
+ 8000a72: 0002 movs r2, r0
+ 8000a74: 1dfb adds r3, r7, #7
+ 8000a76: 701a strb r2, [r3, #0]
+ if ((int32_t)(IRQn) >= 0)
+ 8000a78: 1dfb adds r3, r7, #7
+ 8000a7a: 781b ldrb r3, [r3, #0]
+ 8000a7c: 2b7f cmp r3, #127 ; 0x7f
+ 8000a7e: d809 bhi.n 8000a94 <__NVIC_EnableIRQ+0x28>
+ {
+ NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ 8000a80: 1dfb adds r3, r7, #7
+ 8000a82: 781b ldrb r3, [r3, #0]
+ 8000a84: 001a movs r2, r3
+ 8000a86: 231f movs r3, #31
+ 8000a88: 401a ands r2, r3
+ 8000a8a: 4b04 ldr r3, [pc, #16] ; (8000a9c <__NVIC_EnableIRQ+0x30>)
+ 8000a8c: 2101 movs r1, #1
+ 8000a8e: 4091 lsls r1, r2
+ 8000a90: 000a movs r2, r1
+ 8000a92: 601a str r2, [r3, #0]
+ }
+}
+ 8000a94: 46c0 nop ; (mov r8, r8)
+ 8000a96: 46bd mov sp, r7
+ 8000a98: b002 add sp, #8
+ 8000a9a: bd80 pop {r7, pc}
+ 8000a9c: e000e100 .word 0xe000e100
+
+08000aa0 <__NVIC_SetPriority>:
+ \param [in] IRQn Interrupt number.
+ \param [in] priority Priority to set.
+ \note The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 8000aa0: b590 push {r4, r7, lr}
+ 8000aa2: b083 sub sp, #12
+ 8000aa4: af00 add r7, sp, #0
+ 8000aa6: 0002 movs r2, r0
+ 8000aa8: 6039 str r1, [r7, #0]
+ 8000aaa: 1dfb adds r3, r7, #7
+ 8000aac: 701a strb r2, [r3, #0]
+ if ((int32_t)(IRQn) >= 0)
+ 8000aae: 1dfb adds r3, r7, #7
+ 8000ab0: 781b ldrb r3, [r3, #0]
+ 8000ab2: 2b7f cmp r3, #127 ; 0x7f
+ 8000ab4: d828 bhi.n 8000b08 <__NVIC_SetPriority+0x68>
+ {
+ NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ 8000ab6: 4a2f ldr r2, [pc, #188] ; (8000b74 <__NVIC_SetPriority+0xd4>)
+ 8000ab8: 1dfb adds r3, r7, #7
+ 8000aba: 781b ldrb r3, [r3, #0]
+ 8000abc: b25b sxtb r3, r3
+ 8000abe: 089b lsrs r3, r3, #2
+ 8000ac0: 33c0 adds r3, #192 ; 0xc0
+ 8000ac2: 009b lsls r3, r3, #2
+ 8000ac4: 589b ldr r3, [r3, r2]
+ 8000ac6: 1dfa adds r2, r7, #7
+ 8000ac8: 7812 ldrb r2, [r2, #0]
+ 8000aca: 0011 movs r1, r2
+ 8000acc: 2203 movs r2, #3
+ 8000ace: 400a ands r2, r1
+ 8000ad0: 00d2 lsls r2, r2, #3
+ 8000ad2: 21ff movs r1, #255 ; 0xff
+ 8000ad4: 4091 lsls r1, r2
+ 8000ad6: 000a movs r2, r1
+ 8000ad8: 43d2 mvns r2, r2
+ 8000ada: 401a ands r2, r3
+ 8000adc: 0011 movs r1, r2
+ (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+ 8000ade: 683b ldr r3, [r7, #0]
+ 8000ae0: 019b lsls r3, r3, #6
+ 8000ae2: 22ff movs r2, #255 ; 0xff
+ 8000ae4: 401a ands r2, r3
+ 8000ae6: 1dfb adds r3, r7, #7
+ 8000ae8: 781b ldrb r3, [r3, #0]
+ 8000aea: 0018 movs r0, r3
+ 8000aec: 2303 movs r3, #3
+ 8000aee: 4003 ands r3, r0
+ 8000af0: 00db lsls r3, r3, #3
+ 8000af2: 409a lsls r2, r3
+ NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ 8000af4: 481f ldr r0, [pc, #124] ; (8000b74 <__NVIC_SetPriority+0xd4>)
+ 8000af6: 1dfb adds r3, r7, #7
+ 8000af8: 781b ldrb r3, [r3, #0]
+ 8000afa: b25b sxtb r3, r3
+ 8000afc: 089b lsrs r3, r3, #2
+ 8000afe: 430a orrs r2, r1
+ 8000b00: 33c0 adds r3, #192 ; 0xc0
+ 8000b02: 009b lsls r3, r3, #2
+ 8000b04: 501a str r2, [r3, r0]
+ else
+ {
+ SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+ }
+}
+ 8000b06: e031 b.n 8000b6c <__NVIC_SetPriority+0xcc>
+ SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ 8000b08: 4a1b ldr r2, [pc, #108] ; (8000b78 <__NVIC_SetPriority+0xd8>)
+ 8000b0a: 1dfb adds r3, r7, #7
+ 8000b0c: 781b ldrb r3, [r3, #0]
+ 8000b0e: 0019 movs r1, r3
+ 8000b10: 230f movs r3, #15
+ 8000b12: 400b ands r3, r1
+ 8000b14: 3b08 subs r3, #8
+ 8000b16: 089b lsrs r3, r3, #2
+ 8000b18: 3306 adds r3, #6
+ 8000b1a: 009b lsls r3, r3, #2
+ 8000b1c: 18d3 adds r3, r2, r3
+ 8000b1e: 3304 adds r3, #4
+ 8000b20: 681b ldr r3, [r3, #0]
+ 8000b22: 1dfa adds r2, r7, #7
+ 8000b24: 7812 ldrb r2, [r2, #0]
+ 8000b26: 0011 movs r1, r2
+ 8000b28: 2203 movs r2, #3
+ 8000b2a: 400a ands r2, r1
+ 8000b2c: 00d2 lsls r2, r2, #3
+ 8000b2e: 21ff movs r1, #255 ; 0xff
+ 8000b30: 4091 lsls r1, r2
+ 8000b32: 000a movs r2, r1
+ 8000b34: 43d2 mvns r2, r2
+ 8000b36: 401a ands r2, r3
+ 8000b38: 0011 movs r1, r2
+ (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+ 8000b3a: 683b ldr r3, [r7, #0]
+ 8000b3c: 019b lsls r3, r3, #6
+ 8000b3e: 22ff movs r2, #255 ; 0xff
+ 8000b40: 401a ands r2, r3
+ 8000b42: 1dfb adds r3, r7, #7
+ 8000b44: 781b ldrb r3, [r3, #0]
+ 8000b46: 0018 movs r0, r3
+ 8000b48: 2303 movs r3, #3
+ 8000b4a: 4003 ands r3, r0
+ 8000b4c: 00db lsls r3, r3, #3
+ 8000b4e: 409a lsls r2, r3
+ SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ 8000b50: 4809 ldr r0, [pc, #36] ; (8000b78 <__NVIC_SetPriority+0xd8>)
+ 8000b52: 1dfb adds r3, r7, #7
+ 8000b54: 781b ldrb r3, [r3, #0]
+ 8000b56: 001c movs r4, r3
+ 8000b58: 230f movs r3, #15
+ 8000b5a: 4023 ands r3, r4
+ 8000b5c: 3b08 subs r3, #8
+ 8000b5e: 089b lsrs r3, r3, #2
+ 8000b60: 430a orrs r2, r1
+ 8000b62: 3306 adds r3, #6
+ 8000b64: 009b lsls r3, r3, #2
+ 8000b66: 18c3 adds r3, r0, r3
+ 8000b68: 3304 adds r3, #4
+ 8000b6a: 601a str r2, [r3, #0]
+}
+ 8000b6c: 46c0 nop ; (mov r8, r8)
+ 8000b6e: 46bd mov sp, r7
+ 8000b70: b003 add sp, #12
+ 8000b72: bd90 pop {r4, r7, pc}
+ 8000b74: e000e100 .word 0xe000e100
+ 8000b78: e000ed00 .word 0xe000ed00
+
+08000b7c :
+{
+ 8000b7c: b580 push {r7, lr}
+ 8000b7e: b082 sub sp, #8
+ 8000b80: af00 add r7, sp, #0
+ 8000b82: 6078 str r0, [r7, #4]
+ SET_BIT(I2Cx->CR1, I2C_CR1_PE);
+ 8000b84: 687b ldr r3, [r7, #4]
+ 8000b86: 681b ldr r3, [r3, #0]
+ 8000b88: 2201 movs r2, #1
+ 8000b8a: 431a orrs r2, r3
+ 8000b8c: 687b ldr r3, [r7, #4]
+ 8000b8e: 601a str r2, [r3, #0]
+}
+ 8000b90: 46c0 nop ; (mov r8, r8)
+ 8000b92: 46bd mov sp, r7
+ 8000b94: b002 add sp, #8
+ 8000b96: bd80 pop {r7, pc}
+
+08000b98 :
+{
+ 8000b98: b580 push {r7, lr}
+ 8000b9a: b082 sub sp, #8
+ 8000b9c: af00 add r7, sp, #0
+ 8000b9e: 6078 str r0, [r7, #4]
+ CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
+ 8000ba0: 687b ldr r3, [r7, #4]
+ 8000ba2: 681b ldr r3, [r3, #0]
+ 8000ba4: 4a03 ldr r2, [pc, #12] ; (8000bb4 )
+ 8000ba6: 401a ands r2, r3
+ 8000ba8: 687b ldr r3, [r7, #4]
+ 8000baa: 601a str r2, [r3, #0]
+}
+ 8000bac: 46c0 nop ; (mov r8, r8)
+ 8000bae: 46bd mov sp, r7
+ 8000bb0: b002 add sp, #8
+ 8000bb2: bd80 pop {r7, pc}
+ 8000bb4: fffdffff .word 0xfffdffff
+
+08000bb8 :
+{
+ 8000bb8: b580 push {r7, lr}
+ 8000bba: b082 sub sp, #8
+ 8000bbc: af00 add r7, sp, #0
+ 8000bbe: 6078 str r0, [r7, #4]
+ CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
+ 8000bc0: 687b ldr r3, [r7, #4]
+ 8000bc2: 681b ldr r3, [r3, #0]
+ 8000bc4: 4a03 ldr r2, [pc, #12] ; (8000bd4 )
+ 8000bc6: 401a ands r2, r3
+ 8000bc8: 687b ldr r3, [r7, #4]
+ 8000bca: 601a str r2, [r3, #0]
+}
+ 8000bcc: 46c0 nop ; (mov r8, r8)
+ 8000bce: 46bd mov sp, r7
+ 8000bd0: b002 add sp, #8
+ 8000bd2: bd80 pop {r7, pc}
+ 8000bd4: fff7ffff .word 0xfff7ffff
+
+08000bd8 :
+{
+ 8000bd8: b580 push {r7, lr}
+ 8000bda: b084 sub sp, #16
+ 8000bdc: af00 add r7, sp, #0
+ 8000bde: 60f8 str r0, [r7, #12]
+ 8000be0: 60b9 str r1, [r7, #8]
+ 8000be2: 607a str r2, [r7, #4]
+ MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask);
+ 8000be4: 68fb ldr r3, [r7, #12]
+ 8000be6: 68db ldr r3, [r3, #12]
+ 8000be8: 4a05 ldr r2, [pc, #20] ; (8000c00 )
+ 8000bea: 401a ands r2, r3
+ 8000bec: 68b9 ldr r1, [r7, #8]
+ 8000bee: 687b ldr r3, [r7, #4]
+ 8000bf0: 430b orrs r3, r1
+ 8000bf2: 431a orrs r2, r3
+ 8000bf4: 68fb ldr r3, [r7, #12]
+ 8000bf6: 60da str r2, [r3, #12]
+}
+ 8000bf8: 46c0 nop ; (mov r8, r8)
+ 8000bfa: 46bd mov sp, r7
+ 8000bfc: b004 add sp, #16
+ 8000bfe: bd80 pop {r7, pc}
+ 8000c00: fffff801 .word 0xfffff801
+
+08000c04 :
+{
+ 8000c04: b580 push {r7, lr}
+ 8000c06: b082 sub sp, #8
+ 8000c08: af00 add r7, sp, #0
+ 8000c0a: 6078 str r0, [r7, #4]
+ CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
+ 8000c0c: 687b ldr r3, [r7, #4]
+ 8000c0e: 68db ldr r3, [r3, #12]
+ 8000c10: 4a03 ldr r2, [pc, #12] ; (8000c20 )
+ 8000c12: 401a ands r2, r3
+ 8000c14: 687b ldr r3, [r7, #4]
+ 8000c16: 60da str r2, [r3, #12]
+}
+ 8000c18: 46c0 nop ; (mov r8, r8)
+ 8000c1a: 46bd mov sp, r7
+ 8000c1c: b002 add sp, #8
+ 8000c1e: bd80 pop {r7, pc}
+ 8000c20: ffff7fff .word 0xffff7fff
+
+08000c24 :
+{
+ 8000c24: b580 push {r7, lr}
+ 8000c26: b082 sub sp, #8
+ 8000c28: af00 add r7, sp, #0
+ 8000c2a: 6078 str r0, [r7, #4]
+ SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
+ 8000c2c: 687b ldr r3, [r7, #4]
+ 8000c2e: 685b ldr r3, [r3, #4]
+ 8000c30: 2280 movs r2, #128 ; 0x80
+ 8000c32: 0492 lsls r2, r2, #18
+ 8000c34: 431a orrs r2, r3
+ 8000c36: 687b ldr r3, [r7, #4]
+ 8000c38: 605a str r2, [r3, #4]
+}
+ 8000c3a: 46c0 nop ; (mov r8, r8)
+ 8000c3c: 46bd mov sp, r7
+ 8000c3e: b002 add sp, #8
+ 8000c40: bd80 pop {r7, pc}
+
+08000c42 :
+ * @rmtoll CR1 UE LL_LPUART_Enable
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
+{
+ 8000c42: b580 push {r7, lr}
+ 8000c44: b082 sub sp, #8
+ 8000c46: af00 add r7, sp, #0
+ 8000c48: 6078 str r0, [r7, #4]
+ SET_BIT(LPUARTx->CR1, USART_CR1_UE);
+ 8000c4a: 687b ldr r3, [r7, #4]
+ 8000c4c: 681b ldr r3, [r3, #0]
+ 8000c4e: 2201 movs r2, #1
+ 8000c50: 431a orrs r2, r3
+ 8000c52: 687b ldr r3, [r7, #4]
+ 8000c54: 601a str r2, [r3, #0]
+}
+ 8000c56: 46c0 nop ; (mov r8, r8)
+ 8000c58: 46bd mov sp, r7
+ 8000c5a: b002 add sp, #8
+ 8000c5c: bd80 pop {r7, pc}
+
+08000c5e :
+ * @rmtoll CR1 UE LL_LPUART_Disable
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
+{
+ 8000c5e: b580 push {r7, lr}
+ 8000c60: b082 sub sp, #8
+ 8000c62: af00 add r7, sp, #0
+ 8000c64: 6078 str r0, [r7, #4]
+ CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
+ 8000c66: 687b ldr r3, [r7, #4]
+ 8000c68: 681b ldr r3, [r3, #0]
+ 8000c6a: 2201 movs r2, #1
+ 8000c6c: 4393 bics r3, r2
+ 8000c6e: 001a movs r2, r3
+ 8000c70: 687b ldr r3, [r7, #4]
+ 8000c72: 601a str r2, [r3, #0]
+}
+ 8000c74: 46c0 nop ; (mov r8, r8)
+ 8000c76: 46bd mov sp, r7
+ 8000c78: b002 add sp, #8
+ 8000c7a: bd80 pop {r7, pc}
+
+08000c7c :
+ * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
+{
+ 8000c7c: b580 push {r7, lr}
+ 8000c7e: b082 sub sp, #8
+ 8000c80: af00 add r7, sp, #0
+ 8000c82: 6078 str r0, [r7, #4]
+ SET_BIT(LPUARTx->CR1, USART_CR1_RE);
+ 8000c84: 687b ldr r3, [r7, #4]
+ 8000c86: 681b ldr r3, [r3, #0]
+ 8000c88: 2204 movs r2, #4
+ 8000c8a: 431a orrs r2, r3
+ 8000c8c: 687b ldr r3, [r7, #4]
+ 8000c8e: 601a str r2, [r3, #0]
+}
+ 8000c90: 46c0 nop ; (mov r8, r8)
+ 8000c92: 46bd mov sp, r7
+ 8000c94: b002 add sp, #8
+ 8000c96: bd80 pop {r7, pc}
+
+08000c98 :
+ * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
+{
+ 8000c98: b580 push {r7, lr}
+ 8000c9a: b082 sub sp, #8
+ 8000c9c: af00 add r7, sp, #0
+ 8000c9e: 6078 str r0, [r7, #4]
+ SET_BIT(LPUARTx->CR1, USART_CR1_TE);
+ 8000ca0: 687b ldr r3, [r7, #4]
+ 8000ca2: 681b ldr r3, [r3, #0]
+ 8000ca4: 2208 movs r2, #8
+ 8000ca6: 431a orrs r2, r3
+ 8000ca8: 687b ldr r3, [r7, #4]
+ 8000caa: 601a str r2, [r3, #0]
+}
+ 8000cac: 46c0 nop ; (mov r8, r8)
+ 8000cae: 46bd mov sp, r7
+ 8000cb0: b002 add sp, #8
+ 8000cb2: bd80 pop {r7, pc}
+
+08000cb4 :
+ * @param PeriphClk Peripheral Clock
+ * @param BaudRate Baud Rate
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
+{
+ 8000cb4: b5b0 push {r4, r5, r7, lr}
+ 8000cb6: b08a sub sp, #40 ; 0x28
+ 8000cb8: af00 add r7, sp, #0
+ 8000cba: 6278 str r0, [r7, #36] ; 0x24
+ 8000cbc: 6239 str r1, [r7, #32]
+ 8000cbe: 61fa str r2, [r7, #28]
+ if (BaudRate != 0U)
+ 8000cc0: 69fb ldr r3, [r7, #28]
+ 8000cc2: 2b00 cmp r3, #0
+ 8000cc4: d024 beq.n 8000d10
+ {
+ LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
+ 8000cc6: 6a3b ldr r3, [r7, #32]
+ 8000cc8: 613b str r3, [r7, #16]
+ 8000cca: 2300 movs r3, #0
+ 8000ccc: 617b str r3, [r7, #20]
+ 8000cce: 6939 ldr r1, [r7, #16]
+ 8000cd0: 697a ldr r2, [r7, #20]
+ 8000cd2: 000b movs r3, r1
+ 8000cd4: 0e1b lsrs r3, r3, #24
+ 8000cd6: 0010 movs r0, r2
+ 8000cd8: 0205 lsls r5, r0, #8
+ 8000cda: 431d orrs r5, r3
+ 8000cdc: 000b movs r3, r1
+ 8000cde: 021c lsls r4, r3, #8
+ 8000ce0: 69fb ldr r3, [r7, #28]
+ 8000ce2: 085b lsrs r3, r3, #1
+ 8000ce4: 60bb str r3, [r7, #8]
+ 8000ce6: 2300 movs r3, #0
+ 8000ce8: 60fb str r3, [r7, #12]
+ 8000cea: 68b8 ldr r0, [r7, #8]
+ 8000cec: 68f9 ldr r1, [r7, #12]
+ 8000cee: 1900 adds r0, r0, r4
+ 8000cf0: 4169 adcs r1, r5
+ 8000cf2: 69fb ldr r3, [r7, #28]
+ 8000cf4: 603b str r3, [r7, #0]
+ 8000cf6: 2300 movs r3, #0
+ 8000cf8: 607b str r3, [r7, #4]
+ 8000cfa: 683a ldr r2, [r7, #0]
+ 8000cfc: 687b ldr r3, [r7, #4]
+ 8000cfe: f7ff fa8f bl 8000220 <__aeabi_uldivmod>
+ 8000d02: 0002 movs r2, r0
+ 8000d04: 000b movs r3, r1
+ 8000d06: 0013 movs r3, r2
+ 8000d08: 031b lsls r3, r3, #12
+ 8000d0a: 0b1a lsrs r2, r3, #12
+ 8000d0c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8000d0e: 60da str r2, [r3, #12]
+ }
+}
+ 8000d10: 46c0 nop ; (mov r8, r8)
+ 8000d12: 46bd mov sp, r7
+ 8000d14: b00a add sp, #40 ; 0x28
+ 8000d16: bdb0 pop {r4, r5, r7, pc}
+
+08000d18 :
+ * @param LPUARTx LPUART Instance
+ * @param PeriphClk Peripheral Clock
+ * @retval Baud Rate
+ */
+__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk)
+{
+ 8000d18: b5b0 push {r4, r5, r7, lr}
+ 8000d1a: b086 sub sp, #24
+ 8000d1c: af00 add r7, sp, #0
+ 8000d1e: 60f8 str r0, [r7, #12]
+ 8000d20: 60b9 str r1, [r7, #8]
+ uint32_t lpuartdiv;
+ uint32_t brrresult;
+
+ lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
+ 8000d22: 68f9 ldr r1, [r7, #12]
+ 8000d24: 68c9 ldr r1, [r1, #12]
+ 8000d26: 0309 lsls r1, r1, #12
+ 8000d28: 0b09 lsrs r1, r1, #12
+ 8000d2a: 6139 str r1, [r7, #16]
+
+ if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
+ 8000d2c: 6938 ldr r0, [r7, #16]
+ 8000d2e: 21c0 movs r1, #192 ; 0xc0
+ 8000d30: 0089 lsls r1, r1, #2
+ 8000d32: 4288 cmp r0, r1
+ 8000d34: d316 bcc.n 8000d64
+ {
+ brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
+ 8000d36: 68b9 ldr r1, [r7, #8]
+ 8000d38: 000a movs r2, r1
+ 8000d3a: 2100 movs r1, #0
+ 8000d3c: 000b movs r3, r1
+ 8000d3e: 0e11 lsrs r1, r2, #24
+ 8000d40: 021d lsls r5, r3, #8
+ 8000d42: 430d orrs r5, r1
+ 8000d44: 0214 lsls r4, r2, #8
+ 8000d46: 693b ldr r3, [r7, #16]
+ 8000d48: 603b str r3, [r7, #0]
+ 8000d4a: 2300 movs r3, #0
+ 8000d4c: 607b str r3, [r7, #4]
+ 8000d4e: 683a ldr r2, [r7, #0]
+ 8000d50: 687b ldr r3, [r7, #4]
+ 8000d52: 0020 movs r0, r4
+ 8000d54: 0029 movs r1, r5
+ 8000d56: f7ff fa63 bl 8000220 <__aeabi_uldivmod>
+ 8000d5a: 0002 movs r2, r0
+ 8000d5c: 000b movs r3, r1
+ 8000d5e: 0013 movs r3, r2
+ 8000d60: 617b str r3, [r7, #20]
+ 8000d62: e001 b.n 8000d68
+ }
+ else
+ {
+ brrresult = 0x0UL;
+ 8000d64: 2300 movs r3, #0
+ 8000d66: 617b str r3, [r7, #20]
+ }
+
+ return (brrresult);
+ 8000d68: 697b ldr r3, [r7, #20]
+}
+ 8000d6a: 0018 movs r0, r3
+ 8000d6c: 46bd mov sp, r7
+ 8000d6e: b006 add sp, #24
+ 8000d70: bdb0 pop {r4, r5, r7, pc}
+ ...
+
+08000d74 :
+ * @param LPUARTx LPUART Instance
+ * @param Time Value between Min_Data=0 and Max_Data=31
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
+{
+ 8000d74: b580 push {r7, lr}
+ 8000d76: b082 sub sp, #8
+ 8000d78: af00 add r7, sp, #0
+ 8000d7a: 6078 str r0, [r7, #4]
+ 8000d7c: 6039 str r1, [r7, #0]
+ MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
+ 8000d7e: 687b ldr r3, [r7, #4]
+ 8000d80: 681b ldr r3, [r3, #0]
+ 8000d82: 4a05 ldr r2, [pc, #20] ; (8000d98 )
+ 8000d84: 401a ands r2, r3
+ 8000d86: 683b ldr r3, [r7, #0]
+ 8000d88: 041b lsls r3, r3, #16
+ 8000d8a: 431a orrs r2, r3
+ 8000d8c: 687b ldr r3, [r7, #4]
+ 8000d8e: 601a str r2, [r3, #0]
+}
+ 8000d90: 46c0 nop ; (mov r8, r8)
+ 8000d92: 46bd mov sp, r7
+ 8000d94: b002 add sp, #8
+ 8000d96: bd80 pop {r7, pc}
+ 8000d98: ffe0ffff .word 0xffe0ffff
+
+08000d9c :
+ * @param LPUARTx LPUART Instance
+ * @param Time Value between Min_Data=0 and Max_Data=31
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
+{
+ 8000d9c: b580 push {r7, lr}
+ 8000d9e: b082 sub sp, #8
+ 8000da0: af00 add r7, sp, #0
+ 8000da2: 6078 str r0, [r7, #4]
+ 8000da4: 6039 str r1, [r7, #0]
+ MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
+ 8000da6: 687b ldr r3, [r7, #4]
+ 8000da8: 681b ldr r3, [r3, #0]
+ 8000daa: 4a05 ldr r2, [pc, #20] ; (8000dc0 )
+ 8000dac: 401a ands r2, r3
+ 8000dae: 683b ldr r3, [r7, #0]
+ 8000db0: 055b lsls r3, r3, #21
+ 8000db2: 431a orrs r2, r3
+ 8000db4: 687b ldr r3, [r7, #4]
+ 8000db6: 601a str r2, [r3, #0]
+}
+ 8000db8: 46c0 nop ; (mov r8, r8)
+ 8000dba: 46bd mov sp, r7
+ 8000dbc: b002 add sp, #8
+ 8000dbe: bd80 pop {r7, pc}
+ 8000dc0: fc1fffff .word 0xfc1fffff
+
+08000dc4 :
+ * @rmtoll CR3 DEM LL_LPUART_EnableDEMode
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
+{
+ 8000dc4: b580 push {r7, lr}
+ 8000dc6: b082 sub sp, #8
+ 8000dc8: af00 add r7, sp, #0
+ 8000dca: 6078 str r0, [r7, #4]
+ SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
+ 8000dcc: 687b ldr r3, [r7, #4]
+ 8000dce: 689b ldr r3, [r3, #8]
+ 8000dd0: 2280 movs r2, #128 ; 0x80
+ 8000dd2: 01d2 lsls r2, r2, #7
+ 8000dd4: 431a orrs r2, r3
+ 8000dd6: 687b ldr r3, [r7, #4]
+ 8000dd8: 609a str r2, [r3, #8]
+}
+ 8000dda: 46c0 nop ; (mov r8, r8)
+ 8000ddc: 46bd mov sp, r7
+ 8000dde: b002 add sp, #8
+ 8000de0: bd80 pop {r7, pc}
+ ...
+
+08000de4 :
+ * @arg @ref LL_LPUART_DE_POLARITY_HIGH
+ * @arg @ref LL_LPUART_DE_POLARITY_LOW
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
+{
+ 8000de4: b580 push {r7, lr}
+ 8000de6: b082 sub sp, #8
+ 8000de8: af00 add r7, sp, #0
+ 8000dea: 6078 str r0, [r7, #4]
+ 8000dec: 6039 str r1, [r7, #0]
+ MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
+ 8000dee: 687b ldr r3, [r7, #4]
+ 8000df0: 689b ldr r3, [r3, #8]
+ 8000df2: 4a05 ldr r2, [pc, #20] ; (8000e08 )
+ 8000df4: 401a ands r2, r3
+ 8000df6: 683b ldr r3, [r7, #0]
+ 8000df8: 431a orrs r2, r3
+ 8000dfa: 687b ldr r3, [r7, #4]
+ 8000dfc: 609a str r2, [r3, #8]
+}
+ 8000dfe: 46c0 nop ; (mov r8, r8)
+ 8000e00: 46bd mov sp, r7
+ 8000e02: b002 add sp, #8
+ 8000e04: bd80 pop {r7, pc}
+ 8000e06: 46c0 nop ; (mov r8, r8)
+ 8000e08: ffff7fff .word 0xffff7fff
+
+08000e0c :
+ * @rmtoll ISR TXE LL_LPUART_IsActiveFlag_TXE
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
+{
+ 8000e0c: b580 push {r7, lr}
+ 8000e0e: b082 sub sp, #8
+ 8000e10: af00 add r7, sp, #0
+ 8000e12: 6078 str r0, [r7, #4]
+ return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
+ 8000e14: 687b ldr r3, [r7, #4]
+ 8000e16: 69db ldr r3, [r3, #28]
+ 8000e18: 2280 movs r2, #128 ; 0x80
+ 8000e1a: 4013 ands r3, r2
+ 8000e1c: 2b80 cmp r3, #128 ; 0x80
+ 8000e1e: d101 bne.n 8000e24
+ 8000e20: 2301 movs r3, #1
+ 8000e22: e000 b.n 8000e26
+ 8000e24: 2300 movs r3, #0
+}
+ 8000e26: 0018 movs r0, r3
+ 8000e28: 46bd mov sp, r7
+ 8000e2a: b002 add sp, #8
+ 8000e2c: bd80 pop {r7, pc}
+
+08000e2e :
+ * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
+{
+ 8000e2e: b580 push {r7, lr}
+ 8000e30: b082 sub sp, #8
+ 8000e32: af00 add r7, sp, #0
+ 8000e34: 6078 str r0, [r7, #4]
+ SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
+ 8000e36: 687b ldr r3, [r7, #4]
+ 8000e38: 681b ldr r3, [r3, #0]
+ 8000e3a: 2210 movs r2, #16
+ 8000e3c: 431a orrs r2, r3
+ 8000e3e: 687b ldr r3, [r7, #4]
+ 8000e40: 601a str r2, [r3, #0]
+}
+ 8000e42: 46c0 nop ; (mov r8, r8)
+ 8000e44: 46bd mov sp, r7
+ 8000e46: b002 add sp, #8
+ 8000e48: bd80 pop {r7, pc}
+
+08000e4a :
+ * @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
+{
+ 8000e4a: b580 push {r7, lr}
+ 8000e4c: b082 sub sp, #8
+ 8000e4e: af00 add r7, sp, #0
+ 8000e50: 6078 str r0, [r7, #4]
+ SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
+ 8000e52: 687b ldr r3, [r7, #4]
+ 8000e54: 681b ldr r3, [r3, #0]
+ 8000e56: 2220 movs r2, #32
+ 8000e58: 431a orrs r2, r3
+ 8000e5a: 687b ldr r3, [r7, #4]
+ 8000e5c: 601a str r2, [r3, #0]
+}
+ 8000e5e: 46c0 nop ; (mov r8, r8)
+ 8000e60: 46bd mov sp, r7
+ 8000e62: b002 add sp, #8
+ 8000e64: bd80 pop {r7, pc}
+
+08000e66 :
+ * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
+{
+ 8000e66: b580 push {r7, lr}
+ 8000e68: b082 sub sp, #8
+ 8000e6a: af00 add r7, sp, #0
+ 8000e6c: 6078 str r0, [r7, #4]
+ CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
+ 8000e6e: 687b ldr r3, [r7, #4]
+ 8000e70: 681b ldr r3, [r3, #0]
+ 8000e72: 2210 movs r2, #16
+ 8000e74: 4393 bics r3, r2
+ 8000e76: 001a movs r2, r3
+ 8000e78: 687b ldr r3, [r7, #4]
+ 8000e7a: 601a str r2, [r3, #0]
+}
+ 8000e7c: 46c0 nop ; (mov r8, r8)
+ 8000e7e: 46bd mov sp, r7
+ 8000e80: b002 add sp, #8
+ 8000e82: bd80 pop {r7, pc}
+
+08000e84 :
+ * @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
+{
+ 8000e84: b580 push {r7, lr}
+ 8000e86: b082 sub sp, #8
+ 8000e88: af00 add r7, sp, #0
+ 8000e8a: 6078 str r0, [r7, #4]
+ CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
+ 8000e8c: 687b ldr r3, [r7, #4]
+ 8000e8e: 681b ldr r3, [r3, #0]
+ 8000e90: 2220 movs r2, #32
+ 8000e92: 4393 bics r3, r2
+ 8000e94: 001a movs r2, r3
+ 8000e96: 687b ldr r3, [r7, #4]
+ 8000e98: 601a str r2, [r3, #0]
+}
+ 8000e9a: 46c0 nop ; (mov r8, r8)
+ 8000e9c: 46bd mov sp, r7
+ 8000e9e: b002 add sp, #8
+ 8000ea0: bd80 pop {r7, pc}
+
+08000ea2 :
+ * @param LPUARTx LPUART Instance
+ * @param Value between Min_Data=0x00 and Max_Data=0x1FF
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
+{
+ 8000ea2: b580 push {r7, lr}
+ 8000ea4: b082 sub sp, #8
+ 8000ea6: af00 add r7, sp, #0
+ 8000ea8: 6078 str r0, [r7, #4]
+ 8000eaa: 000a movs r2, r1
+ 8000eac: 1cbb adds r3, r7, #2
+ 8000eae: 801a strh r2, [r3, #0]
+ LPUARTx->TDR = Value & 0x1FFUL;
+ 8000eb0: 1cbb adds r3, r7, #2
+ 8000eb2: 881b ldrh r3, [r3, #0]
+ 8000eb4: 05db lsls r3, r3, #23
+ 8000eb6: 0dda lsrs r2, r3, #23
+ 8000eb8: 687b ldr r3, [r7, #4]
+ 8000eba: 629a str r2, [r3, #40] ; 0x28
+}
+ 8000ebc: 46c0 nop ; (mov r8, r8)
+ 8000ebe: 46bd mov sp, r7
+ 8000ec0: b002 add sp, #8
+ 8000ec2: bd80 pop {r7, pc}
+
+08000ec4 :
+ * @brief Enable HSI oscillator
+ * @rmtoll CR HSION LL_RCC_HSI_Enable
+ * @retval None
+ */
+__STATIC_INLINE void LL_RCC_HSI_Enable(void)
+{
+ 8000ec4: b580 push {r7, lr}
+ 8000ec6: af00 add r7, sp, #0
+ SET_BIT(RCC->CR, RCC_CR_HSION);
+ 8000ec8: 4b04 ldr r3, [pc, #16] ; (8000edc )
+ 8000eca: 681a ldr r2, [r3, #0]
+ 8000ecc: 4b03 ldr r3, [pc, #12] ; (8000edc )
+ 8000ece: 2101 movs r1, #1
+ 8000ed0: 430a orrs r2, r1
+ 8000ed2: 601a str r2, [r3, #0]
+}
+ 8000ed4: 46c0 nop ; (mov r8, r8)
+ 8000ed6: 46bd mov sp, r7
+ 8000ed8: bd80 pop {r7, pc}
+ 8000eda: 46c0 nop ; (mov r8, r8)
+ 8000edc: 40021000 .word 0x40021000
+
+08000ee0 :
+ * @brief Check if HSI clock is ready
+ * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
+{
+ 8000ee0: b580 push {r7, lr}
+ 8000ee2: af00 add r7, sp, #0
+ return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RCC_CR_HSIRDY) ? 1UL : 0UL);
+ 8000ee4: 4b05 ldr r3, [pc, #20] ; (8000efc )
+ 8000ee6: 681b ldr r3, [r3, #0]
+ 8000ee8: 2204 movs r2, #4
+ 8000eea: 4013 ands r3, r2
+ 8000eec: 2b04 cmp r3, #4
+ 8000eee: d101 bne.n 8000ef4
+ 8000ef0: 2301 movs r3, #1
+ 8000ef2: e000 b.n 8000ef6
+ 8000ef4: 2300 movs r3, #0
+}
+ 8000ef6: 0018 movs r0, r3
+ 8000ef8: 46bd mov sp, r7
+ 8000efa: bd80 pop {r7, pc}
+ 8000efc: 40021000 .word 0x40021000
+
+08000f00 :
+ * @rmtoll ICSCR HSITRIM LL_RCC_HSI_SetCalibTrimming
+ * @param Value between Min_Data = 0x00 and Max_Data = 0x1F
+ * @retval None
+ */
+__STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
+{
+ 8000f00: b580 push {r7, lr}
+ 8000f02: b082 sub sp, #8
+ 8000f04: af00 add r7, sp, #0
+ 8000f06: 6078 str r0, [r7, #4]
+ MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, Value << RCC_ICSCR_HSITRIM_Pos);
+ 8000f08: 4b06 ldr r3, [pc, #24] ; (8000f24 )
+ 8000f0a: 685b ldr r3, [r3, #4]
+ 8000f0c: 4a06 ldr r2, [pc, #24] ; (8000f28 )
+ 8000f0e: 4013 ands r3, r2
+ 8000f10: 0019 movs r1, r3
+ 8000f12: 687b ldr r3, [r7, #4]
+ 8000f14: 021a lsls r2, r3, #8
+ 8000f16: 4b03 ldr r3, [pc, #12] ; (8000f24 )
+ 8000f18: 430a orrs r2, r1
+ 8000f1a: 605a str r2, [r3, #4]
+}
+ 8000f1c: 46c0 nop ; (mov r8, r8)
+ 8000f1e: 46bd mov sp, r7
+ 8000f20: b002 add sp, #8
+ 8000f22: bd80 pop {r7, pc}
+ 8000f24: 40021000 .word 0x40021000
+ 8000f28: ffffe0ff .word 0xffffe0ff
+
+08000f2c :
+ * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
+ * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
+ * @retval None
+ */
+__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
+{
+ 8000f2c: b580 push {r7, lr}
+ 8000f2e: b082 sub sp, #8
+ 8000f30: af00 add r7, sp, #0
+ 8000f32: 6078 str r0, [r7, #4]
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
+ 8000f34: 4b06 ldr r3, [pc, #24] ; (8000f50 )
+ 8000f36: 68db ldr r3, [r3, #12]
+ 8000f38: 2203 movs r2, #3
+ 8000f3a: 4393 bics r3, r2
+ 8000f3c: 0019 movs r1, r3
+ 8000f3e: 4b04 ldr r3, [pc, #16] ; (8000f50 )
+ 8000f40: 687a ldr r2, [r7, #4]
+ 8000f42: 430a orrs r2, r1
+ 8000f44: 60da str r2, [r3, #12]
+}
+ 8000f46: 46c0 nop ; (mov r8, r8)
+ 8000f48: 46bd mov sp, r7
+ 8000f4a: b002 add sp, #8
+ 8000f4c: bd80 pop {r7, pc}
+ 8000f4e: 46c0 nop ; (mov r8, r8)
+ 8000f50: 40021000 .word 0x40021000
+
+08000f54 :
+ * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
+ * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
+ * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
+ */
+__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
+{
+ 8000f54: b580 push {r7, lr}
+ 8000f56: af00 add r7, sp, #0
+ return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
+ 8000f58: 4b03 ldr r3, [pc, #12] ; (8000f68 )
+ 8000f5a: 68db ldr r3, [r3, #12]
+ 8000f5c: 220c movs r2, #12
+ 8000f5e: 4013 ands r3, r2
+}
+ 8000f60: 0018 movs r0, r3
+ 8000f62: 46bd mov sp, r7
+ 8000f64: bd80 pop {r7, pc}
+ 8000f66: 46c0 nop ; (mov r8, r8)
+ 8000f68: 40021000 .word 0x40021000
+
+08000f6c :
+ * @arg @ref LL_RCC_SYSCLK_DIV_256
+ * @arg @ref LL_RCC_SYSCLK_DIV_512
+ * @retval None
+ */
+__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
+{
+ 8000f6c: b580 push {r7, lr}
+ 8000f6e: b082 sub sp, #8
+ 8000f70: af00 add r7, sp, #0
+ 8000f72: 6078 str r0, [r7, #4]
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
+ 8000f74: 4b06 ldr r3, [pc, #24] ; (8000f90 )
+ 8000f76: 68db ldr r3, [r3, #12]
+ 8000f78: 22f0 movs r2, #240 ; 0xf0
+ 8000f7a: 4393 bics r3, r2
+ 8000f7c: 0019 movs r1, r3
+ 8000f7e: 4b04 ldr r3, [pc, #16] ; (8000f90 )
+ 8000f80: 687a ldr r2, [r7, #4]
+ 8000f82: 430a orrs r2, r1
+ 8000f84: 60da str r2, [r3, #12]
+}
+ 8000f86: 46c0 nop ; (mov r8, r8)
+ 8000f88: 46bd mov sp, r7
+ 8000f8a: b002 add sp, #8
+ 8000f8c: bd80 pop {r7, pc}
+ 8000f8e: 46c0 nop ; (mov r8, r8)
+ 8000f90: 40021000 .word 0x40021000
+
+08000f94 :
+ * @arg @ref LL_RCC_APB1_DIV_8
+ * @arg @ref LL_RCC_APB1_DIV_16
+ * @retval None
+ */
+__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
+{
+ 8000f94: b580 push {r7, lr}
+ 8000f96: b082 sub sp, #8
+ 8000f98: af00 add r7, sp, #0
+ 8000f9a: 6078 str r0, [r7, #4]
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
+ 8000f9c: 4b06 ldr r3, [pc, #24] ; (8000fb8 )
+ 8000f9e: 68db ldr r3, [r3, #12]
+ 8000fa0: 4a06 ldr r2, [pc, #24] ; (8000fbc )
+ 8000fa2: 4013 ands r3, r2
+ 8000fa4: 0019 movs r1, r3
+ 8000fa6: 4b04 ldr r3, [pc, #16] ; (8000fb8 )
+ 8000fa8: 687a ldr r2, [r7, #4]
+ 8000faa: 430a orrs r2, r1
+ 8000fac: 60da str r2, [r3, #12]
+}
+ 8000fae: 46c0 nop ; (mov r8, r8)
+ 8000fb0: 46bd mov sp, r7
+ 8000fb2: b002 add sp, #8
+ 8000fb4: bd80 pop {r7, pc}
+ 8000fb6: 46c0 nop ; (mov r8, r8)
+ 8000fb8: 40021000 .word 0x40021000
+ 8000fbc: fffff8ff .word 0xfffff8ff
+
+08000fc0 :
+ * @arg @ref LL_RCC_APB2_DIV_8
+ * @arg @ref LL_RCC_APB2_DIV_16
+ * @retval None
+ */
+__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
+{
+ 8000fc0: b580 push {r7, lr}
+ 8000fc2: b082 sub sp, #8
+ 8000fc4: af00 add r7, sp, #0
+ 8000fc6: 6078 str r0, [r7, #4]
+ MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
+ 8000fc8: 4b06 ldr r3, [pc, #24] ; (8000fe4 )
+ 8000fca: 68db ldr r3, [r3, #12]
+ 8000fcc: 4a06 ldr r2, [pc, #24] ; (8000fe8 )
+ 8000fce: 4013 ands r3, r2
+ 8000fd0: 0019 movs r1, r3
+ 8000fd2: 4b04 ldr r3, [pc, #16] ; (8000fe4 )
+ 8000fd4: 687a ldr r2, [r7, #4]
+ 8000fd6: 430a orrs r2, r1
+ 8000fd8: 60da str r2, [r3, #12]
+}
+ 8000fda: 46c0 nop ; (mov r8, r8)
+ 8000fdc: 46bd mov sp, r7
+ 8000fde: b002 add sp, #8
+ 8000fe0: bd80 pop {r7, pc}
+ 8000fe2: 46c0 nop ; (mov r8, r8)
+ 8000fe4: 40021000 .word 0x40021000
+ 8000fe8: ffffc7ff .word 0xffffc7ff
+
+08000fec :
+ * @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
+ * @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
+ * @retval None
+ */
+__STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource)
+{
+ 8000fec: b580 push {r7, lr}
+ 8000fee: b082 sub sp, #8
+ 8000ff0: af00 add r7, sp, #0
+ 8000ff2: 6078 str r0, [r7, #4]
+ MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource);
+ 8000ff4: 4b06 ldr r3, [pc, #24] ; (8001010 )
+ 8000ff6: 6cdb ldr r3, [r3, #76] ; 0x4c
+ 8000ff8: 4a06 ldr r2, [pc, #24] ; (8001014 )
+ 8000ffa: 4013 ands r3, r2
+ 8000ffc: 0019 movs r1, r3
+ 8000ffe: 4b04 ldr r3, [pc, #16] ; (8001010 )
+ 8001000: 687a ldr r2, [r7, #4]
+ 8001002: 430a orrs r2, r1
+ 8001004: 64da str r2, [r3, #76] ; 0x4c
+}
+ 8001006: 46c0 nop ; (mov r8, r8)
+ 8001008: 46bd mov sp, r7
+ 800100a: b002 add sp, #8
+ 800100c: bd80 pop {r7, pc}
+ 800100e: 46c0 nop ; (mov r8, r8)
+ 8001010: 40021000 .word 0x40021000
+ 8001014: fffff3ff .word 0xfffff3ff
+
+08001018 :
+ *
+ * (*) value not defined in all devices.
+ * @retval None
+ */
+__STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource)
+{
+ 8001018: b580 push {r7, lr}
+ 800101a: b082 sub sp, #8
+ 800101c: af00 add r7, sp, #0
+ 800101e: 6078 str r0, [r7, #4]
+ MODIFY_REG(RCC->CCIPR, ((I2CxSource >> 4U) & 0x000FF000U), ((I2CxSource << 4U) & 0x000FF000U));
+ 8001020: 4b0a ldr r3, [pc, #40] ; (800104c )
+ 8001022: 6cdb ldr r3, [r3, #76] ; 0x4c
+ 8001024: 687a ldr r2, [r7, #4]
+ 8001026: 0911 lsrs r1, r2, #4
+ 8001028: 22ff movs r2, #255 ; 0xff
+ 800102a: 0312 lsls r2, r2, #12
+ 800102c: 400a ands r2, r1
+ 800102e: 43d2 mvns r2, r2
+ 8001030: 401a ands r2, r3
+ 8001032: 0011 movs r1, r2
+ 8001034: 687b ldr r3, [r7, #4]
+ 8001036: 011a lsls r2, r3, #4
+ 8001038: 23ff movs r3, #255 ; 0xff
+ 800103a: 031b lsls r3, r3, #12
+ 800103c: 401a ands r2, r3
+ 800103e: 4b03 ldr r3, [pc, #12] ; (800104c