From bb3b6ada069c3d0b51fdd82abb67620077904ce6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20=C5=BDaitl=C3=ADk?= Date: Thu, 21 Oct 2021 22:45:22 +0200 Subject: [PATCH] Moved the old firmware for STM32L011 to fw_old and migrated the firmware to STM32L031 in fw. I2C and TIM21 seem functional. USART2 is receiving correctly, but the modbus test is not receiving messages. --- fw/.cproject | 583 +- fw/.mxproject | 6 +- fw/.project | 1 - fw/.settings/stm32cubeide.project.prefs | 5 +- fw/Core/Inc/main.h | 12 +- fw/Core/Inc/stm32l0xx_it.h | 2 +- fw/Core/Src/i2c.c | 2 +- fw/Core/Src/main.c | 243 +- fw/Core/Src/stm32l0xx_it.c | 53 +- fw/Core/Startup/startup_stm32l031g6ux.s | 261 + .../Device/ST/STM32L0xx/Include/stm32l031xx.h | 6094 +++++++++++ .../Device/ST/STM32L0xx/Include/stm32l0xx.h | 42 +- .../Inc/stm32l0xx_ll_cortex.h | 2 +- .../Inc/stm32l0xx_ll_i2c.h | 231 +- .../Inc/stm32l0xx_ll_tim.h | 103 +- .../Inc/stm32l0xx_ll_usart.h | 3751 +++++++ .../Src/stm32l0xx_ll_i2c.c | 6 +- .../Src/stm32l0xx_ll_rcc.c | 20 +- .../Src/stm32l0xx_ll_tim.c | 21 +- .../Src/stm32l0xx_ll_usart.c | 420 + fw/STM32L031G6UX_FLASH.ld | 186 + fw/iaq_wired_sensor Debug.launch | 21 +- fw/iaq_wired_sensor.ioc | 100 +- fw_old/.cproject | 396 + fw_old/.mxproject | 24 + fw_old/.project | 33 + .../org.eclipse.cdt.codan.core.prefs | 72 + fw_old/.settings/org.eclipse.cdt.core.prefs | 6 + fw_old/.settings/stm32cubeide.project.prefs | 3 + fw_old/Core/Inc/config.h | 145 + fw_old/Core/Inc/crc8.h | 22 + fw_old/Core/Inc/i2c.h | 46 + fw_old/Core/Inc/main.h | 120 + fw_old/Core/Inc/modbus.h | 181 + fw_old/Core/Inc/scd4x.h | 57 + fw_old/Core/Inc/sht4x.h | 57 + fw_old/Core/Inc/sps30.h | 78 + fw_old/Core/Inc/stm32_assert.h | 53 + fw_old/Core/Inc/stm32l0xx_it.h | 65 + fw_old/Core/Src/config.c | 243 + fw_old/Core/Src/crc8.c | 28 + fw_old/Core/Src/i2c.c | 78 + fw_old/Core/Src/main.c | 827 ++ fw_old/Core/Src/modbus.c | 265 + fw_old/Core/Src/scd4x.c | 106 + fw_old/Core/Src/sht4x.c | 58 + fw_old/Core/Src/sps30.c | 193 + fw_old/Core/Src/stm32l0xx_it.c | 208 + fw_old/Core/Src/syscalls.c | 159 + fw_old/Core/Src/sysmem.c | 80 + fw_old/Core/Src/system_stm32l0xx.c | 275 + .../Core/Startup/startup_stm32l011f4ux.s | 0 fw_old/Debug/Core/Src/config.d | 24 + fw_old/Debug/Core/Src/config.o | Bin 0 -> 292872 bytes fw_old/Debug/Core/Src/config.su | 7 + fw_old/Debug/Core/Src/crc8.d | 3 + fw_old/Debug/Core/Src/crc8.o | Bin 0 -> 30196 bytes fw_old/Debug/Core/Src/crc8.su | 1 + fw_old/Debug/Core/Src/i2c.d | 30 + fw_old/Debug/Core/Src/i2c.o | Bin 0 -> 300872 bytes fw_old/Debug/Core/Src/i2c.su | 11 + fw_old/Debug/Core/Src/main.d | 80 + fw_old/Debug/Core/Src/main.o | Bin 0 -> 387780 bytes fw_old/Debug/Core/Src/main.su | 63 + fw_old/Debug/Core/Src/modbus.d | 3 + fw_old/Debug/Core/Src/modbus.o | Bin 0 -> 39052 bytes fw_old/Debug/Core/Src/modbus.su | 4 + fw_old/Debug/Core/Src/scd4x.d | 82 + fw_old/Debug/Core/Src/scd4x.o | Bin 0 -> 347920 bytes fw_old/Debug/Core/Src/scd4x.su | 6 + fw_old/Debug/Core/Src/sht4x.d | 82 + fw_old/Debug/Core/Src/sht4x.o | Bin 0 -> 346532 bytes fw_old/Debug/Core/Src/sht4x.su | 3 + fw_old/Debug/Core/Src/sps30.d | 35 + fw_old/Debug/Core/Src/sps30.o | Bin 0 -> 298684 bytes fw_old/Debug/Core/Src/sps30.su | 11 + fw_old/Debug/Core/Src/stm32l0xx_it.d | 84 + fw_old/Debug/Core/Src/stm32l0xx_it.o | Bin 0 -> 351700 bytes fw_old/Debug/Core/Src/stm32l0xx_it.su | 15 + fw_old/Debug/Core/Src/subdir.mk | 53 + fw_old/Debug/Core/Src/syscalls.d | 1 + fw_old/Debug/Core/Src/syscalls.o | Bin 0 -> 81416 bytes fw_old/Debug/Core/Src/syscalls.su | 18 + fw_old/Debug/Core/Src/sysmem.d | 1 + fw_old/Debug/Core/Src/sysmem.o | Bin 0 -> 51396 bytes fw_old/Debug/Core/Src/sysmem.su | 1 + fw_old/Debug/Core/Src/system_stm32l0xx.d | 22 + fw_old/Debug/Core/Src/system_stm32l0xx.o | Bin 0 -> 286892 bytes fw_old/Debug/Core/Src/system_stm32l0xx.su | 2 + .../Core/Startup/startup_stm32l011f4ux.d | 2 + .../Core/Startup/startup_stm32l011f4ux.o | Bin 0 -> 4072 bytes fw_old/Debug/Core/Startup/subdir.mk | 20 + .../Src/stm32l0xx_ll_dma.d | 29 + .../Src/stm32l0xx_ll_dma.o | Bin 0 -> 303204 bytes .../Src/stm32l0xx_ll_dma.su | 15 + .../Src/stm32l0xx_ll_exti.d | 26 + .../Src/stm32l0xx_ll_exti.o | Bin 0 -> 292532 bytes .../Src/stm32l0xx_ll_exti.su | 11 + .../Src/stm32l0xx_ll_gpio.d | 29 + .../Src/stm32l0xx_ll_gpio.o | Bin 0 -> 296692 bytes .../Src/stm32l0xx_ll_gpio.su | 11 + .../Src/stm32l0xx_ll_i2c.d | 29 + .../Src/stm32l0xx_ll_i2c.o | Bin 0 -> 299816 bytes .../Src/stm32l0xx_ll_i2c.su | 14 + .../Src/stm32l0xx_ll_lpuart.d | 32 + .../Src/stm32l0xx_ll_lpuart.o | Bin 0 -> 306288 bytes .../Src/stm32l0xx_ll_lpuart.su | 9 + .../Src/stm32l0xx_ll_pwr.d | 29 + .../Src/stm32l0xx_ll_pwr.o | Bin 0 -> 289952 bytes .../Src/stm32l0xx_ll_pwr.su | 3 + .../Src/stm32l0xx_ll_rcc.d | 26 + .../Src/stm32l0xx_ll_rcc.o | Bin 0 -> 310784 bytes .../Src/stm32l0xx_ll_rcc.su | 35 + .../Src/stm32l0xx_ll_tim.d | 29 + .../Src/stm32l0xx_ll_tim.o | Bin 0 -> 320384 bytes .../Src/stm32l0xx_ll_tim.su | 29 + .../Src/stm32l0xx_ll_utils.d | 35 + .../Src/stm32l0xx_ll_utils.o | Bin 0 -> 316372 bytes .../Src/stm32l0xx_ll_utils.su | 27 + .../STM32L0xx_HAL_Driver/Src/subdir.mk | 44 + fw_old/Debug/iaq_wired_sensor.bin | Bin 0 -> 14172 bytes fw_old/Debug/iaq_wired_sensor.elf | Bin 0 -> 532828 bytes fw_old/Debug/iaq_wired_sensor.list | 9342 +++++++++++++++++ fw_old/Debug/iaq_wired_sensor.map | 2389 +++++ fw_old/Debug/makefile | 100 + fw_old/Debug/objects.list | 22 + fw_old/Debug/objects.mk | 9 + fw_old/Debug/sources.mk | 26 + .../Device/ST/STM32L0xx/Include/stm32l011xx.h | 0 .../Device/ST/STM32L0xx/Include/stm32l0xx.h | 235 + .../ST/STM32L0xx/Include/system_stm32l0xx.h | 109 + fw_old/Drivers/CMSIS/Include/cmsis_armcc.h | 865 ++ fw_old/Drivers/CMSIS/Include/cmsis_armclang.h | 1869 ++++ fw_old/Drivers/CMSIS/Include/cmsis_compiler.h | 266 + fw_old/Drivers/CMSIS/Include/cmsis_gcc.h | 2085 ++++ fw_old/Drivers/CMSIS/Include/cmsis_iccarm.h | 935 ++ fw_old/Drivers/CMSIS/Include/cmsis_version.h | 39 + fw_old/Drivers/CMSIS/Include/core_armv8mbl.h | 1918 ++++ fw_old/Drivers/CMSIS/Include/core_armv8mml.h | 2927 ++++++ fw_old/Drivers/CMSIS/Include/core_cm0.h | 949 ++ fw_old/Drivers/CMSIS/Include/core_cm0plus.h | 1083 ++ fw_old/Drivers/CMSIS/Include/core_cm1.h | 976 ++ fw_old/Drivers/CMSIS/Include/core_cm23.h | 1993 ++++ fw_old/Drivers/CMSIS/Include/core_cm3.h | 1941 ++++ fw_old/Drivers/CMSIS/Include/core_cm33.h | 3002 ++++++ fw_old/Drivers/CMSIS/Include/core_cm4.h | 2129 ++++ fw_old/Drivers/CMSIS/Include/core_cm7.h | 2671 +++++ fw_old/Drivers/CMSIS/Include/core_sc000.h | 1022 ++ fw_old/Drivers/CMSIS/Include/core_sc300.h | 1915 ++++ fw_old/Drivers/CMSIS/Include/mpu_armv7.h | 270 + fw_old/Drivers/CMSIS/Include/mpu_armv8.h | 333 + fw_old/Drivers/CMSIS/Include/tz_context.h | 70 + .../Inc/stm32l0xx_ll_bus.h | 1171 +++ .../Inc/stm32l0xx_ll_cortex.h | 590 ++ .../Inc/stm32l0xx_ll_crs.h | 798 ++ .../Inc/stm32l0xx_ll_dma.h | 2129 ++++ .../Inc/stm32l0xx_ll_exti.h | 1016 ++ .../Inc/stm32l0xx_ll_gpio.h | 945 ++ .../Inc/stm32l0xx_ll_i2c.h | 2230 ++++ .../Inc/stm32l0xx_ll_lpuart.h | 0 .../Inc/stm32l0xx_ll_pwr.h | 746 ++ .../Inc/stm32l0xx_ll_rcc.h | 2497 +++++ .../Inc/stm32l0xx_ll_system.h | 1089 ++ .../Inc/stm32l0xx_ll_tim.h | 3289 ++++++ .../Inc/stm32l0xx_ll_utils.h | 269 + .../Src/stm32l0xx_ll_dma.c | 379 + .../Src/stm32l0xx_ll_exti.c | 214 + .../Src/stm32l0xx_ll_gpio.c | 263 + .../Src/stm32l0xx_ll_i2c.c | 239 + .../Src/stm32l0xx_ll_lpuart.c | 0 .../Src/stm32l0xx_ll_pwr.c | 85 + .../Src/stm32l0xx_ll_rcc.c | 698 ++ .../Src/stm32l0xx_ll_tim.c | 847 ++ .../Src/stm32l0xx_ll_utils.c | 591 ++ {fw => fw_old}/STM32L011F4UX_FLASH.ld | 0 fw_old/iaq_wired_sensor Debug.launch | 73 + fw_old/iaq_wired_sensor.ioc | 150 + 177 files changed, 78202 insertions(+), 765 deletions(-) create mode 100644 fw/Core/Startup/startup_stm32l031g6ux.s create mode 100644 fw/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h create mode 100644 fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h create mode 100644 fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c create mode 100644 fw/STM32L031G6UX_FLASH.ld create mode 100644 fw_old/.cproject create mode 100644 fw_old/.mxproject create mode 100644 fw_old/.project create mode 100644 fw_old/.settings/org.eclipse.cdt.codan.core.prefs create mode 100644 fw_old/.settings/org.eclipse.cdt.core.prefs create mode 100644 fw_old/.settings/stm32cubeide.project.prefs create mode 100644 fw_old/Core/Inc/config.h create mode 100644 fw_old/Core/Inc/crc8.h create mode 100644 fw_old/Core/Inc/i2c.h create mode 100644 fw_old/Core/Inc/main.h create mode 100644 fw_old/Core/Inc/modbus.h create mode 100644 fw_old/Core/Inc/scd4x.h create mode 100644 fw_old/Core/Inc/sht4x.h create mode 100644 fw_old/Core/Inc/sps30.h create mode 100644 fw_old/Core/Inc/stm32_assert.h create mode 100644 fw_old/Core/Inc/stm32l0xx_it.h create mode 100644 fw_old/Core/Src/config.c create mode 100644 fw_old/Core/Src/crc8.c create mode 100644 fw_old/Core/Src/i2c.c create mode 100644 fw_old/Core/Src/main.c create mode 100644 fw_old/Core/Src/modbus.c create mode 100644 fw_old/Core/Src/scd4x.c create mode 100644 fw_old/Core/Src/sht4x.c create mode 100644 fw_old/Core/Src/sps30.c create mode 100644 fw_old/Core/Src/stm32l0xx_it.c create mode 100644 fw_old/Core/Src/syscalls.c create mode 100644 fw_old/Core/Src/sysmem.c create mode 100644 fw_old/Core/Src/system_stm32l0xx.c rename {fw => fw_old}/Core/Startup/startup_stm32l011f4ux.s (100%) create mode 100644 fw_old/Debug/Core/Src/config.d create mode 100644 fw_old/Debug/Core/Src/config.o create mode 100644 fw_old/Debug/Core/Src/config.su create mode 100644 fw_old/Debug/Core/Src/crc8.d create mode 100644 fw_old/Debug/Core/Src/crc8.o create mode 100644 fw_old/Debug/Core/Src/crc8.su create mode 100644 fw_old/Debug/Core/Src/i2c.d create mode 100644 fw_old/Debug/Core/Src/i2c.o create mode 100644 fw_old/Debug/Core/Src/i2c.su create mode 100644 fw_old/Debug/Core/Src/main.d create mode 100644 fw_old/Debug/Core/Src/main.o create mode 100644 fw_old/Debug/Core/Src/main.su create mode 100644 fw_old/Debug/Core/Src/modbus.d create mode 100644 fw_old/Debug/Core/Src/modbus.o create mode 100644 fw_old/Debug/Core/Src/modbus.su create mode 100644 fw_old/Debug/Core/Src/scd4x.d create mode 100644 fw_old/Debug/Core/Src/scd4x.o create mode 100644 fw_old/Debug/Core/Src/scd4x.su create mode 100644 fw_old/Debug/Core/Src/sht4x.d create mode 100644 fw_old/Debug/Core/Src/sht4x.o create mode 100644 fw_old/Debug/Core/Src/sht4x.su create mode 100644 fw_old/Debug/Core/Src/sps30.d create mode 100644 fw_old/Debug/Core/Src/sps30.o create mode 100644 fw_old/Debug/Core/Src/sps30.su create mode 100644 fw_old/Debug/Core/Src/stm32l0xx_it.d create mode 100644 fw_old/Debug/Core/Src/stm32l0xx_it.o create mode 100644 fw_old/Debug/Core/Src/stm32l0xx_it.su create mode 100644 fw_old/Debug/Core/Src/subdir.mk create mode 100644 fw_old/Debug/Core/Src/syscalls.d create mode 100644 fw_old/Debug/Core/Src/syscalls.o create mode 100644 fw_old/Debug/Core/Src/syscalls.su create mode 100644 fw_old/Debug/Core/Src/sysmem.d create mode 100644 fw_old/Debug/Core/Src/sysmem.o create mode 100644 fw_old/Debug/Core/Src/sysmem.su create mode 100644 fw_old/Debug/Core/Src/system_stm32l0xx.d create mode 100644 fw_old/Debug/Core/Src/system_stm32l0xx.o create mode 100644 fw_old/Debug/Core/Src/system_stm32l0xx.su create mode 100644 fw_old/Debug/Core/Startup/startup_stm32l011f4ux.d create mode 100644 fw_old/Debug/Core/Startup/startup_stm32l011f4ux.o create mode 100644 fw_old/Debug/Core/Startup/subdir.mk create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.d create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.su create mode 100644 fw_old/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk create mode 100755 fw_old/Debug/iaq_wired_sensor.bin create mode 100755 fw_old/Debug/iaq_wired_sensor.elf create mode 100644 fw_old/Debug/iaq_wired_sensor.list create mode 100644 fw_old/Debug/iaq_wired_sensor.map create mode 100644 fw_old/Debug/makefile create mode 100644 fw_old/Debug/objects.list create mode 100644 fw_old/Debug/objects.mk create mode 100644 fw_old/Debug/sources.mk rename {fw => fw_old}/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h (100%) create mode 100644 fw_old/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h create mode 100644 fw_old/Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h create mode 100644 fw_old/Drivers/CMSIS/Include/cmsis_armcc.h create mode 100644 fw_old/Drivers/CMSIS/Include/cmsis_armclang.h create mode 100644 fw_old/Drivers/CMSIS/Include/cmsis_compiler.h create mode 100644 fw_old/Drivers/CMSIS/Include/cmsis_gcc.h create mode 100644 fw_old/Drivers/CMSIS/Include/cmsis_iccarm.h create mode 100644 fw_old/Drivers/CMSIS/Include/cmsis_version.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_armv8mbl.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_armv8mml.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_cm0.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_cm0plus.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_cm1.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_cm23.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_cm3.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_cm33.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_cm4.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_cm7.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_sc000.h create mode 100644 fw_old/Drivers/CMSIS/Include/core_sc300.h create mode 100644 fw_old/Drivers/CMSIS/Include/mpu_armv7.h create mode 100644 fw_old/Drivers/CMSIS/Include/mpu_armv8.h create mode 100644 fw_old/Drivers/CMSIS/Include/tz_context.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h rename {fw => fw_old}/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h (100%) create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c rename {fw => fw_old}/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c (100%) create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c create mode 100644 fw_old/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c rename {fw => fw_old}/STM32L011F4UX_FLASH.ld (100%) create mode 100644 fw_old/iaq_wired_sensor Debug.launch create mode 100644 fw_old/iaq_wired_sensor.ioc diff --git a/fw/.cproject b/fw/.cproject index 30a87ca..0005a9c 100644 --- a/fw/.cproject +++ b/fw/.cproject @@ -1,396 +1,191 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/fw/.mxproject b/fw/.mxproject index 4d4db74..13a39f9 100644 --- a/fw/.mxproject +++ b/fw/.mxproject @@ -1,10 +1,10 @@ [PreviousLibFiles] -LibFiles=Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm3.h; +LibFiles=Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm3.h; [PreviousUsedCubeIDEFiles] -SourceFiles=Core/Src/main.c;Core/Src/stm32l0xx_it.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Core/Src/system_stm32l0xx.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Core/Src/system_stm32l0xx.c;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;; +SourceFiles=Core/Src/main.c;Core/Src/stm32l0xx_it.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Core/Src/system_stm32l0xx.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Core/Src/system_stm32l0xx.c;;; HeaderPath=Drivers/STM32L0xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32L0xx/Include;Drivers/CMSIS/Include;Core/Inc; -CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32L011xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1; +CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32L031xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1; [PreviousGenFiles] AdvancedFolderStructure=true diff --git a/fw/.project b/fw/.project index 6232ccb..17919b4 100644 --- a/fw/.project +++ b/fw/.project @@ -24,7 +24,6 @@ org.eclipse.cdt.core.cnature com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature - com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature com.st.stm32cube.ide.mcu.MCURootProjectNature org.eclipse.cdt.managedbuilder.core.managedBuildNature diff --git a/fw/.settings/stm32cubeide.project.prefs b/fw/.settings/stm32cubeide.project.prefs index ae186d6..2a751da 100644 --- a/fw/.settings/stm32cubeide.project.prefs +++ b/fw/.settings/stm32cubeide.project.prefs @@ -1,3 +1,4 @@ -8DF89ED150041C4CBC7CB9A9CAA90856=295E78E9D51884086204F31037537306 -DC22A860405A8BF2F2C095E5B6529F12=295E78E9D51884086204F31037537306 +66BE74F758C12D739921AEA421D593D3=11 +8DF89ED150041C4CBC7CB9A9CAA90856=807411C90E25B050C1E13646B7FEB5AA +DC22A860405A8BF2F2C095E5B6529F12=807411C90E25B050C1E13646B7FEB5AA eclipse.preferences.version=1 diff --git a/fw/Core/Inc/main.h b/fw/Core/Inc/main.h index a144a49..dd3504d 100644 --- a/fw/Core/Inc/main.h +++ b/fw/Core/Inc/main.h @@ -29,9 +29,8 @@ extern "C" { /* Includes ------------------------------------------------------------------*/ #include "stm32l0xx_ll_i2c.h" -#include "stm32l0xx_ll_lpuart.h" -#include "stm32l0xx_ll_rcc.h" #include "stm32l0xx_ll_crs.h" +#include "stm32l0xx_ll_rcc.h" #include "stm32l0xx_ll_bus.h" #include "stm32l0xx_ll_system.h" #include "stm32l0xx_ll_exti.h" @@ -40,6 +39,7 @@ extern "C" { #include "stm32l0xx_ll_pwr.h" #include "stm32l0xx_ll_dma.h" #include "stm32l0xx_ll_tim.h" +#include "stm32l0xx_ll_usart.h" #include "stm32l0xx_ll_gpio.h" #if defined(USE_FULL_ASSERT) @@ -102,10 +102,10 @@ int8_t uart_enable_interrupts(void); /* USER CODE BEGIN Private defines */ #define MEASUREMENT_PERIOD_MS 600000 -extern uint16_t lpuart1_rx_message_index; -extern uint16_t lpuart1_rx_message_len; -extern uint8_t lpuart1_rx_done; -extern uint8_t lpuart1_rx_message_too_long; +extern uint16_t usart2_rx_message_index; +extern uint16_t usart2_rx_message_len; +extern uint8_t usart2_rx_done; +extern uint8_t usart2_rx_message_too_long; extern uint8_t tim21_elapsed_period; diff --git a/fw/Core/Inc/stm32l0xx_it.h b/fw/Core/Inc/stm32l0xx_it.h index e4fecd6..c2f720d 100644 --- a/fw/Core/Inc/stm32l0xx_it.h +++ b/fw/Core/Inc/stm32l0xx_it.h @@ -52,7 +52,7 @@ void SVC_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); void TIM21_IRQHandler(void); -void LPUART1_IRQHandler(void); +void USART2_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/fw/Core/Src/i2c.c b/fw/Core/Src/i2c.c index 07aeaaf..b0991b8 100644 --- a/fw/Core/Src/i2c.c +++ b/fw/Core/Src/i2c.c @@ -6,7 +6,7 @@ */ #include "i2c.h" -#include "stm32l0xx_ll_lpuart.h" +#include "stm32l0xx_ll_usart.h" i2c_context_t *i2c_context; diff --git a/fw/Core/Src/main.c b/fw/Core/Src/main.c index 23f6270..930de14 100644 --- a/fw/Core/Src/main.c +++ b/fw/Core/Src/main.c @@ -118,10 +118,10 @@ uint8_t co2_valid = 0; void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_I2C1_Init(void); -static void MX_LPUART1_UART_Init(void); +static void MX_USART2_UART_Init(void); static void MX_TIM21_Init(void); /* USER CODE BEGIN PFP */ -void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len); +void USART2_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len); /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ @@ -147,6 +147,8 @@ int main(void) LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); /* System interrupt init*/ + /* SysTick_IRQn interrupt configuration */ + NVIC_SetPriority(SysTick_IRQn, 3); /* USER CODE BEGIN Init */ @@ -174,7 +176,7 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_I2C1_Init(); - MX_LPUART1_UART_Init(); + MX_USART2_UART_Init(); MX_TIM21_Init(); /* USER CODE BEGIN 2 */ @@ -191,7 +193,7 @@ int main(void) modbus_slave_set_address(sensor_config.modbus_addr); /* Enable UART for RS485 */ - LL_LPUART_Enable(LPUART1); + LL_USART_Enable(USART2); /* Start the timer for measurement triggering */ LL_TIM_EnableCounter(TIM21); @@ -202,6 +204,8 @@ int main(void) i2c_context.i2c = I2C1; i2c_init(&i2c_context); + LL_mDelay(2000); + scd4x_start_periodic_measurement(); uint8_t scd4x_is_connected = 1; uint8_t sps30_is_connected = 0; @@ -227,34 +231,34 @@ int main(void) /* SHT4x Init Time: max 1 ms (datasheet pg. 8) */ /* SCD4x Init Time: max 1000 ms (datasheet pg. 6) */ /* SPS30 Init Time: max 30000 ms (datasheet pg. 2) */ - LL_mDelay(1000); + LL_mDelay(5000); static uint32_t new_baud; /* Enter the main loop */ while (1) { - if (lpuart1_rx_done == 1) + if (usart2_rx_done == 1) { /* Process the message */ - if (lpuart1_rx_message_too_long) + if (usart2_rx_message_too_long) { /* Do nothing, just delete the buffer and set the flag back to zero*/ - lpuart1_rx_message_too_long = 0; + usart2_rx_message_too_long = 0; } else { /* Process the message: * message is stored in modbus_buffer[], no copying necessary; * but we need to make sure that modbus_buffer[] will not be used while * processing the message: this can be done by disabling RX interrupt */ - LL_LPUART_DisableIT_RXNE(LPUART1); - modbus_slave_process_msg(modbus_buffer, lpuart1_rx_message_len); + LL_USART_DisableIT_RXNE(USART2); + modbus_slave_process_msg(modbus_buffer, usart2_rx_message_len); /* Reset the RX DONE flag */ - lpuart1_rx_done = 0; - LL_LPUART_EnableIT_RXNE(LPUART1); + usart2_rx_done = 0; + LL_USART_EnableIT_RXNE(USART2); } /* Reset the RX DONE flag */ - lpuart1_rx_done = 0; + usart2_rx_done = 0; } /* if config changed (MODBUS write), reflect changes to EEPROM */ if (sensor_config_pending_write) { @@ -268,23 +272,16 @@ int main(void) } if (baudrate_changed) { - while (!LL_LPUART_IsActiveFlag_TXE(LPUART1)); + while (!LL_USART_IsActiveFlag_TXE(USART2)); uart_disable_interrupts(); -// LL_LPUART_Disable(LPUART1); -// LL_LPUART_DisableIT_IDLE(LPUART1); -// LL_LPUART_EnableIT_RXNE(LPUART1); - LL_LPUART_SetBaudRate(LPUART1, SYSTICK_FREQ_HZ, config_baudrates[sensor_config.baudrate_index]); - -// LL_LPUART_Enable(LPUART1); -// LL_LPUART_EnableIT_IDLE(LPUART1); -// LL_LPUART_EnableIT_RXNE(LPUART1); + LL_USART_SetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16, config_baudrates[sensor_config.baudrate_index]); uart_enable_interrupts(); - LL_LPUART_EnableDirectionRx(LPUART1); - LL_LPUART_EnableDirectionTx(LPUART1); + LL_USART_EnableDirectionRx(USART2); + LL_USART_EnableDirectionTx(USART2); baudrate_changed = 0; - new_baud = LL_LPUART_GetBaudRate(LPUART1, SYSTICK_FREQ_HZ); + new_baud = LL_USART_GetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16); } /* It is time for measurement */ @@ -399,7 +396,7 @@ void SystemClock_Config(void) LL_Init1msTick(12000000); LL_SetSystemCoreClock(12000000); - LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1); + LL_RCC_SetUSARTClockSource(LL_RCC_USART2_CLKSOURCE_PCLK1); LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1); } @@ -466,89 +463,6 @@ static void MX_I2C1_Init(void) } -/** - * @brief LPUART1 Initialization Function - * @param None - * @retval None - */ -static void MX_LPUART1_UART_Init(void) -{ - - /* USER CODE BEGIN LPUART1_Init 0 */ - - /* USER CODE END LPUART1_Init 0 */ - - LL_LPUART_InitTypeDef LPUART_InitStruct = {0}; - - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - - /* Peripheral clock enable */ - LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1); - - LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); - LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB); - /**LPUART1 GPIO Configuration - PA0-CK_IN ------> LPUART1_RX - PA1 ------> LPUART1_TX - PB1 ------> LPUART1_DE - */ - GPIO_InitStruct.Pin = LL_GPIO_PIN_0; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_1; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_1; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_4; - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /* LPUART1 interrupt Init */ - NVIC_SetPriority(LPUART1_IRQn, 0); - NVIC_EnableIRQ(LPUART1_IRQn); - - /* USER CODE BEGIN LPUART1_Init 1 */ - - /* USER CODE END LPUART1_Init 1 */ - LPUART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index]; - LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_9B; - LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1; - LPUART_InitStruct.Parity = LL_LPUART_PARITY_EVEN; - LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX; - LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE; - LL_LPUART_Init(LPUART1, &LPUART_InitStruct); - LL_LPUART_EnableDEMode(LPUART1); - LL_LPUART_SetDESignalPolarity(LPUART1, LL_LPUART_DE_POLARITY_HIGH); - LL_LPUART_SetDEAssertionTime(LPUART1, 0); - LL_LPUART_SetDEDeassertionTime(LPUART1, 0); - /* USER CODE BEGIN LPUART1_Init 2 */ - - /* Enable IDLE Interrupt */ - LL_LPUART_EnableIT_IDLE(LPUART1); - - /* Enable RX Not Empty Interrupt */ - LL_LPUART_EnableIT_RXNE(LPUART1); - - LL_LPUART_EnableDirectionRx(LPUART1); - LL_LPUART_EnableDirectionTx(LPUART1); - LL_LPUART_Enable(LPUART1); - /* USER CODE END LPUART1_Init 2 */ - -} - /** * @brief TIM21 Initialization Function * @param None @@ -588,6 +502,91 @@ static void MX_TIM21_Init(void) } +/** + * @brief USART2 Initialization Function + * @param None + * @retval None + */ +static void MX_USART2_UART_Init(void) +{ + + /* USER CODE BEGIN USART2_Init 0 */ + + /* USER CODE END USART2_Init 0 */ + + LL_USART_InitTypeDef USART_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2); + + LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); + /**USART2 GPIO Configuration + PA1 ------> USART2_DE + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_1; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_4; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_2; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_4; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_3; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_4; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USART2 interrupt Init */ + NVIC_SetPriority(USART2_IRQn, 0); + NVIC_EnableIRQ(USART2_IRQn); + + /* USER CODE BEGIN USART2_Init 1 */ + + /* USER CODE END USART2_Init 1 */ + USART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index]; + USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_9B; + USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + USART_InitStruct.Parity = LL_USART_PARITY_EVEN; + USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + LL_USART_Init(USART2, &USART_InitStruct); + LL_USART_EnableDEMode(USART2); + LL_USART_SetDESignalPolarity(USART2, LL_USART_DE_POLARITY_HIGH); + LL_USART_SetDEAssertionTime(USART2, 0); + LL_USART_SetDEDeassertionTime(USART2, 0); + LL_USART_ConfigAsyncMode(USART2); + LL_USART_Enable(USART2); + /* USER CODE BEGIN USART2_Init 2 */ + + /* Enable IDLE Interrupt */ + LL_USART_EnableIT_IDLE(USART2); + + /* Enable RX Not Empty Interrupt */ + LL_USART_EnableIT_RXNE(USART2); + + LL_USART_EnableDirectionRx(USART2); + LL_USART_EnableDirectionTx(USART2); + LL_USART_Enable(USART2); + /* USER CODE END USART2_Init 2 */ + +} + /** * @brief GPIO Initialization Function * @param None @@ -601,13 +600,13 @@ static void MX_GPIO_Init(void) LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); /**/ - LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); + LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin); /**/ - LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); + LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin); /**/ - LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin); + LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); /**/ GPIO_InitStruct.Pin = LED_B_Pin; @@ -636,31 +635,31 @@ static void MX_GPIO_Init(void) } /* USER CODE BEGIN 4 */ -void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len) +void USART2_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len) { __disable_irq(); for (uint16_t i = 0; i < buffer_tx_len; i++) { - LL_LPUART_TransmitData9(LPUART1, buffer_tx[i]); - while (!LL_LPUART_IsActiveFlag_TXE(LPUART1)); + LL_USART_TransmitData9(USART2, buffer_tx[i]); + while (!LL_USART_IsActiveFlag_TXE(USART2)); } __enable_irq(); } int8_t uart_disable_interrupts(void) { - LL_LPUART_Disable(LPUART1); - LL_LPUART_DisableIT_IDLE(LPUART1); - LL_LPUART_EnableIT_RXNE(LPUART1); + LL_USART_Disable(USART2); + LL_USART_DisableIT_IDLE(USART2); + LL_USART_EnableIT_RXNE(USART2); return 0; } int8_t uart_enable_interrupts(void) { - LL_LPUART_Enable(LPUART1); - LL_LPUART_EnableIT_IDLE(LPUART1); - LL_LPUART_EnableIT_RXNE(LPUART1); + LL_USART_Enable(USART2); + LL_USART_EnableIT_IDLE(USART2); + LL_USART_EnableIT_RXNE(USART2); return 0; } @@ -787,7 +786,7 @@ int8_t modbus_slave_callback(modbus_transaction_t *transaction) int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len) { /* TODO */ - LPUART1_TX_Buffer(buffer, data_len); + USART2_TX_Buffer(buffer, data_len); return MODBUS_OK; } /* USER CODE END 4 */ diff --git a/fw/Core/Src/stm32l0xx_it.c b/fw/Core/Src/stm32l0xx_it.c index 504a5a5..5eb65f3 100644 --- a/fw/Core/Src/stm32l0xx_it.c +++ b/fw/Core/Src/stm32l0xx_it.c @@ -43,17 +43,17 @@ /* Private variables ---------------------------------------------------------*/ /* USER CODE BEGIN PV */ -uint16_t lpuart1_rx_message_index = 0; -uint16_t lpuart1_rx_message_len = 0; -uint8_t lpuart1_rx_done = 0; -uint8_t lpuart1_rx_message_too_long = 0; +uint16_t usart2_rx_message_index = 0; +uint16_t usart2_rx_message_len = 0; +uint8_t usart2_rx_done = 0; +uint8_t usart2_rx_message_too_long = 0; uint8_t tim21_elapsed_period = 0; /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ /* USER CODE BEGIN PFP */ -void LPUART1_CharReception_Callback( void ); +void USART2_CharReception_Callback( void ); /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ @@ -71,7 +71,7 @@ void LPUART1_CharReception_Callback( void ); /* Cortex-M0+ Processor Interruption and Exception Handlers */ /******************************************************************************/ /** - * @brief This function handles Non maskable interrupt. + * @brief This function handles Non maskable Interrupt. */ void NMI_Handler(void) { @@ -154,7 +154,6 @@ void TIM21_IRQHandler(void) /* USER CODE BEGIN TIM21_IRQn 0 */ LL_TIM_ClearFlag_UPDATE(TIM21); tim21_elapsed_period = 1; - /* USER CODE END TIM21_IRQn 0 */ /* USER CODE BEGIN TIM21_IRQn 1 */ @@ -162,47 +161,47 @@ void TIM21_IRQHandler(void) } /** - * @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28. + * @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI line 26. */ -void LPUART1_IRQHandler(void) +void USART2_IRQHandler(void) { - /* USER CODE BEGIN LPUART1_IRQn 0 */ + /* USER CODE BEGIN USART2_IRQn 0 */ /* Check RXNE flag value in SR register */ - if(LL_LPUART_IsActiveFlag_RXNE(LPUART1) && LL_LPUART_IsEnabledIT_RXNE(LPUART1)) + if(LL_USART_IsActiveFlag_RXNE(USART2) && LL_USART_IsEnabledIT_RXNE(USART2)) { /* RXNE flag will be cleared by reading of DR register (done in call) */ /* Call function in charge of handling Character reception */ - LPUART1_CharReception_Callback(); + USART2_CharReception_Callback(); } - /* USER CODE END LPUART1_IRQn 0 */ - /* USER CODE BEGIN LPUART1_IRQn 1 */ + /* USER CODE END USART2_IRQn 0 */ + /* USER CODE BEGIN USART2_IRQn 1 */ /* If the IDLE flag is active */ - if (LL_LPUART_IsActiveFlag_IDLE(LPUART1) && LL_LPUART_IsEnabledIT_IDLE(LPUART1)) + if (LL_USART_IsActiveFlag_IDLE(USART2) && LL_USART_IsEnabledIT_IDLE(USART2)) { /* Clear the IDLE flag */ - LL_LPUART_ClearFlag_IDLE(LPUART1); + LL_USART_ClearFlag_IDLE(USART2); /* Reset the buffer index */ - lpuart1_rx_message_len = lpuart1_rx_message_index; - lpuart1_rx_message_index = 0; - lpuart1_rx_done = 1; - if (lpuart1_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE) + usart2_rx_message_len = usart2_rx_message_index; + usart2_rx_message_index = 0; + usart2_rx_done = 1; + if (usart2_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE) { - lpuart1_rx_message_too_long = 1; + usart2_rx_message_too_long = 1; } } - /* USER CODE END LPUART1_IRQn 1 */ + /* USER CODE END USART2_IRQn 1 */ } /* USER CODE BEGIN 1 */ -void LPUART1_CharReception_Callback( void ) +void USART2_CharReception_Callback( void ) { - uint16_t lpuart1_rx_bit = LL_LPUART_ReceiveData9(LPUART1); - if (lpuart1_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE) + uint16_t usart2_rx_bit = LL_USART_ReceiveData9(USART2); + if (usart2_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE) { - modbus_buffer[lpuart1_rx_message_index] = (uint8_t)lpuart1_rx_bit; + modbus_buffer[usart2_rx_message_index] = (uint8_t)usart2_rx_bit; } - lpuart1_rx_message_index++; + usart2_rx_message_index++; } /* USER CODE END 1 */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/fw/Core/Startup/startup_stm32l031g6ux.s b/fw/Core/Startup/startup_stm32l031g6ux.s new file mode 100644 index 0000000..62608af --- /dev/null +++ b/fw/Core/Startup/startup_stm32l031g6ux.s @@ -0,0 +1,261 @@ +/** + ****************************************************************************** + * @file startup_stm32l031xx.s + * @author MCD Application Team + * @brief STM32L031xx Devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M0+ processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m0plus + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word RTC_IRQHandler /* RTC through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ + .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ + .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ + .word 0 /* Reserved */ + .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ + .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ + .word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/ + .word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ + .word LPTIM1_IRQHandler /* LPTIM1 */ + .word 0 /* Reserved */ + .word TIM2_IRQHandler /* TIM2 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word TIM21_IRQHandler /* TIM21 */ + .word 0 /* Reserved */ + .word TIM22_IRQHandler /* TIM22 */ + .word I2C1_IRQHandler /* I2C1 */ + .word 0 /* Reserved */ + .word SPI1_IRQHandler /* SPI1 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word USART2_IRQHandler /* USART2 */ + .word LPUART1_IRQHandler /* LPUART1 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_1_IRQHandler + .thumb_set EXTI0_1_IRQHandler,Default_Handler + + .weak EXTI2_3_IRQHandler + .thumb_set EXTI2_3_IRQHandler,Default_Handler + + .weak EXTI4_15_IRQHandler + .thumb_set EXTI4_15_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_3_IRQHandler + .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_5_6_7_IRQHandler + .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler + + .weak ADC1_COMP_IRQHandler + .thumb_set ADC1_COMP_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM21_IRQHandler + .thumb_set TIM21_IRQHandler,Default_Handler + + .weak TIM22_IRQHandler + .thumb_set TIM22_IRQHandler,Default_Handler + + .weak I2C1_IRQHandler + .thumb_set I2C1_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak LPUART1_IRQHandler + .thumb_set LPUART1_IRQHandler,Default_Handler + + + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/fw/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h b/fw/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h new file mode 100644 index 0000000..9ee7ac8 --- /dev/null +++ b/fw/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h @@ -0,0 +1,6094 @@ +/** + ****************************************************************************** + * @file stm32l031xx.h + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File. + * This file contains all the peripheral register's definitions, bits + * definitions and memory mapping for stm32l031xx devices. + * + * This file contains: + * - Data structures and the address mapping for all peripherals + * - Peripheral's registers declarations and bits definition + * - Macros to access peripheral's registers hardware + * + ****************************************************************************** + * @attention + * + *

© Copyright(c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l031xx + * @{ + */ + +#ifndef __STM32L031xx_H +#define __STM32L031xx_H + +#ifdef __cplusplus + extern "C" { +#endif + + +/** @addtogroup Configuration_section_for_CMSIS + * @{ + */ +/** + * @brief Configuration of the Cortex-M0+ Processor and Core Peripherals + */ +#define __CM0PLUS_REV 0U /*!< Core Revision r0p0 */ +#define __MPU_PRESENT 0U /*!< STM32L0xx provides no MPU */ +#define __VTOR_PRESENT 1U /*!< Vector Table Register supported */ +#define __NVIC_PRIO_BITS 2U /*!< STM32L0xx uses 2 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ + +/** + * @} + */ + +/** @addtogroup Peripheral_interrupt_number_definition + * @{ + */ + +/** + * @brief stm32l031xx Interrupt Number Definition, according to the selected device + * in @ref Library_configuration_section + */ + +/*!< Interrupt Number Definition */ +typedef enum +{ +/****** Cortex-M0 Processor Exceptions Numbers ******************************************************/ + NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /*!< 3 Cortex-M0+ Hard Fault Interrupt */ + SVC_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */ + PendSV_IRQn = -2, /*!< 14 Cortex-M0+ Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 Cortex-M0+ System Tick Interrupt */ + +/****** STM32L-0 specific Interrupt Numbers *********************************************************/ + WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ + PVD_IRQn = 1, /*!< PVD through EXTI Line detect Interrupt */ + RTC_IRQn = 2, /*!< RTC through EXTI Line Interrupt */ + FLASH_IRQn = 3, /*!< FLASH Interrupt */ + RCC_IRQn = 4, /*!< RCC Interrupt */ + EXTI0_1_IRQn = 5, /*!< EXTI Line 0 and 1 Interrupts */ + EXTI2_3_IRQn = 6, /*!< EXTI Line 2 and 3 Interrupts */ + EXTI4_15_IRQn = 7, /*!< EXTI Line 4 to 15 Interrupts */ + DMA1_Channel1_IRQn = 9, /*!< DMA1 Channel 1 Interrupt */ + DMA1_Channel2_3_IRQn = 10, /*!< DMA1 Channel 2 and Channel 3 Interrupts */ + DMA1_Channel4_5_6_7_IRQn = 11, /*!< DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 Interrupts */ + ADC1_COMP_IRQn = 12, /*!< ADC1, COMP1 and COMP2 Interrupts */ + LPTIM1_IRQn = 13, /*!< LPTIM1 Interrupt */ + TIM2_IRQn = 15, /*!< TIM2 Interrupt */ + TIM21_IRQn = 20, /*!< TIM21 Interrupt */ + TIM22_IRQn = 22, /*!< TIM22 Interrupt */ + I2C1_IRQn = 23, /*!< I2C1 Interrupt */ + SPI1_IRQn = 25, /*!< SPI1 Interrupt */ + USART2_IRQn = 28, /*!< USART2 Interrupt */ + LPUART1_IRQn = 29, /*!< LPUART1 Interrupt */ +} IRQn_Type; + +/** + * @} + */ + +#include "core_cm0plus.h" +#include "system_stm32l0xx.h" +#include + +/** @addtogroup Peripheral_registers_structures + * @{ + */ + +/** + * @brief Analog to Digital Converter + */ + +typedef struct +{ + __IO uint32_t ISR; /*!< ADC Interrupt and Status register, Address offset:0x00 */ + __IO uint32_t IER; /*!< ADC Interrupt Enable register, Address offset:0x04 */ + __IO uint32_t CR; /*!< ADC Control register, Address offset:0x08 */ + __IO uint32_t CFGR1; /*!< ADC Configuration register 1, Address offset:0x0C */ + __IO uint32_t CFGR2; /*!< ADC Configuration register 2, Address offset:0x10 */ + __IO uint32_t SMPR; /*!< ADC Sampling time register, Address offset:0x14 */ + uint32_t RESERVED1; /*!< Reserved, 0x18 */ + uint32_t RESERVED2; /*!< Reserved, 0x1C */ + __IO uint32_t TR; /*!< ADC watchdog threshold register, Address offset:0x20 */ + uint32_t RESERVED3; /*!< Reserved, 0x24 */ + __IO uint32_t CHSELR; /*!< ADC channel selection register, Address offset:0x28 */ + uint32_t RESERVED4[5]; /*!< Reserved, 0x2C */ + __IO uint32_t DR; /*!< ADC data register, Address offset:0x40 */ + uint32_t RESERVED5[28]; /*!< Reserved, 0x44 - 0xB0 */ + __IO uint32_t CALFACT; /*!< ADC data register, Address offset:0xB4 */ +} ADC_TypeDef; + +typedef struct +{ + __IO uint32_t CCR; +} ADC_Common_TypeDef; + + +/** + * @brief Comparator + */ + +typedef struct +{ + __IO uint32_t CSR; /*!< COMP comparator control and status register, Address offset: 0x18 */ +} COMP_TypeDef; + +typedef struct +{ + __IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */ +} COMP_Common_TypeDef; + + +/** +* @brief CRC calculation unit +*/ + +typedef struct +{ +__IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */ +__IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */ +uint8_t RESERVED0; /*!< Reserved, 0x05 */ +uint16_t RESERVED1; /*!< Reserved, 0x06 */ +__IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ +uint32_t RESERVED2; /*!< Reserved, 0x0C */ +__IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */ +__IO uint32_t POL; /*!< CRC polynomial register, Address offset: 0x14 */ +} CRC_TypeDef; + +/** + * @brief Debug MCU + */ + +typedef struct +{ + __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */ + __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ + __IO uint32_t APB1FZ; /*!< Debug MCU APB1 freeze register, Address offset: 0x08 */ + __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x0C */ +}DBGMCU_TypeDef; + +/** + * @brief DMA Controller + */ + +typedef struct +{ + __IO uint32_t CCR; /*!< DMA channel x configuration register */ + __IO uint32_t CNDTR; /*!< DMA channel x number of data register */ + __IO uint32_t CPAR; /*!< DMA channel x peripheral address register */ + __IO uint32_t CMAR; /*!< DMA channel x memory address register */ +} DMA_Channel_TypeDef; + +typedef struct +{ + __IO uint32_t ISR; /*!< DMA interrupt status register, Address offset: 0x00 */ + __IO uint32_t IFCR; /*!< DMA interrupt flag clear register, Address offset: 0x04 */ +} DMA_TypeDef; + +typedef struct +{ + __IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8 */ +} DMA_Request_TypeDef; + +/** + * @brief External Interrupt/Event Controller + */ + +typedef struct +{ + __IO uint32_t IMR; /*!TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)) ? 1UL : 0UL); + return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == \ + (ClockTimeout)) ? 1UL : 0UL); } /** @@ -1443,7 +1485,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx) /** * @brief Enable Error interrupts. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note Any of these errors will generate interrupt : * Arbitration Loss (ARLO) @@ -1463,7 +1505,7 @@ __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx) /** * @brief Disable Error interrupts. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note Any of these errors will generate interrupt : * Arbitration Loss (ARLO) @@ -1645,7 +1687,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of SMBus PEC error flag in reception. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note RESET: Clear default value. * SET: When the received PEC does not match with the PEC register content. @@ -1660,7 +1702,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of SMBus Timeout detection flag. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note RESET: Clear default value. * SET: When a timeout or extended clock timeout occurs. @@ -1675,7 +1717,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of SMBus alert flag. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note RESET: Clear default value. * SET: When SMBus host configuration, SMBus alert enabled and @@ -1782,7 +1824,7 @@ __STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx) /** * @brief Clear SMBus PEC error flag. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR * @param I2Cx I2C Instance. @@ -1795,7 +1837,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx) /** * @brief Clear SMBus Timeout detection flag. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT * @param I2Cx I2C Instance. @@ -1808,7 +1850,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx) /** * @brief Clear SMBus Alert flag. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT * @param I2Cx I2C Instance. @@ -1923,7 +1965,8 @@ __STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx) } /** - * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte. + * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code + or next received byte. * @note Usage in Slave mode only. * @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData * @param I2Cx I2C Instance. @@ -1964,7 +2007,8 @@ __STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx) /** * @brief Enable automatic RESTART Read request condition for 10bit address header (master mode). * @note The master sends the complete 10bit slave address read sequence : - * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction. + * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address + in Read direction. * @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead * @param I2Cx I2C Instance. * @retval None @@ -2125,9 +2169,10 @@ __STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx) /** * @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode). - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. - * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received. + * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition + or an Address Matched is received. * This bit has no effect when RELOAD bit is set. * This bit has no effect in device mode when SBC bit is not set. * @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare @@ -2141,7 +2186,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx) /** * @brief Check if the SMBus Packet Error byte internal comparison is requested or not. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare * @param I2Cx I2C Instance. @@ -2154,7 +2199,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx) /** * @brief Get the SMBus Packet Error byte calculated. - * @note Macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll PECR PEC LL_I2C_GetSMBusPEC * @param I2Cx I2C Instance. diff --git a/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h b/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h index 74d4271..1c4e241 100644 --- a/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h +++ b/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h @@ -150,24 +150,29 @@ typedef struct uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetPrescaler().*/ uint32_t CounterMode; /*!< Specifies the counter mode. This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetCounterMode().*/ uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active Auto-Reload Register at the next update event. This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF. - Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF. + Some timer instances may support 32 bits counters. In that case this parameter must + be a number between 0x0000 and 0xFFFFFFFF. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetAutoReload().*/ uint32_t ClockDivision; /*!< Specifies the clock division. This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetClockDivision().*/ } LL_TIM_InitTypeDef; /** @@ -178,22 +183,26 @@ typedef struct uint32_t OCMode; /*!< Specifies the output mode. This parameter can be a value of @ref TIM_LL_EC_OCMODE. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetMode().*/ uint32_t OCState; /*!< Specifies the TIM Output Compare state. This parameter can be a value of @ref TIM_LL_EC_OCSTATE. - This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ + This feature can be modified afterwards using unitary functions + @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register. This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. - This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/ + This feature can be modified afterwards using unitary function + LL_TIM_OC_SetCompareCHx (x=1..6).*/ uint32_t OCPolarity; /*!< Specifies the output polarity. This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetPolarity().*/ } LL_TIM_OC_InitTypeDef; @@ -208,22 +217,26 @@ typedef struct uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ uint32_t ICActiveInput; /*!< Specifies the input. This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. This parameter can be a value of @ref TIM_LL_EC_ICPSC. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ uint32_t ICFilter; /*!< Specifies the input capture filter. This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ } LL_TIM_IC_InitTypeDef; @@ -235,47 +248,56 @@ typedef struct uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetEncoderMode().*/ uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. This parameter can be a value of @ref TIM_LL_EC_ICPSC. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ uint32_t IC1Filter; /*!< Specifies the TI1 input filter. This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. This parameter can be a value of @ref TIM_LL_EC_ICPSC. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ uint32_t IC2Filter; /*!< Specifies the TI2 input filter. This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ } LL_TIM_ENCODER_InitTypeDef; @@ -334,8 +356,8 @@ typedef struct /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode * @{ */ -#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter is not stopped at update event */ -#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter stops counting at the next update event */ +#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at the next update event */ +#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at update event */ /** * @} */ @@ -822,7 +844,8 @@ typedef struct ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U) /** - * @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay. + * @brief HELPER macro calculating the compare value required to achieve the required timer output compare + * active/inactive delay. * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -834,7 +857,8 @@ typedef struct / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) /** - * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode). + * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration + * (when the timer operates in one pulse mode). * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -1091,7 +1115,8 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx) } /** - * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters. + * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators + * (when supported) and the digital filters. * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check * whether or not the clock division feature is supported by the timer * instance. @@ -1109,7 +1134,8 @@ __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDi } /** - * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters. + * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time + * generators (when supported) and the digital filters. * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check * whether or not the clock division feature is supported by the timer * instance. @@ -1368,7 +1394,7 @@ __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint { uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); - MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]); + MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]); } /** @@ -1397,7 +1423,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel) { uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); - return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]); + return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]); } /** @@ -1804,7 +1830,8 @@ __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint3 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), - ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]); + ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) \ + << SHIFT_TAB_ICxx[iChannel]); MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); } @@ -2685,7 +2712,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx) } /** - * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending). + * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set + * (Capture/Compare 1 interrupt is pending). * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR * @param TIMx Timer instance * @retval State of bit (1 or 0). @@ -2707,7 +2735,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx) } /** - * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending). + * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set + * (Capture/Compare 2 over-capture interrupt is pending). * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR * @param TIMx Timer instance * @retval State of bit (1 or 0). @@ -2729,7 +2758,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx) } /** - * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending). + * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set + * (Capture/Compare 3 over-capture interrupt is pending). * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR * @param TIMx Timer instance * @retval State of bit (1 or 0). @@ -2751,7 +2781,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) } /** - * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending). + * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set + * (Capture/Compare 4 over-capture interrupt is pending). * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR * @param TIMx Timer instance * @retval State of bit (1 or 0). @@ -2970,7 +3001,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx) * @} */ -/** @defgroup TIM_LL_EF_DMA_Management DMA-Management +/** @defgroup TIM_LL_EF_DMA_Management DMA Management * @{ */ /** diff --git a/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h b/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h new file mode 100644 index 0000000..c4887f5 --- /dev/null +++ b/fw/Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h @@ -0,0 +1,3751 @@ +/** + ****************************************************************************** + * @file stm32l0xx_ll_usart.h + * @author MCD Application Team + * @brief Header file of USART LL module. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32L0xx_LL_USART_H +#define STM32L0xx_LL_USART_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l0xx.h" + +/** @addtogroup STM32L0xx_LL_Driver + * @{ + */ + +#if defined (USART1) || defined (USART2) || defined (USART4) || defined (USART5) + +/** @defgroup USART_LL USART + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup USART_LL_Private_Macros USART Private Macros + * @{ + */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup USART_LL_ES_INIT USART Exported Init structures + * @{ + */ + +/** + * @brief LL USART Init Structure definition + */ +typedef struct +{ + + uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetBaudRate().*/ + + uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref USART_LL_EC_DATAWIDTH. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetDataWidth().*/ + + uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref USART_LL_EC_STOPBITS. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetStopBitsLength().*/ + + uint32_t Parity; /*!< Specifies the parity mode. + This parameter can be a value of @ref USART_LL_EC_PARITY. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetParity().*/ + + uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled. + This parameter can be a value of @ref USART_LL_EC_DIRECTION. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetTransferDirection().*/ + + uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. + This parameter can be a value of @ref USART_LL_EC_HWCONTROL. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetHWFlowCtrl().*/ + + uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8. + This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING. + + This feature can be modified afterwards using unitary + function @ref LL_USART_SetOverSampling().*/ + +} LL_USART_InitTypeDef; + +/** + * @brief LL USART Clock Init Structure definition + */ +typedef struct +{ + uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled. + This parameter can be a value of @ref USART_LL_EC_CLOCK. + + USART HW configuration can be modified afterwards using unitary functions + @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput(). + For more details, refer to description of this function. */ + + uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. + This parameter can be a value of @ref USART_LL_EC_POLARITY. + + USART HW configuration can be modified afterwards using unitary + functions @ref LL_USART_SetClockPolarity(). + For more details, refer to description of this function. */ + + uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made. + This parameter can be a value of @ref USART_LL_EC_PHASE. + + USART HW configuration can be modified afterwards using unitary + functions @ref LL_USART_SetClockPhase(). + For more details, refer to description of this function. */ + + uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted + data bit (MSB) has to be output on the SCLK pin in synchronous mode. + This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE. + + USART HW configuration can be modified afterwards using unitary + functions @ref LL_USART_SetLastClkPulseOutput(). + For more details, refer to description of this function. */ + +} LL_USART_ClockInitTypeDef; + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup USART_LL_Exported_Constants USART Exported Constants + * @{ + */ + +/** @defgroup USART_LL_EC_CLEAR_FLAG Clear Flags Defines + * @brief Flags defines which can be used with LL_USART_WriteReg function + * @{ + */ +#define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error clear flag */ +#define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error clear flag */ +#define LL_USART_ICR_NCF USART_ICR_NCF /*!< Noise error detected clear flag */ +#define LL_USART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error clear flag */ +#define LL_USART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected clear flag */ +#define LL_USART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete clear flag */ +#if defined(USART_TCBGT_SUPPORT) +#define LL_USART_ICR_TCBGTCF USART_ICR_TCBGTCF /*!< Transmission completed before guard time clear flag */ +#endif /* USART_TCBGT_SUPPORT */ +#define LL_USART_ICR_LBDCF USART_ICR_LBDCF /*!< LIN break detection clear flag */ +#define LL_USART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag */ +#define LL_USART_ICR_RTOCF USART_ICR_RTOCF /*!< Receiver timeout clear flag */ +#define LL_USART_ICR_EOBCF USART_ICR_EOBCF /*!< End of block clear flag */ +#define LL_USART_ICR_CMCF USART_ICR_CMCF /*!< Character match clear flag */ +#define LL_USART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode clear flag */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_USART_ReadReg function + * @{ + */ +#define LL_USART_ISR_PE USART_ISR_PE /*!< Parity error flag */ +#define LL_USART_ISR_FE USART_ISR_FE /*!< Framing error flag */ +#define LL_USART_ISR_NE USART_ISR_NE /*!< Noise detected flag */ +#define LL_USART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */ +#define LL_USART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */ +#define LL_USART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */ +#define LL_USART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */ +#define LL_USART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */ +#define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detection flag */ +#define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */ +#define LL_USART_ISR_CTS USART_ISR_CTS /*!< CTS flag */ +#define LL_USART_ISR_RTOF USART_ISR_RTOF /*!< Receiver timeout flag */ +#define LL_USART_ISR_EOBF USART_ISR_EOBF /*!< End of block flag */ +#define LL_USART_ISR_ABRE USART_ISR_ABRE /*!< Auto baud rate error flag */ +#define LL_USART_ISR_ABRF USART_ISR_ABRF /*!< Auto baud rate flag */ +#define LL_USART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */ +#define LL_USART_ISR_CMF USART_ISR_CMF /*!< Character match flag */ +#define LL_USART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */ +#define LL_USART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */ +#define LL_USART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */ +#define LL_USART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */ +#define LL_USART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */ +#if defined(USART_TCBGT_SUPPORT) +#define LL_USART_ISR_TCBGT USART_ISR_TCBGT /*!< Transmission complete before guard time completion flag */ +#endif /* USART_TCBGT_SUPPORT */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions + * @{ + */ +#define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */ +#define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */ +#define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */ +#define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */ +#define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */ +#define LL_USART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */ +#define LL_USART_CR1_RTOIE USART_CR1_RTOIE /*!< Receiver timeout interrupt enable */ +#define LL_USART_CR1_EOBIE USART_CR1_EOBIE /*!< End of Block interrupt enable */ +#define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */ +#define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */ +#define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */ +#define LL_USART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */ +#if defined(USART_TCBGT_SUPPORT) +#define LL_USART_CR3_TCBGTIE USART_CR3_TCBGTIE /*!< Transmission complete before guard time interrupt enable */ +#endif /* USART_TCBGT_SUPPORT */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_DIRECTION Communication Direction + * @{ + */ +#define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */ +#define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */ +#define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */ +#define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_PARITY Parity Control + * @{ + */ +#define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */ +#define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */ +#define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_WAKEUP Wakeup + * @{ + */ +#define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */ +#define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_DATAWIDTH Datawidth + * @{ + */ +#define LL_USART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */ +#define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */ +#define LL_USART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling + * @{ + */ +#define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ +#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup USART_LL_EC_CLOCK Clock Signal + * @{ + */ + +#define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */ +#define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */ +/** + * @} + */ +#endif /*USE_FULL_LL_DRIVER*/ + +/** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse + * @{ + */ +#define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */ +#define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_PHASE Clock Phase + * @{ + */ +#define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */ +#define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_POLARITY Clock Polarity + * @{ + */ +#define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/ +#define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_STOPBITS Stop Bits + * @{ + */ +#define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */ +#define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */ +#define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */ +#define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_TXRX TX RX Pins Swap + * @{ + */ +#define LL_USART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */ +#define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion + * @{ + */ +#define LL_USART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */ +#define LL_USART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion + * @{ + */ +#define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */ +#define LL_USART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion + * @{ + */ +#define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */ +#define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_BITORDER Bit Order + * @{ + */ +#define LL_USART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */ +#define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, following the start bit */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_AUTOBAUD_DETECT_ON Autobaud Detection + * @{ + */ +#define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT 0x00000000U /*!< Measurement of the start bit is used to detect the baud rate */ +#define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0 /*!< Falling edge to falling edge measurement. Received frame must start with a single bit = 1 -> Frame = Start10xxxxxx */ +#define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1 /*!< 0x7F frame detection */ +#define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0) /*!< 0x55 frame detection */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_ADDRESS_DETECT Address Length Detection + * @{ + */ +#define LL_USART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */ +#define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_HWCONTROL Hardware Control + * @{ + */ +#define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */ +#define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */ +#define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */ +#define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_WAKEUP_ON Wakeup Activation + * @{ + */ +#define LL_USART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake up active on address match */ +#define LL_USART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */ +#define LL_USART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_IRDA_POWER IrDA Power + * @{ + */ +#define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */ +#define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length + * @{ + */ +#define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */ +#define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_DE_POLARITY Driver Enable Polarity + * @{ + */ +#define LL_USART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */ +#define LL_USART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */ +/** + * @} + */ + +/** @defgroup USART_LL_EC_DMA_REG_DATA DMA Register Data + * @{ + */ +#define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */ +#define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup USART_LL_Exported_Macros USART Exported Macros + * @{ + */ + +/** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in USART register + * @param __INSTANCE__ USART Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in USART register + * @param __INSTANCE__ USART Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper + * @{ + */ + +/** + * @brief Compute USARTDIV value according to Peripheral Clock and + * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned) + * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance + * @param __BAUDRATE__ Baud rate value to achieve + * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case + */ +#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2U)\ + + ((__BAUDRATE__)/2U))/(__BAUDRATE__)) + +/** + * @brief Compute USARTDIV value according to Peripheral Clock and + * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned) + * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance + * @param __BAUDRATE__ Baud rate value to achieve + * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case + */ +#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/2U))/(__BAUDRATE__)) + +/** + * @} + */ + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ + +/** @defgroup USART_LL_Exported_Functions USART Exported Functions + * @{ + */ + +/** @defgroup USART_LL_EF_Configuration Configuration functions + * @{ + */ + +/** + * @brief USART Enable + * @rmtoll CR1 UE LL_USART_Enable + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR1, USART_CR1_UE); +} + +/** + * @brief USART Disable (all USART prescalers and outputs are disabled) + * @note When USART is disabled, USART prescalers and outputs are stopped immediately, + * and current operations are discarded. The configuration of the USART is kept, but all the status + * flags, in the USARTx_ISR are set to their default values. + * @rmtoll CR1 UE LL_USART_Disable + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR1, USART_CR1_UE); +} + +/** + * @brief Indicate if USART is enabled + * @rmtoll CR1 UE LL_USART_IsEnabled + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL); +} + +/** + * @brief USART enabled in STOP Mode. + * @note When this function is enabled, USART is able to wake up the MCU from Stop mode, provided that + * USART clock selection is HSI or LSE in RCC. + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR1 UESM LL_USART_EnableInStopMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_UESM); +} + +/** + * @brief USART disabled in STOP Mode. + * @note When this function is disabled, USART is not able to wake up the MCU from Stop mode + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR1 UESM LL_USART_DisableInStopMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_UESM); +} + +/** + * @brief Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not) + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR1 UESM LL_USART_IsEnabledInStopMode + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL); +} + +/** + * @brief USART Clock enabled in STOP Mode + * @note When this function is called, USART Clock is enabled while in STOP mode + * @rmtoll CR3 UCESM LL_USART_EnableClockInStopMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableClockInStopMode(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_UCESM); +} + +/** + * @brief USART clock disabled in STOP Mode + * @note When this function is called, USART Clock is disabled while in STOP mode + * @rmtoll CR3 UCESM LL_USART_DisableClockInStopMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableClockInStopMode(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM); +} + +/** + * @brief Indicate if USART clock is enabled in STOP Mode + * @rmtoll CR3 UCESM LL_USART_IsClockEnabledInStopMode + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsClockEnabledInStopMode(USART_TypeDef *USARTx) +{ + return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)); +} + +/** + * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit) + * @rmtoll CR1 RE LL_USART_EnableDirectionRx + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE); +} + +/** + * @brief Receiver Disable + * @rmtoll CR1 RE LL_USART_DisableDirectionRx + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE); +} + +/** + * @brief Transmitter Enable + * @rmtoll CR1 TE LL_USART_EnableDirectionTx + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE); +} + +/** + * @brief Transmitter Disable + * @rmtoll CR1 TE LL_USART_DisableDirectionTx + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE); +} + +/** + * @brief Configure simultaneously enabled/disabled states + * of Transmitter and Receiver + * @rmtoll CR1 RE LL_USART_SetTransferDirection\n + * CR1 TE LL_USART_SetTransferDirection + * @param USARTx USART Instance + * @param TransferDirection This parameter can be one of the following values: + * @arg @ref LL_USART_DIRECTION_NONE + * @arg @ref LL_USART_DIRECTION_RX + * @arg @ref LL_USART_DIRECTION_TX + * @arg @ref LL_USART_DIRECTION_TX_RX + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection) +{ + ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); +} + +/** + * @brief Return enabled/disabled states of Transmitter and Receiver + * @rmtoll CR1 RE LL_USART_GetTransferDirection\n + * CR1 TE LL_USART_GetTransferDirection + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_DIRECTION_NONE + * @arg @ref LL_USART_DIRECTION_RX + * @arg @ref LL_USART_DIRECTION_TX + * @arg @ref LL_USART_DIRECTION_TX_RX + */ +__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE)); +} + +/** + * @brief Configure Parity (enabled/disabled and parity mode if enabled). + * @note This function selects if hardware parity control (generation and detection) is enabled or disabled. + * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position + * (9th or 8th bit depending on data width) and parity is checked on the received data. + * @rmtoll CR1 PS LL_USART_SetParity\n + * CR1 PCE LL_USART_SetParity + * @param USARTx USART Instance + * @param Parity This parameter can be one of the following values: + * @arg @ref LL_USART_PARITY_NONE + * @arg @ref LL_USART_PARITY_EVEN + * @arg @ref LL_USART_PARITY_ODD + * @retval None + */ +__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity); +} + +/** + * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) + * @rmtoll CR1 PS LL_USART_GetParity\n + * CR1 PCE LL_USART_GetParity + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_PARITY_NONE + * @arg @ref LL_USART_PARITY_EVEN + * @arg @ref LL_USART_PARITY_ODD + */ +__STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE)); +} + +/** + * @brief Set Receiver Wake Up method from Mute mode. + * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod + * @param USARTx USART Instance + * @param Method This parameter can be one of the following values: + * @arg @ref LL_USART_WAKEUP_IDLELINE + * @arg @ref LL_USART_WAKEUP_ADDRESSMARK + * @retval None + */ +__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method); +} + +/** + * @brief Return Receiver Wake Up method from Mute mode + * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_WAKEUP_IDLELINE + * @arg @ref LL_USART_WAKEUP_ADDRESSMARK + */ +__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE)); +} + +/** + * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits) + * @rmtoll CR1 M0 LL_USART_SetDataWidth\n + * CR1 M1 LL_USART_SetDataWidth + * @param USARTx USART Instance + * @param DataWidth This parameter can be one of the following values: + * @arg @ref LL_USART_DATAWIDTH_7B + * @arg @ref LL_USART_DATAWIDTH_8B + * @arg @ref LL_USART_DATAWIDTH_9B + * @retval None + */ +__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth); +} + +/** + * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) + * @rmtoll CR1 M0 LL_USART_GetDataWidth\n + * CR1 M1 LL_USART_GetDataWidth + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_DATAWIDTH_7B + * @arg @ref LL_USART_DATAWIDTH_8B + * @arg @ref LL_USART_DATAWIDTH_9B + */ +__STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M)); +} + +/** + * @brief Allow switch between Mute Mode and Active mode + * @rmtoll CR1 MME LL_USART_EnableMuteMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME); +} + +/** + * @brief Prevent Mute Mode use. Set Receiver in active mode permanently. + * @rmtoll CR1 MME LL_USART_DisableMuteMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_MME); +} + +/** + * @brief Indicate if switch between Mute Mode and Active mode is allowed + * @rmtoll CR1 MME LL_USART_IsEnabledMuteMode + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL); +} + +/** + * @brief Set Oversampling to 8-bit or 16-bit mode + * @rmtoll CR1 OVER8 LL_USART_SetOverSampling + * @param USARTx USART Instance + * @param OverSampling This parameter can be one of the following values: + * @arg @ref LL_USART_OVERSAMPLING_16 + * @arg @ref LL_USART_OVERSAMPLING_8 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling); +} + +/** + * @brief Return Oversampling mode + * @rmtoll CR1 OVER8 LL_USART_GetOverSampling + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_OVERSAMPLING_16 + * @arg @ref LL_USART_OVERSAMPLING_8 + */ +__STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8)); +} + +/** + * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput + * @param USARTx USART Instance + * @param LastBitClockPulse This parameter can be one of the following values: + * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT + * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT + * @retval None + */ +__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse); +} + +/** + * @brief Retrieve Clock pulse of the last data bit output configuration + * (Last bit Clock pulse output to the SCLK pin or not) + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT + * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT + */ +__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); +} + +/** + * @brief Select the phase of the clock output on the SCLK pin in synchronous mode + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CPHA LL_USART_SetClockPhase + * @param USARTx USART Instance + * @param ClockPhase This parameter can be one of the following values: + * @arg @ref LL_USART_PHASE_1EDGE + * @arg @ref LL_USART_PHASE_2EDGE + * @retval None + */ +__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase); +} + +/** + * @brief Return phase of the clock output on the SCLK pin in synchronous mode + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CPHA LL_USART_GetClockPhase + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_PHASE_1EDGE + * @arg @ref LL_USART_PHASE_2EDGE + */ +__STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA)); +} + +/** + * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CPOL LL_USART_SetClockPolarity + * @param USARTx USART Instance + * @param ClockPolarity This parameter can be one of the following values: + * @arg @ref LL_USART_POLARITY_LOW + * @arg @ref LL_USART_POLARITY_HIGH + * @retval None + */ +__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); +} + +/** + * @brief Return polarity of the clock output on the SCLK pin in synchronous mode + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CPOL LL_USART_GetClockPolarity + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_POLARITY_LOW + * @arg @ref LL_USART_POLARITY_HIGH + */ +__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL)); +} + +/** + * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse) + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function + * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function + * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function + * @rmtoll CR2 CPHA LL_USART_ConfigClock\n + * CR2 CPOL LL_USART_ConfigClock\n + * CR2 LBCL LL_USART_ConfigClock + * @param USARTx USART Instance + * @param Phase This parameter can be one of the following values: + * @arg @ref LL_USART_PHASE_1EDGE + * @arg @ref LL_USART_PHASE_2EDGE + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_USART_POLARITY_LOW + * @arg @ref LL_USART_POLARITY_HIGH + * @param LBCPOutput This parameter can be one of the following values: + * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT + * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput); +} + +/** + * @brief Enable Clock output on SCLK pin + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_CLKEN); +} + +/** + * @brief Disable Clock output on SCLK pin + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN); +} + +/** + * @brief Indicate if Clock output on SCLK pin is enabled + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL); +} + +/** + * @brief Set the length of the stop bits + * @rmtoll CR2 STOP LL_USART_SetStopBitsLength + * @param USARTx USART Instance + * @param StopBits This parameter can be one of the following values: + * @arg @ref LL_USART_STOPBITS_0_5 + * @arg @ref LL_USART_STOPBITS_1 + * @arg @ref LL_USART_STOPBITS_1_5 + * @arg @ref LL_USART_STOPBITS_2 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); +} + +/** + * @brief Retrieve the length of the stop bits + * @rmtoll CR2 STOP LL_USART_GetStopBitsLength + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_STOPBITS_0_5 + * @arg @ref LL_USART_STOPBITS_1 + * @arg @ref LL_USART_STOPBITS_1_5 + * @arg @ref LL_USART_STOPBITS_2 + */ +__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP)); +} + +/** + * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits) + * @note Call of this function is equivalent to following function call sequence : + * - Data Width configuration using @ref LL_USART_SetDataWidth() function + * - Parity Control and mode configuration using @ref LL_USART_SetParity() function + * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function + * @rmtoll CR1 PS LL_USART_ConfigCharacter\n + * CR1 PCE LL_USART_ConfigCharacter\n + * CR1 M0 LL_USART_ConfigCharacter\n + * CR1 M1 LL_USART_ConfigCharacter\n + * CR2 STOP LL_USART_ConfigCharacter + * @param USARTx USART Instance + * @param DataWidth This parameter can be one of the following values: + * @arg @ref LL_USART_DATAWIDTH_7B + * @arg @ref LL_USART_DATAWIDTH_8B + * @arg @ref LL_USART_DATAWIDTH_9B + * @param Parity This parameter can be one of the following values: + * @arg @ref LL_USART_PARITY_NONE + * @arg @ref LL_USART_PARITY_EVEN + * @arg @ref LL_USART_PARITY_ODD + * @param StopBits This parameter can be one of the following values: + * @arg @ref LL_USART_STOPBITS_0_5 + * @arg @ref LL_USART_STOPBITS_1 + * @arg @ref LL_USART_STOPBITS_1_5 + * @arg @ref LL_USART_STOPBITS_2 + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity, + uint32_t StopBits) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth); + MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits); +} + +/** + * @brief Configure TX/RX pins swapping setting. + * @rmtoll CR2 SWAP LL_USART_SetTXRXSwap + * @param USARTx USART Instance + * @param SwapConfig This parameter can be one of the following values: + * @arg @ref LL_USART_TXRX_STANDARD + * @arg @ref LL_USART_TXRX_SWAPPED + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig); +} + +/** + * @brief Retrieve TX/RX pins swapping configuration. + * @rmtoll CR2 SWAP LL_USART_GetTXRXSwap + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_TXRX_STANDARD + * @arg @ref LL_USART_TXRX_SWAPPED + */ +__STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP)); +} + +/** + * @brief Configure RX pin active level logic + * @rmtoll CR2 RXINV LL_USART_SetRXPinLevel + * @param USARTx USART Instance + * @param PinInvMethod This parameter can be one of the following values: + * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD + * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED + * @retval None + */ +__STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod); +} + +/** + * @brief Retrieve RX pin active level logic configuration + * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD + * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED + */ +__STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV)); +} + +/** + * @brief Configure TX pin active level logic + * @rmtoll CR2 TXINV LL_USART_SetTXPinLevel + * @param USARTx USART Instance + * @param PinInvMethod This parameter can be one of the following values: + * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD + * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod); +} + +/** + * @brief Retrieve TX pin active level logic configuration + * @rmtoll CR2 TXINV LL_USART_GetTXPinLevel + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD + * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED + */ +__STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV)); +} + +/** + * @brief Configure Binary data logic. + * @note Allow to define how Logical data from the data register are send/received : + * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H) + * @rmtoll CR2 DATAINV LL_USART_SetBinaryDataLogic + * @param USARTx USART Instance + * @param DataLogic This parameter can be one of the following values: + * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE + * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE + * @retval None + */ +__STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic); +} + +/** + * @brief Retrieve Binary data configuration + * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE + * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE + */ +__STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV)); +} + +/** + * @brief Configure transfer bit order (either Less or Most Significant Bit First) + * @note MSB First means data is transmitted/received with the MSB first, following the start bit. + * LSB First means data is transmitted/received with data bit 0 first, following the start bit. + * @rmtoll CR2 MSBFIRST LL_USART_SetTransferBitOrder + * @param USARTx USART Instance + * @param BitOrder This parameter can be one of the following values: + * @arg @ref LL_USART_BITORDER_LSBFIRST + * @arg @ref LL_USART_BITORDER_MSBFIRST + * @retval None + */ +__STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder); +} + +/** + * @brief Return transfer bit order (either Less or Most Significant Bit First) + * @note MSB First means data is transmitted/received with the MSB first, following the start bit. + * LSB First means data is transmitted/received with data bit 0 first, following the start bit. + * @rmtoll CR2 MSBFIRST LL_USART_GetTransferBitOrder + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_BITORDER_LSBFIRST + * @arg @ref LL_USART_BITORDER_MSBFIRST + */ +__STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST)); +} + +/** + * @brief Enable Auto Baud-Rate Detection + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABREN LL_USART_EnableAutoBaudRate + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_ABREN); +} + +/** + * @brief Disable Auto Baud-Rate Detection + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN); +} + +/** + * @brief Indicate if Auto Baud-Rate Detection mechanism is enabled + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABREN LL_USART_IsEnabledAutoBaud + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL); +} + +/** + * @brief Set Auto Baud-Rate mode bits + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABRMODE LL_USART_SetAutoBaudRateMode + * @param USARTx USART Instance + * @param AutoBaudRateMode This parameter can be one of the following values: + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME + * @retval None + */ +__STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode); +} + +/** + * @brief Return Auto Baud-Rate mode + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll CR2 ABRMODE LL_USART_GetAutoBaudRateMode + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME + * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME + */ +__STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE)); +} + +/** + * @brief Enable Receiver Timeout + * @rmtoll CR2 RTOEN LL_USART_EnableRxTimeout + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_RTOEN); +} + +/** + * @brief Disable Receiver Timeout + * @rmtoll CR2 RTOEN LL_USART_DisableRxTimeout + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN); +} + +/** + * @brief Indicate if Receiver Timeout feature is enabled + * @rmtoll CR2 RTOEN LL_USART_IsEnabledRxTimeout + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN)) ? 1UL : 0UL); +} + +/** + * @brief Set Address of the USART node. + * @note This is used in multiprocessor communication during Mute mode or Stop mode, + * for wake up with address mark detection. + * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7. + * (b7-b4 should be set to 0) + * 8bits address node is used when 7-bit Address Detection is selected in ADDM7. + * (This is used in multiprocessor communication during Mute mode or Stop mode, + * for wake up with 7-bit address mark detection. + * The MSB of the character sent by the transmitter should be equal to 1. + * It may also be used for character detection during normal reception, + * Mute mode inactive (for example, end of block detection in ModBus protocol). + * In this case, the whole received character (8-bit) is compared to the ADD[7:0] + * value and CMF flag is set on match) + * @rmtoll CR2 ADD LL_USART_ConfigNodeAddress\n + * CR2 ADDM7 LL_USART_ConfigNodeAddress + * @param USARTx USART Instance + * @param AddressLen This parameter can be one of the following values: + * @arg @ref LL_USART_ADDRESS_DETECT_4B + * @arg @ref LL_USART_ADDRESS_DETECT_7B + * @param NodeAddress 4 or 7 bit Address of the USART node. + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7, + (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos))); +} + +/** + * @brief Return 8 bit Address of the USART node as set in ADD field of CR2. + * @note If 4-bit Address Detection is selected in ADDM7, + * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant) + * If 7-bit Address Detection is selected in ADDM7, + * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant) + * @rmtoll CR2 ADD LL_USART_GetNodeAddress + * @param USARTx USART Instance + * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255) + */ +__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos); +} + +/** + * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) + * @rmtoll CR2 ADDM7 LL_USART_GetNodeAddressLen + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_ADDRESS_DETECT_4B + * @arg @ref LL_USART_ADDRESS_DETECT_7B + */ +__STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7)); +} + +/** + * @brief Enable RTS HW Flow Control + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_RTSE); +} + +/** + * @brief Disable RTS HW Flow Control + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); +} + +/** + * @brief Enable CTS HW Flow Control + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_CTSE); +} + +/** + * @brief Disable CTS HW Flow Control + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); +} + +/** + * @brief Configure HW Flow Control mode (both CTS and RTS) + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n + * CR3 CTSE LL_USART_SetHWFlowCtrl + * @param USARTx USART Instance + * @param HardwareFlowControl This parameter can be one of the following values: + * @arg @ref LL_USART_HWCONTROL_NONE + * @arg @ref LL_USART_HWCONTROL_RTS + * @arg @ref LL_USART_HWCONTROL_CTS + * @arg @ref LL_USART_HWCONTROL_RTS_CTS + * @retval None + */ +__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); +} + +/** + * @brief Return HW Flow Control configuration (both CTS and RTS) + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n + * CR3 CTSE LL_USART_GetHWFlowCtrl + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_HWCONTROL_NONE + * @arg @ref LL_USART_HWCONTROL_RTS + * @arg @ref LL_USART_HWCONTROL_CTS + * @arg @ref LL_USART_HWCONTROL_RTS_CTS + */ +__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); +} + +/** + * @brief Enable One bit sampling method + * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); +} + +/** + * @brief Disable One bit sampling method + * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); +} + +/** + * @brief Indicate if One bit sampling method is enabled + * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL); +} + +/** + * @brief Enable Overrun detection + * @rmtoll CR3 OVRDIS LL_USART_EnableOverrunDetect + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS); +} + +/** + * @brief Disable Overrun detection + * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_OVRDIS); +} + +/** + * @brief Indicate if Overrun detection is enabled + * @rmtoll CR3 OVRDIS LL_USART_IsEnabledOverrunDetect + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL); +} + +/** + * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUS LL_USART_SetWKUPType + * @param USARTx USART Instance + * @param Type This parameter can be one of the following values: + * @arg @ref LL_USART_WAKEUP_ON_ADDRESS + * @arg @ref LL_USART_WAKEUP_ON_STARTBIT + * @arg @ref LL_USART_WAKEUP_ON_RXNE + * @retval None + */ +__STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type); +} + +/** + * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits) + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUS LL_USART_GetWKUPType + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_WAKEUP_ON_ADDRESS + * @arg @ref LL_USART_WAKEUP_ON_STARTBIT + * @arg @ref LL_USART_WAKEUP_ON_RXNE + */ +__STATIC_INLINE uint32_t LL_USART_GetWKUPType(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS)); +} + +/** + * @brief Configure USART BRR register for achieving expected Baud Rate value. + * @note Compute and set USARTDIV value in BRR Register (full BRR content) + * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values + * @note Peripheral clock and Baud rate values provided as function parameters should be valid + * (Baud rate value != 0) + * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. + * @rmtoll BRR BRR LL_USART_SetBaudRate + * @param USARTx USART Instance + * @param PeriphClk Peripheral Clock + * @param OverSampling This parameter can be one of the following values: + * @arg @ref LL_USART_OVERSAMPLING_16 + * @arg @ref LL_USART_OVERSAMPLING_8 + * @param BaudRate Baud Rate + * @retval None + */ +__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling, + uint32_t BaudRate) +{ + uint32_t usartdiv; + uint32_t brrtemp; + + if (OverSampling == LL_USART_OVERSAMPLING_8) + { + usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate)); + brrtemp = usartdiv & 0xFFF0U; + brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); + USARTx->BRR = brrtemp; + } + else + { + USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate)); + } +} + +/** + * @brief Return current Baud Rate value, according to USARTDIV present in BRR register + * (full BRR content), and to used Peripheral Clock and Oversampling mode values + * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned. + * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. + * @rmtoll BRR BRR LL_USART_GetBaudRate + * @param USARTx USART Instance + * @param PeriphClk Peripheral Clock + * @param OverSampling This parameter can be one of the following values: + * @arg @ref LL_USART_OVERSAMPLING_16 + * @arg @ref LL_USART_OVERSAMPLING_8 + * @retval Baud Rate + */ +__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling) +{ + uint32_t usartdiv; + uint32_t brrresult = 0x0U; + + usartdiv = USARTx->BRR; + + if (usartdiv == 0U) + { + /* Do not perform a division by 0 */ + } + else if (OverSampling == LL_USART_OVERSAMPLING_8) + { + usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ; + if (usartdiv != 0U) + { + brrresult = (PeriphClk * 2U) / usartdiv; + } + } + else + { + if ((usartdiv & 0xFFFFU) != 0U) + { + brrresult = PeriphClk / usartdiv; + } + } + return (brrresult); +} + +/** + * @brief Set Receiver Time Out Value (expressed in nb of bits duration) + * @rmtoll RTOR RTO LL_USART_SetRxTimeout + * @param USARTx USART Instance + * @param Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF + * @retval None + */ +__STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout) +{ + MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout); +} + +/** + * @brief Get Receiver Time Out Value (expressed in nb of bits duration) + * @rmtoll RTOR RTO LL_USART_GetRxTimeout + * @param USARTx USART Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x00FFFFFF + */ +__STATIC_INLINE uint32_t LL_USART_GetRxTimeout(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_RTO)); +} + +/** + * @brief Set Block Length value in reception + * @rmtoll RTOR BLEN LL_USART_SetBlockLength + * @param USARTx USART Instance + * @param BlockLength Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_USART_SetBlockLength(USART_TypeDef *USARTx, uint32_t BlockLength) +{ + MODIFY_REG(USARTx->RTOR, USART_RTOR_BLEN, BlockLength << USART_RTOR_BLEN_Pos); +} + +/** + * @brief Get Block Length value in reception + * @rmtoll RTOR BLEN LL_USART_GetBlockLength + * @param USARTx USART Instance + * @retval Value between Min_Data=0x00 and Max_Data=0xFF + */ +__STATIC_INLINE uint32_t LL_USART_GetBlockLength(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_RTOR_BLEN_Pos); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature + * @{ + */ + +/** + * @brief Enable IrDA mode + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IREN LL_USART_EnableIrda + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_IREN); +} + +/** + * @brief Disable IrDA mode + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IREN LL_USART_DisableIrda + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); +} + +/** + * @brief Indicate if IrDA mode is enabled + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IREN LL_USART_IsEnabledIrda + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); +} + +/** + * @brief Configure IrDA Power Mode (Normal or Low Power) + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode + * @param USARTx USART Instance + * @param PowerMode This parameter can be one of the following values: + * @arg @ref LL_USART_IRDA_POWER_NORMAL + * @arg @ref LL_USART_IRDA_POWER_LOW + * @retval None + */ +__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); +} + +/** + * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power) + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_IRDA_POWER_NORMAL + * @arg @ref LL_USART_PHASE_2EDGE + */ +__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP)); +} + +/** + * @brief Set Irda prescaler value, used for dividing the USART clock source + * to achieve the Irda Low Power frequency (8 bits value) + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler + * @param USARTx USART Instance + * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) +{ + MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_PSC, (uint16_t)PrescalerValue); +} + +/** + * @brief Return Irda prescaler value, used for dividing the USART clock source + * to achieve the Irda Low Power frequency (8 bits value) + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler + * @param USARTx USART Instance + * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF) + */ +__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC)); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature + * @{ + */ + +/** + * @brief Enable Smartcard NACK transmission + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_NACK); +} + +/** + * @brief Disable Smartcard NACK transmission + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_NACK); +} + +/** + * @brief Indicate if Smartcard NACK transmission is enabled + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL); +} + +/** + * @brief Enable Smartcard mode + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 SCEN LL_USART_EnableSmartcard + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_SCEN); +} + +/** + * @brief Disable Smartcard mode + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 SCEN LL_USART_DisableSmartcard + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN); +} + +/** + * @brief Indicate if Smartcard mode is enabled + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL); +} + +/** + * @brief Set Smartcard Auto-Retry Count value (SCARCNT[2:0] bits) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @note This bit-field specifies the number of retries in transmit and receive, in Smartcard mode. + * In transmission mode, it specifies the number of automatic retransmission retries, before + * generating a transmission error (FE bit set). + * In reception mode, it specifies the number or erroneous reception trials, before generating a + * reception error (RXNE and PE bits set) + * @rmtoll CR3 SCARCNT LL_USART_SetSmartcardAutoRetryCount + * @param USARTx USART Instance + * @param AutoRetryCount Value between Min_Data=0 and Max_Data=7 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryCount) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos); +} + +/** + * @brief Return Smartcard Auto-Retry Count value (SCARCNT[2:0] bits) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 SCARCNT LL_USART_GetSmartcardAutoRetryCount + * @param USARTx USART Instance + * @retval Smartcard Auto-Retry Count value (Value between Min_Data=0 and Max_Data=7) + */ +__STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos); +} + +/** + * @brief Set Smartcard prescaler value, used for dividing the USART clock + * source to provide the SMARTCARD Clock (5 bits value) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler + * @param USARTx USART Instance + * @param PrescalerValue Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) +{ + MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_PSC, (uint16_t)PrescalerValue); +} + +/** + * @brief Return Smartcard prescaler value, used for dividing the USART clock + * source to provide the SMARTCARD Clock (5 bits value) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler + * @param USARTx USART Instance + * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31) + */ +__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC)); +} + +/** + * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods + * (GT[7:0] bits : Guard time value) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime + * @param USARTx USART Instance + * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime) +{ + MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos)); +} + +/** + * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods + * (GT[7:0] bits : Guard time value) + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime + * @param USARTx USART Instance + * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF) + */ +__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature + * @{ + */ + +/** + * @brief Enable Single Wire Half-Duplex mode + * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not + * Half-Duplex mode is supported by the USARTx instance. + * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Disable Single Wire Half-Duplex mode + * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not + * Half-Duplex mode is supported by the USARTx instance. + * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Indicate if Single Wire Half-Duplex mode is enabled + * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not + * Half-Duplex mode is supported by the USARTx instance. + * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature + * @{ + */ + +/** + * @brief Set LIN Break Detection Length + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen + * @param USARTx USART Instance + * @param LINBDLength This parameter can be one of the following values: + * @arg @ref LL_USART_LINBREAK_DETECT_10B + * @arg @ref LL_USART_LINBREAK_DETECT_11B + * @retval None + */ +__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength) +{ + MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength); +} + +/** + * @brief Return LIN Break Detection Length + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_LINBREAK_DETECT_10B + * @arg @ref LL_USART_LINBREAK_DETECT_11B + */ +__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL)); +} + +/** + * @brief Enable LIN mode + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LINEN LL_USART_EnableLIN + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_LINEN); +} + +/** + * @brief Disable LIN mode + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LINEN LL_USART_DisableLIN + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN); +} + +/** + * @brief Indicate if LIN mode is enabled + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature + * @{ + */ + +/** + * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits). + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR1 DEDT LL_USART_SetDEDeassertionTime + * @param USARTx USART Instance + * @param Time Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos); +} + +/** + * @brief Return DEDT (Driver Enable De-Assertion Time) + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR1 DEDT LL_USART_GetDEDeassertionTime + * @param USARTx USART Instance + * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31 + */ +__STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos); +} + +/** + * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits). + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR1 DEAT LL_USART_SetDEAssertionTime + * @param USARTx USART Instance + * @param Time Value between Min_Data=0 and Max_Data=31 + * @retval None + */ +__STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time) +{ + MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos); +} + +/** + * @brief Return DEAT (Driver Enable Assertion Time) + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR1 DEAT LL_USART_GetDEAssertionTime + * @param USARTx USART Instance + * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31 + */ +__STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos); +} + +/** + * @brief Enable Driver Enable (DE) Mode + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEM LL_USART_EnableDEMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_DEM); +} + +/** + * @brief Disable Driver Enable (DE) Mode + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEM LL_USART_DisableDEMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_DEM); +} + +/** + * @brief Indicate if Driver Enable (DE) Mode is enabled + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEM LL_USART_IsEnabledDEMode + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); +} + +/** + * @brief Select Driver Enable Polarity + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEP LL_USART_SetDESignalPolarity + * @param USARTx USART Instance + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_USART_DE_POLARITY_HIGH + * @arg @ref LL_USART_DE_POLARITY_LOW + * @retval None + */ +__STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity) +{ + MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity); +} + +/** + * @brief Return Driver Enable Polarity + * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not + * Driver Enable feature is supported by the USARTx instance. + * @rmtoll CR3 DEP LL_USART_GetDESignalPolarity + * @param USARTx USART Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_USART_DE_POLARITY_HIGH + * @arg @ref LL_USART_DE_POLARITY_LOW + */ +__STATIC_INLINE uint32_t LL_USART_GetDESignalPolarity(USART_TypeDef *USARTx) +{ + return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP)); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services + * @{ + */ + +/** + * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART) + * @note In UART mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - CLKEN bit in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * @note Other remaining configurations items related to Asynchronous Mode + * (as Baud Rate, Word length, Parity, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n + * CR2 CLKEN LL_USART_ConfigAsyncMode\n + * CR3 SCEN LL_USART_ConfigAsyncMode\n + * CR3 IREN LL_USART_ConfigAsyncMode\n + * CR3 HDSEL LL_USART_ConfigAsyncMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx) +{ + /* In Asynchronous mode, the following bits must be kept cleared: + - LINEN, CLKEN bits in the USART_CR2 register, + - SCEN, IREN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Synchronous Mode + * @note In Synchronous mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * This function also sets the USART in Synchronous mode. + * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not + * Synchronous mode is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function + * @note Other remaining configurations items related to Synchronous Mode + * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n + * CR2 CLKEN LL_USART_ConfigSyncMode\n + * CR3 SCEN LL_USART_ConfigSyncMode\n + * CR3 IREN LL_USART_ConfigSyncMode\n + * CR3 HDSEL LL_USART_ConfigSyncMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx) +{ + /* In Synchronous mode, the following bits must be kept cleared: + - LINEN bit in the USART_CR2 register, + - SCEN, IREN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); + /* set the UART/USART in Synchronous mode */ + SET_BIT(USARTx->CR2, USART_CR2_CLKEN); +} + +/** + * @brief Perform basic configuration of USART for enabling use in LIN Mode + * @note In LIN mode, the following bits must be kept cleared: + * - STOP and CLKEN bits in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * This function also set the UART/USART in LIN mode. + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function + * @note Other remaining configurations items related to LIN Mode + * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using + * dedicated functions + * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n + * CR2 STOP LL_USART_ConfigLINMode\n + * CR2 LINEN LL_USART_ConfigLINMode\n + * CR3 IREN LL_USART_ConfigLINMode\n + * CR3 SCEN LL_USART_ConfigLINMode\n + * CR3 HDSEL LL_USART_ConfigLINMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx) +{ + /* In LIN mode, the following bits must be kept cleared: + - STOP and CLKEN bits in the USART_CR2 register, + - IREN, SCEN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); + /* Set the UART/USART in LIN mode */ + SET_BIT(USARTx->CR2, USART_CR2_LINEN); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode + * @note In Half Duplex mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - CLKEN bit in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * This function also sets the UART/USART in Half Duplex mode. + * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not + * Half-Duplex mode is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function + * @note Other remaining configurations items related to Half Duplex Mode + * (as Baud Rate, Word length, Parity, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n + * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n + * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n + * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n + * CR3 IREN LL_USART_ConfigHalfDuplexMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx) +{ + /* In Half Duplex mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - SCEN and IREN bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); + /* set the UART/USART in Half Duplex mode */ + SET_BIT(USARTx->CR3, USART_CR3_HDSEL); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Smartcard Mode + * @note In Smartcard mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * This function also configures Stop bits to 1.5 bits and + * sets the USART in Smartcard mode (SCEN bit). + * Clock Output is also enabled (CLKEN). + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function + * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function + * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function + * @note Other remaining configurations items related to Smartcard Mode + * (as Baud Rate, Word length, Parity, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n + * CR2 STOP LL_USART_ConfigSmartcardMode\n + * CR2 CLKEN LL_USART_ConfigSmartcardMode\n + * CR3 HDSEL LL_USART_ConfigSmartcardMode\n + * CR3 SCEN LL_USART_ConfigSmartcardMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx) +{ + /* In Smartcard mode, the following bits must be kept cleared: + - LINEN bit in the USART_CR2 register, + - IREN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); + /* Configure Stop bits to 1.5 bits */ + /* Synchronous mode is activated by default */ + SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN)); + /* set the UART/USART in Smartcard mode */ + SET_BIT(USARTx->CR3, USART_CR3_SCEN); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Irda Mode + * @note In IRDA mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - STOP and CLKEN bits in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * This function also sets the UART/USART in IRDA mode (IREN bit). + * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not + * IrDA feature is supported by the USARTx instance. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function + * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function + * @note Other remaining configurations items related to Irda Mode + * (as Baud Rate, Word length, Power mode, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n + * CR2 CLKEN LL_USART_ConfigIrdaMode\n + * CR2 STOP LL_USART_ConfigIrdaMode\n + * CR3 SCEN LL_USART_ConfigIrdaMode\n + * CR3 HDSEL LL_USART_ConfigIrdaMode\n + * CR3 IREN LL_USART_ConfigIrdaMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx) +{ + /* In IRDA mode, the following bits must be kept cleared: + - LINEN, STOP and CLKEN bits in the USART_CR2 register, + - SCEN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); + /* set the UART/USART in IRDA mode */ + SET_BIT(USARTx->CR3, USART_CR3_IREN); +} + +/** + * @brief Perform basic configuration of USART for enabling use in Multi processor Mode + * (several USARTs connected in a network, one of the USARTs can be the master, + * its TX output connected to the RX inputs of the other slaves USARTs). + * @note In MultiProcessor mode, the following bits must be kept cleared: + * - LINEN bit in the USART_CR2 register, + * - CLKEN bit in the USART_CR2 register, + * - SCEN bit in the USART_CR3 register, + * - IREN bit in the USART_CR3 register, + * - HDSEL bit in the USART_CR3 register. + * @note Call of this function is equivalent to following function call sequence : + * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function + * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function + * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function + * @note Other remaining configurations items related to Multi processor Mode + * (as Baud Rate, Wake Up Method, Node address, ...) should be set using + * dedicated functions + * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n + * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n + * CR3 SCEN LL_USART_ConfigMultiProcessMode\n + * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n + * CR3 IREN LL_USART_ConfigMultiProcessMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx) +{ + /* In Multi Processor mode, the following bits must be kept cleared: + - LINEN and CLKEN bits in the USART_CR2 register, + - IREN, SCEN and HDSEL bits in the USART_CR3 register. + */ + CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); + CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Check if the USART Parity Error Flag is set or not + * @rmtoll ISR PE LL_USART_IsActiveFlag_PE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Framing Error Flag is set or not + * @rmtoll ISR FE LL_USART_IsActiveFlag_FE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Noise error detected Flag is set or not + * @rmtoll ISR NE LL_USART_IsActiveFlag_NE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART OverRun Error Flag is set or not + * @rmtoll ISR ORE LL_USART_IsActiveFlag_ORE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART IDLE line detected Flag is set or not + * @rmtoll ISR IDLE LL_USART_IsActiveFlag_IDLE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Read Data Register Not Empty Flag is set or not + * @rmtoll ISR RXNE LL_USART_IsActiveFlag_RXNE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Transmission Complete Flag is set or not + * @rmtoll ISR TC LL_USART_IsActiveFlag_TC + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Transmit Data Register Empty Flag is set or not + * @rmtoll ISR TXE LL_USART_IsActiveFlag_TXE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART LIN Break Detection Flag is set or not + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll ISR LBDF LL_USART_IsActiveFlag_LBD + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART CTS interrupt Flag is set or not + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll ISR CTSIF LL_USART_IsActiveFlag_nCTS + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART CTS Flag is set or not + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll ISR CTS LL_USART_IsActiveFlag_CTS + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Receiver Time Out Flag is set or not + * @rmtoll ISR RTOF LL_USART_IsActiveFlag_RTO + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART End Of Block Flag is set or not + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll ISR EOBF LL_USART_IsActiveFlag_EOB + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Auto-Baud Rate Error Flag is set or not + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll ISR ABRE LL_USART_IsActiveFlag_ABRE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Auto-Baud Rate Flag is set or not + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll ISR ABRF LL_USART_IsActiveFlag_ABR + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Busy Flag is set or not + * @rmtoll ISR BUSY LL_USART_IsActiveFlag_BUSY + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Character Match Flag is set or not + * @rmtoll ISR CMF LL_USART_IsActiveFlag_CM + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Send Break Flag is set or not + * @rmtoll ISR SBKF LL_USART_IsActiveFlag_SBK + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not + * @rmtoll ISR RWU LL_USART_IsActiveFlag_RWU + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Wake Up from stop mode Flag is set or not + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll ISR WUF LL_USART_IsActiveFlag_WKUP + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Transmit Enable Acknowledge Flag is set or not + * @rmtoll ISR TEACK LL_USART_IsActiveFlag_TEACK + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Receive Enable Acknowledge Flag is set or not + * @rmtoll ISR REACK LL_USART_IsActiveFlag_REACK + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL); +} + +#if defined(USART_TCBGT_SUPPORT) +/* Function available only on devices supporting Transmit Complete before Guard Time feature */ +/** + * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not + * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TCBGT(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->ISR, USART_ISR_TCBGT) == (USART_ISR_TCBGT)) ? 1UL : 0UL); +} + +#endif /* USART_TCBGT_SUPPORT */ +/** + * @brief Clear Parity Error Flag + * @rmtoll ICR PECF LL_USART_ClearFlag_PE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_PECF); +} + +/** + * @brief Clear Framing Error Flag + * @rmtoll ICR FECF LL_USART_ClearFlag_FE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_FECF); +} + +/** + * @brief Clear Noise Error detected Flag + * @rmtoll ICR NCF LL_USART_ClearFlag_NE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_NCF); +} + +/** + * @brief Clear OverRun Error Flag + * @rmtoll ICR ORECF LL_USART_ClearFlag_ORE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_ORECF); +} + +/** + * @brief Clear IDLE line detected Flag + * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_IDLECF); +} + +/** + * @brief Clear Transmission Complete Flag + * @rmtoll ICR TCCF LL_USART_ClearFlag_TC + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_TCCF); +} + +#if defined(USART_TCBGT_SUPPORT) +/* Function available only on devices supporting Transmit Complete before Guard Time feature */ +/** + * @brief Clear Smartcard Transmission Complete Before Guard Time Flag + * @rmtoll ICR TCBGTCF LL_USART_ClearFlag_TCBGT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_TCBGT(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_TCBGTCF); +} +#endif /* USART_TCBGT_SUPPORT */ + +/** + * @brief Clear LIN Break Detection Flag + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_LBDCF); +} + +/** + * @brief Clear CTS Interrupt Flag + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll ICR CTSCF LL_USART_ClearFlag_nCTS + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_CTSCF); +} + +/** + * @brief Clear Receiver Time Out Flag + * @rmtoll ICR RTOCF LL_USART_ClearFlag_RTO + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_RTOCF); +} + +/** + * @brief Clear End Of Block Flag + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll ICR EOBCF LL_USART_ClearFlag_EOB + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_EOBCF); +} + +/** + * @brief Clear Character Match Flag + * @rmtoll ICR CMCF LL_USART_ClearFlag_CM + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_CMCF); +} + +/** + * @brief Clear Wake Up from stop mode Flag + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll ICR WUCF LL_USART_ClearFlag_WKUP + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx) +{ + WRITE_REG(USARTx->ICR, USART_ICR_WUCF); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_IT_Management IT_Management + * @{ + */ + +/** + * @brief Enable IDLE Interrupt + * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE); +} + +/** + * @brief Enable RX Not Empty Interrupt + * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE); +} + +/** + * @brief Enable Transmission Complete Interrupt + * @rmtoll CR1 TCIE LL_USART_EnableIT_TC + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE); +} + +/** + * @brief Enable TX Empty Interrupt + * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE); +} + +/** + * @brief Enable Parity Error Interrupt + * @rmtoll CR1 PEIE LL_USART_EnableIT_PE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE); +} + +/** + * @brief Enable Character Match Interrupt + * @rmtoll CR1 CMIE LL_USART_EnableIT_CM + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_CMIE); +} + +/** + * @brief Enable Receiver Timeout Interrupt + * @rmtoll CR1 RTOIE LL_USART_EnableIT_RTO + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RTOIE); +} + +/** + * @brief Enable End Of Block Interrupt + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR1 EOBIE LL_USART_EnableIT_EOB + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE); +} + +/** + * @brief Enable LIN Break Detection Interrupt + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR2, USART_CR2_LBDIE); +} + +/** + * @brief Enable Error Interrupt + * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing + * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register). + * 0: Interrupt is inhibited + * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register. + * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE); +} + +/** + * @brief Enable CTS Interrupt + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); +} + +/** + * @brief Enable Wake Up from Stop Mode Interrupt + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUFIE LL_USART_EnableIT_WKUP + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE); +} + +#if defined(USART_TCBGT_SUPPORT) +/* Function available only on devices supporting Transmit Complete before Guard Time feature */ +/** + * @brief Enable Smartcard Transmission Complete Before Guard Time Interrupt + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 TCBGTIE LL_USART_EnableIT_TCBGT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE); +} +#endif /* USART_TCBGT_SUPPORT */ + +/** + * @brief Disable IDLE Interrupt + * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE); +} + +/** + * @brief Disable RX Not Empty Interrupt + * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE); +} + +/** + * @brief Disable Transmission Complete Interrupt + * @rmtoll CR1 TCIE LL_USART_DisableIT_TC + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE); +} + +/** + * @brief Disable TX Empty Interrupt + * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE); +} + +/** + * @brief Disable Parity Error Interrupt + * @rmtoll CR1 PEIE LL_USART_DisableIT_PE + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE); +} + +/** + * @brief Disable Character Match Interrupt + * @rmtoll CR1 CMIE LL_USART_DisableIT_CM + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE); +} + +/** + * @brief Disable Receiver Timeout Interrupt + * @rmtoll CR1 RTOIE LL_USART_DisableIT_RTO + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE); +} + +/** + * @brief Disable End Of Block Interrupt + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR1 EOBIE LL_USART_DisableIT_EOB + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE); +} + +/** + * @brief Disable LIN Break Detection Interrupt + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE); +} + +/** + * @brief Disable Error Interrupt + * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing + * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register). + * 0: Interrupt is inhibited + * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register. + * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); +} + +/** + * @brief Disable CTS Interrupt + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); +} + +/** + * @brief Disable Wake Up from Stop Mode Interrupt + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUFIE LL_USART_DisableIT_WKUP + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE); +} + +#if defined(USART_TCBGT_SUPPORT) +/* Function available only on devices supporting Transmit Complete before Guard Time feature */ +/** + * @brief Disable Smartcard Transmission Complete Before Guard Time Interrupt + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 TCBGTIE LL_USART_DisableIT_TCBGT + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE); +} +#endif /* USART_TCBGT_SUPPORT */ + +/** + * @brief Check if the USART IDLE Interrupt source is enabled or disabled. + * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled. + * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U); +} + +/** + * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled. + * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART TX Empty Interrupt is enabled or disabled. + * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1U : 0U); +} + +/** + * @brief Check if the USART Parity Error Interrupt is enabled or disabled. + * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Character Match Interrupt is enabled or disabled. + * @rmtoll CR1 CMIE LL_USART_IsEnabledIT_CM + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled. + * @rmtoll CR1 RTOIE LL_USART_IsEnabledIT_RTO + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART End Of Block Interrupt is enabled or disabled. + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR1 EOBIE LL_USART_IsEnabledIT_EOB + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled. + * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + * LIN feature is supported by the USARTx instance. + * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Error Interrupt is enabled or disabled. + * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART CTS Interrupt is enabled or disabled. + * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + * Hardware Flow control feature is supported by the USARTx instance. + * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); +} + +/** + * @brief Check if the USART Wake Up from Stop Mode Interrupt is enabled or disabled. + * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not + * Wake-up from Stop mode feature is supported by the USARTx instance. + * @rmtoll CR3 WUFIE LL_USART_IsEnabledIT_WKUP + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL); +} + +#if defined(USART_TCBGT_SUPPORT) +/* Function available only on devices supporting Transmit Complete before Guard Time feature */ +/** + * @brief Check if the Smartcard Transmission Complete Before Guard Time Interrupt is enabled or disabled. + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll CR3 TCBGTIE LL_USART_IsEnabledIT_TCBGT + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TCBGT(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL); +} +#endif /* USART_TCBGT_SUPPORT */ + +/** + * @} + */ + +/** @defgroup USART_LL_EF_DMA_Management DMA_Management + * @{ + */ + +/** + * @brief Enable DMA Mode for reception + * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR); +} + +/** + * @brief Disable DMA Mode for reception + * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR); +} + +/** + * @brief Check if DMA Mode is enabled for reception + * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL); +} + +/** + * @brief Enable DMA Mode for transmission + * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) +{ + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); +} + +/** + * @brief Disable DMA Mode for transmission + * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx) +{ + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT); +} + +/** + * @brief Check if DMA Mode is enabled for transmission + * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL); +} + +/** + * @brief Enable DMA Disabling on Reception Error + * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->CR3, USART_CR3_DDRE); +} + +/** + * @brief Disable DMA Disabling on Reception Error + * @rmtoll CR3 DDRE LL_USART_DisableDMADeactOnRxErr + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx) +{ + CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE); +} + +/** + * @brief Indicate if DMA Disabling on Reception Error is disabled + * @rmtoll CR3 DDRE LL_USART_IsEnabledDMADeactOnRxErr + * @param USARTx USART Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(USART_TypeDef *USARTx) +{ + return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL); +} + +/** + * @brief Get the data register address used for DMA transfer + * @rmtoll RDR RDR LL_USART_DMA_GetRegAddr\n + * @rmtoll TDR TDR LL_USART_DMA_GetRegAddr + * @param USARTx USART Instance + * @param Direction This parameter can be one of the following values: + * @arg @ref LL_USART_DMA_REG_DATA_TRANSMIT + * @arg @ref LL_USART_DMA_REG_DATA_RECEIVE + * @retval Address of data register + */ +__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx, uint32_t Direction) +{ + uint32_t data_reg_addr; + + if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT) + { + /* return address of TDR register */ + data_reg_addr = (uint32_t) &(USARTx->TDR); + } + else + { + /* return address of RDR register */ + data_reg_addr = (uint32_t) &(USARTx->RDR); + } + + return data_reg_addr; +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Data_Management Data_Management + * @{ + */ + +/** + * @brief Read Receiver Data register (Receive Data value, 8 bits) + * @rmtoll RDR RDR LL_USART_ReceiveData8 + * @param USARTx USART Instance + * @retval Value between Min_Data=0x00 and Max_Data=0xFF + */ +__STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx) +{ + return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU); +} + +/** + * @brief Read Receiver Data register (Receive Data value, 9 bits) + * @rmtoll RDR RDR LL_USART_ReceiveData9 + * @param USARTx USART Instance + * @retval Value between Min_Data=0x00 and Max_Data=0x1FF + */ +__STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx) +{ + return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR)); +} + +/** + * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) + * @rmtoll TDR TDR LL_USART_TransmitData8 + * @param USARTx USART Instance + * @param Value between Min_Data=0x00 and Max_Data=0xFF + * @retval None + */ +__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value) +{ + USARTx->TDR = Value; +} + +/** + * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits) + * @rmtoll TDR TDR LL_USART_TransmitData9 + * @param USARTx USART Instance + * @param Value between Min_Data=0x00 and Max_Data=0x1FF + * @retval None + */ +__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value) +{ + USARTx->TDR = (uint16_t)(Value & 0x1FFUL); +} + +/** + * @} + */ + +/** @defgroup USART_LL_EF_Execution Execution + * @{ + */ + +/** + * @brief Request an Automatic Baud Rate measurement on next received data frame + * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not + * Auto Baud Rate detection feature is supported by the USARTx instance. + * @rmtoll RQR ABRRQ LL_USART_RequestAutoBaudRate + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_ABRRQ); +} + +/** + * @brief Request Break sending + * @rmtoll RQR SBKRQ LL_USART_RequestBreakSending + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_SBKRQ); +} + +/** + * @brief Put USART in mute mode and set the RWU flag + * @rmtoll RQR MMRQ LL_USART_RequestEnterMuteMode + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_MMRQ); +} + +/** + * @brief Request a Receive Data flush + * @note Allows to discard the received data without reading them, and avoid an overrun + * condition. + * @rmtoll RQR RXFRQ LL_USART_RequestRxDataFlush + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_RXFRQ); +} + +/** + * @brief Request a Transmit data flush + * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not + * Smartcard feature is supported by the USARTx instance. + * @rmtoll RQR TXFRQ LL_USART_RequestTxDataFlush + * @param USARTx USART Instance + * @retval None + */ +__STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx) +{ + SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_TXFRQ); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup USART_LL_EF_Init Initialization and de-initialization functions + * @{ + */ +ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx); +ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct); +void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct); +ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct); +void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct); +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* USART1 || USART2 || USART4 || USART5 */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32L0xx_LL_USART_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c b/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c index 58ccb6c..6d37773 100644 --- a/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c +++ b/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c @@ -25,7 +25,7 @@ #include "stm32_assert.h" #else #define assert_param(expr) ((void)0U) -#endif +#endif /* USE_FULL_ASSERT */ /** @addtogroup STM32L0xx_LL_Driver * @{ @@ -109,7 +109,7 @@ ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx) LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); } -#endif +#endif /* I2C2 */ #if defined(I2C3) else if (I2Cx == I2C3) { @@ -119,7 +119,7 @@ ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx) /* Release reset of I2C clock */ LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3); } -#endif +#endif /* I2C3 */ else { status = ERROR; diff --git a/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c b/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c index 2bd1b44..ca9db9a 100644 --- a/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c +++ b/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c @@ -75,11 +75,11 @@ /** @defgroup RCC_LL_Private_Functions RCC Private functions * @{ */ -uint32_t RCC_GetSystemClockFreq(void); -uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency); -uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency); -uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency); -uint32_t RCC_PLL_GetFreqDomain_SYS(void); +static uint32_t RCC_GetSystemClockFreq(void); +static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency); +static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency); +static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency); +static uint32_t RCC_PLL_GetFreqDomain_SYS(void); /** * @} */ @@ -576,7 +576,7 @@ uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource) * @brief Return SYSTEM clock frequency * @retval SYSTEM clock frequency (in Hz) */ -uint32_t RCC_GetSystemClockFreq(void) +static uint32_t RCC_GetSystemClockFreq(void) { uint32_t frequency; @@ -619,7 +619,7 @@ uint32_t RCC_GetSystemClockFreq(void) * @param SYSCLK_Frequency SYSCLK clock frequency * @retval HCLK clock frequency (in Hz) */ -uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency) +static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency) { /* HCLK clock frequency */ return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler()); @@ -630,7 +630,7 @@ uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency) * @param HCLK_Frequency HCLK clock frequency * @retval PCLK1 clock frequency (in Hz) */ -uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency) +static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency) { /* PCLK1 clock frequency */ return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler()); @@ -641,7 +641,7 @@ uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency) * @param HCLK_Frequency HCLK clock frequency * @retval PCLK2 clock frequency (in Hz) */ -uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency) +static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency) { /* PCLK2 clock frequency */ return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler()); @@ -651,7 +651,7 @@ uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency) * @brief Return PLL clock frequency used for system domain * @retval PLL clock frequency (in Hz) */ -uint32_t RCC_PLL_GetFreqDomain_SYS(void) +static uint32_t RCC_PLL_GetFreqDomain_SYS(void) { uint32_t pllinputfreq, pllsource; diff --git a/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c b/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c index 08e5dca..dd5c015 100644 --- a/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c +++ b/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c @@ -214,7 +214,8 @@ void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct) /** * @brief Configure the TIMx time base unit. * @param TIMx Timer Instance - * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure) + * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure + * (TIMx time base unit configuration data structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx registers are de-initialized * - ERROR: not applicable @@ -260,7 +261,8 @@ ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct) /** * @brief Set the fields of the TIMx output channel configuration data * structure to their default values. - * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure) + * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure + * (the output channel configuration data structure) * @retval None */ void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct) @@ -280,7 +282,8 @@ void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct) * @arg @ref LL_TIM_CHANNEL_CH2 * @arg @ref LL_TIM_CHANNEL_CH3 * @arg @ref LL_TIM_CHANNEL_CH4 - * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure) + * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration + * data structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx output channel is initialized * - ERROR: TIMx output channel is not initialized @@ -313,7 +316,8 @@ ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTy /** * @brief Set the fields of the TIMx input channel configuration data * structure to their default values. - * @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure) + * @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration + * data structure) * @retval None */ void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) @@ -333,7 +337,8 @@ void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) * @arg @ref LL_TIM_CHANNEL_CH2 * @arg @ref LL_TIM_CHANNEL_CH3 * @arg @ref LL_TIM_CHANNEL_CH4 - * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure) + * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data + * structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx output channel is initialized * - ERROR: TIMx output channel is not initialized @@ -365,7 +370,8 @@ ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTy /** * @brief Fills each TIM_EncoderInitStruct field with its default value - * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure) + * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface + * configuration data structure) * @retval None */ void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct) @@ -385,7 +391,8 @@ void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct /** * @brief Configure the encoder interface of the timer instance. * @param TIMx Timer Instance - * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure) + * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface + * configuration data structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx registers are de-initialized * - ERROR: not applicable diff --git a/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c b/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c new file mode 100644 index 0000000..47de09d --- /dev/null +++ b/fw/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c @@ -0,0 +1,420 @@ +/** + ****************************************************************************** + * @file stm32l0xx_ll_usart.c + * @author MCD Application Team + * @brief USART LL module driver. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +#if defined(USE_FULL_LL_DRIVER) + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l0xx_ll_usart.h" +#include "stm32l0xx_ll_rcc.h" +#include "stm32l0xx_ll_bus.h" +#ifdef USE_FULL_ASSERT +#include "stm32_assert.h" +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +/** @addtogroup STM32L0xx_LL_Driver + * @{ + */ + +#if defined (USART1) || defined (USART2) || defined (USART4) || defined (USART5) + +/** @addtogroup USART_LL + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private constants ---------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup USART_LL_Private_Macros + * @{ + */ + +/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available + * divided by the smallest oversampling used on the USART (i.e. 8) */ +#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4000000U) + +/* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */ +#define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U) + +#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ + || ((__VALUE__) == LL_USART_DIRECTION_RX) \ + || ((__VALUE__) == LL_USART_DIRECTION_TX) \ + || ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) + +#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ + || ((__VALUE__) == LL_USART_PARITY_EVEN) \ + || ((__VALUE__) == LL_USART_PARITY_ODD)) + +#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \ + || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \ + || ((__VALUE__) == LL_USART_DATAWIDTH_9B)) + +#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ + || ((__VALUE__) == LL_USART_OVERSAMPLING_8)) + +#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ + || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT)) + +#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ + || ((__VALUE__) == LL_USART_PHASE_2EDGE)) + +#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ + || ((__VALUE__) == LL_USART_POLARITY_HIGH)) + +#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ + || ((__VALUE__) == LL_USART_CLOCK_ENABLE)) + +#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ + || ((__VALUE__) == LL_USART_STOPBITS_1) \ + || ((__VALUE__) == LL_USART_STOPBITS_1_5) \ + || ((__VALUE__) == LL_USART_STOPBITS_2)) + +#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \ + || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \ + || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \ + || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS)) + +/** + * @} + */ + +/* Private function prototypes -----------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup USART_LL_Exported_Functions + * @{ + */ + +/** @addtogroup USART_LL_EF_Init + * @{ + */ + +/** + * @brief De-initialize USART registers (Registers restored to their default values). + * @param USARTx USART Instance + * @retval An ErrorStatus enumeration value: + * - SUCCESS: USART registers are de-initialized + * - ERROR: USART registers are not de-initialized + */ +ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx) +{ + ErrorStatus status = SUCCESS; + + /* Check the parameters */ + assert_param(IS_UART_INSTANCE(USARTx)); + +#if defined(USART1) + if (USARTx == USART1) + { + /* Force reset of USART clock */ + LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1); + + /* Release reset of USART clock */ + LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1); + } +#endif /* USART1 */ +#if defined(USART1) + else if (USARTx == USART2) +#else + if (USARTx == USART2) +#endif /* USART1 */ + { + /* Force reset of USART clock */ + LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2); + + /* Release reset of USART clock */ + LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2); + } +#if defined(USART4) + else if (USARTx == USART4) + { + /* Force reset of USART clock */ + LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4); + + /* Release reset of USART clock */ + LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4); + } +#endif /* USART4 */ +#if defined(USART5) + else if (USARTx == USART5) + { + /* Force reset of USART clock */ + LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5); + + /* Release reset of USART clock */ + LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5); + } +#endif /* USART5 */ + else + { + status = ERROR; + } + + return (status); +} + +/** + * @brief Initialize USART registers according to the specified + * parameters in USART_InitStruct. + * @note As some bits in USART configuration registers can only be written when + * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling + * this function. Otherwise, ERROR result will be returned. + * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0). + * @param USARTx USART Instance + * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure + * that contains the configuration information for the specified USART peripheral. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: USART registers are initialized according to USART_InitStruct content + * - ERROR: Problem occurred during USART Registers initialization + */ +ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct) +{ + ErrorStatus status = ERROR; + uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO; +#if defined(USART4) || defined(USART5) + LL_RCC_ClocksTypeDef RCC_Clocks; +#endif /* USART4 || USART5 */ + + /* Check the parameters */ + assert_param(IS_UART_INSTANCE(USARTx)); + assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate)); + assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth)); + assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits)); + assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity)); + assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection)); + assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl)); + assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling)); + + /* USART needs to be in disabled state, in order to be able to configure some bits in + CRx registers */ + if (LL_USART_IsEnabled(USARTx) == 0U) + { + /*---------------------------- USART CR1 Configuration --------------------- + * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters: + * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value + * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value + * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value + * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value. + */ + MODIFY_REG(USARTx->CR1, + (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | + USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), + (USART_InitStruct->DataWidth | USART_InitStruct->Parity | + USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling)); + + /*---------------------------- USART CR2 Configuration --------------------- + * Configure USARTx CR2 (Stop bits) with parameters: + * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value. + * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit(). + */ + LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits); + + /*---------------------------- USART CR3 Configuration --------------------- + * Configure USARTx CR3 (Hardware Flow Control) with parameters: + * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to + * USART_InitStruct->HardwareFlowControl value. + */ + LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl); + + /*---------------------------- USART BRR Configuration --------------------- + * Retrieve Clock frequency used for USART Peripheral + */ +#if defined(USART1) + if (USARTx == USART1) + { + periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE); + } +#endif /* USART1 */ +#if defined(USART1) + else if (USARTx == USART2) +#else + if (USARTx == USART2) +#endif /* USART1 */ + { + periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE); + } +#if defined(USART4) + else if (USARTx == USART4) + { + /* USART4 clock is PCLK1 */ + LL_RCC_GetSystemClocksFreq(&RCC_Clocks); + periphclk = RCC_Clocks.PCLK1_Frequency; + } +#endif /* USART4 */ +#if defined(USART5) + else if (USARTx == USART5) + { + /* USART5 clock is PCLK1 */ + LL_RCC_GetSystemClocksFreq(&RCC_Clocks); + periphclk = RCC_Clocks.PCLK1_Frequency; + } +#endif /* USART5 */ + else + { + /* Nothing to do, as error code is already assigned to ERROR value */ + } + + /* Configure the USART Baud Rate : + - valid baud rate value (different from 0) is required + - Peripheral clock as returned by RCC service, should be valid (different from 0). + */ + if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) + && (USART_InitStruct->BaudRate != 0U)) + { + status = SUCCESS; + LL_USART_SetBaudRate(USARTx, + periphclk, + USART_InitStruct->OverSampling, + USART_InitStruct->BaudRate); + + /* Check BRR is greater than or equal to 16d */ + assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR)); + } + } + /* Endif (=> USART not in Disabled state => return ERROR) */ + + return (status); +} + +/** + * @brief Set each @ref LL_USART_InitTypeDef field to default value. + * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure + * whose fields will be set to default values. + * @retval None + */ + +void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct) +{ + /* Set USART_InitStruct fields to default values */ + USART_InitStruct->BaudRate = 9600U; + USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B; + USART_InitStruct->StopBits = LL_USART_STOPBITS_1; + USART_InitStruct->Parity = LL_USART_PARITY_NONE ; + USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX; + USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE; + USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16; +} + +/** + * @brief Initialize USART Clock related settings according to the + * specified parameters in the USART_ClockInitStruct. + * @note As some bits in USART configuration registers can only be written when + * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling + * this function. Otherwise, ERROR result will be returned. + * @param USARTx USART Instance + * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure + * that contains the Clock configuration information for the specified USART peripheral. + * @retval An ErrorStatus enumeration value: + * - SUCCESS: USART registers related to Clock settings are initialized according + * to USART_ClockInitStruct content + * - ERROR: Problem occurred during USART Registers initialization + */ +ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct) +{ + ErrorStatus status = SUCCESS; + + /* Check USART Instance and Clock signal output parameters */ + assert_param(IS_UART_INSTANCE(USARTx)); + assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput)); + + /* USART needs to be in disabled state, in order to be able to configure some bits in + CRx registers */ + if (LL_USART_IsEnabled(USARTx) == 0U) + { + /* If USART Clock signal is disabled */ + if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE) + { + /* Deactivate Clock signal delivery : + * - Disable Clock Output: USART_CR2_CLKEN cleared + */ + LL_USART_DisableSCLKOutput(USARTx); + } + else + { + /* Ensure USART instance is USART capable */ + assert_param(IS_USART_INSTANCE(USARTx)); + + /* Check clock related parameters */ + assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); + assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase)); + assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse)); + + /*---------------------------- USART CR2 Configuration ----------------------- + * Configure USARTx CR2 (Clock signal related bits) with parameters: + * - Enable Clock Output: USART_CR2_CLKEN set + * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value + * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value + * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value. + */ + MODIFY_REG(USARTx->CR2, + USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, + USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity | + USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse); + } + } + /* Else (USART not in Disabled state => return ERROR */ + else + { + status = ERROR; + } + + return (status); +} + +/** + * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value. + * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure + * whose fields will be set to default values. + * @retval None + */ +void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct) +{ + /* Set LL_USART_ClockInitStruct fields with default values */ + USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE; + USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = + LL_USART_CLOCK_DISABLE */ + USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = + LL_USART_CLOCK_DISABLE */ + USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = + LL_USART_CLOCK_DISABLE */ +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* USART1 || USART2 || USART4 || USART5 */ + +/** + * @} + */ + +#endif /* USE_FULL_LL_DRIVER */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/fw/STM32L031G6UX_FLASH.ld b/fw/STM32L031G6UX_FLASH.ld new file mode 100644 index 0000000..1c2e4da --- /dev/null +++ b/fw/STM32L031G6UX_FLASH.ld @@ -0,0 +1,186 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** @brief : Linker script for STM32L031G6Ux Device from STM32L0 series +** 32Kbytes FLASH +** 8Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +**

© Copyright (c) 2021 STMicroelectronics. +** All rights reserved.

+** +** This software component is licensed by ST under BSD 3-Clause license, +** the "License"; You may not use this file except in compliance with the +** License. You may obtain a copy of the License at: +** opensource.org/licenses/BSD-3-Clause +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200 ; /* required amount of heap */ +_Min_Stack_Size = 0x400 ; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/fw/iaq_wired_sensor Debug.launch b/fw/iaq_wired_sensor Debug.launch index e9df78e..420a890 100644 --- a/fw/iaq_wired_sensor Debug.launch +++ b/fw/iaq_wired_sensor Debug.launch @@ -5,6 +5,8 @@ + + @@ -14,7 +16,6 @@ - @@ -27,22 +28,28 @@ - + - + + - + + + + + + - + @@ -61,13 +68,13 @@ - + - + diff --git a/fw/iaq_wired_sensor.ioc b/fw/iaq_wired_sensor.ioc index 1e11fd8..77b23fd 100644 --- a/fw/iaq_wired_sensor.ioc +++ b/fw/iaq_wired_sensor.ioc @@ -4,77 +4,70 @@ GPIO.groupedBy=Group By Peripherals I2C1.IPParameters=Timing I2C1.Timing=0x40000A0B KeepUserPlacement=false -LPUART1.BaudRate=115200 -LPUART1.IPParameters=BaudRate,SwapParam,OneBitSampling,WordLength,Parity -LPUART1.OneBitSampling=UART_ONE_BIT_SAMPLE_ENABLE -LPUART1.Parity=UART_PARITY_EVEN -LPUART1.SwapParam=UART_ADVFEATURE_SWAP_ENABLE -LPUART1.WordLength=UART_WORDLENGTH_9B Mcu.Family=STM32L0 Mcu.IP0=I2C1 -Mcu.IP1=LPUART1 -Mcu.IP2=NVIC -Mcu.IP3=RCC -Mcu.IP4=SYS -Mcu.IP5=TIM21 +Mcu.IP1=NVIC +Mcu.IP2=RCC +Mcu.IP3=SYS +Mcu.IP4=TIM21 +Mcu.IP5=USART2 Mcu.IPNb=6 -Mcu.Name=STM32L011F(3-4)Ux -Mcu.Package=UFQFPN20 -Mcu.Pin0=PA0-CK_IN -Mcu.Pin1=PA1 -Mcu.Pin10=VP_TIM21_VS_ClockSourceINT -Mcu.Pin2=PA5 -Mcu.Pin3=PA6 -Mcu.Pin4=PA7 -Mcu.Pin5=PA9 -Mcu.Pin6=PA10 -Mcu.Pin7=PA13 -Mcu.Pin8=PA14 -Mcu.Pin9=VP_SYS_VS_Systick -Mcu.PinsNb=11 +Mcu.Name=STM32L031G(4-6)Ux +Mcu.Package=UFQFPN28 +Mcu.Pin0=PA1 +Mcu.Pin1=PA2 +Mcu.Pin10=VP_SYS_VS_Systick +Mcu.Pin11=VP_TIM21_VS_ClockSourceINT +Mcu.Pin2=PA3 +Mcu.Pin3=PA5 +Mcu.Pin4=PA6 +Mcu.Pin5=PA7 +Mcu.Pin6=PA9 +Mcu.Pin7=PA10 +Mcu.Pin8=PA13 +Mcu.Pin9=PA14 +Mcu.PinsNb=12 Mcu.ThirdPartyNb=0 Mcu.UserConstants= -Mcu.UserName=STM32L011F4Ux -MxCube.Version=6.2.1 -MxDb.Version=DB.6.0.21 +Mcu.UserName=STM32L031G6Ux +MxCube.Version=6.3.0 +MxDb.Version=DB.6.0.30 NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.LPUART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true +NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true NVIC.TIM21_IRQn=true\:0\:0\:false\:false\:true\:true\:true -PA0-CK_IN.GPIOParameters=GPIO_PuPd -PA0-CK_IN.GPIO_PuPd=GPIO_PULLUP -PA0-CK_IN.Mode=Asynchronous -PA0-CK_IN.Signal=LPUART1_RX -PA1.GPIOParameters=GPIO_PuPd -PA1.GPIO_PuPd=GPIO_PULLUP -PA1.Mode=Asynchronous -PA1.Signal=LPUART1_TX +NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true +PA1.Mode=Hardware Flow Control (RS485) +PA1.Signal=USART2_DE +PA10.GPIOParameters=GPIO_Pu +PA10.GPIO_Pu=GPIO_PULLUP PA10.Mode=I2C PA10.Signal=I2C1_SDA PA13.Mode=Serial_Wire PA13.Signal=SYS_SWDIO PA14.Mode=Serial_Wire PA14.Signal=SYS_SWCLK -PA5.GPIOParameters=PinState,GPIO_Label +PA2.Mode=Asynchronous +PA2.Signal=USART2_TX +PA3.Mode=Asynchronous +PA3.Signal=USART2_RX +PA5.GPIOParameters=GPIO_Label PA5.GPIO_Label=LED_B PA5.Locked=true -PA5.PinState=GPIO_PIN_SET PA5.Signal=GPIO_Output -PA6.GPIOParameters=PinState,GPIO_Label +PA6.GPIOParameters=GPIO_Label PA6.GPIO_Label=LED_G PA6.Locked=true -PA6.PinState=GPIO_PIN_SET PA6.Signal=GPIO_Output -PA7.GPIOParameters=PinState,GPIO_Label +PA7.GPIOParameters=GPIO_Label PA7.GPIO_Label=LED_R PA7.Locked=true -PA7.PinState=GPIO_PIN_SET PA7.Signal=GPIO_Output -PA9.Locked=true +PA9.GPIOParameters=GPIO_Pu +PA9.GPIO_Pu=GPIO_PULLUP PA9.Mode=I2C PA9.Signal=I2C1_SCL PinOutPanel.RotationAngle=0 @@ -86,8 +79,8 @@ ProjectManager.CoupleFile=false ProjectManager.CustomerFirmwarePackage= ProjectManager.DefaultFWLocation=true ProjectManager.DeletePrevious=true -ProjectManager.DeviceId=STM32L011F4Ux -ProjectManager.FirmwarePackage=STM32Cube FW_L0 V1.12.0 +ProjectManager.DeviceId=STM32L031G6Ux +ProjectManager.FirmwarePackage=STM32Cube FW_L0 V1.12.1 ProjectManager.FreePins=false ProjectManager.HalAssertFull=false ProjectManager.HeapSize=0x200 @@ -105,7 +98,7 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-SystemClock_Config-RCC-false-LL-false,3-MX_I2C1_Init-I2C1-false-LL-true,4-MX_LPUART1_UART_Init-LPUART1-false-LL-true,5-MX_TIM21_Init-TIM21-false-LL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_I2C1_Init-I2C1-false-LL-true,4-MX_USART2_UART_Init-USART2-false-LL-true,5-MX_TIM21_Init-TIM21-false-LL-true RCC.AHBFreq_Value=12000000 RCC.APB1Freq_Value=12000000 RCC.APB1TimFreq_Value=12000000 @@ -138,13 +131,20 @@ RCC.USART2Freq_Value=12000000 RCC.VCOOutputFreq_Value=48000000 RCC.WatchDogFreq_Value=37000 TIM21.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE -TIM21.ClockDivision=TIM_CLOCKDIVISION_DIV1 -TIM21.IPParameters=Prescaler,Period,AutoReloadPreload,ClockDivision +TIM21.IPParameters=Prescaler,Period,AutoReloadPreload TIM21.IPParametersWithoutCheck=Prescaler,Period TIM21.Period=tim21_period TIM21.Prescaler=tim21_prescaler +USART2.BaudRate=config_baudrates[sensor_config.baudrate_index] +USART2.IPParameters=VirtualMode-Asynchronous,VirtualMode-Hardware Flow Control (RS485),BaudRate,WordLength,Parity +USART2.IPParametersWithoutCheck=BaudRate +USART2.Parity=PARITY_EVEN +USART2.VirtualMode-Asynchronous=VM_ASYNC +USART2.VirtualMode-Hardware\ Flow\ Control\ (RS485)=VM_ASYNC +USART2.WordLength=WORDLENGTH_9B VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick VP_TIM21_VS_ClockSourceINT.Mode=Internal VP_TIM21_VS_ClockSourceINT.Signal=TIM21_VS_ClockSourceINT board=custom +isbadioc=false diff --git a/fw_old/.cproject b/fw_old/.cproject new file mode 100644 index 0000000..30a87ca --- /dev/null +++ b/fw_old/.cproject @@ -0,0 +1,396 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fw_old/.mxproject b/fw_old/.mxproject new file mode 100644 index 0000000..4d4db74 --- /dev/null +++ b/fw_old/.mxproject @@ -0,0 +1,24 @@ +[PreviousLibFiles] +LibFiles=Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm3.h; + +[PreviousUsedCubeIDEFiles] +SourceFiles=Core/Src/main.c;Core/Src/stm32l0xx_it.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Core/Src/system_stm32l0xx.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c;Core/Src/system_stm32l0xx.c;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;; +HeaderPath=Drivers/STM32L0xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32L0xx/Include;Drivers/CMSIS/Include;Core/Inc; +CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1;STM32L011xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;MSI_VALUE:2097000;HSI_VALUE:16000000;LSI_VALUE:37000;VDD_VALUE:3300;PREFETCH_ENABLE:0;INSTRUCTION_CACHE_ENABLE:1;DATA_CACHE_ENABLE:1; + +[PreviousGenFiles] +AdvancedFolderStructure=true +HeaderFileListSize=3 +HeaderFiles#0=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Inc/stm32l0xx_it.h +HeaderFiles#1=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Inc/stm32_assert.h +HeaderFiles#2=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Inc/main.h +HeaderFolderListSize=1 +HeaderPath#0=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Inc +HeaderFiles=; +SourceFileListSize=2 +SourceFiles#0=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Src/stm32l0xx_it.c +SourceFiles#1=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Src/main.c +SourceFolderListSize=1 +SourcePath#0=/home/mrs/Personal/HDIoT/Smart_Household/iaq_wired_sensor/fw/Core/Src +SourceFiles=; + diff --git a/fw_old/.project b/fw_old/.project new file mode 100644 index 0000000..6232ccb --- /dev/null +++ b/fw_old/.project @@ -0,0 +1,33 @@ + + + iaq_wired_sensor + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.st.stm32cube.ide.mcu.MCUProjectNature + com.st.stm32cube.ide.mcu.MCUCubeProjectNature + org.eclipse.cdt.core.cnature + com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature + com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature + com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature + com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature + com.st.stm32cube.ide.mcu.MCURootProjectNature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/fw_old/.settings/org.eclipse.cdt.codan.core.prefs b/fw_old/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..19f7155 --- /dev/null +++ b/fw_old/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,72 @@ +com.st.stm32cube.ide.mcu.ide.oss.source.checker.libnano.problem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Float formatting support\\")"} +eclipse.preferences.version=1 +org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false} +org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused return value\\")"} +org.eclipse.cdt.codan.checkers.localvarreturn=-Warning +org.eclipse.cdt.codan.checkers.localvarreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Returning the address of a local variable\\")"} +org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Nesting comments\\")"} +org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Line comments\\")"} +org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return value\\")",implicit\=>false} +org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Abstract class cannot be instantiated\\")"} +org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Ambiguous problem\\")"} +org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment in condition\\")"} +org.eclipse.cdt.codan.internal.checkers.AssignmentToItselfProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Assignment to itself\\")"} +org.eclipse.cdt.codan.internal.checkers.BlacklistProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.BlacklistProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function or method is blacklisted\\")",blacklist\=>()} +org.eclipse.cdt.codan.internal.checkers.CStyleCastProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.CStyleCastProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"C-Style cast instead of C++ cast\\")",checkMacro\=>true} +org.eclipse.cdt.codan.internal.checkers.CaseBreakProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No break at end of case\\")",no_break_comment\=>"no break",last_case_param\=>false,empty_case_param\=>false,enable_fallthrough_quickfix_param\=>false} +org.eclipse.cdt.codan.internal.checkers.CatchByReference.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Catching by reference is recommended\\")",unknown\=>false,exceptions\=>()} +org.eclipse.cdt.codan.internal.checkers.CircularReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Circular inheritance\\")"} +org.eclipse.cdt.codan.internal.checkers.ClassMembersInitialization.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class members should be properly initialized\\")",skip\=>true} +org.eclipse.cdt.codan.internal.checkers.CopyrightProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.CopyrightProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Lack of copyright information\\")",regex\=>".*Copyright.*"} +org.eclipse.cdt.codan.internal.checkers.DecltypeAutoProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid 'decltype(auto)' specifier\\")"} +org.eclipse.cdt.codan.internal.checkers.FieldResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Field cannot be resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.FloatCompareProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.FloatCompareProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Direct float comparison\\")"} +org.eclipse.cdt.codan.internal.checkers.FunctionResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Function cannot be resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.GotoStatementProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Goto statement used\\")"} +org.eclipse.cdt.codan.internal.checkers.InvalidArguments.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid arguments\\")"} +org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid template argument\\")"} +org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Label statement not found\\")"} +org.eclipse.cdt.codan.internal.checkers.MagicNumberProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MagicNumberProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Avoid magic numbers\\")",checkArray\=>true,checkOperatorParen\=>true,exceptions\=>(1,0,-1,2,1.0,0.0,-1.0)} +org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Member declaration not found\\")"} +org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Method cannot be resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.MissCaseProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MissCaseProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing cases in switch\\")"} +org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MissDefaultProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing default in switch\\")",defaultWithAllEnums\=>false} +org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MissReferenceProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing reference return value in assignment operator\\")"} +org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MissSelfCheckProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Missing self check in assignment operator\\")"} +org.eclipse.cdt.codan.internal.checkers.MultipleDeclarationsProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.MultipleDeclarationsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Multiple variable declaration\\")"} +org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Name convention for function\\")",pattern\=>"^[a-z]",macro\=>true,exceptions\=>()} +org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class has a virtual method and non-virtual destructor\\")"} +org.eclipse.cdt.codan.internal.checkers.OverloadProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid overload\\")"} +org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redeclaration\\")"} +org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redefinition\\")"} +org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"} +org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"} +org.eclipse.cdt.codan.internal.checkers.ShallowCopyProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.ShallowCopyProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Miss copy constructor or assignment operator\\")",onlynew\=>false} +org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Statement has no effect\\")",macro\=>true,exceptions\=>()} +org.eclipse.cdt.codan.internal.checkers.StaticVariableInHeaderProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.StaticVariableInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Static variable in header file\\")"} +org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suggested parenthesis around expression\\")",paramNot\=>false} +org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suspicious semicolon\\")",else\=>false,afterelse\=>false} +org.eclipse.cdt.codan.internal.checkers.SymbolShadowingProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.SymbolShadowingProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol shadowing\\")",paramFuncParameters\=>true} +org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Type cannot be resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused function declaration\\")",macro\=>true} +org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused static function\\")",macro\=>true} +org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")} +org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.UsingInHeaderProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Using directive in header\\")"} +org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem=-Error +org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Virtual method call in constructor/destructor\\")"} diff --git a/fw_old/.settings/org.eclipse.cdt.core.prefs b/fw_old/.settings/org.eclipse.cdt.core.prefs new file mode 100644 index 0000000..c8ec5df --- /dev/null +++ b/fw_old/.settings/org.eclipse.cdt.core.prefs @@ -0,0 +1,6 @@ +doxygen/doxygen_new_line_after_brief=true +doxygen/doxygen_use_brief_tag=false +doxygen/doxygen_use_javadoc_tags=true +doxygen/doxygen_use_pre_tag=false +doxygen/doxygen_use_structural_commands=false +eclipse.preferences.version=1 diff --git a/fw_old/.settings/stm32cubeide.project.prefs b/fw_old/.settings/stm32cubeide.project.prefs new file mode 100644 index 0000000..ae186d6 --- /dev/null +++ b/fw_old/.settings/stm32cubeide.project.prefs @@ -0,0 +1,3 @@ +8DF89ED150041C4CBC7CB9A9CAA90856=295E78E9D51884086204F31037537306 +DC22A860405A8BF2F2C095E5B6529F12=295E78E9D51884086204F31037537306 +eclipse.preferences.version=1 diff --git a/fw_old/Core/Inc/config.h b/fw_old/Core/Inc/config.h new file mode 100644 index 0000000..c512299 --- /dev/null +++ b/fw_old/Core/Inc/config.h @@ -0,0 +1,145 @@ +/* + * config.h + * + * Created on: Sep 5, 2021 + * Author: david + */ + +#ifndef INC_CONFIG_H_ +#define INC_CONFIG_H_ + +/* TODO: add comments to everything */ + +/* EXAMPLE of USAGE */ +/* +config_t new_config; +new_config.led_co2_alert_limit1 = 1000; +new_config.led_co2_alert_limit2 = 2000; +new_config.led_on = 1; +new_config.modbus_addr = 0x11; +config_write(&new_config); + +config_t config; +config_read(&config); +*/ + +#include "stdint.h" +#include "stm32l0xx.h" +/* DESCRIPTION OF THE DATA STRUCTURE */ +/* + * Data are divided into two groups: + * A) DEVICE DESCRIPTION + * Can not be changed by the user. + * These data can be only read. + * These data are: + * * VENDOR NAME + * * PRODUCT CODE + * * PRODUCT NAME + * * REVISION + * * SERIAL NUMBER + * B) DEVICE CONFIGURATION + * Can be changed by the user. + * These data are: + * * MODBUS ADDRESS - Modbus Address of the device. Default is 254 + * * LED ON - Whether the CO2 Level Indication LED should be on or off + * * LED CO2 ALERT LIMIT 1 - CO2 Level when the LED color changes Green<->Yellow + * * LED CO2 ALERT LIMIT 2 - CO2 Level when the LED color changes Yellow<->Red + * + * Device description data can be accessed using direct readout from the memory + * Device configuration data can be accessed using config_t struct. + */ +#define CONFIG_DEFAULT_LED_ON 1 +#define CONFIG_DEFAULT_LED_BRIGHTNESS 100 /* TODO: set according to the timers when this will be implemented */ +#define CONFIG_DEFAULT_LED_ALERT1_LIMIT 1500 +#define CONFIG_DEFAULT_LED_ALERT2_LIMIT 3000 +#define CONFIG_DEFAULT_LED_SMOOTH 0 +#define CONFIG_DEFAULT_SCD4x_T_OFFSET 0 +#define CONFIG_DEFAULT_BAUDRATE_INDEX 0 + +#define CONFIG_MODBUS_ADDR_LENGTH 2 +#define CONFIG_BAUDRATE_INDEX_LENGTH 2 +#define CONFIG_LED_ON_LENGTH 2 +#define CONFIG_LED_BRIGHTNESS_LENGTH 2 +#define CONFIG_LED_SMOOTH_LENGTH 2 +#define CONFIG_LED_ALERT1_LENGTH 2 +#define CONFIG_LED_ALERT2_LENGTH 2 +#define CONFIG_LED_ALERT2_LENGTH 2 +#define CONFIG_SCD4x_T_OFFSET_LENGTH 2 +#define VENDOR_NAME_LENGTH 64 +#define PRODUCT_CODE_LENGTH 64 +#define PRODUCT_NAME_LENGTH 64 +#define REVISION_LENGTH 16 +#define SERIAL_NUMBER_LENGTH 64 + +#define EEPROM_EMPTY_BYTE 0x00 + +#define EEPROM_ADDR_START ((uint32_t)0x08080000) +#define EEPROM_ADDR_END ((uint32_t)0x080801FF) + +#define CONFIG_EEPROM_ADDR_MODBUS_ADDR EEPROM_ADDR_START +#define CONFIG_EEPROM_ADDR_BAUDRATE_INDEX (CONFIG_EEPROM_ADDR_MODBUS_ADDR + CONFIG_MODBUS_ADDR_LENGTH) +#define CONFIG_EEPROM_ADDR_LED_ON (CONFIG_EEPROM_ADDR_BAUDRATE_INDEX + CONFIG_BAUDRATE_INDEX_LENGTH) +#define CONFIG_EEPROM_ADDR_LED_BRIGHTNESS (CONFIG_EEPROM_ADDR_LED_ON + CONFIG_LED_ON_LENGTH) +#define CONFIG_EEPROM_ADDR_LED_SMOOTH (CONFIG_EEPROM_ADDR_LED_BRIGHTNESS + CONFIG_LED_BRIGHTNESS_LENGTH) +#define CONFIG_EEPROM_ADDR_LED_ALERT1 (CONFIG_EEPROM_ADDR_LED_SMOOTH + CONFIG_LED_SMOOTH_LENGTH) +#define CONFIG_EEPROM_ADDR_LED_ALERT2 (CONFIG_EEPROM_ADDR_LED_ALERT1 + CONFIG_LED_ALERT1_LENGTH) +#define CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET (CONFIG_EEPROM_ADDR_LED_ALERT2 + CONFIG_LED_ALERT2_LENGTH) + +#define CONFIG_EEPROM_ADDR_VENDOR_NAME (CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET + CONFIG_SCD4x_T_OFFSET_LENGTH) +#define CONFIG_EEPROM_ADDR_PRODUCT_CODE (CONFIG_EEPROM_ADDR_VENDOR_NAME + VENDOR_NAME_LENGTH) +#define CONFIG_EEPROM_ADDR_PRODUCT_NAME (CONFIG_EEPROM_ADDR_PRODUCT_CODE + PRODUCT_CODE_LENGTH) +#define CONFIG_EEPROM_ADDR_REVISION (CONFIG_EEPROM_ADDR_PRODUCT_NAME + PRODUCT_NAME_LENGTH) +#define CONFIG_EEPROM_ADDR_SERIAL_NUMBER (CONFIG_EEPROM_ADDR_REVISION + REVISION_LENGTH) + +#define FLASH_PEKEY1 ((uint32_t)0x89ABCDEF) +#define FLASH_PEKEY2 ((uint32_t)0x02030405) + +#define CONFIG_OK 0 +#define CONFIG_ERROR -1 + +#define EEPROM_OK 0 +#define EEPROM_ERROR -1 +#define EEPROM_UNLOCK_ERROR -2 +#define EEPROM_LOCK_ERROR -3 +#define EEPROM_WRITE_ERROR -4 +#define EEPROM_ADDR_ERROR -5 + +#define SYSTICK_FREQ_HZ 12000000 +#define EEPROM_TIMEOUT_MAX_MS_INV 200 + +/* + * Variables + */ + +extern const uint32_t config_baudrates[]; +extern const uint8_t config_baudrates_length; + +/* + * Type definitions + */ + +typedef struct +{ + /* LED CONFIG */ + uint8_t led_on; + uint16_t led_brightness; + uint8_t led_smooth; + uint16_t led_co2_alert_limit1; + uint16_t led_co2_alert_limit2; + + /* SCD4x Temperature sensor offset */ + int16_t scd4x_t_offset; + + /* MODBUS CONFIG */ + uint16_t modbus_addr; + uint32_t baudrate_index; +} config_t; + + +/* const uint32_t baudrates [] = {19200, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400, 57600, 76800, 115200}; */ + +int8_t config_read(config_t *config); +int8_t config_write(config_t *config); + +#endif /* INC_CONFIG_H_ */ + diff --git a/fw_old/Core/Inc/crc8.h b/fw_old/Core/Inc/crc8.h new file mode 100644 index 0000000..e799f7e --- /dev/null +++ b/fw_old/Core/Inc/crc8.h @@ -0,0 +1,22 @@ +/* + * crc.h + * + * Created on: Jun 9, 2021 + * Author: user + */ + +#ifndef INC_CRC8_H_ +#define INC_CRC8_H_ + +#include "stdint.h" + +/* + * Definitions & macros + */ + +#define CRC8_POLYNOMIAL 0x31 +#define CRC8_INIT 0xFF + +uint8_t crc8_calculate(const uint8_t *data, uint16_t count); + +#endif /* INC_CRC8_H_ */ diff --git a/fw_old/Core/Inc/i2c.h b/fw_old/Core/Inc/i2c.h new file mode 100644 index 0000000..f346e68 --- /dev/null +++ b/fw_old/Core/Inc/i2c.h @@ -0,0 +1,46 @@ +/* + * i2c.h + * + * Created on: Jun 8, 2021 + * Author: user + */ + +#ifndef INC_I2C_H_ +#define INC_I2C_H_ + +#include "stdint.h" +#include "stm32l0xx_ll_i2c.h" + +/* + * Defines & macros + */ + +#define NULL 0 + +/* + * Return values for I2C functions + */ + +#define I2C_OK 0 +#define I2C_ERROR -1 // generic error +#define I2C_ERROR_NACK -2 // NACK was received during transfer +#define I2C_ERROR_TX_INCOMPLETE -3 // number of TXed bytes != buffer length +#define I2C_ERROR_RX_INCOMPLETE -4 // number of RXed bytes != buffer length + +/* + * Type definitions + */ + +typedef struct { + I2C_TypeDef *i2c; +} i2c_context_t; + +/* + * Function declarations + */ + +int i2c_init(i2c_context_t *context); +int i2c_transmit(uint8_t address, uint8_t *buffer, int len); +int i2c_receive(uint8_t address, uint8_t *buffer, int len); + +#endif /* INC_I2C_H_ */ diff --git a/fw_old/Core/Inc/main.h b/fw_old/Core/Inc/main.h new file mode 100644 index 0000000..a144a49 --- /dev/null +++ b/fw_old/Core/Inc/main.h @@ -0,0 +1,120 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2021 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l0xx_ll_i2c.h" +#include "stm32l0xx_ll_lpuart.h" +#include "stm32l0xx_ll_rcc.h" +#include "stm32l0xx_ll_crs.h" +#include "stm32l0xx_ll_bus.h" +#include "stm32l0xx_ll_system.h" +#include "stm32l0xx_ll_exti.h" +#include "stm32l0xx_ll_cortex.h" +#include "stm32l0xx_ll_utils.h" +#include "stm32l0xx_ll_pwr.h" +#include "stm32l0xx_ll_dma.h" +#include "stm32l0xx_ll_tim.h" +#include "stm32l0xx_ll_gpio.h" + +#if defined(USE_FULL_ASSERT) +#include "stm32_assert.h" +#endif /* USE_FULL_ASSERT */ + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "i2c.h" +#include "scd4x.h" +#include "sht4x.h" +#include "sps30.h" +#include "modbus.h" +#include "config.h" +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ +int8_t uart_disable_interrupts(void); +int8_t uart_enable_interrupts(void); + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define LED_B_Pin LL_GPIO_PIN_5 +#define LED_B_GPIO_Port GPIOA +#define LED_G_Pin LL_GPIO_PIN_6 +#define LED_G_GPIO_Port GPIOA +#define LED_R_Pin LL_GPIO_PIN_7 +#define LED_R_GPIO_Port GPIOA +#ifndef NVIC_PRIORITYGROUP_0 +#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority, + 4 bits for subpriority */ +#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority, + 3 bits for subpriority */ +#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority, + 2 bits for subpriority */ +#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority, + 1 bit for subpriority */ +#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority, + 0 bit for subpriority */ +#endif +/* USER CODE BEGIN Private defines */ +#define MEASUREMENT_PERIOD_MS 600000 + +extern uint16_t lpuart1_rx_message_index; +extern uint16_t lpuart1_rx_message_len; +extern uint8_t lpuart1_rx_done; +extern uint8_t lpuart1_rx_message_too_long; + +extern uint8_t tim21_elapsed_period; + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/fw_old/Core/Inc/modbus.h b/fw_old/Core/Inc/modbus.h new file mode 100644 index 0000000..a215328 --- /dev/null +++ b/fw_old/Core/Inc/modbus.h @@ -0,0 +1,181 @@ +/* + * modbus.h + * + * Created on: Jul 18, 2021 + * Author: user + * + * Modbus slave RTU library (does NOT support ASCII and TCP) + * + * Useful links: + * https://www.picotech.com/library/oscilloscopes/modbus-serial-protocol-decoding + * https://ipc2u.com/articles/knowledge-base/modbus-rtu-made-simple-with-detailed-descriptions-and-examples/ + * https://modbus.org/docs/Modbus_over_serial_line_V1_02.pdf + * https://www.modbus.org/docs/Modbus_Application_Protocol_V1_1b.pdf + * + * Note that byte order is big endian. + * + * USAGE: + * + * 1) Implement functions modbus_callback_function() and modbus_uart_transmit_function() + * - modbus_uart_transmit_function() sends data via UART + * - modbus_callback_function() does the real work: read sensors, set outputs... + * note that when filling buffers (e.g. input_registers[]) user must + * ensure that all data is big-endian + * These functions are implementation-specific. + * 2) Set device address (variable modbus_device_address); you can do this either + * - setting modbus_device_address directly (modbus.h needs to be included, duh) + * - using modbus_set_device_address(uint8_t address) function + * Or you can leave address as-is (MODBUS_DEFAULT_SLAVE_ADDRESS) and set it via + * Modbus during runtime + * 3) Call modbus_process_msg() after message reception; you need to observe Modbus RTU timing: + * - pauses between chars in frame are less or equal to 1.5 char + * - pauses between frames are at least 3.5 chars (of silence) + * For more information see section 2.5.1.1 (MODBUS Message RTU Framing) + * in "MODBUS over Serial Line: Specification and Implementation Guide" + * + */ + +#ifndef SRC_MODBUS_H_ +#define SRC_MODBUS_H_ + +#include "stdint.h" + +/* + * Defines & macros + */ + +#define MODBUS_BROADCAST_ADDR 0 +#define MODBUS_DEFAULT_SLAVE_ADDRESS 254 /* 255 may be used for bridge device */ +/* minimal frame length is 4 bytes: 1 B slave address, 1 B function code, 2 B CRC */ +#define MODBUS_MINIMAL_FRAME_LEN 4 +#define MODBUS_MAX_RTU_FRAME_SIZE 256 +#define MODBUS_BUFFER_SIZE MODBUS_MAX_RTU_FRAME_SIZE /* alias */ +#define MODBUS_ERROR_FLAG 0x80 +#define MODBUS_MAX_REGISTERS 125 + +/* + * Return values + */ + +#define MODBUS_OK 0 +#define MODBUS_ERROR -1 // generic error +#define MODBUS_ERROR_CRC -2 // checksum failed +#define MODBUS_ERROR_FRAME_INVALID -3 // invalid frame format / length +#define MODBUS_ERROR_OUT_OF_BOUNDS -4 // requested register is out of bounds +#define MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED -5 // function not implemented in callback +#define MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED -6 // register not implemented in callback + +/* + * Data types + */ + +/* Public functions codes (Modbus Application protocol specification, section 5.1) */ +typedef enum { + /* single bit access functions */ + MODBUS_READ_COILS = 1, + MODBUS_READ_DO = 1, // alias + MODBUS_READ_DISCRETE_INPUTS = 2, + MODBUS_READ_DI = 2, // alias + MODBUS_WRITE_SINGLE_COIL = 5, + MODBUS_WRITE_SINGLE_DO = 5, // alias + MODBUS_WRITE_MULTIPLE_COILS = 15, + MODBUS_WRITE_MULTIPLE_DO = 15, // alias + /* 16-bit access functions */ + MODBUS_READ_HOLDING_REGISTERS = 3, + MODBUS_READ_AO = 3, // alias + MODBUS_READ_INPUT_REGISTERS = 4, + MODBUS_READ_AI = 4, // alias + MODBUS_WRITE_SINGLE_REGISTER = 6, + MODBUS_WRITE_SINGLE_AO = 6, // alias + MODBUS_WRITE_MULTIPLE_REGISTERS = 16, + MODBUS_WRITE_MULTIPLE_AO = 16, // alias + MODBUS_MASK_WRITE_REGISTER = 22, + MODBUS_READ_WRITE_MULTIPLE_REGISTERS = 23, + MODBUS_READ_FIFO_QUEUE = 24, + /* file record access */ + MODBUS_READ_FILE_RECORD = 20, + MODBUS_WRITE_FILE_RECORD = 21, + /* diagnostics */ + MODBUS_READ_EXCEPTION_STATUS = 7, + MODBUS_DIAGNOSTIC = 8, /* sub codes: 00-18,20 */ + MODBUS_GET_COM_EVENT_COUNTER = 11, + MODBUS_GET_COM_EVENT_LOG = 12, + MODBUS_REPORT_SLAVE_ID = 17, + MODBUS_READ_DEVICE_IDENTIFICATION = 43, /* sub codes: 14 */ +} modbus_function_code_t; + +typedef enum { + MODBUS_EXCEPTION_ILLEGAL_FUNCTION = 1, + MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS = 2, + MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY = 2, + MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE = 3, + MODBUS_EXCEPTION_SLAVE_DEVICE_FAILURE = 4, + MODBUS_EXCEPTION_ACKNOWLEDGE = 5, + MODBUS_EXCEPTION_SLAVE_DEVICE_BUSY = 6, + MODBUS_EXCEPTION_MEMORY_PARITY_ERROR = 8, + MODBUS_EXCEPTION_GATEWAY_PATH_UNAVAILABLE = 10, + MODBUS_EXCEPTION_GATEWAY_TARGET_DEVICE_FAILED_TO_RESPOND = 11, +} modbus_exception_code_t; + +typedef struct { + uint8_t exception_code; +} exception_t; + +typedef struct { + modbus_function_code_t function_code : 8; + uint16_t register_address; // e.g. first register of A0: 0 + uint16_t register_number; // e.g. first register of A0: 40001 + uint8_t register_count; // number of registers to be read/written + + exception_t exception; + + union { + uint8_t buffer8b[MODBUS_MAX_RTU_FRAME_SIZE]; + uint16_t buffer16b[MODBUS_MAX_RTU_FRAME_SIZE/2]; + uint16_t input_registers[MODBUS_MAX_REGISTERS]; + uint16_t holding_registers[MODBUS_MAX_REGISTERS]; + int16_t input_registers_signed[MODBUS_MAX_REGISTERS]; + int16_t holding_registers_signed[MODBUS_MAX_REGISTERS]; + }; +} modbus_transaction_t; + +typedef enum { + MODBUS_DO_START_NUMBER = 1, // Discrete output coils + MODBUS_DO_END_NUMBER = 9999, + MODBUS_DI_START_NUMBER = 10001, // Discrete input contacts + MODBUS_DI_END_NUMBER = 19999, + MODBUS_AI_START_NUMBER = 30001, // Analog input registers + MODBUS_AI_END_NUMBER = 39999, + MODBUS_AO_START_NUMBER = 40001, // Analog output (holding registers) + MODBUS_AO_END_NUMBER = 49999 +} modbus_register_number_t; + + +/* + * Global variables + */ + +/* device address: declared in modbus.c */ +extern uint8_t modbus_slave_address; + +/* shared modbus buffer; defined in modbus.c; may be used elsewhere in code */ +extern uint8_t modbus_buffer[]; + +/* + * Function prototypes + */ + +/* process message: should be called in when modbus message was received (e.g. in main.c) + * modbus_process_msg() may call following functions: + * - modbus_callback_function() if data readout is requested + * - modbus_uart_transmit_function() if response is required + * Both functions have to be implemented by user. + */ +int8_t modbus_slave_process_msg(const uint8_t *buffer, int len); +int8_t modbus_slave_set_address(uint8_t address); +/* modbus callback function type - should be implemented by user (e.g. in main.c) */ +int8_t modbus_slave_callback(modbus_transaction_t *transaction); +/* UART transmit function type - should be implemented by user (e.g. in main.c) */ +int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len); + +#endif /* SRC_MODBUS_H_ */ diff --git a/fw_old/Core/Inc/scd4x.h b/fw_old/Core/Inc/scd4x.h new file mode 100644 index 0000000..921f9ee --- /dev/null +++ b/fw_old/Core/Inc/scd4x.h @@ -0,0 +1,57 @@ +/* + * sht4x.h + * + * Created on: Jun 8, 2021 + * Author: user + */ + +#ifndef INC_SCD4X_H_ +#define INC_SCD4X_H_ + +#include "stdint.h" +#include "stm32l0xx_ll_i2c.h" +#include "stm32l0xx_ll_utils.h" +#include "i2c.h" +#include "crc8.h" + +/* + * Defines & macros + */ + +#define SCD4X_I2C_ADDRESS 0x62 + +/* + * Return values + */ + +#define SCD4X_OK 0 +#define SCD4X_ERROR -1 // generic error +#define SCD4X_CRC8_ERROR -2 // checksum failed + +/* + * Data types + */ + +typedef enum { + SCD4X_START_PERIODIC_MEASUREMENT = 0x21B1, + SCD4X_READ_MEASUREMENT = 0xEC05, + SCD4X_STOP_PERIODIC_MEASUREMENT = 0x3F86, + SCD4X_GET_DATA_READY_STATUS = 0xe4b8, + SCD4X_PERFORM_FACTORY_RESET = 0x3632 +} scd4x_cmd_t; + +/* + * Function prototypes + */ + +int8_t scd4x_send_cmd(scd4x_cmd_t cmd); +int8_t scd4x_read_data(uint8_t *buffer, int len); + +int8_t scd4x_start_periodic_measurement( void ); +int8_t scd4x_stop_periodic_measurement( void ); + +int8_t scd4x_perform_factory_reset( void ); + +int8_t scd4x_read_measurement(uint16_t * co2, int16_t *temperature, uint16_t *relative_humidity); + +#endif /* INC_SCD4X_H_ */ diff --git a/fw_old/Core/Inc/sht4x.h b/fw_old/Core/Inc/sht4x.h new file mode 100644 index 0000000..36c4351 --- /dev/null +++ b/fw_old/Core/Inc/sht4x.h @@ -0,0 +1,57 @@ +/* + * sht4x.h + * + * Created on: Jun 8, 2021 + * Author: user + */ + +#ifndef INC_SHT4X_H_ +#define INC_SHT4X_H_ + +#include "stdint.h" +#include "stm32l0xx_ll_i2c.h" +#include "stm32l0xx_ll_utils.h" +#include "i2c.h" +#include "crc8.h" + +/* + * Defines & macros + */ + +#define SHT4X_I2C_ADDRESS 0x44 + +/* + * Return values + */ + +#define SHT4X_OK 0 +#define SHT4X_ERROR -1 // generic error +#define SHT4X_CRC8_ERROR -2 // checksum failed + +/* + * Data types + */ + +typedef enum { + SHT4X_START_MEAS_HIGH_PRECISION = 0xFD, + SHT4X_START_MEAS_MEDIUM_PRECISION = 0xF6, + SHT4X_START_MEAS_LOW_PRECISION = 0xE0, + SHT4X_READ_SERIAL = 0x89, + SHT4X_SOFT_RESET = 0x94, + SHT4X_HEATER_200_mW_1_s = 0x39, + SHT4X_HEATER_200_mW_01_s = 0x32, + SHT4X_HEATER_110_mW_1_s = 0x2F, + SHT4X_HEATER_110_mW_01_s = 0x24, + SHT4X_HEATER_20_mW_1_s = 0x1E, + SHT4X_HEATER_20_mW_01_s = 0x15 +} sht4x_cmd_t; + +/* + * Function prototypes + */ + +int8_t sht4x_send_cmd(sht4x_cmd_t cmd); +int8_t sht4x_read_data(uint8_t *buffer, int len); +int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity); + +#endif /* INC_SHT4X_H_ */ diff --git a/fw_old/Core/Inc/sps30.h b/fw_old/Core/Inc/sps30.h new file mode 100644 index 0000000..9ca3c45 --- /dev/null +++ b/fw_old/Core/Inc/sps30.h @@ -0,0 +1,78 @@ +/* + * sps30.h + * + * Created on: Jul 18, 2021 + * Author: mrs + */ + +#ifndef INC_SPS30_H_ +#define INC_SPS30_H_ + +#include "stdint.h" +#include "stm32l0xx_ll_i2c.h" +#include "stm32l0xx_ll_utils.h" +#include "i2c.h" +#include "crc8.h" + +/* + * Defines & macros + */ + +#define SPS30_I2C_ADDRESS 0x69 + +/* + * Return values + */ + +#define SPS30_OK 0 +#define SPS30_ERROR -1 // generic error +#define SPS30_CRC8_ERROR -2 // checksum failed + +/* + * Data types + */ + +typedef enum { + SPS30_START_MEASUREMENT = 0x0010, + SPS30_STOP_MEASUREMENT = 0x0104, + SPS30_READ_DATA_READY_FLAG = 0x0202, + SPS30_READ_MEASURED_VALUES = 0x0300, + SPS30_SLEEP = 0x1001, + SPS30_WAKE_UP = 0x1103, + SPS30_START_FAN_CLEANING = 0x5607, + SPS30_READ_AUTO_CLEANING_INTERVAL = 0x8004, + SPS30_WRITE_AUTO_CLEANING_INTERVAL = 0x8004, + SPS30_READ_PRODUCT_TYPE = 0xD002, + SPS30_READ_SERIAL_NUMBER = 0xD033, + SPS30_READ_VERSION = 0xD100, + SPS30_READ_DEVICE_STATUS_REGISTER = 0xD206, + SPS30_CLEAR_DEVICE_STATUS_REGISTER = 0xD210, + SPS30_RESET = 0xD304 + +} sps30_cmd_t; + +typedef enum { + SPS30_FLOAT_FORMAT = 0x03, + SPS30_UINT16_FORMAT = 0x05 +} sps30_data_format; + +int8_t sps30_send_cmd(sps30_cmd_t cmd); + +int8_t sps30_start_measurement( void ); +int8_t sps30_stop_measurement( void ); +int8_t sps30_read_measured_values(uint16_t *measured_values, uint8_t measured_values_len); + +int8_t sps30_sleep( void ); +int8_t sps30_wake_up( void ); + +int8_t sps30_start_fan_cleaning( void ); + +int8_t sps30_reset( void ); + +int8_t sps30_read_status_register ( void ); + +int8_t sps30_read_firmware_version ( uint8_t * fw_ver_hi, uint8_t * fw_ver_lo ); + +uint8_t calculate_crc(uint8_t data[2]); + +#endif /* INC_SPS30_H_ */ diff --git a/fw_old/Core/Inc/stm32_assert.h b/fw_old/Core/Inc/stm32_assert.h new file mode 100644 index 0000000..ca09699 --- /dev/null +++ b/fw_old/Core/Inc/stm32_assert.h @@ -0,0 +1,53 @@ +/** + ****************************************************************************** + * @file stm32_assert.h + * @brief STM32 assert file. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2018 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32_ASSERT_H +#define __STM32_ASSERT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Includes ------------------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32_ASSERT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/fw_old/Core/Inc/stm32l0xx_it.h b/fw_old/Core/Inc/stm32l0xx_it.h new file mode 100644 index 0000000..e4fecd6 --- /dev/null +++ b/fw_old/Core/Inc/stm32l0xx_it.h @@ -0,0 +1,65 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l0xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2021 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L0xx_IT_H +#define __STM32L0xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void SVC_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +void TIM21_IRQHandler(void); +void LPUART1_IRQHandler(void); +/* USER CODE BEGIN EFP */ +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L0xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/fw_old/Core/Src/config.c b/fw_old/Core/Src/config.c new file mode 100644 index 0000000..08f6112 --- /dev/null +++ b/fw_old/Core/Src/config.c @@ -0,0 +1,243 @@ +/* + * config.c + * + * Created on: Sep 5, 2021 + * Author: david + */ + +#include "config.h" + +/* + * Variables + */ +/* Baudrates - STM32L0xx can do baudrates from 1200 to 115200 + * - default value has index 0 */ +const uint32_t config_baudrates[] = { + 19200, // 0 + 4800, // 1 + 9600, // 2 + 14400, // 3 + 19200, // 4 + 28800, // 5 + 38400, // 6 + 57600, // 7 + 76800, // 8 + 115200 // 9 +}; +const uint8_t config_baudrates_length = 10; + +/* Function to lock the EEPROM */ +static int8_t eeprom_lock(void); +/* Function to unlock the EEPROM */ +static int8_t eeprom_unlock(void); +/* Function to write one byte to the EEPROM */ +/* IMPORTANT: EEPROM must be unlocked first */ +static int8_t eeprom_program_byte(uint32_t addr, uint8_t ee_data); +/* Function to write two bytes to the EEPROM */ +/* IMPORTANT: EEPROM must be unlocked first */ +static int8_t eeprom_program_halfword(uint32_t addr, uint16_t ee_data); +/* Function to write four bytes to the EEPROM */ +/* IMPORTANT: EEPROM must be unlocked first */ +static int8_t eeprom_program_word(uint32_t addr, uint32_t ee_data); + +int8_t config_read(config_t *config) +{ + config->modbus_addr = *(uint16_t *) (CONFIG_EEPROM_ADDR_MODBUS_ADDR); + config->baudrate_index = *(uint16_t *) (CONFIG_EEPROM_ADDR_BAUDRATE_INDEX); + config->led_on = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ON); + config->led_brightness = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_BRIGHTNESS); + config->led_smooth = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_SMOOTH); + config->led_co2_alert_limit1 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT1); + config->led_co2_alert_limit2 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT2); + config->scd4x_t_offset = *(int16_t *) (CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET); + + /* Check if the EEPROM is initialized - do not check: + * LED ON + * LED SMOOTH + * SCD4x T OFFSET + * BAUDRATE INDEX + * those can be 0 */ + if ((config->modbus_addr == EEPROM_EMPTY_BYTE) || + (config->led_co2_alert_limit1 == EEPROM_EMPTY_BYTE) || + (config->led_co2_alert_limit2 == EEPROM_EMPTY_BYTE) || + (config->led_brightness == EEPROM_EMPTY_BYTE)) + { + return CONFIG_ERROR; + } + return CONFIG_OK; +} + +int8_t config_write(config_t *config) +{ + /* Unlock the EEPROM */ + if (eeprom_unlock() != EEPROM_OK) + { + return EEPROM_UNLOCK_ERROR; + } + /* Reset the ERASE and DATA bits in the FLASH_PECR register to disable any residual erase */ + FLASH->PECR = FLASH->PECR & ~(FLASH_PECR_ERASE | FLASH_PECR_DATA); + + /* Write MODBUS ADDRESS */ + if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_MODBUS_ADDR, config->modbus_addr) != EEPROM_OK) + { + return EEPROM_WRITE_ERROR; + } + /* Write BAUDRATE */ + if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_BAUDRATE_INDEX, config->baudrate_index) != EEPROM_OK) + { + return EEPROM_WRITE_ERROR; + } + + /* Write LED ON */ + if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_ON, config->led_on) != EEPROM_OK) + { + return EEPROM_WRITE_ERROR; + } + + /* Write LED BRIGHTNESS */ + if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_BRIGHTNESS, config->led_brightness) != EEPROM_OK) + { + return EEPROM_WRITE_ERROR; + } + + /* Write LED SMOOTH */ + if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_SMOOTH, config->led_smooth) != EEPROM_OK) + { + return EEPROM_WRITE_ERROR; + } + + /* Write LED CO2 ALERT LIMIT 1 */ + if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT1, config->led_co2_alert_limit1) != EEPROM_OK) + { + return EEPROM_WRITE_ERROR; + } + + /* Write LED CO2 ALERT LIMIT 2 */ + if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT2, config->led_co2_alert_limit2) != EEPROM_OK) + { + return EEPROM_WRITE_ERROR; + } + + /* Write LED SCD4x TEMPERATURE OFFSET */ + if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET, config->scd4x_t_offset) != EEPROM_OK) + { + return EEPROM_WRITE_ERROR; + } + + /* Lock EEPROM*/ + if (eeprom_lock() != EEPROM_OK) + { + return EEPROM_LOCK_ERROR; + } + return CONFIG_OK; +} + +static int8_t eeprom_lock(void) +{ + uint32_t tick_start = SysTick->VAL; + while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */ + { + /* Timeout test */ + /* The maximum writing time is 3.94ms (half-word) */ + uint32_t tick_last = SysTick->VAL; + uint32_t tick_diff; + if (tick_start <= tick_last) + { + tick_diff = tick_last - tick_start; + } else + { + tick_diff = (0xFFFFFFFF - tick_last) + tick_start; + } + + /* If the time difference is more than 5ms */ + if (tick_diff >= (uint32_t)((uint32_t)SYSTICK_FREQ_HZ*(uint32_t)EEPROM_TIMEOUT_MAX_MS_INV)) + { + return EEPROM_LOCK_ERROR; + } + } + + FLASH->PECR = FLASH->PECR & ~(FLASH_PECR_ERRIE | FLASH_PECR_EOPIE); /* disable flash interrupts */ + FLASH->PECR = FLASH->PECR | FLASH_PECR_PELOCK; /* Lock memory with PELOCK */ + + return EEPROM_OK; +} + +static int8_t eeprom_unlock(void) +{ + uint32_t tick_start = SysTick->VAL; + while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */ + { + /* Timeout test */ + /* The maximum writing time is 3.94ms (half-word) */ + uint32_t tick_last = SysTick->VAL; + uint32_t tick_diff; + if (tick_start <= tick_last) + { + tick_diff = tick_last - tick_start; + } else + { + tick_diff = (0xFFFFFFFF - tick_last) + tick_start; + } + + /* If the time difference is more than 5ms */ + if (tick_diff >= (uint32_t)((uint32_t)SYSTICK_FREQ_HZ*(uint32_t)EEPROM_TIMEOUT_MAX_MS_INV)) + { + return EEPROM_UNLOCK_ERROR; + } + } + if ((FLASH->PECR & FLASH_PECR_PELOCK) != 0) /* If PELOCK is locked */ + { + /* Unlock PELOCK */ + FLASH->PEKEYR = FLASH_PEKEY1; /* PEKEY1 */ + FLASH->PEKEYR = FLASH_PEKEY2; /* PEKEY2 */ + } + FLASH->PECR = FLASH->PECR | (FLASH_PECR_ERRIE | FLASH_PECR_EOPIE); /* enable flash interrupts */ + return EEPROM_OK; +} + +static int8_t eeprom_program_byte(uint32_t addr, uint8_t ee_data) +{ + if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 1)) + { + *(uint8_t *)(addr) = ee_data; /* write data to EEPROM */ + if (*(uint8_t *)(addr) != ee_data) + { + return EEPROM_WRITE_ERROR; + } + return EEPROM_OK; + } else + { + return EEPROM_ADDR_ERROR; + } +} +static int8_t eeprom_program_halfword(uint32_t addr, uint16_t ee_data) +{ + if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 2)) + { + *(uint16_t *)(addr) = ee_data; /* write data to EEPROM */ + if (*(uint16_t *)(addr) != ee_data) + { + return EEPROM_WRITE_ERROR; + } + return EEPROM_OK; + } else + { + return EEPROM_ADDR_ERROR; + } +} + +static int8_t eeprom_program_word(uint32_t addr, uint32_t ee_data) +{ + if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 4)) + { + *(uint32_t *)(addr) = ee_data; /* write data to EEPROM */ + if (*(uint32_t *)(addr) != ee_data) + { + return EEPROM_WRITE_ERROR; + } + return EEPROM_OK; + } else + { + return EEPROM_ADDR_ERROR; + } +} diff --git a/fw_old/Core/Src/crc8.c b/fw_old/Core/Src/crc8.c new file mode 100644 index 0000000..312cdf4 --- /dev/null +++ b/fw_old/Core/Src/crc8.c @@ -0,0 +1,28 @@ +/* + * crc.c + * + * Created on: Jun 9, 2021 + * Author: user + */ + +#include "crc8.h" + +/* Stolen from Sensirion SCD4x datasheet, section 3.11 */ +uint8_t crc8_calculate(const uint8_t *data, uint16_t count) +{ + uint16_t current_byte; + uint8_t crc = CRC8_INIT; + uint8_t crc_bit; + /* calculates 8-Bit checksum with given polynomial */ + for (current_byte = 0; current_byte < count; ++current_byte) { + crc ^= (data[current_byte]); + for(crc_bit = 8; crc_bit > 0; --crc_bit) { + if (crc & 0x80) { + crc =(crc << 1) ^ CRC8_POLYNOMIAL; + } else { + crc = (crc << 1); + } + } + } + return crc; +} diff --git a/fw_old/Core/Src/i2c.c b/fw_old/Core/Src/i2c.c new file mode 100644 index 0000000..07aeaaf --- /dev/null +++ b/fw_old/Core/Src/i2c.c @@ -0,0 +1,78 @@ +/* + * i2c.c + * + * Created on: Jun 8, 2021 + * Author: user + */ + +#include "i2c.h" +#include "stm32l0xx_ll_lpuart.h" + +i2c_context_t *i2c_context; + +int i2c_init(i2c_context_t *context) +{ + if (context == NULL) { + return I2C_ERROR; + } + i2c_context = context; + return I2C_OK; +} + +int i2c_transmit(uint8_t address, uint8_t *buffer, int len) +{ + /* prevent interrupts during I2C communication (e.g. collision with MODBUS) */ +// LL_LPUART_Disable(LPUART1); +// LL_LPUART_DisableIT_RXNE(LPUART1); +// __disable_irq(); + LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len, + LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_WRITE); + int i = 0; + // Autoend mode will raise STOP flag if NACK is detected + // (or if desired number of bytes is transmitted) + while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) { + if (LL_I2C_IsActiveFlag_TXE(i2c_context->i2c)) { + if (i < len) { + LL_I2C_TransmitData8(i2c_context->i2c, buffer[i++]); + } + } + } + LL_I2C_ClearFlag_STOP(i2c_context->i2c); + if (LL_I2C_IsActiveFlag_NACK(i2c_context->i2c)) { + return I2C_ERROR_NACK; + } + if (len != i) { + // this will probably never happen, as NACK flag + // is raised everytime len != number of TXed bytes + return I2C_ERROR_TX_INCOMPLETE; + } +// __enable_irq(); +// LL_LPUART_Enable(LPUART1); +// LL_LPUART_EnableIT_RXNE(LPUART1); + return I2C_OK; +} + +int i2c_receive(uint8_t address, uint8_t *buffer, int len) +{ +// __disable_irq(); +// LL_LPUART_Disable(LPUART1); +// LL_LPUART_DisableIT_RXNE(LPUART1); + LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len, + LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_READ); + int i = 0; + while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) { + if (LL_I2C_IsActiveFlag_RXNE(i2c_context->i2c)) { + if (i < len) { + buffer[i++] = LL_I2C_ReceiveData8(i2c_context->i2c); + } + } + } + LL_I2C_ClearFlag_STOP(i2c_context->i2c); + if (len != i) { + return I2C_ERROR_RX_INCOMPLETE; + } +// __enable_irq(); +// LL_LPUART_Enable(LPUART1); +// LL_LPUART_EnableIT_RXNE(LPUART1); + return I2C_OK; // TODO error detection +} diff --git a/fw_old/Core/Src/main.c b/fw_old/Core/Src/main.c new file mode 100644 index 0000000..23f6270 --- /dev/null +++ b/fw_old/Core/Src/main.c @@ -0,0 +1,827 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2021 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE BEGIN PV */ +/* + * BASE CLOCK 12MHz + * Desired interrupt period 60s + */ +const uint16_t tim21_prescaler = 60000-1; // 100Hz +//const uint16_t tim21_period = 12000-1; // 60s +const uint16_t tim21_period = 1200-1; // 6s +//const uint16_t tim21_period = 200-1; // 1s + +/* Input register memory map + * (All registers are 16-bit) + * ------------------------- + * + * 30010 : CO2 [ppm] Unsigned value in range [0,40000] + * 30011 : T [deg_C * 10] From SHT4x; unsigned value in range [0; 1250]; e.g. 21.5 C => 215 + * 30012 : RH [%] From SHT4x; unsigned value in range [0; 100] + * + * Backup T and RH sensor: + * 30013 : T [deg_C * 10] From SCD4x; unsigned value in range [0; 600]; e.g. 21.5 C => 215 + * 30014 : RH [%] From SCD4x; unsigned value in range [0; 100] + * + * Extended temperature range (signed values): + * 30015 : T [deg_C * 10] From SHT4x; signed value (two's complement) in range [-400;1250] + * 30016 : T [deg_C * 10] From SCD4x; signed value (two's complement) in range [-100;600]; e.g. -12.3 C => -123 + * + */ +/* Input registers memory map implementation */ +enum +{ + REGISTER_NUM_CO2 = 30010, + REGISTER_NUM_T_SHT4x = 30011, + REGISTER_NUM_RH_SHT4x = 30012, + REGISTER_NUM_T_SCD4x = 30013, + REGISTER_NUM_RH_SCD4x = 30014, + REGISTER_NUM_T_SHT4x_SIGNED = 30015, + REGISTER_NUM_T_SCD4x_SIGNED = 30016 +} data_registers_numbers; + +enum +{ + REGISTER_NUM_LED_ON = 40001, + REGISTER_NUM_LED_BRIGHTNESS = 40002, + REGISTER_NUM_LED_SMOOTH = 40003, + REGISTER_NUM_CO2_ALERT_LIMIT1 = 40004, + REGISTER_NUM_CO2_ALERT_LIMIT2 = 40005, + REGISTER_NUM_SCD4x_T_OFFSET = 40006, + REGISTER_NUM_MODBUS_ADDR = 40007, + REGISTER_NUM_BAUDRATE = 40008 +} config_registers_numbers; + +enum +{ + REGISTER_NUM_VENDOR_NAME = 30010, + REGISTER_NUM_PRODUCT_CODE = 30011, + REGISTER_NUM_REVISION = 30012, + REGISTER_NUM_PRODUCT_NAME = 30013, + REGISTER_NUM_SERIAL_NUMBER = 30014 +} identification_registers_numbers; + +/* Variables to store the measured data */ +int CO2, T_SCD4x, RH_SCD4x; +int T_SHT4x, RH_SHT4x; +uint16_t sps30_measured_data[10]; + +/* Struct to store the sensor config */ +config_t sensor_config; +uint8_t sensor_config_pending_write = 0; +uint8_t baudrate_changed = 0; +uint8_t modbus_address_changed = 0; +uint8_t co2_valid = 0; +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_I2C1_Init(void); +static void MX_LPUART1_UART_Init(void); +static void MX_TIM21_Init(void); +/* USER CODE BEGIN PFP */ +void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len); +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG); + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); + + /* System interrupt init*/ + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + /* Read config from EEPROM - if unsuccessful, set the default values*/ + int8_t config_read_status = config_read(&sensor_config); + if (config_read_status != CONFIG_OK) + { + sensor_config.modbus_addr = MODBUS_DEFAULT_SLAVE_ADDRESS; + sensor_config.led_co2_alert_limit1 = CONFIG_DEFAULT_LED_ALERT1_LIMIT; + sensor_config.led_co2_alert_limit2 = CONFIG_DEFAULT_LED_ALERT2_LIMIT; + sensor_config.led_on = CONFIG_DEFAULT_LED_ON; + sensor_config.led_brightness = CONFIG_DEFAULT_LED_BRIGHTNESS; + sensor_config.led_smooth = CONFIG_DEFAULT_LED_SMOOTH; + sensor_config.scd4x_t_offset = CONFIG_DEFAULT_SCD4x_T_OFFSET; + sensor_config.baudrate_index = CONFIG_DEFAULT_BAUDRATE_INDEX; + } + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_I2C1_Init(); + MX_LPUART1_UART_Init(); + MX_TIM21_Init(); + /* USER CODE BEGIN 2 */ + + /* Turn on MAGENTA LED to signal startup state */ + LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); + LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin); + LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin); + + /* Enable I2C for sensors */ + LL_I2C_Enable(I2C1); + + + /* Set the modbus address */ + modbus_slave_set_address(sensor_config.modbus_addr); + + /* Enable UART for RS485 */ + LL_LPUART_Enable(LPUART1); + + /* Start the timer for measurement triggering */ + LL_TIM_EnableCounter(TIM21); + LL_TIM_EnableIT_UPDATE(TIM21); + + /* I2C context init (for SHT4x and SCD4x) */ + i2c_context_t i2c_context; + i2c_context.i2c = I2C1; + i2c_init(&i2c_context); + + scd4x_start_periodic_measurement(); + uint8_t scd4x_is_connected = 1; + uint8_t sps30_is_connected = 0; + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + /*uint8_t scd4x_is_connected = 0; + if (scd4x_start_periodic_measurement() == SCD4X_OK) + { + scd4x_is_connected = 1; + }*/ + + /* Attempt to start SPS30 measurement and check if it's connected */ + /*sps30_reset(); + uint8_t sps30_is_connected = 0; + if (sps30_start_measurement() == SPS30_OK) + { + sps30_is_connected = 1; + }*/ + + /* Wait 1000ms for sensors initialization */ + /* SHT4x Init Time: max 1 ms (datasheet pg. 8) */ + /* SCD4x Init Time: max 1000 ms (datasheet pg. 6) */ + /* SPS30 Init Time: max 30000 ms (datasheet pg. 2) */ + LL_mDelay(1000); + + static uint32_t new_baud; + + /* Enter the main loop */ + while (1) + { + if (lpuart1_rx_done == 1) + { + /* Process the message */ + if (lpuart1_rx_message_too_long) + { + /* Do nothing, just delete the buffer and set the flag back to zero*/ + lpuart1_rx_message_too_long = 0; + } else + { + /* Process the message: + * message is stored in modbus_buffer[], no copying necessary; + * but we need to make sure that modbus_buffer[] will not be used while + * processing the message: this can be done by disabling RX interrupt */ + LL_LPUART_DisableIT_RXNE(LPUART1); + modbus_slave_process_msg(modbus_buffer, lpuart1_rx_message_len); + /* Reset the RX DONE flag */ + lpuart1_rx_done = 0; + LL_LPUART_EnableIT_RXNE(LPUART1); + } + /* Reset the RX DONE flag */ + lpuart1_rx_done = 0; + } + /* if config changed (MODBUS write), reflect changes to EEPROM */ + if (sensor_config_pending_write) { + config_write(&sensor_config); + sensor_config_pending_write = 0; + } + if (modbus_address_changed) + { + modbus_slave_set_address(sensor_config.modbus_addr); + modbus_address_changed = 0; + } + if (baudrate_changed) + { + while (!LL_LPUART_IsActiveFlag_TXE(LPUART1)); + uart_disable_interrupts(); +// LL_LPUART_Disable(LPUART1); +// LL_LPUART_DisableIT_IDLE(LPUART1); +// LL_LPUART_EnableIT_RXNE(LPUART1); + + LL_LPUART_SetBaudRate(LPUART1, SYSTICK_FREQ_HZ, config_baudrates[sensor_config.baudrate_index]); + +// LL_LPUART_Enable(LPUART1); +// LL_LPUART_EnableIT_IDLE(LPUART1); +// LL_LPUART_EnableIT_RXNE(LPUART1); + uart_enable_interrupts(); + LL_LPUART_EnableDirectionRx(LPUART1); + LL_LPUART_EnableDirectionTx(LPUART1); + baudrate_changed = 0; + + new_baud = LL_LPUART_GetBaudRate(LPUART1, SYSTICK_FREQ_HZ); + } + + /* It is time for measurement */ + if (tim21_elapsed_period == 1) + { + /* TODO: Check the data */ + /* Read SHT4x data (always connected) */ + sht4x_measure(&T_SHT4x, &RH_SHT4x); + + /* Read SCD4x data (if connected) */ + if (scd4x_is_connected == 1) + { + scd4x_read_measurement(&CO2, + &T_SCD4x, + &RH_SCD4x); + if (CO2 > 0) { + co2_valid = 1; + } else { + co2_valid = 0; + } + } + + /* Read SPS30 data (if connected) */ + if (sps30_is_connected == 1) + { + sps30_read_measured_values(sps30_measured_data, 10); + } + /* TODO: Process data and light a desired color of LED */ + /* TODO: Add hystheresis */ + + /* Reset the TIM21 Elapsed Period Flag */ + tim21_elapsed_period = 0; + } + /* TEST END */ + if (sensor_config.led_on) { + if (co2_valid == 1) { + if (CO2 <= sensor_config.led_co2_alert_limit1) { + /* CO2 is OK -> GREEN */ + LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin); + LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin); + LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); + + } else if ((sensor_config.led_co2_alert_limit1 < CO2) && (CO2 <= sensor_config.led_co2_alert_limit2)) { + /* CO2 is NOT OK -> YELLOW */ + LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); + LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin); + LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); + + } else if (sensor_config.led_co2_alert_limit2 < CO2) { + /* CO2 is CRITICAL -> RED */ + LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); + LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); + LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); + } + } else { + + LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); + LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); + LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin); + } + + } else { + LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin); + LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); + LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); + } + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_0); + while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_0) + { + } + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + LL_RCC_HSI_Enable(); + + /* Wait till HSI is ready */ + while(LL_RCC_HSI_IsReady() != 1) + { + + } + LL_RCC_HSI_SetCalibTrimming(16); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLL_MUL_3, LL_RCC_PLL_DIV_4); + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + + LL_Init1msTick(12000000); + + LL_SetSystemCoreClock(12000000); + LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1); + LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1); +} + +/** + * @brief I2C1 Initialization Function + * @param None + * @retval None + */ +static void MX_I2C1_Init(void) +{ + + /* USER CODE BEGIN I2C1_Init 0 */ + + /* USER CODE END I2C1_Init 0 */ + + LL_I2C_InitTypeDef I2C_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); + /**I2C1 GPIO Configuration + PA9 ------> I2C1_SCL + PA10 ------> I2C1_SDA + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_9; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; + GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; + GPIO_InitStruct.Alternate = LL_GPIO_AF_1; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_10; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; + GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; + GPIO_InitStruct.Alternate = LL_GPIO_AF_1; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1); + + /* USER CODE BEGIN I2C1_Init 1 */ + + /* USER CODE END I2C1_Init 1 */ + /** I2C Initialization + */ + LL_I2C_EnableAutoEndMode(I2C1); + LL_I2C_DisableOwnAddress2(I2C1); + LL_I2C_DisableGeneralCall(I2C1); + LL_I2C_EnableClockStretching(I2C1); + I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C; + I2C_InitStruct.Timing = 0x40000A0B; + I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; + I2C_InitStruct.DigitalFilter = 0; + I2C_InitStruct.OwnAddress1 = 0; + I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK; + I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; + LL_I2C_Init(I2C1, &I2C_InitStruct); + LL_I2C_SetOwnAddress2(I2C1, 0, LL_I2C_OWNADDRESS2_NOMASK); + /* USER CODE BEGIN I2C1_Init 2 */ + /* USER CODE END I2C1_Init 2 */ + +} + +/** + * @brief LPUART1 Initialization Function + * @param None + * @retval None + */ +static void MX_LPUART1_UART_Init(void) +{ + + /* USER CODE BEGIN LPUART1_Init 0 */ + + /* USER CODE END LPUART1_Init 0 */ + + LL_LPUART_InitTypeDef LPUART_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1); + + LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); + LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB); + /**LPUART1 GPIO Configuration + PA0-CK_IN ------> LPUART1_RX + PA1 ------> LPUART1_TX + PB1 ------> LPUART1_DE + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_0; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_1; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_1; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_4; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* LPUART1 interrupt Init */ + NVIC_SetPriority(LPUART1_IRQn, 0); + NVIC_EnableIRQ(LPUART1_IRQn); + + /* USER CODE BEGIN LPUART1_Init 1 */ + + /* USER CODE END LPUART1_Init 1 */ + LPUART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index]; + LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_9B; + LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1; + LPUART_InitStruct.Parity = LL_LPUART_PARITY_EVEN; + LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX; + LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE; + LL_LPUART_Init(LPUART1, &LPUART_InitStruct); + LL_LPUART_EnableDEMode(LPUART1); + LL_LPUART_SetDESignalPolarity(LPUART1, LL_LPUART_DE_POLARITY_HIGH); + LL_LPUART_SetDEAssertionTime(LPUART1, 0); + LL_LPUART_SetDEDeassertionTime(LPUART1, 0); + /* USER CODE BEGIN LPUART1_Init 2 */ + + /* Enable IDLE Interrupt */ + LL_LPUART_EnableIT_IDLE(LPUART1); + + /* Enable RX Not Empty Interrupt */ + LL_LPUART_EnableIT_RXNE(LPUART1); + + LL_LPUART_EnableDirectionRx(LPUART1); + LL_LPUART_EnableDirectionTx(LPUART1); + LL_LPUART_Enable(LPUART1); + /* USER CODE END LPUART1_Init 2 */ + +} + +/** + * @brief TIM21 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM21_Init(void) +{ + + /* USER CODE BEGIN TIM21_Init 0 */ + + /* USER CODE END TIM21_Init 0 */ + + LL_TIM_InitTypeDef TIM_InitStruct = {0}; + + /* Peripheral clock enable */ + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM21); + + /* TIM21 interrupt Init */ + NVIC_SetPriority(TIM21_IRQn, 0); + NVIC_EnableIRQ(TIM21_IRQn); + + /* USER CODE BEGIN TIM21_Init 1 */ + + /* USER CODE END TIM21_Init 1 */ + TIM_InitStruct.Prescaler = tim21_prescaler; + TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + TIM_InitStruct.Autoreload = tim21_period; + TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + LL_TIM_Init(TIM21, &TIM_InitStruct); + LL_TIM_EnableARRPreload(TIM21); + LL_TIM_SetClockSource(TIM21, LL_TIM_CLOCKSOURCE_INTERNAL); + LL_TIM_SetTriggerOutput(TIM21, LL_TIM_TRGO_RESET); + LL_TIM_DisableMasterSlaveMode(TIM21); + /* USER CODE BEGIN TIM21_Init 2 */ + + /* USER CODE END TIM21_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* GPIO Ports Clock Enable */ + LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); + + /**/ + LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); + + /**/ + LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); + + /**/ + LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin); + + /**/ + GPIO_InitStruct.Pin = LED_B_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LED_B_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LED_G_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LED_G_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LED_R_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LED_R_GPIO_Port, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 4 */ +void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len) +{ + __disable_irq(); + for (uint16_t i = 0; i < buffer_tx_len; i++) + { + LL_LPUART_TransmitData9(LPUART1, buffer_tx[i]); + while (!LL_LPUART_IsActiveFlag_TXE(LPUART1)); + } + __enable_irq(); +} + +int8_t uart_disable_interrupts(void) +{ + LL_LPUART_Disable(LPUART1); + LL_LPUART_DisableIT_IDLE(LPUART1); + LL_LPUART_EnableIT_RXNE(LPUART1); + + return 0; +} + +int8_t uart_enable_interrupts(void) +{ + LL_LPUART_Enable(LPUART1); + LL_LPUART_EnableIT_IDLE(LPUART1); + LL_LPUART_EnableIT_RXNE(LPUART1); + + return 0; +} + +int8_t modbus_slave_callback(modbus_transaction_t *transaction) +{ + uint16_t register_number = transaction->register_number; + switch (transaction->function_code) + { + case MODBUS_READ_INPUT_REGISTERS: + for (int i = 0; i < transaction->register_count; i++, register_number++) + { + switch (register_number) + { + case REGISTER_NUM_CO2: + transaction->input_registers[i] = (uint16_t)CO2; + break; + case REGISTER_NUM_T_SHT4x: + transaction->input_registers[i] = (uint16_t)T_SHT4x; + break; + case REGISTER_NUM_RH_SHT4x: + transaction->input_registers[i] = (uint16_t)RH_SHT4x; + break; + case REGISTER_NUM_T_SCD4x: + transaction->input_registers[i] = (uint16_t)T_SCD4x; + break; + case REGISTER_NUM_RH_SCD4x: + transaction->input_registers[i] = (uint16_t)RH_SCD4x; + break; + case REGISTER_NUM_T_SHT4x_SIGNED: + transaction->input_registers_signed[i] = (int16_t)T_SHT4x; + break; + case REGISTER_NUM_T_SCD4x_SIGNED: + transaction->input_registers_signed[i] = (int16_t)T_SCD4x; + break; + default: + return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; + } + } + return MODBUS_OK; + case MODBUS_READ_HOLDING_REGISTERS: + for (int i = 0; i < transaction->register_count; i++, register_number++) + { + switch (register_number) + { + case REGISTER_NUM_LED_ON: + transaction->holding_registers[i] = (uint16_t)(sensor_config.led_on); + break; + case REGISTER_NUM_LED_BRIGHTNESS: + transaction->holding_registers[i] = (uint16_t)(sensor_config.led_brightness); + break; + case REGISTER_NUM_LED_SMOOTH: + transaction->holding_registers[i] = (uint16_t)(sensor_config.led_smooth); + break; + case REGISTER_NUM_CO2_ALERT_LIMIT1: + transaction->holding_registers[i] = (uint16_t)(sensor_config.led_co2_alert_limit1); + break; + case REGISTER_NUM_CO2_ALERT_LIMIT2: + transaction->holding_registers[i] = (uint16_t)(sensor_config.led_co2_alert_limit2); + break; + case REGISTER_NUM_SCD4x_T_OFFSET: + transaction->holding_registers[i] = (uint16_t)(sensor_config.scd4x_t_offset); + break; + case REGISTER_NUM_MODBUS_ADDR: + transaction->holding_registers[i] = (uint16_t)(sensor_config.modbus_addr); + break; + case REGISTER_NUM_BAUDRATE: + transaction->holding_registers[i] = (uint16_t)(sensor_config.baudrate_index); + break; + default: + return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; + } + } + return MODBUS_OK; + case MODBUS_WRITE_SINGLE_REGISTER: + transaction->register_count = 1; + case MODBUS_WRITE_MULTIPLE_REGISTERS: + for (int i = 0; i < transaction->register_count; i++, register_number++) + { + switch (register_number) + { + case REGISTER_NUM_LED_ON: + sensor_config.led_on = (uint8_t) transaction->holding_registers[i]; + break; + case REGISTER_NUM_LED_BRIGHTNESS: + sensor_config.led_brightness = (uint16_t) transaction->holding_registers[i]; + break; + case REGISTER_NUM_LED_SMOOTH: + sensor_config.led_smooth = (uint16_t) transaction->holding_registers[i]; + break; + case REGISTER_NUM_CO2_ALERT_LIMIT1: + sensor_config.led_co2_alert_limit1 = (uint16_t) transaction->holding_registers[i]; + break; + case REGISTER_NUM_CO2_ALERT_LIMIT2: + sensor_config.led_co2_alert_limit2 = (uint16_t) transaction->holding_registers[i]; + break; + case REGISTER_NUM_SCD4x_T_OFFSET: + sensor_config.scd4x_t_offset = (int16_t) transaction->holding_registers[i]; + break; + case REGISTER_NUM_MODBUS_ADDR: + sensor_config.modbus_addr = (uint16_t) transaction->holding_registers[i]; + modbus_address_changed = 1; + break; + case REGISTER_NUM_BAUDRATE: + if (transaction->holding_registers[0] < config_baudrates_length) + { + sensor_config.baudrate_index = (uint16_t) (transaction->holding_registers[i]); + baudrate_changed = 1; + } + break; + default: + return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; + } + } + sensor_config_pending_write = 1; + return MODBUS_OK; + default: + return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; + } + /* Catch-all error */ + return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; /* nothing implemented yet! TODO */ +} + +int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len) +{ + /* TODO */ + LPUART1_TX_Buffer(buffer, data_len); + return MODBUS_OK; +} +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + __disable_irq(); + while (1) + { + } + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/fw_old/Core/Src/modbus.c b/fw_old/Core/Src/modbus.c new file mode 100644 index 0000000..4ec6e09 --- /dev/null +++ b/fw_old/Core/Src/modbus.c @@ -0,0 +1,265 @@ +/* + * modbus.c + * + * Created on: Jul 18, 2021 + * Author: user + */ + +#include "modbus.h" + +/* + * Global variables + */ + +/* Modbus TX buffer; can be also used for RX in memory constrained systems (e.g. in main.c); + * NOTE if shared buffer is used for TX/RX, care must be taken to prevent writing into buffer + * during execution of modbus_process_message() */ +uint8_t modbus_buffer[MODBUS_MAX_RTU_FRAME_SIZE]; + +/* device address: declared */ +uint8_t modbus_slave_address = MODBUS_DEFAULT_SLAVE_ADDRESS; + +/* + * CRC16 functions + * see https://modbus.org/docs/Modbus_over_serial_line_V1_02.pdf + * section 6.2.2 + */ + +/* CRC16 (without memory mapped values) + * taken from https://ctlsys.com/support/how_to_compute_the_modbus_rtu_message_crc/ */ +uint16_t modbus_CRC16(const uint8_t *buf, int len) +{ + uint16_t crc = 0xFFFF; + + for (int pos = 0; pos < len; pos++) { + crc ^= (uint16_t)buf[pos]; // XOR byte into least sig. byte of crc + + for (int i = 8; i != 0; i--) { // Loop over each bit + if ((crc & 0x0001) != 0) { // If the LSB is set + crc >>= 1; // Shift right and XOR 0xA001 + crc ^= 0xA001; + } else { // Else LSB is not set + crc >>= 1; // Just shift right + } + } + } + // Note, this number has low and high bytes swapped, so use it accordingly (or swap bytes) + return crc; +} + +/* + * Private functions + */ + +/* here we assume buffer has minimal size of MODBUS_MAX_RTU_FRAME_SIZE; + * this function is private, so hopefully it's going to be ok */ +int8_t modbus_copy_reply_to_buffer(uint8_t *buffer, uint8_t *msg_len, modbus_transaction_t *transaction) +{ + uint16_t crc16; + uint8_t byte_count; + + // TODO use relative indices (increments) instead of absolute + buffer[0] = modbus_slave_address; + buffer[1] = transaction->function_code; + *msg_len = 5; + + if (transaction->function_code & MODBUS_ERROR_FLAG) { + /* sending error reply */ + buffer[2] = transaction->exception.exception_code; + } else { + switch (transaction->function_code) { + case MODBUS_READ_HOLDING_REGISTERS: + case MODBUS_READ_INPUT_REGISTERS: + byte_count = transaction->register_count * 2; + buffer[2] = byte_count; + *msg_len = byte_count + 5; + for (int i = 0; i < transaction->register_count; i++) { + // TODO endianness handling + /* buffer16b is alias for both holding and input register buffers */ + buffer[3 + 2*i] = transaction->buffer16b[i] >> 8; + buffer[4 + 2*i] = transaction->buffer16b[i] & 0xff; + } + break; + case MODBUS_WRITE_SINGLE_REGISTER: + buffer[2] = (uint8_t) (transaction->register_address >> 8); + buffer[3] = (uint8_t) transaction->register_address; + buffer[4] = (uint8_t) (transaction->holding_registers[0] >> 8); + buffer[5] = (uint8_t) transaction->holding_registers[0]; + *msg_len = 8; + break; + case MODBUS_WRITE_MULTIPLE_REGISTERS: + buffer[2] = (uint8_t) (transaction->register_address >> 8); + buffer[3] = (uint8_t) transaction->register_address; + buffer[4] = (uint8_t) (transaction->register_count >> 8); + buffer[5] = (uint8_t) transaction->register_count; + *msg_len = 8; + break; + } + } + crc16 = modbus_CRC16(buffer, *msg_len - 2); /* last two bytes is the checksum itself */ + buffer[*msg_len - 2] = crc16 & 0xff; + buffer[*msg_len - 1] = crc16 >> 8; +} + +/* + * Public function definitions + */ + +int8_t modbus_slave_set_address(uint8_t address) +{ + if (address == 0) { + /* address 0 is broadcast address */ + return MODBUS_ERROR; + } + modbus_slave_address = address; + return MODBUS_OK; +} + +int8_t modbus_slave_process_msg(const uint8_t *buffer, int len) +{ + /* + * TODO list: + * + * 1) check that errors and exceptions are handled according to Modbus_Application_Protocol_V1_1b.pdf + * 2) buffer overflow prevention: for each function code, check that buffer is long enough + */ + /* transaction holds message context and content: + * it wraps all necessary buffers and variables */ + modbus_transaction_t transaction; + int8_t callback_result; + uint8_t buffer_pos = 0; + uint8_t byte_count; + + if (len < MODBUS_MINIMAL_FRAME_LEN) { + /* frame too short; return error */ + return MODBUS_ERROR_FRAME_INVALID; + } + /* check CRC first */ + uint16_t crc_received = (buffer[len - 1] << 8) | buffer[len - 2]; + uint16_t crc_calculated = modbus_CRC16(buffer, len - 2); + if (crc_received != crc_calculated) { + /* CRC mismatch, return error */ + //printf("crc mismatch: received 0x%x, calculated 0x%x\n", crc_received, crc_calculated); + return MODBUS_ERROR_CRC; + } + /* check if address matches ours */ + uint8_t address = buffer[buffer_pos++]; + if (address != modbus_slave_address && address != MODBUS_BROADCAST_ADDR) { + /* Message is not for us */ + return MODBUS_OK; + } + /* get function code */ + transaction.function_code = buffer[buffer_pos++]; + transaction.exception.exception_code = 0; + + if (transaction.function_code == MODBUS_READ_DEVICE_IDENTIFICATION) { + // TODO + goto modbus_send; + } + + /* set starting register number */ + switch (transaction.function_code) { + /* coils */ + case MODBUS_READ_DO: + case MODBUS_WRITE_SINGLE_DO: + case MODBUS_WRITE_MULTIPLE_DO: + transaction.register_number = MODBUS_DO_START_NUMBER; + break; + /* discrete inputs */ + case MODBUS_READ_DI: + transaction.register_number = MODBUS_DI_START_NUMBER; + break; + /* input registers */ + case MODBUS_READ_AI: + transaction.register_number = MODBUS_AI_START_NUMBER; + break; + /* holding registers */ + case MODBUS_READ_AO: + case MODBUS_WRITE_SINGLE_AO: + case MODBUS_WRITE_MULTIPLE_AO: + case MODBUS_READ_WRITE_MULTIPLE_REGISTERS: + transaction.register_number = MODBUS_AO_START_NUMBER; + break; + } + + #define MODBUS_FLAG_WRITE 0x01 + #define MODBUS_FLAG_SINGLE 0x02 + uint8_t flags = 0x00; + + /* process message */ + switch (transaction.function_code) { + case MODBUS_WRITE_SINGLE_COIL: + case MODBUS_WRITE_SINGLE_REGISTER: /* holding register */ + flags |= MODBUS_FLAG_SINGLE; + case MODBUS_WRITE_MULTIPLE_COILS: + case MODBUS_WRITE_MULTIPLE_REGISTERS: + flags |= MODBUS_FLAG_WRITE; + case MODBUS_READ_DISCRETE_INPUTS: + case MODBUS_READ_COILS: + case MODBUS_READ_INPUT_REGISTERS: + case MODBUS_READ_HOLDING_REGISTERS: + if (len < (MODBUS_MINIMAL_FRAME_LEN + 4)) { + /* buffer too short to contain everything we need */ + return MODBUS_ERROR; + } + transaction.register_address = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; + // TODO check length! + if (flags & MODBUS_FLAG_WRITE) { + if (flags & MODBUS_FLAG_SINGLE) { + transaction.holding_registers[0] = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; + } else { + /* Write multiple registers */ + transaction.register_count = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; + byte_count = buffer[buffer_pos++]; + if (transaction.register_count > 123 || 2*transaction.register_count != byte_count) { + /* Max number of register is defined by Modbus_Application_Protocol_V1_1b, section 6.12 */ + transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY; + } else { + for (uint8_t i = 0; i < transaction.register_count; i++) { + transaction.holding_registers[i] = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; + } + } + } + } else { + transaction.register_count = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; + if ( + transaction.register_count < 1 || + transaction.register_count > MODBUS_MAX_REGISTERS + ) { + transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE; + } + } + // add offset to register number + transaction.register_number += transaction.register_address; + break; + default: + /* function code not known / not implemented, reply with + * ExceptionCode 1 */ + transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_FUNCTION; + break; + } + /* data in modbus_buffer have been processed and buffer can be re-used for TX */ + /* handle reply */ + if (transaction.exception.exception_code != 0) { + /* indicate error */ + transaction.function_code |= MODBUS_ERROR_FLAG; + } else { + callback_result = modbus_slave_callback(&transaction); + /* error handling */ + if (callback_result != MODBUS_OK) { + transaction.function_code |= MODBUS_ERROR_FLAG; + if (callback_result == MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED) { + transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_FUNCTION; + } else if (callback_result == MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED) { + transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS; + } + } + } + uint8_t msg_len = 0; +modbus_send: + if (address != MODBUS_BROADCAST_ADDR) { + /* send only if master request was not broadcast */ + modbus_copy_reply_to_buffer(modbus_buffer, &msg_len, &transaction); + modbus_transmit_function(modbus_buffer, msg_len); + } +} diff --git a/fw_old/Core/Src/scd4x.c b/fw_old/Core/Src/scd4x.c new file mode 100644 index 0000000..1fc96ec --- /dev/null +++ b/fw_old/Core/Src/scd4x.c @@ -0,0 +1,106 @@ +/* + * sht4x.c + * + * Created on: Jun 8, 2021 + * Author: user + */ + +#include "scd4x.h" +#include "main.h" /* for uart_disable_interrupts() */ + +int8_t scd4x_send_cmd(scd4x_cmd_t cmd) +{ + uint8_t buffer[32]; + int result; + + // start measurement + buffer[0] = cmd >> 8; + buffer[1] = cmd & 0x00ff; + result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2); + if (result != I2C_OK) { + return SCD4X_ERROR; + } + + return SCD4X_OK; +} + +int8_t scd4x_read_data(uint8_t *buffer, int len) +{ + return SCD4X_OK; +} + +int8_t scd4x_start_periodic_measurement( void ) +{ + return scd4x_send_cmd(SCD4X_START_PERIODIC_MEASUREMENT); +} + +int8_t scd4x_stop_periodic_measurement( void ) +{ + return scd4x_send_cmd(SCD4X_STOP_PERIODIC_MEASUREMENT); +} + +int8_t scd4x_perform_factory_reset( void ) +{ + return scd4x_send_cmd(SCD4X_PERFORM_FACTORY_RESET); +} + +int8_t scd4x_read_measurement(uint16_t * co2, int16_t *temperature, uint16_t *relative_humidity) +{ + uint8_t buffer[32]; + int result; + + // start measurement + // TODO: Check for data ready + /* + buffer[0] = GET_DATA_READY_STATUS >> 8; + buffer[1] = GET_DATA_READY_STATUS & 0x00ff; + result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2); + if (result != I2C_OK) { + return SCD4X_ERROR; + } + LL_mDelay(100); // 10 ms should be enough + // read out + result = i2c_receive(SCD4X_I2C_ADDRESS<<1, buffer, 6); + if (result != I2C_OK) { + return SCD4X_ERROR; + }*/ + + + // start measurement + buffer[0] = SCD4X_READ_MEASUREMENT >> 8; + buffer[1] = SCD4X_READ_MEASUREMENT & 0x00ff; + result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2); + + // TODO: Proc to vraci NACK? Vyresit. + /*if (result != I2C_OK) { + return SCD4X_ERROR; + }*/ + uart_disable_interrupts(); + LL_mDelay(1); // 10 ms should be enough + uart_enable_interrupts(); + // read out + result = i2c_receive(SCD4X_I2C_ADDRESS<<1, buffer, 9); + if (result != I2C_OK) + { + return SCD4X_ERROR; + } + + // TODO checksum + // Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3 + uint32_t co2_ticks = (buffer[0] << 8) + buffer[1]; + uint32_t t_ticks = (buffer[3] << 8) + buffer[4]; + uint32_t rh_ticks = (buffer[6] << 8) + buffer[7]; + int t_degC = -450 + 10 * 175 * t_ticks / 65535; + int rh_pRH = 100 * rh_ticks / 65535; + if (rh_pRH > 100) { + rh_pRH = 100; + } + if (rh_pRH < 0) { + rh_pRH = 0; + } + *co2 = co2_ticks; + *temperature = t_degC; + *relative_humidity = rh_pRH; + + return SCD4X_OK; +} diff --git a/fw_old/Core/Src/sht4x.c b/fw_old/Core/Src/sht4x.c new file mode 100644 index 0000000..af6c23b --- /dev/null +++ b/fw_old/Core/Src/sht4x.c @@ -0,0 +1,58 @@ +/* + * sht4x.c + * + * Created on: Jun 8, 2021 + * Author: user + */ + +#include "sht4x.h" +#include "main.h" /* for uart_disable_interrupts() */ + +int8_t sht4x_send_cmd(sht4x_cmd_t cmd) +{ + return SHT4X_OK; +} + +int8_t sht4x_read_data(uint8_t *buffer, int len) +{ + return SHT4X_OK; +} + +int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity) +{ + uint8_t buffer[32]; + int result; + + // start measurement + buffer[0] = SHT4X_START_MEAS_HIGH_PRECISION; + result = i2c_transmit(SHT4X_I2C_ADDRESS<<1, buffer, 1); + // TODO: Proc to vraci NACK? Vyresit. + /* + if (result != I2C_OK) { + return SHT4X_ERROR; + }*/ + uart_disable_interrupts(); + LL_mDelay(10); // 10 ms should be enough + uart_enable_interrupts(); + // read out + result = i2c_receive(SHT4X_I2C_ADDRESS<<1, buffer, 6); + if (result != I2C_OK) { + return SHT4X_ERROR; + } + // TODO checksum + // Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3 + uint32_t t_ticks = (buffer[0] << 8) + buffer[1]; + uint32_t rh_ticks = (buffer[3] << 8) + buffer[4]; + int t_degC = -450 + 10 * 175 * t_ticks / 65535; /* temperature * 10 */ + int rh_pRH = -6 + 125 * rh_ticks / 65535; + if (rh_pRH > 100) { + rh_pRH = 100; + } + if (rh_pRH < 0) { + rh_pRH = 0; + } + *temperature = t_degC; + *relative_humidity = rh_pRH; + + return SHT4X_OK; +} diff --git a/fw_old/Core/Src/sps30.c b/fw_old/Core/Src/sps30.c new file mode 100644 index 0000000..c05a273 --- /dev/null +++ b/fw_old/Core/Src/sps30.c @@ -0,0 +1,193 @@ +/* + * sps30.c + * + * Created on: Jul 18, 2021 + * Author: david + */ + +#include "sps30.h" + +int8_t sps30_send_cmd(sps30_cmd_t cmd) +{ + uint8_t buffer[32]; + uint8_t result; + + // start measurement + buffer[0] = cmd >> 8; + buffer[1] = cmd & 0x00ff; + result = i2c_transmit(SPS30_I2C_ADDRESS<<1, buffer, 2); + // TODO: Proc to vraci NACK? Vyresit. + if (result != I2C_OK) { + return SPS30_ERROR; + } + + return SPS30_OK; +} + +int8_t sps30_start_measurement( void ) +{ + uint8_t i2c_tx_buffer[5]; + uint8_t data_for_crc = {SPS30_UINT16_FORMAT, 0x00}; + + uint8_t result; + + i2c_tx_buffer[0] = SPS30_START_MEASUREMENT >> 8; + i2c_tx_buffer[1] = SPS30_START_MEASUREMENT & 0x00ff; + i2c_tx_buffer[2] = SPS30_UINT16_FORMAT; + i2c_tx_buffer[3] = 0x00; + i2c_tx_buffer[4] = calculate_crc(data_for_crc); + + result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 5); + + // TODO: Proc to vraci NACK? Vyresit. + if (result != I2C_OK) { + return SPS30_ERROR; + } + return SPS30_OK; +} + +int8_t sps30_stop_measurement( void ) +{ + return sps30_send_cmd(SPS30_STOP_MEASUREMENT); +} + +int8_t sps30_read_measured_values(uint16_t *measured_values, uint8_t measured_values_len) +{ + + if (measured_values_len != 10) + { + return -5; + } + + uint8_t i2c_tx_buffer[2]; + uint8_t i2c_rx_buffer[30]; + + uint8_t result; + + // start measurement + i2c_tx_buffer[0] = SPS30_READ_MEASURED_VALUES >> 8; + i2c_tx_buffer[1] = SPS30_READ_MEASURED_VALUES & 0x00ff; + result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 2); + + // TODO: Proc to vraci NACK? Vyresit. + /*if (result != I2C_OK) { + return SPS30_ERROR; + } + return SPS30_OK;*/ + + LL_mDelay(1); // 10 ms should be enough + // read out + result = i2c_receive(SPS30_I2C_ADDRESS<<1, i2c_rx_buffer, 30); + if (result != I2C_OK) + { + return SPS30_ERROR; + } + + uint8_t checksums[10]; + + uint8_t j = 0; + for (uint8_t i = 0; i < 10; i++) + { + + measured_values[i] = (i2c_rx_buffer[j++] << 8) + i2c_rx_buffer[j++]; + checksums[i] = i2c_rx_buffer[j++]; + } + + return SPS30_OK; +} + +int8_t sps30_sleep( void ) +{ + return sps30_send_cmd(SPS30_SLEEP); +} + +int8_t sps30_wake_up( void ) +{ + return sps30_send_cmd(SPS30_WAKE_UP); + return sps30_send_cmd(SPS30_WAKE_UP); +} + +int8_t sps30_start_fan_cleaning( void ) +{ + return sps30_send_cmd(SPS30_START_FAN_CLEANING); +} + +int8_t sps30_reset( void ) +{ + return sps30_send_cmd(SPS30_RESET); +} + + +int8_t sps30_read_status_register ( void ) +{ + uint8_t i2c_tx_buffer[2]; + uint8_t i2c_rx_buffer[6]; + + uint8_t result; + + // start measurement + i2c_tx_buffer[0] = SPS30_READ_DEVICE_STATUS_REGISTER >> 8; + i2c_tx_buffer[1] = SPS30_READ_DEVICE_STATUS_REGISTER & 0x00ff; + result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 2); + + // TODO: Proc to vraci NACK? Vyresit. + /*if (result != I2C_OK) { + return SPS30_ERROR; + } + return SPS30_OK;*/ + + LL_mDelay(1); // 10 ms should be enough + // read out + result = i2c_receive(SPS30_I2C_ADDRESS<<1, i2c_rx_buffer, 6); + + return 0; +} + +int8_t sps30_read_firmware_version ( uint8_t * fw_ver_hi, uint8_t * fw_ver_lo ) +{ + uint8_t i2c_tx_buffer[2]; + uint8_t i2c_rx_buffer[3]; + + uint8_t result; + + // start measurement + i2c_tx_buffer[0] = SPS30_READ_VERSION >> 8; + i2c_tx_buffer[1] = SPS30_READ_VERSION & 0x00ff; + result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 2); + + // TODO: Proc to vraci NACK? Vyresit. + /*if (result != I2C_OK) { + return SPS30_ERROR; + } + return SPS30_OK;*/ + + LL_mDelay(1); // 10 ms should be enough + // read out + result = i2c_receive(SPS30_I2C_ADDRESS<<1, i2c_rx_buffer, 3); + /*if (result != I2C_OK) + { + return SPS30_ERROR; + }*/ + + *fw_ver_hi = i2c_rx_buffer[0]; + *fw_ver_lo = i2c_rx_buffer[1]; + + return SPS30_OK; +} + + +uint8_t calculate_crc(uint8_t data[2]) +{ + uint8_t crc = 0xFF; + for(uint8_t i = 0; i < 2; i++) { + crc ^= data[i]; + for(uint8_t bit = 8; bit > 0; --bit) { + if(crc & 0x80) { + crc = (crc << 1) ^ 0x31u; + } else { + crc = (crc << 1); + } + } + } + return crc; +} diff --git a/fw_old/Core/Src/stm32l0xx_it.c b/fw_old/Core/Src/stm32l0xx_it.c new file mode 100644 index 0000000..504a5a5 --- /dev/null +++ b/fw_old/Core/Src/stm32l0xx_it.c @@ -0,0 +1,208 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l0xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2021 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32l0xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "modbus.h" +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ +uint16_t lpuart1_rx_message_index = 0; +uint16_t lpuart1_rx_message_len = 0; +uint8_t lpuart1_rx_done = 0; +uint8_t lpuart1_rx_message_too_long = 0; + +uint8_t tim21_elapsed_period = 0; +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ +void LPUART1_CharReception_Callback( void ); +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M0+ Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + while (1) + { + } + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVC_IRQn 0 */ + + /* USER CODE END SVC_IRQn 0 */ + /* USER CODE BEGIN SVC_IRQn 1 */ + + /* USER CODE END SVC_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + + /* USER CODE BEGIN SysTick_IRQn 1 */ + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32L0xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32l0xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles TIM21 global interrupt. + */ +void TIM21_IRQHandler(void) +{ + /* USER CODE BEGIN TIM21_IRQn 0 */ + LL_TIM_ClearFlag_UPDATE(TIM21); + tim21_elapsed_period = 1; + + /* USER CODE END TIM21_IRQn 0 */ + /* USER CODE BEGIN TIM21_IRQn 1 */ + + /* USER CODE END TIM21_IRQn 1 */ +} + +/** + * @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28. + */ +void LPUART1_IRQHandler(void) +{ + /* USER CODE BEGIN LPUART1_IRQn 0 */ + /* Check RXNE flag value in SR register */ + if(LL_LPUART_IsActiveFlag_RXNE(LPUART1) && LL_LPUART_IsEnabledIT_RXNE(LPUART1)) + { + /* RXNE flag will be cleared by reading of DR register (done in call) */ + /* Call function in charge of handling Character reception */ + LPUART1_CharReception_Callback(); + } + /* USER CODE END LPUART1_IRQn 0 */ + /* USER CODE BEGIN LPUART1_IRQn 1 */ + /* If the IDLE flag is active */ + if (LL_LPUART_IsActiveFlag_IDLE(LPUART1) && LL_LPUART_IsEnabledIT_IDLE(LPUART1)) + { + /* Clear the IDLE flag */ + LL_LPUART_ClearFlag_IDLE(LPUART1); + + /* Reset the buffer index */ + lpuart1_rx_message_len = lpuart1_rx_message_index; + lpuart1_rx_message_index = 0; + lpuart1_rx_done = 1; + if (lpuart1_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE) + { + lpuart1_rx_message_too_long = 1; + } + } + /* USER CODE END LPUART1_IRQn 1 */ +} + +/* USER CODE BEGIN 1 */ +void LPUART1_CharReception_Callback( void ) +{ + uint16_t lpuart1_rx_bit = LL_LPUART_ReceiveData9(LPUART1); + if (lpuart1_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE) + { + modbus_buffer[lpuart1_rx_message_index] = (uint8_t)lpuart1_rx_bit; + } + lpuart1_rx_message_index++; +} +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/fw_old/Core/Src/syscalls.c b/fw_old/Core/Src/syscalls.c new file mode 100644 index 0000000..4ec9584 --- /dev/null +++ b/fw_old/Core/Src/syscalls.c @@ -0,0 +1,159 @@ +/** + ****************************************************************************** + * @file syscalls.c + * @author Auto-generated by STM32CubeIDE + * @brief STM32CubeIDE Minimal System calls file + * + * For more information about which c-functions + * need which of these lowlevel functions + * please consult the Newlib libc-manual + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +//#undef errno +extern int errno; +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + +register char * stack_ptr asm("sp"); + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + +return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + return 0; +} + +int _open(char *path, int flags, ...) +{ + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + return -1; +} + +int _stat(char *file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + errno = ENOMEM; + return -1; +} diff --git a/fw_old/Core/Src/sysmem.c b/fw_old/Core/Src/sysmem.c new file mode 100644 index 0000000..d7cc52c --- /dev/null +++ b/fw_old/Core/Src/sysmem.c @@ -0,0 +1,80 @@ +/** + ****************************************************************************** + * @file sysmem.c + * @author Generated by STM32CubeIDE + * @brief STM32CubeIDE System Memory calls file + * + * For more information about which C functions + * need which of these lowlevel functions + * please consult the newlib libc manual + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include + +/** + * Pointer to the current high watermark of the heap usage + */ +static uint8_t *__sbrk_heap_end = NULL; + +/** + * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + * and others from the C library + * + * @verbatim + * ############################################################################ + * # .data # .bss # newlib heap # MSP stack # + * # # # # Reserved by _Min_Stack_Size # + * ############################################################################ + * ^-- RAM start ^-- _end _estack, RAM end --^ + * @endverbatim + * + * This implementation starts allocating at the '_end' linker symbol + * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + * The implementation considers '_estack' linker symbol to be RAM end + * NOTE: If the MSP stack, at any point during execution, grows larger than the + * reserved size, please increase the '_Min_Stack_Size'. + * + * @param incr Memory size + * @return Pointer to allocated memory + */ +void *_sbrk(ptrdiff_t incr) +{ + extern uint8_t _end; /* Symbol defined in the linker script */ + extern uint8_t _estack; /* Symbol defined in the linker script */ + extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + const uint8_t *max_heap = (uint8_t *)stack_limit; + uint8_t *prev_heap_end; + + /* Initialize heap end at first call */ + if (NULL == __sbrk_heap_end) + { + __sbrk_heap_end = &_end; + } + + /* Protect heap from growing into the reserved MSP stack */ + if (__sbrk_heap_end + incr > max_heap) + { + errno = ENOMEM; + return (void *)-1; + } + + prev_heap_end = __sbrk_heap_end; + __sbrk_heap_end += incr; + + return (void *)prev_heap_end; +} diff --git a/fw_old/Core/Src/system_stm32l0xx.c b/fw_old/Core/Src/system_stm32l0xx.c new file mode 100644 index 0000000..9189ed8 --- /dev/null +++ b/fw_old/Core/Src/system_stm32l0xx.c @@ -0,0 +1,275 @@ +/** + ****************************************************************************** + * @file system_stm32l0xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File. + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * + ****************************************************************************** + * @attention + * + *

© Copyright(c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l0xx_system + * @{ + */ + +/** @addtogroup STM32L0xx_System_Private_Includes + * @{ + */ + +#include "stm32l0xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_Defines + * @{ + */ +/************************* Miscellaneous Configuration ************************/ + +/* Note: Following vector table addresses must be defined in line with linker + configuration. */ +/*!< Uncomment the following line if you need to relocate the vector table + anywhere in Flash or Sram, else the vector table is kept at the automatic + remap of boot address selected */ +/* #define USER_VECT_TAB_ADDRESS */ + +#if defined(USER_VECT_TAB_ADDRESS) +/*!< Uncomment the following line if you need to relocate your vector Table + in Sram else user remap will be done in Flash. */ +/* #define VECT_TAB_SRAM */ +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +#else +#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ + +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_Variables + * @{ + */ + /* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 2097152U; /* 32.768 kHz * 2^6 */ + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Configure the Vector Table location add offset address ------------------*/ +#if defined (USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI + * value as defined by the MSI range. + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0U, pllmul = 0U, plldiv = 0U, pllsource = 0U, msirange = 0U; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00U: /* MSI used as system clock */ + msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> RCC_ICSCR_MSIRANGE_Pos; + SystemCoreClock = (32768U * (1U << (msirange + 1U))); + break; + case 0x04U: /* HSI used as system clock */ + if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) + { + SystemCoreClock = HSI_VALUE / 4U; + } + else + { + SystemCoreClock = HSI_VALUE; + } + break; + case 0x08U: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + default: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; + plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; + pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)]; + plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U; + + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + + if (pllsource == 0x00U) + { + /* HSI oscillator clock selected as PLL clock entry */ + if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) + { + SystemCoreClock = (((HSI_VALUE / 4U) * pllmul) / plldiv); + } + else + { + SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv); + } + } + else + { + /* HSE selected as PLL clock entry */ + SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv); + } + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/fw/Core/Startup/startup_stm32l011f4ux.s b/fw_old/Core/Startup/startup_stm32l011f4ux.s similarity index 100% rename from fw/Core/Startup/startup_stm32l011f4ux.s rename to fw_old/Core/Startup/startup_stm32l011f4ux.s diff --git a/fw_old/Debug/Core/Src/config.d b/fw_old/Debug/Core/Src/config.d new file mode 100644 index 0000000..b31ca43 --- /dev/null +++ b/fw_old/Debug/Core/Src/config.d @@ -0,0 +1,24 @@ +Core/Src/config.o: ../Core/Src/config.c ../Core/Inc/config.h \ + ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h \ + ../Drivers/CMSIS/Include/core_cm0plus.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h + +../Core/Inc/config.h: + +../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: + 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