Migrated to KiCAD6.

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David Žaitlík
2021-12-30 16:05:15 +01:00
parent 7118ca15c7
commit e9305aeec5
29 changed files with 16053 additions and 93069 deletions

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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# HD_Capacitors_C0402_100nF_50V_X7R
#
DEF HD_Capacitors_C0402_100nF_50V_X7R C 0 40 N N 1 F N
F0 "C" 200 150 50 H V C CNN
F1 "HD_Capacitors_C0402_100nF_50V_X7R" 0 -200 50 H I C CNN
F2 "HD_Capacitors:C0402" 0 -300 50 H I C CNN
F3 "" 0 0 50 H I C CNN
F4 "100nF" 250 50 50 H V C CNN "Capacitance"
F5 "50V" 200 -50 50 H V C CNN "Voltage"
F6 "X7R" 0 0 50 H I C CNN "Dielectric"
F7 "Murata Electronics" 0 -400 50 H I C CNN "Manufacturer"
F8 "GRM155R71H104KE14D" 0 -500 50 H I C CNN "Code"
F9 "490-10700-1-ND" 0 -600 50 H I C CNN "Digikey"
F10 "81-GRM155R71H104KE4D" 0 -700 50 H I C CNN "Mouser"
F11 "2611912" 0 -800 50 H I C CNN "Farnell"
F12 "GRM155R71H104KE14D" 0 -900 50 H I C CNN "TME"
F13 "TDK Corporation" 900 -400 50 H I C CNN "Alt_Manufacturer"
F14 "C1005X7R1H104K050BB" 900 -500 50 H I C CNN "Alt_Code"
DRAW
P 2 1 1 20 -80 -30 80 -30 N
P 2 1 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_Capacitors_C0402_1uF_35V_X5R
#
DEF HD_Capacitors_C0402_1uF_35V_X5R C 0 40 N N 1 F N
F0 "C" 200 150 50 H V C CNN
F1 "HD_Capacitors_C0402_1uF_35V_X5R" 0 -200 50 H I C CNN
F2 "HD_Capacitors:C0402" 0 -300 50 H I C CNN
F3 "" 0 0 50 H I C CNN
F4 "1uF" 200 50 50 H V C CNN "Capacitance"
F5 "35V" 200 -50 50 H V C CNN "Voltage"
F6 "X5R" 0 0 50 H I C CNN "Dielectric"
F7 "TDK Corporation" 0 -400 50 H I C CNN "Manufacturer"
F8 "C1005X5R1V105K050BE" 0 -500 50 H I C CNN "Code"
F9 "445-175218-1-ND" 0 -600 50 H I C CNN "Digikey"
F10 "810-C1005X5R1V105K" 0 -700 50 H I C CNN "Mouser"
F11 "3416060" 0 -800 50 H I C CNN "Farnell"
F12 "X" 0 -900 50 H I C CNN "TME"
F13 "Kyocera International Inc. Electronic Components" 900 -400 50 H I C CNN "Alt_Manufacturer"
F14 "CM05X5R105K35AH" 900 -500 50 H I C CNN "Alt_Code"
DRAW
P 2 1 1 20 -80 -30 80 -30 N
P 2 1 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_Capacitors_C0603_10uF_16V_X5R
#
DEF HD_Capacitors_C0603_10uF_16V_X5R C 0 40 N N 1 F N
F0 "C" 200 150 50 H V C CNN
F1 "HD_Capacitors_C0603_10uF_16V_X5R" 0 -200 50 H I C CNN
F2 "HD_Capacitors:C0603" 0 -300 50 H I C CNN
F3 "" 0 0 50 H I C CNN
F4 "10uF" 200 50 50 H V C CNN "Capacitance"
F5 "16V" 200 -50 50 H V C CNN "Voltage"
F6 "X5R" 0 0 50 H I C CNN "Dielectric"
F7 "Taiyo Yuden" 0 -400 50 H I C CNN "Manufacturer"
F8 "EMK107BBJ106MA-T" 0 -500 50 H I C CNN "Code"
F9 "587-3238-1-ND" 0 -600 50 H I C CNN "Digikey"
F10 "963-EMK107BBJ106MA-T" 0 -700 50 H I C CNN "Mouser"
F11 "2779064" 0 -800 50 H I C CNN "Farnell"
F12 "CL10A106MO8NQNC" 0 -900 50 H I C CNN "TME"
F13 "Murata Electronics" 950 -400 50 H I C CNN "Alt_Manufacturer"
F14 "GRM188R61C106MA73D" 950 -500 50 H I C CNN "Alt_Code"
DRAW
P 2 1 1 20 -80 -30 80 -30 N
P 2 1 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_Capacitors_C1210_22uF_35V_X5R
#
DEF HD_Capacitors_C1210_22uF_35V_X5R C 0 40 N N 1 F N
F0 "C" 200 150 50 H V C CNN
F1 "HD_Capacitors_C1210_22uF_35V_X5R" 0 -200 50 H I C CNN
F2 "HD_Capacitors:C1210" 0 -300 50 H I C CNN
F3 "" 0 0 50 H I C CNN
F4 "22uF" 200 50 50 H V C CNN "Capacitance"
F5 "35V" 200 -50 50 H V C CNN "Voltage"
F6 "X5R" 0 0 50 H I C CNN "Dielectric"
F7 "Taiyo Yuden" 0 -400 50 H I C CNN "Manufacturer"
F8 "GMK325BJ226MM-P" 0 -500 50 H I C CNN "Code"
F9 "587-5853-1-ND" 0 -600 50 H I C CNN "Digikey"
F10 "963-GMK325BJ226MM-P" 0 -700 50 H I C CNN "Mouser"
F11 "X" 0 -800 50 H I C CNN "Farnell"
F12 "X" 0 -900 50 H I C CNN "TME"
F13 "Taiyo Yuden" 950 -400 50 H I C CNN "Alt_Manufacturer"
F14 "GMK325BJ226MM-T" 950 -500 50 H I C CNN "Alt_Code"
DRAW
P 2 1 1 20 -80 -30 80 -30 N
P 2 1 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_Communication_THVD1450DRBR
#
DEF HD_Communication_THVD1450DRBR U 0 40 Y Y 1 F N
F0 "U" -250 450 50 H V C CNN
F1 "HD_Communication_THVD1450DRBR" 350 450 50 H V C CNN
F2 "HD_SON:Texas_VSON8" 0 -650 50 H I C CNN
F3 "" 0 450 50 H I C CNN
F4 "Texas Instruments" 0 -750 50 H I C CNN "Manufacturer"
F5 "THVD1450DRBR" 0 -850 50 H I C CNN "Code"
F6 "296-THVD1450DRBRCT-ND" 0 -950 50 H I C CNN "Digikey"
F7 "595-THVD1450DRBR" 0 -1050 50 H I C CNN "Mouser"
F8 "X" 0 -1150 50 H I C CNN "Farnell"
F9 "X" 0 -1250 50 H I C CNN "TME"
DRAW
C -12 -145 14 1 1 10 F
C -1 59 14 1 1 10 F
C 65 75 14 1 1 10 F
S -300 400 300 -500 1 1 10 f
S 50 125 50 125 1 1 0 N
P 2 1 1 10 -160 -200 -75 -200 N
P 2 1 1 10 -160 100 -50 100 N
P 2 1 1 10 -50 -126 -50 -136 N
P 2 1 1 10 -25 -200 210 -200 N
P 3 1 1 10 -160 -100 -50 -100 -50 -125 N
P 3 1 1 10 0 50 0 0 -160 0 N
P 3 1 1 10 50 125 150 125 150 -200 N
P 3 1 1 10 100 75 100 -150 0 -150 N
P 4 1 1 10 -75 -125 -75 -225 25 -175 -75 -125 N
P 4 1 1 10 -50 100 50 150 50 50 -50 100 N
P 4 1 1 10 75 75 175 75 175 100 210 100 N
X ePAD 0 0 -600 100 U 50 50 1 1 I N
X RO 1 -400 100 100 R 50 50 1 1 O
X ~RE 2 -400 0 100 R 50 50 1 1 I
X DE 3 -400 -100 100 R 50 50 1 1 I
X DI 4 -400 -200 100 R 50 50 1 1 I
X GND 5 0 -600 100 U 50 50 1 1 W
X A 6 400 -200 100 L 50 50 1 1 B
X B 7 400 100 100 L 50 50 1 1 B
X VCC 8 0 500 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# HD_Connectors_Sullins_SWR204-NRTN-D02-RA-GA
#
DEF HD_Connectors_Sullins_SWR204-NRTN-D02-RA-GA J 0 40 Y N 1 F N
F0 "J" 50 250 50 H V C CNN
F1 "HD_Connectors_Sullins_SWR204-NRTN-D02-RA-GA" 50 350 50 H I C CNN
F2 "HD_Connectors:Sullins_SWR204-NRTN-D02-RA-GA" 0 -250 50 H I C CNN
F3 "" 0 0 50 H I C CNN
F4 "Sullins Connector Solutions" 0 -350 50 H I C CNN "Manufacturer"
F5 "SWR204-NRTN-D02-RA-GA" 0 -450 50 H I C CNN "Code"
F6 "S9461-ND" 0 -550 50 H I C CNN "Digikey"
F7 "X" 0 -650 50 H I C CNN "Mouser"
F8 "X" 0 -750 50 H I C CNN "Farnell"
F9 "X" 0 -850 50 H I C CNN "TME"
DRAW
S 0 200 100 -200 0 1 0 f
X 1 1 -100 150 100 R 50 50 1 1 I
X 2 2 -100 50 100 R 50 50 1 1 I
X 3 3 -100 -50 100 R 50 50 1 1 I
X 4 4 -100 -150 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# HD_Diodes_AQ12-02HTG
#
DEF HD_Diodes_AQ12-02HTG D 0 40 Y N 1 F N
F0 "D" 250 100 50 H V C CNN
F1 "HD_Diodes_AQ12-02HTG" 475 0 50 H V C CNN
F2 "HD_SOT:SOT-23" 0 -300 50 H I C CNN
F3 "" -50 600 50 H I C CNN
F4 "Littelfuse Inc." 0 -400 50 H I C CNN "Manufacturer"
F5 "AQ12-02HTG" 0 -500 50 H I C CNN "Code"
F6 "Bourns" 1000 -400 50 H I C CNN "Alt_Manufacturer"
F7 "CDSOT23-SM712" 950 -500 50 H I C CNN "Alt_Code"
F8 "18-AQ12-02HTGCT-ND" 0 -600 50 H I C CNN "Digikey"
F9 "576-AQ12-02HTG" 0 -700 50 H I C CNN "Mouser"
F10 "X" 0 -800 50 H I C CNN "Farnell"
F11 "X" 0 -900 50 H I C CNN "TME"
DRAW
S -200 150 200 -100 1 1 0 f
P 4 0 1 0 -50 100 -150 100 -100 50 -50 100 F
P 2 1 1 0 -100 100 -100 150 N
P 2 1 1 0 0 -100 0 -50 N
P 2 1 1 0 100 100 100 150 N
P 4 1 1 0 -150 0 -50 0 -100 50 -150 0 F
P 4 1 1 0 -150 60 -140 50 -60 50 -50 40 N
P 4 1 1 0 -100 0 -100 -50 100 -50 100 0 N
P 4 1 1 0 50 0 150 0 100 50 50 0 F
P 4 1 1 0 50 60 60 50 140 50 150 40 N
P 4 1 1 0 150 100 50 100 100 50 150 100 F
X 1 1 -100 250 100 D 50 50 1 1 I
X 2 2 100 250 100 D 50 50 1 1 I
X 3 3 0 -200 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# HD_Diodes_PMEG2005EJ115
#
DEF HD_Diodes_PMEG2005EJ115 D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "HD_Diodes_PMEG2005EJ115" 0 -100 50 H V C CNN
F2 "HD_Diodes:D_SOD-323F" 0 -200 50 H I C CNN
F3 "" 0 -300 50 H I C CNN
F4 "Nexperia" 0 -300 50 H I C CNN "Manufacturer"
F5 " 771-PMEG2005EJ115" 0 -400 50 H I C CNN "Code"
F6 "1727-3854-1-ND" 0 -500 50 H I C CNN "Digikey"
F7 "771-PMEG2005EJ115" 0 -600 50 H I C CNN "Mouser"
F8 "1757760" 0 -700 50 H I C CNN "Farnell"
F9 "PMEG2005EJ.115" 0 -800 50 H I C CNN "TME"
$FPLIST
TO-???*
*_Diode_*
*SingleDiode*
D_*
$ENDFPLIST
DRAW
P 2 1 1 0 50 0 -50 0 N
P 4 1 1 8 50 50 50 -50 -50 0 50 50 N
P 6 1 1 8 -75 25 -75 50 -50 50 -50 -50 -25 -50 -25 -25 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_Diodes_SD24-7
#
DEF HD_Diodes_SD24-7 D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "HD_Diodes_SD24-7" 0 -100 50 H V C CNN
F2 "HD_Diodes:D_SOD-323" 0 -200 50 H I C CNN
F3 "" 0 -300 50 H I C CNN
F4 "Diodes Incorporated" 0 -300 50 H I C CNN "Manufacturer"
F5 "SD24-7" 0 -400 50 H I C CNN "Code"
F6 "31-SD24-7CT-ND" 0 -500 50 H I C CNN "Digikey"
F7 "621-SD24-7" 0 -600 50 H I C CNN "Mouser"
F8 "X" 0 -700 50 H I C CNN "Farnell"
F9 "X" 0 -800 50 H I C CNN "TME"
$FPLIST
TO-???*
*_Diode_*
*SingleDiode*
D_*
$ENDFPLIST
DRAW
P 2 1 1 0 50 0 -50 0 N
P 4 1 1 0 -75 50 -50 25 -50 -25 -25 -50 N
P 4 1 1 8 50 50 50 -50 -50 0 50 50 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_Inductors_NRS4018T330MDGJ
#
DEF HD_Inductors_NRS4018T330MDGJ L 0 40 N N 1 F N
F0 "L" 0 200 50 H V C CNN
F1 "HD_Inductors_NRS4018T330MDGJ" 0 -50 50 H V C CNN
F2 "HD_Inductors:L_NR40xx" 0 -150 50 H I C CNN
F3 "" 0 350 50 H I C CNN
F4 "33uH" 0 100 50 H V C CNN "Inductance"
F5 "550mA" 250 100 50 H I C CNN "Current Rating"
F6 "Taiyo Yuden" 0 -250 50 H I C CNN "Manufacturer"
F7 "NRS4018T330MDGJ" 0 -350 50 H I C CNN "Code"
F8 "587-2891-1-ND" 0 -450 50 H I C CNN "Digikey"
F9 "963-NRS4018T330MDGJ" 0 -550 50 H I C CNN "Mouser"
F10 "X" 0 -650 50 H I C CNN "Farnell"
F11 "X" 0 -750 50 H I C CNN "TME"
DRAW
A -75 0 25 1 1799 1 1 0 N -50 0 -100 0
A -25 0 25 1 1799 1 1 0 N 0 0 -50 0
A 25 0 25 1 1799 1 1 0 N 50 0 0 0
A 75 0 25 1 1799 1 1 0 N 100 0 50 0
X 1 1 -150 0 50 R 50 50 1 1 P
X 2 2 150 0 50 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_MCUs_STM32L031G6U7
#
DEF HD_MCUs_STM32L031G6U7 U 0 40 Y Y 1 F N
F0 "U" -400 800 50 H V C CNN
F1 "HD_MCUs_STM32L031G6U7" 550 800 50 H V C CNN
F2 "MRS_QFN:QFN_28-4x4mm" 0 -1300 50 H I C CNN
F3 "" 50 750 50 H I C CNN
F4 "STMicroelectronics" 0 0 50 H I C CNN "Manufacturer"
F5 "STM32L031G6U7" 0 0 50 H I C CNN "Code"
F6 "497-16807-ND" 0 0 50 H I C CNN "Digikey"
F7 "511-STM32L031G6U7" 0 0 50 H I C CNN "Mouser"
F8 "3365411" 0 0 50 H I C CNN "Farnell"
F9 "STM32L031G6U7TR" 0 0 50 H I C CNN "TME"
F10 "497-16807-ND" 0 0 50 H I C CNN "Arrow"
DRAW
S -450 -750 450 750 1 1 10 f
X VDD 1 -50 850 100 D 50 50 1 1 W
X PA4 10 550 250 100 L 50 50 1 1 B
X PA5 11 550 150 100 L 50 50 1 1 B
X PA6 12 550 50 100 L 50 50 1 1 B
X PA7 13 550 -50 100 L 50 50 1 1 B
X PB0 14 -550 -250 100 R 50 50 1 1 B
X PB1 15 -550 -350 100 R 50 50 1 1 B
X VSS 16 -50 -850 100 U 50 50 1 1 W
X VDD 17 50 850 100 D 50 50 1 1 W
X PA8 18 550 -150 100 L 50 50 1 1 B
X PA9 19 550 -250 100 L 50 50 1 1 B
X PC14 2 -550 50 100 R 50 50 1 1 B
X PA10 20 550 -350 100 L 50 50 1 1 B
X PA13 21 550 -450 100 L 50 50 1 1 B
X PA14 22 550 -550 100 L 50 50 1 1 B
X PA15 23 550 -650 100 L 50 50 1 1 B
X PB3 24 -550 -450 100 R 50 50 1 1 B
X PB6 25 -550 -550 100 R 50 50 1 1 B
X PB7 26 -550 -650 100 R 50 50 1 1 B
X BOOT0 27 -550 450 100 R 50 50 1 1 I
X VSS 28 50 -850 100 U 50 50 1 1 W
X PC15 3 -550 -50 100 R 50 50 1 1 B
X NRST 4 -550 650 100 R 50 50 1 1 I
X VDDA 5 150 850 100 D 50 50 1 1 W
X PA0 6 550 650 100 L 50 50 1 1 B
X PA1 7 550 550 100 L 50 50 1 1 B
X PA2 8 550 450 100 L 50 50 1 1 B
X PA3 9 550 350 100 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
# HD_Other_0686F0500-01
#
DEF HD_Other_0686F0500-01 F 0 40 Y Y 1 F N
F0 "F" 0 200 50 H V C CNN
F1 "HD_Other_0686F0500-01" 0 -100 50 H V C CNN
F2 "HD_Other:F0603" 0 -200 50 H I C CNN
F3 "" 0 200 50 H I C CNN
F4 "2834860" 0 -700 50 H I C CNN "Farnell"
F5 "C1F-500" 0 -800 50 H I C CNN "TME"
F6 "530-0686F0500-01" 0 -600 50 H I C CNN "Mouser"
F7 "507-2156-1-ND" 0 -500 50 H I C CNN "Digikey"
F8 "Bel Fuse Inc." 0 -300 50 H I C CNN "Manufacturer"
F9 "0686F0500-01" 0 -400 50 H I C CNN "Code"
F10 "Eaton - Electronics Division" 1050 -300 50 H I C CNN "Alt_Manufacturer"
F11 "CC06FA500MA-TR" 1100 -400 50 H I C CNN "Alt_Code"
DRAW
S 100 -30 -100 30 1 1 10 N
P 2 1 1 0 -100 0 100 0 N
X ~ 1 -150 0 50 R 50 50 1 1 P
X ~ 2 150 0 50 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_Other_Testpoint
#
DEF HD_Other_Testpoint TP 0 40 N N 1 F N
F0 "TP" 100 0 50 H V C CNN
F1 "HD_Other_Testpoint" 0 -100 50 H I C CNN
F2 "HD_Other:Testpoint_SMD_2mm" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 0 50 0 1 0 N
X 1 1 -150 0 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# HD_PMICs_MAX15062A
#
DEF HD_PMICs_MAX15062A U 0 40 Y Y 1 F N
F0 "U" -350 300 50 H V C CNN
F1 "HD_PMICs_MAX15062A" 100 300 50 H V C CNN
F2 "HD_DFN_QFN:TDFN-8-1EP_2x2mm_P0.5mm" 0 -450 50 H I C CNN
F3 "" -150 300 50 H I C CNN
F4 "Maxim Integrated" 0 -550 50 H I C CNN "Manufacturer"
F5 "MAX15062AATA+T" 0 -650 50 H I C CNN "Code"
F6 "MAX15062AATA+TCT-ND" 0 -750 50 H I C CNN "Digikey"
F7 "700-MAX15062AATA+T" 0 -850 50 H I C CNN "Mouser"
F8 "X" 0 -1050 50 H I C CNN "TME"
F9 "2516650" 0 -950 50 H I C CNN "Farnell"
DRAW
S -450 250 450 -250 0 1 0 f
X VIN 1 -550 200 100 R 50 50 1 1 I
X EN/UVLO 2 -550 100 100 R 50 50 1 1 I
X VCC 3 -550 -200 100 R 50 50 1 1 I
X FB/VOUT 4 550 100 100 L 50 50 1 1 I
X MODE 5 -550 -100 100 R 50 50 1 1 I
X nRST 6 -550 0 100 R 50 50 1 1 I
X GND 7 0 -350 100 U 50 50 1 1 I
X LX 8 550 200 100 L 50 50 1 1 w
ENDDRAW
ENDDEF
#
# HD_Power_Symbols_+3V3
#
DEF HD_Power_Symbols_+3V3 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "HD_Power_Symbols_+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# HD_Power_Symbols_GND
#
DEF HD_Power_Symbols_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "HD_Power_Symbols_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -25 -75 25 -75 N
P 2 0 1 0 -5 -100 5 -100 N
P 2 0 1 0 0 -50 0 0 N
P 2 0 1 0 50 -50 -50 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# HD_Power_Symbols_VCC
#
DEF HD_Power_Symbols_VCC #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "HD_Power_Symbols_VCC" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X VCC 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# HD_Resistors_R0402_120R_1%_1d16W
#
DEF HD_Resistors_R0402_120R_1%_1d16W R 0 40 N N 1 F N
F0 "R" 100 50 50 H V C CNN
F1 "HD_Resistors_R0402_120R_1%_1d16W" 0 -200 50 H I C CNN
F2 "HD_Resistors:R0402" 0 -300 50 H I C CNN
F3 "" 0 0 50 H I C CNN
F4 "120R" 150 -50 50 H V C CNN "Resistance"
F5 "1/16W" 300 50 50 H I C CNN "Power"
F6 "1%" 300 -50 50 H I C CNN "Precision"
F7 "Yageo" 0 -400 50 H I C CNN "Manufacturer"
F8 "RC0402JR-07120RL" 0 -500 50 H I C CNN "Code"
F9 "Stackpole Electronics Inc" 800 -400 50 H I C CNN "Alt_Manufacturer"
F10 "RMCF0402JT120R" 800 -500 50 H I C CNN "Alt_Code"
F11 "311-120JRCT-ND" 0 -600 50 H I C CNN "Digikey"
F12 "603-RC0402JR-07120RL" 0 -700 50 H I C CNN "Mouser"
F13 "9232656" 0 -800 50 H I C CNN "Farnell"
F14 "RC0402FR-07120RL" 0 -900 50 H I C CNN "TME"
DRAW
S -40 -100 40 100 1 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# HD_Sensors_SHT40-AD1B-R2
#
DEF HD_Sensors_SHT40-AD1B-R2 U 0 40 Y Y 1 F N
F0 "U" 0 350 50 H V C CNN
F1 "HD_Sensors_SHT40-AD1B-R2" 0 250 50 H V C CNN
F2 "HD_Sensors:SHT4x" 0 -250 50 H I C CNN
F3 "" 0 50 50 H I C CNN
F4 "Sensirion AG" 0 -350 50 H I C CNN "Manufacturer"
F5 "SHT40-AD1B-R2" 0 -450 50 H I C CNN "Code"
F6 "1649-SHT40-AD1B-R2CT-ND" 0 -550 50 H I C CNN "Digikey"
F7 "403-SHT40-AD1B-R2" 0 -650 50 H I C CNN "Mouser"
F8 "3586476" 0 -750 50 H I C CNN "Farnell"
F9 "SHT40-AD1B-R2" 0 -850 50 H I C CNN "TME"
DRAW
S 250 200 -250 -200 0 1 0 f
X SDA 1 350 50 100 L 50 50 1 1 B
X SCL 2 350 -50 100 L 50 50 1 1 B
X VDD 3 -350 150 100 R 50 50 1 1 W
X VSS 4 -350 -150 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
#End Library

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EESchema-DOCLIB Version 2.0
#
#End Doc Library

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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# MAX15062AATA+T-HD_PMICs
#
DEF MAX15062AATA+T-HD_PMICs U 0 40 Y Y 1 F N
F0 "U" -350 300 50 H V C CNN
F1 "MAX15062AATA+T-HD_PMICs" 100 300 50 H V C CNN
F2 "HD_DFN_QFN:TDFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.4mm" 0 -450 50 H I C CNN
F3 "" -150 300 50 H I C CNN
F4 "Maxim Integrated" 0 -550 50 H I C CNN "Manufacturer"
F5 "MAX15062AATA+T" 0 -650 50 H I C CNN "Code"
F6 "MAX15062AATA+TCT-ND" 0 -750 50 H I C CNN "Digikey"
F7 "700-MAX15062AATA+T" 0 -850 50 H I C CNN "Mouser"
F8 "X" 0 -1050 50 H I C CNN "TME"
F9 "2516650" 0 -950 50 H I C CNN "Farnell"
DRAW
S -450 250 450 -250 0 1 0 f
X GND 0 100 -350 100 U 50 50 1 1 I
X VIN 1 -550 200 100 R 50 50 1 1 I
X EN/UVLO 2 -550 100 100 R 50 50 1 1 I
X VCC 3 -550 -200 100 R 50 50 1 1 I
X FB/VOUT 4 550 100 100 L 50 50 1 1 I
X MODE 5 -550 -100 100 R 50 50 1 1 I
X nRST 6 -550 0 100 R 50 50 1 1 I
X GND 7 0 -350 100 U 50 50 1 1 I
X LX 8 550 200 100 L 50 50 1 1 w
ENDDRAW
ENDDEF
#
#End Library

View File

@@ -170,7 +170,7 @@
(add_net VCC)
)
(module HD_DFN_QFN:QFN-28_4x4mm_P0.5mm (layer F.Cu) (tedit 6158C934) (tstamp 6158BF38)
(module VL_DFN_QFN:QFN-28_4x4mm_P0.5mm (layer F.Cu) (tedit 6158C934) (tstamp 6158BF38)
(at 100 100 315)
(descr "QFN, 28 Pin (http://www.st.com/resource/en/datasheet/stm32f031k6.pdf#page=90), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py")
(tags "QFN DFN_QFN")
@@ -308,14 +308,14 @@
(xy -0.08 -0.3325) (xy 0.08 -0.3325) (xy 0.08 0.3325) (xy 0.05364 0.3325) (xy -0.08 0.19886)
) (width 0.09))
))
(model ${HD_LIBS}/3D_Models/QFN_DFN/QFN-28_4x4mm_P0.5mm.step
(model ${VL_LIBS}/3D_Models/QFN_DFN/QFN-28_4x4mm_P0.5mm.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 6158BEE3)
(module VL_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 6158BEE3)
(at 78.25 97.25)
(path /616B94A2)
(fp_text reference TP8 (at 1.75 0) (layer B.SilkS)
@@ -334,7 +334,7 @@
(net 10 VCC))
)
(module HD_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615A0E4D)
(module VL_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615A0E4D)
(at 102.75 100)
(path /615ED68F)
(fp_text reference TP7 (at -0.75 -1.25) (layer B.SilkS)
@@ -353,7 +353,7 @@
(net 1 GND))
)
(module HD_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615958CA)
(module VL_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615958CA)
(at 99.25 102.75)
(path /615EC78C)
(fp_text reference TP6 (at 1.75 0.25 180) (layer B.SilkS)
@@ -372,7 +372,7 @@
(net 2 +3V3))
)
(module HD_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615958C1)
(module VL_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615958C1)
(at 101.75 101.5)
(path /615E7312)
(fp_text reference TP5 (at 3.5 0.75) (layer B.SilkS)
@@ -391,7 +391,7 @@
(net 15 /NRST))
)
(module HD_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615958B8)
(module VL_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615958B8)
(at 103.5 97.75)
(path /615E70CF)
(fp_text reference TP4 (at 1.75 0) (layer B.SilkS)
@@ -410,7 +410,7 @@
(net 17 /SWCLK))
)
(module HD_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615958AF)
(module VL_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 615958AF)
(at 103.5 102)
(path /615E6E53)
(fp_text reference TP3 (at 3 1.25) (layer B.SilkS)
@@ -429,7 +429,7 @@
(net 16 /SWDIO))
)
(module HD_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 6158BEDB)
(module VL_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 6158BEDB)
(at 108.25 97.75)
(path /616B4A06)
(fp_text reference TP2 (at 1.75 0) (layer B.SilkS)
@@ -448,7 +448,7 @@
(net 3 /SDA))
)
(module HD_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 6158BED3)
(module VL_Other:Testpoint_SMD_1mm (layer B.Cu) (tedit 6158AEDA) (tstamp 6158BED3)
(at 108.25 102.5)
(path /616B13AD)
(fp_text reference TP1 (at 1.75 0) (layer B.SilkS)
@@ -467,7 +467,7 @@
(net 4 /SCL))
)
(module HD_DFN_QFN:TDFN-8-1EP_2x2mm_P0.5mm (layer B.Cu) (tedit 60547CBE) (tstamp 603F8930)
(module VL_DFN_QFN:TDFN-8-1EP_2x2mm_P0.5mm (layer B.Cu) (tedit 60547CBE) (tstamp 603F8930)
(at 93.25 97.75)
(path /615C9641)
(fp_text reference U4 (at -2.5 -0.75) (layer B.SilkS)
@@ -508,7 +508,7 @@
(net 1 GND))
)
(module HD_SON:Texas_VSON8 (layer F.Cu) (tedit 606C2C37) (tstamp 6158BF05)
(module VL_SON:Texas_VSON8 (layer F.Cu) (tedit 606C2C37) (tstamp 6158BF05)
(at 94 100 180)
(path /601B0149)
(fp_text reference U1 (at -0.25 2.25) (layer F.SilkS)
@@ -558,14 +558,14 @@
(net 7 /DE) (solder_paste_margin -0.05))
(pad 1 smd roundrect (at -1.55 -0.975 180) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 9 /RX) (solder_paste_margin -0.05))
(model ${HD_LIBS}/3D_Models/SON/Texas_S-PVSON-N8.step
(model ${VL_LIBS}/3D_Models/SON/Texas_S-PVSON-N8.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Resistors:R0402 (layer F.Cu) (tedit 60119404) (tstamp 6158BE64)
(module VL_Resistors:R0402 (layer F.Cu) (tedit 60119404) (tstamp 6158BE64)
(at 91.4 100 90)
(descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
@@ -596,14 +596,14 @@
(net 5 /RS485A))
(pad 1 smd rect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask)
(net 6 /RS485B))
(model ${HD_LIBS}/3D_Models/Resistors/R_0402_1005Metric.step
(model ${VL_LIBS}/3D_Models/Resistors/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Connectors:Sullins_SWR204-NRTN-D02-RA-GA (layer F.Cu) (tedit 606C299F) (tstamp 6158C14E)
(module VL_Connectors:Sullins_SWR204-NRTN-D02-RA-GA (layer F.Cu) (tedit 606C299F) (tstamp 6158C14E)
(at 85.25 100 90)
(path /61614D78)
(fp_text reference J1 (at 2.5 2.5 90) (layer F.SilkS)
@@ -638,14 +638,14 @@
(net 5 /RS485A))
(pad 1 thru_hole circle (at 1 -1) (size 1.5 1.5) (drill 0.75) (layers *.Cu *.Mask)
(net 12 "Net-(F1-Pad1)"))
(model ${HD_LIBS}/3D_Models/Connectors/SWR204-NRTN-D02-RA-GA.STEP
(model ${VL_LIBS}/3D_Models/Connectors/SWR204-NRTN-D02-RA-GA.STEP
(offset (xyz -3 8 5))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Other:F0603 (layer B.Cu) (tedit 601C0205) (tstamp 6158BDF3)
(module VL_Other:F0603 (layer B.Cu) (tedit 601C0205) (tstamp 6158BDF3)
(at 82 100 270)
(path /6042AFA1)
(fp_text reference F1 (at 2.25 0 90) (layer B.SilkS)
@@ -673,14 +673,14 @@
(net 12 "Net-(F1-Pad1)"))
(pad 2 smd rect (at 0.7875 0 270) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask)
(net 11 "Net-(D2-Pad2)"))
(model ${HD_LIBS}/3D_Models/Other/F_0603.step
(model ${VL_LIBS}/3D_Models/Other/F_0603.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz -90 0 0))
)
)
(module HD_Diodes:D_SOD-323 (layer B.Cu) (tedit 6011C37B) (tstamp 6158BDE0)
(module VL_Diodes:D_SOD-323 (layer B.Cu) (tedit 6011C37B) (tstamp 6158BDE0)
(at 79.5 99)
(descr SOD-323)
(tags SOD-323)
@@ -713,14 +713,14 @@
(net 10 VCC))
(pad 2 smd rect (at 1.05 0) (size 0.6 0.45) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model ${HD_LIBS}/3D_Models/Diodes/D_SOD-323.step
(model ${VL_LIBS}/3D_Models/Diodes/D_SOD-323.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Diodes:D_SOD-323F (layer B.Cu) (tedit 601C0603) (tstamp 6158D737)
(module VL_Diodes:D_SOD-323F (layer B.Cu) (tedit 601C0603) (tstamp 6158D737)
(at 79.5 101)
(descr "SOD-323F http://www.nxp.com/documents/outline_drawing/SOD323F.pdf")
(tags SOD-323F)
@@ -756,14 +756,14 @@
(net 10 VCC))
(pad 2 smd rect (at 1.1 0) (size 0.5 0.5) (layers B.Cu B.Paste B.Mask)
(net 11 "Net-(D2-Pad2)"))
(model ${HD_LIBS}/3D_Models/Diodes/D_SOD-323F.step
(model ${VL_LIBS}/3D_Models/Diodes/D_SOD-323F.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_SOT:SOT-23 (layer F.Cu) (tedit 601BF35B) (tstamp 6158BDB3)
(module VL_SOT:SOT-23 (layer F.Cu) (tedit 601BF35B) (tstamp 6158BDB3)
(at 89.2 100 180)
(descr "3-pin SOT-23 package")
(path /60419DC2)
@@ -797,14 +797,14 @@
(net 6 /RS485B))
(pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
(net 5 /RS485A))
(model ${HD_LIBS}/3D_Models/SOT/SOT-23.step
(model ${VL_LIBS}/3D_Models/SOT/SOT-23.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0402 (layer B.Cu) (tedit 601180BB) (tstamp 6158BD0C)
(module VL_Capacitors:C0402 (layer B.Cu) (tedit 601180BB) (tstamp 6158BD0C)
(at 100 98)
(path /61593ADE)
(fp_text reference C24 (at 0 -1) (layer B.SilkS)
@@ -832,14 +832,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0402 (layer B.Cu) (tedit 601180BB) (tstamp 6158BCF9)
(module VL_Capacitors:C0402 (layer B.Cu) (tedit 601180BB) (tstamp 6158BCF9)
(at 100 99.25)
(path /60194B78)
(fp_text reference C23 (at 0 1 180) (layer B.SilkS)
@@ -867,14 +867,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0402 (layer B.Cu) (tedit 601180BB) (tstamp 6158D056)
(module VL_Capacitors:C0402 (layer B.Cu) (tedit 601180BB) (tstamp 6158D056)
(at 100 101.5)
(path /60195679)
(fp_text reference C22 (at -1.5 -0.5 270) (layer B.SilkS)
@@ -902,14 +902,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0603 (layer F.Cu) (tedit 601180C6) (tstamp 6158BCD3)
(module VL_Capacitors:C0603 (layer F.Cu) (tedit 601180C6) (tstamp 6158BCD3)
(at 96.5 102.75 180)
(path /601969C5)
(fp_text reference C21 (at 2.25 -0.5) (layer F.SilkS)
@@ -937,14 +937,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0603_1608Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0402 (layer F.Cu) (tedit 601180BB) (tstamp 6158BCC0)
(module VL_Capacitors:C0402 (layer F.Cu) (tedit 601180BB) (tstamp 6158BCC0)
(at 92.2 102.4)
(path /601C109E)
(fp_text reference C11 (at -1.95 0.1) (layer F.SilkS)
@@ -972,14 +972,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C1210 (layer B.Cu) (tedit 6011905F) (tstamp 6158F1C5)
(module VL_Capacitors:C1210 (layer B.Cu) (tedit 6011905F) (tstamp 6158F1C5)
(at 89.5 100.25 270)
(descr "Capacitor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
@@ -1010,14 +1010,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -1.4 0 270) (size 1.25 2.65) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.2)
(net 10 VCC))
(model ${HD_LIBS}/3D_Models/Capacitors/C_1210_3225Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_1210_3225Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0402 (layer B.Cu) (tedit 601180BB) (tstamp 603FFAC8)
(module VL_Capacitors:C0402 (layer B.Cu) (tedit 601180BB) (tstamp 603FFAC8)
(at 91.75 100 270)
(path /60215513)
(fp_text reference C41 (at 2 0 270) (layer B.SilkS)
@@ -1045,14 +1045,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 10 VCC))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0402 (layer F.Cu) (tedit 601180BB) (tstamp 603F88D2)
(module VL_Capacitors:C0402 (layer F.Cu) (tedit 601180BB) (tstamp 603F88D2)
(at 91.75 97.5)
(path /60203C42)
(fp_text reference C42 (at -2.25 0) (layer F.SilkS)
@@ -1080,14 +1080,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 13 "Net-(C42-Pad1)"))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0603 (layer B.Cu) (tedit 601180C6) (tstamp 61597903)
(module VL_Capacitors:C0603 (layer B.Cu) (tedit 601180C6) (tstamp 61597903)
(at 96.75 98 180)
(path /601E8AE2)
(fp_text reference C43 (at 0.5 1.25) (layer B.SilkS)
@@ -1115,14 +1115,14 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0603_1608Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Inductors:L_NR40xx (layer B.Cu) (tedit 6158C9C4) (tstamp 603F88E4)
(module VL_Inductors:L_NR40xx (layer B.Cu) (tedit 6158C9C4) (tstamp 603F88E4)
(at 95.75 101.25)
(path /601DD138)
(fp_text reference L41 (at -2.75 1.25 270) (layer B.SilkS)
@@ -1156,14 +1156,14 @@
(net 14 "Net-(L41-Pad1)"))
(pad 2 smd rect (at 1.4 0) (size 1.2 3.9) (layers B.Cu B.Paste B.Mask)
(net 2 +3V3))
(model ${HD_LIBS}/3D_Models/Inductors/L_4018.step
(model ${VL_LIBS}/3D_Models/Inductors/L_4018.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz -90 0 0))
)
)
(module HD_Sensors:SHT4x (layer F.Cu) (tedit 60118827) (tstamp 6018A590)
(module VL_Sensors:SHT4x (layer F.Cu) (tedit 60118827) (tstamp 6018A590)
(at 109 100)
(path /601E192D)
(fp_text reference U3 (at 0.5 1.75) (layer F.SilkS)
@@ -1199,14 +1199,14 @@
(net 1 GND))
(pad 2 smd rect (at -0.7 0.4) (size 0.5 0.3) (layers F.Cu F.Paste F.Mask)
(net 4 /SCL))
(model ${HD_LIBS}/3D_Models/Sensors/SHT4x.step
(model ${VL_LIBS}/3D_Models/Sensors/SHT4x.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module HD_Capacitors:C0402 (layer F.Cu) (tedit 601180BB) (tstamp 6018A4F2)
(module VL_Capacitors:C0402 (layer F.Cu) (tedit 601180BB) (tstamp 6018A4F2)
(at 111 100 90)
(path /601E3F2F)
(fp_text reference C31 (at -2 0 270) (layer F.SilkS)
@@ -1234,7 +1234,7 @@
(net 1 GND))
(pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 +3V3))
(model ${HD_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(model ${VL_LIBS}/3D_Models/Capacitors/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,75 @@
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"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
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35,
36
],
"visible_layers": "0015054_80000001",
"zone_display_mode": 0
},
"meta": {
"filename": "rht_wired_sensor.kicad_prl",
"version": 3
},
"project": {
"files": []
}
}

View File

@@ -0,0 +1,430 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.3
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.024999999999999998,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 0.5,
"drill": 0.3
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
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0,
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0,
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2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
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],
[
0,
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0,
0,
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],
[
1,
1,
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1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
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0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
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0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
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2,
0,
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],
[
0,
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0,
1,
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0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "rht_wired_sensor.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"12d25ff9-59dd-46d5-9ae4-91182baf464c",
""
]
],
"text_variables": {}
}

File diff suppressed because it is too large Load Diff

View File

@@ -1,240 +0,0 @@
update=So 2. října 2021, 20:26:40
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=4
BoardThickness=1
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
ViaDiameter1=0.8
ViaDrill1=0.4
ViaDiameter2=0.5
ViaDrill2=0.3
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=1
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=1
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -1,3 +0,0 @@
(sym_lib_table
(lib (name rht_wired_sensor-rescue)(type Legacy)(uri ${KIPRJMOD}/rht_wired_sensor-rescue.lib)(options "")(descr ""))
)