diff --git a/fw/.cproject b/fw/.cproject
index 51ffe1b..3f03a16 100644
--- a/fw/.cproject
+++ b/fw/.cproject
@@ -29,6 +29,12 @@
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.definedsymbols.757865890" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.definedsymbols" valueType="definedSymbols">
 									<listOptionValue builtIn="false" value="DEBUG"/>
 								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.includepaths.1487193934" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Libs/crc8}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Libs/ltr329}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Libs/modbus}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Libs/sht4x}&quot;"/>
+								</option>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.366934534" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.632390373" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
@@ -52,6 +58,10 @@
 								</option>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.946149329" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
 									<listOptionValue builtIn="false" value="../Core/Inc"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Libs/crc8}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Libs/ltr329}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Libs/modbus}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Libs/sht4x}&quot;"/>
 									<listOptionValue builtIn="false" value="../Drivers/STM32L0xx_HAL_Driver/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32L0xx/Include"/>
 									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
@@ -83,6 +93,10 @@
 					<sourceEntries>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
+						<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="Libs/crc8"/>
+						<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="Libs/ltr329"/>
+						<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="Libs/modbus"/>
+						<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="Libs/sht4x"/>
 					</sourceEntries>
 				</configuration>
 			</storageModule>
@@ -104,21 +118,21 @@
 				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.781650198" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
 					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.781650198." name="/" resourcePath="">
 						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.1954020355" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release">
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1791773732" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32L031G6Ux" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1379739425" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.892262605" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1892826908" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1537311264" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32L031G6Ux || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32L0xx_HAL_Driver/Inc | ../Drivers/CMSIS/Device/ST/STM32L0xx/Include ||  ||  || HSE_VALUE=8000000 | HSE_STARTUP_TIMEOUT=100 | HSI_VALUE=16000000 | LSE_STARTUP_TIMEOUT=5000 | LSE_VALUE=32768 | DATA_CACHE_ENABLE=1 | LSI_VALUE=37000 | MSI_VALUE=2097000 | VDD_VALUE=3300 | INSTRUCTION_CACHE_ENABLE=1 | STM32L031xx | USE_FULL_LL_DRIVER | PREFETCH_ENABLE=0 ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32L031G6UX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1791773732" name="MCU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32L031G6Ux" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1379739425" name="CPU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.892262605" name="Core" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1892826908" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1537311264" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32L031G6Ux || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32L0xx_HAL_Driver/Inc | ../Drivers/CMSIS/Device/ST/STM32L0xx/Include ||  ||  || HSE_VALUE=8000000 | HSE_STARTUP_TIMEOUT=100 | HSI_VALUE=16000000 | LSE_STARTUP_TIMEOUT=5000 | LSE_VALUE=32768 | DATA_CACHE_ENABLE=1 | LSI_VALUE=37000 | MSI_VALUE=2097000 | VDD_VALUE=3300 | INSTRUCTION_CACHE_ENABLE=1 | STM32L031xx | USE_FULL_LL_DRIVER | PREFETCH_ENABLE=0 ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32L031G6UX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None || " valueType="string"/>
 							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1782859951" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
-							<builder buildPath="${workspace_loc:/iaq_wired_sensor}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1634455695" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<builder buildPath="${workspace_loc:/iaq_wired_sensor}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1634455695" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1354085929" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.375884652" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.375884652" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1707174983" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.35876175" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.2107783365" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.227778796" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
-								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.10117233" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.2107783365" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.227778796" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.10117233" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
 									<listOptionValue builtIn="false" value="STM32L031xx"/>
 									<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
 									<listOptionValue builtIn="false" value="HSE_VALUE=8000000"/>
@@ -133,7 +147,7 @@
 									<listOptionValue builtIn="false" value="INSTRUCTION_CACHE_ENABLE=1"/>
 									<listOptionValue builtIn="false" value="DATA_CACHE_ENABLE=1"/>
 								</option>
-								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.300786558" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.300786558" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
 									<listOptionValue builtIn="false" value="../Core/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/STM32L0xx_HAL_Driver/Inc"/>
 									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32L0xx/Include"/>
@@ -142,11 +156,11 @@
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1160143889" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.543872720" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.450268074" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.2070767313" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.450268074" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.2070767313" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1437191537" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
-								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.581268614" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32L031G6UX_FLASH.ld}" valueType="string"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.581268614" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32L031G6UX_FLASH.ld}" valueType="string"/>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1903039419" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
 									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
 									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
@@ -187,6 +201,13 @@
 			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
 		</scannerConfigBuildInfo>
 	</storageModule>
-	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="refreshScope" versionNumber="2">
+		<configuration configurationName="Debug">
+			<resource resourceType="PROJECT" workspacePath="/rht_wired_sensor"/>
+		</configuration>
+		<configuration configurationName="Release">
+			<resource resourceType="PROJECT" workspacePath="/rht_wired_sensor"/>
+		</configuration>
+	</storageModule>
 	<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
 </cproject>
\ No newline at end of file
diff --git a/fw/Core/Inc/config.h b/fw/Core/Inc/config.h
index bb357d8..9f9b66c 100644
--- a/fw/Core/Inc/config.h
+++ b/fw/Core/Inc/config.h
@@ -25,6 +25,7 @@ config_read(&config);
 
 #include "stdint.h"
 #include "stm32l0xx.h"
+#include "ltr329.h"
 /* DESCRIPTION OF THE DATA STRUCTURE */
 /*
  * Data are divided into two groups:
@@ -120,15 +121,11 @@ extern const uint8_t config_baudrates_length;
 
 typedef struct
 {
-	/* LED CONFIG */
-	uint8_t led_on;
-	uint16_t led_brightness;
-	uint8_t led_smooth;
-	uint16_t led_co2_alert_limit1;
-	uint16_t led_co2_alert_limit2;
-
-	/* SCD4x Temperature sensor offset */
-	int16_t scd4x_t_offset;
+	/* LTR329 CONFIG */
+	ltr329_gain_t ltr329_gain;
+	ltr329_als_mode_t ltr329_mode;
+	ltr329_integration_time_t ltr329_integ_time;
+	ltr329_measurement_rate_t ltr329_meas_rate;
 
 	/* MODBUS CONFIG */
 	uint16_t modbus_addr;
@@ -136,6 +133,7 @@ typedef struct
 } config_t;
 
 
+
 /* const uint32_t baudrates [] = {19200, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400, 57600, 76800, 115200}; */
 
 int8_t config_read(config_t *config);
diff --git a/fw/Core/Inc/crc8.h b/fw/Core/Inc/crc8.h
deleted file mode 100644
index 6820352..0000000
--- a/fw/Core/Inc/crc8.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * crc.h
- *
- *  Created on: Jun 9, 2021
- *      Author: user
- */
-
-#ifndef INC_CRC8_H_
-#define INC_CRC8_H_
-
-#include "stdint.h"
-
-/*
- * Definitions & macros
- */
-
-#define CRC8_POLYNOMIAL ((uint8_t)0x31)
-#define CRC8_INIT ((uint8_t)0xFF)
-
-uint8_t crc8_calculate(const uint8_t *data, uint16_t count);
-
-#endif /* INC_CRC8_H_ */
diff --git a/fw/Core/Inc/ltr329.h b/fw/Core/Inc/ltr329.h
deleted file mode 100644
index 7294a2a..0000000
--- a/fw/Core/Inc/ltr329.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * ltr329.h
- *
- *  Created on: May 22, 2022
- *      Author: david
- */
-
-#ifndef INC_LTR329_H_
-#define INC_LTR329_H_
-
-#include "stdint.h"
-#include "stm32l0xx_ll_i2c.h"
-#include "stm32l0xx_ll_utils.h"
-#include "i2c.h"
-
-#define LTR329_I2C_ADDRESS 0x29
-
-/*
- * Return values
- */
-
-#define LTR329_OK 0
-#define LTR329_ERROR -1 // generic error
-
-/* LTR-329ALS-01 Registers */
-/* Datasheet: https://optoelectronics.liteon.com/upload/download/DS86-2014-0006/LTR-329ALS-01_DS_V1.pdf */
-typedef enum
-{
-	LTR329_ALS_CONTR 			= 0x80,	/* RW */
-	LTR329_ALS_MEAS_RATE 		= 0x85, /* RW */
-	LTR329_PART_ID 				= 0x86, /* R */
-	LTR329_MANUFAC_ID 			= 0x87, /* R */
-	LTR329_ALS_DATA_CH1_0 		= 0x88, /* R */
-	LTR329_ALS_DATA_CH1_1 		= 0x89, /* R */
-	LTR329_ALS_DATA_CH0_0 		= 0x8A, /* R */
-	LTR329_ALS_DATA_CH0_1 		= 0x8B, /* R */
-	LTR329_ALS_STATUS 			= 0x8C /* R */
-} ltr329_cmd_t;
-
-/* Bit masks for ALS Mode */
-typedef enum
-{
-	LTR329_MODE_STAND_BY		= 0b00000000, /* DEFAULT */
-	LTR329_MODE_ACTIVE			= 0b00000001
-} ltr329_als_mode_t;
-
-/* Bit masks for Gain settings */
-typedef enum
-{
-	LTR329_GAIN_1X 				= 0b00000000, /* DEFAULT */
-	LTR329_GAIN_2X				= 0b00000100,
-	LTR329_GAIN_4X				= 0b00001000,
-	LTR329_GAIN_8X				= 0b00001100,
-	LTR329_GAIN_48X				= 0b00011000,
-	LTR329_GAIN_96X				= 0b00011100,
-	LTR329_GAIN_RESERVED1		= 0b00010000,
-	LTR329_GAIN_RESERVED2		= 0b00010100
-} ltr329_gain_t;
-
-/* Bit masks for Integration Time settings */
-typedef enum
-{
-	LTR329_INTEGRATION_50MS		= 0b00001000,
-	LTR329_INTEGRATION_100MS 	= 0b00000000, /* DEFAULT */
-	LTR329_INTEGRATION_150MS	= 0b00100000,
-	LTR329_INTEGRATION_200MS	= 0b00010000,
-	LTR329_INTEGRATION_250MS	= 0b00101000,
-	LTR329_INTEGRATION_300MS	= 0b00110000,
-	LTR329_INTEGRATION_350MS	= 0b00111000,
-	LTR329_INTEGRATION_400MS	= 0b00011000
-} ltr329_integration_time_t;
-
-/* Bit masks for Measurement Rate settings */
-typedef enum
-{
-	LTR329_MEAS_RATE_50MS		= 0b00000000,
-	LTR329_MEAS_RATE_100MS		= 0b00000001,
-	LTR329_MEAS_RATE_200MS		= 0b00000010,
-	LTR329_MEAS_RATE_500MS		= 0b00000011, /* DEFAULT */
-	LTR329_MEAS_RATE_1000MS		= 0b00000100,
-	LTR329_MEAS_RATE_2000MS		= 0b00000111
-} ltr329_measurement_rate_t;
-
-static int8_t ltr329_read_register (ltr329_cmd_t register_addr, uint8_t *register_data );
-static int8_t ltr329_write_register (ltr329_cmd_t register_addr, uint8_t register_data);
-int8_t ltr329_write_settings (ltr329_gain_t gain, ltr329_als_mode_t mode, ltr329_integration_time_t integ_time, ltr329_measurement_rate_t meas_rate);
-int8_t ltr329_read_settings (ltr329_gain_t *gain, ltr329_als_mode_t *mode, ltr329_integration_time_t *integ_time, ltr329_measurement_rate_t *meas_rate);
-int8_t ltr329_sw_reset( void );
-int8_t ltr329_measure (uint16_t *data_ch0, uint16_t *data_ch1);
-int8_t ltr329_read_status_register(uint8_t *data_valid, uint8_t *new_data, ltr329_gain_t *gain);
-int8_t ltr329_read_device_info (uint8_t *manufacturer_id, uint8_t *part_id);
-
-#endif /* INC_LTR329_H_ */
diff --git a/fw/Core/Inc/modbus.h b/fw/Core/Inc/modbus.h
deleted file mode 100644
index ff01f65..0000000
--- a/fw/Core/Inc/modbus.h
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * modbus.h
- *
- *  Created on: Jul 18, 2021
- *      Author: user
- *
- *  Modbus slave RTU library (does NOT support ASCII and TCP)
- *
- *  Useful links:
- *  https://www.picotech.com/library/oscilloscopes/modbus-serial-protocol-decoding
- *  https://ipc2u.com/articles/knowledge-base/modbus-rtu-made-simple-with-detailed-descriptions-and-examples/
- *  https://modbus.org/docs/Modbus_over_serial_line_V1_02.pdf
- *  https://www.modbus.org/docs/Modbus_Application_Protocol_V1_1b.pdf
- *
- *  Note that byte order is big endian.
- *
- * USAGE:
- *
- * 1) Implement functions modbus_callback_function() and modbus_uart_transmit_function()
- *      - modbus_uart_transmit_function() sends data via UART
- *      - modbus_callback_function() does the real work: read sensors, set outputs...
- *        note that when filling buffers (e.g. input_registers[]) user must
- *        ensure that all data is big-endian
- *    These functions are implementation-specific.
- * 2) Set device address (variable modbus_device_address); you can do this either
- *      - setting modbus_device_address directly (modbus.h needs to be included, duh)
- *      - using modbus_set_device_address(uint8_t address) function
- *    Or you can leave address as-is (MODBUS_DEFAULT_SLAVE_ADDRESS) and set it via
- *    Modbus during runtime
- * 3) Call modbus_process_msg() after message reception; you need to observe Modbus RTU timing:
- *      - pauses between chars in frame are less or equal to 1.5 char
- *      - pauses between frames are at least 3.5 chars (of silence)
- *    For more information see section 2.5.1.1 (MODBUS Message RTU Framing)
- *    in "MODBUS over Serial Line: Specification and Implementation Guide"
- *
- */
-
-#ifndef SRC_MODBUS_H_
-#define SRC_MODBUS_H_
-
-#include "stdint.h"
-#include "stddef.h"
-#include "string.h"
-
-/*
- * Defines & macros
- */
-
-#define MODBUS_BROADCAST_ADDR 0
-#define MODBUS_DEFAULT_SLAVE_ADDRESS 247 /* 255 may be used for bridge device */
-/* minimal frame length is 4 bytes: 1 B slave address, 1 B function code, 2 B CRC */
-#define MODBUS_MINIMAL_FRAME_LEN 4
-#define MODBUS_MINIMAL_READWRITE_LEN 4
-#define MODBUS_MINIMAL_WRITE_MULTIPLE_LEN 5
-#define MODBUS_READ_DEVICE_ID_REQUEST_LEN 4
-#define MODBUS_READ_DEVICE_ID_RESPONSE_HEADER_LEN 4
-#define MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET 3
-#define MODBUS_MAX_RTU_FRAME_SIZE 256
-#define MODBUS_BUFFER_SIZE MODBUS_MAX_RTU_FRAME_SIZE /* alias */
-#define MODBUS_ERROR_FLAG 0x80
-#define MODBUS_MAX_REGISTERS 125
-/* read device id constants */
-#define MODBUS_MEI 0x0E
-#define MODBUS_DEVICE_ID_INDIVIDUAL_ACCESS_FLAG 0x80
-#define MODBUS_MORE_FOLLOWS 0xFF
-#define MODBUS_NO_MORE_FOLLOWS 0x00
-#define MODBUS_BASIC_OBJECT_COUNT 3
-#define MODBUS_REGULAR_OBJECT_COUNT 7
-
-/*
- * Return values
- */
-
-#define MODBUS_OK 0
-#define MODBUS_ERROR -1 // generic error
-#define MODBUS_ERROR_CRC -2 // checksum failed
-#define MODBUS_ERROR_FRAME_INVALID -3 // invalid frame format / length
-#define MODBUS_ERROR_OUT_OF_BOUNDS -4 // requested register is out of bounds
-#define MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED -5 // function not implemented in callback
-#define MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED -6 // register not implemented in callback
-#define MODBUS_ERROR_DEVICE_ID_NOT_IMPLEMENTED -7
-
-/*
- * Data types
- */
-
-/* Public functions codes (Modbus Application protocol specification, section 5.1) */
-typedef enum {
-	/* single bit access functions */
-	MODBUS_READ_COILS = 1,
-	MODBUS_READ_DO = 1, // alias
-	MODBUS_READ_DISCRETE_INPUTS = 2,
-	MODBUS_READ_DI = 2, // alias
-	MODBUS_WRITE_SINGLE_COIL = 5,
-	MODBUS_WRITE_SINGLE_DO = 5, // alias
-	MODBUS_WRITE_MULTIPLE_COILS = 15,
-	MODBUS_WRITE_MULTIPLE_DO = 15, // alias
-	/* 16-bit access functions */
-	MODBUS_READ_HOLDING_REGISTERS = 3,
-	MODBUS_READ_AO = 3, // alias
-	MODBUS_READ_INPUT_REGISTERS = 4,
-	MODBUS_READ_AI = 4, // alias
-	MODBUS_WRITE_SINGLE_REGISTER = 6,
-	MODBUS_WRITE_SINGLE_AO = 6, // alias
-	MODBUS_WRITE_MULTIPLE_REGISTERS = 16,
-	MODBUS_WRITE_MULTIPLE_AO = 16, // alias
-	MODBUS_MASK_WRITE_REGISTER = 22,
-	MODBUS_READ_WRITE_MULTIPLE_REGISTERS = 23,
-	MODBUS_READ_FIFO_QUEUE = 24,
-	/* file record access */
-	MODBUS_READ_FILE_RECORD = 20,
-	MODBUS_WRITE_FILE_RECORD = 21,
-	/* diagnostics */
-	MODBUS_READ_EXCEPTION_STATUS = 7,
-	MODBUS_DIAGNOSTIC = 8, /* sub codes: 00-18,20 */
-	MODBUS_GET_COM_EVENT_COUNTER = 11,
-	MODBUS_GET_COM_EVENT_LOG = 12,
-	MODBUS_REPORT_SLAVE_ID = 17,
-	MODBUS_READ_DEVICE_IDENTIFICATION = 43, /* sub codes: 14 */
-} modbus_function_code_t;
-
-typedef enum {
-	MODBUS_EXCEPTION_ILLEGAL_FUNCTION = 1,
-	MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS = 2,
-	MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY = 2,
-	MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE = 3,
-	MODBUS_EXCEPTION_SLAVE_DEVICE_FAILURE = 4,
-	MODBUS_EXCEPTION_ACKNOWLEDGE = 5,
-	MODBUS_EXCEPTION_SLAVE_DEVICE_BUSY = 6,
-	MODBUS_EXCEPTION_MEMORY_PARITY_ERROR = 8,
-	MODBUS_EXCEPTION_GATEWAY_PATH_UNAVAILABLE = 10,
-	MODBUS_EXCEPTION_GATEWAY_TARGET_DEVICE_FAILED_TO_RESPOND = 11,
-	MODBUS_EXCEPTION_ILLEGAL_DEVICE_ID_CODE = 3
-} modbus_exception_code_t;
-
-typedef struct {
-	modbus_function_code_t function_code : 8;
-	uint16_t register_address; // e.g. first register of A0: 0
-	uint16_t register_number;  // e.g. first register of A0: 40001
-	uint8_t  register_count; // number of registers to be read/written
-
-	modbus_exception_code_t exception;
-
-	uint8_t broadcast; // 1 if broadcast, 0 otherwise
-
-	union {
-		uint8_t buffer8b[MODBUS_MAX_RTU_FRAME_SIZE];
-		uint16_t buffer16b[MODBUS_MAX_RTU_FRAME_SIZE/2];
-		uint16_t input_registers[MODBUS_MAX_REGISTERS];
-		uint16_t holding_registers[MODBUS_MAX_REGISTERS];
-		int16_t  input_registers_signed[MODBUS_MAX_REGISTERS];
-		int16_t  holding_registers_signed[MODBUS_MAX_REGISTERS];
-	};
-
-	/* process device id */
-	uint8_t read_device_id_code;
-	uint8_t object_id;
-} modbus_transaction_t;
-
-typedef enum {
-	MODBUS_DO_START_NUMBER = 1, // Discrete output coils
-	MODBUS_DO_END_NUMBER = 9999,
-	MODBUS_DI_START_NUMBER = 10001, // Discrete input contacts
-	MODBUS_DI_END_NUMBER = 19999,
-	MODBUS_AI_START_NUMBER = 30001, // Analog input registers
-	MODBUS_AI_END_NUMBER = 39999,
-	MODBUS_AO_START_NUMBER = 40001, // Analog output (holding registers)
-	MODBUS_AO_END_NUMBER = 49999
-} modbus_register_number_t;
-
-typedef enum {
-	MODBUS_CONFORMITY_BASIC = 1,
-	MODBUS_CONFORMITY_REGULAR = 2,
-	MODBUS_CONFORMITY_EXTENDED = 3,
-	MODBUS_INDIVIDUAL_ACCESS = 4 /* not actually part of conformity, but I'll keep it here anyway */
-} modbus_conformity_level_t;
-
-/* Device ID datatypes */
-#define MODBUS_DEVICE_ID_OBJECT_NUM 7
-typedef struct {
-	union {
-		struct {
-			/* Basic category (mandatory part) */
-			char *VendorName;
-			char *ProductCode;
-			char *MajorMinorRevision;
-			/* Regular category (optional part) */
-			char *VendorUrl;
-			char *ProductName;
-			char *ModelName;
-			char *UserApplicationName;
-			/* Extended category (optional part) */
-			// Nothing here yet!
-		} object_name;
-		char *object_id[MODBUS_DEVICE_ID_OBJECT_NUM];
-	};
-	uint8_t conformity_level;
-} modbus_device_id_t;
-
-/*
- * Global variables
- */
-
-/* device address: declared in modbus.c */
-extern uint8_t modbus_slave_address;
-
-/* shared modbus buffer; defined in modbus.c; may be used elsewhere in code */
-extern uint8_t modbus_buffer[];
-
-/* modbus device id struct */
-extern modbus_device_id_t *modbus_device_id;
-
-/*
- * Function prototypes
- */
-
-/* process message: should be called in when modbus message was received (e.g. in main.c)
- * modbus_process_msg() may call following functions:
- *     - modbus_callback_function() if data readout is requested
- *     - modbus_uart_transmit_function() if response is required
- * Both functions have to be implemented by user.
- */
-int8_t modbus_slave_process_msg(const uint8_t *buffer, int len);
-int8_t modbus_slave_init_device_id(modbus_device_id_t *device_id);
-int8_t modbus_slave_set_address(uint8_t address);
-/* modbus callback function type - should be implemented by user (e.g. in main.c) */
-int8_t modbus_slave_callback(modbus_transaction_t *transaction);
-/* UART transmit function type - should be implemented by user (e.g. in main.c) */
-int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len);
-
-#endif /* SRC_MODBUS_H_ */
diff --git a/fw/Core/Inc/sht4x.h b/fw/Core/Inc/sht4x.h
deleted file mode 100644
index 36c4351..0000000
--- a/fw/Core/Inc/sht4x.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * sht4x.h
- *
- *  Created on: Jun 8, 2021
- *      Author: user
- */
-
-#ifndef INC_SHT4X_H_
-#define INC_SHT4X_H_
-
-#include "stdint.h"
-#include "stm32l0xx_ll_i2c.h"
-#include "stm32l0xx_ll_utils.h"
-#include "i2c.h"
-#include "crc8.h"
-
-/*
- * Defines & macros
- */
-
-#define SHT4X_I2C_ADDRESS 0x44
-
-/*
- * Return values
- */
-
-#define SHT4X_OK 0
-#define SHT4X_ERROR -1 // generic error
-#define SHT4X_CRC8_ERROR -2 // checksum failed
-
-/*
- * Data types
- */
-
-typedef enum {
-	SHT4X_START_MEAS_HIGH_PRECISION = 0xFD,
-	SHT4X_START_MEAS_MEDIUM_PRECISION = 0xF6,
-	SHT4X_START_MEAS_LOW_PRECISION = 0xE0,
-	SHT4X_READ_SERIAL = 0x89,
-	SHT4X_SOFT_RESET = 0x94,
-	SHT4X_HEATER_200_mW_1_s = 0x39,
-	SHT4X_HEATER_200_mW_01_s = 0x32,
-	SHT4X_HEATER_110_mW_1_s = 0x2F,
-	SHT4X_HEATER_110_mW_01_s = 0x24,
-	SHT4X_HEATER_20_mW_1_s = 0x1E,
-	SHT4X_HEATER_20_mW_01_s = 0x15
-} sht4x_cmd_t;
-
-/*
- * Function prototypes
- */
-
-int8_t sht4x_send_cmd(sht4x_cmd_t cmd);
-int8_t sht4x_read_data(uint8_t *buffer, int len);
-int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity);
-
-#endif /* INC_SHT4X_H_ */
diff --git a/fw/Core/Src/config.c b/fw/Core/Src/config.c
index 08f6112..3dc2436 100644
--- a/fw/Core/Src/config.c
+++ b/fw/Core/Src/config.c
@@ -44,23 +44,11 @@ int8_t config_read(config_t *config)
 {
 	config->modbus_addr = *(uint16_t *) (CONFIG_EEPROM_ADDR_MODBUS_ADDR);
 	config->baudrate_index = *(uint16_t *) (CONFIG_EEPROM_ADDR_BAUDRATE_INDEX);
-	config->led_on = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ON);
-	config->led_brightness = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_BRIGHTNESS);
-	config->led_smooth = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_SMOOTH);
-	config->led_co2_alert_limit1 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT1);
-	config->led_co2_alert_limit2 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT2);
-	config->scd4x_t_offset = *(int16_t *) (CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET);
 
 	/* Check if the EEPROM is initialized - do not check:
-	 *  LED ON
-	 *  LED SMOOTH
-	 *  SCD4x T OFFSET
 	 *  BAUDRATE INDEX
 	 *  those can be 0 */
-	if ((config->modbus_addr 			== EEPROM_EMPTY_BYTE) ||
-		(config->led_co2_alert_limit1 	== EEPROM_EMPTY_BYTE) ||
-		(config->led_co2_alert_limit2 	== EEPROM_EMPTY_BYTE) ||
-		(config->led_brightness 		== EEPROM_EMPTY_BYTE))
+	if (config->modbus_addr == EEPROM_EMPTY_BYTE)
 	{
 		return CONFIG_ERROR;
 	}
@@ -82,48 +70,13 @@ int8_t config_write(config_t *config)
 	{
 		return EEPROM_WRITE_ERROR;
 	}
+
 	/* Write BAUDRATE */
 	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_BAUDRATE_INDEX, config->baudrate_index)  != EEPROM_OK)
 	{
 		return EEPROM_WRITE_ERROR;
 	}
 
-	/* Write LED ON */
-	if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_ON, config->led_on)  != EEPROM_OK)
-	{
-		return EEPROM_WRITE_ERROR;
-	}
-
-	/* Write LED BRIGHTNESS */
-	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_BRIGHTNESS, config->led_brightness)  != EEPROM_OK)
-	{
-		return EEPROM_WRITE_ERROR;
-	}
-
-	/* Write LED SMOOTH */
-	if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_SMOOTH, config->led_smooth)  != EEPROM_OK)
-	{
-		return EEPROM_WRITE_ERROR;
-	}
-
-	/* Write LED CO2 ALERT LIMIT 1 */
-	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT1, config->led_co2_alert_limit1) != EEPROM_OK)
-	{
-		return EEPROM_WRITE_ERROR;
-	}
-
-	/* Write LED CO2 ALERT LIMIT 2 */
-	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT2, config->led_co2_alert_limit2) != EEPROM_OK)
-	{
-		return EEPROM_WRITE_ERROR;
-	}
-
-	/* Write LED SCD4x TEMPERATURE OFFSET */
-	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET, config->scd4x_t_offset) != EEPROM_OK)
-	{
-		return EEPROM_WRITE_ERROR;
-	}
-
 	/* Lock EEPROM*/
 	if (eeprom_lock() != EEPROM_OK)
 	{
diff --git a/fw/Core/Src/crc8.c b/fw/Core/Src/crc8.c
deleted file mode 100644
index 312cdf4..0000000
--- a/fw/Core/Src/crc8.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * crc.c
- *
- *  Created on: Jun 9, 2021
- *      Author: user
- */
-
-#include "crc8.h"
-
-/* Stolen from Sensirion SCD4x datasheet, section 3.11 */
-uint8_t crc8_calculate(const uint8_t *data, uint16_t count)
-{
-	uint16_t current_byte;
-	uint8_t crc = CRC8_INIT;
-	uint8_t crc_bit;
-	/* calculates 8-Bit checksum with given polynomial */
-	for (current_byte = 0; current_byte < count; ++current_byte) {
-		crc ^= (data[current_byte]);
-		for(crc_bit = 8; crc_bit > 0; --crc_bit) {
-			if (crc & 0x80) {
-				crc =(crc << 1) ^ CRC8_POLYNOMIAL;
-			} else {
-				crc = (crc << 1);
-			}
-		}
-	}
-	return crc;
-}
diff --git a/fw/Core/Src/ltr329.c b/fw/Core/Src/ltr329.c
deleted file mode 100644
index 6918d7d..0000000
--- a/fw/Core/Src/ltr329.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * ltr329.c
- *
- *  Created on: May 22, 2022
- *      Author: david
- */
-#include "ltr329.h"
-#include "main.h" /* for uart_disable_interrupts() */
-
-static int8_t ltr329_read_register (ltr329_cmd_t register_addr, uint8_t *register_data )
-{
-	uint8_t tx_buffer[1];
-	uint8_t rx_buffer[1];
-	int result;
-
-	// start measurement
-	tx_buffer[0] = register_addr;
-	/* disable interrupts to prevent modbus/i2c conflict */
-	uart_disable_interrupts();
-	result = i2c_transmit(LTR329_I2C_ADDRESS<<1, tx_buffer, 1);
-	uart_enable_interrupts();
-	if (result != I2C_OK) {
-		return LTR329_ERROR;
-	}
-	LL_mDelay(10); /* 10 ms should be enough */
-	/* read out */
-	uart_disable_interrupts();
-	result = i2c_receive(LTR329_I2C_ADDRESS<<1, rx_buffer, 1);
-	uart_enable_interrupts();
-	if (result != I2C_OK) {
-		return LTR329_ERROR;
-	}
-
-	*register_data = rx_buffer[0];
-	return LTR329_OK;
-}
-
-static int8_t ltr329_write_register (ltr329_cmd_t register_addr, uint8_t register_data)
-{
-	uint8_t tx_buffer[2];
-	int result;
-
-	// start measurement
-	tx_buffer[0] = register_addr;
-	tx_buffer[1] = register_data;
-	/* disable interrupts to prevent modbus/i2c conflict */
-	uart_disable_interrupts();
-	result = i2c_transmit(LTR329_I2C_ADDRESS<<1, tx_buffer, 2);
-	uart_enable_interrupts();
-	if (result != I2C_OK) {
-		return LTR329_ERROR;
-	}
-	return LTR329_OK;
-}
-
-int8_t ltr329_write_settings (ltr329_gain_t gain, ltr329_als_mode_t mode, ltr329_integration_time_t integ_time, ltr329_measurement_rate_t meas_rate)
-{
-	int8_t result;
-	/* Write Gain and ALS Mode */
-	result = ltr329_write_register(LTR329_ALS_CONTR, (gain | mode));
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-	/* Write Integration Time and Measurement Rate */
-
-	result = ltr329_write_register(LTR329_ALS_MEAS_RATE, (integ_time | meas_rate));
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-	return LTR329_OK;
-}
-
-int8_t ltr329_read_settings (ltr329_gain_t *gain, ltr329_als_mode_t *mode, ltr329_integration_time_t *integ_time, ltr329_measurement_rate_t *meas_rate)
-{
-	int8_t result;
-	uint8_t control_register_data;
-	uint8_t rate_register_data;
-
-	result = ltr329_read_register(LTR329_ALS_CONTR, &control_register_data);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-
-	result = ltr329_read_register(LTR329_ALS_MEAS_RATE, &rate_register_data);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-
-	uint8_t control_register_gain_mask = 0b00011100;
-	uint8_t control_register_mode_mask = 0b00000001;
-	uint8_t rate_register_int_time_mask = 0b00111000;
-	uint8_t rate_register_rate_mask = 0b00000111;
-
-	/* Return Registers Values */
-	/* TODO: This might not be safe */
-	*gain = control_register_data & control_register_gain_mask;
-	*mode = control_register_data & control_register_mode_mask;
-	*integ_time = rate_register_data & rate_register_int_time_mask;
-	*meas_rate = rate_register_data & rate_register_rate_mask;
-
-	return LTR329_OK;
-}
-
-int8_t ltr329_sw_reset( void )
-{
-	int8_t result;
-	/* Write Gain and ALS Mode */
-	result = ltr329_write_register(LTR329_ALS_CONTR, 0b00000010);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-	return LTR329_OK;
-}
-
-int8_t ltr329_measure (uint16_t *data_ch0, uint16_t *data_ch1)
-{
-	uint8_t ch0_l, ch0_h, ch1_l, ch1_h;
-	int result;
-	result = ltr329_read_register(LTR329_ALS_DATA_CH0_0, &ch0_l);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-	result = ltr329_read_register(LTR329_ALS_DATA_CH0_1, &ch0_h);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-	result = ltr329_read_register(LTR329_ALS_DATA_CH1_0, &ch1_l);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-	result = ltr329_read_register(LTR329_ALS_DATA_CH1_1, &ch1_h);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-
-	*data_ch0 = (ch0_h << 8) + ch0_l;
-	*data_ch1 = (ch1_h << 8) + ch1_l;
-	return LTR329_OK;
-}
-
-int8_t ltr329_read_status_register(uint8_t *data_valid, uint8_t *new_data, ltr329_gain_t *gain)
-{
-	int8_t result;
-	uint8_t status_register_data;
-	result = ltr329_read_register(LTR329_ALS_STATUS, &status_register_data);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-
-	/* Check data valid */
-	uint8_t data_invalid_mask = 0b10000000;
-	if ((status_register_data & data_invalid_mask) == data_invalid_mask)
-	{
-		*data_valid = 0;
-	} else
-	{
-		*data_valid = 1;
-	}
-
-	/* Check if there is new data */
-	uint8_t data_status_mask = 0b00000100;
-	if ((status_register_data & data_status_mask) == data_status_mask)
-	{
-		*new_data = 1;
-	} else
-	{
-		*new_data = 0;
-	}
-
-	/* Check Gain */
-	/* TODO: This might not be safe */
-	uint8_t gain_mask = 0b01110000;
-	*gain = status_register_data & gain_mask;
-
-	return LTR329_OK;
-}
-
-int8_t ltr329_read_device_info (uint8_t *manufacturer_id, uint8_t *part_id)
-{
-	int8_t result;
-	result = ltr329_read_register(LTR329_MANUFAC_ID, manufacturer_id);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-	result = ltr329_read_register(LTR329_PART_ID, part_id);
-	if (result != LTR329_OK)
-	{
-		return LTR329_ERROR;
-	}
-	return LTR329_OK;
-}
diff --git a/fw/Core/Src/main.c b/fw/Core/Src/main.c
index ef371fd..7a9a664 100644
--- a/fw/Core/Src/main.c
+++ b/fw/Core/Src/main.c
@@ -74,27 +74,26 @@ enum
 {
 	REGISTER_NUM_T = 30010, /* deg C */
 	REGISTER_NUM_T_F = 30011, /* deg F */
-	REGISTER_NUM_RH = 30012 /* %, from SHT4x */
-
+	REGISTER_NUM_RH = 30012, /* %, from SHT4x */
+	REGISTER_NUM_LIGHT_INTENSITY_0 = 30013, /* ticks, from LTR329 */ /*TODO: Find out what it is */
+	REGISTER_NUM_LIGHT_INTENSITY_1 = 30014, /* ticks, from LTR329 */ /*TODO: Find out what it is */
+	REGISTER_NUM_DEVICE_IDENTIFIER = 30100
 	/* VOC Index has initial blackout beriod, when the data is not ready. VOC index is 0 during this period */
 } data_registers_numbers;
 
 enum
 {
+	REGISTER_NUM_LTR329_GAIN = 40001,
+	REGISTER_NUM_LTR329_MEAS_RATE = 40002,
+	REGISTER_NUM_LTR329_INTEGRATION_TIME = 40003,
+	REGISTER_NUM_LTR329_MODE = 40004,
+	/* TODO: Change registers to start with the modbus specific settings? */
+	/* TODO: Seal the gap */
 	REGISTER_NUM_MODBUS_ADDR = 40007,
 	REGISTER_NUM_BAUDRATE = 40008,
 	REGISTER_NUM_RESET_DEVICE = 40100
 } config_registers_numbers;
 
-enum
-{
-	REGISTER_NUM_VENDOR_NAME = 30010,
-	REGISTER_NUM_PRODUCT_CODE = 30011,
-	REGISTER_NUM_REVISION = 30012,
-	REGISTER_NUM_PRODUCT_NAME = 30013,
-	REGISTER_NUM_SERIAL_NUMBER = 30014
-} identification_registers_numbers;
-
 /* Variables to store the measured data */
 int16_t T_SHT4x, TF_SHT4x;
 uint16_t RH_SHT4x;
@@ -106,6 +105,7 @@ config_t sensor_config;
 modbus_device_id_t device_id;
 uint8_t sensor_config_pending_write = 0;
 uint8_t baudrate_changed = 0;
+uint8_t ltr329_config_changed = 0;
 uint8_t modbus_address_changed = 0;
 uint8_t co2_valid = 0;
 
@@ -126,6 +126,54 @@ void USART2_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len);
 /* Private user code ---------------------------------------------------------*/
 /* USER CODE BEGIN 0 */
 
+int8_t sht4x_i2c_transmit(uint8_t address, uint8_t *buffer, int len)
+{
+	return i2c_transmit(address, buffer, len);
+}
+
+int8_t sht4x_i2c_receive(uint8_t address, uint8_t *buffer, int len)
+{
+	return i2c_receive(address, buffer, len);
+}
+
+uint8_t sensirion_crc8_calculate(const uint8_t *data, uint16_t count)
+{
+	return crc8_calculate(data, count);
+}
+
+int8_t sht4x_disable_interrupts(void)
+{
+	return uart_disable_interrupts();
+}
+
+int8_t sht4x_enable_interrupts(void)
+{
+	return uart_enable_interrupts();
+}
+
+int8_t ltr329_i2c_transmit(uint8_t address, uint8_t *buffer, int len)
+{
+	return i2c_transmit(address, buffer, len);
+}
+int8_t ltr329_i2c_receive(uint8_t address, uint8_t *buffer, int len)
+{
+	return i2c_receive(address, buffer, len);
+}
+
+int8_t ltr329_disable_interrupts(void)
+{
+	return uart_disable_interrupts();
+}
+
+int8_t ltr329_enable_interrupts(void)
+{
+	return uart_enable_interrupts();
+}
+
+void delay_ms(int delay_ms)
+{
+	LL_mDelay(delay_ms);
+}
 /* USER CODE END 0 */
 
 /**
@@ -162,12 +210,6 @@ int main(void)
   if (config_read_status != CONFIG_OK)
   {
 	  sensor_config.modbus_addr = MODBUS_DEFAULT_SLAVE_ADDRESS;
-	  sensor_config.led_co2_alert_limit1 = CONFIG_DEFAULT_LED_ALERT1_LIMIT;
-	  sensor_config.led_co2_alert_limit2 = CONFIG_DEFAULT_LED_ALERT2_LIMIT;
-	  sensor_config.led_on = CONFIG_DEFAULT_LED_ON;
-	  sensor_config.led_brightness = CONFIG_DEFAULT_LED_BRIGHTNESS;
-	  sensor_config.led_smooth = CONFIG_DEFAULT_LED_SMOOTH;
-	  sensor_config.scd4x_t_offset = CONFIG_DEFAULT_SCD4x_T_OFFSET;
 	  sensor_config.baudrate_index = CONFIG_DEFAULT_BAUDRATE_INDEX;
   }
   /* USER CODE END SysInit */
@@ -231,7 +273,16 @@ int main(void)
 	  ltr_ret = ltr329_write_settings(LTR329_GAIN_48X, LTR329_MODE_ACTIVE, LTR329_INTEGRATION_100MS, LTR329_MEAS_RATE_100MS);
 	  /* TODO: Check register status */
   } while (ltr_ret != 0);
-
+  /* LTR329 Innitialized */
+  ltr329_gain_t ltr329_gain;
+  ltr329_als_mode_t ltr329_mode;
+  ltr329_integration_time_t ltr329_int_time;
+  ltr329_measurement_rate_t ltr329_meas_rate;
+  ltr329_read_settings(&ltr329_gain, &ltr329_mode, &ltr329_int_time, &ltr329_meas_rate);
+  sensor_config.ltr329_gain = ltr329_gain;
+  sensor_config.ltr329_mode = ltr329_mode;
+  sensor_config.ltr329_integ_time = ltr329_int_time;
+  sensor_config.ltr329_meas_rate = ltr329_meas_rate;
 
   static uint32_t new_baud;
   /* Enter the main loop */
@@ -263,8 +314,10 @@ int main(void)
 	  }
 	  /* if config changed (MODBUS write), reflect changes to EEPROM */
 	  if (sensor_config_pending_write) {
+		  uart_disable_interrupts();
 		  config_write(&sensor_config);
 		  sensor_config_pending_write = 0;
+		  uart_enable_interrupts();
 	  }
 	  if (modbus_address_changed)
 	  {
@@ -284,6 +337,11 @@ int main(void)
 
 		  new_baud = LL_USART_GetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16);
 	  }
+	  if(ltr329_config_changed)
+	  {
+		  ltr329_write_settings(sensor_config.ltr329_gain, sensor_config.ltr329_mode, sensor_config.ltr329_integ_time, sensor_config.ltr329_meas_rate);
+		  ltr329_config_changed = 0;
+	  }
 	  /* It is time for measurement */
 	  if (tim21_elapsed_period == 1)
 	  {
@@ -640,6 +698,12 @@ int8_t modbus_slave_callback(modbus_transaction_t *transaction)
 					case REGISTER_NUM_RH:
 						transaction->input_registers[i] = (uint16_t)RH_SHT4x;
 						break;
+					case REGISTER_NUM_LIGHT_INTENSITY_0:
+						transaction->input_registers[i] = (uint16_t)light_ch0;
+						break;
+					case REGISTER_NUM_LIGHT_INTENSITY_1:
+						transaction->input_registers[i] = (uint16_t)light_ch1;
+						break;
 					default:
 						return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
 				}
@@ -656,6 +720,22 @@ int8_t modbus_slave_callback(modbus_transaction_t *transaction)
 					case REGISTER_NUM_BAUDRATE:
 						transaction->holding_registers[i] = (uint16_t)(sensor_config.baudrate_index);
 						break;
+					case REGISTER_NUM_LTR329_GAIN:
+						transaction->holding_registers[i] = (uint16_t)(sensor_config.ltr329_gain);
+						/* TODO : IMPLEMENT */
+						break;
+					case REGISTER_NUM_LTR329_INTEGRATION_TIME:
+						transaction->holding_registers[i] = (uint16_t)(sensor_config.ltr329_integ_time);
+						/* TODO : IMPLEMENT */
+						break;
+					case REGISTER_NUM_LTR329_MEAS_RATE:
+						transaction->holding_registers[i] = (uint16_t)(sensor_config.ltr329_meas_rate);
+						/* TODO : IMPLEMENT */
+						break;
+					case REGISTER_NUM_LTR329_MODE:
+						transaction->holding_registers[i] = (uint16_t)(sensor_config.ltr329_mode);
+						/* TODO : IMPLEMENT */
+						break;
 					default:
 						return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
 				}
@@ -693,6 +773,56 @@ int8_t modbus_slave_callback(modbus_transaction_t *transaction)
 							return MODBUS_ERROR_OUT_OF_BOUNDS;
 						}
 						break;
+					case REGISTER_NUM_LTR329_GAIN:
+						if (transaction->holding_registers[i] != LTR329_GAIN_1X ||
+							transaction->holding_registers[i] != LTR329_GAIN_2X ||
+							transaction->holding_registers[i] != LTR329_GAIN_4X ||
+							transaction->holding_registers[i] != LTR329_GAIN_8X ||
+							transaction->holding_registers[i] != LTR329_GAIN_48X ||
+							transaction->holding_registers[i] != LTR329_GAIN_96X)
+						{
+							return MODBUS_ERROR_OUT_OF_BOUNDS;
+						}
+						sensor_config.ltr329_gain = (ltr329_gain_t) (transaction->holding_registers[i]);
+						ltr329_config_changed = 1;
+						break;
+					case REGISTER_NUM_LTR329_INTEGRATION_TIME:
+						if (transaction->holding_registers[i] != LTR329_INTEGRATION_50MS  ||
+							transaction->holding_registers[i] != LTR329_INTEGRATION_100MS ||
+							transaction->holding_registers[i] != LTR329_INTEGRATION_150MS ||
+							transaction->holding_registers[i] != LTR329_INTEGRATION_200MS ||
+							transaction->holding_registers[i] != LTR329_INTEGRATION_250MS ||
+							transaction->holding_registers[i] != LTR329_INTEGRATION_300MS ||
+							transaction->holding_registers[i] != LTR329_INTEGRATION_350MS ||
+							transaction->holding_registers[i] != LTR329_INTEGRATION_400MS)
+						{
+							return MODBUS_ERROR_OUT_OF_BOUNDS;
+						}
+						sensor_config.ltr329_integ_time = (ltr329_integration_time_t) (transaction->holding_registers[i]);
+						ltr329_config_changed = 1;
+						break;
+					case REGISTER_NUM_LTR329_MEAS_RATE:
+						if (transaction->holding_registers[i] != LTR329_MEAS_RATE_50MS   ||
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_100MS  ||
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_200MS  ||
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_500MS  ||
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_1000MS ||
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_2000MS)
+						{
+							return MODBUS_ERROR_OUT_OF_BOUNDS;
+						}
+						sensor_config.ltr329_meas_rate = (ltr329_measurement_rate_t) (transaction->holding_registers[i]);
+						ltr329_config_changed = 1;
+						break;
+					case REGISTER_NUM_LTR329_MODE:
+						if (transaction->holding_registers[i] != LTR329_MODE_STAND_BY   ||
+							transaction->holding_registers[i] != LTR329_MODE_ACTIVE)
+						{
+							return MODBUS_ERROR_OUT_OF_BOUNDS;
+						}
+						sensor_config.ltr329_mode = (ltr329_als_mode_t) (transaction->holding_registers[i]);
+						ltr329_config_changed = 1;
+						break;
 					default:
 						return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
 				}
diff --git a/fw/Core/Src/modbus.c b/fw/Core/Src/modbus.c
deleted file mode 100644
index ddf37b6..0000000
--- a/fw/Core/Src/modbus.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/*
- * modbus.c
- *
- *  Created on: Jul 18, 2021
- *      Author: user
- */
-
-#include "modbus.h"
-
-/*
- * Global variables
- */
-
-/* Modbus TX buffer; can be also used for RX in memory constrained systems (e.g. in main.c);
- * NOTE if shared buffer is used for TX/RX, care must be taken to prevent writing into buffer
- * during execution of modbus_process_message() */
-uint8_t modbus_buffer[MODBUS_MAX_RTU_FRAME_SIZE];
-
-/* MODBUS device address */
-uint8_t modbus_slave_address = MODBUS_DEFAULT_SLAVE_ADDRESS;
-
-/* Device ID struct */
-modbus_device_id_t *modbus_device_id = NULL;
-
-/*
- * CRC16 functions
- * see https://modbus.org/docs/Modbus_over_serial_line_V1_02.pdf
- * section 6.2.2
- */
-
-/* CRC16 (without memory mapped values)
- * taken from https://ctlsys.com/support/how_to_compute_the_modbus_rtu_message_crc/ */
-uint16_t modbus_CRC16(const uint8_t *buf, int len)
-{
-	uint16_t crc = 0xFFFF;
-
-	for (int pos = 0; pos < len; pos++) {
-		crc ^= (uint16_t)buf[pos];          // XOR byte into least sig. byte of crc
-       
-		for (int i = 8; i != 0; i--) {    // Loop over each bit
-			if ((crc & 0x0001) != 0) {      // If the LSB is set
-				crc >>= 1;                    // Shift right and XOR 0xA001
-				crc ^= 0xA001;
-			} else {                            // Else LSB is not set
-				crc >>= 1;                    // Just shift right
-			}
-		}
-	}
-	// Note, this number has low and high bytes swapped, so use it accordingly (or swap bytes)
-	return crc;  
-}
-
-/*
- * Private functions
- */
-
-static uint8_t modbus_fill_device_id_objects(uint8_t *buffer, modbus_transaction_t *transaction)
-{
-	/* we assume buffer is 256 - MODBUS_READ_DEVICE_ID_RESPONSE_HEADER_LEN = 252 bytes long */
-	/* find out how many objects we copy to buffer */
-	int len;
-	uint8_t object_index = transaction->object_id;
-	uint8_t object_count;
-	uint8_t more_follows = MODBUS_NO_MORE_FOLLOWS;
-	uint8_t next_object_id;
-	uint8_t last_object;
-	const uint8_t max_len = 256 - MODBUS_READ_DEVICE_ID_RESPONSE_HEADER_LEN;
-
-	/* last object index */
-	if (transaction->read_device_id_code == MODBUS_CONFORMITY_BASIC) {
-		last_object = MODBUS_BASIC_OBJECT_COUNT;
-	} else if (transaction->read_device_id_code == MODBUS_CONFORMITY_REGULAR) {
-		last_object = MODBUS_REGULAR_OBJECT_COUNT;
-	/* extended not implemented */
-//	} else if (transaction->read_device_id_code == MODBUS_CONFORMITY_EXTENDED){
-//		last_object = MODBUS_EXTENDED_OBJECT_COUNT;
-	} else {
-		/* fallback: regular */
-		last_object = MODBUS_REGULAR_OBJECT_COUNT;
-	}
-	last_object--; // we need index
-	/* copy as many objects as possible */
-	do {
-		/* copy object */
-		int object_len = strlen(modbus_device_id->object_id[object_index]);
-		if (len + object_len + 2 > max_len) {
-			more_follows = MODBUS_MORE_FOLLOWS;
-			next_object_id = object_index;
-			break;
-		}
-		/* offset is for "more follows", "next object id", "object count" */
-		buffer[MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len++] = object_index;
-		buffer[MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len++] = object_len;
-		/* note that string copied to buffer is not null-terminated */
-		strncpy((char*)(buffer + len), (char*)modbus_device_id->object_id[object_index++], object_len);
-		len += object_len;
-		object_count++;
-	} while (object_index < last_object);
-	buffer[0] = more_follows;
-	buffer[1] = next_object_id;
-	buffer[2] = object_count;
-	return MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len;
-}
-
-/* here we assume buffer has minimal size of MODBUS_MAX_RTU_FRAME_SIZE;
- * this function is private, so hopefully it's going to be ok */
-static int8_t modbus_transaction_to_buffer(uint8_t *buffer, uint8_t *msg_len, modbus_transaction_t *transaction)
-{
-	uint16_t crc16;
-	uint8_t byte_count;
-	uint8_t buffer_pos = 0;
-
-	// TODO use relative indices (increments) instead of absolute
-	buffer[buffer_pos++] = modbus_slave_address;
-	buffer[buffer_pos++] = transaction->function_code;
-	*msg_len = 5;
-
-	if (transaction->function_code & MODBUS_ERROR_FLAG) {
-		/* sending error reply */
-		buffer[buffer_pos++] = transaction->exception;
-	} else {
-		switch (transaction->function_code) {
-			case MODBUS_READ_HOLDING_REGISTERS:
-			case MODBUS_READ_INPUT_REGISTERS:
-				byte_count = transaction->register_count * 2;
-				buffer[buffer_pos++] = byte_count;
-				*msg_len = byte_count + 5;
-				for (int i = 0; i < transaction->register_count; i++) {
-					// TODO endianness handling
-					/* buffer16b is alias for both holding and input register buffers */
-					buffer[buffer_pos++] = transaction->buffer16b[i] >> 8;
-					buffer[buffer_pos++] = transaction->buffer16b[i] & 0xff;
-				}
-				break;
-			case MODBUS_WRITE_SINGLE_REGISTER:
-				buffer[buffer_pos++] = (uint8_t) (transaction->register_address >> 8);
-				buffer[buffer_pos++] = (uint8_t) transaction->register_address;
-				buffer[buffer_pos++] = (uint8_t) (transaction->holding_registers[0] >> 8);
-				buffer[buffer_pos++] = (uint8_t) transaction->holding_registers[0];
-				*msg_len = 8; /* includes 2 bytes for CRC */
-				break;
-			case MODBUS_WRITE_MULTIPLE_REGISTERS:
-				buffer[buffer_pos++] = (uint8_t) (transaction->register_address >> 8);
-				buffer[buffer_pos++] = (uint8_t) transaction->register_address;
-				buffer[buffer_pos++] = (uint8_t) (transaction->register_count >> 8);
-				buffer[buffer_pos++] = (uint8_t) transaction->register_count;
-				*msg_len = 8; /* includes 2 bytes for CRC */
-				break;
-			case MODBUS_READ_DEVICE_IDENTIFICATION:
-				/* MEI type */
-				buffer[buffer_pos++] = MODBUS_MEI;
-				/* read device id */
-				buffer[buffer_pos++] = transaction->read_device_id_code;
-				/* conformity level */
-				buffer[buffer_pos++] = modbus_device_id->conformity_level;
-				/* fill buffer with as many objects as possible  */
-				*msg_len = modbus_fill_device_id_objects(buffer+buffer_pos, transaction);
-				*msg_len += 7; /* includes 2 bytes for CRC */
-				break;
-		}
-	}
-	crc16 = modbus_CRC16(buffer, buffer_pos); /* last two bytes is the checksum itself */
-	buffer[buffer_pos++] = crc16 & 0xff;
-	buffer[buffer_pos++] = crc16 >> 8;
-	return MODBUS_OK;
-}
-
-static int8_t modbus_process_device_id_request(const uint8_t *buffer, int len, modbus_transaction_t *transaction)
-{
-	uint8_t MEI_type;
-	uint8_t read_device_id_code;
-	uint8_t object_id;
-	uint8_t buffer_pos = 0;
-
-	if (transaction->broadcast == 1) {
-		/* Read device ID broadcast - invalid; ignore (master will get timeout) */
-		return MODBUS_ERROR;
-	}
-	if (modbus_device_id == NULL) {
-		/* modbus_device_id not initialized; user should use modbus_slave_init_device_id() first */
-		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DEVICE_ID_CODE;
-		return MODBUS_OK;
-	}
-	if (len < MODBUS_READ_DEVICE_ID_REQUEST_LEN) {
-		/* frame too short, ignore */
-		return MODBUS_ERROR;
-	}
-	/* next byte should be MEI = 0x0E */
-	MEI_type = buffer[buffer_pos++];
-	if (MEI_type != MODBUS_MEI) {
-		/* invalid MEI, ignore. I have no idea what MEI does, but it should always be 0x0E */
-		return MODBUS_ERROR;
-	}
-	/* next byte is read device id code */
-	read_device_id_code = buffer[buffer_pos++];
-	/* read device id code can only have values 1,2,3,4 */
-	if (read_device_id_code < 1 || read_device_id_code > 4) {
-		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DEVICE_ID_CODE;
-		return MODBUS_OK;
-	}
-	transaction->read_device_id_code = read_device_id_code;
-	/* next byte is object id */
-	object_id = buffer[buffer_pos++];
-	transaction->object_id = object_id;
-	if (object_id > MODBUS_DEVICE_ID_OBJECT_NUM) {
-		/* illegal object ID */
-		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS;
-		return MODBUS_OK;
-	}
-	/* Message processed */
-	return MODBUS_OK;
-}
-
-/* returns ERROR only when no response to master is needed */
-static int8_t modbus_process_read_write_request(const uint8_t *buffer, int len, modbus_transaction_t *transaction)
-{
-	uint8_t byte_count;
-	int8_t callback_result;
-	uint8_t buffer_pos = 0;
-
-	/* set starting register number */
-	switch (transaction->function_code) {
-	/* coils */
-	case MODBUS_READ_DO:
-	case MODBUS_WRITE_SINGLE_DO:
-	case MODBUS_WRITE_MULTIPLE_DO:
-		transaction->register_number = MODBUS_DO_START_NUMBER;
-		break;
-	/* discrete inputs */
-	case MODBUS_READ_DI:
-		transaction->register_number = MODBUS_DI_START_NUMBER;
-		break;
-	/* input registers */
-	case MODBUS_READ_AI:
-		transaction->register_number = MODBUS_AI_START_NUMBER;
-		break;
-	/* holding registers */
-	case MODBUS_READ_AO:
-	case MODBUS_WRITE_SINGLE_AO:
-	case MODBUS_WRITE_MULTIPLE_AO:
-	case MODBUS_READ_WRITE_MULTIPLE_REGISTERS:
-		transaction->register_number = MODBUS_AO_START_NUMBER;
-		break;	
-	}
-
-	#define MODBUS_FLAG_WRITE  0x01
-	#define MODBUS_FLAG_SINGLE 0x02
-	uint8_t flags = 0x00;
-
-	/* process message */
-	switch (transaction->function_code) {
-	case MODBUS_WRITE_SINGLE_COIL:
-	case MODBUS_WRITE_SINGLE_REGISTER: /* holding register */
-		flags |= MODBUS_FLAG_SINGLE;
-	case MODBUS_WRITE_MULTIPLE_COILS:
-	case MODBUS_WRITE_MULTIPLE_REGISTERS:
-		flags |= MODBUS_FLAG_WRITE;
-	case MODBUS_READ_DISCRETE_INPUTS:
-	case MODBUS_READ_COILS:
-	case MODBUS_READ_INPUT_REGISTERS:
-	case MODBUS_READ_HOLDING_REGISTERS:
-		if (len < MODBUS_MINIMAL_READWRITE_LEN) {
-			/* buffer too short to contain everything we need */
-			return MODBUS_ERROR;
-		}
-		transaction->register_address = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
-		buffer += 2;
-		// TODO check length!
-		if (flags & MODBUS_FLAG_WRITE) {
-			if (flags & MODBUS_FLAG_SINGLE) {
-				transaction->holding_registers[0] = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
-				buffer_pos += 2;
-			} else {
-				/* Write multiple registers */
-				transaction->register_count = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
-				buffer_pos += 2;
-				if (len < MODBUS_MINIMAL_WRITE_MULTIPLE_LEN) {
-					return MODBUS_ERROR;
-				}
-				byte_count = buffer[buffer_pos++];
-				if (transaction->register_count > 123 || 2*transaction->register_count != byte_count) {
-					/* Max number of register is defined by Modbus_Application_Protocol_V1_1b, section 6.12 */
-					transaction->exception = MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY;
-				} else {
-					if (len < MODBUS_MINIMAL_WRITE_MULTIPLE_LEN + byte_count) {
-						return MODBUS_ERROR;
-					}
-					for (uint8_t i = 0; i < transaction->register_count; i++) {
-						transaction->holding_registers[i] = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
-						buffer_pos += 2;
-					}
-				}
-			}
-		} else {
-			transaction->register_count = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
-			buffer_pos += 2;
-			if (
-					transaction->register_count < 1 ||
-					transaction->register_count > MODBUS_MAX_REGISTERS
-			   ) {
-				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE;
-			}
-		}
-		// add offset to register number
-		transaction->register_number += transaction->register_address;
-		break;
-	default:
-		/* function code not known / not implemented, reply with
-		 * ExceptionCode 1 */
-		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
-		break;
-	}
-	/* data in modbus_buffer have been processed and buffer can be re-used for TX */
-	/* handle reply */
-	if (transaction->exception != 0) {
-		/* indicate error */
-		transaction->function_code |= MODBUS_ERROR_FLAG;
-	} else {
-		callback_result = modbus_slave_callback(transaction);
-		/* error handling */
-		if (callback_result != MODBUS_OK) {
-			transaction->function_code |= MODBUS_ERROR_FLAG;
-			if (callback_result == MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED) {
-				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
-			} else if (callback_result == MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED) {
-				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS;
-			}
-		}
-	}
-	return MODBUS_OK;
-}
-
-/*
- * Public function definitions
- */
-
-int8_t modbus_slave_set_address(uint8_t address)
-{
-	if (address == 0) {
-		/* address 0 is broadcast address */
-		return MODBUS_ERROR;
-	}
-	modbus_slave_address = address;
-	return MODBUS_OK;
-}
-
-
-int8_t modbus_slave_process_msg(const uint8_t *buffer, int len)
-{
-
-
-	/*
-	 * TODO list:
-	 *
-	 * 1) check that errors and exceptions are handled according to Modbus_Application_Protocol_V1_1b.pdf
-	 * 2) buffer overflow prevention: for each function code, check that buffer is long enough
-	 */
-
-
-	/* transaction holds message context and content:
-	 * it wraps all necessary buffers and variables */
-	modbus_transaction_t transaction;
-	uint8_t buffer_pos = 0;
-
-	if (len < MODBUS_MINIMAL_FRAME_LEN) {
-		/* frame too short; return error (no reply needed) */
-		return MODBUS_ERROR_FRAME_INVALID;
-	}
-	/* check CRC first */
-	uint16_t crc_received = (buffer[len - 1] << 8) | buffer[len - 2];
-	uint16_t crc_calculated = modbus_CRC16(buffer, len - 2);
-	if (crc_received != crc_calculated) {
-		/* CRC mismatch, return error (no reply needed) */
-		return MODBUS_ERROR_CRC;
-	}
-	/* check if address matches ours */
-	uint8_t address = buffer[buffer_pos++];
-	transaction.broadcast = (address == MODBUS_BROADCAST_ADDR);
-	if (address != modbus_slave_address && transaction.broadcast != 1) {
-		/* Message is not for us (no reply needed) */
-		return MODBUS_OK;
-	}
-	/* get function code */
-	transaction.function_code = buffer[buffer_pos++];
-	transaction.exception = 0;
-	uint8_t request_processing_result;
-	if (transaction.function_code == MODBUS_READ_DEVICE_IDENTIFICATION) {
-		/* Read device ID request is quite complicated, therefore it has its own processing function */
-		request_processing_result = modbus_process_device_id_request(buffer + buffer_pos, len - buffer_pos, &transaction);
-	} else {
-		/* process other requests: input register read, holding register read/write */
-		request_processing_result = modbus_process_read_write_request(buffer + buffer_pos, len - buffer_pos, &transaction);
-	}
-	uint8_t msg_len;
-	/* reply only if request was processed successfully and message was not broadcast */
-	if (request_processing_result == MODBUS_OK && transaction.broadcast == 0) {
-		modbus_transaction_to_buffer(modbus_buffer, &msg_len, &transaction);
-		/* send reply */
-		modbus_transmit_function(modbus_buffer, msg_len);
-	}
-	return MODBUS_OK;
-}
-
-int8_t modbus_slave_init_device_id(modbus_device_id_t *device_id)
-{
-	if (device_id == NULL) {
-		return MODBUS_ERROR;
-	}
-	/* at least basic category objects have to be implemented */
-	if (	device_id->object_name.VendorName == NULL  ||
-			device_id->object_name.ProductCode == NULL ||
-			device_id->object_name.MajorMinorRevision == NULL
-	) {
-		return MODBUS_ERROR;
-	}
-	/* set conformity level: currently only "basic" and "regular" is implemented */
-	if ( 	device_id->object_id[3] != NULL &&
-			device_id->object_id[4] != NULL &&
-			device_id->object_id[5] != NULL
-
-	) {
-		/* strings are present in regular category (optional) */
-		device_id->conformity_level = MODBUS_CONFORMITY_REGULAR;
-	} else {
-		device_id->conformity_level = MODBUS_CONFORMITY_BASIC;
-	}
-	/* we support both stream and individual access to objects */
-	device_id->conformity_level |= MODBUS_DEVICE_ID_INDIVIDUAL_ACCESS_FLAG;
-	modbus_device_id = device_id;
-	return MODBUS_OK;
-}
diff --git a/fw/Core/Src/sht4x.c b/fw/Core/Src/sht4x.c
deleted file mode 100644
index e17cdf9..0000000
--- a/fw/Core/Src/sht4x.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * sht4x.c
- *
- *  Created on: Jun 8, 2021
- *      Author: user
- */
-
-#include "sht4x.h"
-#include "main.h" /* for uart_disable_interrupts() */
-
-int8_t sht4x_send_cmd(sht4x_cmd_t cmd)
-{
-	return SHT4X_OK;
-}
-
-int8_t sht4x_read_data(uint8_t *buffer, int len)
-{
-	return SHT4X_OK;
-}
-
-int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity)
-{
-	uint8_t buffer[32];
-	int result;
-
-	/* disable interrupts to prevent modbus/i2c conflict */
-	// start measurement
-	buffer[0] = SHT4X_START_MEAS_HIGH_PRECISION;
-	uart_disable_interrupts();
-	result = i2c_transmit(SHT4X_I2C_ADDRESS<<1, buffer, 1);
-	uart_enable_interrupts();
-	if (result != I2C_OK) {
-		return SHT4X_ERROR;
-	}
-	LL_mDelay(10); /* 10 ms should be enough */
-	/* read out */
-	uart_disable_interrupts();
-	result = i2c_receive(SHT4X_I2C_ADDRESS<<1, buffer, 6);
-	uart_enable_interrupts();
-	if (result != I2C_OK) {
-		return SHT4X_ERROR;
-	}
-	/* Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3 */
-	uint32_t t_ticks = (buffer[0] << 8) + buffer[1];
-	uint8_t t_crc = buffer[2];
-	uint32_t rh_ticks = (buffer[3] << 8) + buffer[4];
-	uint8_t rh_crc = buffer[5];
-	/* check CRC-8 checksum */
-	uint8_t crc_correct = crc8_calculate(buffer, 2) == t_crc;
-	crc_correct &= crc8_calculate(buffer + 3, 2) == rh_crc;
-	if (!crc_correct) {
-		return SHT4X_CRC8_ERROR;
-	}
-	/* copy data to output variables */
-	int t_degC = -450 + 10 * 175 * t_ticks / 65535; /* temperature * 10 */
-	int rh_pRH = -6 + 125 * rh_ticks / 65535;
-	if (rh_pRH > 100) {
-			rh_pRH = 100;
-	}
-	if (rh_pRH < 0) {
-		rh_pRH = 0;
-	}
-	*temperature = t_degC;
-	*relative_humidity = rh_pRH;
-
-	return SHT4X_OK;
-}
diff --git a/fw/Debug/Core/Src/config.d b/fw/Debug/Core/Src/config.d
index 7f22991..cad1526 100644
--- a/fw/Debug/Core/Src/config.d
+++ b/fw/Debug/Core/Src/config.d
@@ -5,7 +5,11 @@ Core/Src/config.o: ../Core/Src/config.c ../Core/Inc/config.h \
  ../Drivers/CMSIS/Include/cmsis_version.h \
  ../Drivers/CMSIS/Include/cmsis_compiler.h \
  ../Drivers/CMSIS/Include/cmsis_gcc.h \
- ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h
+ ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ /home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329/ltr329.h \
+ ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
+ ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
+ ../Core/Inc/i2c.h
 
 ../Core/Inc/config.h:
 
@@ -22,3 +26,11 @@ Core/Src/config.o: ../Core/Src/config.c ../Core/Inc/config.h \
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
 
 ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+/home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329/ltr329.h:
+
+../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
+
+../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
+
+../Core/Inc/i2c.h:
diff --git a/fw/Debug/Core/Src/config.o b/fw/Debug/Core/Src/config.o
index bc1ea56..15fb6a7 100644
Binary files a/fw/Debug/Core/Src/config.o and b/fw/Debug/Core/Src/config.o differ
diff --git a/fw/Debug/Core/Src/config.su b/fw/Debug/Core/Src/config.su
index 48bcb7f..d2b2412 100644
--- a/fw/Debug/Core/Src/config.su
+++ b/fw/Debug/Core/Src/config.su
@@ -1,7 +1,7 @@
 config.c:43:8:config_read	16	static
-config.c:70:8:config_write	16	static
-config.c:135:15:eeprom_lock	24	static
-config.c:165:15:eeprom_unlock	24	static
-config.c:198:15:eeprom_program_byte	16	static
-config.c:213:15:eeprom_program_halfword	16	static
-config.c:229:15:eeprom_program_word	16	static
+config.c:58:8:config_write	16	static
+config.c:88:15:eeprom_lock	24	static
+config.c:118:15:eeprom_unlock	24	static
+config.c:151:15:eeprom_program_byte	16	static
+config.c:166:15:eeprom_program_halfword	16	static
+config.c:182:15:eeprom_program_word	16	static
diff --git a/fw/Debug/Core/Src/crc8.d b/fw/Debug/Core/Src/crc8.d
deleted file mode 100644
index 8c3a7ee..0000000
--- a/fw/Debug/Core/Src/crc8.d
+++ /dev/null
@@ -1,3 +0,0 @@
-Core/Src/crc8.o: ../Core/Src/crc8.c ../Core/Inc/crc8.h
-
-../Core/Inc/crc8.h:
diff --git a/fw/Debug/Core/Src/crc8.o b/fw/Debug/Core/Src/crc8.o
deleted file mode 100644
index ed3b814..0000000
Binary files a/fw/Debug/Core/Src/crc8.o and /dev/null differ
diff --git a/fw/Debug/Core/Src/ltr329.d b/fw/Debug/Core/Src/ltr329.d
deleted file mode 100644
index 3451003..0000000
--- a/fw/Debug/Core/Src/ltr329.d
+++ /dev/null
@@ -1,83 +0,0 @@
-Core/Src/ltr329.o: ../Core/Src/ltr329.c ../Core/Inc/ltr329.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
- ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
- ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h \
- ../Drivers/CMSIS/Include/core_cm0plus.h \
- ../Drivers/CMSIS/Include/cmsis_version.h \
- ../Drivers/CMSIS/Include/cmsis_compiler.h \
- ../Drivers/CMSIS/Include/cmsis_gcc.h \
- ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
- ../Core/Inc/i2c.h ../Core/Inc/main.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_iwdg.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
- ../Core/Inc/sht4x.h ../Core/Inc/crc8.h ../Core/Inc/ltr329.h \
- ../Core/Inc/modbus.h ../Core/Inc/config.h
-
-../Core/Inc/ltr329.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
-
-../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
-
-../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h:
-
-../Drivers/CMSIS/Include/core_cm0plus.h:
-
-../Drivers/CMSIS/Include/cmsis_version.h:
-
-../Drivers/CMSIS/Include/cmsis_compiler.h:
-
-../Drivers/CMSIS/Include/cmsis_gcc.h:
-
-../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
-
-../Core/Inc/i2c.h:
-
-../Core/Inc/main.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_iwdg.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h:
-
-../Core/Inc/sht4x.h:
-
-../Core/Inc/crc8.h:
-
-../Core/Inc/ltr329.h:
-
-../Core/Inc/modbus.h:
-
-../Core/Inc/config.h:
diff --git a/fw/Debug/Core/Src/ltr329.o b/fw/Debug/Core/Src/ltr329.o
deleted file mode 100644
index b1fb5f6..0000000
Binary files a/fw/Debug/Core/Src/ltr329.o and /dev/null differ
diff --git a/fw/Debug/Core/Src/ltr329.su b/fw/Debug/Core/Src/ltr329.su
index 8609a1a..e69de29 100644
--- a/fw/Debug/Core/Src/ltr329.su
+++ b/fw/Debug/Core/Src/ltr329.su
@@ -1,8 +0,0 @@
-ltr329.c:10:15:ltr329_read_register	40	static
-ltr329.c:38:15:ltr329_write_register	32	static
-ltr329.c:56:8:ltr329_write_settings	32	static
-ltr329.c:75:8:ltr329_read_settings	48	static
-ltr329.c:108:8:ltr329_sw_reset	24	static
-ltr329.c:120:8:ltr329_measure	24	static
-ltr329.c:150:8:ltr329_read_status_register	40	static
-ltr329.c:188:8:ltr329_read_device_info	32	static
diff --git a/fw/Debug/Core/Src/main.d b/fw/Debug/Core/Src/main.d
index 8e2f4fd..78d7757 100644
--- a/fw/Debug/Core/Src/main.d
+++ b/fw/Debug/Core/Src/main.d
@@ -20,8 +20,12 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
  ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h \
  ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h \
  ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
- ../Core/Inc/i2c.h ../Core/Inc/sht4x.h ../Core/Inc/crc8.h \
- ../Core/Inc/ltr329.h ../Core/Inc/modbus.h ../Core/Inc/config.h
+ ../Core/Inc/i2c.h \
+ /home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x/sht4x.h \
+ /home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329/ltr329.h \
+ ../Core/Inc/i2c.h \
+ /home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus/modbus.h \
+ ../Core/Inc/config.h
 
 ../Core/Inc/main.h:
 
@@ -69,12 +73,12 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
 
 ../Core/Inc/i2c.h:
 
-../Core/Inc/sht4x.h:
+/home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x/sht4x.h:
 
-../Core/Inc/crc8.h:
+/home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329/ltr329.h:
 
-../Core/Inc/ltr329.h:
+../Core/Inc/i2c.h:
 
-../Core/Inc/modbus.h:
+/home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus/modbus.h:
 
 ../Core/Inc/config.h:
diff --git a/fw/Debug/Core/Src/main.o b/fw/Debug/Core/Src/main.o
index 496c6ac..4ccf3de 100644
Binary files a/fw/Debug/Core/Src/main.o and b/fw/Debug/Core/Src/main.o differ
diff --git a/fw/Debug/Core/Src/main.su b/fw/Debug/Core/Src/main.su
index 4939b09..ae64885 100644
--- a/fw/Debug/Core/Src/main.su
+++ b/fw/Debug/Core/Src/main.su
@@ -57,16 +57,26 @@ stm32l0xx_ll_usart.h:2996:22:LL_USART_EnableIT_RXNE	32	static,ignoring_inline_as
 stm32l0xx_ll_usart.h:3145:22:LL_USART_DisableIT_IDLE	32	static,ignoring_inline_asm
 stm32l0xx_ll_usart.h:3156:22:LL_USART_DisableIT_RXNE	32	static,ignoring_inline_asm
 stm32l0xx_ll_usart.h:3639:22:LL_USART_TransmitData9	16	static
-main.c:135:5:main	32	static
-main.c:316:6:SystemClock_Config	8	static
-main.c:369:13:MX_I2C1_Init	72	static
-main.c:432:13:MX_IWDG_Init	8	static
-main.c:462:13:MX_TIM21_Init	24	static
-main.c:501:13:MX_USART2_UART_Init	72	static
-main.c:586:13:MX_GPIO_Init	8	static
-main.c:595:6:USART2_TX_Buffer	24	static,ignoring_inline_asm
-main.c:606:8:uart_disable_interrupts	8	static
-main.c:615:8:uart_enable_interrupts	8	static
-main.c:624:8:modbus_slave_callback	32	static
-main.c:709:8:modbus_transmit_function	16	static
-main.c:721:6:Error_Handler	8	static,ignoring_inline_asm
+main.c:129:8:sht4x_i2c_transmit	32	static
+main.c:134:8:sht4x_i2c_receive	32	static
+main.c:139:9:sensirion_crc8_calculate	16	static
+main.c:144:8:sht4x_disable_interrupts	8	static
+main.c:149:8:sht4x_enable_interrupts	8	static
+main.c:154:8:ltr329_i2c_transmit	32	static
+main.c:158:8:ltr329_i2c_receive	32	static
+main.c:163:8:ltr329_disable_interrupts	8	static
+main.c:168:8:ltr329_enable_interrupts	8	static
+main.c:173:6:delay_ms	16	static
+main.c:183:5:main	32	static
+main.c:374:6:SystemClock_Config	8	static
+main.c:427:13:MX_I2C1_Init	72	static
+main.c:490:13:MX_IWDG_Init	8	static
+main.c:520:13:MX_TIM21_Init	24	static
+main.c:559:13:MX_USART2_UART_Init	72	static
+main.c:644:13:MX_GPIO_Init	8	static
+main.c:653:6:USART2_TX_Buffer	24	static,ignoring_inline_asm
+main.c:664:8:uart_disable_interrupts	8	static
+main.c:673:8:uart_enable_interrupts	8	static
+main.c:682:8:modbus_slave_callback	32	static
+main.c:839:8:modbus_transmit_function	16	static
+main.c:851:6:Error_Handler	8	static,ignoring_inline_asm
diff --git a/fw/Debug/Core/Src/modbus.d b/fw/Debug/Core/Src/modbus.d
deleted file mode 100644
index 0071433..0000000
--- a/fw/Debug/Core/Src/modbus.d
+++ /dev/null
@@ -1,3 +0,0 @@
-Core/Src/modbus.o: ../Core/Src/modbus.c ../Core/Inc/modbus.h
-
-../Core/Inc/modbus.h:
diff --git a/fw/Debug/Core/Src/modbus.o b/fw/Debug/Core/Src/modbus.o
deleted file mode 100644
index cf2f3fa..0000000
Binary files a/fw/Debug/Core/Src/modbus.o and /dev/null differ
diff --git a/fw/Debug/Core/Src/sht4x.d b/fw/Debug/Core/Src/sht4x.d
deleted file mode 100644
index 90a7801..0000000
--- a/fw/Debug/Core/Src/sht4x.d
+++ /dev/null
@@ -1,83 +0,0 @@
-Core/Src/sht4x.o: ../Core/Src/sht4x.c ../Core/Inc/sht4x.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
- ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
- ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h \
- ../Drivers/CMSIS/Include/core_cm0plus.h \
- ../Drivers/CMSIS/Include/cmsis_version.h \
- ../Drivers/CMSIS/Include/cmsis_compiler.h \
- ../Drivers/CMSIS/Include/cmsis_gcc.h \
- ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
- ../Core/Inc/i2c.h ../Core/Inc/crc8.h ../Core/Inc/main.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_iwdg.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h \
- ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
- ../Core/Inc/sht4x.h ../Core/Inc/ltr329.h ../Core/Inc/modbus.h \
- ../Core/Inc/config.h
-
-../Core/Inc/sht4x.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
-
-../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
-
-../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h:
-
-../Drivers/CMSIS/Include/core_cm0plus.h:
-
-../Drivers/CMSIS/Include/cmsis_version.h:
-
-../Drivers/CMSIS/Include/cmsis_compiler.h:
-
-../Drivers/CMSIS/Include/cmsis_gcc.h:
-
-../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
-
-../Core/Inc/i2c.h:
-
-../Core/Inc/crc8.h:
-
-../Core/Inc/main.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_iwdg.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_crs.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_system.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_exti.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_cortex.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_pwr.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_dma.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h:
-
-../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h:
-
-../Core/Inc/sht4x.h:
-
-../Core/Inc/ltr329.h:
-
-../Core/Inc/modbus.h:
-
-../Core/Inc/config.h:
diff --git a/fw/Debug/Core/Src/sht4x.o b/fw/Debug/Core/Src/sht4x.o
deleted file mode 100644
index f59a513..0000000
Binary files a/fw/Debug/Core/Src/sht4x.o and /dev/null differ
diff --git a/fw/Debug/Core/Src/sht4x.su b/fw/Debug/Core/Src/sht4x.su
index 4624627..e69de29 100644
--- a/fw/Debug/Core/Src/sht4x.su
+++ b/fw/Debug/Core/Src/sht4x.su
@@ -1,3 +0,0 @@
-sht4x.c:11:8:sht4x_send_cmd	16	static
-sht4x.c:16:8:sht4x_read_data	16	static
-sht4x.c:21:8:sht4x_measure	96	static
diff --git a/fw/Debug/Core/Src/stm32l0xx_it.d b/fw/Debug/Core/Src/stm32l0xx_it.d
index 1576e0d..e41573a 100644
--- a/fw/Debug/Core/Src/stm32l0xx_it.d
+++ b/fw/Debug/Core/Src/stm32l0xx_it.d
@@ -20,9 +20,12 @@ Core/Src/stm32l0xx_it.o: ../Core/Src/stm32l0xx_it.c ../Core/Inc/main.h \
  ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h \
  ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h \
  ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_gpio.h \
- ../Core/Inc/i2c.h ../Core/Inc/sht4x.h ../Core/Inc/crc8.h \
- ../Core/Inc/ltr329.h ../Core/Inc/modbus.h ../Core/Inc/config.h \
- ../Core/Inc/stm32l0xx_it.h ../Core/Inc/modbus.h
+ ../Core/Inc/i2c.h \
+ /home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x/sht4x.h \
+ /home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329/ltr329.h \
+ ../Core/Inc/i2c.h \
+ /home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus/modbus.h \
+ ../Core/Inc/config.h ../Core/Inc/stm32l0xx_it.h
 
 ../Core/Inc/main.h:
 
@@ -70,16 +73,14 @@ Core/Src/stm32l0xx_it.o: ../Core/Src/stm32l0xx_it.c ../Core/Inc/main.h \
 
 ../Core/Inc/i2c.h:
 
-../Core/Inc/sht4x.h:
+/home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x/sht4x.h:
 
-../Core/Inc/crc8.h:
+/home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329/ltr329.h:
 
-../Core/Inc/ltr329.h:
+../Core/Inc/i2c.h:
 
-../Core/Inc/modbus.h:
+/home/david/VelesLabs/Smart\ Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus/modbus.h:
 
 ../Core/Inc/config.h:
 
 ../Core/Inc/stm32l0xx_it.h:
-
-../Core/Inc/modbus.h:
diff --git a/fw/Debug/Core/Src/stm32l0xx_it.o b/fw/Debug/Core/Src/stm32l0xx_it.o
index d21bf48..87ca590 100644
Binary files a/fw/Debug/Core/Src/stm32l0xx_it.o and b/fw/Debug/Core/Src/stm32l0xx_it.o differ
diff --git a/fw/Debug/Core/Src/subdir.mk b/fw/Debug/Core/Src/subdir.mk
index 29a9eb4..4dbca5b 100644
--- a/fw/Debug/Core/Src/subdir.mk
+++ b/fw/Debug/Core/Src/subdir.mk
@@ -6,12 +6,8 @@
 # Add inputs and outputs from these tool invocations to the build variables 
 C_SRCS += \
 ../Core/Src/config.c \
-../Core/Src/crc8.c \
 ../Core/Src/i2c.c \
-../Core/Src/ltr329.c \
 ../Core/Src/main.c \
-../Core/Src/modbus.c \
-../Core/Src/sht4x.c \
 ../Core/Src/stm32l0xx_it.c \
 ../Core/Src/syscalls.c \
 ../Core/Src/sysmem.c \
@@ -19,12 +15,8 @@ C_SRCS += \
 
 OBJS += \
 ./Core/Src/config.o \
-./Core/Src/crc8.o \
 ./Core/Src/i2c.o \
-./Core/Src/ltr329.o \
 ./Core/Src/main.o \
-./Core/Src/modbus.o \
-./Core/Src/sht4x.o \
 ./Core/Src/stm32l0xx_it.o \
 ./Core/Src/syscalls.o \
 ./Core/Src/sysmem.o \
@@ -32,12 +24,8 @@ OBJS += \
 
 C_DEPS += \
 ./Core/Src/config.d \
-./Core/Src/crc8.d \
 ./Core/Src/i2c.d \
-./Core/Src/ltr329.d \
 ./Core/Src/main.d \
-./Core/Src/modbus.d \
-./Core/Src/sht4x.d \
 ./Core/Src/stm32l0xx_it.d \
 ./Core/Src/syscalls.d \
 ./Core/Src/sysmem.d \
@@ -46,12 +34,12 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Core/Src/%.o: ../Core/Src/%.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DDEBUG -DSTM32L031xx -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DDEBUG -DSTM32L031xx -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/crc8" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x" -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 
 clean: clean-Core-2f-Src
 
 clean-Core-2f-Src:
-	-$(RM) ./Core/Src/config.d ./Core/Src/config.o ./Core/Src/crc8.d ./Core/Src/crc8.o ./Core/Src/i2c.d ./Core/Src/i2c.o ./Core/Src/ltr329.d ./Core/Src/ltr329.o ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/modbus.d ./Core/Src/modbus.o ./Core/Src/sht4x.d ./Core/Src/sht4x.o ./Core/Src/stm32l0xx_it.d ./Core/Src/stm32l0xx_it.o ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/system_stm32l0xx.d ./Core/Src/system_stm32l0xx.o
+	-$(RM) ./Core/Src/config.d ./Core/Src/config.o ./Core/Src/i2c.d ./Core/Src/i2c.o ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/stm32l0xx_it.d ./Core/Src/stm32l0xx_it.o ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/system_stm32l0xx.d ./Core/Src/system_stm32l0xx.o
 
 .PHONY: clean-Core-2f-Src
 
diff --git a/fw/Debug/Core/Startup/subdir.mk b/fw/Debug/Core/Startup/subdir.mk
index 7ce5abc..3157e5e 100644
--- a/fw/Debug/Core/Startup/subdir.mk
+++ b/fw/Debug/Core/Startup/subdir.mk
@@ -16,7 +16,7 @@ S_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
-	arm-none-eabi-gcc -mcpu=cortex-m0plus -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<"
+	arm-none-eabi-gcc -mcpu=cortex-m0plus -g3 -DDEBUG -c -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/crc8" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x" -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<"
 
 clean: clean-Core-2f-Startup
 
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
index eab64fa..c05b913 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
@@ -40,7 +40,7 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Drivers/STM32L0xx_HAL_Driver/Src/%.o: ../Drivers/STM32L0xx_HAL_Driver/Src/%.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DDEBUG -DSTM32L031xx -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DDEBUG -DSTM32L031xx -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/crc8" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x" -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 
 clean: clean-Drivers-2f-STM32L0xx_HAL_Driver-2f-Src
 
diff --git a/fw/Debug/Libs/crc8/crc8.d b/fw/Debug/Libs/crc8/crc8.d
new file mode 100644
index 0000000..92ecc9f
--- /dev/null
+++ b/fw/Debug/Libs/crc8/crc8.d
@@ -0,0 +1,3 @@
+Libs/crc8/crc8.o: ../Libs/crc8/crc8.c ../Libs/crc8/crc8.h
+
+../Libs/crc8/crc8.h:
diff --git a/fw/Debug/Libs/crc8/crc8.o b/fw/Debug/Libs/crc8/crc8.o
new file mode 100644
index 0000000..3c85d66
Binary files /dev/null and b/fw/Debug/Libs/crc8/crc8.o differ
diff --git a/fw/Debug/Libs/crc8/crc8.su b/fw/Debug/Libs/crc8/crc8.su
new file mode 100644
index 0000000..a1c3f04
--- /dev/null
+++ b/fw/Debug/Libs/crc8/crc8.su
@@ -0,0 +1 @@
+crc8.c:14:9:crc8_calculate	24	static
diff --git a/fw/Debug/Libs/crc8/subdir.mk b/fw/Debug/Libs/crc8/subdir.mk
new file mode 100644
index 0000000..9a1b009
--- /dev/null
+++ b/fw/Debug/Libs/crc8/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Libs/crc8/crc8.c 
+
+OBJS += \
+./Libs/crc8/crc8.o 
+
+C_DEPS += \
+./Libs/crc8/crc8.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Libs/crc8/%.o: ../Libs/crc8/%.c Libs/crc8/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DDEBUG -DSTM32L031xx -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/crc8" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x" -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+
+clean: clean-Libs-2f-crc8
+
+clean-Libs-2f-crc8:
+	-$(RM) ./Libs/crc8/crc8.d ./Libs/crc8/crc8.o
+
+.PHONY: clean-Libs-2f-crc8
+
diff --git a/fw/Debug/Libs/ltr329/ltr329.d b/fw/Debug/Libs/ltr329/ltr329.d
new file mode 100644
index 0000000..ae97e45
--- /dev/null
+++ b/fw/Debug/Libs/ltr329/ltr329.d
@@ -0,0 +1,33 @@
+Libs/ltr329/ltr329.o: ../Libs/ltr329/ltr329.c ../Libs/ltr329/ltr329.h \
+ ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h \
+ ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h \
+ ../Drivers/CMSIS/Include/core_cm0plus.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \
+ ../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h \
+ ../Core/Inc/i2c.h
+
+../Libs/ltr329/ltr329.h:
+
+../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h:
+
+../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h:
+
+../Drivers/CMSIS/Include/core_cm0plus.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h:
+
+../Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_utils.h:
+
+../Core/Inc/i2c.h:
diff --git a/fw/Debug/Libs/ltr329/ltr329.o b/fw/Debug/Libs/ltr329/ltr329.o
new file mode 100644
index 0000000..ed029cd
Binary files /dev/null and b/fw/Debug/Libs/ltr329/ltr329.o differ
diff --git a/fw/Debug/Libs/ltr329/ltr329.su b/fw/Debug/Libs/ltr329/ltr329.su
new file mode 100644
index 0000000..39157f3
--- /dev/null
+++ b/fw/Debug/Libs/ltr329/ltr329.su
@@ -0,0 +1,8 @@
+ltr329.c:22:15:ltr329_read_register	40	static
+ltr329.c:50:15:ltr329_write_register	32	static
+ltr329.c:68:8:ltr329_write_settings	32	static
+ltr329.c:87:8:ltr329_read_settings	48	static
+ltr329.c:120:8:ltr329_sw_reset	24	static
+ltr329.c:132:8:ltr329_measure	24	static
+ltr329.c:162:8:ltr329_read_status_register	40	static
+ltr329.c:200:8:ltr329_read_device_info	32	static
diff --git a/fw/Debug/Libs/ltr329/subdir.mk b/fw/Debug/Libs/ltr329/subdir.mk
new file mode 100644
index 0000000..f7ed346
--- /dev/null
+++ b/fw/Debug/Libs/ltr329/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Libs/ltr329/ltr329.c 
+
+OBJS += \
+./Libs/ltr329/ltr329.o 
+
+C_DEPS += \
+./Libs/ltr329/ltr329.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Libs/ltr329/%.o: ../Libs/ltr329/%.c Libs/ltr329/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DDEBUG -DSTM32L031xx -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/crc8" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x" -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+
+clean: clean-Libs-2f-ltr329
+
+clean-Libs-2f-ltr329:
+	-$(RM) ./Libs/ltr329/ltr329.d ./Libs/ltr329/ltr329.o
+
+.PHONY: clean-Libs-2f-ltr329
+
diff --git a/fw/Debug/Libs/modbus/modbus.d b/fw/Debug/Libs/modbus/modbus.d
new file mode 100644
index 0000000..40756b6
--- /dev/null
+++ b/fw/Debug/Libs/modbus/modbus.d
@@ -0,0 +1,3 @@
+Libs/modbus/modbus.o: ../Libs/modbus/modbus.c ../Libs/modbus/modbus.h
+
+../Libs/modbus/modbus.h:
diff --git a/fw/Debug/Libs/modbus/modbus.o b/fw/Debug/Libs/modbus/modbus.o
new file mode 100644
index 0000000..ad4720a
Binary files /dev/null and b/fw/Debug/Libs/modbus/modbus.o differ
diff --git a/fw/Debug/Libs/modbus/modbus.su b/fw/Debug/Libs/modbus/modbus.su
new file mode 100644
index 0000000..aea08e5
--- /dev/null
+++ b/fw/Debug/Libs/modbus/modbus.su
@@ -0,0 +1,8 @@
+modbus.c:33:10:modbus_CRC16	32	static
+modbus.c:57:16:modbus_fill_device_id_objects	40	static
+modbus.c:107:15:modbus_transaction_to_buffer	56	static
+modbus.c:170:15:modbus_process_device_id_request	32	static
+modbus.c:217:15:modbus_process_read_write_request	40	static
+modbus.c:341:8:modbus_slave_set_address	16	static
+modbus.c:352:8:modbus_slave_process_msg	312	static
+modbus.c:408:8:modbus_slave_init_device_id	16	static
diff --git a/fw/Debug/Libs/modbus/subdir.mk b/fw/Debug/Libs/modbus/subdir.mk
new file mode 100644
index 0000000..c86d040
--- /dev/null
+++ b/fw/Debug/Libs/modbus/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Libs/modbus/modbus.c 
+
+OBJS += \
+./Libs/modbus/modbus.o 
+
+C_DEPS += \
+./Libs/modbus/modbus.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Libs/modbus/%.o: ../Libs/modbus/%.c Libs/modbus/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DDEBUG -DSTM32L031xx -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/crc8" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x" -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+
+clean: clean-Libs-2f-modbus
+
+clean-Libs-2f-modbus:
+	-$(RM) ./Libs/modbus/modbus.d ./Libs/modbus/modbus.o
+
+.PHONY: clean-Libs-2f-modbus
+
diff --git a/fw/Debug/Libs/sht4x/sht4x.d b/fw/Debug/Libs/sht4x/sht4x.d
new file mode 100644
index 0000000..440aeb5
--- /dev/null
+++ b/fw/Debug/Libs/sht4x/sht4x.d
@@ -0,0 +1,3 @@
+Libs/sht4x/sht4x.o: ../Libs/sht4x/sht4x.c ../Libs/sht4x/sht4x.h
+
+../Libs/sht4x/sht4x.h:
diff --git a/fw/Debug/Libs/sht4x/sht4x.o b/fw/Debug/Libs/sht4x/sht4x.o
new file mode 100644
index 0000000..6ebbaf7
Binary files /dev/null and b/fw/Debug/Libs/sht4x/sht4x.o differ
diff --git a/fw/Debug/Libs/sht4x/sht4x.su b/fw/Debug/Libs/sht4x/sht4x.su
new file mode 100644
index 0000000..29401c8
--- /dev/null
+++ b/fw/Debug/Libs/sht4x/sht4x.su
@@ -0,0 +1,3 @@
+sht4x.c:29:8:sht4x_send_cmd	16	static
+sht4x.c:34:8:sht4x_read_data	16	static
+sht4x.c:39:8:sht4x_measure	96	static
diff --git a/fw/Debug/Libs/sht4x/subdir.mk b/fw/Debug/Libs/sht4x/subdir.mk
new file mode 100644
index 0000000..930dfd3
--- /dev/null
+++ b/fw/Debug/Libs/sht4x/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Libs/sht4x/sht4x.c 
+
+OBJS += \
+./Libs/sht4x/sht4x.o 
+
+C_DEPS += \
+./Libs/sht4x/sht4x.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Libs/sht4x/%.o: ../Libs/sht4x/%.c Libs/sht4x/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DDEBUG -DSTM32L031xx -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DMSI_VALUE=2097000 -DHSI_VALUE=16000000 -DLSI_VALUE=37000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=0 -DINSTRUCTION_CACHE_ENABLE=1 -DDATA_CACHE_ENABLE=1 -c -I../Core/Inc -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/crc8" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/ltr329" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/modbus" -I"/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Libs/sht4x" -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+
+clean: clean-Libs-2f-sht4x
+
+clean-Libs-2f-sht4x:
+	-$(RM) ./Libs/sht4x/sht4x.d ./Libs/sht4x/sht4x.o
+
+.PHONY: clean-Libs-2f-sht4x
+
diff --git a/fw/Debug/makefile b/fw/Debug/makefile
index b242be0..c140656 100644
--- a/fw/Debug/makefile
+++ b/fw/Debug/makefile
@@ -9,6 +9,10 @@ RM := rm -rf
 
 # All of the sources participating in the build are defined here
 -include sources.mk
+-include Libs/sht4x/subdir.mk
+-include Libs/modbus/subdir.mk
+-include Libs/ltr329/subdir.mk
+-include Libs/crc8/subdir.mk
 -include Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
 -include Core/Startup/subdir.mk
 -include Core/Src/subdir.mk
diff --git a/fw/Debug/objects.list b/fw/Debug/objects.list
index b27f206..e5ca551 100644
--- a/fw/Debug/objects.list
+++ b/fw/Debug/objects.list
@@ -1,10 +1,6 @@
 "./Core/Src/config.o"
-"./Core/Src/crc8.o"
 "./Core/Src/i2c.o"
-"./Core/Src/ltr329.o"
 "./Core/Src/main.o"
-"./Core/Src/modbus.o"
-"./Core/Src/sht4x.o"
 "./Core/Src/stm32l0xx_it.o"
 "./Core/Src/syscalls.o"
 "./Core/Src/sysmem.o"
@@ -19,3 +15,7 @@
 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o"
 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o"
 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o"
+"./Libs/crc8/crc8.o"
+"./Libs/ltr329/ltr329.o"
+"./Libs/modbus/modbus.o"
+"./Libs/sht4x/sht4x.o"
diff --git a/fw/Debug/rht_wired_sensor.bin b/fw/Debug/rht_wired_sensor.bin
index 19602bb..aba9358 100755
Binary files a/fw/Debug/rht_wired_sensor.bin and b/fw/Debug/rht_wired_sensor.bin differ
diff --git a/fw/Debug/rht_wired_sensor.elf b/fw/Debug/rht_wired_sensor.elf
index f4755bc..8c0ab7b 100755
Binary files a/fw/Debug/rht_wired_sensor.elf and b/fw/Debug/rht_wired_sensor.elf differ
diff --git a/fw/Debug/rht_wired_sensor.list b/fw/Debug/rht_wired_sensor.list
index 90472dc..b915acb 100644
--- a/fw/Debug/rht_wired_sensor.list
+++ b/fw/Debug/rht_wired_sensor.list
@@ -5,45 +5,45 @@ Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
   0 .isr_vector   000000c0  08000000  08000000  00010000  2**0
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         00003b08  080000c0  080000c0  000100c0  2**2
+  1 .text         00003e98  080000c0  080000c0  000100c0  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       000000f4  08003bc8  08003bc8  00013bc8  2**2
+  2 .rodata       00000148  08003f58  08003f58  00013f58  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  08003cbc  08003cbc  00020008  2**0
+  3 .ARM.extab    00000000  080040a0  080040a0  00020008  2**0
                   CONTENTS
-  4 .ARM          00000000  08003cbc  08003cbc  00020008  2**0
+  4 .ARM          00000000  080040a0  080040a0  00020008  2**0
                   CONTENTS
-  5 .preinit_array 00000000  08003cbc  08003cbc  00020008  2**0
+  5 .preinit_array 00000000  080040a0  080040a0  00020008  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  08003cbc  08003cbc  00013cbc  2**2
+  6 .init_array   00000004  080040a0  080040a0  000140a0  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  7 .fini_array   00000004  08003cc0  08003cc0  00013cc0  2**2
+  7 .fini_array   00000004  080040a4  080040a4  000140a4  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  8 .data         00000008  20000000  08003cc4  00020000  2**2
+  8 .data         00000008  20000000  080040a8  00020000  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          0000017c  20000008  08003ccc  00020008  2**2
+  9 .bss          00000174  20000008  080040b0  00020008  2**2
                   ALLOC
- 10 ._user_heap_stack 00000604  20000184  08003ccc  00020184  2**0
+ 10 ._user_heap_stack 00000604  2000017c  080040b0  0002017c  2**0
                   ALLOC
  11 .ARM.attributes 00000028  00000000  00000000  00020008  2**0
                   CONTENTS, READONLY
- 12 .debug_info   0000a894  00000000  00000000  00020030  2**0
+ 12 .debug_info   00009636  00000000  00000000  00020030  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00001f3c  00000000  00000000  0002a8c4  2**0
+ 13 .debug_abbrev 00001d62  00000000  00000000  00029666  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 00000988  00000000  00000000  0002c800  2**3
+ 14 .debug_aranges 000009d8  00000000  00000000  0002b3c8  2**3
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_ranges 00000890  00000000  00000000  0002d188  2**3
+ 15 .debug_ranges 000008e0  00000000  00000000  0002bda0  2**3
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro  0000dc07  00000000  00000000  0002da18  2**0
+ 16 .debug_macro  0000d7a8  00000000  00000000  0002c680  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line   00007bf1  00000000  00000000  0003b61f  2**0
+ 17 .debug_line   000079e5  00000000  00000000  00039e28  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str    00044c4f  00000000  00000000  00043210  2**0
+ 18 .debug_str    00044d2a  00000000  00000000  0004180d  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment      00000053  00000000  00000000  00087e5f  2**0
+ 19 .comment      00000053  00000000  00000000  00086537  2**0
                   CONTENTS, READONLY
- 20 .debug_frame  000020e4  00000000  00000000  00087eb4  2**2
+ 20 .debug_frame  00002214  00000000  00000000  0008658c  2**2
                   CONTENTS, READONLY, DEBUGGING, OCTETS
 
 Disassembly of section .text:
@@ -65,7 +65,7 @@ Disassembly of section .text:
  80000da:	bd10      	pop	{r4, pc}
  80000dc:	20000008 	.word	0x20000008
  80000e0:	00000000 	.word	0x00000000
- 80000e4:	08003bb0 	.word	0x08003bb0
+ 80000e4:	08003f40 	.word	0x08003f40
 
 080000e8 <frame_dummy>:
  80000e8:	4b04      	ldr	r3, [pc, #16]	; (80000fc <frame_dummy+0x14>)
@@ -80,7 +80,7 @@ Disassembly of section .text:
  80000fa:	46c0      	nop			; (mov r8, r8)
  80000fc:	00000000 	.word	0x00000000
  8000100:	2000000c 	.word	0x2000000c
- 8000104:	08003bb0 	.word	0x08003bb0
+ 8000104:	08003f40 	.word	0x08003f40
 
 08000108 <strlen>:
  8000108:	2300      	movs	r3, #0
@@ -486,9857 +486,10456 @@ int8_t config_read(config_t *config)
  8000408:	af00      	add	r7, sp, #0
  800040a:	6078      	str	r0, [r7, #4]
 	config->modbus_addr = *(uint16_t *) (CONFIG_EEPROM_ADDR_MODBUS_ADDR);
- 800040c:	4b1d      	ldr	r3, [pc, #116]	; (8000484 <config_read+0x80>)
+ 800040c:	4b0a      	ldr	r3, [pc, #40]	; (8000438 <config_read+0x34>)
  800040e:	881a      	ldrh	r2, [r3, #0]
  8000410:	687b      	ldr	r3, [r7, #4]
- 8000412:	819a      	strh	r2, [r3, #12]
+ 8000412:	809a      	strh	r2, [r3, #4]
 	config->baudrate_index = *(uint16_t *) (CONFIG_EEPROM_ADDR_BAUDRATE_INDEX);
- 8000414:	4b1c      	ldr	r3, [pc, #112]	; (8000488 <config_read+0x84>)
+ 8000414:	4b09      	ldr	r3, [pc, #36]	; (800043c <config_read+0x38>)
  8000416:	881b      	ldrh	r3, [r3, #0]
  8000418:	001a      	movs	r2, r3
  800041a:	687b      	ldr	r3, [r7, #4]
- 800041c:	611a      	str	r2, [r3, #16]
-	config->led_on = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ON);
- 800041e:	4b1b      	ldr	r3, [pc, #108]	; (800048c <config_read+0x88>)
- 8000420:	881b      	ldrh	r3, [r3, #0]
- 8000422:	b2da      	uxtb	r2, r3
- 8000424:	687b      	ldr	r3, [r7, #4]
- 8000426:	701a      	strb	r2, [r3, #0]
-	config->led_brightness = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_BRIGHTNESS);
- 8000428:	4b19      	ldr	r3, [pc, #100]	; (8000490 <config_read+0x8c>)
- 800042a:	881a      	ldrh	r2, [r3, #0]
- 800042c:	687b      	ldr	r3, [r7, #4]
- 800042e:	805a      	strh	r2, [r3, #2]
-	config->led_smooth = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_SMOOTH);
- 8000430:	4b18      	ldr	r3, [pc, #96]	; (8000494 <config_read+0x90>)
- 8000432:	881b      	ldrh	r3, [r3, #0]
- 8000434:	b2da      	uxtb	r2, r3
- 8000436:	687b      	ldr	r3, [r7, #4]
- 8000438:	711a      	strb	r2, [r3, #4]
-	config->led_co2_alert_limit1 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT1);
- 800043a:	4b17      	ldr	r3, [pc, #92]	; (8000498 <config_read+0x94>)
- 800043c:	881a      	ldrh	r2, [r3, #0]
- 800043e:	687b      	ldr	r3, [r7, #4]
- 8000440:	80da      	strh	r2, [r3, #6]
-	config->led_co2_alert_limit2 = *(uint16_t *) (CONFIG_EEPROM_ADDR_LED_ALERT2);
- 8000442:	4b16      	ldr	r3, [pc, #88]	; (800049c <config_read+0x98>)
- 8000444:	881a      	ldrh	r2, [r3, #0]
- 8000446:	687b      	ldr	r3, [r7, #4]
- 8000448:	811a      	strh	r2, [r3, #8]
-	config->scd4x_t_offset = *(int16_t *) (CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET);
- 800044a:	4b15      	ldr	r3, [pc, #84]	; (80004a0 <config_read+0x9c>)
- 800044c:	2200      	movs	r2, #0
- 800044e:	5e9a      	ldrsh	r2, [r3, r2]
- 8000450:	687b      	ldr	r3, [r7, #4]
- 8000452:	815a      	strh	r2, [r3, #10]
-	 *  LED ON
-	 *  LED SMOOTH
-	 *  SCD4x T OFFSET
+ 800041c:	609a      	str	r2, [r3, #8]
+
+	/* Check if the EEPROM is initialized - do not check:
 	 *  BAUDRATE INDEX
 	 *  those can be 0 */
-	if ((config->modbus_addr 			== EEPROM_EMPTY_BYTE) ||
- 8000454:	687b      	ldr	r3, [r7, #4]
- 8000456:	899b      	ldrh	r3, [r3, #12]
- 8000458:	2b00      	cmp	r3, #0
- 800045a:	d00b      	beq.n	8000474 <config_read+0x70>
-		(config->led_co2_alert_limit1 	== EEPROM_EMPTY_BYTE) ||
- 800045c:	687b      	ldr	r3, [r7, #4]
- 800045e:	88db      	ldrh	r3, [r3, #6]
-	if ((config->modbus_addr 			== EEPROM_EMPTY_BYTE) ||
- 8000460:	2b00      	cmp	r3, #0
- 8000462:	d007      	beq.n	8000474 <config_read+0x70>
-		(config->led_co2_alert_limit2 	== EEPROM_EMPTY_BYTE) ||
- 8000464:	687b      	ldr	r3, [r7, #4]
- 8000466:	891b      	ldrh	r3, [r3, #8]
-		(config->led_co2_alert_limit1 	== EEPROM_EMPTY_BYTE) ||
- 8000468:	2b00      	cmp	r3, #0
- 800046a:	d003      	beq.n	8000474 <config_read+0x70>
-		(config->led_brightness 		== EEPROM_EMPTY_BYTE))
- 800046c:	687b      	ldr	r3, [r7, #4]
- 800046e:	885b      	ldrh	r3, [r3, #2]
-		(config->led_co2_alert_limit2 	== EEPROM_EMPTY_BYTE) ||
- 8000470:	2b00      	cmp	r3, #0
- 8000472:	d102      	bne.n	800047a <config_read+0x76>
+	if (config->modbus_addr == EEPROM_EMPTY_BYTE)
+ 800041e:	687b      	ldr	r3, [r7, #4]
+ 8000420:	889b      	ldrh	r3, [r3, #4]
+ 8000422:	2b00      	cmp	r3, #0
+ 8000424:	d102      	bne.n	800042c <config_read+0x28>
 	{
 		return CONFIG_ERROR;
- 8000474:	2301      	movs	r3, #1
- 8000476:	425b      	negs	r3, r3
- 8000478:	e000      	b.n	800047c <config_read+0x78>
+ 8000426:	2301      	movs	r3, #1
+ 8000428:	425b      	negs	r3, r3
+ 800042a:	e000      	b.n	800042e <config_read+0x2a>
 	}
 	return CONFIG_OK;
- 800047a:	2300      	movs	r3, #0
+ 800042c:	2300      	movs	r3, #0
 }
- 800047c:	0018      	movs	r0, r3
- 800047e:	46bd      	mov	sp, r7
- 8000480:	b002      	add	sp, #8
- 8000482:	bd80      	pop	{r7, pc}
- 8000484:	08080000 	.word	0x08080000
- 8000488:	08080002 	.word	0x08080002
- 800048c:	08080004 	.word	0x08080004
- 8000490:	08080006 	.word	0x08080006
- 8000494:	08080008 	.word	0x08080008
- 8000498:	0808000a 	.word	0x0808000a
- 800049c:	0808000c 	.word	0x0808000c
- 80004a0:	0808000e 	.word	0x0808000e
+ 800042e:	0018      	movs	r0, r3
+ 8000430:	46bd      	mov	sp, r7
+ 8000432:	b002      	add	sp, #8
+ 8000434:	bd80      	pop	{r7, pc}
+ 8000436:	46c0      	nop			; (mov r8, r8)
+ 8000438:	08080000 	.word	0x08080000
+ 800043c:	08080002 	.word	0x08080002
 
-080004a4 <config_write>:
+08000440 <config_write>:
 
 int8_t config_write(config_t *config)
 {
- 80004a4:	b580      	push	{r7, lr}
- 80004a6:	b082      	sub	sp, #8
- 80004a8:	af00      	add	r7, sp, #0
- 80004aa:	6078      	str	r0, [r7, #4]
+ 8000440:	b580      	push	{r7, lr}
+ 8000442:	b082      	sub	sp, #8
+ 8000444:	af00      	add	r7, sp, #0
+ 8000446:	6078      	str	r0, [r7, #4]
 	/* Unlock the EEPROM */
 	if (eeprom_unlock() != EEPROM_OK)
- 80004ac:	f000 f8cc 	bl	8000648 <eeprom_unlock>
- 80004b0:	1e03      	subs	r3, r0, #0
- 80004b2:	d002      	beq.n	80004ba <config_write+0x16>
+ 8000448:	f000 f876 	bl	8000538 <eeprom_unlock>
+ 800044c:	1e03      	subs	r3, r0, #0
+ 800044e:	d002      	beq.n	8000456 <config_write+0x16>
 	{
 		return EEPROM_UNLOCK_ERROR;
- 80004b4:	2302      	movs	r3, #2
- 80004b6:	425b      	negs	r3, r3
- 80004b8:	e070      	b.n	800059c <config_write+0xf8>
+ 8000450:	2302      	movs	r3, #2
+ 8000452:	425b      	negs	r3, r3
+ 8000454:	e026      	b.n	80004a4 <config_write+0x64>
 	}
 	/* Reset the ERASE and DATA bits in the FLASH_PECR register to disable any residual erase */
 	FLASH->PECR = FLASH->PECR & ~(FLASH_PECR_ERASE | FLASH_PECR_DATA);
- 80004ba:	4b3a      	ldr	r3, [pc, #232]	; (80005a4 <config_write+0x100>)
- 80004bc:	685a      	ldr	r2, [r3, #4]
- 80004be:	4b39      	ldr	r3, [pc, #228]	; (80005a4 <config_write+0x100>)
- 80004c0:	4939      	ldr	r1, [pc, #228]	; (80005a8 <config_write+0x104>)
- 80004c2:	400a      	ands	r2, r1
- 80004c4:	605a      	str	r2, [r3, #4]
+ 8000456:	4b15      	ldr	r3, [pc, #84]	; (80004ac <config_write+0x6c>)
+ 8000458:	685a      	ldr	r2, [r3, #4]
+ 800045a:	4b14      	ldr	r3, [pc, #80]	; (80004ac <config_write+0x6c>)
+ 800045c:	4914      	ldr	r1, [pc, #80]	; (80004b0 <config_write+0x70>)
+ 800045e:	400a      	ands	r2, r1
+ 8000460:	605a      	str	r2, [r3, #4]
 
 	/* Write MODBUS ADDRESS */
 	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_MODBUS_ADDR, config->modbus_addr)  != EEPROM_OK)
- 80004c6:	687b      	ldr	r3, [r7, #4]
- 80004c8:	899b      	ldrh	r3, [r3, #12]
- 80004ca:	4a38      	ldr	r2, [pc, #224]	; (80005ac <config_write+0x108>)
- 80004cc:	0019      	movs	r1, r3
- 80004ce:	0010      	movs	r0, r2
- 80004d0:	f000 f928 	bl	8000724 <eeprom_program_halfword>
- 80004d4:	1e03      	subs	r3, r0, #0
- 80004d6:	d002      	beq.n	80004de <config_write+0x3a>
+ 8000462:	687b      	ldr	r3, [r7, #4]
+ 8000464:	889b      	ldrh	r3, [r3, #4]
+ 8000466:	4a13      	ldr	r2, [pc, #76]	; (80004b4 <config_write+0x74>)
+ 8000468:	0019      	movs	r1, r3
+ 800046a:	0010      	movs	r0, r2
+ 800046c:	f000 f8aa 	bl	80005c4 <eeprom_program_halfword>
+ 8000470:	1e03      	subs	r3, r0, #0
+ 8000472:	d002      	beq.n	800047a <config_write+0x3a>
 	{
 		return EEPROM_WRITE_ERROR;
- 80004d8:	2304      	movs	r3, #4
- 80004da:	425b      	negs	r3, r3
- 80004dc:	e05e      	b.n	800059c <config_write+0xf8>
+ 8000474:	2304      	movs	r3, #4
+ 8000476:	425b      	negs	r3, r3
+ 8000478:	e014      	b.n	80004a4 <config_write+0x64>
 	}
+
 	/* Write BAUDRATE */
 	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_BAUDRATE_INDEX, config->baudrate_index)  != EEPROM_OK)
- 80004de:	687b      	ldr	r3, [r7, #4]
- 80004e0:	691b      	ldr	r3, [r3, #16]
- 80004e2:	b29b      	uxth	r3, r3
- 80004e4:	4a32      	ldr	r2, [pc, #200]	; (80005b0 <config_write+0x10c>)
- 80004e6:	0019      	movs	r1, r3
- 80004e8:	0010      	movs	r0, r2
- 80004ea:	f000 f91b 	bl	8000724 <eeprom_program_halfword>
- 80004ee:	1e03      	subs	r3, r0, #0
- 80004f0:	d002      	beq.n	80004f8 <config_write+0x54>
+ 800047a:	687b      	ldr	r3, [r7, #4]
+ 800047c:	689b      	ldr	r3, [r3, #8]
+ 800047e:	b29b      	uxth	r3, r3
+ 8000480:	4a0d      	ldr	r2, [pc, #52]	; (80004b8 <config_write+0x78>)
+ 8000482:	0019      	movs	r1, r3
+ 8000484:	0010      	movs	r0, r2
+ 8000486:	f000 f89d 	bl	80005c4 <eeprom_program_halfword>
+ 800048a:	1e03      	subs	r3, r0, #0
+ 800048c:	d002      	beq.n	8000494 <config_write+0x54>
 	{
 		return EEPROM_WRITE_ERROR;
- 80004f2:	2304      	movs	r3, #4
- 80004f4:	425b      	negs	r3, r3
- 80004f6:	e051      	b.n	800059c <config_write+0xf8>
-	}
-
-	/* Write LED ON */
-	if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_ON, config->led_on)  != EEPROM_OK)
- 80004f8:	687b      	ldr	r3, [r7, #4]
- 80004fa:	781b      	ldrb	r3, [r3, #0]
- 80004fc:	4a2d      	ldr	r2, [pc, #180]	; (80005b4 <config_write+0x110>)
- 80004fe:	0019      	movs	r1, r3
- 8000500:	0010      	movs	r0, r2
- 8000502:	f000 f8e7 	bl	80006d4 <eeprom_program_byte>
- 8000506:	1e03      	subs	r3, r0, #0
- 8000508:	d002      	beq.n	8000510 <config_write+0x6c>
-	{
-		return EEPROM_WRITE_ERROR;
- 800050a:	2304      	movs	r3, #4
- 800050c:	425b      	negs	r3, r3
- 800050e:	e045      	b.n	800059c <config_write+0xf8>
-	}
-
-	/* Write LED BRIGHTNESS */
-	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_BRIGHTNESS, config->led_brightness)  != EEPROM_OK)
- 8000510:	687b      	ldr	r3, [r7, #4]
- 8000512:	885b      	ldrh	r3, [r3, #2]
- 8000514:	4a28      	ldr	r2, [pc, #160]	; (80005b8 <config_write+0x114>)
- 8000516:	0019      	movs	r1, r3
- 8000518:	0010      	movs	r0, r2
- 800051a:	f000 f903 	bl	8000724 <eeprom_program_halfword>
- 800051e:	1e03      	subs	r3, r0, #0
- 8000520:	d002      	beq.n	8000528 <config_write+0x84>
-	{
-		return EEPROM_WRITE_ERROR;
- 8000522:	2304      	movs	r3, #4
- 8000524:	425b      	negs	r3, r3
- 8000526:	e039      	b.n	800059c <config_write+0xf8>
-	}
-
-	/* Write LED SMOOTH */
-	if (eeprom_program_byte(CONFIG_EEPROM_ADDR_LED_SMOOTH, config->led_smooth)  != EEPROM_OK)
- 8000528:	687b      	ldr	r3, [r7, #4]
- 800052a:	791b      	ldrb	r3, [r3, #4]
- 800052c:	4a23      	ldr	r2, [pc, #140]	; (80005bc <config_write+0x118>)
- 800052e:	0019      	movs	r1, r3
- 8000530:	0010      	movs	r0, r2
- 8000532:	f000 f8cf 	bl	80006d4 <eeprom_program_byte>
- 8000536:	1e03      	subs	r3, r0, #0
- 8000538:	d002      	beq.n	8000540 <config_write+0x9c>
-	{
-		return EEPROM_WRITE_ERROR;
- 800053a:	2304      	movs	r3, #4
- 800053c:	425b      	negs	r3, r3
- 800053e:	e02d      	b.n	800059c <config_write+0xf8>
-	}
-
-	/* Write LED CO2 ALERT LIMIT 1 */
-	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT1, config->led_co2_alert_limit1) != EEPROM_OK)
- 8000540:	687b      	ldr	r3, [r7, #4]
- 8000542:	88db      	ldrh	r3, [r3, #6]
- 8000544:	4a1e      	ldr	r2, [pc, #120]	; (80005c0 <config_write+0x11c>)
- 8000546:	0019      	movs	r1, r3
- 8000548:	0010      	movs	r0, r2
- 800054a:	f000 f8eb 	bl	8000724 <eeprom_program_halfword>
- 800054e:	1e03      	subs	r3, r0, #0
- 8000550:	d002      	beq.n	8000558 <config_write+0xb4>
-	{
-		return EEPROM_WRITE_ERROR;
- 8000552:	2304      	movs	r3, #4
- 8000554:	425b      	negs	r3, r3
- 8000556:	e021      	b.n	800059c <config_write+0xf8>
-	}
-
-	/* Write LED CO2 ALERT LIMIT 2 */
-	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_LED_ALERT2, config->led_co2_alert_limit2) != EEPROM_OK)
- 8000558:	687b      	ldr	r3, [r7, #4]
- 800055a:	891b      	ldrh	r3, [r3, #8]
- 800055c:	4a19      	ldr	r2, [pc, #100]	; (80005c4 <config_write+0x120>)
- 800055e:	0019      	movs	r1, r3
- 8000560:	0010      	movs	r0, r2
- 8000562:	f000 f8df 	bl	8000724 <eeprom_program_halfword>
- 8000566:	1e03      	subs	r3, r0, #0
- 8000568:	d002      	beq.n	8000570 <config_write+0xcc>
-	{
-		return EEPROM_WRITE_ERROR;
- 800056a:	2304      	movs	r3, #4
- 800056c:	425b      	negs	r3, r3
- 800056e:	e015      	b.n	800059c <config_write+0xf8>
-	}
-
-	/* Write LED SCD4x TEMPERATURE OFFSET */
-	if (eeprom_program_halfword(CONFIG_EEPROM_ADDR_SCD4x_T_OFFSET, config->scd4x_t_offset) != EEPROM_OK)
- 8000570:	687b      	ldr	r3, [r7, #4]
- 8000572:	220a      	movs	r2, #10
- 8000574:	5e9b      	ldrsh	r3, [r3, r2]
- 8000576:	b29b      	uxth	r3, r3
- 8000578:	4a13      	ldr	r2, [pc, #76]	; (80005c8 <config_write+0x124>)
- 800057a:	0019      	movs	r1, r3
- 800057c:	0010      	movs	r0, r2
- 800057e:	f000 f8d1 	bl	8000724 <eeprom_program_halfword>
- 8000582:	1e03      	subs	r3, r0, #0
- 8000584:	d002      	beq.n	800058c <config_write+0xe8>
-	{
-		return EEPROM_WRITE_ERROR;
- 8000586:	2304      	movs	r3, #4
- 8000588:	425b      	negs	r3, r3
- 800058a:	e007      	b.n	800059c <config_write+0xf8>
+ 800048e:	2304      	movs	r3, #4
+ 8000490:	425b      	negs	r3, r3
+ 8000492:	e007      	b.n	80004a4 <config_write+0x64>
 	}
 
 	/* Lock EEPROM*/
 	if (eeprom_lock() != EEPROM_OK)
- 800058c:	f000 f81e 	bl	80005cc <eeprom_lock>
- 8000590:	1e03      	subs	r3, r0, #0
- 8000592:	d002      	beq.n	800059a <config_write+0xf6>
+ 8000494:	f000 f812 	bl	80004bc <eeprom_lock>
+ 8000498:	1e03      	subs	r3, r0, #0
+ 800049a:	d002      	beq.n	80004a2 <config_write+0x62>
 	{
 		return EEPROM_LOCK_ERROR;
- 8000594:	2303      	movs	r3, #3
- 8000596:	425b      	negs	r3, r3
- 8000598:	e000      	b.n	800059c <config_write+0xf8>
+ 800049c:	2303      	movs	r3, #3
+ 800049e:	425b      	negs	r3, r3
+ 80004a0:	e000      	b.n	80004a4 <config_write+0x64>
 	}
 	return CONFIG_OK;
- 800059a:	2300      	movs	r3, #0
+ 80004a2:	2300      	movs	r3, #0
 }
- 800059c:	0018      	movs	r0, r3
- 800059e:	46bd      	mov	sp, r7
- 80005a0:	b002      	add	sp, #8
- 80005a2:	bd80      	pop	{r7, pc}
- 80005a4:	40022000 	.word	0x40022000
- 80005a8:	fffffdef 	.word	0xfffffdef
- 80005ac:	08080000 	.word	0x08080000
- 80005b0:	08080002 	.word	0x08080002
- 80005b4:	08080004 	.word	0x08080004
- 80005b8:	08080006 	.word	0x08080006
- 80005bc:	08080008 	.word	0x08080008
- 80005c0:	0808000a 	.word	0x0808000a
- 80005c4:	0808000c 	.word	0x0808000c
- 80005c8:	0808000e 	.word	0x0808000e
+ 80004a4:	0018      	movs	r0, r3
+ 80004a6:	46bd      	mov	sp, r7
+ 80004a8:	b002      	add	sp, #8
+ 80004aa:	bd80      	pop	{r7, pc}
+ 80004ac:	40022000 	.word	0x40022000
+ 80004b0:	fffffdef 	.word	0xfffffdef
+ 80004b4:	08080000 	.word	0x08080000
+ 80004b8:	08080002 	.word	0x08080002
 
-080005cc <eeprom_lock>:
+080004bc <eeprom_lock>:
 
 static int8_t eeprom_lock(void)
 {
- 80005cc:	b580      	push	{r7, lr}
- 80005ce:	b084      	sub	sp, #16
- 80005d0:	af00      	add	r7, sp, #0
+ 80004bc:	b580      	push	{r7, lr}
+ 80004be:	b084      	sub	sp, #16
+ 80004c0:	af00      	add	r7, sp, #0
 	uint32_t tick_start = SysTick->VAL;
- 80005d2:	4b19      	ldr	r3, [pc, #100]	; (8000638 <eeprom_lock+0x6c>)
- 80005d4:	689b      	ldr	r3, [r3, #8]
- 80005d6:	60bb      	str	r3, [r7, #8]
+ 80004c2:	4b19      	ldr	r3, [pc, #100]	; (8000528 <eeprom_lock+0x6c>)
+ 80004c4:	689b      	ldr	r3, [r3, #8]
+ 80004c6:	60bb      	str	r3, [r7, #8]
   	while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
- 80005d8:	e017      	b.n	800060a <eeprom_lock+0x3e>
+ 80004c8:	e017      	b.n	80004fa <eeprom_lock+0x3e>
   	{
  	   /* Timeout test */
  	   /* The maximum writing time is 3.94ms (half-word) */
   		uint32_t tick_last = SysTick->VAL;
- 80005da:	4b17      	ldr	r3, [pc, #92]	; (8000638 <eeprom_lock+0x6c>)
- 80005dc:	689b      	ldr	r3, [r3, #8]
- 80005de:	607b      	str	r3, [r7, #4]
+ 80004ca:	4b17      	ldr	r3, [pc, #92]	; (8000528 <eeprom_lock+0x6c>)
+ 80004cc:	689b      	ldr	r3, [r3, #8]
+ 80004ce:	607b      	str	r3, [r7, #4]
   		uint32_t tick_diff;
   		if (tick_start <= tick_last)
- 80005e0:	68ba      	ldr	r2, [r7, #8]
- 80005e2:	687b      	ldr	r3, [r7, #4]
- 80005e4:	429a      	cmp	r2, r3
- 80005e6:	d804      	bhi.n	80005f2 <eeprom_lock+0x26>
+ 80004d0:	68ba      	ldr	r2, [r7, #8]
+ 80004d2:	687b      	ldr	r3, [r7, #4]
+ 80004d4:	429a      	cmp	r2, r3
+ 80004d6:	d804      	bhi.n	80004e2 <eeprom_lock+0x26>
   		{
   			tick_diff = tick_last - tick_start;
- 80005e8:	687a      	ldr	r2, [r7, #4]
- 80005ea:	68bb      	ldr	r3, [r7, #8]
- 80005ec:	1ad3      	subs	r3, r2, r3
- 80005ee:	60fb      	str	r3, [r7, #12]
- 80005f0:	e004      	b.n	80005fc <eeprom_lock+0x30>
+ 80004d8:	687a      	ldr	r2, [r7, #4]
+ 80004da:	68bb      	ldr	r3, [r7, #8]
+ 80004dc:	1ad3      	subs	r3, r2, r3
+ 80004de:	60fb      	str	r3, [r7, #12]
+ 80004e0:	e004      	b.n	80004ec <eeprom_lock+0x30>
   		} else
   		{
   			tick_diff = (0xFFFFFFFF - tick_last) + tick_start;
- 80005f2:	68ba      	ldr	r2, [r7, #8]
- 80005f4:	687b      	ldr	r3, [r7, #4]
- 80005f6:	1ad3      	subs	r3, r2, r3
- 80005f8:	3b01      	subs	r3, #1
- 80005fa:	60fb      	str	r3, [r7, #12]
+ 80004e2:	68ba      	ldr	r2, [r7, #8]
+ 80004e4:	687b      	ldr	r3, [r7, #4]
+ 80004e6:	1ad3      	subs	r3, r2, r3
+ 80004e8:	3b01      	subs	r3, #1
+ 80004ea:	60fb      	str	r3, [r7, #12]
   		}
 
  		/* If the time difference is more than 5ms */
   		if (tick_diff >= (uint32_t)((uint32_t)SYSTICK_FREQ_HZ*(uint32_t)EEPROM_TIMEOUT_MAX_MS_INV))
- 80005fc:	68fb      	ldr	r3, [r7, #12]
- 80005fe:	4a0f      	ldr	r2, [pc, #60]	; (800063c <eeprom_lock+0x70>)
- 8000600:	4293      	cmp	r3, r2
- 8000602:	d902      	bls.n	800060a <eeprom_lock+0x3e>
+ 80004ec:	68fb      	ldr	r3, [r7, #12]
+ 80004ee:	4a0f      	ldr	r2, [pc, #60]	; (800052c <eeprom_lock+0x70>)
+ 80004f0:	4293      	cmp	r3, r2
+ 80004f2:	d902      	bls.n	80004fa <eeprom_lock+0x3e>
   		{
   			return EEPROM_LOCK_ERROR;
- 8000604:	2303      	movs	r3, #3
- 8000606:	425b      	negs	r3, r3
- 8000608:	e011      	b.n	800062e <eeprom_lock+0x62>
+ 80004f4:	2303      	movs	r3, #3
+ 80004f6:	425b      	negs	r3, r3
+ 80004f8:	e011      	b.n	800051e <eeprom_lock+0x62>
   	while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
- 800060a:	4b0d      	ldr	r3, [pc, #52]	; (8000640 <eeprom_lock+0x74>)
- 800060c:	699b      	ldr	r3, [r3, #24]
- 800060e:	2201      	movs	r2, #1
- 8000610:	4013      	ands	r3, r2
- 8000612:	d1e2      	bne.n	80005da <eeprom_lock+0xe>
+ 80004fa:	4b0d      	ldr	r3, [pc, #52]	; (8000530 <eeprom_lock+0x74>)
+ 80004fc:	699b      	ldr	r3, [r3, #24]
+ 80004fe:	2201      	movs	r2, #1
+ 8000500:	4013      	ands	r3, r2
+ 8000502:	d1e2      	bne.n	80004ca <eeprom_lock+0xe>
   		}
   	}
 
   	FLASH->PECR = FLASH->PECR & ~(FLASH_PECR_ERRIE | FLASH_PECR_EOPIE); /* disable flash interrupts */
- 8000614:	4b0a      	ldr	r3, [pc, #40]	; (8000640 <eeprom_lock+0x74>)
- 8000616:	685a      	ldr	r2, [r3, #4]
- 8000618:	4b09      	ldr	r3, [pc, #36]	; (8000640 <eeprom_lock+0x74>)
- 800061a:	490a      	ldr	r1, [pc, #40]	; (8000644 <eeprom_lock+0x78>)
- 800061c:	400a      	ands	r2, r1
- 800061e:	605a      	str	r2, [r3, #4]
+ 8000504:	4b0a      	ldr	r3, [pc, #40]	; (8000530 <eeprom_lock+0x74>)
+ 8000506:	685a      	ldr	r2, [r3, #4]
+ 8000508:	4b09      	ldr	r3, [pc, #36]	; (8000530 <eeprom_lock+0x74>)
+ 800050a:	490a      	ldr	r1, [pc, #40]	; (8000534 <eeprom_lock+0x78>)
+ 800050c:	400a      	ands	r2, r1
+ 800050e:	605a      	str	r2, [r3, #4]
   	FLASH->PECR = FLASH->PECR | FLASH_PECR_PELOCK; /* Lock memory with PELOCK */
- 8000620:	4b07      	ldr	r3, [pc, #28]	; (8000640 <eeprom_lock+0x74>)
- 8000622:	685a      	ldr	r2, [r3, #4]
- 8000624:	4b06      	ldr	r3, [pc, #24]	; (8000640 <eeprom_lock+0x74>)
- 8000626:	2101      	movs	r1, #1
- 8000628:	430a      	orrs	r2, r1
- 800062a:	605a      	str	r2, [r3, #4]
+ 8000510:	4b07      	ldr	r3, [pc, #28]	; (8000530 <eeprom_lock+0x74>)
+ 8000512:	685a      	ldr	r2, [r3, #4]
+ 8000514:	4b06      	ldr	r3, [pc, #24]	; (8000530 <eeprom_lock+0x74>)
+ 8000516:	2101      	movs	r1, #1
+ 8000518:	430a      	orrs	r2, r1
+ 800051a:	605a      	str	r2, [r3, #4]
 
   	return EEPROM_OK;
- 800062c:	2300      	movs	r3, #0
+ 800051c:	2300      	movs	r3, #0
 }
- 800062e:	0018      	movs	r0, r3
- 8000630:	46bd      	mov	sp, r7
- 8000632:	b004      	add	sp, #16
- 8000634:	bd80      	pop	{r7, pc}
- 8000636:	46c0      	nop			; (mov r8, r8)
- 8000638:	e000e010 	.word	0xe000e010
- 800063c:	8f0d17ff 	.word	0x8f0d17ff
- 8000640:	40022000 	.word	0x40022000
- 8000644:	fffcffff 	.word	0xfffcffff
+ 800051e:	0018      	movs	r0, r3
+ 8000520:	46bd      	mov	sp, r7
+ 8000522:	b004      	add	sp, #16
+ 8000524:	bd80      	pop	{r7, pc}
+ 8000526:	46c0      	nop			; (mov r8, r8)
+ 8000528:	e000e010 	.word	0xe000e010
+ 800052c:	8f0d17ff 	.word	0x8f0d17ff
+ 8000530:	40022000 	.word	0x40022000
+ 8000534:	fffcffff 	.word	0xfffcffff
 
-08000648 <eeprom_unlock>:
+08000538 <eeprom_unlock>:
 
 static int8_t eeprom_unlock(void)
 {
- 8000648:	b580      	push	{r7, lr}
- 800064a:	b084      	sub	sp, #16
- 800064c:	af00      	add	r7, sp, #0
+ 8000538:	b580      	push	{r7, lr}
+ 800053a:	b084      	sub	sp, #16
+ 800053c:	af00      	add	r7, sp, #0
 	uint32_t tick_start = SysTick->VAL;
- 800064e:	4b1c      	ldr	r3, [pc, #112]	; (80006c0 <eeprom_unlock+0x78>)
- 8000650:	689b      	ldr	r3, [r3, #8]
- 8000652:	60bb      	str	r3, [r7, #8]
+ 800053e:	4b1c      	ldr	r3, [pc, #112]	; (80005b0 <eeprom_unlock+0x78>)
+ 8000540:	689b      	ldr	r3, [r3, #8]
+ 8000542:	60bb      	str	r3, [r7, #8]
    while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
- 8000654:	e017      	b.n	8000686 <eeprom_unlock+0x3e>
+ 8000544:	e017      	b.n	8000576 <eeprom_unlock+0x3e>
    {
 	   /* Timeout test */
 	   /* The maximum writing time is 3.94ms (half-word) */
  		uint32_t tick_last = SysTick->VAL;
- 8000656:	4b1a      	ldr	r3, [pc, #104]	; (80006c0 <eeprom_unlock+0x78>)
- 8000658:	689b      	ldr	r3, [r3, #8]
- 800065a:	607b      	str	r3, [r7, #4]
+ 8000546:	4b1a      	ldr	r3, [pc, #104]	; (80005b0 <eeprom_unlock+0x78>)
+ 8000548:	689b      	ldr	r3, [r3, #8]
+ 800054a:	607b      	str	r3, [r7, #4]
  		uint32_t tick_diff;
  		if (tick_start <= tick_last)
- 800065c:	68ba      	ldr	r2, [r7, #8]
- 800065e:	687b      	ldr	r3, [r7, #4]
- 8000660:	429a      	cmp	r2, r3
- 8000662:	d804      	bhi.n	800066e <eeprom_unlock+0x26>
+ 800054c:	68ba      	ldr	r2, [r7, #8]
+ 800054e:	687b      	ldr	r3, [r7, #4]
+ 8000550:	429a      	cmp	r2, r3
+ 8000552:	d804      	bhi.n	800055e <eeprom_unlock+0x26>
  		{
  			tick_diff = tick_last - tick_start;
- 8000664:	687a      	ldr	r2, [r7, #4]
- 8000666:	68bb      	ldr	r3, [r7, #8]
- 8000668:	1ad3      	subs	r3, r2, r3
- 800066a:	60fb      	str	r3, [r7, #12]
- 800066c:	e004      	b.n	8000678 <eeprom_unlock+0x30>
+ 8000554:	687a      	ldr	r2, [r7, #4]
+ 8000556:	68bb      	ldr	r3, [r7, #8]
+ 8000558:	1ad3      	subs	r3, r2, r3
+ 800055a:	60fb      	str	r3, [r7, #12]
+ 800055c:	e004      	b.n	8000568 <eeprom_unlock+0x30>
  		} else
  		{
  			tick_diff = (0xFFFFFFFF - tick_last) + tick_start;
- 800066e:	68ba      	ldr	r2, [r7, #8]
- 8000670:	687b      	ldr	r3, [r7, #4]
- 8000672:	1ad3      	subs	r3, r2, r3
- 8000674:	3b01      	subs	r3, #1
- 8000676:	60fb      	str	r3, [r7, #12]
+ 800055e:	68ba      	ldr	r2, [r7, #8]
+ 8000560:	687b      	ldr	r3, [r7, #4]
+ 8000562:	1ad3      	subs	r3, r2, r3
+ 8000564:	3b01      	subs	r3, #1
+ 8000566:	60fb      	str	r3, [r7, #12]
  		}
 
  		/* If the time difference is more than 5ms */
   		if (tick_diff >= (uint32_t)((uint32_t)SYSTICK_FREQ_HZ*(uint32_t)EEPROM_TIMEOUT_MAX_MS_INV))
- 8000678:	68fb      	ldr	r3, [r7, #12]
- 800067a:	4a12      	ldr	r2, [pc, #72]	; (80006c4 <eeprom_unlock+0x7c>)
- 800067c:	4293      	cmp	r3, r2
- 800067e:	d902      	bls.n	8000686 <eeprom_unlock+0x3e>
+ 8000568:	68fb      	ldr	r3, [r7, #12]
+ 800056a:	4a12      	ldr	r2, [pc, #72]	; (80005b4 <eeprom_unlock+0x7c>)
+ 800056c:	4293      	cmp	r3, r2
+ 800056e:	d902      	bls.n	8000576 <eeprom_unlock+0x3e>
  		{
  			return EEPROM_UNLOCK_ERROR;
- 8000680:	2302      	movs	r3, #2
- 8000682:	425b      	negs	r3, r3
- 8000684:	e017      	b.n	80006b6 <eeprom_unlock+0x6e>
+ 8000570:	2302      	movs	r3, #2
+ 8000572:	425b      	negs	r3, r3
+ 8000574:	e017      	b.n	80005a6 <eeprom_unlock+0x6e>
    while ((FLASH->SR & FLASH_SR_BSY) != 0) /* Wait for FLASH to be free */
- 8000686:	4b10      	ldr	r3, [pc, #64]	; (80006c8 <eeprom_unlock+0x80>)
- 8000688:	699b      	ldr	r3, [r3, #24]
- 800068a:	2201      	movs	r2, #1
- 800068c:	4013      	ands	r3, r2
- 800068e:	d1e2      	bne.n	8000656 <eeprom_unlock+0xe>
+ 8000576:	4b10      	ldr	r3, [pc, #64]	; (80005b8 <eeprom_unlock+0x80>)
+ 8000578:	699b      	ldr	r3, [r3, #24]
+ 800057a:	2201      	movs	r2, #1
+ 800057c:	4013      	ands	r3, r2
+ 800057e:	d1e2      	bne.n	8000546 <eeprom_unlock+0xe>
  		}
    }
    if ((FLASH->PECR & FLASH_PECR_PELOCK) != 0) /* If PELOCK is locked */
- 8000690:	4b0d      	ldr	r3, [pc, #52]	; (80006c8 <eeprom_unlock+0x80>)
- 8000692:	685b      	ldr	r3, [r3, #4]
- 8000694:	2201      	movs	r2, #1
- 8000696:	4013      	ands	r3, r2
- 8000698:	d005      	beq.n	80006a6 <eeprom_unlock+0x5e>
+ 8000580:	4b0d      	ldr	r3, [pc, #52]	; (80005b8 <eeprom_unlock+0x80>)
+ 8000582:	685b      	ldr	r3, [r3, #4]
+ 8000584:	2201      	movs	r2, #1
+ 8000586:	4013      	ands	r3, r2
+ 8000588:	d005      	beq.n	8000596 <eeprom_unlock+0x5e>
    {
 	   /* Unlock PELOCK */
       FLASH->PEKEYR = FLASH_PEKEY1; /* PEKEY1 */
- 800069a:	4b0b      	ldr	r3, [pc, #44]	; (80006c8 <eeprom_unlock+0x80>)
- 800069c:	4a0b      	ldr	r2, [pc, #44]	; (80006cc <eeprom_unlock+0x84>)
- 800069e:	60da      	str	r2, [r3, #12]
+ 800058a:	4b0b      	ldr	r3, [pc, #44]	; (80005b8 <eeprom_unlock+0x80>)
+ 800058c:	4a0b      	ldr	r2, [pc, #44]	; (80005bc <eeprom_unlock+0x84>)
+ 800058e:	60da      	str	r2, [r3, #12]
       FLASH->PEKEYR = FLASH_PEKEY2; /* PEKEY2 */
- 80006a0:	4b09      	ldr	r3, [pc, #36]	; (80006c8 <eeprom_unlock+0x80>)
- 80006a2:	4a0b      	ldr	r2, [pc, #44]	; (80006d0 <eeprom_unlock+0x88>)
- 80006a4:	60da      	str	r2, [r3, #12]
+ 8000590:	4b09      	ldr	r3, [pc, #36]	; (80005b8 <eeprom_unlock+0x80>)
+ 8000592:	4a0b      	ldr	r2, [pc, #44]	; (80005c0 <eeprom_unlock+0x88>)
+ 8000594:	60da      	str	r2, [r3, #12]
    }
    FLASH->PECR = FLASH->PECR | (FLASH_PECR_ERRIE | FLASH_PECR_EOPIE); /* enable flash interrupts */
- 80006a6:	4b08      	ldr	r3, [pc, #32]	; (80006c8 <eeprom_unlock+0x80>)
- 80006a8:	685a      	ldr	r2, [r3, #4]
- 80006aa:	4b07      	ldr	r3, [pc, #28]	; (80006c8 <eeprom_unlock+0x80>)
- 80006ac:	21c0      	movs	r1, #192	; 0xc0
- 80006ae:	0289      	lsls	r1, r1, #10
- 80006b0:	430a      	orrs	r2, r1
- 80006b2:	605a      	str	r2, [r3, #4]
+ 8000596:	4b08      	ldr	r3, [pc, #32]	; (80005b8 <eeprom_unlock+0x80>)
+ 8000598:	685a      	ldr	r2, [r3, #4]
+ 800059a:	4b07      	ldr	r3, [pc, #28]	; (80005b8 <eeprom_unlock+0x80>)
+ 800059c:	21c0      	movs	r1, #192	; 0xc0
+ 800059e:	0289      	lsls	r1, r1, #10
+ 80005a0:	430a      	orrs	r2, r1
+ 80005a2:	605a      	str	r2, [r3, #4]
    return EEPROM_OK;
- 80006b4:	2300      	movs	r3, #0
+ 80005a4:	2300      	movs	r3, #0
 }
- 80006b6:	0018      	movs	r0, r3
- 80006b8:	46bd      	mov	sp, r7
- 80006ba:	b004      	add	sp, #16
- 80006bc:	bd80      	pop	{r7, pc}
- 80006be:	46c0      	nop			; (mov r8, r8)
- 80006c0:	e000e010 	.word	0xe000e010
- 80006c4:	8f0d17ff 	.word	0x8f0d17ff
- 80006c8:	40022000 	.word	0x40022000
- 80006cc:	89abcdef 	.word	0x89abcdef
- 80006d0:	02030405 	.word	0x02030405
+ 80005a6:	0018      	movs	r0, r3
+ 80005a8:	46bd      	mov	sp, r7
+ 80005aa:	b004      	add	sp, #16
+ 80005ac:	bd80      	pop	{r7, pc}
+ 80005ae:	46c0      	nop			; (mov r8, r8)
+ 80005b0:	e000e010 	.word	0xe000e010
+ 80005b4:	8f0d17ff 	.word	0x8f0d17ff
+ 80005b8:	40022000 	.word	0x40022000
+ 80005bc:	89abcdef 	.word	0x89abcdef
+ 80005c0:	02030405 	.word	0x02030405
 
-080006d4 <eeprom_program_byte>:
-
-static int8_t eeprom_program_byte(uint32_t addr, uint8_t ee_data)
-{
- 80006d4:	b580      	push	{r7, lr}
- 80006d6:	b082      	sub	sp, #8
- 80006d8:	af00      	add	r7, sp, #0
- 80006da:	6078      	str	r0, [r7, #4]
- 80006dc:	000a      	movs	r2, r1
- 80006de:	1cfb      	adds	r3, r7, #3
- 80006e0:	701a      	strb	r2, [r3, #0]
-	if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 1))
- 80006e2:	687b      	ldr	r3, [r7, #4]
- 80006e4:	4a0d      	ldr	r2, [pc, #52]	; (800071c <eeprom_program_byte+0x48>)
- 80006e6:	4293      	cmp	r3, r2
- 80006e8:	d912      	bls.n	8000710 <eeprom_program_byte+0x3c>
- 80006ea:	687b      	ldr	r3, [r7, #4]
- 80006ec:	4a0c      	ldr	r2, [pc, #48]	; (8000720 <eeprom_program_byte+0x4c>)
- 80006ee:	4293      	cmp	r3, r2
- 80006f0:	d80e      	bhi.n	8000710 <eeprom_program_byte+0x3c>
-	{
-		*(uint8_t *)(addr) = ee_data; /* write data to EEPROM */
- 80006f2:	687b      	ldr	r3, [r7, #4]
- 80006f4:	1cfa      	adds	r2, r7, #3
- 80006f6:	7812      	ldrb	r2, [r2, #0]
- 80006f8:	701a      	strb	r2, [r3, #0]
-		if (*(uint8_t *)(addr) != ee_data)
- 80006fa:	687b      	ldr	r3, [r7, #4]
- 80006fc:	781b      	ldrb	r3, [r3, #0]
- 80006fe:	1cfa      	adds	r2, r7, #3
- 8000700:	7812      	ldrb	r2, [r2, #0]
- 8000702:	429a      	cmp	r2, r3
- 8000704:	d002      	beq.n	800070c <eeprom_program_byte+0x38>
-		{
-			return EEPROM_WRITE_ERROR;
- 8000706:	2304      	movs	r3, #4
- 8000708:	425b      	negs	r3, r3
- 800070a:	e003      	b.n	8000714 <eeprom_program_byte+0x40>
-		}
-		return EEPROM_OK;
- 800070c:	2300      	movs	r3, #0
- 800070e:	e001      	b.n	8000714 <eeprom_program_byte+0x40>
-	} else
+080005c4 <eeprom_program_halfword>:
 	{
 		return EEPROM_ADDR_ERROR;
- 8000710:	2305      	movs	r3, #5
- 8000712:	425b      	negs	r3, r3
 	}
 }
- 8000714:	0018      	movs	r0, r3
- 8000716:	46bd      	mov	sp, r7
- 8000718:	b002      	add	sp, #8
- 800071a:	bd80      	pop	{r7, pc}
- 800071c:	0807ffff 	.word	0x0807ffff
- 8000720:	080803fe 	.word	0x080803fe
-
-08000724 <eeprom_program_halfword>:
 static int8_t eeprom_program_halfword(uint32_t addr, uint16_t ee_data)
 {
- 8000724:	b580      	push	{r7, lr}
- 8000726:	b082      	sub	sp, #8
- 8000728:	af00      	add	r7, sp, #0
- 800072a:	6078      	str	r0, [r7, #4]
- 800072c:	000a      	movs	r2, r1
- 800072e:	1cbb      	adds	r3, r7, #2
- 8000730:	801a      	strh	r2, [r3, #0]
+ 80005c4:	b580      	push	{r7, lr}
+ 80005c6:	b082      	sub	sp, #8
+ 80005c8:	af00      	add	r7, sp, #0
+ 80005ca:	6078      	str	r0, [r7, #4]
+ 80005cc:	000a      	movs	r2, r1
+ 80005ce:	1cbb      	adds	r3, r7, #2
+ 80005d0:	801a      	strh	r2, [r3, #0]
 	if ((EEPROM_ADDR_START <= addr) && (addr <= EEPROM_ADDR_END - 2))
- 8000732:	687b      	ldr	r3, [r7, #4]
- 8000734:	4a0d      	ldr	r2, [pc, #52]	; (800076c <eeprom_program_halfword+0x48>)
- 8000736:	4293      	cmp	r3, r2
- 8000738:	d912      	bls.n	8000760 <eeprom_program_halfword+0x3c>
- 800073a:	687b      	ldr	r3, [r7, #4]
- 800073c:	4a0c      	ldr	r2, [pc, #48]	; (8000770 <eeprom_program_halfword+0x4c>)
- 800073e:	4293      	cmp	r3, r2
- 8000740:	d80e      	bhi.n	8000760 <eeprom_program_halfword+0x3c>
+ 80005d2:	687b      	ldr	r3, [r7, #4]
+ 80005d4:	4a0d      	ldr	r2, [pc, #52]	; (800060c <eeprom_program_halfword+0x48>)
+ 80005d6:	4293      	cmp	r3, r2
+ 80005d8:	d912      	bls.n	8000600 <eeprom_program_halfword+0x3c>
+ 80005da:	687b      	ldr	r3, [r7, #4]
+ 80005dc:	4a0c      	ldr	r2, [pc, #48]	; (8000610 <eeprom_program_halfword+0x4c>)
+ 80005de:	4293      	cmp	r3, r2
+ 80005e0:	d80e      	bhi.n	8000600 <eeprom_program_halfword+0x3c>
 	{
 		*(uint16_t *)(addr) = ee_data; /* write data to EEPROM */
- 8000742:	687b      	ldr	r3, [r7, #4]
- 8000744:	1cba      	adds	r2, r7, #2
- 8000746:	8812      	ldrh	r2, [r2, #0]
- 8000748:	801a      	strh	r2, [r3, #0]
+ 80005e2:	687b      	ldr	r3, [r7, #4]
+ 80005e4:	1cba      	adds	r2, r7, #2
+ 80005e6:	8812      	ldrh	r2, [r2, #0]
+ 80005e8:	801a      	strh	r2, [r3, #0]
 		if (*(uint16_t *)(addr) != ee_data)
- 800074a:	687b      	ldr	r3, [r7, #4]
- 800074c:	881b      	ldrh	r3, [r3, #0]
- 800074e:	1cba      	adds	r2, r7, #2
- 8000750:	8812      	ldrh	r2, [r2, #0]
- 8000752:	429a      	cmp	r2, r3
- 8000754:	d002      	beq.n	800075c <eeprom_program_halfword+0x38>
+ 80005ea:	687b      	ldr	r3, [r7, #4]
+ 80005ec:	881b      	ldrh	r3, [r3, #0]
+ 80005ee:	1cba      	adds	r2, r7, #2
+ 80005f0:	8812      	ldrh	r2, [r2, #0]
+ 80005f2:	429a      	cmp	r2, r3
+ 80005f4:	d002      	beq.n	80005fc <eeprom_program_halfword+0x38>
 		{
 			return EEPROM_WRITE_ERROR;
- 8000756:	2304      	movs	r3, #4
- 8000758:	425b      	negs	r3, r3
- 800075a:	e003      	b.n	8000764 <eeprom_program_halfword+0x40>
+ 80005f6:	2304      	movs	r3, #4
+ 80005f8:	425b      	negs	r3, r3
+ 80005fa:	e003      	b.n	8000604 <eeprom_program_halfword+0x40>
 		}
 		return EEPROM_OK;
- 800075c:	2300      	movs	r3, #0
- 800075e:	e001      	b.n	8000764 <eeprom_program_halfword+0x40>
+ 80005fc:	2300      	movs	r3, #0
+ 80005fe:	e001      	b.n	8000604 <eeprom_program_halfword+0x40>
 	} else
 	{
 		return EEPROM_ADDR_ERROR;
- 8000760:	2305      	movs	r3, #5
- 8000762:	425b      	negs	r3, r3
+ 8000600:	2305      	movs	r3, #5
+ 8000602:	425b      	negs	r3, r3
 	}
 }
- 8000764:	0018      	movs	r0, r3
- 8000766:	46bd      	mov	sp, r7
- 8000768:	b002      	add	sp, #8
- 800076a:	bd80      	pop	{r7, pc}
- 800076c:	0807ffff 	.word	0x0807ffff
- 8000770:	080803fd 	.word	0x080803fd
+ 8000604:	0018      	movs	r0, r3
+ 8000606:	46bd      	mov	sp, r7
+ 8000608:	b002      	add	sp, #8
+ 800060a:	bd80      	pop	{r7, pc}
+ 800060c:	0807ffff 	.word	0x0807ffff
+ 8000610:	080803fd 	.word	0x080803fd
 
-08000774 <crc8_calculate>:
-
-#include "crc8.h"
-
-/* Stolen from Sensirion SCD4x datasheet, section 3.11 */
-uint8_t crc8_calculate(const uint8_t *data, uint16_t count)
-{
- 8000774:	b580      	push	{r7, lr}
- 8000776:	b084      	sub	sp, #16
- 8000778:	af00      	add	r7, sp, #0
- 800077a:	6078      	str	r0, [r7, #4]
- 800077c:	000a      	movs	r2, r1
- 800077e:	1cbb      	adds	r3, r7, #2
- 8000780:	801a      	strh	r2, [r3, #0]
-	uint16_t current_byte;
-	uint8_t crc = CRC8_INIT;
- 8000782:	230d      	movs	r3, #13
- 8000784:	18fb      	adds	r3, r7, r3
- 8000786:	22ff      	movs	r2, #255	; 0xff
- 8000788:	701a      	strb	r2, [r3, #0]
-	uint8_t crc_bit;
-	/* calculates 8-Bit checksum with given polynomial */
-	for (current_byte = 0; current_byte < count; ++current_byte) {
- 800078a:	230e      	movs	r3, #14
- 800078c:	18fb      	adds	r3, r7, r3
- 800078e:	2200      	movs	r2, #0
- 8000790:	801a      	strh	r2, [r3, #0]
- 8000792:	e037      	b.n	8000804 <crc8_calculate+0x90>
-		crc ^= (data[current_byte]);
- 8000794:	230e      	movs	r3, #14
- 8000796:	18fb      	adds	r3, r7, r3
- 8000798:	881b      	ldrh	r3, [r3, #0]
- 800079a:	687a      	ldr	r2, [r7, #4]
- 800079c:	18d3      	adds	r3, r2, r3
- 800079e:	7819      	ldrb	r1, [r3, #0]
- 80007a0:	220d      	movs	r2, #13
- 80007a2:	18bb      	adds	r3, r7, r2
- 80007a4:	18ba      	adds	r2, r7, r2
- 80007a6:	7812      	ldrb	r2, [r2, #0]
- 80007a8:	404a      	eors	r2, r1
- 80007aa:	701a      	strb	r2, [r3, #0]
-		for(crc_bit = 8; crc_bit > 0; --crc_bit) {
- 80007ac:	230c      	movs	r3, #12
- 80007ae:	18fb      	adds	r3, r7, r3
- 80007b0:	2208      	movs	r2, #8
- 80007b2:	701a      	strb	r2, [r3, #0]
- 80007b4:	e01b      	b.n	80007ee <crc8_calculate+0x7a>
-			if (crc & 0x80) {
- 80007b6:	210d      	movs	r1, #13
- 80007b8:	187b      	adds	r3, r7, r1
- 80007ba:	781b      	ldrb	r3, [r3, #0]
- 80007bc:	b25b      	sxtb	r3, r3
- 80007be:	2b00      	cmp	r3, #0
- 80007c0:	da09      	bge.n	80007d6 <crc8_calculate+0x62>
-				crc =(crc << 1) ^ CRC8_POLYNOMIAL;
- 80007c2:	187b      	adds	r3, r7, r1
- 80007c4:	781b      	ldrb	r3, [r3, #0]
- 80007c6:	005b      	lsls	r3, r3, #1
- 80007c8:	b25b      	sxtb	r3, r3
- 80007ca:	2231      	movs	r2, #49	; 0x31
- 80007cc:	4053      	eors	r3, r2
- 80007ce:	b25a      	sxtb	r2, r3
- 80007d0:	187b      	adds	r3, r7, r1
- 80007d2:	701a      	strb	r2, [r3, #0]
- 80007d4:	e005      	b.n	80007e2 <crc8_calculate+0x6e>
-			} else {
-				crc = (crc << 1);
- 80007d6:	230d      	movs	r3, #13
- 80007d8:	18fa      	adds	r2, r7, r3
- 80007da:	18fb      	adds	r3, r7, r3
- 80007dc:	781b      	ldrb	r3, [r3, #0]
- 80007de:	18db      	adds	r3, r3, r3
- 80007e0:	7013      	strb	r3, [r2, #0]
-		for(crc_bit = 8; crc_bit > 0; --crc_bit) {
- 80007e2:	220c      	movs	r2, #12
- 80007e4:	18bb      	adds	r3, r7, r2
- 80007e6:	18ba      	adds	r2, r7, r2
- 80007e8:	7812      	ldrb	r2, [r2, #0]
- 80007ea:	3a01      	subs	r2, #1
- 80007ec:	701a      	strb	r2, [r3, #0]
- 80007ee:	230c      	movs	r3, #12
- 80007f0:	18fb      	adds	r3, r7, r3
- 80007f2:	781b      	ldrb	r3, [r3, #0]
- 80007f4:	2b00      	cmp	r3, #0
- 80007f6:	d1de      	bne.n	80007b6 <crc8_calculate+0x42>
-	for (current_byte = 0; current_byte < count; ++current_byte) {
- 80007f8:	220e      	movs	r2, #14
- 80007fa:	18bb      	adds	r3, r7, r2
- 80007fc:	18ba      	adds	r2, r7, r2
- 80007fe:	8812      	ldrh	r2, [r2, #0]
- 8000800:	3201      	adds	r2, #1
- 8000802:	801a      	strh	r2, [r3, #0]
- 8000804:	230e      	movs	r3, #14
- 8000806:	18fa      	adds	r2, r7, r3
- 8000808:	1cbb      	adds	r3, r7, #2
- 800080a:	8812      	ldrh	r2, [r2, #0]
- 800080c:	881b      	ldrh	r3, [r3, #0]
- 800080e:	429a      	cmp	r2, r3
- 8000810:	d3c0      	bcc.n	8000794 <crc8_calculate+0x20>
-			}
-		}
-	}
-	return crc;
- 8000812:	230d      	movs	r3, #13
- 8000814:	18fb      	adds	r3, r7, r3
- 8000816:	781b      	ldrb	r3, [r3, #0]
-}
- 8000818:	0018      	movs	r0, r3
- 800081a:	46bd      	mov	sp, r7
- 800081c:	b004      	add	sp, #16
- 800081e:	bd80      	pop	{r7, pc}
-
-08000820 <LL_I2C_IsActiveFlag_TXE>:
+08000614 <LL_I2C_IsActiveFlag_TXE>:
   * @rmtoll ISR          TXE           LL_I2C_IsActiveFlag_TXE
   * @param  I2Cx I2C Instance.
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
 {
- 8000820:	b580      	push	{r7, lr}
- 8000822:	b082      	sub	sp, #8
- 8000824:	af00      	add	r7, sp, #0
- 8000826:	6078      	str	r0, [r7, #4]
+ 8000614:	b580      	push	{r7, lr}
+ 8000616:	b082      	sub	sp, #8
+ 8000618:	af00      	add	r7, sp, #0
+ 800061a:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)) ? 1UL : 0UL);
- 8000828:	687b      	ldr	r3, [r7, #4]
- 800082a:	699b      	ldr	r3, [r3, #24]
- 800082c:	2201      	movs	r2, #1
- 800082e:	4013      	ands	r3, r2
- 8000830:	2b01      	cmp	r3, #1
- 8000832:	d101      	bne.n	8000838 <LL_I2C_IsActiveFlag_TXE+0x18>
- 8000834:	2301      	movs	r3, #1
- 8000836:	e000      	b.n	800083a <LL_I2C_IsActiveFlag_TXE+0x1a>
- 8000838:	2300      	movs	r3, #0
+ 800061c:	687b      	ldr	r3, [r7, #4]
+ 800061e:	699b      	ldr	r3, [r3, #24]
+ 8000620:	2201      	movs	r2, #1
+ 8000622:	4013      	ands	r3, r2
+ 8000624:	2b01      	cmp	r3, #1
+ 8000626:	d101      	bne.n	800062c <LL_I2C_IsActiveFlag_TXE+0x18>
+ 8000628:	2301      	movs	r3, #1
+ 800062a:	e000      	b.n	800062e <LL_I2C_IsActiveFlag_TXE+0x1a>
+ 800062c:	2300      	movs	r3, #0
 }
- 800083a:	0018      	movs	r0, r3
- 800083c:	46bd      	mov	sp, r7
- 800083e:	b002      	add	sp, #8
- 8000840:	bd80      	pop	{r7, pc}
+ 800062e:	0018      	movs	r0, r3
+ 8000630:	46bd      	mov	sp, r7
+ 8000632:	b002      	add	sp, #8
+ 8000634:	bd80      	pop	{r7, pc}
 
-08000842 <LL_I2C_IsActiveFlag_RXNE>:
+08000636 <LL_I2C_IsActiveFlag_RXNE>:
   * @rmtoll ISR          RXNE          LL_I2C_IsActiveFlag_RXNE
   * @param  I2Cx I2C Instance.
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
 {
- 8000842:	b580      	push	{r7, lr}
- 8000844:	b082      	sub	sp, #8
- 8000846:	af00      	add	r7, sp, #0
- 8000848:	6078      	str	r0, [r7, #4]
+ 8000636:	b580      	push	{r7, lr}
+ 8000638:	b082      	sub	sp, #8
+ 800063a:	af00      	add	r7, sp, #0
+ 800063c:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)) ? 1UL : 0UL);
- 800084a:	687b      	ldr	r3, [r7, #4]
- 800084c:	699b      	ldr	r3, [r3, #24]
- 800084e:	2204      	movs	r2, #4
- 8000850:	4013      	ands	r3, r2
- 8000852:	2b04      	cmp	r3, #4
- 8000854:	d101      	bne.n	800085a <LL_I2C_IsActiveFlag_RXNE+0x18>
- 8000856:	2301      	movs	r3, #1
- 8000858:	e000      	b.n	800085c <LL_I2C_IsActiveFlag_RXNE+0x1a>
- 800085a:	2300      	movs	r3, #0
+ 800063e:	687b      	ldr	r3, [r7, #4]
+ 8000640:	699b      	ldr	r3, [r3, #24]
+ 8000642:	2204      	movs	r2, #4
+ 8000644:	4013      	ands	r3, r2
+ 8000646:	2b04      	cmp	r3, #4
+ 8000648:	d101      	bne.n	800064e <LL_I2C_IsActiveFlag_RXNE+0x18>
+ 800064a:	2301      	movs	r3, #1
+ 800064c:	e000      	b.n	8000650 <LL_I2C_IsActiveFlag_RXNE+0x1a>
+ 800064e:	2300      	movs	r3, #0
 }
- 800085c:	0018      	movs	r0, r3
- 800085e:	46bd      	mov	sp, r7
- 8000860:	b002      	add	sp, #8
- 8000862:	bd80      	pop	{r7, pc}
+ 8000650:	0018      	movs	r0, r3
+ 8000652:	46bd      	mov	sp, r7
+ 8000654:	b002      	add	sp, #8
+ 8000656:	bd80      	pop	{r7, pc}
 
-08000864 <LL_I2C_IsActiveFlag_STOP>:
+08000658 <LL_I2C_IsActiveFlag_STOP>:
   * @rmtoll ISR          STOPF         LL_I2C_IsActiveFlag_STOP
   * @param  I2Cx I2C Instance.
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
 {
- 8000864:	b580      	push	{r7, lr}
- 8000866:	b082      	sub	sp, #8
- 8000868:	af00      	add	r7, sp, #0
- 800086a:	6078      	str	r0, [r7, #4]
+ 8000658:	b580      	push	{r7, lr}
+ 800065a:	b082      	sub	sp, #8
+ 800065c:	af00      	add	r7, sp, #0
+ 800065e:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
- 800086c:	687b      	ldr	r3, [r7, #4]
- 800086e:	699b      	ldr	r3, [r3, #24]
- 8000870:	2220      	movs	r2, #32
- 8000872:	4013      	ands	r3, r2
- 8000874:	2b20      	cmp	r3, #32
- 8000876:	d101      	bne.n	800087c <LL_I2C_IsActiveFlag_STOP+0x18>
- 8000878:	2301      	movs	r3, #1
- 800087a:	e000      	b.n	800087e <LL_I2C_IsActiveFlag_STOP+0x1a>
- 800087c:	2300      	movs	r3, #0
+ 8000660:	687b      	ldr	r3, [r7, #4]
+ 8000662:	699b      	ldr	r3, [r3, #24]
+ 8000664:	2220      	movs	r2, #32
+ 8000666:	4013      	ands	r3, r2
+ 8000668:	2b20      	cmp	r3, #32
+ 800066a:	d101      	bne.n	8000670 <LL_I2C_IsActiveFlag_STOP+0x18>
+ 800066c:	2301      	movs	r3, #1
+ 800066e:	e000      	b.n	8000672 <LL_I2C_IsActiveFlag_STOP+0x1a>
+ 8000670:	2300      	movs	r3, #0
 }
- 800087e:	0018      	movs	r0, r3
- 8000880:	46bd      	mov	sp, r7
- 8000882:	b002      	add	sp, #8
- 8000884:	bd80      	pop	{r7, pc}
+ 8000672:	0018      	movs	r0, r3
+ 8000674:	46bd      	mov	sp, r7
+ 8000676:	b002      	add	sp, #8
+ 8000678:	bd80      	pop	{r7, pc}
 
-08000886 <LL_I2C_ClearFlag_STOP>:
+0800067a <LL_I2C_ClearFlag_STOP>:
   * @rmtoll ICR          STOPCF        LL_I2C_ClearFlag_STOP
   * @param  I2Cx I2C Instance.
   * @retval None
   */
 __STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
 {
- 8000886:	b580      	push	{r7, lr}
- 8000888:	b082      	sub	sp, #8
- 800088a:	af00      	add	r7, sp, #0
- 800088c:	6078      	str	r0, [r7, #4]
+ 800067a:	b580      	push	{r7, lr}
+ 800067c:	b082      	sub	sp, #8
+ 800067e:	af00      	add	r7, sp, #0
+ 8000680:	6078      	str	r0, [r7, #4]
   SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
- 800088e:	687b      	ldr	r3, [r7, #4]
- 8000890:	69db      	ldr	r3, [r3, #28]
- 8000892:	2220      	movs	r2, #32
- 8000894:	431a      	orrs	r2, r3
- 8000896:	687b      	ldr	r3, [r7, #4]
- 8000898:	61da      	str	r2, [r3, #28]
+ 8000682:	687b      	ldr	r3, [r7, #4]
+ 8000684:	69db      	ldr	r3, [r3, #28]
+ 8000686:	2220      	movs	r2, #32
+ 8000688:	431a      	orrs	r2, r3
+ 800068a:	687b      	ldr	r3, [r7, #4]
+ 800068c:	61da      	str	r2, [r3, #28]
 }
- 800089a:	46c0      	nop			; (mov r8, r8)
- 800089c:	46bd      	mov	sp, r7
- 800089e:	b002      	add	sp, #8
- 80008a0:	bd80      	pop	{r7, pc}
+ 800068e:	46c0      	nop			; (mov r8, r8)
+ 8000690:	46bd      	mov	sp, r7
+ 8000692:	b002      	add	sp, #8
+ 8000694:	bd80      	pop	{r7, pc}
 
-080008a2 <LL_I2C_ClearFlag_TXE>:
+08000696 <LL_I2C_ClearFlag_TXE>:
   * @rmtoll ISR          TXE           LL_I2C_ClearFlag_TXE
   * @param  I2Cx I2C Instance.
   * @retval None
   */
 __STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
 {
- 80008a2:	b580      	push	{r7, lr}
- 80008a4:	b082      	sub	sp, #8
- 80008a6:	af00      	add	r7, sp, #0
- 80008a8:	6078      	str	r0, [r7, #4]
+ 8000696:	b580      	push	{r7, lr}
+ 8000698:	b082      	sub	sp, #8
+ 800069a:	af00      	add	r7, sp, #0
+ 800069c:	6078      	str	r0, [r7, #4]
   WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
- 80008aa:	687b      	ldr	r3, [r7, #4]
- 80008ac:	2201      	movs	r2, #1
- 80008ae:	619a      	str	r2, [r3, #24]
+ 800069e:	687b      	ldr	r3, [r7, #4]
+ 80006a0:	2201      	movs	r2, #1
+ 80006a2:	619a      	str	r2, [r3, #24]
 }
- 80008b0:	46c0      	nop			; (mov r8, r8)
- 80008b2:	46bd      	mov	sp, r7
- 80008b4:	b002      	add	sp, #8
- 80008b6:	bd80      	pop	{r7, pc}
+ 80006a4:	46c0      	nop			; (mov r8, r8)
+ 80006a6:	46bd      	mov	sp, r7
+ 80006a8:	b002      	add	sp, #8
+ 80006aa:	bd80      	pop	{r7, pc}
 
-080008b8 <LL_I2C_HandleTransfer>:
+080006ac <LL_I2C_HandleTransfer>:
   *         @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
   * @retval None
   */
 __STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
                                            uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
 {
- 80008b8:	b580      	push	{r7, lr}
- 80008ba:	b084      	sub	sp, #16
- 80008bc:	af00      	add	r7, sp, #0
- 80008be:	60f8      	str	r0, [r7, #12]
- 80008c0:	60b9      	str	r1, [r7, #8]
- 80008c2:	607a      	str	r2, [r7, #4]
- 80008c4:	603b      	str	r3, [r7, #0]
+ 80006ac:	b580      	push	{r7, lr}
+ 80006ae:	b084      	sub	sp, #16
+ 80006b0:	af00      	add	r7, sp, #0
+ 80006b2:	60f8      	str	r0, [r7, #12]
+ 80006b4:	60b9      	str	r1, [r7, #8]
+ 80006b6:	607a      	str	r2, [r7, #4]
+ 80006b8:	603b      	str	r3, [r7, #0]
   MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 |
- 80008c6:	68fb      	ldr	r3, [r7, #12]
- 80008c8:	685b      	ldr	r3, [r3, #4]
- 80008ca:	69fa      	ldr	r2, [r7, #28]
- 80008cc:	0d51      	lsrs	r1, r2, #21
- 80008ce:	2280      	movs	r2, #128	; 0x80
- 80008d0:	00d2      	lsls	r2, r2, #3
- 80008d2:	400a      	ands	r2, r1
- 80008d4:	490a      	ldr	r1, [pc, #40]	; (8000900 <LL_I2C_HandleTransfer+0x48>)
- 80008d6:	430a      	orrs	r2, r1
- 80008d8:	43d2      	mvns	r2, r2
- 80008da:	401a      	ands	r2, r3
- 80008dc:	68b9      	ldr	r1, [r7, #8]
- 80008de:	687b      	ldr	r3, [r7, #4]
- 80008e0:	4319      	orrs	r1, r3
- 80008e2:	683b      	ldr	r3, [r7, #0]
- 80008e4:	041b      	lsls	r3, r3, #16
- 80008e6:	4319      	orrs	r1, r3
- 80008e8:	69bb      	ldr	r3, [r7, #24]
- 80008ea:	4319      	orrs	r1, r3
- 80008ec:	69fb      	ldr	r3, [r7, #28]
- 80008ee:	430b      	orrs	r3, r1
- 80008f0:	431a      	orrs	r2, r3
- 80008f2:	68fb      	ldr	r3, [r7, #12]
- 80008f4:	605a      	str	r2, [r3, #4]
+ 80006ba:	68fb      	ldr	r3, [r7, #12]
+ 80006bc:	685b      	ldr	r3, [r3, #4]
+ 80006be:	69fa      	ldr	r2, [r7, #28]
+ 80006c0:	0d51      	lsrs	r1, r2, #21
+ 80006c2:	2280      	movs	r2, #128	; 0x80
+ 80006c4:	00d2      	lsls	r2, r2, #3
+ 80006c6:	400a      	ands	r2, r1
+ 80006c8:	490a      	ldr	r1, [pc, #40]	; (80006f4 <LL_I2C_HandleTransfer+0x48>)
+ 80006ca:	430a      	orrs	r2, r1
+ 80006cc:	43d2      	mvns	r2, r2
+ 80006ce:	401a      	ands	r2, r3
+ 80006d0:	68b9      	ldr	r1, [r7, #8]
+ 80006d2:	687b      	ldr	r3, [r7, #4]
+ 80006d4:	4319      	orrs	r1, r3
+ 80006d6:	683b      	ldr	r3, [r7, #0]
+ 80006d8:	041b      	lsls	r3, r3, #16
+ 80006da:	4319      	orrs	r1, r3
+ 80006dc:	69bb      	ldr	r3, [r7, #24]
+ 80006de:	4319      	orrs	r1, r3
+ 80006e0:	69fb      	ldr	r3, [r7, #28]
+ 80006e2:	430b      	orrs	r3, r1
+ 80006e4:	431a      	orrs	r2, r3
+ 80006e6:	68fb      	ldr	r3, [r7, #12]
+ 80006e8:	605a      	str	r2, [r3, #4]
              (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) |
              I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
              I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
              SlaveAddr | SlaveAddrSize | (TransferSize << I2C_CR2_NBYTES_Pos) | EndMode | Request);
 }
- 80008f6:	46c0      	nop			; (mov r8, r8)
- 80008f8:	46bd      	mov	sp, r7
- 80008fa:	b004      	add	sp, #16
- 80008fc:	bd80      	pop	{r7, pc}
- 80008fe:	46c0      	nop			; (mov r8, r8)
- 8000900:	03ff7bff 	.word	0x03ff7bff
+ 80006ea:	46c0      	nop			; (mov r8, r8)
+ 80006ec:	46bd      	mov	sp, r7
+ 80006ee:	b004      	add	sp, #16
+ 80006f0:	bd80      	pop	{r7, pc}
+ 80006f2:	46c0      	nop			; (mov r8, r8)
+ 80006f4:	03ff7bff 	.word	0x03ff7bff
 
-08000904 <LL_I2C_ReceiveData8>:
+080006f8 <LL_I2C_ReceiveData8>:
   * @rmtoll RXDR         RXDATA        LL_I2C_ReceiveData8
   * @param  I2Cx I2C Instance.
   * @retval Value between Min_Data=0x00 and Max_Data=0xFF
   */
 __STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
 {
- 8000904:	b580      	push	{r7, lr}
- 8000906:	b082      	sub	sp, #8
- 8000908:	af00      	add	r7, sp, #0
- 800090a:	6078      	str	r0, [r7, #4]
+ 80006f8:	b580      	push	{r7, lr}
+ 80006fa:	b082      	sub	sp, #8
+ 80006fc:	af00      	add	r7, sp, #0
+ 80006fe:	6078      	str	r0, [r7, #4]
   return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
- 800090c:	687b      	ldr	r3, [r7, #4]
- 800090e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8000910:	b2db      	uxtb	r3, r3
+ 8000700:	687b      	ldr	r3, [r7, #4]
+ 8000702:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8000704:	b2db      	uxtb	r3, r3
 }
- 8000912:	0018      	movs	r0, r3
- 8000914:	46bd      	mov	sp, r7
- 8000916:	b002      	add	sp, #8
- 8000918:	bd80      	pop	{r7, pc}
+ 8000706:	0018      	movs	r0, r3
+ 8000708:	46bd      	mov	sp, r7
+ 800070a:	b002      	add	sp, #8
+ 800070c:	bd80      	pop	{r7, pc}
 
-0800091a <LL_I2C_TransmitData8>:
+0800070e <LL_I2C_TransmitData8>:
   * @param  I2Cx I2C Instance.
   * @param  Data Value between Min_Data=0x00 and Max_Data=0xFF
   * @retval None
   */
 __STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
 {
- 800091a:	b580      	push	{r7, lr}
- 800091c:	b082      	sub	sp, #8
- 800091e:	af00      	add	r7, sp, #0
- 8000920:	6078      	str	r0, [r7, #4]
- 8000922:	000a      	movs	r2, r1
- 8000924:	1cfb      	adds	r3, r7, #3
- 8000926:	701a      	strb	r2, [r3, #0]
+ 800070e:	b580      	push	{r7, lr}
+ 8000710:	b082      	sub	sp, #8
+ 8000712:	af00      	add	r7, sp, #0
+ 8000714:	6078      	str	r0, [r7, #4]
+ 8000716:	000a      	movs	r2, r1
+ 8000718:	1cfb      	adds	r3, r7, #3
+ 800071a:	701a      	strb	r2, [r3, #0]
   WRITE_REG(I2Cx->TXDR, Data);
- 8000928:	1cfb      	adds	r3, r7, #3
- 800092a:	781a      	ldrb	r2, [r3, #0]
- 800092c:	687b      	ldr	r3, [r7, #4]
- 800092e:	629a      	str	r2, [r3, #40]	; 0x28
+ 800071c:	1cfb      	adds	r3, r7, #3
+ 800071e:	781a      	ldrb	r2, [r3, #0]
+ 8000720:	687b      	ldr	r3, [r7, #4]
+ 8000722:	629a      	str	r2, [r3, #40]	; 0x28
 }
- 8000930:	46c0      	nop			; (mov r8, r8)
- 8000932:	46bd      	mov	sp, r7
- 8000934:	b002      	add	sp, #8
- 8000936:	bd80      	pop	{r7, pc}
+ 8000724:	46c0      	nop			; (mov r8, r8)
+ 8000726:	46bd      	mov	sp, r7
+ 8000728:	b002      	add	sp, #8
+ 800072a:	bd80      	pop	{r7, pc}
 
-08000938 <i2c_init>:
+0800072c <i2c_init>:
 #include "stm32l0xx_ll_usart.h"
 
 static i2c_context_t *i2c_context;
 
 int8_t i2c_init(i2c_context_t *context)
 {
- 8000938:	b580      	push	{r7, lr}
- 800093a:	b082      	sub	sp, #8
- 800093c:	af00      	add	r7, sp, #0
- 800093e:	6078      	str	r0, [r7, #4]
+ 800072c:	b580      	push	{r7, lr}
+ 800072e:	b082      	sub	sp, #8
+ 8000730:	af00      	add	r7, sp, #0
+ 8000732:	6078      	str	r0, [r7, #4]
 	if (context == NULL) {
- 8000940:	687b      	ldr	r3, [r7, #4]
- 8000942:	2b00      	cmp	r3, #0
- 8000944:	d102      	bne.n	800094c <i2c_init+0x14>
+ 8000734:	687b      	ldr	r3, [r7, #4]
+ 8000736:	2b00      	cmp	r3, #0
+ 8000738:	d102      	bne.n	8000740 <i2c_init+0x14>
 		return I2C_ERROR;
- 8000946:	2301      	movs	r3, #1
- 8000948:	425b      	negs	r3, r3
- 800094a:	e003      	b.n	8000954 <i2c_init+0x1c>
+ 800073a:	2301      	movs	r3, #1
+ 800073c:	425b      	negs	r3, r3
+ 800073e:	e003      	b.n	8000748 <i2c_init+0x1c>
 	}
 	i2c_context = context;
- 800094c:	4b03      	ldr	r3, [pc, #12]	; (800095c <i2c_init+0x24>)
- 800094e:	687a      	ldr	r2, [r7, #4]
- 8000950:	601a      	str	r2, [r3, #0]
+ 8000740:	4b03      	ldr	r3, [pc, #12]	; (8000750 <i2c_init+0x24>)
+ 8000742:	687a      	ldr	r2, [r7, #4]
+ 8000744:	601a      	str	r2, [r3, #0]
 	return I2C_OK;
- 8000952:	2300      	movs	r3, #0
+ 8000746:	2300      	movs	r3, #0
 }
- 8000954:	0018      	movs	r0, r3
- 8000956:	46bd      	mov	sp, r7
- 8000958:	b002      	add	sp, #8
- 800095a:	bd80      	pop	{r7, pc}
- 800095c:	20000024 	.word	0x20000024
+ 8000748:	0018      	movs	r0, r3
+ 800074a:	46bd      	mov	sp, r7
+ 800074c:	b002      	add	sp, #8
+ 800074e:	bd80      	pop	{r7, pc}
+ 8000750:	20000024 	.word	0x20000024
 
-08000960 <i2c_transmit>:
+08000754 <i2c_transmit>:
 
 int8_t i2c_transmit(uint8_t address, uint8_t *buffer, int len)
 {
- 8000960:	b580      	push	{r7, lr}
- 8000962:	b088      	sub	sp, #32
- 8000964:	af02      	add	r7, sp, #8
- 8000966:	60b9      	str	r1, [r7, #8]
- 8000968:	607a      	str	r2, [r7, #4]
- 800096a:	210f      	movs	r1, #15
- 800096c:	187b      	adds	r3, r7, r1
- 800096e:	1c02      	adds	r2, r0, #0
- 8000970:	701a      	strb	r2, [r3, #0]
+ 8000754:	b580      	push	{r7, lr}
+ 8000756:	b088      	sub	sp, #32
+ 8000758:	af02      	add	r7, sp, #8
+ 800075a:	60b9      	str	r1, [r7, #8]
+ 800075c:	607a      	str	r2, [r7, #4]
+ 800075e:	210f      	movs	r1, #15
+ 8000760:	187b      	adds	r3, r7, r1
+ 8000762:	1c02      	adds	r2, r0, #0
+ 8000764:	701a      	strb	r2, [r3, #0]
 	LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
- 8000972:	4b25      	ldr	r3, [pc, #148]	; (8000a08 <i2c_transmit+0xa8>)
- 8000974:	681b      	ldr	r3, [r3, #0]
- 8000976:	6818      	ldr	r0, [r3, #0]
- 8000978:	187b      	adds	r3, r7, r1
- 800097a:	7819      	ldrb	r1, [r3, #0]
- 800097c:	687a      	ldr	r2, [r7, #4]
- 800097e:	4b23      	ldr	r3, [pc, #140]	; (8000a0c <i2c_transmit+0xac>)
- 8000980:	9301      	str	r3, [sp, #4]
- 8000982:	2380      	movs	r3, #128	; 0x80
- 8000984:	049b      	lsls	r3, r3, #18
- 8000986:	9300      	str	r3, [sp, #0]
- 8000988:	0013      	movs	r3, r2
- 800098a:	2200      	movs	r2, #0
- 800098c:	f7ff ff94 	bl	80008b8 <LL_I2C_HandleTransfer>
+ 8000766:	4b25      	ldr	r3, [pc, #148]	; (80007fc <i2c_transmit+0xa8>)
+ 8000768:	681b      	ldr	r3, [r3, #0]
+ 800076a:	6818      	ldr	r0, [r3, #0]
+ 800076c:	187b      	adds	r3, r7, r1
+ 800076e:	7819      	ldrb	r1, [r3, #0]
+ 8000770:	687a      	ldr	r2, [r7, #4]
+ 8000772:	4b23      	ldr	r3, [pc, #140]	; (8000800 <i2c_transmit+0xac>)
+ 8000774:	9301      	str	r3, [sp, #4]
+ 8000776:	2380      	movs	r3, #128	; 0x80
+ 8000778:	049b      	lsls	r3, r3, #18
+ 800077a:	9300      	str	r3, [sp, #0]
+ 800077c:	0013      	movs	r3, r2
+ 800077e:	2200      	movs	r2, #0
+ 8000780:	f7ff ff94 	bl	80006ac <LL_I2C_HandleTransfer>
 			LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_WRITE);
 	int i = 0;
- 8000990:	2300      	movs	r3, #0
- 8000992:	617b      	str	r3, [r7, #20]
+ 8000784:	2300      	movs	r3, #0
+ 8000786:	617b      	str	r3, [r7, #20]
 	/* Autoend mode will raise STOP flag if NACK is detected
 	 * (or if desired number of bytes is transmitted) */
 	while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
- 8000994:	e018      	b.n	80009c8 <i2c_transmit+0x68>
+ 8000788:	e018      	b.n	80007bc <i2c_transmit+0x68>
 		if (LL_I2C_IsActiveFlag_TXE(i2c_context->i2c)) {
- 8000996:	4b1c      	ldr	r3, [pc, #112]	; (8000a08 <i2c_transmit+0xa8>)
- 8000998:	681b      	ldr	r3, [r3, #0]
- 800099a:	681b      	ldr	r3, [r3, #0]
- 800099c:	0018      	movs	r0, r3
- 800099e:	f7ff ff3f 	bl	8000820 <LL_I2C_IsActiveFlag_TXE>
- 80009a2:	1e03      	subs	r3, r0, #0
- 80009a4:	d010      	beq.n	80009c8 <i2c_transmit+0x68>
+ 800078a:	4b1c      	ldr	r3, [pc, #112]	; (80007fc <i2c_transmit+0xa8>)
+ 800078c:	681b      	ldr	r3, [r3, #0]
+ 800078e:	681b      	ldr	r3, [r3, #0]
+ 8000790:	0018      	movs	r0, r3
+ 8000792:	f7ff ff3f 	bl	8000614 <LL_I2C_IsActiveFlag_TXE>
+ 8000796:	1e03      	subs	r3, r0, #0
+ 8000798:	d010      	beq.n	80007bc <i2c_transmit+0x68>
 			if (i < len) {
- 80009a6:	697a      	ldr	r2, [r7, #20]
- 80009a8:	687b      	ldr	r3, [r7, #4]
- 80009aa:	429a      	cmp	r2, r3
- 80009ac:	da0c      	bge.n	80009c8 <i2c_transmit+0x68>
+ 800079a:	697a      	ldr	r2, [r7, #20]
+ 800079c:	687b      	ldr	r3, [r7, #4]
+ 800079e:	429a      	cmp	r2, r3
+ 80007a0:	da0c      	bge.n	80007bc <i2c_transmit+0x68>
 				LL_I2C_TransmitData8(i2c_context->i2c, buffer[i++]);
- 80009ae:	4b16      	ldr	r3, [pc, #88]	; (8000a08 <i2c_transmit+0xa8>)
- 80009b0:	681b      	ldr	r3, [r3, #0]
- 80009b2:	6818      	ldr	r0, [r3, #0]
- 80009b4:	697b      	ldr	r3, [r7, #20]
- 80009b6:	1c5a      	adds	r2, r3, #1
- 80009b8:	617a      	str	r2, [r7, #20]
- 80009ba:	001a      	movs	r2, r3
- 80009bc:	68bb      	ldr	r3, [r7, #8]
- 80009be:	189b      	adds	r3, r3, r2
- 80009c0:	781b      	ldrb	r3, [r3, #0]
- 80009c2:	0019      	movs	r1, r3
- 80009c4:	f7ff ffa9 	bl	800091a <LL_I2C_TransmitData8>
+ 80007a2:	4b16      	ldr	r3, [pc, #88]	; (80007fc <i2c_transmit+0xa8>)
+ 80007a4:	681b      	ldr	r3, [r3, #0]
+ 80007a6:	6818      	ldr	r0, [r3, #0]
+ 80007a8:	697b      	ldr	r3, [r7, #20]
+ 80007aa:	1c5a      	adds	r2, r3, #1
+ 80007ac:	617a      	str	r2, [r7, #20]
+ 80007ae:	001a      	movs	r2, r3
+ 80007b0:	68bb      	ldr	r3, [r7, #8]
+ 80007b2:	189b      	adds	r3, r3, r2
+ 80007b4:	781b      	ldrb	r3, [r3, #0]
+ 80007b6:	0019      	movs	r1, r3
+ 80007b8:	f7ff ffa9 	bl	800070e <LL_I2C_TransmitData8>
 	while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
- 80009c8:	4b0f      	ldr	r3, [pc, #60]	; (8000a08 <i2c_transmit+0xa8>)
- 80009ca:	681b      	ldr	r3, [r3, #0]
- 80009cc:	681b      	ldr	r3, [r3, #0]
- 80009ce:	0018      	movs	r0, r3
- 80009d0:	f7ff ff48 	bl	8000864 <LL_I2C_IsActiveFlag_STOP>
- 80009d4:	1e03      	subs	r3, r0, #0
- 80009d6:	d0de      	beq.n	8000996 <i2c_transmit+0x36>
+ 80007bc:	4b0f      	ldr	r3, [pc, #60]	; (80007fc <i2c_transmit+0xa8>)
+ 80007be:	681b      	ldr	r3, [r3, #0]
+ 80007c0:	681b      	ldr	r3, [r3, #0]
+ 80007c2:	0018      	movs	r0, r3
+ 80007c4:	f7ff ff48 	bl	8000658 <LL_I2C_IsActiveFlag_STOP>
+ 80007c8:	1e03      	subs	r3, r0, #0
+ 80007ca:	d0de      	beq.n	800078a <i2c_transmit+0x36>
 			}
 		}
 	}
 	LL_I2C_ClearFlag_STOP(i2c_context->i2c);
- 80009d8:	4b0b      	ldr	r3, [pc, #44]	; (8000a08 <i2c_transmit+0xa8>)
- 80009da:	681b      	ldr	r3, [r3, #0]
- 80009dc:	681b      	ldr	r3, [r3, #0]
- 80009de:	0018      	movs	r0, r3
- 80009e0:	f7ff ff51 	bl	8000886 <LL_I2C_ClearFlag_STOP>
+ 80007cc:	4b0b      	ldr	r3, [pc, #44]	; (80007fc <i2c_transmit+0xa8>)
+ 80007ce:	681b      	ldr	r3, [r3, #0]
+ 80007d0:	681b      	ldr	r3, [r3, #0]
+ 80007d2:	0018      	movs	r0, r3
+ 80007d4:	f7ff ff51 	bl	800067a <LL_I2C_ClearFlag_STOP>
 	LL_I2C_ClearFlag_TXE(i2c_context->i2c);
- 80009e4:	4b08      	ldr	r3, [pc, #32]	; (8000a08 <i2c_transmit+0xa8>)
- 80009e6:	681b      	ldr	r3, [r3, #0]
- 80009e8:	681b      	ldr	r3, [r3, #0]
- 80009ea:	0018      	movs	r0, r3
- 80009ec:	f7ff ff59 	bl	80008a2 <LL_I2C_ClearFlag_TXE>
+ 80007d8:	4b08      	ldr	r3, [pc, #32]	; (80007fc <i2c_transmit+0xa8>)
+ 80007da:	681b      	ldr	r3, [r3, #0]
+ 80007dc:	681b      	ldr	r3, [r3, #0]
+ 80007de:	0018      	movs	r0, r3
+ 80007e0:	f7ff ff59 	bl	8000696 <LL_I2C_ClearFlag_TXE>
 	if (len != i) {
- 80009f0:	687a      	ldr	r2, [r7, #4]
- 80009f2:	697b      	ldr	r3, [r7, #20]
- 80009f4:	429a      	cmp	r2, r3
- 80009f6:	d002      	beq.n	80009fe <i2c_transmit+0x9e>
+ 80007e4:	687a      	ldr	r2, [r7, #4]
+ 80007e6:	697b      	ldr	r3, [r7, #20]
+ 80007e8:	429a      	cmp	r2, r3
+ 80007ea:	d002      	beq.n	80007f2 <i2c_transmit+0x9e>
 		/* If we detect NACK during transaction (before the end of the last byte) */
 		return I2C_ERROR_TX_INCOMPLETE;
- 80009f8:	2303      	movs	r3, #3
- 80009fa:	425b      	negs	r3, r3
- 80009fc:	e000      	b.n	8000a00 <i2c_transmit+0xa0>
+ 80007ec:	2303      	movs	r3, #3
+ 80007ee:	425b      	negs	r3, r3
+ 80007f0:	e000      	b.n	80007f4 <i2c_transmit+0xa0>
 	/* NACK after last byte is ok */
 //	if (LL_I2C_IsActiveFlag_NACK(i2c_context->i2c)) {
 //
 //		return I2C_ERROR_NACK;
 //	}
 	return I2C_OK;
- 80009fe:	2300      	movs	r3, #0
+ 80007f2:	2300      	movs	r3, #0
 }
- 8000a00:	0018      	movs	r0, r3
- 8000a02:	46bd      	mov	sp, r7
- 8000a04:	b006      	add	sp, #24
- 8000a06:	bd80      	pop	{r7, pc}
- 8000a08:	20000024 	.word	0x20000024
- 8000a0c:	80002000 	.word	0x80002000
+ 80007f4:	0018      	movs	r0, r3
+ 80007f6:	46bd      	mov	sp, r7
+ 80007f8:	b006      	add	sp, #24
+ 80007fa:	bd80      	pop	{r7, pc}
+ 80007fc:	20000024 	.word	0x20000024
+ 8000800:	80002000 	.word	0x80002000
 
-08000a10 <i2c_receive>:
+08000804 <i2c_receive>:
 
 int8_t i2c_receive(uint8_t address, uint8_t *buffer, int len)
 {
- 8000a10:	b590      	push	{r4, r7, lr}
- 8000a12:	b089      	sub	sp, #36	; 0x24
- 8000a14:	af02      	add	r7, sp, #8
- 8000a16:	60b9      	str	r1, [r7, #8]
- 8000a18:	607a      	str	r2, [r7, #4]
- 8000a1a:	210f      	movs	r1, #15
- 8000a1c:	187b      	adds	r3, r7, r1
- 8000a1e:	1c02      	adds	r2, r0, #0
- 8000a20:	701a      	strb	r2, [r3, #0]
+ 8000804:	b590      	push	{r4, r7, lr}
+ 8000806:	b089      	sub	sp, #36	; 0x24
+ 8000808:	af02      	add	r7, sp, #8
+ 800080a:	60b9      	str	r1, [r7, #8]
+ 800080c:	607a      	str	r2, [r7, #4]
+ 800080e:	210f      	movs	r1, #15
+ 8000810:	187b      	adds	r3, r7, r1
+ 8000812:	1c02      	adds	r2, r0, #0
+ 8000814:	701a      	strb	r2, [r3, #0]
 	LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
- 8000a22:	4b26      	ldr	r3, [pc, #152]	; (8000abc <i2c_receive+0xac>)
- 8000a24:	681b      	ldr	r3, [r3, #0]
- 8000a26:	6818      	ldr	r0, [r3, #0]
- 8000a28:	187b      	adds	r3, r7, r1
- 8000a2a:	7819      	ldrb	r1, [r3, #0]
- 8000a2c:	687a      	ldr	r2, [r7, #4]
- 8000a2e:	4b24      	ldr	r3, [pc, #144]	; (8000ac0 <i2c_receive+0xb0>)
- 8000a30:	9301      	str	r3, [sp, #4]
- 8000a32:	2380      	movs	r3, #128	; 0x80
- 8000a34:	049b      	lsls	r3, r3, #18
- 8000a36:	9300      	str	r3, [sp, #0]
- 8000a38:	0013      	movs	r3, r2
- 8000a3a:	2200      	movs	r2, #0
- 8000a3c:	f7ff ff3c 	bl	80008b8 <LL_I2C_HandleTransfer>
+ 8000816:	4b26      	ldr	r3, [pc, #152]	; (80008b0 <i2c_receive+0xac>)
+ 8000818:	681b      	ldr	r3, [r3, #0]
+ 800081a:	6818      	ldr	r0, [r3, #0]
+ 800081c:	187b      	adds	r3, r7, r1
+ 800081e:	7819      	ldrb	r1, [r3, #0]
+ 8000820:	687a      	ldr	r2, [r7, #4]
+ 8000822:	4b24      	ldr	r3, [pc, #144]	; (80008b4 <i2c_receive+0xb0>)
+ 8000824:	9301      	str	r3, [sp, #4]
+ 8000826:	2380      	movs	r3, #128	; 0x80
+ 8000828:	049b      	lsls	r3, r3, #18
+ 800082a:	9300      	str	r3, [sp, #0]
+ 800082c:	0013      	movs	r3, r2
+ 800082e:	2200      	movs	r2, #0
+ 8000830:	f7ff ff3c 	bl	80006ac <LL_I2C_HandleTransfer>
 				LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_READ);
 	LL_I2C_ClearFlag_STOP(i2c_context->i2c);
- 8000a40:	4b1e      	ldr	r3, [pc, #120]	; (8000abc <i2c_receive+0xac>)
- 8000a42:	681b      	ldr	r3, [r3, #0]
- 8000a44:	681b      	ldr	r3, [r3, #0]
- 8000a46:	0018      	movs	r0, r3
- 8000a48:	f7ff ff1d 	bl	8000886 <LL_I2C_ClearFlag_STOP>
+ 8000834:	4b1e      	ldr	r3, [pc, #120]	; (80008b0 <i2c_receive+0xac>)
+ 8000836:	681b      	ldr	r3, [r3, #0]
+ 8000838:	681b      	ldr	r3, [r3, #0]
+ 800083a:	0018      	movs	r0, r3
+ 800083c:	f7ff ff1d 	bl	800067a <LL_I2C_ClearFlag_STOP>
 	int i = 0;
- 8000a4c:	2300      	movs	r3, #0
- 8000a4e:	617b      	str	r3, [r7, #20]
+ 8000840:	2300      	movs	r3, #0
+ 8000842:	617b      	str	r3, [r7, #20]
 	while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
- 8000a50:	e019      	b.n	8000a86 <i2c_receive+0x76>
+ 8000844:	e019      	b.n	800087a <i2c_receive+0x76>
 		if (LL_I2C_IsActiveFlag_RXNE(i2c_context->i2c)) {
- 8000a52:	4b1a      	ldr	r3, [pc, #104]	; (8000abc <i2c_receive+0xac>)
- 8000a54:	681b      	ldr	r3, [r3, #0]
- 8000a56:	681b      	ldr	r3, [r3, #0]
- 8000a58:	0018      	movs	r0, r3
- 8000a5a:	f7ff fef2 	bl	8000842 <LL_I2C_IsActiveFlag_RXNE>
- 8000a5e:	1e03      	subs	r3, r0, #0
- 8000a60:	d011      	beq.n	8000a86 <i2c_receive+0x76>
+ 8000846:	4b1a      	ldr	r3, [pc, #104]	; (80008b0 <i2c_receive+0xac>)
+ 8000848:	681b      	ldr	r3, [r3, #0]
+ 800084a:	681b      	ldr	r3, [r3, #0]
+ 800084c:	0018      	movs	r0, r3
+ 800084e:	f7ff fef2 	bl	8000636 <LL_I2C_IsActiveFlag_RXNE>
+ 8000852:	1e03      	subs	r3, r0, #0
+ 8000854:	d011      	beq.n	800087a <i2c_receive+0x76>
 			if (i < len) {
- 8000a62:	697a      	ldr	r2, [r7, #20]
- 8000a64:	687b      	ldr	r3, [r7, #4]
- 8000a66:	429a      	cmp	r2, r3
- 8000a68:	da0d      	bge.n	8000a86 <i2c_receive+0x76>
+ 8000856:	697a      	ldr	r2, [r7, #20]
+ 8000858:	687b      	ldr	r3, [r7, #4]
+ 800085a:	429a      	cmp	r2, r3
+ 800085c:	da0d      	bge.n	800087a <i2c_receive+0x76>
 				buffer[i++] = LL_I2C_ReceiveData8(i2c_context->i2c);
- 8000a6a:	4b14      	ldr	r3, [pc, #80]	; (8000abc <i2c_receive+0xac>)
- 8000a6c:	681b      	ldr	r3, [r3, #0]
- 8000a6e:	6819      	ldr	r1, [r3, #0]
- 8000a70:	697b      	ldr	r3, [r7, #20]
- 8000a72:	1c5a      	adds	r2, r3, #1
- 8000a74:	617a      	str	r2, [r7, #20]
- 8000a76:	001a      	movs	r2, r3
- 8000a78:	68bb      	ldr	r3, [r7, #8]
- 8000a7a:	189c      	adds	r4, r3, r2
- 8000a7c:	0008      	movs	r0, r1
- 8000a7e:	f7ff ff41 	bl	8000904 <LL_I2C_ReceiveData8>
- 8000a82:	0003      	movs	r3, r0
- 8000a84:	7023      	strb	r3, [r4, #0]
+ 800085e:	4b14      	ldr	r3, [pc, #80]	; (80008b0 <i2c_receive+0xac>)
+ 8000860:	681b      	ldr	r3, [r3, #0]
+ 8000862:	6819      	ldr	r1, [r3, #0]
+ 8000864:	697b      	ldr	r3, [r7, #20]
+ 8000866:	1c5a      	adds	r2, r3, #1
+ 8000868:	617a      	str	r2, [r7, #20]
+ 800086a:	001a      	movs	r2, r3
+ 800086c:	68bb      	ldr	r3, [r7, #8]
+ 800086e:	189c      	adds	r4, r3, r2
+ 8000870:	0008      	movs	r0, r1
+ 8000872:	f7ff ff41 	bl	80006f8 <LL_I2C_ReceiveData8>
+ 8000876:	0003      	movs	r3, r0
+ 8000878:	7023      	strb	r3, [r4, #0]
 	while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
- 8000a86:	4b0d      	ldr	r3, [pc, #52]	; (8000abc <i2c_receive+0xac>)
- 8000a88:	681b      	ldr	r3, [r3, #0]
- 8000a8a:	681b      	ldr	r3, [r3, #0]
- 8000a8c:	0018      	movs	r0, r3
- 8000a8e:	f7ff fee9 	bl	8000864 <LL_I2C_IsActiveFlag_STOP>
- 8000a92:	1e03      	subs	r3, r0, #0
- 8000a94:	d0dd      	beq.n	8000a52 <i2c_receive+0x42>
+ 800087a:	4b0d      	ldr	r3, [pc, #52]	; (80008b0 <i2c_receive+0xac>)
+ 800087c:	681b      	ldr	r3, [r3, #0]
+ 800087e:	681b      	ldr	r3, [r3, #0]
+ 8000880:	0018      	movs	r0, r3
+ 8000882:	f7ff fee9 	bl	8000658 <LL_I2C_IsActiveFlag_STOP>
+ 8000886:	1e03      	subs	r3, r0, #0
+ 8000888:	d0dd      	beq.n	8000846 <i2c_receive+0x42>
 			}
 		}
 	}
 	LL_I2C_ClearFlag_STOP(i2c_context->i2c);
- 8000a96:	4b09      	ldr	r3, [pc, #36]	; (8000abc <i2c_receive+0xac>)
- 8000a98:	681b      	ldr	r3, [r3, #0]
- 8000a9a:	681b      	ldr	r3, [r3, #0]
- 8000a9c:	0018      	movs	r0, r3
- 8000a9e:	f7ff fef2 	bl	8000886 <LL_I2C_ClearFlag_STOP>
+ 800088a:	4b09      	ldr	r3, [pc, #36]	; (80008b0 <i2c_receive+0xac>)
+ 800088c:	681b      	ldr	r3, [r3, #0]
+ 800088e:	681b      	ldr	r3, [r3, #0]
+ 8000890:	0018      	movs	r0, r3
+ 8000892:	f7ff fef2 	bl	800067a <LL_I2C_ClearFlag_STOP>
 	if (len != i) {
- 8000aa2:	687a      	ldr	r2, [r7, #4]
- 8000aa4:	697b      	ldr	r3, [r7, #20]
- 8000aa6:	429a      	cmp	r2, r3
- 8000aa8:	d002      	beq.n	8000ab0 <i2c_receive+0xa0>
+ 8000896:	687a      	ldr	r2, [r7, #4]
+ 8000898:	697b      	ldr	r3, [r7, #20]
+ 800089a:	429a      	cmp	r2, r3
+ 800089c:	d002      	beq.n	80008a4 <i2c_receive+0xa0>
 		return I2C_ERROR_RX_INCOMPLETE;
- 8000aaa:	2304      	movs	r3, #4
- 8000aac:	425b      	negs	r3, r3
- 8000aae:	e000      	b.n	8000ab2 <i2c_receive+0xa2>
+ 800089e:	2304      	movs	r3, #4
+ 80008a0:	425b      	negs	r3, r3
+ 80008a2:	e000      	b.n	80008a6 <i2c_receive+0xa2>
 	}
 
 	return I2C_OK;
- 8000ab0:	2300      	movs	r3, #0
+ 80008a4:	2300      	movs	r3, #0
 }
- 8000ab2:	0018      	movs	r0, r3
- 8000ab4:	46bd      	mov	sp, r7
- 8000ab6:	b007      	add	sp, #28
- 8000ab8:	bd90      	pop	{r4, r7, pc}
- 8000aba:	46c0      	nop			; (mov r8, r8)
- 8000abc:	20000024 	.word	0x20000024
- 8000ac0:	80002400 	.word	0x80002400
+ 80008a6:	0018      	movs	r0, r3
+ 80008a8:	46bd      	mov	sp, r7
+ 80008aa:	b007      	add	sp, #28
+ 80008ac:	bd90      	pop	{r4, r7, pc}
+ 80008ae:	46c0      	nop			; (mov r8, r8)
+ 80008b0:	20000024 	.word	0x20000024
+ 80008b4:	80002400 	.word	0x80002400
 
-08000ac4 <ltr329_read_register>:
- */
-#include "ltr329.h"
-#include "main.h" /* for uart_disable_interrupts() */
-
-static int8_t ltr329_read_register (ltr329_cmd_t register_addr, uint8_t *register_data )
-{
- 8000ac4:	b590      	push	{r4, r7, lr}
- 8000ac6:	b087      	sub	sp, #28
- 8000ac8:	af00      	add	r7, sp, #0
- 8000aca:	0002      	movs	r2, r0
- 8000acc:	6039      	str	r1, [r7, #0]
- 8000ace:	1dfb      	adds	r3, r7, #7
- 8000ad0:	701a      	strb	r2, [r3, #0]
-	uint8_t tx_buffer[1];
-	uint8_t rx_buffer[1];
-	int result;
-
-	// start measurement
-	tx_buffer[0] = register_addr;
- 8000ad2:	2410      	movs	r4, #16
- 8000ad4:	193b      	adds	r3, r7, r4
- 8000ad6:	1dfa      	adds	r2, r7, #7
- 8000ad8:	7812      	ldrb	r2, [r2, #0]
- 8000ada:	701a      	strb	r2, [r3, #0]
-	/* disable interrupts to prevent modbus/i2c conflict */
-	uart_disable_interrupts();
- 8000adc:	f001 fa32 	bl	8001f44 <uart_disable_interrupts>
-	result = i2c_transmit(LTR329_I2C_ADDRESS<<1, tx_buffer, 1);
- 8000ae0:	193b      	adds	r3, r7, r4
- 8000ae2:	2201      	movs	r2, #1
- 8000ae4:	0019      	movs	r1, r3
- 8000ae6:	2052      	movs	r0, #82	; 0x52
- 8000ae8:	f7ff ff3a 	bl	8000960 <i2c_transmit>
- 8000aec:	0003      	movs	r3, r0
- 8000aee:	617b      	str	r3, [r7, #20]
-	uart_enable_interrupts();
- 8000af0:	f001 fa3c 	bl	8001f6c <uart_enable_interrupts>
-	if (result != I2C_OK) {
- 8000af4:	697b      	ldr	r3, [r7, #20]
- 8000af6:	2b00      	cmp	r3, #0
- 8000af8:	d002      	beq.n	8000b00 <ltr329_read_register+0x3c>
-		return LTR329_ERROR;
- 8000afa:	2301      	movs	r3, #1
- 8000afc:	425b      	negs	r3, r3
- 8000afe:	e01b      	b.n	8000b38 <ltr329_read_register+0x74>
-	}
-	LL_mDelay(10); /* 10 ms should be enough */
- 8000b00:	200a      	movs	r0, #10
- 8000b02:	f002 ffe5 	bl	8003ad0 <LL_mDelay>
-	/* read out */
-	uart_disable_interrupts();
- 8000b06:	f001 fa1d 	bl	8001f44 <uart_disable_interrupts>
-	result = i2c_receive(LTR329_I2C_ADDRESS<<1, rx_buffer, 1);
- 8000b0a:	230c      	movs	r3, #12
- 8000b0c:	18fb      	adds	r3, r7, r3
- 8000b0e:	2201      	movs	r2, #1
- 8000b10:	0019      	movs	r1, r3
- 8000b12:	2052      	movs	r0, #82	; 0x52
- 8000b14:	f7ff ff7c 	bl	8000a10 <i2c_receive>
- 8000b18:	0003      	movs	r3, r0
- 8000b1a:	617b      	str	r3, [r7, #20]
-	uart_enable_interrupts();
- 8000b1c:	f001 fa26 	bl	8001f6c <uart_enable_interrupts>
-	if (result != I2C_OK) {
- 8000b20:	697b      	ldr	r3, [r7, #20]
- 8000b22:	2b00      	cmp	r3, #0
- 8000b24:	d002      	beq.n	8000b2c <ltr329_read_register+0x68>
-		return LTR329_ERROR;
- 8000b26:	2301      	movs	r3, #1
- 8000b28:	425b      	negs	r3, r3
- 8000b2a:	e005      	b.n	8000b38 <ltr329_read_register+0x74>
-	}
-
-	*register_data = rx_buffer[0];
- 8000b2c:	230c      	movs	r3, #12
- 8000b2e:	18fb      	adds	r3, r7, r3
- 8000b30:	781a      	ldrb	r2, [r3, #0]
- 8000b32:	683b      	ldr	r3, [r7, #0]
- 8000b34:	701a      	strb	r2, [r3, #0]
-	return LTR329_OK;
- 8000b36:	2300      	movs	r3, #0
-}
- 8000b38:	0018      	movs	r0, r3
- 8000b3a:	46bd      	mov	sp, r7
- 8000b3c:	b007      	add	sp, #28
- 8000b3e:	bd90      	pop	{r4, r7, pc}
-
-08000b40 <ltr329_write_register>:
-
-static int8_t ltr329_write_register (ltr329_cmd_t register_addr, uint8_t register_data)
-{
- 8000b40:	b590      	push	{r4, r7, lr}
- 8000b42:	b085      	sub	sp, #20
- 8000b44:	af00      	add	r7, sp, #0
- 8000b46:	0002      	movs	r2, r0
- 8000b48:	1dfb      	adds	r3, r7, #7
- 8000b4a:	701a      	strb	r2, [r3, #0]
- 8000b4c:	1dbb      	adds	r3, r7, #6
- 8000b4e:	1c0a      	adds	r2, r1, #0
- 8000b50:	701a      	strb	r2, [r3, #0]
-	uint8_t tx_buffer[2];
-	int result;
-
-	// start measurement
-	tx_buffer[0] = register_addr;
- 8000b52:	2408      	movs	r4, #8
- 8000b54:	193b      	adds	r3, r7, r4
- 8000b56:	1dfa      	adds	r2, r7, #7
- 8000b58:	7812      	ldrb	r2, [r2, #0]
- 8000b5a:	701a      	strb	r2, [r3, #0]
-	tx_buffer[1] = register_data;
- 8000b5c:	193b      	adds	r3, r7, r4
- 8000b5e:	1dba      	adds	r2, r7, #6
- 8000b60:	7812      	ldrb	r2, [r2, #0]
- 8000b62:	705a      	strb	r2, [r3, #1]
-	/* disable interrupts to prevent modbus/i2c conflict */
-	uart_disable_interrupts();
- 8000b64:	f001 f9ee 	bl	8001f44 <uart_disable_interrupts>
-	result = i2c_transmit(LTR329_I2C_ADDRESS<<1, tx_buffer, 2);
- 8000b68:	193b      	adds	r3, r7, r4
- 8000b6a:	2202      	movs	r2, #2
- 8000b6c:	0019      	movs	r1, r3
- 8000b6e:	2052      	movs	r0, #82	; 0x52
- 8000b70:	f7ff fef6 	bl	8000960 <i2c_transmit>
- 8000b74:	0003      	movs	r3, r0
- 8000b76:	60fb      	str	r3, [r7, #12]
-	uart_enable_interrupts();
- 8000b78:	f001 f9f8 	bl	8001f6c <uart_enable_interrupts>
-	if (result != I2C_OK) {
- 8000b7c:	68fb      	ldr	r3, [r7, #12]
- 8000b7e:	2b00      	cmp	r3, #0
- 8000b80:	d002      	beq.n	8000b88 <ltr329_write_register+0x48>
-		return LTR329_ERROR;
- 8000b82:	2301      	movs	r3, #1
- 8000b84:	425b      	negs	r3, r3
- 8000b86:	e000      	b.n	8000b8a <ltr329_write_register+0x4a>
-	}
-	return LTR329_OK;
- 8000b88:	2300      	movs	r3, #0
-}
- 8000b8a:	0018      	movs	r0, r3
- 8000b8c:	46bd      	mov	sp, r7
- 8000b8e:	b005      	add	sp, #20
- 8000b90:	bd90      	pop	{r4, r7, pc}
-
-08000b92 <ltr329_write_settings>:
-
-int8_t ltr329_write_settings (ltr329_gain_t gain, ltr329_als_mode_t mode, ltr329_integration_time_t integ_time, ltr329_measurement_rate_t meas_rate)
-{
- 8000b92:	b5b0      	push	{r4, r5, r7, lr}
- 8000b94:	b084      	sub	sp, #16
- 8000b96:	af00      	add	r7, sp, #0
- 8000b98:	0005      	movs	r5, r0
- 8000b9a:	000c      	movs	r4, r1
- 8000b9c:	0010      	movs	r0, r2
- 8000b9e:	0019      	movs	r1, r3
- 8000ba0:	1dfb      	adds	r3, r7, #7
- 8000ba2:	1c2a      	adds	r2, r5, #0
- 8000ba4:	701a      	strb	r2, [r3, #0]
- 8000ba6:	1dbb      	adds	r3, r7, #6
- 8000ba8:	1c22      	adds	r2, r4, #0
- 8000baa:	701a      	strb	r2, [r3, #0]
- 8000bac:	1d7b      	adds	r3, r7, #5
- 8000bae:	1c02      	adds	r2, r0, #0
- 8000bb0:	701a      	strb	r2, [r3, #0]
- 8000bb2:	1d3b      	adds	r3, r7, #4
- 8000bb4:	1c0a      	adds	r2, r1, #0
- 8000bb6:	701a      	strb	r2, [r3, #0]
-	int8_t result;
-	/* Write Gain and ALS Mode */
-	result = ltr329_write_register(LTR329_ALS_CONTR, (gain | mode));
- 8000bb8:	1dfa      	adds	r2, r7, #7
- 8000bba:	1dbb      	adds	r3, r7, #6
- 8000bbc:	7812      	ldrb	r2, [r2, #0]
- 8000bbe:	781b      	ldrb	r3, [r3, #0]
- 8000bc0:	4313      	orrs	r3, r2
- 8000bc2:	b2db      	uxtb	r3, r3
- 8000bc4:	250f      	movs	r5, #15
- 8000bc6:	197c      	adds	r4, r7, r5
- 8000bc8:	0019      	movs	r1, r3
- 8000bca:	2080      	movs	r0, #128	; 0x80
- 8000bcc:	f7ff ffb8 	bl	8000b40 <ltr329_write_register>
- 8000bd0:	0003      	movs	r3, r0
- 8000bd2:	7023      	strb	r3, [r4, #0]
-	if (result != LTR329_OK)
- 8000bd4:	197b      	adds	r3, r7, r5
- 8000bd6:	781b      	ldrb	r3, [r3, #0]
- 8000bd8:	b25b      	sxtb	r3, r3
- 8000bda:	2b00      	cmp	r3, #0
- 8000bdc:	d002      	beq.n	8000be4 <ltr329_write_settings+0x52>
-	{
-		return LTR329_ERROR;
- 8000bde:	2301      	movs	r3, #1
- 8000be0:	425b      	negs	r3, r3
- 8000be2:	e016      	b.n	8000c12 <ltr329_write_settings+0x80>
-	}
-	/* Write Integration Time and Measurement Rate */
-
-	result = ltr329_write_register(LTR329_ALS_MEAS_RATE, (integ_time | meas_rate));
- 8000be4:	1d7a      	adds	r2, r7, #5
- 8000be6:	1d3b      	adds	r3, r7, #4
- 8000be8:	7812      	ldrb	r2, [r2, #0]
- 8000bea:	781b      	ldrb	r3, [r3, #0]
- 8000bec:	4313      	orrs	r3, r2
- 8000bee:	b2db      	uxtb	r3, r3
- 8000bf0:	250f      	movs	r5, #15
- 8000bf2:	197c      	adds	r4, r7, r5
- 8000bf4:	0019      	movs	r1, r3
- 8000bf6:	2085      	movs	r0, #133	; 0x85
- 8000bf8:	f7ff ffa2 	bl	8000b40 <ltr329_write_register>
- 8000bfc:	0003      	movs	r3, r0
- 8000bfe:	7023      	strb	r3, [r4, #0]
-	if (result != LTR329_OK)
- 8000c00:	197b      	adds	r3, r7, r5
- 8000c02:	781b      	ldrb	r3, [r3, #0]
- 8000c04:	b25b      	sxtb	r3, r3
- 8000c06:	2b00      	cmp	r3, #0
- 8000c08:	d002      	beq.n	8000c10 <ltr329_write_settings+0x7e>
-	{
-		return LTR329_ERROR;
- 8000c0a:	2301      	movs	r3, #1
- 8000c0c:	425b      	negs	r3, r3
- 8000c0e:	e000      	b.n	8000c12 <ltr329_write_settings+0x80>
-	}
-	return LTR329_OK;
- 8000c10:	2300      	movs	r3, #0
-}
- 8000c12:	0018      	movs	r0, r3
- 8000c14:	46bd      	mov	sp, r7
- 8000c16:	b004      	add	sp, #16
- 8000c18:	bdb0      	pop	{r4, r5, r7, pc}
-
-08000c1a <ltr329_measure>:
-	}
-	return LTR329_OK;
-}
-
-int8_t ltr329_measure (uint16_t *data_ch0, uint16_t *data_ch1)
-{
- 8000c1a:	b580      	push	{r7, lr}
- 8000c1c:	b084      	sub	sp, #16
- 8000c1e:	af00      	add	r7, sp, #0
- 8000c20:	6078      	str	r0, [r7, #4]
- 8000c22:	6039      	str	r1, [r7, #0]
-	uint8_t ch0_l, ch0_h, ch1_l, ch1_h;
-	int result;
-	result = ltr329_read_register(LTR329_ALS_DATA_CH0_0, &ch0_l);
- 8000c24:	230b      	movs	r3, #11
- 8000c26:	18fb      	adds	r3, r7, r3
- 8000c28:	0019      	movs	r1, r3
- 8000c2a:	208a      	movs	r0, #138	; 0x8a
- 8000c2c:	f7ff ff4a 	bl	8000ac4 <ltr329_read_register>
- 8000c30:	0003      	movs	r3, r0
- 8000c32:	60fb      	str	r3, [r7, #12]
-	if (result != LTR329_OK)
- 8000c34:	68fb      	ldr	r3, [r7, #12]
- 8000c36:	2b00      	cmp	r3, #0
- 8000c38:	d002      	beq.n	8000c40 <ltr329_measure+0x26>
-	{
-		return LTR329_ERROR;
- 8000c3a:	2301      	movs	r3, #1
- 8000c3c:	425b      	negs	r3, r3
- 8000c3e:	e046      	b.n	8000cce <ltr329_measure+0xb4>
-	}
-	result = ltr329_read_register(LTR329_ALS_DATA_CH0_1, &ch0_h);
- 8000c40:	230a      	movs	r3, #10
- 8000c42:	18fb      	adds	r3, r7, r3
- 8000c44:	0019      	movs	r1, r3
- 8000c46:	208b      	movs	r0, #139	; 0x8b
- 8000c48:	f7ff ff3c 	bl	8000ac4 <ltr329_read_register>
- 8000c4c:	0003      	movs	r3, r0
- 8000c4e:	60fb      	str	r3, [r7, #12]
-	if (result != LTR329_OK)
- 8000c50:	68fb      	ldr	r3, [r7, #12]
- 8000c52:	2b00      	cmp	r3, #0
- 8000c54:	d002      	beq.n	8000c5c <ltr329_measure+0x42>
-	{
-		return LTR329_ERROR;
- 8000c56:	2301      	movs	r3, #1
- 8000c58:	425b      	negs	r3, r3
- 8000c5a:	e038      	b.n	8000cce <ltr329_measure+0xb4>
-	}
-	result = ltr329_read_register(LTR329_ALS_DATA_CH1_0, &ch1_l);
- 8000c5c:	2309      	movs	r3, #9
- 8000c5e:	18fb      	adds	r3, r7, r3
- 8000c60:	0019      	movs	r1, r3
- 8000c62:	2088      	movs	r0, #136	; 0x88
- 8000c64:	f7ff ff2e 	bl	8000ac4 <ltr329_read_register>
- 8000c68:	0003      	movs	r3, r0
- 8000c6a:	60fb      	str	r3, [r7, #12]
-	if (result != LTR329_OK)
- 8000c6c:	68fb      	ldr	r3, [r7, #12]
- 8000c6e:	2b00      	cmp	r3, #0
- 8000c70:	d002      	beq.n	8000c78 <ltr329_measure+0x5e>
-	{
-		return LTR329_ERROR;
- 8000c72:	2301      	movs	r3, #1
- 8000c74:	425b      	negs	r3, r3
- 8000c76:	e02a      	b.n	8000cce <ltr329_measure+0xb4>
-	}
-	result = ltr329_read_register(LTR329_ALS_DATA_CH1_1, &ch1_h);
- 8000c78:	2308      	movs	r3, #8
- 8000c7a:	18fb      	adds	r3, r7, r3
- 8000c7c:	0019      	movs	r1, r3
- 8000c7e:	2089      	movs	r0, #137	; 0x89
- 8000c80:	f7ff ff20 	bl	8000ac4 <ltr329_read_register>
- 8000c84:	0003      	movs	r3, r0
- 8000c86:	60fb      	str	r3, [r7, #12]
-	if (result != LTR329_OK)
- 8000c88:	68fb      	ldr	r3, [r7, #12]
- 8000c8a:	2b00      	cmp	r3, #0
- 8000c8c:	d002      	beq.n	8000c94 <ltr329_measure+0x7a>
-	{
-		return LTR329_ERROR;
- 8000c8e:	2301      	movs	r3, #1
- 8000c90:	425b      	negs	r3, r3
- 8000c92:	e01c      	b.n	8000cce <ltr329_measure+0xb4>
-	}
-
-	*data_ch0 = (ch0_h << 8) + ch0_l;
- 8000c94:	230a      	movs	r3, #10
- 8000c96:	18fb      	adds	r3, r7, r3
- 8000c98:	781b      	ldrb	r3, [r3, #0]
- 8000c9a:	b29b      	uxth	r3, r3
- 8000c9c:	021b      	lsls	r3, r3, #8
- 8000c9e:	b29a      	uxth	r2, r3
- 8000ca0:	230b      	movs	r3, #11
- 8000ca2:	18fb      	adds	r3, r7, r3
- 8000ca4:	781b      	ldrb	r3, [r3, #0]
- 8000ca6:	b29b      	uxth	r3, r3
- 8000ca8:	18d3      	adds	r3, r2, r3
- 8000caa:	b29a      	uxth	r2, r3
- 8000cac:	687b      	ldr	r3, [r7, #4]
- 8000cae:	801a      	strh	r2, [r3, #0]
-	*data_ch1 = (ch1_h << 8) + ch1_l;
- 8000cb0:	2308      	movs	r3, #8
- 8000cb2:	18fb      	adds	r3, r7, r3
- 8000cb4:	781b      	ldrb	r3, [r3, #0]
- 8000cb6:	b29b      	uxth	r3, r3
- 8000cb8:	021b      	lsls	r3, r3, #8
- 8000cba:	b29a      	uxth	r2, r3
- 8000cbc:	2309      	movs	r3, #9
- 8000cbe:	18fb      	adds	r3, r7, r3
- 8000cc0:	781b      	ldrb	r3, [r3, #0]
- 8000cc2:	b29b      	uxth	r3, r3
- 8000cc4:	18d3      	adds	r3, r2, r3
- 8000cc6:	b29a      	uxth	r2, r3
- 8000cc8:	683b      	ldr	r3, [r7, #0]
- 8000cca:	801a      	strh	r2, [r3, #0]
-	return LTR329_OK;
- 8000ccc:	2300      	movs	r3, #0
-}
- 8000cce:	0018      	movs	r0, r3
- 8000cd0:	46bd      	mov	sp, r7
- 8000cd2:	b004      	add	sp, #16
- 8000cd4:	bd80      	pop	{r7, pc}
-
-08000cd6 <ltr329_read_status_register>:
-
-int8_t ltr329_read_status_register(uint8_t *data_valid, uint8_t *new_data, ltr329_gain_t *gain)
-{
- 8000cd6:	b5b0      	push	{r4, r5, r7, lr}
- 8000cd8:	b086      	sub	sp, #24
- 8000cda:	af00      	add	r7, sp, #0
- 8000cdc:	60f8      	str	r0, [r7, #12]
- 8000cde:	60b9      	str	r1, [r7, #8]
- 8000ce0:	607a      	str	r2, [r7, #4]
-	int8_t result;
-	uint8_t status_register_data;
-	result = ltr329_read_register(LTR329_ALS_STATUS, &status_register_data);
- 8000ce2:	2517      	movs	r5, #23
- 8000ce4:	197c      	adds	r4, r7, r5
- 8000ce6:	2313      	movs	r3, #19
- 8000ce8:	18fb      	adds	r3, r7, r3
- 8000cea:	0019      	movs	r1, r3
- 8000cec:	208c      	movs	r0, #140	; 0x8c
- 8000cee:	f7ff fee9 	bl	8000ac4 <ltr329_read_register>
- 8000cf2:	0003      	movs	r3, r0
- 8000cf4:	7023      	strb	r3, [r4, #0]
-	if (result != LTR329_OK)
- 8000cf6:	197b      	adds	r3, r7, r5
- 8000cf8:	781b      	ldrb	r3, [r3, #0]
- 8000cfa:	b25b      	sxtb	r3, r3
- 8000cfc:	2b00      	cmp	r3, #0
- 8000cfe:	d002      	beq.n	8000d06 <ltr329_read_status_register+0x30>
-	{
-		return LTR329_ERROR;
- 8000d00:	2301      	movs	r3, #1
- 8000d02:	425b      	negs	r3, r3
- 8000d04:	e039      	b.n	8000d7a <ltr329_read_status_register+0xa4>
-	}
-
-	/* Check data valid */
-	uint8_t data_invalid_mask = 0b10000000;
- 8000d06:	2116      	movs	r1, #22
- 8000d08:	187b      	adds	r3, r7, r1
- 8000d0a:	2280      	movs	r2, #128	; 0x80
- 8000d0c:	701a      	strb	r2, [r3, #0]
-	if ((status_register_data & data_invalid_mask) == data_invalid_mask)
- 8000d0e:	2313      	movs	r3, #19
- 8000d10:	18fb      	adds	r3, r7, r3
- 8000d12:	781b      	ldrb	r3, [r3, #0]
- 8000d14:	187a      	adds	r2, r7, r1
- 8000d16:	7812      	ldrb	r2, [r2, #0]
- 8000d18:	4013      	ands	r3, r2
- 8000d1a:	b2db      	uxtb	r3, r3
- 8000d1c:	187a      	adds	r2, r7, r1
- 8000d1e:	7812      	ldrb	r2, [r2, #0]
- 8000d20:	429a      	cmp	r2, r3
- 8000d22:	d103      	bne.n	8000d2c <ltr329_read_status_register+0x56>
-	{
-		*data_valid = 0;
- 8000d24:	68fb      	ldr	r3, [r7, #12]
- 8000d26:	2200      	movs	r2, #0
- 8000d28:	701a      	strb	r2, [r3, #0]
- 8000d2a:	e002      	b.n	8000d32 <ltr329_read_status_register+0x5c>
-	} else
-	{
-		*data_valid = 1;
- 8000d2c:	68fb      	ldr	r3, [r7, #12]
- 8000d2e:	2201      	movs	r2, #1
- 8000d30:	701a      	strb	r2, [r3, #0]
-	}
-
-	/* Check if there is new data */
-	uint8_t data_status_mask = 0b00000100;
- 8000d32:	2115      	movs	r1, #21
- 8000d34:	187b      	adds	r3, r7, r1
- 8000d36:	2204      	movs	r2, #4
- 8000d38:	701a      	strb	r2, [r3, #0]
-	if ((status_register_data & data_status_mask) == data_status_mask)
- 8000d3a:	2313      	movs	r3, #19
- 8000d3c:	18fb      	adds	r3, r7, r3
- 8000d3e:	781b      	ldrb	r3, [r3, #0]
- 8000d40:	187a      	adds	r2, r7, r1
- 8000d42:	7812      	ldrb	r2, [r2, #0]
- 8000d44:	4013      	ands	r3, r2
- 8000d46:	b2db      	uxtb	r3, r3
- 8000d48:	187a      	adds	r2, r7, r1
- 8000d4a:	7812      	ldrb	r2, [r2, #0]
- 8000d4c:	429a      	cmp	r2, r3
- 8000d4e:	d103      	bne.n	8000d58 <ltr329_read_status_register+0x82>
-	{
-		*new_data = 1;
- 8000d50:	68bb      	ldr	r3, [r7, #8]
- 8000d52:	2201      	movs	r2, #1
- 8000d54:	701a      	strb	r2, [r3, #0]
- 8000d56:	e002      	b.n	8000d5e <ltr329_read_status_register+0x88>
-	} else
-	{
-		*new_data = 0;
- 8000d58:	68bb      	ldr	r3, [r7, #8]
- 8000d5a:	2200      	movs	r2, #0
- 8000d5c:	701a      	strb	r2, [r3, #0]
-	}
-
-	/* Check Gain */
-	/* TODO: This might not be safe */
-	uint8_t gain_mask = 0b01110000;
- 8000d5e:	2114      	movs	r1, #20
- 8000d60:	187b      	adds	r3, r7, r1
- 8000d62:	2270      	movs	r2, #112	; 0x70
- 8000d64:	701a      	strb	r2, [r3, #0]
-	*gain = status_register_data & gain_mask;
- 8000d66:	2313      	movs	r3, #19
- 8000d68:	18fb      	adds	r3, r7, r3
- 8000d6a:	781b      	ldrb	r3, [r3, #0]
- 8000d6c:	187a      	adds	r2, r7, r1
- 8000d6e:	7812      	ldrb	r2, [r2, #0]
- 8000d70:	4013      	ands	r3, r2
- 8000d72:	b2da      	uxtb	r2, r3
- 8000d74:	687b      	ldr	r3, [r7, #4]
- 8000d76:	701a      	strb	r2, [r3, #0]
-
-	return LTR329_OK;
- 8000d78:	2300      	movs	r3, #0
-}
- 8000d7a:	0018      	movs	r0, r3
- 8000d7c:	46bd      	mov	sp, r7
- 8000d7e:	b006      	add	sp, #24
- 8000d80:	bdb0      	pop	{r4, r5, r7, pc}
-	...
-
-08000d84 <__NVIC_EnableIRQ>:
+080008b8 <__NVIC_EnableIRQ>:
   \details Enables a device specific interrupt in the NVIC interrupt controller.
   \param [in]      IRQn  Device specific interrupt number.
   \note    IRQn must not be negative.
  */
 __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
- 8000d84:	b580      	push	{r7, lr}
- 8000d86:	b082      	sub	sp, #8
- 8000d88:	af00      	add	r7, sp, #0
- 8000d8a:	0002      	movs	r2, r0
- 8000d8c:	1dfb      	adds	r3, r7, #7
- 8000d8e:	701a      	strb	r2, [r3, #0]
+ 80008b8:	b580      	push	{r7, lr}
+ 80008ba:	b082      	sub	sp, #8
+ 80008bc:	af00      	add	r7, sp, #0
+ 80008be:	0002      	movs	r2, r0
+ 80008c0:	1dfb      	adds	r3, r7, #7
+ 80008c2:	701a      	strb	r2, [r3, #0]
   if ((int32_t)(IRQn) >= 0)
- 8000d90:	1dfb      	adds	r3, r7, #7
- 8000d92:	781b      	ldrb	r3, [r3, #0]
- 8000d94:	2b7f      	cmp	r3, #127	; 0x7f
- 8000d96:	d809      	bhi.n	8000dac <__NVIC_EnableIRQ+0x28>
+ 80008c4:	1dfb      	adds	r3, r7, #7
+ 80008c6:	781b      	ldrb	r3, [r3, #0]
+ 80008c8:	2b7f      	cmp	r3, #127	; 0x7f
+ 80008ca:	d809      	bhi.n	80008e0 <__NVIC_EnableIRQ+0x28>
   {
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 8000d98:	1dfb      	adds	r3, r7, #7
- 8000d9a:	781b      	ldrb	r3, [r3, #0]
- 8000d9c:	001a      	movs	r2, r3
- 8000d9e:	231f      	movs	r3, #31
- 8000da0:	401a      	ands	r2, r3
- 8000da2:	4b04      	ldr	r3, [pc, #16]	; (8000db4 <__NVIC_EnableIRQ+0x30>)
- 8000da4:	2101      	movs	r1, #1
- 8000da6:	4091      	lsls	r1, r2
- 8000da8:	000a      	movs	r2, r1
- 8000daa:	601a      	str	r2, [r3, #0]
+ 80008cc:	1dfb      	adds	r3, r7, #7
+ 80008ce:	781b      	ldrb	r3, [r3, #0]
+ 80008d0:	001a      	movs	r2, r3
+ 80008d2:	231f      	movs	r3, #31
+ 80008d4:	401a      	ands	r2, r3
+ 80008d6:	4b04      	ldr	r3, [pc, #16]	; (80008e8 <__NVIC_EnableIRQ+0x30>)
+ 80008d8:	2101      	movs	r1, #1
+ 80008da:	4091      	lsls	r1, r2
+ 80008dc:	000a      	movs	r2, r1
+ 80008de:	601a      	str	r2, [r3, #0]
   }
 }
- 8000dac:	46c0      	nop			; (mov r8, r8)
- 8000dae:	46bd      	mov	sp, r7
- 8000db0:	b002      	add	sp, #8
- 8000db2:	bd80      	pop	{r7, pc}
- 8000db4:	e000e100 	.word	0xe000e100
+ 80008e0:	46c0      	nop			; (mov r8, r8)
+ 80008e2:	46bd      	mov	sp, r7
+ 80008e4:	b002      	add	sp, #8
+ 80008e6:	bd80      	pop	{r7, pc}
+ 80008e8:	e000e100 	.word	0xe000e100
 
-08000db8 <__NVIC_SetPriority>:
+080008ec <__NVIC_SetPriority>:
   \param [in]      IRQn  Interrupt number.
   \param [in]  priority  Priority to set.
   \note    The priority cannot be set for every processor exception.
  */
 __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
 {
- 8000db8:	b590      	push	{r4, r7, lr}
- 8000dba:	b083      	sub	sp, #12
- 8000dbc:	af00      	add	r7, sp, #0
- 8000dbe:	0002      	movs	r2, r0
- 8000dc0:	6039      	str	r1, [r7, #0]
- 8000dc2:	1dfb      	adds	r3, r7, #7
- 8000dc4:	701a      	strb	r2, [r3, #0]
+ 80008ec:	b590      	push	{r4, r7, lr}
+ 80008ee:	b083      	sub	sp, #12
+ 80008f0:	af00      	add	r7, sp, #0
+ 80008f2:	0002      	movs	r2, r0
+ 80008f4:	6039      	str	r1, [r7, #0]
+ 80008f6:	1dfb      	adds	r3, r7, #7
+ 80008f8:	701a      	strb	r2, [r3, #0]
   if ((int32_t)(IRQn) >= 0)
- 8000dc6:	1dfb      	adds	r3, r7, #7
- 8000dc8:	781b      	ldrb	r3, [r3, #0]
- 8000dca:	2b7f      	cmp	r3, #127	; 0x7f
- 8000dcc:	d828      	bhi.n	8000e20 <__NVIC_SetPriority+0x68>
+ 80008fa:	1dfb      	adds	r3, r7, #7
+ 80008fc:	781b      	ldrb	r3, [r3, #0]
+ 80008fe:	2b7f      	cmp	r3, #127	; 0x7f
+ 8000900:	d828      	bhi.n	8000954 <__NVIC_SetPriority+0x68>
   {
     NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 8000dce:	4a2f      	ldr	r2, [pc, #188]	; (8000e8c <__NVIC_SetPriority+0xd4>)
- 8000dd0:	1dfb      	adds	r3, r7, #7
- 8000dd2:	781b      	ldrb	r3, [r3, #0]
- 8000dd4:	b25b      	sxtb	r3, r3
- 8000dd6:	089b      	lsrs	r3, r3, #2
- 8000dd8:	33c0      	adds	r3, #192	; 0xc0
- 8000dda:	009b      	lsls	r3, r3, #2
- 8000ddc:	589b      	ldr	r3, [r3, r2]
- 8000dde:	1dfa      	adds	r2, r7, #7
- 8000de0:	7812      	ldrb	r2, [r2, #0]
- 8000de2:	0011      	movs	r1, r2
- 8000de4:	2203      	movs	r2, #3
- 8000de6:	400a      	ands	r2, r1
- 8000de8:	00d2      	lsls	r2, r2, #3
- 8000dea:	21ff      	movs	r1, #255	; 0xff
- 8000dec:	4091      	lsls	r1, r2
- 8000dee:	000a      	movs	r2, r1
- 8000df0:	43d2      	mvns	r2, r2
- 8000df2:	401a      	ands	r2, r3
- 8000df4:	0011      	movs	r1, r2
+ 8000902:	4a2f      	ldr	r2, [pc, #188]	; (80009c0 <__NVIC_SetPriority+0xd4>)
+ 8000904:	1dfb      	adds	r3, r7, #7
+ 8000906:	781b      	ldrb	r3, [r3, #0]
+ 8000908:	b25b      	sxtb	r3, r3
+ 800090a:	089b      	lsrs	r3, r3, #2
+ 800090c:	33c0      	adds	r3, #192	; 0xc0
+ 800090e:	009b      	lsls	r3, r3, #2
+ 8000910:	589b      	ldr	r3, [r3, r2]
+ 8000912:	1dfa      	adds	r2, r7, #7
+ 8000914:	7812      	ldrb	r2, [r2, #0]
+ 8000916:	0011      	movs	r1, r2
+ 8000918:	2203      	movs	r2, #3
+ 800091a:	400a      	ands	r2, r1
+ 800091c:	00d2      	lsls	r2, r2, #3
+ 800091e:	21ff      	movs	r1, #255	; 0xff
+ 8000920:	4091      	lsls	r1, r2
+ 8000922:	000a      	movs	r2, r1
+ 8000924:	43d2      	mvns	r2, r2
+ 8000926:	401a      	ands	r2, r3
+ 8000928:	0011      	movs	r1, r2
        (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- 8000df6:	683b      	ldr	r3, [r7, #0]
- 8000df8:	019b      	lsls	r3, r3, #6
- 8000dfa:	22ff      	movs	r2, #255	; 0xff
- 8000dfc:	401a      	ands	r2, r3
- 8000dfe:	1dfb      	adds	r3, r7, #7
- 8000e00:	781b      	ldrb	r3, [r3, #0]
- 8000e02:	0018      	movs	r0, r3
- 8000e04:	2303      	movs	r3, #3
- 8000e06:	4003      	ands	r3, r0
- 8000e08:	00db      	lsls	r3, r3, #3
- 8000e0a:	409a      	lsls	r2, r3
+ 800092a:	683b      	ldr	r3, [r7, #0]
+ 800092c:	019b      	lsls	r3, r3, #6
+ 800092e:	22ff      	movs	r2, #255	; 0xff
+ 8000930:	401a      	ands	r2, r3
+ 8000932:	1dfb      	adds	r3, r7, #7
+ 8000934:	781b      	ldrb	r3, [r3, #0]
+ 8000936:	0018      	movs	r0, r3
+ 8000938:	2303      	movs	r3, #3
+ 800093a:	4003      	ands	r3, r0
+ 800093c:	00db      	lsls	r3, r3, #3
+ 800093e:	409a      	lsls	r2, r3
     NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 8000e0c:	481f      	ldr	r0, [pc, #124]	; (8000e8c <__NVIC_SetPriority+0xd4>)
- 8000e0e:	1dfb      	adds	r3, r7, #7
- 8000e10:	781b      	ldrb	r3, [r3, #0]
- 8000e12:	b25b      	sxtb	r3, r3
- 8000e14:	089b      	lsrs	r3, r3, #2
- 8000e16:	430a      	orrs	r2, r1
- 8000e18:	33c0      	adds	r3, #192	; 0xc0
- 8000e1a:	009b      	lsls	r3, r3, #2
- 8000e1c:	501a      	str	r2, [r3, r0]
+ 8000940:	481f      	ldr	r0, [pc, #124]	; (80009c0 <__NVIC_SetPriority+0xd4>)
+ 8000942:	1dfb      	adds	r3, r7, #7
+ 8000944:	781b      	ldrb	r3, [r3, #0]
+ 8000946:	b25b      	sxtb	r3, r3
+ 8000948:	089b      	lsrs	r3, r3, #2
+ 800094a:	430a      	orrs	r2, r1
+ 800094c:	33c0      	adds	r3, #192	; 0xc0
+ 800094e:	009b      	lsls	r3, r3, #2
+ 8000950:	501a      	str	r2, [r3, r0]
   else
   {
     SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
        (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
   }
 }
- 8000e1e:	e031      	b.n	8000e84 <__NVIC_SetPriority+0xcc>
+ 8000952:	e031      	b.n	80009b8 <__NVIC_SetPriority+0xcc>
     SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 8000e20:	4a1b      	ldr	r2, [pc, #108]	; (8000e90 <__NVIC_SetPriority+0xd8>)
- 8000e22:	1dfb      	adds	r3, r7, #7
- 8000e24:	781b      	ldrb	r3, [r3, #0]
- 8000e26:	0019      	movs	r1, r3
- 8000e28:	230f      	movs	r3, #15
- 8000e2a:	400b      	ands	r3, r1
- 8000e2c:	3b08      	subs	r3, #8
- 8000e2e:	089b      	lsrs	r3, r3, #2
- 8000e30:	3306      	adds	r3, #6
- 8000e32:	009b      	lsls	r3, r3, #2
- 8000e34:	18d3      	adds	r3, r2, r3
- 8000e36:	3304      	adds	r3, #4
- 8000e38:	681b      	ldr	r3, [r3, #0]
- 8000e3a:	1dfa      	adds	r2, r7, #7
- 8000e3c:	7812      	ldrb	r2, [r2, #0]
- 8000e3e:	0011      	movs	r1, r2
- 8000e40:	2203      	movs	r2, #3
- 8000e42:	400a      	ands	r2, r1
- 8000e44:	00d2      	lsls	r2, r2, #3
- 8000e46:	21ff      	movs	r1, #255	; 0xff
- 8000e48:	4091      	lsls	r1, r2
- 8000e4a:	000a      	movs	r2, r1
- 8000e4c:	43d2      	mvns	r2, r2
- 8000e4e:	401a      	ands	r2, r3
- 8000e50:	0011      	movs	r1, r2
+ 8000954:	4a1b      	ldr	r2, [pc, #108]	; (80009c4 <__NVIC_SetPriority+0xd8>)
+ 8000956:	1dfb      	adds	r3, r7, #7
+ 8000958:	781b      	ldrb	r3, [r3, #0]
+ 800095a:	0019      	movs	r1, r3
+ 800095c:	230f      	movs	r3, #15
+ 800095e:	400b      	ands	r3, r1
+ 8000960:	3b08      	subs	r3, #8
+ 8000962:	089b      	lsrs	r3, r3, #2
+ 8000964:	3306      	adds	r3, #6
+ 8000966:	009b      	lsls	r3, r3, #2
+ 8000968:	18d3      	adds	r3, r2, r3
+ 800096a:	3304      	adds	r3, #4
+ 800096c:	681b      	ldr	r3, [r3, #0]
+ 800096e:	1dfa      	adds	r2, r7, #7
+ 8000970:	7812      	ldrb	r2, [r2, #0]
+ 8000972:	0011      	movs	r1, r2
+ 8000974:	2203      	movs	r2, #3
+ 8000976:	400a      	ands	r2, r1
+ 8000978:	00d2      	lsls	r2, r2, #3
+ 800097a:	21ff      	movs	r1, #255	; 0xff
+ 800097c:	4091      	lsls	r1, r2
+ 800097e:	000a      	movs	r2, r1
+ 8000980:	43d2      	mvns	r2, r2
+ 8000982:	401a      	ands	r2, r3
+ 8000984:	0011      	movs	r1, r2
        (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- 8000e52:	683b      	ldr	r3, [r7, #0]
- 8000e54:	019b      	lsls	r3, r3, #6
- 8000e56:	22ff      	movs	r2, #255	; 0xff
- 8000e58:	401a      	ands	r2, r3
- 8000e5a:	1dfb      	adds	r3, r7, #7
- 8000e5c:	781b      	ldrb	r3, [r3, #0]
- 8000e5e:	0018      	movs	r0, r3
- 8000e60:	2303      	movs	r3, #3
- 8000e62:	4003      	ands	r3, r0
- 8000e64:	00db      	lsls	r3, r3, #3
- 8000e66:	409a      	lsls	r2, r3
+ 8000986:	683b      	ldr	r3, [r7, #0]
+ 8000988:	019b      	lsls	r3, r3, #6
+ 800098a:	22ff      	movs	r2, #255	; 0xff
+ 800098c:	401a      	ands	r2, r3
+ 800098e:	1dfb      	adds	r3, r7, #7
+ 8000990:	781b      	ldrb	r3, [r3, #0]
+ 8000992:	0018      	movs	r0, r3
+ 8000994:	2303      	movs	r3, #3
+ 8000996:	4003      	ands	r3, r0
+ 8000998:	00db      	lsls	r3, r3, #3
+ 800099a:	409a      	lsls	r2, r3
     SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 8000e68:	4809      	ldr	r0, [pc, #36]	; (8000e90 <__NVIC_SetPriority+0xd8>)
- 8000e6a:	1dfb      	adds	r3, r7, #7
- 8000e6c:	781b      	ldrb	r3, [r3, #0]
- 8000e6e:	001c      	movs	r4, r3
- 8000e70:	230f      	movs	r3, #15
- 8000e72:	4023      	ands	r3, r4
- 8000e74:	3b08      	subs	r3, #8
- 8000e76:	089b      	lsrs	r3, r3, #2
- 8000e78:	430a      	orrs	r2, r1
- 8000e7a:	3306      	adds	r3, #6
- 8000e7c:	009b      	lsls	r3, r3, #2
- 8000e7e:	18c3      	adds	r3, r0, r3
- 8000e80:	3304      	adds	r3, #4
- 8000e82:	601a      	str	r2, [r3, #0]
+ 800099c:	4809      	ldr	r0, [pc, #36]	; (80009c4 <__NVIC_SetPriority+0xd8>)
+ 800099e:	1dfb      	adds	r3, r7, #7
+ 80009a0:	781b      	ldrb	r3, [r3, #0]
+ 80009a2:	001c      	movs	r4, r3
+ 80009a4:	230f      	movs	r3, #15
+ 80009a6:	4023      	ands	r3, r4
+ 80009a8:	3b08      	subs	r3, #8
+ 80009aa:	089b      	lsrs	r3, r3, #2
+ 80009ac:	430a      	orrs	r2, r1
+ 80009ae:	3306      	adds	r3, #6
+ 80009b0:	009b      	lsls	r3, r3, #2
+ 80009b2:	18c3      	adds	r3, r0, r3
+ 80009b4:	3304      	adds	r3, #4
+ 80009b6:	601a      	str	r2, [r3, #0]
 }
- 8000e84:	46c0      	nop			; (mov r8, r8)
- 8000e86:	46bd      	mov	sp, r7
- 8000e88:	b003      	add	sp, #12
- 8000e8a:	bd90      	pop	{r4, r7, pc}
- 8000e8c:	e000e100 	.word	0xe000e100
- 8000e90:	e000ed00 	.word	0xe000ed00
+ 80009b8:	46c0      	nop			; (mov r8, r8)
+ 80009ba:	46bd      	mov	sp, r7
+ 80009bc:	b003      	add	sp, #12
+ 80009be:	bd90      	pop	{r4, r7, pc}
+ 80009c0:	e000e100 	.word	0xe000e100
+ 80009c4:	e000ed00 	.word	0xe000ed00
 
-08000e94 <__NVIC_SystemReset>:
+080009c8 <__NVIC_SystemReset>:
 /**
   \brief   System Reset
   \details Initiates a system reset request to reset the MCU.
  */
 __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
 {
- 8000e94:	b580      	push	{r7, lr}
- 8000e96:	af00      	add	r7, sp, #0
+ 80009c8:	b580      	push	{r7, lr}
+ 80009ca:	af00      	add	r7, sp, #0
   \details Acts as a special kind of Data Memory Barrier.
            It completes when all explicit memory accesses before this instruction complete.
  */
 __STATIC_FORCEINLINE void __DSB(void)
 {
   __ASM volatile ("dsb 0xF":::"memory");
- 8000e98:	f3bf 8f4f 	dsb	sy
+ 80009cc:	f3bf 8f4f 	dsb	sy
 }
- 8000e9c:	46c0      	nop			; (mov r8, r8)
+ 80009d0:	46c0      	nop			; (mov r8, r8)
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */
   SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 8000e9e:	4b04      	ldr	r3, [pc, #16]	; (8000eb0 <__NVIC_SystemReset+0x1c>)
- 8000ea0:	4a04      	ldr	r2, [pc, #16]	; (8000eb4 <__NVIC_SystemReset+0x20>)
- 8000ea2:	60da      	str	r2, [r3, #12]
+ 80009d2:	4b04      	ldr	r3, [pc, #16]	; (80009e4 <__NVIC_SystemReset+0x1c>)
+ 80009d4:	4a04      	ldr	r2, [pc, #16]	; (80009e8 <__NVIC_SystemReset+0x20>)
+ 80009d6:	60da      	str	r2, [r3, #12]
   __ASM volatile ("dsb 0xF":::"memory");
- 8000ea4:	f3bf 8f4f 	dsb	sy
+ 80009d8:	f3bf 8f4f 	dsb	sy
 }
- 8000ea8:	46c0      	nop			; (mov r8, r8)
+ 80009dc:	46c0      	nop			; (mov r8, r8)
                  SCB_AIRCR_SYSRESETREQ_Msk);
   __DSB();                                                          /* Ensure completion of memory access */
 
   for(;;)                                                           /* wait until reset */
   {
     __NOP();
- 8000eaa:	46c0      	nop			; (mov r8, r8)
- 8000eac:	e7fd      	b.n	8000eaa <__NVIC_SystemReset+0x16>
- 8000eae:	46c0      	nop			; (mov r8, r8)
- 8000eb0:	e000ed00 	.word	0xe000ed00
- 8000eb4:	05fa0004 	.word	0x05fa0004
+ 80009de:	46c0      	nop			; (mov r8, r8)
+ 80009e0:	e7fd      	b.n	80009de <__NVIC_SystemReset+0x16>
+ 80009e2:	46c0      	nop			; (mov r8, r8)
+ 80009e4:	e000ed00 	.word	0xe000ed00
+ 80009e8:	05fa0004 	.word	0x05fa0004
 
-08000eb8 <LL_I2C_Enable>:
+080009ec <LL_I2C_Enable>:
 {
- 8000eb8:	b580      	push	{r7, lr}
- 8000eba:	b082      	sub	sp, #8
- 8000ebc:	af00      	add	r7, sp, #0
- 8000ebe:	6078      	str	r0, [r7, #4]
+ 80009ec:	b580      	push	{r7, lr}
+ 80009ee:	b082      	sub	sp, #8
+ 80009f0:	af00      	add	r7, sp, #0
+ 80009f2:	6078      	str	r0, [r7, #4]
   SET_BIT(I2Cx->CR1, I2C_CR1_PE);
- 8000ec0:	687b      	ldr	r3, [r7, #4]
- 8000ec2:	681b      	ldr	r3, [r3, #0]
- 8000ec4:	2201      	movs	r2, #1
- 8000ec6:	431a      	orrs	r2, r3
- 8000ec8:	687b      	ldr	r3, [r7, #4]
- 8000eca:	601a      	str	r2, [r3, #0]
+ 80009f4:	687b      	ldr	r3, [r7, #4]
+ 80009f6:	681b      	ldr	r3, [r3, #0]
+ 80009f8:	2201      	movs	r2, #1
+ 80009fa:	431a      	orrs	r2, r3
+ 80009fc:	687b      	ldr	r3, [r7, #4]
+ 80009fe:	601a      	str	r2, [r3, #0]
 }
- 8000ecc:	46c0      	nop			; (mov r8, r8)
- 8000ece:	46bd      	mov	sp, r7
- 8000ed0:	b002      	add	sp, #8
- 8000ed2:	bd80      	pop	{r7, pc}
+ 8000a00:	46c0      	nop			; (mov r8, r8)
+ 8000a02:	46bd      	mov	sp, r7
+ 8000a04:	b002      	add	sp, #8
+ 8000a06:	bd80      	pop	{r7, pc}
 
-08000ed4 <LL_I2C_EnableClockStretching>:
+08000a08 <LL_I2C_EnableClockStretching>:
 {
- 8000ed4:	b580      	push	{r7, lr}
- 8000ed6:	b082      	sub	sp, #8
- 8000ed8:	af00      	add	r7, sp, #0
- 8000eda:	6078      	str	r0, [r7, #4]
+ 8000a08:	b580      	push	{r7, lr}
+ 8000a0a:	b082      	sub	sp, #8
+ 8000a0c:	af00      	add	r7, sp, #0
+ 8000a0e:	6078      	str	r0, [r7, #4]
   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
- 8000edc:	687b      	ldr	r3, [r7, #4]
- 8000ede:	681b      	ldr	r3, [r3, #0]
- 8000ee0:	4a03      	ldr	r2, [pc, #12]	; (8000ef0 <LL_I2C_EnableClockStretching+0x1c>)
- 8000ee2:	401a      	ands	r2, r3
- 8000ee4:	687b      	ldr	r3, [r7, #4]
- 8000ee6:	601a      	str	r2, [r3, #0]
+ 8000a10:	687b      	ldr	r3, [r7, #4]
+ 8000a12:	681b      	ldr	r3, [r3, #0]
+ 8000a14:	4a03      	ldr	r2, [pc, #12]	; (8000a24 <LL_I2C_EnableClockStretching+0x1c>)
+ 8000a16:	401a      	ands	r2, r3
+ 8000a18:	687b      	ldr	r3, [r7, #4]
+ 8000a1a:	601a      	str	r2, [r3, #0]
 }
- 8000ee8:	46c0      	nop			; (mov r8, r8)
- 8000eea:	46bd      	mov	sp, r7
- 8000eec:	b002      	add	sp, #8
- 8000eee:	bd80      	pop	{r7, pc}
- 8000ef0:	fffdffff 	.word	0xfffdffff
+ 8000a1c:	46c0      	nop			; (mov r8, r8)
+ 8000a1e:	46bd      	mov	sp, r7
+ 8000a20:	b002      	add	sp, #8
+ 8000a22:	bd80      	pop	{r7, pc}
+ 8000a24:	fffdffff 	.word	0xfffdffff
 
-08000ef4 <LL_I2C_DisableGeneralCall>:
+08000a28 <LL_I2C_DisableGeneralCall>:
 {
- 8000ef4:	b580      	push	{r7, lr}
- 8000ef6:	b082      	sub	sp, #8
- 8000ef8:	af00      	add	r7, sp, #0
- 8000efa:	6078      	str	r0, [r7, #4]
+ 8000a28:	b580      	push	{r7, lr}
+ 8000a2a:	b082      	sub	sp, #8
+ 8000a2c:	af00      	add	r7, sp, #0
+ 8000a2e:	6078      	str	r0, [r7, #4]
   CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
- 8000efc:	687b      	ldr	r3, [r7, #4]
- 8000efe:	681b      	ldr	r3, [r3, #0]
- 8000f00:	4a03      	ldr	r2, [pc, #12]	; (8000f10 <LL_I2C_DisableGeneralCall+0x1c>)
- 8000f02:	401a      	ands	r2, r3
- 8000f04:	687b      	ldr	r3, [r7, #4]
- 8000f06:	601a      	str	r2, [r3, #0]
+ 8000a30:	687b      	ldr	r3, [r7, #4]
+ 8000a32:	681b      	ldr	r3, [r3, #0]
+ 8000a34:	4a03      	ldr	r2, [pc, #12]	; (8000a44 <LL_I2C_DisableGeneralCall+0x1c>)
+ 8000a36:	401a      	ands	r2, r3
+ 8000a38:	687b      	ldr	r3, [r7, #4]
+ 8000a3a:	601a      	str	r2, [r3, #0]
 }
- 8000f08:	46c0      	nop			; (mov r8, r8)
- 8000f0a:	46bd      	mov	sp, r7
- 8000f0c:	b002      	add	sp, #8
- 8000f0e:	bd80      	pop	{r7, pc}
- 8000f10:	fff7ffff 	.word	0xfff7ffff
+ 8000a3c:	46c0      	nop			; (mov r8, r8)
+ 8000a3e:	46bd      	mov	sp, r7
+ 8000a40:	b002      	add	sp, #8
+ 8000a42:	bd80      	pop	{r7, pc}
+ 8000a44:	fff7ffff 	.word	0xfff7ffff
 
-08000f14 <LL_I2C_SetOwnAddress2>:
+08000a48 <LL_I2C_SetOwnAddress2>:
 {
- 8000f14:	b580      	push	{r7, lr}
- 8000f16:	b084      	sub	sp, #16
- 8000f18:	af00      	add	r7, sp, #0
- 8000f1a:	60f8      	str	r0, [r7, #12]
- 8000f1c:	60b9      	str	r1, [r7, #8]
- 8000f1e:	607a      	str	r2, [r7, #4]
+ 8000a48:	b580      	push	{r7, lr}
+ 8000a4a:	b084      	sub	sp, #16
+ 8000a4c:	af00      	add	r7, sp, #0
+ 8000a4e:	60f8      	str	r0, [r7, #12]
+ 8000a50:	60b9      	str	r1, [r7, #8]
+ 8000a52:	607a      	str	r2, [r7, #4]
   MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask);
- 8000f20:	68fb      	ldr	r3, [r7, #12]
- 8000f22:	68db      	ldr	r3, [r3, #12]
- 8000f24:	4a05      	ldr	r2, [pc, #20]	; (8000f3c <LL_I2C_SetOwnAddress2+0x28>)
- 8000f26:	401a      	ands	r2, r3
- 8000f28:	68b9      	ldr	r1, [r7, #8]
- 8000f2a:	687b      	ldr	r3, [r7, #4]
- 8000f2c:	430b      	orrs	r3, r1
- 8000f2e:	431a      	orrs	r2, r3
- 8000f30:	68fb      	ldr	r3, [r7, #12]
- 8000f32:	60da      	str	r2, [r3, #12]
+ 8000a54:	68fb      	ldr	r3, [r7, #12]
+ 8000a56:	68db      	ldr	r3, [r3, #12]
+ 8000a58:	4a05      	ldr	r2, [pc, #20]	; (8000a70 <LL_I2C_SetOwnAddress2+0x28>)
+ 8000a5a:	401a      	ands	r2, r3
+ 8000a5c:	68b9      	ldr	r1, [r7, #8]
+ 8000a5e:	687b      	ldr	r3, [r7, #4]
+ 8000a60:	430b      	orrs	r3, r1
+ 8000a62:	431a      	orrs	r2, r3
+ 8000a64:	68fb      	ldr	r3, [r7, #12]
+ 8000a66:	60da      	str	r2, [r3, #12]
 }
- 8000f34:	46c0      	nop			; (mov r8, r8)
- 8000f36:	46bd      	mov	sp, r7
- 8000f38:	b004      	add	sp, #16
- 8000f3a:	bd80      	pop	{r7, pc}
- 8000f3c:	fffff801 	.word	0xfffff801
+ 8000a68:	46c0      	nop			; (mov r8, r8)
+ 8000a6a:	46bd      	mov	sp, r7
+ 8000a6c:	b004      	add	sp, #16
+ 8000a6e:	bd80      	pop	{r7, pc}
+ 8000a70:	fffff801 	.word	0xfffff801
 
-08000f40 <LL_I2C_DisableOwnAddress2>:
+08000a74 <LL_I2C_DisableOwnAddress2>:
 {
- 8000f40:	b580      	push	{r7, lr}
- 8000f42:	b082      	sub	sp, #8
- 8000f44:	af00      	add	r7, sp, #0
- 8000f46:	6078      	str	r0, [r7, #4]
+ 8000a74:	b580      	push	{r7, lr}
+ 8000a76:	b082      	sub	sp, #8
+ 8000a78:	af00      	add	r7, sp, #0
+ 8000a7a:	6078      	str	r0, [r7, #4]
   CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
- 8000f48:	687b      	ldr	r3, [r7, #4]
- 8000f4a:	68db      	ldr	r3, [r3, #12]
- 8000f4c:	4a03      	ldr	r2, [pc, #12]	; (8000f5c <LL_I2C_DisableOwnAddress2+0x1c>)
- 8000f4e:	401a      	ands	r2, r3
- 8000f50:	687b      	ldr	r3, [r7, #4]
- 8000f52:	60da      	str	r2, [r3, #12]
+ 8000a7c:	687b      	ldr	r3, [r7, #4]
+ 8000a7e:	68db      	ldr	r3, [r3, #12]
+ 8000a80:	4a03      	ldr	r2, [pc, #12]	; (8000a90 <LL_I2C_DisableOwnAddress2+0x1c>)
+ 8000a82:	401a      	ands	r2, r3
+ 8000a84:	687b      	ldr	r3, [r7, #4]
+ 8000a86:	60da      	str	r2, [r3, #12]
 }
- 8000f54:	46c0      	nop			; (mov r8, r8)
- 8000f56:	46bd      	mov	sp, r7
- 8000f58:	b002      	add	sp, #8
- 8000f5a:	bd80      	pop	{r7, pc}
- 8000f5c:	ffff7fff 	.word	0xffff7fff
+ 8000a88:	46c0      	nop			; (mov r8, r8)
+ 8000a8a:	46bd      	mov	sp, r7
+ 8000a8c:	b002      	add	sp, #8
+ 8000a8e:	bd80      	pop	{r7, pc}
+ 8000a90:	ffff7fff 	.word	0xffff7fff
 
-08000f60 <LL_I2C_EnableAutoEndMode>:
+08000a94 <LL_I2C_EnableAutoEndMode>:
 {
- 8000f60:	b580      	push	{r7, lr}
- 8000f62:	b082      	sub	sp, #8
- 8000f64:	af00      	add	r7, sp, #0
- 8000f66:	6078      	str	r0, [r7, #4]
+ 8000a94:	b580      	push	{r7, lr}
+ 8000a96:	b082      	sub	sp, #8
+ 8000a98:	af00      	add	r7, sp, #0
+ 8000a9a:	6078      	str	r0, [r7, #4]
   SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
- 8000f68:	687b      	ldr	r3, [r7, #4]
- 8000f6a:	685b      	ldr	r3, [r3, #4]
- 8000f6c:	2280      	movs	r2, #128	; 0x80
- 8000f6e:	0492      	lsls	r2, r2, #18
- 8000f70:	431a      	orrs	r2, r3
- 8000f72:	687b      	ldr	r3, [r7, #4]
- 8000f74:	605a      	str	r2, [r3, #4]
+ 8000a9c:	687b      	ldr	r3, [r7, #4]
+ 8000a9e:	685b      	ldr	r3, [r3, #4]
+ 8000aa0:	2280      	movs	r2, #128	; 0x80
+ 8000aa2:	0492      	lsls	r2, r2, #18
+ 8000aa4:	431a      	orrs	r2, r3
+ 8000aa6:	687b      	ldr	r3, [r7, #4]
+ 8000aa8:	605a      	str	r2, [r3, #4]
 }
- 8000f76:	46c0      	nop			; (mov r8, r8)
- 8000f78:	46bd      	mov	sp, r7
- 8000f7a:	b002      	add	sp, #8
- 8000f7c:	bd80      	pop	{r7, pc}
+ 8000aaa:	46c0      	nop			; (mov r8, r8)
+ 8000aac:	46bd      	mov	sp, r7
+ 8000aae:	b002      	add	sp, #8
+ 8000ab0:	bd80      	pop	{r7, pc}
 	...
 
-08000f80 <LL_IWDG_Enable>:
+08000ab4 <LL_IWDG_Enable>:
   * @rmtoll KR           KEY           LL_IWDG_Enable
   * @param  IWDGx IWDG Instance
   * @retval None
   */
 __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
 {
- 8000f80:	b580      	push	{r7, lr}
- 8000f82:	b082      	sub	sp, #8
- 8000f84:	af00      	add	r7, sp, #0
- 8000f86:	6078      	str	r0, [r7, #4]
+ 8000ab4:	b580      	push	{r7, lr}
+ 8000ab6:	b082      	sub	sp, #8
+ 8000ab8:	af00      	add	r7, sp, #0
+ 8000aba:	6078      	str	r0, [r7, #4]
   WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
- 8000f88:	687b      	ldr	r3, [r7, #4]
- 8000f8a:	4a03      	ldr	r2, [pc, #12]	; (8000f98 <LL_IWDG_Enable+0x18>)
- 8000f8c:	601a      	str	r2, [r3, #0]
+ 8000abc:	687b      	ldr	r3, [r7, #4]
+ 8000abe:	4a03      	ldr	r2, [pc, #12]	; (8000acc <LL_IWDG_Enable+0x18>)
+ 8000ac0:	601a      	str	r2, [r3, #0]
 }
- 8000f8e:	46c0      	nop			; (mov r8, r8)
- 8000f90:	46bd      	mov	sp, r7
- 8000f92:	b002      	add	sp, #8
- 8000f94:	bd80      	pop	{r7, pc}
- 8000f96:	46c0      	nop			; (mov r8, r8)
- 8000f98:	0000cccc 	.word	0x0000cccc
+ 8000ac2:	46c0      	nop			; (mov r8, r8)
+ 8000ac4:	46bd      	mov	sp, r7
+ 8000ac6:	b002      	add	sp, #8
+ 8000ac8:	bd80      	pop	{r7, pc}
+ 8000aca:	46c0      	nop			; (mov r8, r8)
+ 8000acc:	0000cccc 	.word	0x0000cccc
 
-08000f9c <LL_IWDG_ReloadCounter>:
+08000ad0 <LL_IWDG_ReloadCounter>:
   * @rmtoll KR           KEY           LL_IWDG_ReloadCounter
   * @param  IWDGx IWDG Instance
   * @retval None
   */
 __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
 {
- 8000f9c:	b580      	push	{r7, lr}
- 8000f9e:	b082      	sub	sp, #8
- 8000fa0:	af00      	add	r7, sp, #0
- 8000fa2:	6078      	str	r0, [r7, #4]
+ 8000ad0:	b580      	push	{r7, lr}
+ 8000ad2:	b082      	sub	sp, #8
+ 8000ad4:	af00      	add	r7, sp, #0
+ 8000ad6:	6078      	str	r0, [r7, #4]
   WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
- 8000fa4:	687b      	ldr	r3, [r7, #4]
- 8000fa6:	4a03      	ldr	r2, [pc, #12]	; (8000fb4 <LL_IWDG_ReloadCounter+0x18>)
- 8000fa8:	601a      	str	r2, [r3, #0]
+ 8000ad8:	687b      	ldr	r3, [r7, #4]
+ 8000ada:	4a03      	ldr	r2, [pc, #12]	; (8000ae8 <LL_IWDG_ReloadCounter+0x18>)
+ 8000adc:	601a      	str	r2, [r3, #0]
 }
- 8000faa:	46c0      	nop			; (mov r8, r8)
- 8000fac:	46bd      	mov	sp, r7
- 8000fae:	b002      	add	sp, #8
- 8000fb0:	bd80      	pop	{r7, pc}
- 8000fb2:	46c0      	nop			; (mov r8, r8)
- 8000fb4:	0000aaaa 	.word	0x0000aaaa
+ 8000ade:	46c0      	nop			; (mov r8, r8)
+ 8000ae0:	46bd      	mov	sp, r7
+ 8000ae2:	b002      	add	sp, #8
+ 8000ae4:	bd80      	pop	{r7, pc}
+ 8000ae6:	46c0      	nop			; (mov r8, r8)
+ 8000ae8:	0000aaaa 	.word	0x0000aaaa
 
-08000fb8 <LL_IWDG_EnableWriteAccess>:
+08000aec <LL_IWDG_EnableWriteAccess>:
   * @rmtoll KR           KEY           LL_IWDG_EnableWriteAccess
   * @param  IWDGx IWDG Instance
   * @retval None
   */
 __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
 {
- 8000fb8:	b580      	push	{r7, lr}
- 8000fba:	b082      	sub	sp, #8
- 8000fbc:	af00      	add	r7, sp, #0
- 8000fbe:	6078      	str	r0, [r7, #4]
+ 8000aec:	b580      	push	{r7, lr}
+ 8000aee:	b082      	sub	sp, #8
+ 8000af0:	af00      	add	r7, sp, #0
+ 8000af2:	6078      	str	r0, [r7, #4]
   WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
- 8000fc0:	687b      	ldr	r3, [r7, #4]
- 8000fc2:	4a03      	ldr	r2, [pc, #12]	; (8000fd0 <LL_IWDG_EnableWriteAccess+0x18>)
- 8000fc4:	601a      	str	r2, [r3, #0]
+ 8000af4:	687b      	ldr	r3, [r7, #4]
+ 8000af6:	4a03      	ldr	r2, [pc, #12]	; (8000b04 <LL_IWDG_EnableWriteAccess+0x18>)
+ 8000af8:	601a      	str	r2, [r3, #0]
 }
- 8000fc6:	46c0      	nop			; (mov r8, r8)
- 8000fc8:	46bd      	mov	sp, r7
- 8000fca:	b002      	add	sp, #8
- 8000fcc:	bd80      	pop	{r7, pc}
- 8000fce:	46c0      	nop			; (mov r8, r8)
- 8000fd0:	00005555 	.word	0x00005555
+ 8000afa:	46c0      	nop			; (mov r8, r8)
+ 8000afc:	46bd      	mov	sp, r7
+ 8000afe:	b002      	add	sp, #8
+ 8000b00:	bd80      	pop	{r7, pc}
+ 8000b02:	46c0      	nop			; (mov r8, r8)
+ 8000b04:	00005555 	.word	0x00005555
 
-08000fd4 <LL_IWDG_SetPrescaler>:
+08000b08 <LL_IWDG_SetPrescaler>:
   *         @arg @ref LL_IWDG_PRESCALER_128
   *         @arg @ref LL_IWDG_PRESCALER_256
   * @retval None
   */
 __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
 {
- 8000fd4:	b580      	push	{r7, lr}
- 8000fd6:	b082      	sub	sp, #8
- 8000fd8:	af00      	add	r7, sp, #0
- 8000fda:	6078      	str	r0, [r7, #4]
- 8000fdc:	6039      	str	r1, [r7, #0]
+ 8000b08:	b580      	push	{r7, lr}
+ 8000b0a:	b082      	sub	sp, #8
+ 8000b0c:	af00      	add	r7, sp, #0
+ 8000b0e:	6078      	str	r0, [r7, #4]
+ 8000b10:	6039      	str	r1, [r7, #0]
   WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
- 8000fde:	683b      	ldr	r3, [r7, #0]
- 8000fe0:	2207      	movs	r2, #7
- 8000fe2:	401a      	ands	r2, r3
- 8000fe4:	687b      	ldr	r3, [r7, #4]
- 8000fe6:	605a      	str	r2, [r3, #4]
+ 8000b12:	683b      	ldr	r3, [r7, #0]
+ 8000b14:	2207      	movs	r2, #7
+ 8000b16:	401a      	ands	r2, r3
+ 8000b18:	687b      	ldr	r3, [r7, #4]
+ 8000b1a:	605a      	str	r2, [r3, #4]
 }
- 8000fe8:	46c0      	nop			; (mov r8, r8)
- 8000fea:	46bd      	mov	sp, r7
- 8000fec:	b002      	add	sp, #8
- 8000fee:	bd80      	pop	{r7, pc}
+ 8000b1c:	46c0      	nop			; (mov r8, r8)
+ 8000b1e:	46bd      	mov	sp, r7
+ 8000b20:	b002      	add	sp, #8
+ 8000b22:	bd80      	pop	{r7, pc}
 
-08000ff0 <LL_IWDG_SetReloadCounter>:
+08000b24 <LL_IWDG_SetReloadCounter>:
   * @param  IWDGx IWDG Instance
   * @param  Counter Value between Min_Data=0 and Max_Data=0x0FFF
   * @retval None
   */
 __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
 {
- 8000ff0:	b580      	push	{r7, lr}
- 8000ff2:	b082      	sub	sp, #8
- 8000ff4:	af00      	add	r7, sp, #0
- 8000ff6:	6078      	str	r0, [r7, #4]
- 8000ff8:	6039      	str	r1, [r7, #0]
+ 8000b24:	b580      	push	{r7, lr}
+ 8000b26:	b082      	sub	sp, #8
+ 8000b28:	af00      	add	r7, sp, #0
+ 8000b2a:	6078      	str	r0, [r7, #4]
+ 8000b2c:	6039      	str	r1, [r7, #0]
   WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
- 8000ffa:	683b      	ldr	r3, [r7, #0]
- 8000ffc:	051b      	lsls	r3, r3, #20
- 8000ffe:	0d1a      	lsrs	r2, r3, #20
- 8001000:	687b      	ldr	r3, [r7, #4]
- 8001002:	609a      	str	r2, [r3, #8]
+ 8000b2e:	683b      	ldr	r3, [r7, #0]
+ 8000b30:	051b      	lsls	r3, r3, #20
+ 8000b32:	0d1a      	lsrs	r2, r3, #20
+ 8000b34:	687b      	ldr	r3, [r7, #4]
+ 8000b36:	609a      	str	r2, [r3, #8]
 }
- 8001004:	46c0      	nop			; (mov r8, r8)
- 8001006:	46bd      	mov	sp, r7
- 8001008:	b002      	add	sp, #8
- 800100a:	bd80      	pop	{r7, pc}
+ 8000b38:	46c0      	nop			; (mov r8, r8)
+ 8000b3a:	46bd      	mov	sp, r7
+ 8000b3c:	b002      	add	sp, #8
+ 8000b3e:	bd80      	pop	{r7, pc}
 
-0800100c <LL_IWDG_IsReady>:
+08000b40 <LL_IWDG_IsReady>:
   *         SR           WVU           LL_IWDG_IsReady
   * @param  IWDGx IWDG Instance
   * @retval State of bits (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
 {
- 800100c:	b580      	push	{r7, lr}
- 800100e:	b082      	sub	sp, #8
- 8001010:	af00      	add	r7, sp, #0
- 8001012:	6078      	str	r0, [r7, #4]
+ 8000b40:	b580      	push	{r7, lr}
+ 8000b42:	b082      	sub	sp, #8
+ 8000b44:	af00      	add	r7, sp, #0
+ 8000b46:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
- 8001014:	687b      	ldr	r3, [r7, #4]
- 8001016:	68db      	ldr	r3, [r3, #12]
- 8001018:	2207      	movs	r2, #7
- 800101a:	4013      	ands	r3, r2
- 800101c:	d101      	bne.n	8001022 <LL_IWDG_IsReady+0x16>
- 800101e:	2301      	movs	r3, #1
- 8001020:	e000      	b.n	8001024 <LL_IWDG_IsReady+0x18>
- 8001022:	2300      	movs	r3, #0
+ 8000b48:	687b      	ldr	r3, [r7, #4]
+ 8000b4a:	68db      	ldr	r3, [r3, #12]
+ 8000b4c:	2207      	movs	r2, #7
+ 8000b4e:	4013      	ands	r3, r2
+ 8000b50:	d101      	bne.n	8000b56 <LL_IWDG_IsReady+0x16>
+ 8000b52:	2301      	movs	r3, #1
+ 8000b54:	e000      	b.n	8000b58 <LL_IWDG_IsReady+0x18>
+ 8000b56:	2300      	movs	r3, #0
 }
- 8001024:	0018      	movs	r0, r3
- 8001026:	46bd      	mov	sp, r7
- 8001028:	b002      	add	sp, #8
- 800102a:	bd80      	pop	{r7, pc}
+ 8000b58:	0018      	movs	r0, r3
+ 8000b5a:	46bd      	mov	sp, r7
+ 8000b5c:	b002      	add	sp, #8
+ 8000b5e:	bd80      	pop	{r7, pc}
 
-0800102c <LL_RCC_HSI_Enable>:
+08000b60 <LL_RCC_HSI_Enable>:
   * @brief  Enable HSI oscillator
   * @rmtoll CR           HSION         LL_RCC_HSI_Enable
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_HSI_Enable(void)
 {
- 800102c:	b580      	push	{r7, lr}
- 800102e:	af00      	add	r7, sp, #0
+ 8000b60:	b580      	push	{r7, lr}
+ 8000b62:	af00      	add	r7, sp, #0
   SET_BIT(RCC->CR, RCC_CR_HSION);
- 8001030:	4b04      	ldr	r3, [pc, #16]	; (8001044 <LL_RCC_HSI_Enable+0x18>)
- 8001032:	681a      	ldr	r2, [r3, #0]
- 8001034:	4b03      	ldr	r3, [pc, #12]	; (8001044 <LL_RCC_HSI_Enable+0x18>)
- 8001036:	2101      	movs	r1, #1
- 8001038:	430a      	orrs	r2, r1
- 800103a:	601a      	str	r2, [r3, #0]
+ 8000b64:	4b04      	ldr	r3, [pc, #16]	; (8000b78 <LL_RCC_HSI_Enable+0x18>)
+ 8000b66:	681a      	ldr	r2, [r3, #0]
+ 8000b68:	4b03      	ldr	r3, [pc, #12]	; (8000b78 <LL_RCC_HSI_Enable+0x18>)
+ 8000b6a:	2101      	movs	r1, #1
+ 8000b6c:	430a      	orrs	r2, r1
+ 8000b6e:	601a      	str	r2, [r3, #0]
 }
- 800103c:	46c0      	nop			; (mov r8, r8)
- 800103e:	46bd      	mov	sp, r7
- 8001040:	bd80      	pop	{r7, pc}
- 8001042:	46c0      	nop			; (mov r8, r8)
- 8001044:	40021000 	.word	0x40021000
+ 8000b70:	46c0      	nop			; (mov r8, r8)
+ 8000b72:	46bd      	mov	sp, r7
+ 8000b74:	bd80      	pop	{r7, pc}
+ 8000b76:	46c0      	nop			; (mov r8, r8)
+ 8000b78:	40021000 	.word	0x40021000
 
-08001048 <LL_RCC_HSI_IsReady>:
+08000b7c <LL_RCC_HSI_IsReady>:
   * @brief  Check if HSI clock is ready
   * @rmtoll CR           HSIRDY        LL_RCC_HSI_IsReady
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
 {
- 8001048:	b580      	push	{r7, lr}
- 800104a:	af00      	add	r7, sp, #0
+ 8000b7c:	b580      	push	{r7, lr}
+ 8000b7e:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RCC_CR_HSIRDY) ? 1UL : 0UL);
- 800104c:	4b05      	ldr	r3, [pc, #20]	; (8001064 <LL_RCC_HSI_IsReady+0x1c>)
- 800104e:	681b      	ldr	r3, [r3, #0]
- 8001050:	2204      	movs	r2, #4
- 8001052:	4013      	ands	r3, r2
- 8001054:	2b04      	cmp	r3, #4
- 8001056:	d101      	bne.n	800105c <LL_RCC_HSI_IsReady+0x14>
- 8001058:	2301      	movs	r3, #1
- 800105a:	e000      	b.n	800105e <LL_RCC_HSI_IsReady+0x16>
- 800105c:	2300      	movs	r3, #0
+ 8000b80:	4b05      	ldr	r3, [pc, #20]	; (8000b98 <LL_RCC_HSI_IsReady+0x1c>)
+ 8000b82:	681b      	ldr	r3, [r3, #0]
+ 8000b84:	2204      	movs	r2, #4
+ 8000b86:	4013      	ands	r3, r2
+ 8000b88:	2b04      	cmp	r3, #4
+ 8000b8a:	d101      	bne.n	8000b90 <LL_RCC_HSI_IsReady+0x14>
+ 8000b8c:	2301      	movs	r3, #1
+ 8000b8e:	e000      	b.n	8000b92 <LL_RCC_HSI_IsReady+0x16>
+ 8000b90:	2300      	movs	r3, #0
 }
- 800105e:	0018      	movs	r0, r3
- 8001060:	46bd      	mov	sp, r7
- 8001062:	bd80      	pop	{r7, pc}
- 8001064:	40021000 	.word	0x40021000
+ 8000b92:	0018      	movs	r0, r3
+ 8000b94:	46bd      	mov	sp, r7
+ 8000b96:	bd80      	pop	{r7, pc}
+ 8000b98:	40021000 	.word	0x40021000
 
-08001068 <LL_RCC_HSI_SetCalibTrimming>:
+08000b9c <LL_RCC_HSI_SetCalibTrimming>:
   * @rmtoll ICSCR        HSITRIM       LL_RCC_HSI_SetCalibTrimming
   * @param  Value between Min_Data = 0x00 and Max_Data = 0x1F
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
 {
- 8001068:	b580      	push	{r7, lr}
- 800106a:	b082      	sub	sp, #8
- 800106c:	af00      	add	r7, sp, #0
- 800106e:	6078      	str	r0, [r7, #4]
+ 8000b9c:	b580      	push	{r7, lr}
+ 8000b9e:	b082      	sub	sp, #8
+ 8000ba0:	af00      	add	r7, sp, #0
+ 8000ba2:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, Value << RCC_ICSCR_HSITRIM_Pos);
- 8001070:	4b06      	ldr	r3, [pc, #24]	; (800108c <LL_RCC_HSI_SetCalibTrimming+0x24>)
- 8001072:	685b      	ldr	r3, [r3, #4]
- 8001074:	4a06      	ldr	r2, [pc, #24]	; (8001090 <LL_RCC_HSI_SetCalibTrimming+0x28>)
- 8001076:	4013      	ands	r3, r2
- 8001078:	0019      	movs	r1, r3
- 800107a:	687b      	ldr	r3, [r7, #4]
- 800107c:	021a      	lsls	r2, r3, #8
- 800107e:	4b03      	ldr	r3, [pc, #12]	; (800108c <LL_RCC_HSI_SetCalibTrimming+0x24>)
- 8001080:	430a      	orrs	r2, r1
- 8001082:	605a      	str	r2, [r3, #4]
+ 8000ba4:	4b06      	ldr	r3, [pc, #24]	; (8000bc0 <LL_RCC_HSI_SetCalibTrimming+0x24>)
+ 8000ba6:	685b      	ldr	r3, [r3, #4]
+ 8000ba8:	4a06      	ldr	r2, [pc, #24]	; (8000bc4 <LL_RCC_HSI_SetCalibTrimming+0x28>)
+ 8000baa:	4013      	ands	r3, r2
+ 8000bac:	0019      	movs	r1, r3
+ 8000bae:	687b      	ldr	r3, [r7, #4]
+ 8000bb0:	021a      	lsls	r2, r3, #8
+ 8000bb2:	4b03      	ldr	r3, [pc, #12]	; (8000bc0 <LL_RCC_HSI_SetCalibTrimming+0x24>)
+ 8000bb4:	430a      	orrs	r2, r1
+ 8000bb6:	605a      	str	r2, [r3, #4]
 }
- 8001084:	46c0      	nop			; (mov r8, r8)
- 8001086:	46bd      	mov	sp, r7
- 8001088:	b002      	add	sp, #8
- 800108a:	bd80      	pop	{r7, pc}
- 800108c:	40021000 	.word	0x40021000
- 8001090:	ffffe0ff 	.word	0xffffe0ff
+ 8000bb8:	46c0      	nop			; (mov r8, r8)
+ 8000bba:	46bd      	mov	sp, r7
+ 8000bbc:	b002      	add	sp, #8
+ 8000bbe:	bd80      	pop	{r7, pc}
+ 8000bc0:	40021000 	.word	0x40021000
+ 8000bc4:	ffffe0ff 	.word	0xffffe0ff
 
-08001094 <LL_RCC_LSI_Enable>:
+08000bc8 <LL_RCC_LSI_Enable>:
   * @brief  Enable LSI Oscillator
   * @rmtoll CSR          LSION         LL_RCC_LSI_Enable
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_LSI_Enable(void)
 {
- 8001094:	b580      	push	{r7, lr}
- 8001096:	af00      	add	r7, sp, #0
+ 8000bc8:	b580      	push	{r7, lr}
+ 8000bca:	af00      	add	r7, sp, #0
   SET_BIT(RCC->CSR, RCC_CSR_LSION);
- 8001098:	4b04      	ldr	r3, [pc, #16]	; (80010ac <LL_RCC_LSI_Enable+0x18>)
- 800109a:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 800109c:	4b03      	ldr	r3, [pc, #12]	; (80010ac <LL_RCC_LSI_Enable+0x18>)
- 800109e:	2101      	movs	r1, #1
- 80010a0:	430a      	orrs	r2, r1
- 80010a2:	651a      	str	r2, [r3, #80]	; 0x50
+ 8000bcc:	4b04      	ldr	r3, [pc, #16]	; (8000be0 <LL_RCC_LSI_Enable+0x18>)
+ 8000bce:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8000bd0:	4b03      	ldr	r3, [pc, #12]	; (8000be0 <LL_RCC_LSI_Enable+0x18>)
+ 8000bd2:	2101      	movs	r1, #1
+ 8000bd4:	430a      	orrs	r2, r1
+ 8000bd6:	651a      	str	r2, [r3, #80]	; 0x50
 }
- 80010a4:	46c0      	nop			; (mov r8, r8)
- 80010a6:	46bd      	mov	sp, r7
- 80010a8:	bd80      	pop	{r7, pc}
- 80010aa:	46c0      	nop			; (mov r8, r8)
- 80010ac:	40021000 	.word	0x40021000
+ 8000bd8:	46c0      	nop			; (mov r8, r8)
+ 8000bda:	46bd      	mov	sp, r7
+ 8000bdc:	bd80      	pop	{r7, pc}
+ 8000bde:	46c0      	nop			; (mov r8, r8)
+ 8000be0:	40021000 	.word	0x40021000
 
-080010b0 <LL_RCC_LSI_IsReady>:
+08000be4 <LL_RCC_LSI_IsReady>:
   * @brief  Check if LSI is Ready
   * @rmtoll CSR          LSIRDY        LL_RCC_LSI_IsReady
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
 {
- 80010b0:	b580      	push	{r7, lr}
- 80010b2:	af00      	add	r7, sp, #0
+ 8000be4:	b580      	push	{r7, lr}
+ 8000be6:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == RCC_CSR_LSIRDY) ? 1UL : 0UL);
- 80010b4:	4b05      	ldr	r3, [pc, #20]	; (80010cc <LL_RCC_LSI_IsReady+0x1c>)
- 80010b6:	6d1b      	ldr	r3, [r3, #80]	; 0x50
- 80010b8:	2202      	movs	r2, #2
- 80010ba:	4013      	ands	r3, r2
- 80010bc:	2b02      	cmp	r3, #2
- 80010be:	d101      	bne.n	80010c4 <LL_RCC_LSI_IsReady+0x14>
- 80010c0:	2301      	movs	r3, #1
- 80010c2:	e000      	b.n	80010c6 <LL_RCC_LSI_IsReady+0x16>
- 80010c4:	2300      	movs	r3, #0
+ 8000be8:	4b05      	ldr	r3, [pc, #20]	; (8000c00 <LL_RCC_LSI_IsReady+0x1c>)
+ 8000bea:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 8000bec:	2202      	movs	r2, #2
+ 8000bee:	4013      	ands	r3, r2
+ 8000bf0:	2b02      	cmp	r3, #2
+ 8000bf2:	d101      	bne.n	8000bf8 <LL_RCC_LSI_IsReady+0x14>
+ 8000bf4:	2301      	movs	r3, #1
+ 8000bf6:	e000      	b.n	8000bfa <LL_RCC_LSI_IsReady+0x16>
+ 8000bf8:	2300      	movs	r3, #0
 }
- 80010c6:	0018      	movs	r0, r3
- 80010c8:	46bd      	mov	sp, r7
- 80010ca:	bd80      	pop	{r7, pc}
- 80010cc:	40021000 	.word	0x40021000
+ 8000bfa:	0018      	movs	r0, r3
+ 8000bfc:	46bd      	mov	sp, r7
+ 8000bfe:	bd80      	pop	{r7, pc}
+ 8000c00:	40021000 	.word	0x40021000
 
-080010d0 <LL_RCC_SetSysClkSource>:
+08000c04 <LL_RCC_SetSysClkSource>:
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
 {
- 80010d0:	b580      	push	{r7, lr}
- 80010d2:	b082      	sub	sp, #8
- 80010d4:	af00      	add	r7, sp, #0
- 80010d6:	6078      	str	r0, [r7, #4]
+ 8000c04:	b580      	push	{r7, lr}
+ 8000c06:	b082      	sub	sp, #8
+ 8000c08:	af00      	add	r7, sp, #0
+ 8000c0a:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
- 80010d8:	4b06      	ldr	r3, [pc, #24]	; (80010f4 <LL_RCC_SetSysClkSource+0x24>)
- 80010da:	68db      	ldr	r3, [r3, #12]
- 80010dc:	2203      	movs	r2, #3
- 80010de:	4393      	bics	r3, r2
- 80010e0:	0019      	movs	r1, r3
- 80010e2:	4b04      	ldr	r3, [pc, #16]	; (80010f4 <LL_RCC_SetSysClkSource+0x24>)
- 80010e4:	687a      	ldr	r2, [r7, #4]
- 80010e6:	430a      	orrs	r2, r1
- 80010e8:	60da      	str	r2, [r3, #12]
+ 8000c0c:	4b06      	ldr	r3, [pc, #24]	; (8000c28 <LL_RCC_SetSysClkSource+0x24>)
+ 8000c0e:	68db      	ldr	r3, [r3, #12]
+ 8000c10:	2203      	movs	r2, #3
+ 8000c12:	4393      	bics	r3, r2
+ 8000c14:	0019      	movs	r1, r3
+ 8000c16:	4b04      	ldr	r3, [pc, #16]	; (8000c28 <LL_RCC_SetSysClkSource+0x24>)
+ 8000c18:	687a      	ldr	r2, [r7, #4]
+ 8000c1a:	430a      	orrs	r2, r1
+ 8000c1c:	60da      	str	r2, [r3, #12]
 }
- 80010ea:	46c0      	nop			; (mov r8, r8)
- 80010ec:	46bd      	mov	sp, r7
- 80010ee:	b002      	add	sp, #8
- 80010f0:	bd80      	pop	{r7, pc}
- 80010f2:	46c0      	nop			; (mov r8, r8)
- 80010f4:	40021000 	.word	0x40021000
+ 8000c1e:	46c0      	nop			; (mov r8, r8)
+ 8000c20:	46bd      	mov	sp, r7
+ 8000c22:	b002      	add	sp, #8
+ 8000c24:	bd80      	pop	{r7, pc}
+ 8000c26:	46c0      	nop			; (mov r8, r8)
+ 8000c28:	40021000 	.word	0x40021000
 
-080010f8 <LL_RCC_GetSysClkSource>:
+08000c2c <LL_RCC_GetSysClkSource>:
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
   */
 __STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
 {
- 80010f8:	b580      	push	{r7, lr}
- 80010fa:	af00      	add	r7, sp, #0
+ 8000c2c:	b580      	push	{r7, lr}
+ 8000c2e:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
- 80010fc:	4b03      	ldr	r3, [pc, #12]	; (800110c <LL_RCC_GetSysClkSource+0x14>)
- 80010fe:	68db      	ldr	r3, [r3, #12]
- 8001100:	220c      	movs	r2, #12
- 8001102:	4013      	ands	r3, r2
+ 8000c30:	4b03      	ldr	r3, [pc, #12]	; (8000c40 <LL_RCC_GetSysClkSource+0x14>)
+ 8000c32:	68db      	ldr	r3, [r3, #12]
+ 8000c34:	220c      	movs	r2, #12
+ 8000c36:	4013      	ands	r3, r2
 }
- 8001104:	0018      	movs	r0, r3
- 8001106:	46bd      	mov	sp, r7
- 8001108:	bd80      	pop	{r7, pc}
- 800110a:	46c0      	nop			; (mov r8, r8)
- 800110c:	40021000 	.word	0x40021000
+ 8000c38:	0018      	movs	r0, r3
+ 8000c3a:	46bd      	mov	sp, r7
+ 8000c3c:	bd80      	pop	{r7, pc}
+ 8000c3e:	46c0      	nop			; (mov r8, r8)
+ 8000c40:	40021000 	.word	0x40021000
 
-08001110 <LL_RCC_SetAHBPrescaler>:
+08000c44 <LL_RCC_SetAHBPrescaler>:
   *         @arg @ref LL_RCC_SYSCLK_DIV_256
   *         @arg @ref LL_RCC_SYSCLK_DIV_512
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
 {
- 8001110:	b580      	push	{r7, lr}
- 8001112:	b082      	sub	sp, #8
- 8001114:	af00      	add	r7, sp, #0
- 8001116:	6078      	str	r0, [r7, #4]
+ 8000c44:	b580      	push	{r7, lr}
+ 8000c46:	b082      	sub	sp, #8
+ 8000c48:	af00      	add	r7, sp, #0
+ 8000c4a:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
- 8001118:	4b06      	ldr	r3, [pc, #24]	; (8001134 <LL_RCC_SetAHBPrescaler+0x24>)
- 800111a:	68db      	ldr	r3, [r3, #12]
- 800111c:	22f0      	movs	r2, #240	; 0xf0
- 800111e:	4393      	bics	r3, r2
- 8001120:	0019      	movs	r1, r3
- 8001122:	4b04      	ldr	r3, [pc, #16]	; (8001134 <LL_RCC_SetAHBPrescaler+0x24>)
- 8001124:	687a      	ldr	r2, [r7, #4]
- 8001126:	430a      	orrs	r2, r1
- 8001128:	60da      	str	r2, [r3, #12]
+ 8000c4c:	4b06      	ldr	r3, [pc, #24]	; (8000c68 <LL_RCC_SetAHBPrescaler+0x24>)
+ 8000c4e:	68db      	ldr	r3, [r3, #12]
+ 8000c50:	22f0      	movs	r2, #240	; 0xf0
+ 8000c52:	4393      	bics	r3, r2
+ 8000c54:	0019      	movs	r1, r3
+ 8000c56:	4b04      	ldr	r3, [pc, #16]	; (8000c68 <LL_RCC_SetAHBPrescaler+0x24>)
+ 8000c58:	687a      	ldr	r2, [r7, #4]
+ 8000c5a:	430a      	orrs	r2, r1
+ 8000c5c:	60da      	str	r2, [r3, #12]
 }
- 800112a:	46c0      	nop			; (mov r8, r8)
- 800112c:	46bd      	mov	sp, r7
- 800112e:	b002      	add	sp, #8
- 8001130:	bd80      	pop	{r7, pc}
- 8001132:	46c0      	nop			; (mov r8, r8)
- 8001134:	40021000 	.word	0x40021000
+ 8000c5e:	46c0      	nop			; (mov r8, r8)
+ 8000c60:	46bd      	mov	sp, r7
+ 8000c62:	b002      	add	sp, #8
+ 8000c64:	bd80      	pop	{r7, pc}
+ 8000c66:	46c0      	nop			; (mov r8, r8)
+ 8000c68:	40021000 	.word	0x40021000
 
-08001138 <LL_RCC_SetAPB1Prescaler>:
+08000c6c <LL_RCC_SetAPB1Prescaler>:
   *         @arg @ref LL_RCC_APB1_DIV_8
   *         @arg @ref LL_RCC_APB1_DIV_16
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
 {
- 8001138:	b580      	push	{r7, lr}
- 800113a:	b082      	sub	sp, #8
- 800113c:	af00      	add	r7, sp, #0
- 800113e:	6078      	str	r0, [r7, #4]
+ 8000c6c:	b580      	push	{r7, lr}
+ 8000c6e:	b082      	sub	sp, #8
+ 8000c70:	af00      	add	r7, sp, #0
+ 8000c72:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
- 8001140:	4b06      	ldr	r3, [pc, #24]	; (800115c <LL_RCC_SetAPB1Prescaler+0x24>)
- 8001142:	68db      	ldr	r3, [r3, #12]
- 8001144:	4a06      	ldr	r2, [pc, #24]	; (8001160 <LL_RCC_SetAPB1Prescaler+0x28>)
- 8001146:	4013      	ands	r3, r2
- 8001148:	0019      	movs	r1, r3
- 800114a:	4b04      	ldr	r3, [pc, #16]	; (800115c <LL_RCC_SetAPB1Prescaler+0x24>)
- 800114c:	687a      	ldr	r2, [r7, #4]
- 800114e:	430a      	orrs	r2, r1
- 8001150:	60da      	str	r2, [r3, #12]
+ 8000c74:	4b06      	ldr	r3, [pc, #24]	; (8000c90 <LL_RCC_SetAPB1Prescaler+0x24>)
+ 8000c76:	68db      	ldr	r3, [r3, #12]
+ 8000c78:	4a06      	ldr	r2, [pc, #24]	; (8000c94 <LL_RCC_SetAPB1Prescaler+0x28>)
+ 8000c7a:	4013      	ands	r3, r2
+ 8000c7c:	0019      	movs	r1, r3
+ 8000c7e:	4b04      	ldr	r3, [pc, #16]	; (8000c90 <LL_RCC_SetAPB1Prescaler+0x24>)
+ 8000c80:	687a      	ldr	r2, [r7, #4]
+ 8000c82:	430a      	orrs	r2, r1
+ 8000c84:	60da      	str	r2, [r3, #12]
 }
- 8001152:	46c0      	nop			; (mov r8, r8)
- 8001154:	46bd      	mov	sp, r7
- 8001156:	b002      	add	sp, #8
- 8001158:	bd80      	pop	{r7, pc}
- 800115a:	46c0      	nop			; (mov r8, r8)
- 800115c:	40021000 	.word	0x40021000
- 8001160:	fffff8ff 	.word	0xfffff8ff
+ 8000c86:	46c0      	nop			; (mov r8, r8)
+ 8000c88:	46bd      	mov	sp, r7
+ 8000c8a:	b002      	add	sp, #8
+ 8000c8c:	bd80      	pop	{r7, pc}
+ 8000c8e:	46c0      	nop			; (mov r8, r8)
+ 8000c90:	40021000 	.word	0x40021000
+ 8000c94:	fffff8ff 	.word	0xfffff8ff
 
-08001164 <LL_RCC_SetAPB2Prescaler>:
+08000c98 <LL_RCC_SetAPB2Prescaler>:
   *         @arg @ref LL_RCC_APB2_DIV_8
   *         @arg @ref LL_RCC_APB2_DIV_16
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
 {
- 8001164:	b580      	push	{r7, lr}
- 8001166:	b082      	sub	sp, #8
- 8001168:	af00      	add	r7, sp, #0
- 800116a:	6078      	str	r0, [r7, #4]
+ 8000c98:	b580      	push	{r7, lr}
+ 8000c9a:	b082      	sub	sp, #8
+ 8000c9c:	af00      	add	r7, sp, #0
+ 8000c9e:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
- 800116c:	4b06      	ldr	r3, [pc, #24]	; (8001188 <LL_RCC_SetAPB2Prescaler+0x24>)
- 800116e:	68db      	ldr	r3, [r3, #12]
- 8001170:	4a06      	ldr	r2, [pc, #24]	; (800118c <LL_RCC_SetAPB2Prescaler+0x28>)
- 8001172:	4013      	ands	r3, r2
- 8001174:	0019      	movs	r1, r3
- 8001176:	4b04      	ldr	r3, [pc, #16]	; (8001188 <LL_RCC_SetAPB2Prescaler+0x24>)
- 8001178:	687a      	ldr	r2, [r7, #4]
- 800117a:	430a      	orrs	r2, r1
- 800117c:	60da      	str	r2, [r3, #12]
+ 8000ca0:	4b06      	ldr	r3, [pc, #24]	; (8000cbc <LL_RCC_SetAPB2Prescaler+0x24>)
+ 8000ca2:	68db      	ldr	r3, [r3, #12]
+ 8000ca4:	4a06      	ldr	r2, [pc, #24]	; (8000cc0 <LL_RCC_SetAPB2Prescaler+0x28>)
+ 8000ca6:	4013      	ands	r3, r2
+ 8000ca8:	0019      	movs	r1, r3
+ 8000caa:	4b04      	ldr	r3, [pc, #16]	; (8000cbc <LL_RCC_SetAPB2Prescaler+0x24>)
+ 8000cac:	687a      	ldr	r2, [r7, #4]
+ 8000cae:	430a      	orrs	r2, r1
+ 8000cb0:	60da      	str	r2, [r3, #12]
 }
- 800117e:	46c0      	nop			; (mov r8, r8)
- 8001180:	46bd      	mov	sp, r7
- 8001182:	b002      	add	sp, #8
- 8001184:	bd80      	pop	{r7, pc}
- 8001186:	46c0      	nop			; (mov r8, r8)
- 8001188:	40021000 	.word	0x40021000
- 800118c:	ffffc7ff 	.word	0xffffc7ff
+ 8000cb2:	46c0      	nop			; (mov r8, r8)
+ 8000cb4:	46bd      	mov	sp, r7
+ 8000cb6:	b002      	add	sp, #8
+ 8000cb8:	bd80      	pop	{r7, pc}
+ 8000cba:	46c0      	nop			; (mov r8, r8)
+ 8000cbc:	40021000 	.word	0x40021000
+ 8000cc0:	ffffc7ff 	.word	0xffffc7ff
 
-08001190 <LL_RCC_SetUSARTClockSource>:
+08000cc4 <LL_RCC_SetUSARTClockSource>:
   *
   *         (*) value not defined in all devices.
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetUSARTClockSource(uint32_t USARTxSource)
 {
- 8001190:	b580      	push	{r7, lr}
- 8001192:	b082      	sub	sp, #8
- 8001194:	af00      	add	r7, sp, #0
- 8001196:	6078      	str	r0, [r7, #4]
+ 8000cc4:	b580      	push	{r7, lr}
+ 8000cc6:	b082      	sub	sp, #8
+ 8000cc8:	af00      	add	r7, sp, #0
+ 8000cca:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CCIPR, (USARTxSource >> 16U), (USARTxSource & 0x0000FFFFU));
- 8001198:	4b08      	ldr	r3, [pc, #32]	; (80011bc <LL_RCC_SetUSARTClockSource+0x2c>)
- 800119a:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 800119c:	687a      	ldr	r2, [r7, #4]
- 800119e:	0c12      	lsrs	r2, r2, #16
- 80011a0:	43d2      	mvns	r2, r2
- 80011a2:	401a      	ands	r2, r3
- 80011a4:	0011      	movs	r1, r2
- 80011a6:	687b      	ldr	r3, [r7, #4]
- 80011a8:	041b      	lsls	r3, r3, #16
- 80011aa:	0c1a      	lsrs	r2, r3, #16
- 80011ac:	4b03      	ldr	r3, [pc, #12]	; (80011bc <LL_RCC_SetUSARTClockSource+0x2c>)
- 80011ae:	430a      	orrs	r2, r1
- 80011b0:	64da      	str	r2, [r3, #76]	; 0x4c
+ 8000ccc:	4b08      	ldr	r3, [pc, #32]	; (8000cf0 <LL_RCC_SetUSARTClockSource+0x2c>)
+ 8000cce:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8000cd0:	687a      	ldr	r2, [r7, #4]
+ 8000cd2:	0c12      	lsrs	r2, r2, #16
+ 8000cd4:	43d2      	mvns	r2, r2
+ 8000cd6:	401a      	ands	r2, r3
+ 8000cd8:	0011      	movs	r1, r2
+ 8000cda:	687b      	ldr	r3, [r7, #4]
+ 8000cdc:	041b      	lsls	r3, r3, #16
+ 8000cde:	0c1a      	lsrs	r2, r3, #16
+ 8000ce0:	4b03      	ldr	r3, [pc, #12]	; (8000cf0 <LL_RCC_SetUSARTClockSource+0x2c>)
+ 8000ce2:	430a      	orrs	r2, r1
+ 8000ce4:	64da      	str	r2, [r3, #76]	; 0x4c
 }
- 80011b2:	46c0      	nop			; (mov r8, r8)
- 80011b4:	46bd      	mov	sp, r7
- 80011b6:	b002      	add	sp, #8
- 80011b8:	bd80      	pop	{r7, pc}
- 80011ba:	46c0      	nop			; (mov r8, r8)
- 80011bc:	40021000 	.word	0x40021000
+ 8000ce6:	46c0      	nop			; (mov r8, r8)
+ 8000ce8:	46bd      	mov	sp, r7
+ 8000cea:	b002      	add	sp, #8
+ 8000cec:	bd80      	pop	{r7, pc}
+ 8000cee:	46c0      	nop			; (mov r8, r8)
+ 8000cf0:	40021000 	.word	0x40021000
 
-080011c0 <LL_RCC_SetI2CClockSource>:
+08000cf4 <LL_RCC_SetI2CClockSource>:
   *
   *         (*) value not defined in all devices.
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource)
 {
- 80011c0:	b580      	push	{r7, lr}
- 80011c2:	b082      	sub	sp, #8
- 80011c4:	af00      	add	r7, sp, #0
- 80011c6:	6078      	str	r0, [r7, #4]
+ 8000cf4:	b580      	push	{r7, lr}
+ 8000cf6:	b082      	sub	sp, #8
+ 8000cf8:	af00      	add	r7, sp, #0
+ 8000cfa:	6078      	str	r0, [r7, #4]
   MODIFY_REG(RCC->CCIPR, ((I2CxSource >> 4U) & 0x000FF000U), ((I2CxSource << 4U) & 0x000FF000U));
- 80011c8:	4b0a      	ldr	r3, [pc, #40]	; (80011f4 <LL_RCC_SetI2CClockSource+0x34>)
- 80011ca:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 80011cc:	687a      	ldr	r2, [r7, #4]
- 80011ce:	0911      	lsrs	r1, r2, #4
- 80011d0:	22ff      	movs	r2, #255	; 0xff
- 80011d2:	0312      	lsls	r2, r2, #12
- 80011d4:	400a      	ands	r2, r1
- 80011d6:	43d2      	mvns	r2, r2
- 80011d8:	401a      	ands	r2, r3
- 80011da:	0011      	movs	r1, r2
- 80011dc:	687b      	ldr	r3, [r7, #4]
- 80011de:	011a      	lsls	r2, r3, #4
- 80011e0:	23ff      	movs	r3, #255	; 0xff
- 80011e2:	031b      	lsls	r3, r3, #12
- 80011e4:	401a      	ands	r2, r3
- 80011e6:	4b03      	ldr	r3, [pc, #12]	; (80011f4 <LL_RCC_SetI2CClockSource+0x34>)
- 80011e8:	430a      	orrs	r2, r1
- 80011ea:	64da      	str	r2, [r3, #76]	; 0x4c
+ 8000cfc:	4b0a      	ldr	r3, [pc, #40]	; (8000d28 <LL_RCC_SetI2CClockSource+0x34>)
+ 8000cfe:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8000d00:	687a      	ldr	r2, [r7, #4]
+ 8000d02:	0911      	lsrs	r1, r2, #4
+ 8000d04:	22ff      	movs	r2, #255	; 0xff
+ 8000d06:	0312      	lsls	r2, r2, #12
+ 8000d08:	400a      	ands	r2, r1
+ 8000d0a:	43d2      	mvns	r2, r2
+ 8000d0c:	401a      	ands	r2, r3
+ 8000d0e:	0011      	movs	r1, r2
+ 8000d10:	687b      	ldr	r3, [r7, #4]
+ 8000d12:	011a      	lsls	r2, r3, #4
+ 8000d14:	23ff      	movs	r3, #255	; 0xff
+ 8000d16:	031b      	lsls	r3, r3, #12
+ 8000d18:	401a      	ands	r2, r3
+ 8000d1a:	4b03      	ldr	r3, [pc, #12]	; (8000d28 <LL_RCC_SetI2CClockSource+0x34>)
+ 8000d1c:	430a      	orrs	r2, r1
+ 8000d1e:	64da      	str	r2, [r3, #76]	; 0x4c
 }
- 80011ec:	46c0      	nop			; (mov r8, r8)
- 80011ee:	46bd      	mov	sp, r7
- 80011f0:	b002      	add	sp, #8
- 80011f2:	bd80      	pop	{r7, pc}
- 80011f4:	40021000 	.word	0x40021000
+ 8000d20:	46c0      	nop			; (mov r8, r8)
+ 8000d22:	46bd      	mov	sp, r7
+ 8000d24:	b002      	add	sp, #8
+ 8000d26:	bd80      	pop	{r7, pc}
+ 8000d28:	40021000 	.word	0x40021000
 
-080011f8 <LL_RCC_PLL_Enable>:
+08000d2c <LL_RCC_PLL_Enable>:
   * @brief  Enable PLL
   * @rmtoll CR           PLLON         LL_RCC_PLL_Enable
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_PLL_Enable(void)
 {
- 80011f8:	b580      	push	{r7, lr}
- 80011fa:	af00      	add	r7, sp, #0
+ 8000d2c:	b580      	push	{r7, lr}
+ 8000d2e:	af00      	add	r7, sp, #0
   SET_BIT(RCC->CR, RCC_CR_PLLON);
- 80011fc:	4b04      	ldr	r3, [pc, #16]	; (8001210 <LL_RCC_PLL_Enable+0x18>)
- 80011fe:	681a      	ldr	r2, [r3, #0]
- 8001200:	4b03      	ldr	r3, [pc, #12]	; (8001210 <LL_RCC_PLL_Enable+0x18>)
- 8001202:	2180      	movs	r1, #128	; 0x80
- 8001204:	0449      	lsls	r1, r1, #17
- 8001206:	430a      	orrs	r2, r1
- 8001208:	601a      	str	r2, [r3, #0]
+ 8000d30:	4b04      	ldr	r3, [pc, #16]	; (8000d44 <LL_RCC_PLL_Enable+0x18>)
+ 8000d32:	681a      	ldr	r2, [r3, #0]
+ 8000d34:	4b03      	ldr	r3, [pc, #12]	; (8000d44 <LL_RCC_PLL_Enable+0x18>)
+ 8000d36:	2180      	movs	r1, #128	; 0x80
+ 8000d38:	0449      	lsls	r1, r1, #17
+ 8000d3a:	430a      	orrs	r2, r1
+ 8000d3c:	601a      	str	r2, [r3, #0]
 }
- 800120a:	46c0      	nop			; (mov r8, r8)
- 800120c:	46bd      	mov	sp, r7
- 800120e:	bd80      	pop	{r7, pc}
- 8001210:	40021000 	.word	0x40021000
+ 8000d3e:	46c0      	nop			; (mov r8, r8)
+ 8000d40:	46bd      	mov	sp, r7
+ 8000d42:	bd80      	pop	{r7, pc}
+ 8000d44:	40021000 	.word	0x40021000
 
-08001214 <LL_RCC_PLL_IsReady>:
+08000d48 <LL_RCC_PLL_IsReady>:
   * @brief  Check if PLL Ready
   * @rmtoll CR           PLLRDY        LL_RCC_PLL_IsReady
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
 {
- 8001214:	b580      	push	{r7, lr}
- 8001216:	af00      	add	r7, sp, #0
+ 8000d48:	b580      	push	{r7, lr}
+ 8000d4a:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RCC_CR_PLLRDY) ? 1UL : 0UL);
- 8001218:	4b07      	ldr	r3, [pc, #28]	; (8001238 <LL_RCC_PLL_IsReady+0x24>)
- 800121a:	681a      	ldr	r2, [r3, #0]
- 800121c:	2380      	movs	r3, #128	; 0x80
- 800121e:	049b      	lsls	r3, r3, #18
- 8001220:	401a      	ands	r2, r3
- 8001222:	2380      	movs	r3, #128	; 0x80
- 8001224:	049b      	lsls	r3, r3, #18
- 8001226:	429a      	cmp	r2, r3
- 8001228:	d101      	bne.n	800122e <LL_RCC_PLL_IsReady+0x1a>
- 800122a:	2301      	movs	r3, #1
- 800122c:	e000      	b.n	8001230 <LL_RCC_PLL_IsReady+0x1c>
- 800122e:	2300      	movs	r3, #0
+ 8000d4c:	4b07      	ldr	r3, [pc, #28]	; (8000d6c <LL_RCC_PLL_IsReady+0x24>)
+ 8000d4e:	681a      	ldr	r2, [r3, #0]
+ 8000d50:	2380      	movs	r3, #128	; 0x80
+ 8000d52:	049b      	lsls	r3, r3, #18
+ 8000d54:	401a      	ands	r2, r3
+ 8000d56:	2380      	movs	r3, #128	; 0x80
+ 8000d58:	049b      	lsls	r3, r3, #18
+ 8000d5a:	429a      	cmp	r2, r3
+ 8000d5c:	d101      	bne.n	8000d62 <LL_RCC_PLL_IsReady+0x1a>
+ 8000d5e:	2301      	movs	r3, #1
+ 8000d60:	e000      	b.n	8000d64 <LL_RCC_PLL_IsReady+0x1c>
+ 8000d62:	2300      	movs	r3, #0
 }
- 8001230:	0018      	movs	r0, r3
- 8001232:	46bd      	mov	sp, r7
- 8001234:	bd80      	pop	{r7, pc}
- 8001236:	46c0      	nop			; (mov r8, r8)
- 8001238:	40021000 	.word	0x40021000
+ 8000d64:	0018      	movs	r0, r3
+ 8000d66:	46bd      	mov	sp, r7
+ 8000d68:	bd80      	pop	{r7, pc}
+ 8000d6a:	46c0      	nop			; (mov r8, r8)
+ 8000d6c:	40021000 	.word	0x40021000
 
-0800123c <LL_RCC_PLL_ConfigDomain_SYS>:
+08000d70 <LL_RCC_PLL_ConfigDomain_SYS>:
   *         @arg @ref LL_RCC_PLL_DIV_3
   *         @arg @ref LL_RCC_PLL_DIV_4
   * @retval None
   */
 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLMul, uint32_t PLLDiv)
 {
- 800123c:	b580      	push	{r7, lr}
- 800123e:	b084      	sub	sp, #16
- 8001240:	af00      	add	r7, sp, #0
- 8001242:	60f8      	str	r0, [r7, #12]
- 8001244:	60b9      	str	r1, [r7, #8]
- 8001246:	607a      	str	r2, [r7, #4]
+ 8000d70:	b580      	push	{r7, lr}
+ 8000d72:	b084      	sub	sp, #16
+ 8000d74:	af00      	add	r7, sp, #0
+ 8000d76:	60f8      	str	r0, [r7, #12]
+ 8000d78:	60b9      	str	r1, [r7, #8]
+ 8000d7a:	607a      	str	r2, [r7, #4]
   MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV, Source | PLLMul | PLLDiv);
- 8001248:	4b08      	ldr	r3, [pc, #32]	; (800126c <LL_RCC_PLL_ConfigDomain_SYS+0x30>)
- 800124a:	68db      	ldr	r3, [r3, #12]
- 800124c:	4a08      	ldr	r2, [pc, #32]	; (8001270 <LL_RCC_PLL_ConfigDomain_SYS+0x34>)
- 800124e:	4013      	ands	r3, r2
- 8001250:	0019      	movs	r1, r3
- 8001252:	68fa      	ldr	r2, [r7, #12]
- 8001254:	68bb      	ldr	r3, [r7, #8]
- 8001256:	431a      	orrs	r2, r3
- 8001258:	687b      	ldr	r3, [r7, #4]
- 800125a:	431a      	orrs	r2, r3
- 800125c:	4b03      	ldr	r3, [pc, #12]	; (800126c <LL_RCC_PLL_ConfigDomain_SYS+0x30>)
- 800125e:	430a      	orrs	r2, r1
- 8001260:	60da      	str	r2, [r3, #12]
+ 8000d7c:	4b08      	ldr	r3, [pc, #32]	; (8000da0 <LL_RCC_PLL_ConfigDomain_SYS+0x30>)
+ 8000d7e:	68db      	ldr	r3, [r3, #12]
+ 8000d80:	4a08      	ldr	r2, [pc, #32]	; (8000da4 <LL_RCC_PLL_ConfigDomain_SYS+0x34>)
+ 8000d82:	4013      	ands	r3, r2
+ 8000d84:	0019      	movs	r1, r3
+ 8000d86:	68fa      	ldr	r2, [r7, #12]
+ 8000d88:	68bb      	ldr	r3, [r7, #8]
+ 8000d8a:	431a      	orrs	r2, r3
+ 8000d8c:	687b      	ldr	r3, [r7, #4]
+ 8000d8e:	431a      	orrs	r2, r3
+ 8000d90:	4b03      	ldr	r3, [pc, #12]	; (8000da0 <LL_RCC_PLL_ConfigDomain_SYS+0x30>)
+ 8000d92:	430a      	orrs	r2, r1
+ 8000d94:	60da      	str	r2, [r3, #12]
 }
- 8001262:	46c0      	nop			; (mov r8, r8)
- 8001264:	46bd      	mov	sp, r7
- 8001266:	b004      	add	sp, #16
- 8001268:	bd80      	pop	{r7, pc}
- 800126a:	46c0      	nop			; (mov r8, r8)
- 800126c:	40021000 	.word	0x40021000
- 8001270:	ff02ffff 	.word	0xff02ffff
+ 8000d96:	46c0      	nop			; (mov r8, r8)
+ 8000d98:	46bd      	mov	sp, r7
+ 8000d9a:	b004      	add	sp, #16
+ 8000d9c:	bd80      	pop	{r7, pc}
+ 8000d9e:	46c0      	nop			; (mov r8, r8)
+ 8000da0:	40021000 	.word	0x40021000
+ 8000da4:	ff02ffff 	.word	0xff02ffff
 
-08001274 <LL_APB1_GRP1_EnableClock>:
+08000da8 <LL_APB1_GRP1_EnableClock>:
   *
   *         (*) value not defined in all devices.
   * @retval None
 */
 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
 {
- 8001274:	b580      	push	{r7, lr}
- 8001276:	b084      	sub	sp, #16
- 8001278:	af00      	add	r7, sp, #0
- 800127a:	6078      	str	r0, [r7, #4]
+ 8000da8:	b580      	push	{r7, lr}
+ 8000daa:	b084      	sub	sp, #16
+ 8000dac:	af00      	add	r7, sp, #0
+ 8000dae:	6078      	str	r0, [r7, #4]
   __IO uint32_t tmpreg;
   SET_BIT(RCC->APB1ENR, Periphs);
- 800127c:	4b07      	ldr	r3, [pc, #28]	; (800129c <LL_APB1_GRP1_EnableClock+0x28>)
- 800127e:	6b99      	ldr	r1, [r3, #56]	; 0x38
- 8001280:	4b06      	ldr	r3, [pc, #24]	; (800129c <LL_APB1_GRP1_EnableClock+0x28>)
- 8001282:	687a      	ldr	r2, [r7, #4]
- 8001284:	430a      	orrs	r2, r1
- 8001286:	639a      	str	r2, [r3, #56]	; 0x38
+ 8000db0:	4b07      	ldr	r3, [pc, #28]	; (8000dd0 <LL_APB1_GRP1_EnableClock+0x28>)
+ 8000db2:	6b99      	ldr	r1, [r3, #56]	; 0x38
+ 8000db4:	4b06      	ldr	r3, [pc, #24]	; (8000dd0 <LL_APB1_GRP1_EnableClock+0x28>)
+ 8000db6:	687a      	ldr	r2, [r7, #4]
+ 8000db8:	430a      	orrs	r2, r1
+ 8000dba:	639a      	str	r2, [r3, #56]	; 0x38
   /* Delay after an RCC peripheral clock enabling */
   tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
- 8001288:	4b04      	ldr	r3, [pc, #16]	; (800129c <LL_APB1_GRP1_EnableClock+0x28>)
- 800128a:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 800128c:	687a      	ldr	r2, [r7, #4]
- 800128e:	4013      	ands	r3, r2
- 8001290:	60fb      	str	r3, [r7, #12]
+ 8000dbc:	4b04      	ldr	r3, [pc, #16]	; (8000dd0 <LL_APB1_GRP1_EnableClock+0x28>)
+ 8000dbe:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8000dc0:	687a      	ldr	r2, [r7, #4]
+ 8000dc2:	4013      	ands	r3, r2
+ 8000dc4:	60fb      	str	r3, [r7, #12]
   (void)tmpreg;
- 8001292:	68fb      	ldr	r3, [r7, #12]
+ 8000dc6:	68fb      	ldr	r3, [r7, #12]
 }
- 8001294:	46c0      	nop			; (mov r8, r8)
- 8001296:	46bd      	mov	sp, r7
- 8001298:	b004      	add	sp, #16
- 800129a:	bd80      	pop	{r7, pc}
- 800129c:	40021000 	.word	0x40021000
+ 8000dc8:	46c0      	nop			; (mov r8, r8)
+ 8000dca:	46bd      	mov	sp, r7
+ 8000dcc:	b004      	add	sp, #16
+ 8000dce:	bd80      	pop	{r7, pc}
+ 8000dd0:	40021000 	.word	0x40021000
 
-080012a0 <LL_APB2_GRP1_EnableClock>:
+08000dd4 <LL_APB2_GRP1_EnableClock>:
   *
   *         (*) value not defined in all devices.
   * @retval None
 */
 __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
 {
- 80012a0:	b580      	push	{r7, lr}
- 80012a2:	b084      	sub	sp, #16
- 80012a4:	af00      	add	r7, sp, #0
- 80012a6:	6078      	str	r0, [r7, #4]
+ 8000dd4:	b580      	push	{r7, lr}
+ 8000dd6:	b084      	sub	sp, #16
+ 8000dd8:	af00      	add	r7, sp, #0
+ 8000dda:	6078      	str	r0, [r7, #4]
   __IO uint32_t tmpreg;
   SET_BIT(RCC->APB2ENR, Periphs);
- 80012a8:	4b07      	ldr	r3, [pc, #28]	; (80012c8 <LL_APB2_GRP1_EnableClock+0x28>)
- 80012aa:	6b59      	ldr	r1, [r3, #52]	; 0x34
- 80012ac:	4b06      	ldr	r3, [pc, #24]	; (80012c8 <LL_APB2_GRP1_EnableClock+0x28>)
- 80012ae:	687a      	ldr	r2, [r7, #4]
- 80012b0:	430a      	orrs	r2, r1
- 80012b2:	635a      	str	r2, [r3, #52]	; 0x34
+ 8000ddc:	4b07      	ldr	r3, [pc, #28]	; (8000dfc <LL_APB2_GRP1_EnableClock+0x28>)
+ 8000dde:	6b59      	ldr	r1, [r3, #52]	; 0x34
+ 8000de0:	4b06      	ldr	r3, [pc, #24]	; (8000dfc <LL_APB2_GRP1_EnableClock+0x28>)
+ 8000de2:	687a      	ldr	r2, [r7, #4]
+ 8000de4:	430a      	orrs	r2, r1
+ 8000de6:	635a      	str	r2, [r3, #52]	; 0x34
   /* Delay after an RCC peripheral clock enabling */
   tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
- 80012b4:	4b04      	ldr	r3, [pc, #16]	; (80012c8 <LL_APB2_GRP1_EnableClock+0x28>)
- 80012b6:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 80012b8:	687a      	ldr	r2, [r7, #4]
- 80012ba:	4013      	ands	r3, r2
- 80012bc:	60fb      	str	r3, [r7, #12]
+ 8000de8:	4b04      	ldr	r3, [pc, #16]	; (8000dfc <LL_APB2_GRP1_EnableClock+0x28>)
+ 8000dea:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8000dec:	687a      	ldr	r2, [r7, #4]
+ 8000dee:	4013      	ands	r3, r2
+ 8000df0:	60fb      	str	r3, [r7, #12]
   (void)tmpreg;
- 80012be:	68fb      	ldr	r3, [r7, #12]
+ 8000df2:	68fb      	ldr	r3, [r7, #12]
 }
- 80012c0:	46c0      	nop			; (mov r8, r8)
- 80012c2:	46bd      	mov	sp, r7
- 80012c4:	b004      	add	sp, #16
- 80012c6:	bd80      	pop	{r7, pc}
- 80012c8:	40021000 	.word	0x40021000
+ 8000df4:	46c0      	nop			; (mov r8, r8)
+ 8000df6:	46bd      	mov	sp, r7
+ 8000df8:	b004      	add	sp, #16
+ 8000dfa:	bd80      	pop	{r7, pc}
+ 8000dfc:	40021000 	.word	0x40021000
 
-080012cc <LL_IOP_GRP1_EnableClock>:
+08000e00 <LL_IOP_GRP1_EnableClock>:
   *
   *         (*) value not defined in all devices.
   * @retval None
 */
 __STATIC_INLINE void LL_IOP_GRP1_EnableClock(uint32_t Periphs)
 {
- 80012cc:	b580      	push	{r7, lr}
- 80012ce:	b084      	sub	sp, #16
- 80012d0:	af00      	add	r7, sp, #0
- 80012d2:	6078      	str	r0, [r7, #4]
+ 8000e00:	b580      	push	{r7, lr}
+ 8000e02:	b084      	sub	sp, #16
+ 8000e04:	af00      	add	r7, sp, #0
+ 8000e06:	6078      	str	r0, [r7, #4]
   __IO uint32_t tmpreg;
   SET_BIT(RCC->IOPENR, Periphs);
- 80012d4:	4b07      	ldr	r3, [pc, #28]	; (80012f4 <LL_IOP_GRP1_EnableClock+0x28>)
- 80012d6:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
- 80012d8:	4b06      	ldr	r3, [pc, #24]	; (80012f4 <LL_IOP_GRP1_EnableClock+0x28>)
- 80012da:	687a      	ldr	r2, [r7, #4]
- 80012dc:	430a      	orrs	r2, r1
- 80012de:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000e08:	4b07      	ldr	r3, [pc, #28]	; (8000e28 <LL_IOP_GRP1_EnableClock+0x28>)
+ 8000e0a:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
+ 8000e0c:	4b06      	ldr	r3, [pc, #24]	; (8000e28 <LL_IOP_GRP1_EnableClock+0x28>)
+ 8000e0e:	687a      	ldr	r2, [r7, #4]
+ 8000e10:	430a      	orrs	r2, r1
+ 8000e12:	62da      	str	r2, [r3, #44]	; 0x2c
   /* Delay after an RCC peripheral clock enabling */
   tmpreg = READ_BIT(RCC->IOPENR, Periphs);
- 80012e0:	4b04      	ldr	r3, [pc, #16]	; (80012f4 <LL_IOP_GRP1_EnableClock+0x28>)
- 80012e2:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 80012e4:	687a      	ldr	r2, [r7, #4]
- 80012e6:	4013      	ands	r3, r2
- 80012e8:	60fb      	str	r3, [r7, #12]
+ 8000e14:	4b04      	ldr	r3, [pc, #16]	; (8000e28 <LL_IOP_GRP1_EnableClock+0x28>)
+ 8000e16:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000e18:	687a      	ldr	r2, [r7, #4]
+ 8000e1a:	4013      	ands	r3, r2
+ 8000e1c:	60fb      	str	r3, [r7, #12]
   (void)tmpreg;
- 80012ea:	68fb      	ldr	r3, [r7, #12]
+ 8000e1e:	68fb      	ldr	r3, [r7, #12]
 }
- 80012ec:	46c0      	nop			; (mov r8, r8)
- 80012ee:	46bd      	mov	sp, r7
- 80012f0:	b004      	add	sp, #16
- 80012f2:	bd80      	pop	{r7, pc}
- 80012f4:	40021000 	.word	0x40021000
+ 8000e20:	46c0      	nop			; (mov r8, r8)
+ 8000e22:	46bd      	mov	sp, r7
+ 8000e24:	b004      	add	sp, #16
+ 8000e26:	bd80      	pop	{r7, pc}
+ 8000e28:	40021000 	.word	0x40021000
 
-080012f8 <LL_FLASH_SetLatency>:
+08000e2c <LL_FLASH_SetLatency>:
   *         @arg @ref LL_FLASH_LATENCY_0
   *         @arg @ref LL_FLASH_LATENCY_1
   * @retval None
   */
 __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
 {
- 80012f8:	b580      	push	{r7, lr}
- 80012fa:	b082      	sub	sp, #8
- 80012fc:	af00      	add	r7, sp, #0
- 80012fe:	6078      	str	r0, [r7, #4]
+ 8000e2c:	b580      	push	{r7, lr}
+ 8000e2e:	b082      	sub	sp, #8
+ 8000e30:	af00      	add	r7, sp, #0
+ 8000e32:	6078      	str	r0, [r7, #4]
   MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
- 8001300:	4b06      	ldr	r3, [pc, #24]	; (800131c <LL_FLASH_SetLatency+0x24>)
- 8001302:	681b      	ldr	r3, [r3, #0]
- 8001304:	2201      	movs	r2, #1
- 8001306:	4393      	bics	r3, r2
- 8001308:	0019      	movs	r1, r3
- 800130a:	4b04      	ldr	r3, [pc, #16]	; (800131c <LL_FLASH_SetLatency+0x24>)
- 800130c:	687a      	ldr	r2, [r7, #4]
- 800130e:	430a      	orrs	r2, r1
- 8001310:	601a      	str	r2, [r3, #0]
+ 8000e34:	4b06      	ldr	r3, [pc, #24]	; (8000e50 <LL_FLASH_SetLatency+0x24>)
+ 8000e36:	681b      	ldr	r3, [r3, #0]
+ 8000e38:	2201      	movs	r2, #1
+ 8000e3a:	4393      	bics	r3, r2
+ 8000e3c:	0019      	movs	r1, r3
+ 8000e3e:	4b04      	ldr	r3, [pc, #16]	; (8000e50 <LL_FLASH_SetLatency+0x24>)
+ 8000e40:	687a      	ldr	r2, [r7, #4]
+ 8000e42:	430a      	orrs	r2, r1
+ 8000e44:	601a      	str	r2, [r3, #0]
 }
- 8001312:	46c0      	nop			; (mov r8, r8)
- 8001314:	46bd      	mov	sp, r7
- 8001316:	b002      	add	sp, #8
- 8001318:	bd80      	pop	{r7, pc}
- 800131a:	46c0      	nop			; (mov r8, r8)
- 800131c:	40022000 	.word	0x40022000
+ 8000e46:	46c0      	nop			; (mov r8, r8)
+ 8000e48:	46bd      	mov	sp, r7
+ 8000e4a:	b002      	add	sp, #8
+ 8000e4c:	bd80      	pop	{r7, pc}
+ 8000e4e:	46c0      	nop			; (mov r8, r8)
+ 8000e50:	40022000 	.word	0x40022000
 
-08001320 <LL_FLASH_GetLatency>:
+08000e54 <LL_FLASH_GetLatency>:
   * @retval Returned value can be one of the following values:
   *         @arg @ref LL_FLASH_LATENCY_0
   *         @arg @ref LL_FLASH_LATENCY_1
   */
 __STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
 {
- 8001320:	b580      	push	{r7, lr}
- 8001322:	af00      	add	r7, sp, #0
+ 8000e54:	b580      	push	{r7, lr}
+ 8000e56:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
- 8001324:	4b03      	ldr	r3, [pc, #12]	; (8001334 <LL_FLASH_GetLatency+0x14>)
- 8001326:	681b      	ldr	r3, [r3, #0]
- 8001328:	2201      	movs	r2, #1
- 800132a:	4013      	ands	r3, r2
+ 8000e58:	4b03      	ldr	r3, [pc, #12]	; (8000e68 <LL_FLASH_GetLatency+0x14>)
+ 8000e5a:	681b      	ldr	r3, [r3, #0]
+ 8000e5c:	2201      	movs	r2, #1
+ 8000e5e:	4013      	ands	r3, r2
 }
- 800132c:	0018      	movs	r0, r3
- 800132e:	46bd      	mov	sp, r7
- 8001330:	bd80      	pop	{r7, pc}
- 8001332:	46c0      	nop			; (mov r8, r8)
- 8001334:	40022000 	.word	0x40022000
+ 8000e60:	0018      	movs	r0, r3
+ 8000e62:	46bd      	mov	sp, r7
+ 8000e64:	bd80      	pop	{r7, pc}
+ 8000e66:	46c0      	nop			; (mov r8, r8)
+ 8000e68:	40022000 	.word	0x40022000
 
-08001338 <LL_PWR_SetRegulVoltageScaling>:
+08000e6c <LL_PWR_SetRegulVoltageScaling>:
   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
   *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
   * @retval None
   */
 __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
 {
- 8001338:	b580      	push	{r7, lr}
- 800133a:	b082      	sub	sp, #8
- 800133c:	af00      	add	r7, sp, #0
- 800133e:	6078      	str	r0, [r7, #4]
+ 8000e6c:	b580      	push	{r7, lr}
+ 8000e6e:	b082      	sub	sp, #8
+ 8000e70:	af00      	add	r7, sp, #0
+ 8000e72:	6078      	str	r0, [r7, #4]
   MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
- 8001340:	4b06      	ldr	r3, [pc, #24]	; (800135c <LL_PWR_SetRegulVoltageScaling+0x24>)
- 8001342:	681b      	ldr	r3, [r3, #0]
- 8001344:	4a06      	ldr	r2, [pc, #24]	; (8001360 <LL_PWR_SetRegulVoltageScaling+0x28>)
- 8001346:	4013      	ands	r3, r2
- 8001348:	0019      	movs	r1, r3
- 800134a:	4b04      	ldr	r3, [pc, #16]	; (800135c <LL_PWR_SetRegulVoltageScaling+0x24>)
- 800134c:	687a      	ldr	r2, [r7, #4]
- 800134e:	430a      	orrs	r2, r1
- 8001350:	601a      	str	r2, [r3, #0]
+ 8000e74:	4b06      	ldr	r3, [pc, #24]	; (8000e90 <LL_PWR_SetRegulVoltageScaling+0x24>)
+ 8000e76:	681b      	ldr	r3, [r3, #0]
+ 8000e78:	4a06      	ldr	r2, [pc, #24]	; (8000e94 <LL_PWR_SetRegulVoltageScaling+0x28>)
+ 8000e7a:	4013      	ands	r3, r2
+ 8000e7c:	0019      	movs	r1, r3
+ 8000e7e:	4b04      	ldr	r3, [pc, #16]	; (8000e90 <LL_PWR_SetRegulVoltageScaling+0x24>)
+ 8000e80:	687a      	ldr	r2, [r7, #4]
+ 8000e82:	430a      	orrs	r2, r1
+ 8000e84:	601a      	str	r2, [r3, #0]
 }
- 8001352:	46c0      	nop			; (mov r8, r8)
- 8001354:	46bd      	mov	sp, r7
- 8001356:	b002      	add	sp, #8
- 8001358:	bd80      	pop	{r7, pc}
- 800135a:	46c0      	nop			; (mov r8, r8)
- 800135c:	40007000 	.word	0x40007000
- 8001360:	ffffe7ff 	.word	0xffffe7ff
+ 8000e86:	46c0      	nop			; (mov r8, r8)
+ 8000e88:	46bd      	mov	sp, r7
+ 8000e8a:	b002      	add	sp, #8
+ 8000e8c:	bd80      	pop	{r7, pc}
+ 8000e8e:	46c0      	nop			; (mov r8, r8)
+ 8000e90:	40007000 	.word	0x40007000
+ 8000e94:	ffffe7ff 	.word	0xffffe7ff
 
-08001364 <LL_TIM_EnableCounter>:
+08000e98 <LL_TIM_EnableCounter>:
   * @rmtoll CR1          CEN           LL_TIM_EnableCounter
   * @param  TIMx Timer instance
   * @retval None
   */
 __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
 {
- 8001364:	b580      	push	{r7, lr}
- 8001366:	b082      	sub	sp, #8
- 8001368:	af00      	add	r7, sp, #0
- 800136a:	6078      	str	r0, [r7, #4]
+ 8000e98:	b580      	push	{r7, lr}
+ 8000e9a:	b082      	sub	sp, #8
+ 8000e9c:	af00      	add	r7, sp, #0
+ 8000e9e:	6078      	str	r0, [r7, #4]
   SET_BIT(TIMx->CR1, TIM_CR1_CEN);
- 800136c:	687b      	ldr	r3, [r7, #4]
- 800136e:	681b      	ldr	r3, [r3, #0]
- 8001370:	2201      	movs	r2, #1
- 8001372:	431a      	orrs	r2, r3
- 8001374:	687b      	ldr	r3, [r7, #4]
- 8001376:	601a      	str	r2, [r3, #0]
+ 8000ea0:	687b      	ldr	r3, [r7, #4]
+ 8000ea2:	681b      	ldr	r3, [r3, #0]
+ 8000ea4:	2201      	movs	r2, #1
+ 8000ea6:	431a      	orrs	r2, r3
+ 8000ea8:	687b      	ldr	r3, [r7, #4]
+ 8000eaa:	601a      	str	r2, [r3, #0]
 }
- 8001378:	46c0      	nop			; (mov r8, r8)
- 800137a:	46bd      	mov	sp, r7
- 800137c:	b002      	add	sp, #8
- 800137e:	bd80      	pop	{r7, pc}
+ 8000eac:	46c0      	nop			; (mov r8, r8)
+ 8000eae:	46bd      	mov	sp, r7
+ 8000eb0:	b002      	add	sp, #8
+ 8000eb2:	bd80      	pop	{r7, pc}
 
-08001380 <LL_TIM_EnableARRPreload>:
+08000eb4 <LL_TIM_EnableARRPreload>:
   * @rmtoll CR1          ARPE          LL_TIM_EnableARRPreload
   * @param  TIMx Timer instance
   * @retval None
   */
 __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
 {
- 8001380:	b580      	push	{r7, lr}
- 8001382:	b082      	sub	sp, #8
- 8001384:	af00      	add	r7, sp, #0
- 8001386:	6078      	str	r0, [r7, #4]
+ 8000eb4:	b580      	push	{r7, lr}
+ 8000eb6:	b082      	sub	sp, #8
+ 8000eb8:	af00      	add	r7, sp, #0
+ 8000eba:	6078      	str	r0, [r7, #4]
   SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
- 8001388:	687b      	ldr	r3, [r7, #4]
- 800138a:	681b      	ldr	r3, [r3, #0]
- 800138c:	2280      	movs	r2, #128	; 0x80
- 800138e:	431a      	orrs	r2, r3
- 8001390:	687b      	ldr	r3, [r7, #4]
- 8001392:	601a      	str	r2, [r3, #0]
+ 8000ebc:	687b      	ldr	r3, [r7, #4]
+ 8000ebe:	681b      	ldr	r3, [r3, #0]
+ 8000ec0:	2280      	movs	r2, #128	; 0x80
+ 8000ec2:	431a      	orrs	r2, r3
+ 8000ec4:	687b      	ldr	r3, [r7, #4]
+ 8000ec6:	601a      	str	r2, [r3, #0]
 }
- 8001394:	46c0      	nop			; (mov r8, r8)
- 8001396:	46bd      	mov	sp, r7
- 8001398:	b002      	add	sp, #8
- 800139a:	bd80      	pop	{r7, pc}
+ 8000ec8:	46c0      	nop			; (mov r8, r8)
+ 8000eca:	46bd      	mov	sp, r7
+ 8000ecc:	b002      	add	sp, #8
+ 8000ece:	bd80      	pop	{r7, pc}
 
-0800139c <LL_TIM_SetClockSource>:
+08000ed0 <LL_TIM_SetClockSource>:
   *         @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
   *         @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
   * @retval None
   */
 __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
 {
- 800139c:	b580      	push	{r7, lr}
- 800139e:	b082      	sub	sp, #8
- 80013a0:	af00      	add	r7, sp, #0
- 80013a2:	6078      	str	r0, [r7, #4]
- 80013a4:	6039      	str	r1, [r7, #0]
+ 8000ed0:	b580      	push	{r7, lr}
+ 8000ed2:	b082      	sub	sp, #8
+ 8000ed4:	af00      	add	r7, sp, #0
+ 8000ed6:	6078      	str	r0, [r7, #4]
+ 8000ed8:	6039      	str	r1, [r7, #0]
   MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
- 80013a6:	687b      	ldr	r3, [r7, #4]
- 80013a8:	689b      	ldr	r3, [r3, #8]
- 80013aa:	4a05      	ldr	r2, [pc, #20]	; (80013c0 <LL_TIM_SetClockSource+0x24>)
- 80013ac:	401a      	ands	r2, r3
- 80013ae:	683b      	ldr	r3, [r7, #0]
- 80013b0:	431a      	orrs	r2, r3
- 80013b2:	687b      	ldr	r3, [r7, #4]
- 80013b4:	609a      	str	r2, [r3, #8]
+ 8000eda:	687b      	ldr	r3, [r7, #4]
+ 8000edc:	689b      	ldr	r3, [r3, #8]
+ 8000ede:	4a05      	ldr	r2, [pc, #20]	; (8000ef4 <LL_TIM_SetClockSource+0x24>)
+ 8000ee0:	401a      	ands	r2, r3
+ 8000ee2:	683b      	ldr	r3, [r7, #0]
+ 8000ee4:	431a      	orrs	r2, r3
+ 8000ee6:	687b      	ldr	r3, [r7, #4]
+ 8000ee8:	609a      	str	r2, [r3, #8]
 }
- 80013b6:	46c0      	nop			; (mov r8, r8)
- 80013b8:	46bd      	mov	sp, r7
- 80013ba:	b002      	add	sp, #8
- 80013bc:	bd80      	pop	{r7, pc}
- 80013be:	46c0      	nop			; (mov r8, r8)
- 80013c0:	ffffbff8 	.word	0xffffbff8
+ 8000eea:	46c0      	nop			; (mov r8, r8)
+ 8000eec:	46bd      	mov	sp, r7
+ 8000eee:	b002      	add	sp, #8
+ 8000ef0:	bd80      	pop	{r7, pc}
+ 8000ef2:	46c0      	nop			; (mov r8, r8)
+ 8000ef4:	ffffbff8 	.word	0xffffbff8
 
-080013c4 <LL_TIM_SetTriggerOutput>:
+08000ef8 <LL_TIM_SetTriggerOutput>:
   *         @arg @ref LL_TIM_TRGO_OC3REF
   *         @arg @ref LL_TIM_TRGO_OC4REF
   * @retval None
   */
 __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
 {
- 80013c4:	b580      	push	{r7, lr}
- 80013c6:	b082      	sub	sp, #8
- 80013c8:	af00      	add	r7, sp, #0
- 80013ca:	6078      	str	r0, [r7, #4]
- 80013cc:	6039      	str	r1, [r7, #0]
+ 8000ef8:	b580      	push	{r7, lr}
+ 8000efa:	b082      	sub	sp, #8
+ 8000efc:	af00      	add	r7, sp, #0
+ 8000efe:	6078      	str	r0, [r7, #4]
+ 8000f00:	6039      	str	r1, [r7, #0]
   MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
- 80013ce:	687b      	ldr	r3, [r7, #4]
- 80013d0:	685b      	ldr	r3, [r3, #4]
- 80013d2:	2270      	movs	r2, #112	; 0x70
- 80013d4:	4393      	bics	r3, r2
- 80013d6:	001a      	movs	r2, r3
- 80013d8:	683b      	ldr	r3, [r7, #0]
- 80013da:	431a      	orrs	r2, r3
- 80013dc:	687b      	ldr	r3, [r7, #4]
- 80013de:	605a      	str	r2, [r3, #4]
+ 8000f02:	687b      	ldr	r3, [r7, #4]
+ 8000f04:	685b      	ldr	r3, [r3, #4]
+ 8000f06:	2270      	movs	r2, #112	; 0x70
+ 8000f08:	4393      	bics	r3, r2
+ 8000f0a:	001a      	movs	r2, r3
+ 8000f0c:	683b      	ldr	r3, [r7, #0]
+ 8000f0e:	431a      	orrs	r2, r3
+ 8000f10:	687b      	ldr	r3, [r7, #4]
+ 8000f12:	605a      	str	r2, [r3, #4]
 }
- 80013e0:	46c0      	nop			; (mov r8, r8)
- 80013e2:	46bd      	mov	sp, r7
- 80013e4:	b002      	add	sp, #8
- 80013e6:	bd80      	pop	{r7, pc}
+ 8000f14:	46c0      	nop			; (mov r8, r8)
+ 8000f16:	46bd      	mov	sp, r7
+ 8000f18:	b002      	add	sp, #8
+ 8000f1a:	bd80      	pop	{r7, pc}
 
-080013e8 <LL_TIM_DisableMasterSlaveMode>:
+08000f1c <LL_TIM_DisableMasterSlaveMode>:
   * @rmtoll SMCR         MSM           LL_TIM_DisableMasterSlaveMode
   * @param  TIMx Timer instance
   * @retval None
   */
 __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
 {
- 80013e8:	b580      	push	{r7, lr}
- 80013ea:	b082      	sub	sp, #8
- 80013ec:	af00      	add	r7, sp, #0
- 80013ee:	6078      	str	r0, [r7, #4]
+ 8000f1c:	b580      	push	{r7, lr}
+ 8000f1e:	b082      	sub	sp, #8
+ 8000f20:	af00      	add	r7, sp, #0
+ 8000f22:	6078      	str	r0, [r7, #4]
   CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
- 80013f0:	687b      	ldr	r3, [r7, #4]
- 80013f2:	689b      	ldr	r3, [r3, #8]
- 80013f4:	2280      	movs	r2, #128	; 0x80
- 80013f6:	4393      	bics	r3, r2
- 80013f8:	001a      	movs	r2, r3
- 80013fa:	687b      	ldr	r3, [r7, #4]
- 80013fc:	609a      	str	r2, [r3, #8]
+ 8000f24:	687b      	ldr	r3, [r7, #4]
+ 8000f26:	689b      	ldr	r3, [r3, #8]
+ 8000f28:	2280      	movs	r2, #128	; 0x80
+ 8000f2a:	4393      	bics	r3, r2
+ 8000f2c:	001a      	movs	r2, r3
+ 8000f2e:	687b      	ldr	r3, [r7, #4]
+ 8000f30:	609a      	str	r2, [r3, #8]
 }
- 80013fe:	46c0      	nop			; (mov r8, r8)
- 8001400:	46bd      	mov	sp, r7
- 8001402:	b002      	add	sp, #8
- 8001404:	bd80      	pop	{r7, pc}
+ 8000f32:	46c0      	nop			; (mov r8, r8)
+ 8000f34:	46bd      	mov	sp, r7
+ 8000f36:	b002      	add	sp, #8
+ 8000f38:	bd80      	pop	{r7, pc}
 
-08001406 <LL_TIM_EnableIT_UPDATE>:
+08000f3a <LL_TIM_EnableIT_UPDATE>:
   * @rmtoll DIER         UIE           LL_TIM_EnableIT_UPDATE
   * @param  TIMx Timer instance
   * @retval None
   */
 __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)
 {
- 8001406:	b580      	push	{r7, lr}
- 8001408:	b082      	sub	sp, #8
- 800140a:	af00      	add	r7, sp, #0
- 800140c:	6078      	str	r0, [r7, #4]
+ 8000f3a:	b580      	push	{r7, lr}
+ 8000f3c:	b082      	sub	sp, #8
+ 8000f3e:	af00      	add	r7, sp, #0
+ 8000f40:	6078      	str	r0, [r7, #4]
   SET_BIT(TIMx->DIER, TIM_DIER_UIE);
- 800140e:	687b      	ldr	r3, [r7, #4]
- 8001410:	68db      	ldr	r3, [r3, #12]
- 8001412:	2201      	movs	r2, #1
- 8001414:	431a      	orrs	r2, r3
- 8001416:	687b      	ldr	r3, [r7, #4]
- 8001418:	60da      	str	r2, [r3, #12]
+ 8000f42:	687b      	ldr	r3, [r7, #4]
+ 8000f44:	68db      	ldr	r3, [r3, #12]
+ 8000f46:	2201      	movs	r2, #1
+ 8000f48:	431a      	orrs	r2, r3
+ 8000f4a:	687b      	ldr	r3, [r7, #4]
+ 8000f4c:	60da      	str	r2, [r3, #12]
 }
- 800141a:	46c0      	nop			; (mov r8, r8)
- 800141c:	46bd      	mov	sp, r7
- 800141e:	b002      	add	sp, #8
- 8001420:	bd80      	pop	{r7, pc}
+ 8000f4e:	46c0      	nop			; (mov r8, r8)
+ 8000f50:	46bd      	mov	sp, r7
+ 8000f52:	b002      	add	sp, #8
+ 8000f54:	bd80      	pop	{r7, pc}
 
-08001422 <LL_USART_Enable>:
+08000f56 <LL_USART_Enable>:
   * @rmtoll CR1          UE            LL_USART_Enable
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
 {
- 8001422:	b580      	push	{r7, lr}
- 8001424:	b082      	sub	sp, #8
- 8001426:	af00      	add	r7, sp, #0
- 8001428:	6078      	str	r0, [r7, #4]
+ 8000f56:	b580      	push	{r7, lr}
+ 8000f58:	b082      	sub	sp, #8
+ 8000f5a:	af00      	add	r7, sp, #0
+ 8000f5c:	6078      	str	r0, [r7, #4]
   SET_BIT(USARTx->CR1, USART_CR1_UE);
- 800142a:	687b      	ldr	r3, [r7, #4]
- 800142c:	681b      	ldr	r3, [r3, #0]
- 800142e:	2201      	movs	r2, #1
- 8001430:	431a      	orrs	r2, r3
- 8001432:	687b      	ldr	r3, [r7, #4]
- 8001434:	601a      	str	r2, [r3, #0]
+ 8000f5e:	687b      	ldr	r3, [r7, #4]
+ 8000f60:	681b      	ldr	r3, [r3, #0]
+ 8000f62:	2201      	movs	r2, #1
+ 8000f64:	431a      	orrs	r2, r3
+ 8000f66:	687b      	ldr	r3, [r7, #4]
+ 8000f68:	601a      	str	r2, [r3, #0]
 }
- 8001436:	46c0      	nop			; (mov r8, r8)
- 8001438:	46bd      	mov	sp, r7
- 800143a:	b002      	add	sp, #8
- 800143c:	bd80      	pop	{r7, pc}
+ 8000f6a:	46c0      	nop			; (mov r8, r8)
+ 8000f6c:	46bd      	mov	sp, r7
+ 8000f6e:	b002      	add	sp, #8
+ 8000f70:	bd80      	pop	{r7, pc}
 
-0800143e <LL_USART_Disable>:
+08000f72 <LL_USART_Disable>:
   * @rmtoll CR1          UE            LL_USART_Disable
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
 {
- 800143e:	b580      	push	{r7, lr}
- 8001440:	b082      	sub	sp, #8
- 8001442:	af00      	add	r7, sp, #0
- 8001444:	6078      	str	r0, [r7, #4]
+ 8000f72:	b580      	push	{r7, lr}
+ 8000f74:	b082      	sub	sp, #8
+ 8000f76:	af00      	add	r7, sp, #0
+ 8000f78:	6078      	str	r0, [r7, #4]
   CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
- 8001446:	687b      	ldr	r3, [r7, #4]
- 8001448:	681b      	ldr	r3, [r3, #0]
- 800144a:	2201      	movs	r2, #1
- 800144c:	4393      	bics	r3, r2
- 800144e:	001a      	movs	r2, r3
- 8001450:	687b      	ldr	r3, [r7, #4]
- 8001452:	601a      	str	r2, [r3, #0]
+ 8000f7a:	687b      	ldr	r3, [r7, #4]
+ 8000f7c:	681b      	ldr	r3, [r3, #0]
+ 8000f7e:	2201      	movs	r2, #1
+ 8000f80:	4393      	bics	r3, r2
+ 8000f82:	001a      	movs	r2, r3
+ 8000f84:	687b      	ldr	r3, [r7, #4]
+ 8000f86:	601a      	str	r2, [r3, #0]
 }
- 8001454:	46c0      	nop			; (mov r8, r8)
- 8001456:	46bd      	mov	sp, r7
- 8001458:	b002      	add	sp, #8
- 800145a:	bd80      	pop	{r7, pc}
+ 8000f88:	46c0      	nop			; (mov r8, r8)
+ 8000f8a:	46bd      	mov	sp, r7
+ 8000f8c:	b002      	add	sp, #8
+ 8000f8e:	bd80      	pop	{r7, pc}
 
-0800145c <LL_USART_EnableDirectionRx>:
+08000f90 <LL_USART_EnableDirectionRx>:
   * @rmtoll CR1          RE            LL_USART_EnableDirectionRx
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
 {
- 800145c:	b580      	push	{r7, lr}
- 800145e:	b086      	sub	sp, #24
- 8001460:	af00      	add	r7, sp, #0
- 8001462:	6078      	str	r0, [r7, #4]
+ 8000f90:	b580      	push	{r7, lr}
+ 8000f92:	b086      	sub	sp, #24
+ 8000f94:	af00      	add	r7, sp, #0
+ 8000f96:	6078      	str	r0, [r7, #4]
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8001464:	f3ef 8310 	mrs	r3, PRIMASK
- 8001468:	60bb      	str	r3, [r7, #8]
+ 8000f98:	f3ef 8310 	mrs	r3, PRIMASK
+ 8000f9c:	60bb      	str	r3, [r7, #8]
   return(result);
- 800146a:	68bb      	ldr	r3, [r7, #8]
+ 8000f9e:	68bb      	ldr	r3, [r7, #8]
   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE);
- 800146c:	617b      	str	r3, [r7, #20]
- 800146e:	2301      	movs	r3, #1
- 8001470:	60fb      	str	r3, [r7, #12]
+ 8000fa0:	617b      	str	r3, [r7, #20]
+ 8000fa2:	2301      	movs	r3, #1
+ 8000fa4:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8001472:	68fb      	ldr	r3, [r7, #12]
- 8001474:	f383 8810 	msr	PRIMASK, r3
+ 8000fa6:	68fb      	ldr	r3, [r7, #12]
+ 8000fa8:	f383 8810 	msr	PRIMASK, r3
 }
- 8001478:	46c0      	nop			; (mov r8, r8)
- 800147a:	687b      	ldr	r3, [r7, #4]
- 800147c:	681b      	ldr	r3, [r3, #0]
- 800147e:	2204      	movs	r2, #4
- 8001480:	431a      	orrs	r2, r3
- 8001482:	687b      	ldr	r3, [r7, #4]
- 8001484:	601a      	str	r2, [r3, #0]
- 8001486:	697b      	ldr	r3, [r7, #20]
- 8001488:	613b      	str	r3, [r7, #16]
+ 8000fac:	46c0      	nop			; (mov r8, r8)
+ 8000fae:	687b      	ldr	r3, [r7, #4]
+ 8000fb0:	681b      	ldr	r3, [r3, #0]
+ 8000fb2:	2204      	movs	r2, #4
+ 8000fb4:	431a      	orrs	r2, r3
+ 8000fb6:	687b      	ldr	r3, [r7, #4]
+ 8000fb8:	601a      	str	r2, [r3, #0]
+ 8000fba:	697b      	ldr	r3, [r7, #20]
+ 8000fbc:	613b      	str	r3, [r7, #16]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 800148a:	693b      	ldr	r3, [r7, #16]
- 800148c:	f383 8810 	msr	PRIMASK, r3
+ 8000fbe:	693b      	ldr	r3, [r7, #16]
+ 8000fc0:	f383 8810 	msr	PRIMASK, r3
 }
- 8001490:	46c0      	nop			; (mov r8, r8)
+ 8000fc4:	46c0      	nop			; (mov r8, r8)
 }
- 8001492:	46c0      	nop			; (mov r8, r8)
- 8001494:	46bd      	mov	sp, r7
- 8001496:	b006      	add	sp, #24
- 8001498:	bd80      	pop	{r7, pc}
+ 8000fc6:	46c0      	nop			; (mov r8, r8)
+ 8000fc8:	46bd      	mov	sp, r7
+ 8000fca:	b006      	add	sp, #24
+ 8000fcc:	bd80      	pop	{r7, pc}
 
-0800149a <LL_USART_EnableDirectionTx>:
+08000fce <LL_USART_EnableDirectionTx>:
   * @rmtoll CR1          TE            LL_USART_EnableDirectionTx
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
 {
- 800149a:	b580      	push	{r7, lr}
- 800149c:	b086      	sub	sp, #24
- 800149e:	af00      	add	r7, sp, #0
- 80014a0:	6078      	str	r0, [r7, #4]
+ 8000fce:	b580      	push	{r7, lr}
+ 8000fd0:	b086      	sub	sp, #24
+ 8000fd2:	af00      	add	r7, sp, #0
+ 8000fd4:	6078      	str	r0, [r7, #4]
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 80014a2:	f3ef 8310 	mrs	r3, PRIMASK
- 80014a6:	60bb      	str	r3, [r7, #8]
+ 8000fd6:	f3ef 8310 	mrs	r3, PRIMASK
+ 8000fda:	60bb      	str	r3, [r7, #8]
   return(result);
- 80014a8:	68bb      	ldr	r3, [r7, #8]
+ 8000fdc:	68bb      	ldr	r3, [r7, #8]
   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE);
- 80014aa:	617b      	str	r3, [r7, #20]
- 80014ac:	2301      	movs	r3, #1
- 80014ae:	60fb      	str	r3, [r7, #12]
+ 8000fde:	617b      	str	r3, [r7, #20]
+ 8000fe0:	2301      	movs	r3, #1
+ 8000fe2:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 80014b0:	68fb      	ldr	r3, [r7, #12]
- 80014b2:	f383 8810 	msr	PRIMASK, r3
+ 8000fe4:	68fb      	ldr	r3, [r7, #12]
+ 8000fe6:	f383 8810 	msr	PRIMASK, r3
 }
- 80014b6:	46c0      	nop			; (mov r8, r8)
- 80014b8:	687b      	ldr	r3, [r7, #4]
- 80014ba:	681b      	ldr	r3, [r3, #0]
- 80014bc:	2208      	movs	r2, #8
- 80014be:	431a      	orrs	r2, r3
- 80014c0:	687b      	ldr	r3, [r7, #4]
- 80014c2:	601a      	str	r2, [r3, #0]
- 80014c4:	697b      	ldr	r3, [r7, #20]
- 80014c6:	613b      	str	r3, [r7, #16]
+ 8000fea:	46c0      	nop			; (mov r8, r8)
+ 8000fec:	687b      	ldr	r3, [r7, #4]
+ 8000fee:	681b      	ldr	r3, [r3, #0]
+ 8000ff0:	2208      	movs	r2, #8
+ 8000ff2:	431a      	orrs	r2, r3
+ 8000ff4:	687b      	ldr	r3, [r7, #4]
+ 8000ff6:	601a      	str	r2, [r3, #0]
+ 8000ff8:	697b      	ldr	r3, [r7, #20]
+ 8000ffa:	613b      	str	r3, [r7, #16]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 80014c8:	693b      	ldr	r3, [r7, #16]
- 80014ca:	f383 8810 	msr	PRIMASK, r3
+ 8000ffc:	693b      	ldr	r3, [r7, #16]
+ 8000ffe:	f383 8810 	msr	PRIMASK, r3
 }
- 80014ce:	46c0      	nop			; (mov r8, r8)
+ 8001002:	46c0      	nop			; (mov r8, r8)
 }
- 80014d0:	46c0      	nop			; (mov r8, r8)
- 80014d2:	46bd      	mov	sp, r7
- 80014d4:	b006      	add	sp, #24
- 80014d6:	bd80      	pop	{r7, pc}
+ 8001004:	46c0      	nop			; (mov r8, r8)
+ 8001006:	46bd      	mov	sp, r7
+ 8001008:	b006      	add	sp, #24
+ 800100a:	bd80      	pop	{r7, pc}
 
-080014d8 <LL_USART_SetBaudRate>:
+0800100c <LL_USART_SetBaudRate>:
   * @param  BaudRate Baud Rate
   * @retval None
   */
 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
                                           uint32_t BaudRate)
 {
- 80014d8:	b580      	push	{r7, lr}
- 80014da:	b086      	sub	sp, #24
- 80014dc:	af00      	add	r7, sp, #0
- 80014de:	60f8      	str	r0, [r7, #12]
- 80014e0:	60b9      	str	r1, [r7, #8]
- 80014e2:	607a      	str	r2, [r7, #4]
- 80014e4:	603b      	str	r3, [r7, #0]
+ 800100c:	b580      	push	{r7, lr}
+ 800100e:	b086      	sub	sp, #24
+ 8001010:	af00      	add	r7, sp, #0
+ 8001012:	60f8      	str	r0, [r7, #12]
+ 8001014:	60b9      	str	r1, [r7, #8]
+ 8001016:	607a      	str	r2, [r7, #4]
+ 8001018:	603b      	str	r3, [r7, #0]
   uint32_t usartdiv;
   uint32_t brrtemp;
 
   if (OverSampling == LL_USART_OVERSAMPLING_8)
- 80014e6:	687a      	ldr	r2, [r7, #4]
- 80014e8:	2380      	movs	r3, #128	; 0x80
- 80014ea:	021b      	lsls	r3, r3, #8
- 80014ec:	429a      	cmp	r2, r3
- 80014ee:	d11c      	bne.n	800152a <LL_USART_SetBaudRate+0x52>
+ 800101a:	687a      	ldr	r2, [r7, #4]
+ 800101c:	2380      	movs	r3, #128	; 0x80
+ 800101e:	021b      	lsls	r3, r3, #8
+ 8001020:	429a      	cmp	r2, r3
+ 8001022:	d11c      	bne.n	800105e <LL_USART_SetBaudRate+0x52>
   {
     usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
- 80014f0:	68bb      	ldr	r3, [r7, #8]
- 80014f2:	005a      	lsls	r2, r3, #1
- 80014f4:	683b      	ldr	r3, [r7, #0]
- 80014f6:	085b      	lsrs	r3, r3, #1
- 80014f8:	18d3      	adds	r3, r2, r3
- 80014fa:	6839      	ldr	r1, [r7, #0]
- 80014fc:	0018      	movs	r0, r3
- 80014fe:	f7fe fe0b 	bl	8000118 <__udivsi3>
- 8001502:	0003      	movs	r3, r0
- 8001504:	b29b      	uxth	r3, r3
- 8001506:	617b      	str	r3, [r7, #20]
+ 8001024:	68bb      	ldr	r3, [r7, #8]
+ 8001026:	005a      	lsls	r2, r3, #1
+ 8001028:	683b      	ldr	r3, [r7, #0]
+ 800102a:	085b      	lsrs	r3, r3, #1
+ 800102c:	18d3      	adds	r3, r2, r3
+ 800102e:	6839      	ldr	r1, [r7, #0]
+ 8001030:	0018      	movs	r0, r3
+ 8001032:	f7ff f871 	bl	8000118 <__udivsi3>
+ 8001036:	0003      	movs	r3, r0
+ 8001038:	b29b      	uxth	r3, r3
+ 800103a:	617b      	str	r3, [r7, #20]
     brrtemp = usartdiv & 0xFFF0U;
- 8001508:	697b      	ldr	r3, [r7, #20]
- 800150a:	4a10      	ldr	r2, [pc, #64]	; (800154c <LL_USART_SetBaudRate+0x74>)
- 800150c:	4013      	ands	r3, r2
- 800150e:	613b      	str	r3, [r7, #16]
+ 800103c:	697b      	ldr	r3, [r7, #20]
+ 800103e:	4a10      	ldr	r2, [pc, #64]	; (8001080 <LL_USART_SetBaudRate+0x74>)
+ 8001040:	4013      	ands	r3, r2
+ 8001042:	613b      	str	r3, [r7, #16]
     brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
- 8001510:	697b      	ldr	r3, [r7, #20]
- 8001512:	085b      	lsrs	r3, r3, #1
- 8001514:	b29b      	uxth	r3, r3
- 8001516:	001a      	movs	r2, r3
- 8001518:	2307      	movs	r3, #7
- 800151a:	4013      	ands	r3, r2
- 800151c:	693a      	ldr	r2, [r7, #16]
- 800151e:	4313      	orrs	r3, r2
- 8001520:	613b      	str	r3, [r7, #16]
+ 8001044:	697b      	ldr	r3, [r7, #20]
+ 8001046:	085b      	lsrs	r3, r3, #1
+ 8001048:	b29b      	uxth	r3, r3
+ 800104a:	001a      	movs	r2, r3
+ 800104c:	2307      	movs	r3, #7
+ 800104e:	4013      	ands	r3, r2
+ 8001050:	693a      	ldr	r2, [r7, #16]
+ 8001052:	4313      	orrs	r3, r2
+ 8001054:	613b      	str	r3, [r7, #16]
     USARTx->BRR = brrtemp;
- 8001522:	68fb      	ldr	r3, [r7, #12]
- 8001524:	693a      	ldr	r2, [r7, #16]
- 8001526:	60da      	str	r2, [r3, #12]
+ 8001056:	68fb      	ldr	r3, [r7, #12]
+ 8001058:	693a      	ldr	r2, [r7, #16]
+ 800105a:	60da      	str	r2, [r3, #12]
   }
   else
   {
     USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
   }
 }
- 8001528:	e00c      	b.n	8001544 <LL_USART_SetBaudRate+0x6c>
+ 800105c:	e00c      	b.n	8001078 <LL_USART_SetBaudRate+0x6c>
     USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
- 800152a:	683b      	ldr	r3, [r7, #0]
- 800152c:	085a      	lsrs	r2, r3, #1
- 800152e:	68bb      	ldr	r3, [r7, #8]
- 8001530:	18d3      	adds	r3, r2, r3
- 8001532:	6839      	ldr	r1, [r7, #0]
- 8001534:	0018      	movs	r0, r3
- 8001536:	f7fe fdef 	bl	8000118 <__udivsi3>
- 800153a:	0003      	movs	r3, r0
- 800153c:	b29b      	uxth	r3, r3
- 800153e:	001a      	movs	r2, r3
- 8001540:	68fb      	ldr	r3, [r7, #12]
- 8001542:	60da      	str	r2, [r3, #12]
+ 800105e:	683b      	ldr	r3, [r7, #0]
+ 8001060:	085a      	lsrs	r2, r3, #1
+ 8001062:	68bb      	ldr	r3, [r7, #8]
+ 8001064:	18d3      	adds	r3, r2, r3
+ 8001066:	6839      	ldr	r1, [r7, #0]
+ 8001068:	0018      	movs	r0, r3
+ 800106a:	f7ff f855 	bl	8000118 <__udivsi3>
+ 800106e:	0003      	movs	r3, r0
+ 8001070:	b29b      	uxth	r3, r3
+ 8001072:	001a      	movs	r2, r3
+ 8001074:	68fb      	ldr	r3, [r7, #12]
+ 8001076:	60da      	str	r2, [r3, #12]
 }
- 8001544:	46c0      	nop			; (mov r8, r8)
- 8001546:	46bd      	mov	sp, r7
- 8001548:	b006      	add	sp, #24
- 800154a:	bd80      	pop	{r7, pc}
- 800154c:	0000fff0 	.word	0x0000fff0
+ 8001078:	46c0      	nop			; (mov r8, r8)
+ 800107a:	46bd      	mov	sp, r7
+ 800107c:	b006      	add	sp, #24
+ 800107e:	bd80      	pop	{r7, pc}
+ 8001080:	0000fff0 	.word	0x0000fff0
 
-08001550 <LL_USART_GetBaudRate>:
+08001084 <LL_USART_GetBaudRate>:
   *         @arg @ref LL_USART_OVERSAMPLING_16
   *         @arg @ref LL_USART_OVERSAMPLING_8
   * @retval Baud Rate
   */
 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
 {
- 8001550:	b580      	push	{r7, lr}
- 8001552:	b086      	sub	sp, #24
- 8001554:	af00      	add	r7, sp, #0
- 8001556:	60f8      	str	r0, [r7, #12]
- 8001558:	60b9      	str	r1, [r7, #8]
- 800155a:	607a      	str	r2, [r7, #4]
+ 8001084:	b580      	push	{r7, lr}
+ 8001086:	b086      	sub	sp, #24
+ 8001088:	af00      	add	r7, sp, #0
+ 800108a:	60f8      	str	r0, [r7, #12]
+ 800108c:	60b9      	str	r1, [r7, #8]
+ 800108e:	607a      	str	r2, [r7, #4]
   uint32_t usartdiv;
   uint32_t brrresult = 0x0U;
- 800155c:	2300      	movs	r3, #0
- 800155e:	617b      	str	r3, [r7, #20]
+ 8001090:	2300      	movs	r3, #0
+ 8001092:	617b      	str	r3, [r7, #20]
 
   usartdiv = USARTx->BRR;
- 8001560:	68fb      	ldr	r3, [r7, #12]
- 8001562:	68db      	ldr	r3, [r3, #12]
- 8001564:	613b      	str	r3, [r7, #16]
+ 8001094:	68fb      	ldr	r3, [r7, #12]
+ 8001096:	68db      	ldr	r3, [r3, #12]
+ 8001098:	613b      	str	r3, [r7, #16]
 
   if (usartdiv == 0U)
- 8001566:	693b      	ldr	r3, [r7, #16]
- 8001568:	2b00      	cmp	r3, #0
- 800156a:	d029      	beq.n	80015c0 <LL_USART_GetBaudRate+0x70>
+ 800109a:	693b      	ldr	r3, [r7, #16]
+ 800109c:	2b00      	cmp	r3, #0
+ 800109e:	d029      	beq.n	80010f4 <LL_USART_GetBaudRate+0x70>
   {
     /* Do not perform a division by 0 */
   }
   else if (OverSampling == LL_USART_OVERSAMPLING_8)
- 800156c:	687a      	ldr	r2, [r7, #4]
- 800156e:	2380      	movs	r3, #128	; 0x80
- 8001570:	021b      	lsls	r3, r3, #8
- 8001572:	429a      	cmp	r2, r3
- 8001574:	d11a      	bne.n	80015ac <LL_USART_GetBaudRate+0x5c>
+ 80010a0:	687a      	ldr	r2, [r7, #4]
+ 80010a2:	2380      	movs	r3, #128	; 0x80
+ 80010a4:	021b      	lsls	r3, r3, #8
+ 80010a6:	429a      	cmp	r2, r3
+ 80010a8:	d11a      	bne.n	80010e0 <LL_USART_GetBaudRate+0x5c>
   {
     usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
- 8001576:	693b      	ldr	r3, [r7, #16]
- 8001578:	b29b      	uxth	r3, r3
- 800157a:	220f      	movs	r2, #15
- 800157c:	4393      	bics	r3, r2
- 800157e:	b29a      	uxth	r2, r3
- 8001580:	693b      	ldr	r3, [r7, #16]
- 8001582:	b29b      	uxth	r3, r3
- 8001584:	18db      	adds	r3, r3, r3
- 8001586:	b29b      	uxth	r3, r3
- 8001588:	210e      	movs	r1, #14
- 800158a:	400b      	ands	r3, r1
- 800158c:	b29b      	uxth	r3, r3
- 800158e:	4313      	orrs	r3, r2
- 8001590:	b29b      	uxth	r3, r3
- 8001592:	613b      	str	r3, [r7, #16]
+ 80010aa:	693b      	ldr	r3, [r7, #16]
+ 80010ac:	b29b      	uxth	r3, r3
+ 80010ae:	220f      	movs	r2, #15
+ 80010b0:	4393      	bics	r3, r2
+ 80010b2:	b29a      	uxth	r2, r3
+ 80010b4:	693b      	ldr	r3, [r7, #16]
+ 80010b6:	b29b      	uxth	r3, r3
+ 80010b8:	18db      	adds	r3, r3, r3
+ 80010ba:	b29b      	uxth	r3, r3
+ 80010bc:	210e      	movs	r1, #14
+ 80010be:	400b      	ands	r3, r1
+ 80010c0:	b29b      	uxth	r3, r3
+ 80010c2:	4313      	orrs	r3, r2
+ 80010c4:	b29b      	uxth	r3, r3
+ 80010c6:	613b      	str	r3, [r7, #16]
     if (usartdiv != 0U)
- 8001594:	693b      	ldr	r3, [r7, #16]
- 8001596:	2b00      	cmp	r3, #0
- 8001598:	d012      	beq.n	80015c0 <LL_USART_GetBaudRate+0x70>
+ 80010c8:	693b      	ldr	r3, [r7, #16]
+ 80010ca:	2b00      	cmp	r3, #0
+ 80010cc:	d012      	beq.n	80010f4 <LL_USART_GetBaudRate+0x70>
     {
       brrresult = (PeriphClk * 2U) / usartdiv;
- 800159a:	68bb      	ldr	r3, [r7, #8]
- 800159c:	005b      	lsls	r3, r3, #1
- 800159e:	6939      	ldr	r1, [r7, #16]
- 80015a0:	0018      	movs	r0, r3
- 80015a2:	f7fe fdb9 	bl	8000118 <__udivsi3>
- 80015a6:	0003      	movs	r3, r0
- 80015a8:	617b      	str	r3, [r7, #20]
- 80015aa:	e009      	b.n	80015c0 <LL_USART_GetBaudRate+0x70>
+ 80010ce:	68bb      	ldr	r3, [r7, #8]
+ 80010d0:	005b      	lsls	r3, r3, #1
+ 80010d2:	6939      	ldr	r1, [r7, #16]
+ 80010d4:	0018      	movs	r0, r3
+ 80010d6:	f7ff f81f 	bl	8000118 <__udivsi3>
+ 80010da:	0003      	movs	r3, r0
+ 80010dc:	617b      	str	r3, [r7, #20]
+ 80010de:	e009      	b.n	80010f4 <LL_USART_GetBaudRate+0x70>
     }
   }
   else
   {
     if ((usartdiv & 0xFFFFU) != 0U)
- 80015ac:	693b      	ldr	r3, [r7, #16]
- 80015ae:	041b      	lsls	r3, r3, #16
- 80015b0:	0c1b      	lsrs	r3, r3, #16
- 80015b2:	d005      	beq.n	80015c0 <LL_USART_GetBaudRate+0x70>
+ 80010e0:	693b      	ldr	r3, [r7, #16]
+ 80010e2:	041b      	lsls	r3, r3, #16
+ 80010e4:	0c1b      	lsrs	r3, r3, #16
+ 80010e6:	d005      	beq.n	80010f4 <LL_USART_GetBaudRate+0x70>
     {
       brrresult = PeriphClk / usartdiv;
- 80015b4:	6939      	ldr	r1, [r7, #16]
- 80015b6:	68b8      	ldr	r0, [r7, #8]
- 80015b8:	f7fe fdae 	bl	8000118 <__udivsi3>
- 80015bc:	0003      	movs	r3, r0
- 80015be:	617b      	str	r3, [r7, #20]
+ 80010e8:	6939      	ldr	r1, [r7, #16]
+ 80010ea:	68b8      	ldr	r0, [r7, #8]
+ 80010ec:	f7ff f814 	bl	8000118 <__udivsi3>
+ 80010f0:	0003      	movs	r3, r0
+ 80010f2:	617b      	str	r3, [r7, #20]
     }
   }
   return (brrresult);
- 80015c0:	697b      	ldr	r3, [r7, #20]
+ 80010f4:	697b      	ldr	r3, [r7, #20]
 }
- 80015c2:	0018      	movs	r0, r3
- 80015c4:	46bd      	mov	sp, r7
- 80015c6:	b006      	add	sp, #24
- 80015c8:	bd80      	pop	{r7, pc}
+ 80010f6:	0018      	movs	r0, r3
+ 80010f8:	46bd      	mov	sp, r7
+ 80010fa:	b006      	add	sp, #24
+ 80010fc:	bd80      	pop	{r7, pc}
 	...
 
-080015cc <LL_USART_SetDEDeassertionTime>:
+08001100 <LL_USART_SetDEDeassertionTime>:
   * @param  USARTx USART Instance
   * @param  Time Value between Min_Data=0 and Max_Data=31
   * @retval None
   */
 __STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time)
 {
- 80015cc:	b580      	push	{r7, lr}
- 80015ce:	b082      	sub	sp, #8
- 80015d0:	af00      	add	r7, sp, #0
- 80015d2:	6078      	str	r0, [r7, #4]
- 80015d4:	6039      	str	r1, [r7, #0]
+ 8001100:	b580      	push	{r7, lr}
+ 8001102:	b082      	sub	sp, #8
+ 8001104:	af00      	add	r7, sp, #0
+ 8001106:	6078      	str	r0, [r7, #4]
+ 8001108:	6039      	str	r1, [r7, #0]
   MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
- 80015d6:	687b      	ldr	r3, [r7, #4]
- 80015d8:	681b      	ldr	r3, [r3, #0]
- 80015da:	4a05      	ldr	r2, [pc, #20]	; (80015f0 <LL_USART_SetDEDeassertionTime+0x24>)
- 80015dc:	401a      	ands	r2, r3
- 80015de:	683b      	ldr	r3, [r7, #0]
- 80015e0:	041b      	lsls	r3, r3, #16
- 80015e2:	431a      	orrs	r2, r3
- 80015e4:	687b      	ldr	r3, [r7, #4]
- 80015e6:	601a      	str	r2, [r3, #0]
+ 800110a:	687b      	ldr	r3, [r7, #4]
+ 800110c:	681b      	ldr	r3, [r3, #0]
+ 800110e:	4a05      	ldr	r2, [pc, #20]	; (8001124 <LL_USART_SetDEDeassertionTime+0x24>)
+ 8001110:	401a      	ands	r2, r3
+ 8001112:	683b      	ldr	r3, [r7, #0]
+ 8001114:	041b      	lsls	r3, r3, #16
+ 8001116:	431a      	orrs	r2, r3
+ 8001118:	687b      	ldr	r3, [r7, #4]
+ 800111a:	601a      	str	r2, [r3, #0]
 }
- 80015e8:	46c0      	nop			; (mov r8, r8)
- 80015ea:	46bd      	mov	sp, r7
- 80015ec:	b002      	add	sp, #8
- 80015ee:	bd80      	pop	{r7, pc}
- 80015f0:	ffe0ffff 	.word	0xffe0ffff
+ 800111c:	46c0      	nop			; (mov r8, r8)
+ 800111e:	46bd      	mov	sp, r7
+ 8001120:	b002      	add	sp, #8
+ 8001122:	bd80      	pop	{r7, pc}
+ 8001124:	ffe0ffff 	.word	0xffe0ffff
 
-080015f4 <LL_USART_SetDEAssertionTime>:
+08001128 <LL_USART_SetDEAssertionTime>:
   * @param  USARTx USART Instance
   * @param  Time Value between Min_Data=0 and Max_Data=31
   * @retval None
   */
 __STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
 {
- 80015f4:	b580      	push	{r7, lr}
- 80015f6:	b082      	sub	sp, #8
- 80015f8:	af00      	add	r7, sp, #0
- 80015fa:	6078      	str	r0, [r7, #4]
- 80015fc:	6039      	str	r1, [r7, #0]
+ 8001128:	b580      	push	{r7, lr}
+ 800112a:	b082      	sub	sp, #8
+ 800112c:	af00      	add	r7, sp, #0
+ 800112e:	6078      	str	r0, [r7, #4]
+ 8001130:	6039      	str	r1, [r7, #0]
   MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
- 80015fe:	687b      	ldr	r3, [r7, #4]
- 8001600:	681b      	ldr	r3, [r3, #0]
- 8001602:	4a05      	ldr	r2, [pc, #20]	; (8001618 <LL_USART_SetDEAssertionTime+0x24>)
- 8001604:	401a      	ands	r2, r3
- 8001606:	683b      	ldr	r3, [r7, #0]
- 8001608:	055b      	lsls	r3, r3, #21
- 800160a:	431a      	orrs	r2, r3
- 800160c:	687b      	ldr	r3, [r7, #4]
- 800160e:	601a      	str	r2, [r3, #0]
+ 8001132:	687b      	ldr	r3, [r7, #4]
+ 8001134:	681b      	ldr	r3, [r3, #0]
+ 8001136:	4a05      	ldr	r2, [pc, #20]	; (800114c <LL_USART_SetDEAssertionTime+0x24>)
+ 8001138:	401a      	ands	r2, r3
+ 800113a:	683b      	ldr	r3, [r7, #0]
+ 800113c:	055b      	lsls	r3, r3, #21
+ 800113e:	431a      	orrs	r2, r3
+ 8001140:	687b      	ldr	r3, [r7, #4]
+ 8001142:	601a      	str	r2, [r3, #0]
 }
- 8001610:	46c0      	nop			; (mov r8, r8)
- 8001612:	46bd      	mov	sp, r7
- 8001614:	b002      	add	sp, #8
- 8001616:	bd80      	pop	{r7, pc}
- 8001618:	fc1fffff 	.word	0xfc1fffff
+ 8001144:	46c0      	nop			; (mov r8, r8)
+ 8001146:	46bd      	mov	sp, r7
+ 8001148:	b002      	add	sp, #8
+ 800114a:	bd80      	pop	{r7, pc}
+ 800114c:	fc1fffff 	.word	0xfc1fffff
 
-0800161c <LL_USART_EnableDEMode>:
+08001150 <LL_USART_EnableDEMode>:
   * @rmtoll CR3          DEM           LL_USART_EnableDEMode
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx)
 {
- 800161c:	b580      	push	{r7, lr}
- 800161e:	b082      	sub	sp, #8
- 8001620:	af00      	add	r7, sp, #0
- 8001622:	6078      	str	r0, [r7, #4]
+ 8001150:	b580      	push	{r7, lr}
+ 8001152:	b082      	sub	sp, #8
+ 8001154:	af00      	add	r7, sp, #0
+ 8001156:	6078      	str	r0, [r7, #4]
   SET_BIT(USARTx->CR3, USART_CR3_DEM);
- 8001624:	687b      	ldr	r3, [r7, #4]
- 8001626:	689b      	ldr	r3, [r3, #8]
- 8001628:	2280      	movs	r2, #128	; 0x80
- 800162a:	01d2      	lsls	r2, r2, #7
- 800162c:	431a      	orrs	r2, r3
- 800162e:	687b      	ldr	r3, [r7, #4]
- 8001630:	609a      	str	r2, [r3, #8]
+ 8001158:	687b      	ldr	r3, [r7, #4]
+ 800115a:	689b      	ldr	r3, [r3, #8]
+ 800115c:	2280      	movs	r2, #128	; 0x80
+ 800115e:	01d2      	lsls	r2, r2, #7
+ 8001160:	431a      	orrs	r2, r3
+ 8001162:	687b      	ldr	r3, [r7, #4]
+ 8001164:	609a      	str	r2, [r3, #8]
 }
- 8001632:	46c0      	nop			; (mov r8, r8)
- 8001634:	46bd      	mov	sp, r7
- 8001636:	b002      	add	sp, #8
- 8001638:	bd80      	pop	{r7, pc}
+ 8001166:	46c0      	nop			; (mov r8, r8)
+ 8001168:	46bd      	mov	sp, r7
+ 800116a:	b002      	add	sp, #8
+ 800116c:	bd80      	pop	{r7, pc}
 	...
 
-0800163c <LL_USART_SetDESignalPolarity>:
+08001170 <LL_USART_SetDESignalPolarity>:
   *         @arg @ref LL_USART_DE_POLARITY_HIGH
   *         @arg @ref LL_USART_DE_POLARITY_LOW
   * @retval None
   */
 __STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
 {
- 800163c:	b580      	push	{r7, lr}
- 800163e:	b082      	sub	sp, #8
- 8001640:	af00      	add	r7, sp, #0
- 8001642:	6078      	str	r0, [r7, #4]
- 8001644:	6039      	str	r1, [r7, #0]
+ 8001170:	b580      	push	{r7, lr}
+ 8001172:	b082      	sub	sp, #8
+ 8001174:	af00      	add	r7, sp, #0
+ 8001176:	6078      	str	r0, [r7, #4]
+ 8001178:	6039      	str	r1, [r7, #0]
   MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);
- 8001646:	687b      	ldr	r3, [r7, #4]
- 8001648:	689b      	ldr	r3, [r3, #8]
- 800164a:	4a05      	ldr	r2, [pc, #20]	; (8001660 <LL_USART_SetDESignalPolarity+0x24>)
- 800164c:	401a      	ands	r2, r3
- 800164e:	683b      	ldr	r3, [r7, #0]
- 8001650:	431a      	orrs	r2, r3
- 8001652:	687b      	ldr	r3, [r7, #4]
- 8001654:	609a      	str	r2, [r3, #8]
+ 800117a:	687b      	ldr	r3, [r7, #4]
+ 800117c:	689b      	ldr	r3, [r3, #8]
+ 800117e:	4a05      	ldr	r2, [pc, #20]	; (8001194 <LL_USART_SetDESignalPolarity+0x24>)
+ 8001180:	401a      	ands	r2, r3
+ 8001182:	683b      	ldr	r3, [r7, #0]
+ 8001184:	431a      	orrs	r2, r3
+ 8001186:	687b      	ldr	r3, [r7, #4]
+ 8001188:	609a      	str	r2, [r3, #8]
 }
- 8001656:	46c0      	nop			; (mov r8, r8)
- 8001658:	46bd      	mov	sp, r7
- 800165a:	b002      	add	sp, #8
- 800165c:	bd80      	pop	{r7, pc}
- 800165e:	46c0      	nop			; (mov r8, r8)
- 8001660:	ffff7fff 	.word	0xffff7fff
+ 800118a:	46c0      	nop			; (mov r8, r8)
+ 800118c:	46bd      	mov	sp, r7
+ 800118e:	b002      	add	sp, #8
+ 8001190:	bd80      	pop	{r7, pc}
+ 8001192:	46c0      	nop			; (mov r8, r8)
+ 8001194:	ffff7fff 	.word	0xffff7fff
 
-08001664 <LL_USART_ConfigAsyncMode>:
+08001198 <LL_USART_ConfigAsyncMode>:
   *         CR3          HDSEL         LL_USART_ConfigAsyncMode
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
 {
- 8001664:	b580      	push	{r7, lr}
- 8001666:	b082      	sub	sp, #8
- 8001668:	af00      	add	r7, sp, #0
- 800166a:	6078      	str	r0, [r7, #4]
+ 8001198:	b580      	push	{r7, lr}
+ 800119a:	b082      	sub	sp, #8
+ 800119c:	af00      	add	r7, sp, #0
+ 800119e:	6078      	str	r0, [r7, #4]
   /* In Asynchronous mode, the following bits must be kept cleared:
   - LINEN, CLKEN bits in the USART_CR2 register,
   - SCEN, IREN and HDSEL bits in the USART_CR3 register.
   */
   CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- 800166c:	687b      	ldr	r3, [r7, #4]
- 800166e:	685b      	ldr	r3, [r3, #4]
- 8001670:	4a07      	ldr	r2, [pc, #28]	; (8001690 <LL_USART_ConfigAsyncMode+0x2c>)
- 8001672:	401a      	ands	r2, r3
- 8001674:	687b      	ldr	r3, [r7, #4]
- 8001676:	605a      	str	r2, [r3, #4]
+ 80011a0:	687b      	ldr	r3, [r7, #4]
+ 80011a2:	685b      	ldr	r3, [r3, #4]
+ 80011a4:	4a07      	ldr	r2, [pc, #28]	; (80011c4 <LL_USART_ConfigAsyncMode+0x2c>)
+ 80011a6:	401a      	ands	r2, r3
+ 80011a8:	687b      	ldr	r3, [r7, #4]
+ 80011aa:	605a      	str	r2, [r3, #4]
   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
- 8001678:	687b      	ldr	r3, [r7, #4]
- 800167a:	689b      	ldr	r3, [r3, #8]
- 800167c:	222a      	movs	r2, #42	; 0x2a
- 800167e:	4393      	bics	r3, r2
- 8001680:	001a      	movs	r2, r3
- 8001682:	687b      	ldr	r3, [r7, #4]
- 8001684:	609a      	str	r2, [r3, #8]
+ 80011ac:	687b      	ldr	r3, [r7, #4]
+ 80011ae:	689b      	ldr	r3, [r3, #8]
+ 80011b0:	222a      	movs	r2, #42	; 0x2a
+ 80011b2:	4393      	bics	r3, r2
+ 80011b4:	001a      	movs	r2, r3
+ 80011b6:	687b      	ldr	r3, [r7, #4]
+ 80011b8:	609a      	str	r2, [r3, #8]
 }
- 8001686:	46c0      	nop			; (mov r8, r8)
- 8001688:	46bd      	mov	sp, r7
- 800168a:	b002      	add	sp, #8
- 800168c:	bd80      	pop	{r7, pc}
- 800168e:	46c0      	nop			; (mov r8, r8)
- 8001690:	ffffb7ff 	.word	0xffffb7ff
+ 80011ba:	46c0      	nop			; (mov r8, r8)
+ 80011bc:	46bd      	mov	sp, r7
+ 80011be:	b002      	add	sp, #8
+ 80011c0:	bd80      	pop	{r7, pc}
+ 80011c2:	46c0      	nop			; (mov r8, r8)
+ 80011c4:	ffffb7ff 	.word	0xffffb7ff
 
-08001694 <LL_USART_IsActiveFlag_TXE>:
+080011c8 <LL_USART_IsActiveFlag_TXE>:
   * @rmtoll ISR          TXE           LL_USART_IsActiveFlag_TXE
   * @param  USARTx USART Instance
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
 {
- 8001694:	b580      	push	{r7, lr}
- 8001696:	b082      	sub	sp, #8
- 8001698:	af00      	add	r7, sp, #0
- 800169a:	6078      	str	r0, [r7, #4]
+ 80011c8:	b580      	push	{r7, lr}
+ 80011ca:	b082      	sub	sp, #8
+ 80011cc:	af00      	add	r7, sp, #0
+ 80011ce:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
- 800169c:	687b      	ldr	r3, [r7, #4]
- 800169e:	69db      	ldr	r3, [r3, #28]
- 80016a0:	2280      	movs	r2, #128	; 0x80
- 80016a2:	4013      	ands	r3, r2
- 80016a4:	2b80      	cmp	r3, #128	; 0x80
- 80016a6:	d101      	bne.n	80016ac <LL_USART_IsActiveFlag_TXE+0x18>
- 80016a8:	2301      	movs	r3, #1
- 80016aa:	e000      	b.n	80016ae <LL_USART_IsActiveFlag_TXE+0x1a>
- 80016ac:	2300      	movs	r3, #0
+ 80011d0:	687b      	ldr	r3, [r7, #4]
+ 80011d2:	69db      	ldr	r3, [r3, #28]
+ 80011d4:	2280      	movs	r2, #128	; 0x80
+ 80011d6:	4013      	ands	r3, r2
+ 80011d8:	2b80      	cmp	r3, #128	; 0x80
+ 80011da:	d101      	bne.n	80011e0 <LL_USART_IsActiveFlag_TXE+0x18>
+ 80011dc:	2301      	movs	r3, #1
+ 80011de:	e000      	b.n	80011e2 <LL_USART_IsActiveFlag_TXE+0x1a>
+ 80011e0:	2300      	movs	r3, #0
 }
- 80016ae:	0018      	movs	r0, r3
- 80016b0:	46bd      	mov	sp, r7
- 80016b2:	b002      	add	sp, #8
- 80016b4:	bd80      	pop	{r7, pc}
+ 80011e2:	0018      	movs	r0, r3
+ 80011e4:	46bd      	mov	sp, r7
+ 80011e6:	b002      	add	sp, #8
+ 80011e8:	bd80      	pop	{r7, pc}
 
-080016b6 <LL_USART_EnableIT_IDLE>:
+080011ea <LL_USART_EnableIT_IDLE>:
   * @rmtoll CR1          IDLEIE        LL_USART_EnableIT_IDLE
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
 {
- 80016b6:	b580      	push	{r7, lr}
- 80016b8:	b086      	sub	sp, #24
- 80016ba:	af00      	add	r7, sp, #0
- 80016bc:	6078      	str	r0, [r7, #4]
+ 80011ea:	b580      	push	{r7, lr}
+ 80011ec:	b086      	sub	sp, #24
+ 80011ee:	af00      	add	r7, sp, #0
+ 80011f0:	6078      	str	r0, [r7, #4]
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 80016be:	f3ef 8310 	mrs	r3, PRIMASK
- 80016c2:	60bb      	str	r3, [r7, #8]
+ 80011f2:	f3ef 8310 	mrs	r3, PRIMASK
+ 80011f6:	60bb      	str	r3, [r7, #8]
   return(result);
- 80016c4:	68bb      	ldr	r3, [r7, #8]
+ 80011f8:	68bb      	ldr	r3, [r7, #8]
   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
- 80016c6:	617b      	str	r3, [r7, #20]
- 80016c8:	2301      	movs	r3, #1
- 80016ca:	60fb      	str	r3, [r7, #12]
+ 80011fa:	617b      	str	r3, [r7, #20]
+ 80011fc:	2301      	movs	r3, #1
+ 80011fe:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 80016cc:	68fb      	ldr	r3, [r7, #12]
- 80016ce:	f383 8810 	msr	PRIMASK, r3
+ 8001200:	68fb      	ldr	r3, [r7, #12]
+ 8001202:	f383 8810 	msr	PRIMASK, r3
 }
- 80016d2:	46c0      	nop			; (mov r8, r8)
- 80016d4:	687b      	ldr	r3, [r7, #4]
- 80016d6:	681b      	ldr	r3, [r3, #0]
- 80016d8:	2210      	movs	r2, #16
- 80016da:	431a      	orrs	r2, r3
- 80016dc:	687b      	ldr	r3, [r7, #4]
- 80016de:	601a      	str	r2, [r3, #0]
- 80016e0:	697b      	ldr	r3, [r7, #20]
- 80016e2:	613b      	str	r3, [r7, #16]
+ 8001206:	46c0      	nop			; (mov r8, r8)
+ 8001208:	687b      	ldr	r3, [r7, #4]
+ 800120a:	681b      	ldr	r3, [r3, #0]
+ 800120c:	2210      	movs	r2, #16
+ 800120e:	431a      	orrs	r2, r3
+ 8001210:	687b      	ldr	r3, [r7, #4]
+ 8001212:	601a      	str	r2, [r3, #0]
+ 8001214:	697b      	ldr	r3, [r7, #20]
+ 8001216:	613b      	str	r3, [r7, #16]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 80016e4:	693b      	ldr	r3, [r7, #16]
- 80016e6:	f383 8810 	msr	PRIMASK, r3
+ 8001218:	693b      	ldr	r3, [r7, #16]
+ 800121a:	f383 8810 	msr	PRIMASK, r3
 }
- 80016ea:	46c0      	nop			; (mov r8, r8)
+ 800121e:	46c0      	nop			; (mov r8, r8)
 }
- 80016ec:	46c0      	nop			; (mov r8, r8)
- 80016ee:	46bd      	mov	sp, r7
- 80016f0:	b006      	add	sp, #24
- 80016f2:	bd80      	pop	{r7, pc}
+ 8001220:	46c0      	nop			; (mov r8, r8)
+ 8001222:	46bd      	mov	sp, r7
+ 8001224:	b006      	add	sp, #24
+ 8001226:	bd80      	pop	{r7, pc}
 
-080016f4 <LL_USART_EnableIT_RXNE>:
+08001228 <LL_USART_EnableIT_RXNE>:
   * @rmtoll CR1          RXNEIE        LL_USART_EnableIT_RXNE
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
 {
- 80016f4:	b580      	push	{r7, lr}
- 80016f6:	b086      	sub	sp, #24
- 80016f8:	af00      	add	r7, sp, #0
- 80016fa:	6078      	str	r0, [r7, #4]
+ 8001228:	b580      	push	{r7, lr}
+ 800122a:	b086      	sub	sp, #24
+ 800122c:	af00      	add	r7, sp, #0
+ 800122e:	6078      	str	r0, [r7, #4]
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 80016fc:	f3ef 8310 	mrs	r3, PRIMASK
- 8001700:	60bb      	str	r3, [r7, #8]
+ 8001230:	f3ef 8310 	mrs	r3, PRIMASK
+ 8001234:	60bb      	str	r3, [r7, #8]
   return(result);
- 8001702:	68bb      	ldr	r3, [r7, #8]
+ 8001236:	68bb      	ldr	r3, [r7, #8]
   ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
- 8001704:	617b      	str	r3, [r7, #20]
- 8001706:	2301      	movs	r3, #1
- 8001708:	60fb      	str	r3, [r7, #12]
+ 8001238:	617b      	str	r3, [r7, #20]
+ 800123a:	2301      	movs	r3, #1
+ 800123c:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 800170a:	68fb      	ldr	r3, [r7, #12]
- 800170c:	f383 8810 	msr	PRIMASK, r3
+ 800123e:	68fb      	ldr	r3, [r7, #12]
+ 8001240:	f383 8810 	msr	PRIMASK, r3
 }
- 8001710:	46c0      	nop			; (mov r8, r8)
- 8001712:	687b      	ldr	r3, [r7, #4]
- 8001714:	681b      	ldr	r3, [r3, #0]
- 8001716:	2220      	movs	r2, #32
- 8001718:	431a      	orrs	r2, r3
- 800171a:	687b      	ldr	r3, [r7, #4]
- 800171c:	601a      	str	r2, [r3, #0]
- 800171e:	697b      	ldr	r3, [r7, #20]
- 8001720:	613b      	str	r3, [r7, #16]
+ 8001244:	46c0      	nop			; (mov r8, r8)
+ 8001246:	687b      	ldr	r3, [r7, #4]
+ 8001248:	681b      	ldr	r3, [r3, #0]
+ 800124a:	2220      	movs	r2, #32
+ 800124c:	431a      	orrs	r2, r3
+ 800124e:	687b      	ldr	r3, [r7, #4]
+ 8001250:	601a      	str	r2, [r3, #0]
+ 8001252:	697b      	ldr	r3, [r7, #20]
+ 8001254:	613b      	str	r3, [r7, #16]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8001722:	693b      	ldr	r3, [r7, #16]
- 8001724:	f383 8810 	msr	PRIMASK, r3
+ 8001256:	693b      	ldr	r3, [r7, #16]
+ 8001258:	f383 8810 	msr	PRIMASK, r3
 }
- 8001728:	46c0      	nop			; (mov r8, r8)
+ 800125c:	46c0      	nop			; (mov r8, r8)
 }
- 800172a:	46c0      	nop			; (mov r8, r8)
- 800172c:	46bd      	mov	sp, r7
- 800172e:	b006      	add	sp, #24
- 8001730:	bd80      	pop	{r7, pc}
+ 800125e:	46c0      	nop			; (mov r8, r8)
+ 8001260:	46bd      	mov	sp, r7
+ 8001262:	b006      	add	sp, #24
+ 8001264:	bd80      	pop	{r7, pc}
 
-08001732 <LL_USART_DisableIT_IDLE>:
+08001266 <LL_USART_DisableIT_IDLE>:
   * @rmtoll CR1          IDLEIE        LL_USART_DisableIT_IDLE
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
 {
- 8001732:	b580      	push	{r7, lr}
- 8001734:	b086      	sub	sp, #24
- 8001736:	af00      	add	r7, sp, #0
- 8001738:	6078      	str	r0, [r7, #4]
+ 8001266:	b580      	push	{r7, lr}
+ 8001268:	b086      	sub	sp, #24
+ 800126a:	af00      	add	r7, sp, #0
+ 800126c:	6078      	str	r0, [r7, #4]
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 800173a:	f3ef 8310 	mrs	r3, PRIMASK
- 800173e:	60bb      	str	r3, [r7, #8]
+ 800126e:	f3ef 8310 	mrs	r3, PRIMASK
+ 8001272:	60bb      	str	r3, [r7, #8]
   return(result);
- 8001740:	68bb      	ldr	r3, [r7, #8]
+ 8001274:	68bb      	ldr	r3, [r7, #8]
   ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
- 8001742:	617b      	str	r3, [r7, #20]
- 8001744:	2301      	movs	r3, #1
- 8001746:	60fb      	str	r3, [r7, #12]
+ 8001276:	617b      	str	r3, [r7, #20]
+ 8001278:	2301      	movs	r3, #1
+ 800127a:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8001748:	68fb      	ldr	r3, [r7, #12]
- 800174a:	f383 8810 	msr	PRIMASK, r3
+ 800127c:	68fb      	ldr	r3, [r7, #12]
+ 800127e:	f383 8810 	msr	PRIMASK, r3
 }
- 800174e:	46c0      	nop			; (mov r8, r8)
- 8001750:	687b      	ldr	r3, [r7, #4]
- 8001752:	681b      	ldr	r3, [r3, #0]
- 8001754:	2210      	movs	r2, #16
- 8001756:	4393      	bics	r3, r2
- 8001758:	001a      	movs	r2, r3
- 800175a:	687b      	ldr	r3, [r7, #4]
- 800175c:	601a      	str	r2, [r3, #0]
- 800175e:	697b      	ldr	r3, [r7, #20]
- 8001760:	613b      	str	r3, [r7, #16]
+ 8001282:	46c0      	nop			; (mov r8, r8)
+ 8001284:	687b      	ldr	r3, [r7, #4]
+ 8001286:	681b      	ldr	r3, [r3, #0]
+ 8001288:	2210      	movs	r2, #16
+ 800128a:	4393      	bics	r3, r2
+ 800128c:	001a      	movs	r2, r3
+ 800128e:	687b      	ldr	r3, [r7, #4]
+ 8001290:	601a      	str	r2, [r3, #0]
+ 8001292:	697b      	ldr	r3, [r7, #20]
+ 8001294:	613b      	str	r3, [r7, #16]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8001762:	693b      	ldr	r3, [r7, #16]
- 8001764:	f383 8810 	msr	PRIMASK, r3
+ 8001296:	693b      	ldr	r3, [r7, #16]
+ 8001298:	f383 8810 	msr	PRIMASK, r3
 }
- 8001768:	46c0      	nop			; (mov r8, r8)
+ 800129c:	46c0      	nop			; (mov r8, r8)
 }
- 800176a:	46c0      	nop			; (mov r8, r8)
- 800176c:	46bd      	mov	sp, r7
- 800176e:	b006      	add	sp, #24
- 8001770:	bd80      	pop	{r7, pc}
+ 800129e:	46c0      	nop			; (mov r8, r8)
+ 80012a0:	46bd      	mov	sp, r7
+ 80012a2:	b006      	add	sp, #24
+ 80012a4:	bd80      	pop	{r7, pc}
 
-08001772 <LL_USART_DisableIT_RXNE>:
+080012a6 <LL_USART_DisableIT_RXNE>:
   * @rmtoll CR1          RXNEIE        LL_USART_DisableIT_RXNE
   * @param  USARTx USART Instance
   * @retval None
   */
 __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
 {
- 8001772:	b580      	push	{r7, lr}
- 8001774:	b086      	sub	sp, #24
- 8001776:	af00      	add	r7, sp, #0
- 8001778:	6078      	str	r0, [r7, #4]
+ 80012a6:	b580      	push	{r7, lr}
+ 80012a8:	b086      	sub	sp, #24
+ 80012aa:	af00      	add	r7, sp, #0
+ 80012ac:	6078      	str	r0, [r7, #4]
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 800177a:	f3ef 8310 	mrs	r3, PRIMASK
- 800177e:	60bb      	str	r3, [r7, #8]
+ 80012ae:	f3ef 8310 	mrs	r3, PRIMASK
+ 80012b2:	60bb      	str	r3, [r7, #8]
   return(result);
- 8001780:	68bb      	ldr	r3, [r7, #8]
+ 80012b4:	68bb      	ldr	r3, [r7, #8]
   ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
- 8001782:	617b      	str	r3, [r7, #20]
- 8001784:	2301      	movs	r3, #1
- 8001786:	60fb      	str	r3, [r7, #12]
+ 80012b6:	617b      	str	r3, [r7, #20]
+ 80012b8:	2301      	movs	r3, #1
+ 80012ba:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8001788:	68fb      	ldr	r3, [r7, #12]
- 800178a:	f383 8810 	msr	PRIMASK, r3
+ 80012bc:	68fb      	ldr	r3, [r7, #12]
+ 80012be:	f383 8810 	msr	PRIMASK, r3
 }
- 800178e:	46c0      	nop			; (mov r8, r8)
- 8001790:	687b      	ldr	r3, [r7, #4]
- 8001792:	681b      	ldr	r3, [r3, #0]
- 8001794:	2220      	movs	r2, #32
- 8001796:	4393      	bics	r3, r2
- 8001798:	001a      	movs	r2, r3
- 800179a:	687b      	ldr	r3, [r7, #4]
- 800179c:	601a      	str	r2, [r3, #0]
- 800179e:	697b      	ldr	r3, [r7, #20]
- 80017a0:	613b      	str	r3, [r7, #16]
+ 80012c2:	46c0      	nop			; (mov r8, r8)
+ 80012c4:	687b      	ldr	r3, [r7, #4]
+ 80012c6:	681b      	ldr	r3, [r3, #0]
+ 80012c8:	2220      	movs	r2, #32
+ 80012ca:	4393      	bics	r3, r2
+ 80012cc:	001a      	movs	r2, r3
+ 80012ce:	687b      	ldr	r3, [r7, #4]
+ 80012d0:	601a      	str	r2, [r3, #0]
+ 80012d2:	697b      	ldr	r3, [r7, #20]
+ 80012d4:	613b      	str	r3, [r7, #16]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 80017a2:	693b      	ldr	r3, [r7, #16]
- 80017a4:	f383 8810 	msr	PRIMASK, r3
+ 80012d6:	693b      	ldr	r3, [r7, #16]
+ 80012d8:	f383 8810 	msr	PRIMASK, r3
 }
- 80017a8:	46c0      	nop			; (mov r8, r8)
+ 80012dc:	46c0      	nop			; (mov r8, r8)
 }
- 80017aa:	46c0      	nop			; (mov r8, r8)
- 80017ac:	46bd      	mov	sp, r7
- 80017ae:	b006      	add	sp, #24
- 80017b0:	bd80      	pop	{r7, pc}
+ 80012de:	46c0      	nop			; (mov r8, r8)
+ 80012e0:	46bd      	mov	sp, r7
+ 80012e2:	b006      	add	sp, #24
+ 80012e4:	bd80      	pop	{r7, pc}
 
-080017b2 <LL_USART_TransmitData9>:
+080012e6 <LL_USART_TransmitData9>:
   * @param  USARTx USART Instance
   * @param  Value between Min_Data=0x00 and Max_Data=0x1FF
   * @retval None
   */
 __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
 {
- 80017b2:	b580      	push	{r7, lr}
- 80017b4:	b082      	sub	sp, #8
- 80017b6:	af00      	add	r7, sp, #0
- 80017b8:	6078      	str	r0, [r7, #4]
- 80017ba:	000a      	movs	r2, r1
- 80017bc:	1cbb      	adds	r3, r7, #2
- 80017be:	801a      	strh	r2, [r3, #0]
+ 80012e6:	b580      	push	{r7, lr}
+ 80012e8:	b082      	sub	sp, #8
+ 80012ea:	af00      	add	r7, sp, #0
+ 80012ec:	6078      	str	r0, [r7, #4]
+ 80012ee:	000a      	movs	r2, r1
+ 80012f0:	1cbb      	adds	r3, r7, #2
+ 80012f2:	801a      	strh	r2, [r3, #0]
   USARTx->TDR = (uint16_t)(Value & 0x1FFUL);
- 80017c0:	1cbb      	adds	r3, r7, #2
- 80017c2:	881b      	ldrh	r3, [r3, #0]
- 80017c4:	05db      	lsls	r3, r3, #23
- 80017c6:	0dda      	lsrs	r2, r3, #23
- 80017c8:	687b      	ldr	r3, [r7, #4]
- 80017ca:	629a      	str	r2, [r3, #40]	; 0x28
+ 80012f4:	1cbb      	adds	r3, r7, #2
+ 80012f6:	881b      	ldrh	r3, [r3, #0]
+ 80012f8:	05db      	lsls	r3, r3, #23
+ 80012fa:	0dda      	lsrs	r2, r3, #23
+ 80012fc:	687b      	ldr	r3, [r7, #4]
+ 80012fe:	629a      	str	r2, [r3, #40]	; 0x28
 }
- 80017cc:	46c0      	nop			; (mov r8, r8)
- 80017ce:	46bd      	mov	sp, r7
- 80017d0:	b002      	add	sp, #8
- 80017d2:	bd80      	pop	{r7, pc}
+ 8001300:	46c0      	nop			; (mov r8, r8)
+ 8001302:	46bd      	mov	sp, r7
+ 8001304:	b002      	add	sp, #8
+ 8001306:	bd80      	pop	{r7, pc}
 
-080017d4 <main>:
+08001308 <sht4x_i2c_transmit>:
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+int8_t sht4x_i2c_transmit(uint8_t address, uint8_t *buffer, int len)
+{
+ 8001308:	b590      	push	{r4, r7, lr}
+ 800130a:	b085      	sub	sp, #20
+ 800130c:	af00      	add	r7, sp, #0
+ 800130e:	60b9      	str	r1, [r7, #8]
+ 8001310:	607a      	str	r2, [r7, #4]
+ 8001312:	240f      	movs	r4, #15
+ 8001314:	193b      	adds	r3, r7, r4
+ 8001316:	1c02      	adds	r2, r0, #0
+ 8001318:	701a      	strb	r2, [r3, #0]
+	return i2c_transmit(address, buffer, len);
+ 800131a:	687a      	ldr	r2, [r7, #4]
+ 800131c:	68b9      	ldr	r1, [r7, #8]
+ 800131e:	193b      	adds	r3, r7, r4
+ 8001320:	781b      	ldrb	r3, [r3, #0]
+ 8001322:	0018      	movs	r0, r3
+ 8001324:	f7ff fa16 	bl	8000754 <i2c_transmit>
+ 8001328:	0003      	movs	r3, r0
+}
+ 800132a:	0018      	movs	r0, r3
+ 800132c:	46bd      	mov	sp, r7
+ 800132e:	b005      	add	sp, #20
+ 8001330:	bd90      	pop	{r4, r7, pc}
+
+08001332 <sht4x_i2c_receive>:
+
+int8_t sht4x_i2c_receive(uint8_t address, uint8_t *buffer, int len)
+{
+ 8001332:	b590      	push	{r4, r7, lr}
+ 8001334:	b085      	sub	sp, #20
+ 8001336:	af00      	add	r7, sp, #0
+ 8001338:	60b9      	str	r1, [r7, #8]
+ 800133a:	607a      	str	r2, [r7, #4]
+ 800133c:	240f      	movs	r4, #15
+ 800133e:	193b      	adds	r3, r7, r4
+ 8001340:	1c02      	adds	r2, r0, #0
+ 8001342:	701a      	strb	r2, [r3, #0]
+	return i2c_receive(address, buffer, len);
+ 8001344:	687a      	ldr	r2, [r7, #4]
+ 8001346:	68b9      	ldr	r1, [r7, #8]
+ 8001348:	193b      	adds	r3, r7, r4
+ 800134a:	781b      	ldrb	r3, [r3, #0]
+ 800134c:	0018      	movs	r0, r3
+ 800134e:	f7ff fa59 	bl	8000804 <i2c_receive>
+ 8001352:	0003      	movs	r3, r0
+}
+ 8001354:	0018      	movs	r0, r3
+ 8001356:	46bd      	mov	sp, r7
+ 8001358:	b005      	add	sp, #20
+ 800135a:	bd90      	pop	{r4, r7, pc}
+
+0800135c <sensirion_crc8_calculate>:
+
+uint8_t sensirion_crc8_calculate(const uint8_t *data, uint16_t count)
+{
+ 800135c:	b580      	push	{r7, lr}
+ 800135e:	b082      	sub	sp, #8
+ 8001360:	af00      	add	r7, sp, #0
+ 8001362:	6078      	str	r0, [r7, #4]
+ 8001364:	000a      	movs	r2, r1
+ 8001366:	1cbb      	adds	r3, r7, #2
+ 8001368:	801a      	strh	r2, [r3, #0]
+	return crc8_calculate(data, count);
+ 800136a:	1cbb      	adds	r3, r7, #2
+ 800136c:	881a      	ldrh	r2, [r3, #0]
+ 800136e:	687b      	ldr	r3, [r7, #4]
+ 8001370:	0011      	movs	r1, r2
+ 8001372:	0018      	movs	r0, r3
+ 8001374:	f001 fd60 	bl	8002e38 <crc8_calculate>
+ 8001378:	0003      	movs	r3, r0
+ 800137a:	b2db      	uxtb	r3, r3
+}
+ 800137c:	0018      	movs	r0, r3
+ 800137e:	46bd      	mov	sp, r7
+ 8001380:	b002      	add	sp, #8
+ 8001382:	bd80      	pop	{r7, pc}
+
+08001384 <sht4x_disable_interrupts>:
+
+int8_t sht4x_disable_interrupts(void)
+{
+ 8001384:	b580      	push	{r7, lr}
+ 8001386:	af00      	add	r7, sp, #0
+	return uart_disable_interrupts();
+ 8001388:	f000 fc22 	bl	8001bd0 <uart_disable_interrupts>
+ 800138c:	0003      	movs	r3, r0
+}
+ 800138e:	0018      	movs	r0, r3
+ 8001390:	46bd      	mov	sp, r7
+ 8001392:	bd80      	pop	{r7, pc}
+
+08001394 <sht4x_enable_interrupts>:
+
+int8_t sht4x_enable_interrupts(void)
+{
+ 8001394:	b580      	push	{r7, lr}
+ 8001396:	af00      	add	r7, sp, #0
+	return uart_enable_interrupts();
+ 8001398:	f000 fc2e 	bl	8001bf8 <uart_enable_interrupts>
+ 800139c:	0003      	movs	r3, r0
+}
+ 800139e:	0018      	movs	r0, r3
+ 80013a0:	46bd      	mov	sp, r7
+ 80013a2:	bd80      	pop	{r7, pc}
+
+080013a4 <ltr329_i2c_transmit>:
+
+int8_t ltr329_i2c_transmit(uint8_t address, uint8_t *buffer, int len)
+{
+ 80013a4:	b590      	push	{r4, r7, lr}
+ 80013a6:	b085      	sub	sp, #20
+ 80013a8:	af00      	add	r7, sp, #0
+ 80013aa:	60b9      	str	r1, [r7, #8]
+ 80013ac:	607a      	str	r2, [r7, #4]
+ 80013ae:	240f      	movs	r4, #15
+ 80013b0:	193b      	adds	r3, r7, r4
+ 80013b2:	1c02      	adds	r2, r0, #0
+ 80013b4:	701a      	strb	r2, [r3, #0]
+	return i2c_transmit(address, buffer, len);
+ 80013b6:	687a      	ldr	r2, [r7, #4]
+ 80013b8:	68b9      	ldr	r1, [r7, #8]
+ 80013ba:	193b      	adds	r3, r7, r4
+ 80013bc:	781b      	ldrb	r3, [r3, #0]
+ 80013be:	0018      	movs	r0, r3
+ 80013c0:	f7ff f9c8 	bl	8000754 <i2c_transmit>
+ 80013c4:	0003      	movs	r3, r0
+}
+ 80013c6:	0018      	movs	r0, r3
+ 80013c8:	46bd      	mov	sp, r7
+ 80013ca:	b005      	add	sp, #20
+ 80013cc:	bd90      	pop	{r4, r7, pc}
+
+080013ce <ltr329_i2c_receive>:
+int8_t ltr329_i2c_receive(uint8_t address, uint8_t *buffer, int len)
+{
+ 80013ce:	b590      	push	{r4, r7, lr}
+ 80013d0:	b085      	sub	sp, #20
+ 80013d2:	af00      	add	r7, sp, #0
+ 80013d4:	60b9      	str	r1, [r7, #8]
+ 80013d6:	607a      	str	r2, [r7, #4]
+ 80013d8:	240f      	movs	r4, #15
+ 80013da:	193b      	adds	r3, r7, r4
+ 80013dc:	1c02      	adds	r2, r0, #0
+ 80013de:	701a      	strb	r2, [r3, #0]
+	return i2c_receive(address, buffer, len);
+ 80013e0:	687a      	ldr	r2, [r7, #4]
+ 80013e2:	68b9      	ldr	r1, [r7, #8]
+ 80013e4:	193b      	adds	r3, r7, r4
+ 80013e6:	781b      	ldrb	r3, [r3, #0]
+ 80013e8:	0018      	movs	r0, r3
+ 80013ea:	f7ff fa0b 	bl	8000804 <i2c_receive>
+ 80013ee:	0003      	movs	r3, r0
+}
+ 80013f0:	0018      	movs	r0, r3
+ 80013f2:	46bd      	mov	sp, r7
+ 80013f4:	b005      	add	sp, #20
+ 80013f6:	bd90      	pop	{r4, r7, pc}
+
+080013f8 <ltr329_disable_interrupts>:
+
+int8_t ltr329_disable_interrupts(void)
+{
+ 80013f8:	b580      	push	{r7, lr}
+ 80013fa:	af00      	add	r7, sp, #0
+	return uart_disable_interrupts();
+ 80013fc:	f000 fbe8 	bl	8001bd0 <uart_disable_interrupts>
+ 8001400:	0003      	movs	r3, r0
+}
+ 8001402:	0018      	movs	r0, r3
+ 8001404:	46bd      	mov	sp, r7
+ 8001406:	bd80      	pop	{r7, pc}
+
+08001408 <ltr329_enable_interrupts>:
+
+int8_t ltr329_enable_interrupts(void)
+{
+ 8001408:	b580      	push	{r7, lr}
+ 800140a:	af00      	add	r7, sp, #0
+	return uart_enable_interrupts();
+ 800140c:	f000 fbf4 	bl	8001bf8 <uart_enable_interrupts>
+ 8001410:	0003      	movs	r3, r0
+}
+ 8001412:	0018      	movs	r0, r3
+ 8001414:	46bd      	mov	sp, r7
+ 8001416:	bd80      	pop	{r7, pc}
+
+08001418 <delay_ms>:
+
+void delay_ms(int delay_ms)
+{
+ 8001418:	b580      	push	{r7, lr}
+ 800141a:	b082      	sub	sp, #8
+ 800141c:	af00      	add	r7, sp, #0
+ 800141e:	6078      	str	r0, [r7, #4]
+	LL_mDelay(delay_ms);
+ 8001420:	687b      	ldr	r3, [r7, #4]
+ 8001422:	0018      	movs	r0, r3
+ 8001424:	f001 fcd8 	bl	8002dd8 <LL_mDelay>
+}
+ 8001428:	46c0      	nop			; (mov r8, r8)
+ 800142a:	46bd      	mov	sp, r7
+ 800142c:	b002      	add	sp, #8
+ 800142e:	bd80      	pop	{r7, pc}
+
+08001430 <main>:
 /**
   * @brief  The application entry point.
   * @retval int
   */
 int main(void)
 {
- 80017d4:	b5b0      	push	{r4, r5, r7, lr}
- 80017d6:	b084      	sub	sp, #16
- 80017d8:	af00      	add	r7, sp, #0
+ 8001430:	b5b0      	push	{r4, r5, r7, lr}
+ 8001432:	b084      	sub	sp, #16
+ 8001434:	af00      	add	r7, sp, #0
 
   /* MCU Configuration--------------------------------------------------------*/
 
   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
 
   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
- 80017da:	2001      	movs	r0, #1
- 80017dc:	f7ff fd60 	bl	80012a0 <LL_APB2_GRP1_EnableClock>
+ 8001436:	2001      	movs	r0, #1
+ 8001438:	f7ff fccc 	bl	8000dd4 <LL_APB2_GRP1_EnableClock>
   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
- 80017e0:	2380      	movs	r3, #128	; 0x80
- 80017e2:	055b      	lsls	r3, r3, #21
- 80017e4:	0018      	movs	r0, r3
- 80017e6:	f7ff fd45 	bl	8001274 <LL_APB1_GRP1_EnableClock>
+ 800143c:	2380      	movs	r3, #128	; 0x80
+ 800143e:	055b      	lsls	r3, r3, #21
+ 8001440:	0018      	movs	r0, r3
+ 8001442:	f7ff fcb1 	bl	8000da8 <LL_APB1_GRP1_EnableClock>
 
   /* System interrupt init*/
   /* SysTick_IRQn interrupt configuration */
   NVIC_SetPriority(SysTick_IRQn, 3);
- 80017ea:	2301      	movs	r3, #1
- 80017ec:	425b      	negs	r3, r3
- 80017ee:	2103      	movs	r1, #3
- 80017f0:	0018      	movs	r0, r3
- 80017f2:	f7ff fae1 	bl	8000db8 <__NVIC_SetPriority>
+ 8001446:	2301      	movs	r3, #1
+ 8001448:	425b      	negs	r3, r3
+ 800144a:	2103      	movs	r1, #3
+ 800144c:	0018      	movs	r0, r3
+ 800144e:	f7ff fa4d 	bl	80008ec <__NVIC_SetPriority>
   /* USER CODE BEGIN Init */
 
   /* USER CODE END Init */
 
   /* Configure the system clock */
   SystemClock_Config();
- 80017f6:	f000 f951 	bl	8001a9c <SystemClock_Config>
+ 8001452:	f000 f969 	bl	8001728 <SystemClock_Config>
 
   /* USER CODE BEGIN SysInit */
   /* Read config from EEPROM - if unsuccessful, set the default values*/
   int8_t config_read_status = config_read(&sensor_config);
- 80017fa:	250f      	movs	r5, #15
- 80017fc:	197c      	adds	r4, r7, r5
- 80017fe:	4b89      	ldr	r3, [pc, #548]	; (8001a24 <main+0x250>)
- 8001800:	0018      	movs	r0, r3
- 8001802:	f7fe fdff 	bl	8000404 <config_read>
- 8001806:	0003      	movs	r3, r0
- 8001808:	7023      	strb	r3, [r4, #0]
+ 8001456:	250f      	movs	r5, #15
+ 8001458:	197c      	adds	r4, r7, r5
+ 800145a:	4b96      	ldr	r3, [pc, #600]	; (80016b4 <main+0x284>)
+ 800145c:	0018      	movs	r0, r3
+ 800145e:	f7fe ffd1 	bl	8000404 <config_read>
+ 8001462:	0003      	movs	r3, r0
+ 8001464:	7023      	strb	r3, [r4, #0]
   if (config_read_status != CONFIG_OK)
- 800180a:	197b      	adds	r3, r7, r5
- 800180c:	781b      	ldrb	r3, [r3, #0]
- 800180e:	b25b      	sxtb	r3, r3
- 8001810:	2b00      	cmp	r3, #0
- 8001812:	d017      	beq.n	8001844 <main+0x70>
+ 8001466:	197b      	adds	r3, r7, r5
+ 8001468:	781b      	ldrb	r3, [r3, #0]
+ 800146a:	b25b      	sxtb	r3, r3
+ 800146c:	2b00      	cmp	r3, #0
+ 800146e:	d005      	beq.n	800147c <main+0x4c>
   {
 	  sensor_config.modbus_addr = MODBUS_DEFAULT_SLAVE_ADDRESS;
- 8001814:	4b83      	ldr	r3, [pc, #524]	; (8001a24 <main+0x250>)
- 8001816:	22f7      	movs	r2, #247	; 0xf7
- 8001818:	819a      	strh	r2, [r3, #12]
-	  sensor_config.led_co2_alert_limit1 = CONFIG_DEFAULT_LED_ALERT1_LIMIT;
- 800181a:	4b82      	ldr	r3, [pc, #520]	; (8001a24 <main+0x250>)
- 800181c:	4a82      	ldr	r2, [pc, #520]	; (8001a28 <main+0x254>)
- 800181e:	80da      	strh	r2, [r3, #6]
-	  sensor_config.led_co2_alert_limit2 = CONFIG_DEFAULT_LED_ALERT2_LIMIT;
- 8001820:	4b80      	ldr	r3, [pc, #512]	; (8001a24 <main+0x250>)
- 8001822:	4a82      	ldr	r2, [pc, #520]	; (8001a2c <main+0x258>)
- 8001824:	811a      	strh	r2, [r3, #8]
-	  sensor_config.led_on = CONFIG_DEFAULT_LED_ON;
- 8001826:	4b7f      	ldr	r3, [pc, #508]	; (8001a24 <main+0x250>)
- 8001828:	2201      	movs	r2, #1
- 800182a:	701a      	strb	r2, [r3, #0]
-	  sensor_config.led_brightness = CONFIG_DEFAULT_LED_BRIGHTNESS;
- 800182c:	4b7d      	ldr	r3, [pc, #500]	; (8001a24 <main+0x250>)
- 800182e:	2264      	movs	r2, #100	; 0x64
- 8001830:	805a      	strh	r2, [r3, #2]
-	  sensor_config.led_smooth = CONFIG_DEFAULT_LED_SMOOTH;
- 8001832:	4b7c      	ldr	r3, [pc, #496]	; (8001a24 <main+0x250>)
- 8001834:	2201      	movs	r2, #1
- 8001836:	711a      	strb	r2, [r3, #4]
-	  sensor_config.scd4x_t_offset = CONFIG_DEFAULT_SCD4x_T_OFFSET;
- 8001838:	4b7a      	ldr	r3, [pc, #488]	; (8001a24 <main+0x250>)
- 800183a:	2200      	movs	r2, #0
- 800183c:	815a      	strh	r2, [r3, #10]
+ 8001470:	4b90      	ldr	r3, [pc, #576]	; (80016b4 <main+0x284>)
+ 8001472:	22f7      	movs	r2, #247	; 0xf7
+ 8001474:	809a      	strh	r2, [r3, #4]
 	  sensor_config.baudrate_index = CONFIG_DEFAULT_BAUDRATE_INDEX;
- 800183e:	4b79      	ldr	r3, [pc, #484]	; (8001a24 <main+0x250>)
- 8001840:	2200      	movs	r2, #0
- 8001842:	611a      	str	r2, [r3, #16]
+ 8001476:	4b8f      	ldr	r3, [pc, #572]	; (80016b4 <main+0x284>)
+ 8001478:	2200      	movs	r2, #0
+ 800147a:	609a      	str	r2, [r3, #8]
   }
   /* USER CODE END SysInit */
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
- 8001844:	f000 fb40 	bl	8001ec8 <MX_GPIO_Init>
+ 800147c:	f000 fb6a 	bl	8001b54 <MX_GPIO_Init>
   MX_I2C1_Init();
- 8001848:	f000 f982 	bl	8001b50 <MX_I2C1_Init>
+ 8001480:	f000 f9ac 	bl	80017dc <MX_I2C1_Init>
   MX_USART2_UART_Init();
- 800184c:	f000 fa74 	bl	8001d38 <MX_USART2_UART_Init>
+ 8001484:	f000 fa9e 	bl	80019c4 <MX_USART2_UART_Init>
   MX_TIM21_Init();
- 8001850:	f000 fa2e 	bl	8001cb0 <MX_TIM21_Init>
+ 8001488:	f000 fa58 	bl	800193c <MX_TIM21_Init>
   MX_IWDG_Init();
- 8001854:	f000 fa04 	bl	8001c60 <MX_IWDG_Init>
+ 800148c:	f000 fa2e 	bl	80018ec <MX_IWDG_Init>
 //  LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
 //  LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
 //  LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
 
   /* Enable I2C for sensors */
   LL_I2C_Enable(I2C1);
- 8001858:	4b75      	ldr	r3, [pc, #468]	; (8001a30 <main+0x25c>)
- 800185a:	0018      	movs	r0, r3
- 800185c:	f7ff fb2c 	bl	8000eb8 <LL_I2C_Enable>
+ 8001490:	4b89      	ldr	r3, [pc, #548]	; (80016b8 <main+0x288>)
+ 8001492:	0018      	movs	r0, r3
+ 8001494:	f7ff faaa 	bl	80009ec <LL_I2C_Enable>
 
 
   /* Set the modbus address */
   modbus_slave_set_address(sensor_config.modbus_addr);
- 8001860:	4b70      	ldr	r3, [pc, #448]	; (8001a24 <main+0x250>)
- 8001862:	899b      	ldrh	r3, [r3, #12]
- 8001864:	b2db      	uxtb	r3, r3
- 8001866:	0018      	movs	r0, r3
- 8001868:	f001 f92a 	bl	8002ac0 <modbus_slave_set_address>
+ 8001498:	4b86      	ldr	r3, [pc, #536]	; (80016b4 <main+0x284>)
+ 800149a:	889b      	ldrh	r3, [r3, #4]
+ 800149c:	b2db      	uxtb	r3, r3
+ 800149e:	0018      	movs	r0, r3
+ 80014a0:	f002 fb2a 	bl	8003af8 <modbus_slave_set_address>
 
   /* Enable UART for RS485 */
   LL_USART_Enable(USART2);
- 800186c:	4b71      	ldr	r3, [pc, #452]	; (8001a34 <main+0x260>)
- 800186e:	0018      	movs	r0, r3
- 8001870:	f7ff fdd7 	bl	8001422 <LL_USART_Enable>
+ 80014a4:	4b85      	ldr	r3, [pc, #532]	; (80016bc <main+0x28c>)
+ 80014a6:	0018      	movs	r0, r3
+ 80014a8:	f7ff fd55 	bl	8000f56 <LL_USART_Enable>
 
   /* Start the timer for measurement triggering */
   LL_TIM_EnableCounter(TIM21);
- 8001874:	4b70      	ldr	r3, [pc, #448]	; (8001a38 <main+0x264>)
- 8001876:	0018      	movs	r0, r3
- 8001878:	f7ff fd74 	bl	8001364 <LL_TIM_EnableCounter>
+ 80014ac:	4b84      	ldr	r3, [pc, #528]	; (80016c0 <main+0x290>)
+ 80014ae:	0018      	movs	r0, r3
+ 80014b0:	f7ff fcf2 	bl	8000e98 <LL_TIM_EnableCounter>
   LL_TIM_EnableIT_UPDATE(TIM21);
- 800187c:	4b6e      	ldr	r3, [pc, #440]	; (8001a38 <main+0x264>)
- 800187e:	0018      	movs	r0, r3
- 8001880:	f7ff fdc1 	bl	8001406 <LL_TIM_EnableIT_UPDATE>
+ 80014b4:	4b82      	ldr	r3, [pc, #520]	; (80016c0 <main+0x290>)
+ 80014b6:	0018      	movs	r0, r3
+ 80014b8:	f7ff fd3f 	bl	8000f3a <LL_TIM_EnableIT_UPDATE>
 
   /* I2C context init (for SHT4x and SCD4x) */
   i2c_context_t i2c_context;
   i2c_context.i2c = I2C1;
- 8001884:	4b6a      	ldr	r3, [pc, #424]	; (8001a30 <main+0x25c>)
- 8001886:	60bb      	str	r3, [r7, #8]
+ 80014bc:	4b7e      	ldr	r3, [pc, #504]	; (80016b8 <main+0x288>)
+ 80014be:	60bb      	str	r3, [r7, #8]
   i2c_init(&i2c_context);
- 8001888:	2308      	movs	r3, #8
- 800188a:	18fb      	adds	r3, r7, r3
- 800188c:	0018      	movs	r0, r3
- 800188e:	f7ff f853 	bl	8000938 <i2c_init>
+ 80014c0:	2308      	movs	r3, #8
+ 80014c2:	18fb      	adds	r3, r7, r3
+ 80014c4:	0018      	movs	r0, r3
+ 80014c6:	f7ff f931 	bl	800072c <i2c_init>
 
   /* Fill device ID struct */
   device_id.object_name.VendorName         = "Veles Labs";
- 8001892:	4b6a      	ldr	r3, [pc, #424]	; (8001a3c <main+0x268>)
- 8001894:	4a6a      	ldr	r2, [pc, #424]	; (8001a40 <main+0x26c>)
- 8001896:	601a      	str	r2, [r3, #0]
+ 80014ca:	4b7e      	ldr	r3, [pc, #504]	; (80016c4 <main+0x294>)
+ 80014cc:	4a7e      	ldr	r2, [pc, #504]	; (80016c8 <main+0x298>)
+ 80014ce:	601a      	str	r2, [r3, #0]
   device_id.object_name.ProductCode        = "124C41";
- 8001898:	4b68      	ldr	r3, [pc, #416]	; (8001a3c <main+0x268>)
- 800189a:	4a6a      	ldr	r2, [pc, #424]	; (8001a44 <main+0x270>)
- 800189c:	605a      	str	r2, [r3, #4]
+ 80014d0:	4b7c      	ldr	r3, [pc, #496]	; (80016c4 <main+0x294>)
+ 80014d2:	4a7e      	ldr	r2, [pc, #504]	; (80016cc <main+0x29c>)
+ 80014d4:	605a      	str	r2, [r3, #4]
   device_id.object_name.MajorMinorRevision = "1.2";
- 800189e:	4b67      	ldr	r3, [pc, #412]	; (8001a3c <main+0x268>)
- 80018a0:	4a69      	ldr	r2, [pc, #420]	; (8001a48 <main+0x274>)
- 80018a2:	609a      	str	r2, [r3, #8]
+ 80014d6:	4b7b      	ldr	r3, [pc, #492]	; (80016c4 <main+0x294>)
+ 80014d8:	4a7d      	ldr	r2, [pc, #500]	; (80016d0 <main+0x2a0>)
+ 80014da:	609a      	str	r2, [r3, #8]
   device_id.object_name.VendorUrl          = "https://veles-labs.com";
- 80018a4:	4b65      	ldr	r3, [pc, #404]	; (8001a3c <main+0x268>)
- 80018a6:	4a69      	ldr	r2, [pc, #420]	; (8001a4c <main+0x278>)
- 80018a8:	60da      	str	r2, [r3, #12]
+ 80014dc:	4b79      	ldr	r3, [pc, #484]	; (80016c4 <main+0x294>)
+ 80014de:	4a7d      	ldr	r2, [pc, #500]	; (80016d4 <main+0x2a4>)
+ 80014e0:	60da      	str	r2, [r3, #12]
   device_id.object_name.ProductName        = "RHT_Wired";
- 80018aa:	4b64      	ldr	r3, [pc, #400]	; (8001a3c <main+0x268>)
- 80018ac:	4a68      	ldr	r2, [pc, #416]	; (8001a50 <main+0x27c>)
- 80018ae:	611a      	str	r2, [r3, #16]
+ 80014e2:	4b78      	ldr	r3, [pc, #480]	; (80016c4 <main+0x294>)
+ 80014e4:	4a7c      	ldr	r2, [pc, #496]	; (80016d8 <main+0x2a8>)
+ 80014e6:	611a      	str	r2, [r3, #16]
   device_id.object_name.ModelName          = "Hugo";
- 80018b0:	4b62      	ldr	r3, [pc, #392]	; (8001a3c <main+0x268>)
- 80018b2:	4a68      	ldr	r2, [pc, #416]	; (8001a54 <main+0x280>)
- 80018b4:	615a      	str	r2, [r3, #20]
+ 80014e8:	4b76      	ldr	r3, [pc, #472]	; (80016c4 <main+0x294>)
+ 80014ea:	4a7c      	ldr	r2, [pc, #496]	; (80016dc <main+0x2ac>)
+ 80014ec:	615a      	str	r2, [r3, #20]
   modbus_slave_init_device_id(&device_id);
- 80018b6:	4b61      	ldr	r3, [pc, #388]	; (8001a3c <main+0x268>)
- 80018b8:	0018      	movs	r0, r3
- 80018ba:	f001 f9fd 	bl	8002cb8 <modbus_slave_init_device_id>
+ 80014ee:	4b75      	ldr	r3, [pc, #468]	; (80016c4 <main+0x294>)
+ 80014f0:	0018      	movs	r0, r3
+ 80014f2:	f002 fbfd 	bl	8003cf0 <modbus_slave_init_device_id>
   /* USER CODE BEGIN WHILE */
 
   /* Wait 1000ms for sensors initialization */
   /* SHT4x Init Time:  max 1 	ms 	(datasheet pg. 8) */
   /* LTR329 Init Time: max 100 	ms 	(datasheet pg. 9) */
   LL_mDelay(1000);
- 80018be:	23fa      	movs	r3, #250	; 0xfa
- 80018c0:	009b      	lsls	r3, r3, #2
- 80018c2:	0018      	movs	r0, r3
- 80018c4:	f002 f904 	bl	8003ad0 <LL_mDelay>
+ 80014f6:	23fa      	movs	r3, #250	; 0xfa
+ 80014f8:	009b      	lsls	r3, r3, #2
+ 80014fa:	0018      	movs	r0, r3
+ 80014fc:	f001 fc6c 	bl	8002dd8 <LL_mDelay>
   int8_t ltr_ret;
   uint8_t ltr_cont_reg_val;
   uint8_t ltr_rate_reg_val;
   do
   {
 	  ltr_ret = ltr329_write_settings(LTR329_GAIN_48X, LTR329_MODE_ACTIVE, LTR329_INTEGRATION_100MS, LTR329_MEAS_RATE_100MS);
- 80018c8:	250e      	movs	r5, #14
- 80018ca:	197c      	adds	r4, r7, r5
- 80018cc:	2301      	movs	r3, #1
- 80018ce:	2200      	movs	r2, #0
- 80018d0:	2101      	movs	r1, #1
- 80018d2:	2018      	movs	r0, #24
- 80018d4:	f7ff f95d 	bl	8000b92 <ltr329_write_settings>
- 80018d8:	0003      	movs	r3, r0
- 80018da:	7023      	strb	r3, [r4, #0]
+ 8001500:	250e      	movs	r5, #14
+ 8001502:	197c      	adds	r4, r7, r5
+ 8001504:	2301      	movs	r3, #1
+ 8001506:	2200      	movs	r2, #0
+ 8001508:	2101      	movs	r1, #1
+ 800150a:	2018      	movs	r0, #24
+ 800150c:	f001 fd51 	bl	8002fb2 <ltr329_write_settings>
+ 8001510:	0003      	movs	r3, r0
+ 8001512:	7023      	strb	r3, [r4, #0]
 	  /* TODO: Check register status */
   } while (ltr_ret != 0);
- 80018dc:	197b      	adds	r3, r7, r5
- 80018de:	781b      	ldrb	r3, [r3, #0]
- 80018e0:	b25b      	sxtb	r3, r3
- 80018e2:	2b00      	cmp	r3, #0
- 80018e4:	d1f0      	bne.n	80018c8 <main+0xf4>
+ 8001514:	197b      	adds	r3, r7, r5
+ 8001516:	781b      	ldrb	r3, [r3, #0]
+ 8001518:	b25b      	sxtb	r3, r3
+ 800151a:	2b00      	cmp	r3, #0
+ 800151c:	d1f0      	bne.n	8001500 <main+0xd0>
+  /* LTR329 Innitialized */
+  ltr329_gain_t ltr329_gain;
+  ltr329_als_mode_t ltr329_mode;
+  ltr329_integration_time_t ltr329_int_time;
+  ltr329_measurement_rate_t ltr329_meas_rate;
+  ltr329_read_settings(&ltr329_gain, &ltr329_mode, &ltr329_int_time, &ltr329_meas_rate);
+ 800151e:	1d3b      	adds	r3, r7, #4
+ 8001520:	1d7a      	adds	r2, r7, #5
+ 8001522:	1db9      	adds	r1, r7, #6
+ 8001524:	1df8      	adds	r0, r7, #7
+ 8001526:	f001 fd88 	bl	800303a <ltr329_read_settings>
+  sensor_config.ltr329_gain = ltr329_gain;
+ 800152a:	1dfb      	adds	r3, r7, #7
+ 800152c:	781a      	ldrb	r2, [r3, #0]
+ 800152e:	4b61      	ldr	r3, [pc, #388]	; (80016b4 <main+0x284>)
+ 8001530:	701a      	strb	r2, [r3, #0]
+  sensor_config.ltr329_mode = ltr329_mode;
+ 8001532:	1dbb      	adds	r3, r7, #6
+ 8001534:	781a      	ldrb	r2, [r3, #0]
+ 8001536:	4b5f      	ldr	r3, [pc, #380]	; (80016b4 <main+0x284>)
+ 8001538:	705a      	strb	r2, [r3, #1]
+  sensor_config.ltr329_integ_time = ltr329_int_time;
+ 800153a:	1d7b      	adds	r3, r7, #5
+ 800153c:	781a      	ldrb	r2, [r3, #0]
+ 800153e:	4b5d      	ldr	r3, [pc, #372]	; (80016b4 <main+0x284>)
+ 8001540:	709a      	strb	r2, [r3, #2]
+  sensor_config.ltr329_meas_rate = ltr329_meas_rate;
+ 8001542:	1d3b      	adds	r3, r7, #4
+ 8001544:	781a      	ldrb	r2, [r3, #0]
+ 8001546:	4b5b      	ldr	r3, [pc, #364]	; (80016b4 <main+0x284>)
+ 8001548:	70da      	strb	r2, [r3, #3]
   static uint32_t new_baud;
   /* Enter the main loop */
   while (1)
   {
 	  /* Watchdog is set to 28 s (37 kHz, prescaler 256, 4095 reload value) */
 	  LL_IWDG_ReloadCounter(IWDG);
- 80018e6:	4b5c      	ldr	r3, [pc, #368]	; (8001a58 <main+0x284>)
- 80018e8:	0018      	movs	r0, r3
- 80018ea:	f7ff fb57 	bl	8000f9c <LL_IWDG_ReloadCounter>
+ 800154a:	4b65      	ldr	r3, [pc, #404]	; (80016e0 <main+0x2b0>)
+ 800154c:	0018      	movs	r0, r3
+ 800154e:	f7ff fabf 	bl	8000ad0 <LL_IWDG_ReloadCounter>
 	  if (usart2_rx_done == 1)
- 80018ee:	4b5b      	ldr	r3, [pc, #364]	; (8001a5c <main+0x288>)
- 80018f0:	781b      	ldrb	r3, [r3, #0]
- 80018f2:	2b01      	cmp	r3, #1
- 80018f4:	d11d      	bne.n	8001932 <main+0x15e>
+ 8001552:	4b64      	ldr	r3, [pc, #400]	; (80016e4 <main+0x2b4>)
+ 8001554:	781b      	ldrb	r3, [r3, #0]
+ 8001556:	2b01      	cmp	r3, #1
+ 8001558:	d11d      	bne.n	8001596 <main+0x166>
 	  {
 	  /* Process the message */
 		  if (usart2_rx_message_too_long)
- 80018f6:	4b5a      	ldr	r3, [pc, #360]	; (8001a60 <main+0x28c>)
- 80018f8:	781b      	ldrb	r3, [r3, #0]
- 80018fa:	2b00      	cmp	r3, #0
- 80018fc:	d003      	beq.n	8001906 <main+0x132>
+ 800155a:	4b63      	ldr	r3, [pc, #396]	; (80016e8 <main+0x2b8>)
+ 800155c:	781b      	ldrb	r3, [r3, #0]
+ 800155e:	2b00      	cmp	r3, #0
+ 8001560:	d003      	beq.n	800156a <main+0x13a>
 		  {
 			  /* Do nothing, just delete the buffer and set the flag back to zero*/
 			  usart2_rx_message_too_long = 0;
- 80018fe:	4b58      	ldr	r3, [pc, #352]	; (8001a60 <main+0x28c>)
- 8001900:	2200      	movs	r2, #0
- 8001902:	701a      	strb	r2, [r3, #0]
- 8001904:	e012      	b.n	800192c <main+0x158>
+ 8001562:	4b61      	ldr	r3, [pc, #388]	; (80016e8 <main+0x2b8>)
+ 8001564:	2200      	movs	r2, #0
+ 8001566:	701a      	strb	r2, [r3, #0]
+ 8001568:	e012      	b.n	8001590 <main+0x160>
 		  {
 			  /* Process the message:
 			   * message is stored in modbus_buffer[], no copying necessary;
 			   * but we need to make sure that modbus_buffer[] will not be used while
 			   * processing the message: this can be done by disabling RX interrupt */
 			  LL_USART_DisableIT_RXNE(USART2);
- 8001906:	4b4b      	ldr	r3, [pc, #300]	; (8001a34 <main+0x260>)
- 8001908:	0018      	movs	r0, r3
- 800190a:	f7ff ff32 	bl	8001772 <LL_USART_DisableIT_RXNE>
+ 800156a:	4b54      	ldr	r3, [pc, #336]	; (80016bc <main+0x28c>)
+ 800156c:	0018      	movs	r0, r3
+ 800156e:	f7ff fe9a 	bl	80012a6 <LL_USART_DisableIT_RXNE>
 			  modbus_slave_process_msg(modbus_buffer, usart2_rx_message_len);
- 800190e:	4b55      	ldr	r3, [pc, #340]	; (8001a64 <main+0x290>)
- 8001910:	881b      	ldrh	r3, [r3, #0]
- 8001912:	001a      	movs	r2, r3
- 8001914:	4b54      	ldr	r3, [pc, #336]	; (8001a68 <main+0x294>)
- 8001916:	0011      	movs	r1, r2
- 8001918:	0018      	movs	r0, r3
- 800191a:	f001 f8e9 	bl	8002af0 <modbus_slave_process_msg>
+ 8001572:	4b5e      	ldr	r3, [pc, #376]	; (80016ec <main+0x2bc>)
+ 8001574:	881b      	ldrh	r3, [r3, #0]
+ 8001576:	001a      	movs	r2, r3
+ 8001578:	4b5d      	ldr	r3, [pc, #372]	; (80016f0 <main+0x2c0>)
+ 800157a:	0011      	movs	r1, r2
+ 800157c:	0018      	movs	r0, r3
+ 800157e:	f002 fad3 	bl	8003b28 <modbus_slave_process_msg>
 			  /* Reset the RX DONE flag */
 			  usart2_rx_done = 0;
- 800191e:	4b4f      	ldr	r3, [pc, #316]	; (8001a5c <main+0x288>)
- 8001920:	2200      	movs	r2, #0
- 8001922:	701a      	strb	r2, [r3, #0]
+ 8001582:	4b58      	ldr	r3, [pc, #352]	; (80016e4 <main+0x2b4>)
+ 8001584:	2200      	movs	r2, #0
+ 8001586:	701a      	strb	r2, [r3, #0]
 			  LL_USART_EnableIT_RXNE(USART2);
- 8001924:	4b43      	ldr	r3, [pc, #268]	; (8001a34 <main+0x260>)
- 8001926:	0018      	movs	r0, r3
- 8001928:	f7ff fee4 	bl	80016f4 <LL_USART_EnableIT_RXNE>
+ 8001588:	4b4c      	ldr	r3, [pc, #304]	; (80016bc <main+0x28c>)
+ 800158a:	0018      	movs	r0, r3
+ 800158c:	f7ff fe4c 	bl	8001228 <LL_USART_EnableIT_RXNE>
 		  }
 		  /* Reset the RX DONE flag */
 		  usart2_rx_done = 0;
- 800192c:	4b4b      	ldr	r3, [pc, #300]	; (8001a5c <main+0x288>)
- 800192e:	2200      	movs	r2, #0
- 8001930:	701a      	strb	r2, [r3, #0]
+ 8001590:	4b54      	ldr	r3, [pc, #336]	; (80016e4 <main+0x2b4>)
+ 8001592:	2200      	movs	r2, #0
+ 8001594:	701a      	strb	r2, [r3, #0]
 	  }
 	  /* if config changed (MODBUS write), reflect changes to EEPROM */
 	  if (sensor_config_pending_write) {
- 8001932:	4b4e      	ldr	r3, [pc, #312]	; (8001a6c <main+0x298>)
- 8001934:	781b      	ldrb	r3, [r3, #0]
- 8001936:	2b00      	cmp	r3, #0
- 8001938:	d006      	beq.n	8001948 <main+0x174>
+ 8001596:	4b57      	ldr	r3, [pc, #348]	; (80016f4 <main+0x2c4>)
+ 8001598:	781b      	ldrb	r3, [r3, #0]
+ 800159a:	2b00      	cmp	r3, #0
+ 800159c:	d00a      	beq.n	80015b4 <main+0x184>
+		  uart_disable_interrupts();
+ 800159e:	f000 fb17 	bl	8001bd0 <uart_disable_interrupts>
 		  config_write(&sensor_config);
- 800193a:	4b3a      	ldr	r3, [pc, #232]	; (8001a24 <main+0x250>)
- 800193c:	0018      	movs	r0, r3
- 800193e:	f7fe fdb1 	bl	80004a4 <config_write>
+ 80015a2:	4b44      	ldr	r3, [pc, #272]	; (80016b4 <main+0x284>)
+ 80015a4:	0018      	movs	r0, r3
+ 80015a6:	f7fe ff4b 	bl	8000440 <config_write>
 		  sensor_config_pending_write = 0;
- 8001942:	4b4a      	ldr	r3, [pc, #296]	; (8001a6c <main+0x298>)
- 8001944:	2200      	movs	r2, #0
- 8001946:	701a      	strb	r2, [r3, #0]
+ 80015aa:	4b52      	ldr	r3, [pc, #328]	; (80016f4 <main+0x2c4>)
+ 80015ac:	2200      	movs	r2, #0
+ 80015ae:	701a      	strb	r2, [r3, #0]
+		  uart_enable_interrupts();
+ 80015b0:	f000 fb22 	bl	8001bf8 <uart_enable_interrupts>
 	  }
 	  if (modbus_address_changed)
- 8001948:	4b49      	ldr	r3, [pc, #292]	; (8001a70 <main+0x29c>)
- 800194a:	781b      	ldrb	r3, [r3, #0]
- 800194c:	2b00      	cmp	r3, #0
- 800194e:	d008      	beq.n	8001962 <main+0x18e>
+ 80015b4:	4b50      	ldr	r3, [pc, #320]	; (80016f8 <main+0x2c8>)
+ 80015b6:	781b      	ldrb	r3, [r3, #0]
+ 80015b8:	2b00      	cmp	r3, #0
+ 80015ba:	d008      	beq.n	80015ce <main+0x19e>
 	  {
 		  modbus_slave_set_address(sensor_config.modbus_addr);
- 8001950:	4b34      	ldr	r3, [pc, #208]	; (8001a24 <main+0x250>)
- 8001952:	899b      	ldrh	r3, [r3, #12]
- 8001954:	b2db      	uxtb	r3, r3
- 8001956:	0018      	movs	r0, r3
- 8001958:	f001 f8b2 	bl	8002ac0 <modbus_slave_set_address>
+ 80015bc:	4b3d      	ldr	r3, [pc, #244]	; (80016b4 <main+0x284>)
+ 80015be:	889b      	ldrh	r3, [r3, #4]
+ 80015c0:	b2db      	uxtb	r3, r3
+ 80015c2:	0018      	movs	r0, r3
+ 80015c4:	f002 fa98 	bl	8003af8 <modbus_slave_set_address>
 		  modbus_address_changed = 0;
- 800195c:	4b44      	ldr	r3, [pc, #272]	; (8001a70 <main+0x29c>)
- 800195e:	2200      	movs	r2, #0
- 8001960:	701a      	strb	r2, [r3, #0]
+ 80015c8:	4b4b      	ldr	r3, [pc, #300]	; (80016f8 <main+0x2c8>)
+ 80015ca:	2200      	movs	r2, #0
+ 80015cc:	701a      	strb	r2, [r3, #0]
 	  }
 	  if (baudrate_changed)
- 8001962:	4b44      	ldr	r3, [pc, #272]	; (8001a74 <main+0x2a0>)
- 8001964:	781b      	ldrb	r3, [r3, #0]
- 8001966:	2b00      	cmp	r3, #0
- 8001968:	d028      	beq.n	80019bc <main+0x1e8>
+ 80015ce:	4b4b      	ldr	r3, [pc, #300]	; (80016fc <main+0x2cc>)
+ 80015d0:	781b      	ldrb	r3, [r3, #0]
+ 80015d2:	2b00      	cmp	r3, #0
+ 80015d4:	d028      	beq.n	8001628 <main+0x1f8>
 	  {
 		  while (!LL_USART_IsActiveFlag_TXE(USART2));
- 800196a:	46c0      	nop			; (mov r8, r8)
- 800196c:	4b31      	ldr	r3, [pc, #196]	; (8001a34 <main+0x260>)
- 800196e:	0018      	movs	r0, r3
- 8001970:	f7ff fe90 	bl	8001694 <LL_USART_IsActiveFlag_TXE>
- 8001974:	1e03      	subs	r3, r0, #0
- 8001976:	d0f9      	beq.n	800196c <main+0x198>
+ 80015d6:	46c0      	nop			; (mov r8, r8)
+ 80015d8:	4b38      	ldr	r3, [pc, #224]	; (80016bc <main+0x28c>)
+ 80015da:	0018      	movs	r0, r3
+ 80015dc:	f7ff fdf4 	bl	80011c8 <LL_USART_IsActiveFlag_TXE>
+ 80015e0:	1e03      	subs	r3, r0, #0
+ 80015e2:	d0f9      	beq.n	80015d8 <main+0x1a8>
 		  uart_disable_interrupts();
- 8001978:	f000 fae4 	bl	8001f44 <uart_disable_interrupts>
+ 80015e4:	f000 faf4 	bl	8001bd0 <uart_disable_interrupts>
 
 		  LL_USART_SetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16, config_baudrates[sensor_config.baudrate_index]);
- 800197c:	4b29      	ldr	r3, [pc, #164]	; (8001a24 <main+0x250>)
- 800197e:	691a      	ldr	r2, [r3, #16]
- 8001980:	4b3d      	ldr	r3, [pc, #244]	; (8001a78 <main+0x2a4>)
- 8001982:	0092      	lsls	r2, r2, #2
- 8001984:	58d3      	ldr	r3, [r2, r3]
- 8001986:	493d      	ldr	r1, [pc, #244]	; (8001a7c <main+0x2a8>)
- 8001988:	482a      	ldr	r0, [pc, #168]	; (8001a34 <main+0x260>)
- 800198a:	2200      	movs	r2, #0
- 800198c:	f7ff fda4 	bl	80014d8 <LL_USART_SetBaudRate>
+ 80015e8:	4b32      	ldr	r3, [pc, #200]	; (80016b4 <main+0x284>)
+ 80015ea:	689a      	ldr	r2, [r3, #8]
+ 80015ec:	4b44      	ldr	r3, [pc, #272]	; (8001700 <main+0x2d0>)
+ 80015ee:	0092      	lsls	r2, r2, #2
+ 80015f0:	58d3      	ldr	r3, [r2, r3]
+ 80015f2:	4944      	ldr	r1, [pc, #272]	; (8001704 <main+0x2d4>)
+ 80015f4:	4831      	ldr	r0, [pc, #196]	; (80016bc <main+0x28c>)
+ 80015f6:	2200      	movs	r2, #0
+ 80015f8:	f7ff fd08 	bl	800100c <LL_USART_SetBaudRate>
 		  uart_enable_interrupts();
- 8001990:	f000 faec 	bl	8001f6c <uart_enable_interrupts>
+ 80015fc:	f000 fafc 	bl	8001bf8 <uart_enable_interrupts>
 		  LL_USART_EnableDirectionRx(USART2);
- 8001994:	4b27      	ldr	r3, [pc, #156]	; (8001a34 <main+0x260>)
- 8001996:	0018      	movs	r0, r3
- 8001998:	f7ff fd60 	bl	800145c <LL_USART_EnableDirectionRx>
+ 8001600:	4b2e      	ldr	r3, [pc, #184]	; (80016bc <main+0x28c>)
+ 8001602:	0018      	movs	r0, r3
+ 8001604:	f7ff fcc4 	bl	8000f90 <LL_USART_EnableDirectionRx>
 		  LL_USART_EnableDirectionTx(USART2);
- 800199c:	4b25      	ldr	r3, [pc, #148]	; (8001a34 <main+0x260>)
- 800199e:	0018      	movs	r0, r3
- 80019a0:	f7ff fd7b 	bl	800149a <LL_USART_EnableDirectionTx>
+ 8001608:	4b2c      	ldr	r3, [pc, #176]	; (80016bc <main+0x28c>)
+ 800160a:	0018      	movs	r0, r3
+ 800160c:	f7ff fcdf 	bl	8000fce <LL_USART_EnableDirectionTx>
 		  baudrate_changed = 0;
- 80019a4:	4b33      	ldr	r3, [pc, #204]	; (8001a74 <main+0x2a0>)
- 80019a6:	2200      	movs	r2, #0
- 80019a8:	701a      	strb	r2, [r3, #0]
+ 8001610:	4b3a      	ldr	r3, [pc, #232]	; (80016fc <main+0x2cc>)
+ 8001612:	2200      	movs	r2, #0
+ 8001614:	701a      	strb	r2, [r3, #0]
 
 		  new_baud = LL_USART_GetBaudRate(USART2, SYSTICK_FREQ_HZ, LL_USART_OVERSAMPLING_16);
- 80019aa:	4934      	ldr	r1, [pc, #208]	; (8001a7c <main+0x2a8>)
- 80019ac:	4b21      	ldr	r3, [pc, #132]	; (8001a34 <main+0x260>)
- 80019ae:	2200      	movs	r2, #0
- 80019b0:	0018      	movs	r0, r3
- 80019b2:	f7ff fdcd 	bl	8001550 <LL_USART_GetBaudRate>
- 80019b6:	0002      	movs	r2, r0
- 80019b8:	4b31      	ldr	r3, [pc, #196]	; (8001a80 <main+0x2ac>)
- 80019ba:	601a      	str	r2, [r3, #0]
+ 8001616:	493b      	ldr	r1, [pc, #236]	; (8001704 <main+0x2d4>)
+ 8001618:	4b28      	ldr	r3, [pc, #160]	; (80016bc <main+0x28c>)
+ 800161a:	2200      	movs	r2, #0
+ 800161c:	0018      	movs	r0, r3
+ 800161e:	f7ff fd31 	bl	8001084 <LL_USART_GetBaudRate>
+ 8001622:	0002      	movs	r2, r0
+ 8001624:	4b38      	ldr	r3, [pc, #224]	; (8001708 <main+0x2d8>)
+ 8001626:	601a      	str	r2, [r3, #0]
+	  }
+	  if(ltr329_config_changed)
+ 8001628:	4b38      	ldr	r3, [pc, #224]	; (800170c <main+0x2dc>)
+ 800162a:	781b      	ldrb	r3, [r3, #0]
+ 800162c:	2b00      	cmp	r3, #0
+ 800162e:	d00c      	beq.n	800164a <main+0x21a>
+	  {
+		  ltr329_write_settings(sensor_config.ltr329_gain, sensor_config.ltr329_mode, sensor_config.ltr329_integ_time, sensor_config.ltr329_meas_rate);
+ 8001630:	4b20      	ldr	r3, [pc, #128]	; (80016b4 <main+0x284>)
+ 8001632:	7818      	ldrb	r0, [r3, #0]
+ 8001634:	4b1f      	ldr	r3, [pc, #124]	; (80016b4 <main+0x284>)
+ 8001636:	7859      	ldrb	r1, [r3, #1]
+ 8001638:	4b1e      	ldr	r3, [pc, #120]	; (80016b4 <main+0x284>)
+ 800163a:	789a      	ldrb	r2, [r3, #2]
+ 800163c:	4b1d      	ldr	r3, [pc, #116]	; (80016b4 <main+0x284>)
+ 800163e:	78db      	ldrb	r3, [r3, #3]
+ 8001640:	f001 fcb7 	bl	8002fb2 <ltr329_write_settings>
+		  ltr329_config_changed = 0;
+ 8001644:	4b31      	ldr	r3, [pc, #196]	; (800170c <main+0x2dc>)
+ 8001646:	2200      	movs	r2, #0
+ 8001648:	701a      	strb	r2, [r3, #0]
 	  }
 	  /* It is time for measurement */
 	  if (tim21_elapsed_period == 1)
- 80019bc:	4b31      	ldr	r3, [pc, #196]	; (8001a84 <main+0x2b0>)
- 80019be:	781b      	ldrb	r3, [r3, #0]
- 80019c0:	2b01      	cmp	r3, #1
- 80019c2:	d190      	bne.n	80018e6 <main+0x112>
+ 800164a:	4b31      	ldr	r3, [pc, #196]	; (8001710 <main+0x2e0>)
+ 800164c:	781b      	ldrb	r3, [r3, #0]
+ 800164e:	2b01      	cmp	r3, #1
+ 8001650:	d000      	beq.n	8001654 <main+0x224>
+ 8001652:	e77a      	b.n	800154a <main+0x11a>
 	  {
 		  /* TODO: Check the data */
 		  /* Read SHT4x data (always connected) */
 		  sht4x_measure(&T_SHT4x, &RH_SHT4x);
- 80019c4:	4a30      	ldr	r2, [pc, #192]	; (8001a88 <main+0x2b4>)
- 80019c6:	4b31      	ldr	r3, [pc, #196]	; (8001a8c <main+0x2b8>)
- 80019c8:	0011      	movs	r1, r2
- 80019ca:	0018      	movs	r0, r3
- 80019cc:	f001 f9b2 	bl	8002d34 <sht4x_measure>
+ 8001654:	4a2f      	ldr	r2, [pc, #188]	; (8001714 <main+0x2e4>)
+ 8001656:	4b30      	ldr	r3, [pc, #192]	; (8001718 <main+0x2e8>)
+ 8001658:	0011      	movs	r1, r2
+ 800165a:	0018      	movs	r0, r3
+ 800165c:	f002 fb86 	bl	8003d6c <sht4x_measure>
 		  TF_SHT4x = CELSIUS_TO_FAHRENHEIT(T_SHT4x);
- 80019d0:	4b2e      	ldr	r3, [pc, #184]	; (8001a8c <main+0x2b8>)
- 80019d2:	2200      	movs	r2, #0
- 80019d4:	5e9b      	ldrsh	r3, [r3, r2]
- 80019d6:	001a      	movs	r2, r3
- 80019d8:	0013      	movs	r3, r2
- 80019da:	00db      	lsls	r3, r3, #3
- 80019dc:	189b      	adds	r3, r3, r2
- 80019de:	2105      	movs	r1, #5
- 80019e0:	0018      	movs	r0, r3
- 80019e2:	f7fe fc23 	bl	800022c <__divsi3>
- 80019e6:	0003      	movs	r3, r0
- 80019e8:	b29b      	uxth	r3, r3
- 80019ea:	3341      	adds	r3, #65	; 0x41
- 80019ec:	33ff      	adds	r3, #255	; 0xff
- 80019ee:	b29b      	uxth	r3, r3
- 80019f0:	b21a      	sxth	r2, r3
- 80019f2:	4b27      	ldr	r3, [pc, #156]	; (8001a90 <main+0x2bc>)
- 80019f4:	801a      	strh	r2, [r3, #0]
+ 8001660:	4b2d      	ldr	r3, [pc, #180]	; (8001718 <main+0x2e8>)
+ 8001662:	2200      	movs	r2, #0
+ 8001664:	5e9b      	ldrsh	r3, [r3, r2]
+ 8001666:	001a      	movs	r2, r3
+ 8001668:	0013      	movs	r3, r2
+ 800166a:	00db      	lsls	r3, r3, #3
+ 800166c:	189b      	adds	r3, r3, r2
+ 800166e:	2105      	movs	r1, #5
+ 8001670:	0018      	movs	r0, r3
+ 8001672:	f7fe fddb 	bl	800022c <__divsi3>
+ 8001676:	0003      	movs	r3, r0
+ 8001678:	b29b      	uxth	r3, r3
+ 800167a:	3341      	adds	r3, #65	; 0x41
+ 800167c:	33ff      	adds	r3, #255	; 0xff
+ 800167e:	b29b      	uxth	r3, r3
+ 8001680:	b21a      	sxth	r2, r3
+ 8001682:	4b26      	ldr	r3, [pc, #152]	; (800171c <main+0x2ec>)
+ 8001684:	801a      	strh	r2, [r3, #0]
 
 		  /* Red LTR329 values */
 		  uint8_t data_valid, new_data;
 		  ltr329_gain_t set_gain;
 		  ltr_ret = ltr329_read_status_register(&data_valid, &new_data, &set_gain);
- 80019f6:	250e      	movs	r5, #14
- 80019f8:	197c      	adds	r4, r7, r5
- 80019fa:	1d7a      	adds	r2, r7, #5
- 80019fc:	1db9      	adds	r1, r7, #6
- 80019fe:	1dfb      	adds	r3, r7, #7
- 8001a00:	0018      	movs	r0, r3
- 8001a02:	f7ff f968 	bl	8000cd6 <ltr329_read_status_register>
- 8001a06:	0003      	movs	r3, r0
- 8001a08:	7023      	strb	r3, [r4, #0]
+ 8001686:	250e      	movs	r5, #14
+ 8001688:	197c      	adds	r4, r7, r5
+ 800168a:	1c7a      	adds	r2, r7, #1
+ 800168c:	1cb9      	adds	r1, r7, #2
+ 800168e:	1cfb      	adds	r3, r7, #3
+ 8001690:	0018      	movs	r0, r3
+ 8001692:	f001 fd92 	bl	80031ba <ltr329_read_status_register>
+ 8001696:	0003      	movs	r3, r0
+ 8001698:	7023      	strb	r3, [r4, #0]
 		  /* TODO: Do something with the flags */
 		  ltr_ret = ltr329_measure(&light_ch0, &light_ch1);
- 8001a0a:	197c      	adds	r4, r7, r5
- 8001a0c:	4a21      	ldr	r2, [pc, #132]	; (8001a94 <main+0x2c0>)
- 8001a0e:	4b22      	ldr	r3, [pc, #136]	; (8001a98 <main+0x2c4>)
- 8001a10:	0011      	movs	r1, r2
- 8001a12:	0018      	movs	r0, r3
- 8001a14:	f7ff f901 	bl	8000c1a <ltr329_measure>
- 8001a18:	0003      	movs	r3, r0
- 8001a1a:	7023      	strb	r3, [r4, #0]
+ 800169a:	197c      	adds	r4, r7, r5
+ 800169c:	4a20      	ldr	r2, [pc, #128]	; (8001720 <main+0x2f0>)
+ 800169e:	4b21      	ldr	r3, [pc, #132]	; (8001724 <main+0x2f4>)
+ 80016a0:	0011      	movs	r1, r2
+ 80016a2:	0018      	movs	r0, r3
+ 80016a4:	f001 fd2b 	bl	80030fe <ltr329_measure>
+ 80016a8:	0003      	movs	r3, r0
+ 80016aa:	7023      	strb	r3, [r4, #0]
 
 		  /* Reset the TIM21 Elapsed Period Flag */
 		  tim21_elapsed_period = 0;
- 8001a1c:	4b19      	ldr	r3, [pc, #100]	; (8001a84 <main+0x2b0>)
- 8001a1e:	2200      	movs	r2, #0
- 8001a20:	701a      	strb	r2, [r3, #0]
+ 80016ac:	4b18      	ldr	r3, [pc, #96]	; (8001710 <main+0x2e0>)
+ 80016ae:	2200      	movs	r2, #0
+ 80016b0:	701a      	strb	r2, [r3, #0]
 	  LL_IWDG_ReloadCounter(IWDG);
- 8001a22:	e760      	b.n	80018e6 <main+0x112>
- 8001a24:	20000068 	.word	0x20000068
- 8001a28:	000005dc 	.word	0x000005dc
- 8001a2c:	00000bb8 	.word	0x00000bb8
- 8001a30:	40005400 	.word	0x40005400
- 8001a34:	40004400 	.word	0x40004400
- 8001a38:	40010800 	.word	0x40010800
- 8001a3c:	20000044 	.word	0x20000044
- 8001a40:	08003bc8 	.word	0x08003bc8
- 8001a44:	08003bd4 	.word	0x08003bd4
- 8001a48:	08003bdc 	.word	0x08003bdc
- 8001a4c:	08003be0 	.word	0x08003be0
- 8001a50:	08003bf8 	.word	0x08003bf8
- 8001a54:	08003c04 	.word	0x08003c04
- 8001a58:	40003000 	.word	0x40003000
- 8001a5c:	20000038 	.word	0x20000038
- 8001a60:	20000039 	.word	0x20000039
- 8001a64:	20000036 	.word	0x20000036
- 8001a68:	20000084 	.word	0x20000084
- 8001a6c:	20000028 	.word	0x20000028
- 8001a70:	2000002a 	.word	0x2000002a
- 8001a74:	20000029 	.word	0x20000029
- 8001a78:	08003c0c 	.word	0x08003c0c
- 8001a7c:	00b71b00 	.word	0x00b71b00
- 8001a80:	2000002c 	.word	0x2000002c
- 8001a84:	2000003a 	.word	0x2000003a
- 8001a88:	20000080 	.word	0x20000080
- 8001a8c:	2000003c 	.word	0x2000003c
- 8001a90:	2000007c 	.word	0x2000007c
- 8001a94:	2000003e 	.word	0x2000003e
- 8001a98:	2000007e 	.word	0x2000007e
+ 80016b2:	e74a      	b.n	800154a <main+0x11a>
+ 80016b4:	20000068 	.word	0x20000068
+ 80016b8:	40005400 	.word	0x40005400
+ 80016bc:	40004400 	.word	0x40004400
+ 80016c0:	40010800 	.word	0x40010800
+ 80016c4:	20000044 	.word	0x20000044
+ 80016c8:	08003f58 	.word	0x08003f58
+ 80016cc:	08003f64 	.word	0x08003f64
+ 80016d0:	08003f6c 	.word	0x08003f6c
+ 80016d4:	08003f70 	.word	0x08003f70
+ 80016d8:	08003f88 	.word	0x08003f88
+ 80016dc:	08003f94 	.word	0x08003f94
+ 80016e0:	40003000 	.word	0x40003000
+ 80016e4:	20000034 	.word	0x20000034
+ 80016e8:	20000035 	.word	0x20000035
+ 80016ec:	20000032 	.word	0x20000032
+ 80016f0:	2000007c 	.word	0x2000007c
+ 80016f4:	20000028 	.word	0x20000028
+ 80016f8:	2000002b 	.word	0x2000002b
+ 80016fc:	20000029 	.word	0x20000029
+ 8001700:	08003f9c 	.word	0x08003f9c
+ 8001704:	00b71b00 	.word	0x00b71b00
+ 8001708:	2000002c 	.word	0x2000002c
+ 800170c:	2000002a 	.word	0x2000002a
+ 8001710:	20000036 	.word	0x20000036
+ 8001714:	20000078 	.word	0x20000078
+ 8001718:	2000003c 	.word	0x2000003c
+ 800171c:	20000074 	.word	0x20000074
+ 8001720:	2000003e 	.word	0x2000003e
+ 8001724:	20000076 	.word	0x20000076
 
-08001a9c <SystemClock_Config>:
+08001728 <SystemClock_Config>:
 /**
   * @brief System Clock Configuration
   * @retval None
   */
 void SystemClock_Config(void)
 {
- 8001a9c:	b580      	push	{r7, lr}
- 8001a9e:	af00      	add	r7, sp, #0
+ 8001728:	b580      	push	{r7, lr}
+ 800172a:	af00      	add	r7, sp, #0
   LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
- 8001aa0:	2000      	movs	r0, #0
- 8001aa2:	f7ff fc29 	bl	80012f8 <LL_FLASH_SetLatency>
+ 800172c:	2000      	movs	r0, #0
+ 800172e:	f7ff fb7d 	bl	8000e2c <LL_FLASH_SetLatency>
   while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_0)
- 8001aa6:	46c0      	nop			; (mov r8, r8)
- 8001aa8:	f7ff fc3a 	bl	8001320 <LL_FLASH_GetLatency>
- 8001aac:	1e03      	subs	r3, r0, #0
- 8001aae:	d1fb      	bne.n	8001aa8 <SystemClock_Config+0xc>
+ 8001732:	46c0      	nop			; (mov r8, r8)
+ 8001734:	f7ff fb8e 	bl	8000e54 <LL_FLASH_GetLatency>
+ 8001738:	1e03      	subs	r3, r0, #0
+ 800173a:	d1fb      	bne.n	8001734 <SystemClock_Config+0xc>
   {
   }
   LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
- 8001ab0:	2380      	movs	r3, #128	; 0x80
- 8001ab2:	011b      	lsls	r3, r3, #4
- 8001ab4:	0018      	movs	r0, r3
- 8001ab6:	f7ff fc3f 	bl	8001338 <LL_PWR_SetRegulVoltageScaling>
+ 800173c:	2380      	movs	r3, #128	; 0x80
+ 800173e:	011b      	lsls	r3, r3, #4
+ 8001740:	0018      	movs	r0, r3
+ 8001742:	f7ff fb93 	bl	8000e6c <LL_PWR_SetRegulVoltageScaling>
   LL_RCC_HSI_Enable();
- 8001aba:	f7ff fab7 	bl	800102c <LL_RCC_HSI_Enable>
+ 8001746:	f7ff fa0b 	bl	8000b60 <LL_RCC_HSI_Enable>
 
    /* Wait till HSI is ready */
   while(LL_RCC_HSI_IsReady() != 1)
- 8001abe:	46c0      	nop			; (mov r8, r8)
- 8001ac0:	f7ff fac2 	bl	8001048 <LL_RCC_HSI_IsReady>
- 8001ac4:	0003      	movs	r3, r0
- 8001ac6:	2b01      	cmp	r3, #1
- 8001ac8:	d1fa      	bne.n	8001ac0 <SystemClock_Config+0x24>
+ 800174a:	46c0      	nop			; (mov r8, r8)
+ 800174c:	f7ff fa16 	bl	8000b7c <LL_RCC_HSI_IsReady>
+ 8001750:	0003      	movs	r3, r0
+ 8001752:	2b01      	cmp	r3, #1
+ 8001754:	d1fa      	bne.n	800174c <SystemClock_Config+0x24>
   {
 
   }
   LL_RCC_HSI_SetCalibTrimming(16);
- 8001aca:	2010      	movs	r0, #16
- 8001acc:	f7ff facc 	bl	8001068 <LL_RCC_HSI_SetCalibTrimming>
+ 8001756:	2010      	movs	r0, #16
+ 8001758:	f7ff fa20 	bl	8000b9c <LL_RCC_HSI_SetCalibTrimming>
   LL_RCC_LSI_Enable();
- 8001ad0:	f7ff fae0 	bl	8001094 <LL_RCC_LSI_Enable>
+ 800175c:	f7ff fa34 	bl	8000bc8 <LL_RCC_LSI_Enable>
 
    /* Wait till LSI is ready */
   while(LL_RCC_LSI_IsReady() != 1)
- 8001ad4:	46c0      	nop			; (mov r8, r8)
- 8001ad6:	f7ff faeb 	bl	80010b0 <LL_RCC_LSI_IsReady>
- 8001ada:	0003      	movs	r3, r0
- 8001adc:	2b01      	cmp	r3, #1
- 8001ade:	d1fa      	bne.n	8001ad6 <SystemClock_Config+0x3a>
+ 8001760:	46c0      	nop			; (mov r8, r8)
+ 8001762:	f7ff fa3f 	bl	8000be4 <LL_RCC_LSI_IsReady>
+ 8001766:	0003      	movs	r3, r0
+ 8001768:	2b01      	cmp	r3, #1
+ 800176a:	d1fa      	bne.n	8001762 <SystemClock_Config+0x3a>
   {
 
   }
   LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLL_MUL_3, LL_RCC_PLL_DIV_4);
- 8001ae0:	23c0      	movs	r3, #192	; 0xc0
- 8001ae2:	041b      	lsls	r3, r3, #16
- 8001ae4:	001a      	movs	r2, r3
- 8001ae6:	2100      	movs	r1, #0
- 8001ae8:	2000      	movs	r0, #0
- 8001aea:	f7ff fba7 	bl	800123c <LL_RCC_PLL_ConfigDomain_SYS>
+ 800176c:	23c0      	movs	r3, #192	; 0xc0
+ 800176e:	041b      	lsls	r3, r3, #16
+ 8001770:	001a      	movs	r2, r3
+ 8001772:	2100      	movs	r1, #0
+ 8001774:	2000      	movs	r0, #0
+ 8001776:	f7ff fafb 	bl	8000d70 <LL_RCC_PLL_ConfigDomain_SYS>
   LL_RCC_PLL_Enable();
- 8001aee:	f7ff fb83 	bl	80011f8 <LL_RCC_PLL_Enable>
+ 800177a:	f7ff fad7 	bl	8000d2c <LL_RCC_PLL_Enable>
 
    /* Wait till PLL is ready */
   while(LL_RCC_PLL_IsReady() != 1)
- 8001af2:	46c0      	nop			; (mov r8, r8)
- 8001af4:	f7ff fb8e 	bl	8001214 <LL_RCC_PLL_IsReady>
- 8001af8:	0003      	movs	r3, r0
- 8001afa:	2b01      	cmp	r3, #1
- 8001afc:	d1fa      	bne.n	8001af4 <SystemClock_Config+0x58>
+ 800177e:	46c0      	nop			; (mov r8, r8)
+ 8001780:	f7ff fae2 	bl	8000d48 <LL_RCC_PLL_IsReady>
+ 8001784:	0003      	movs	r3, r0
+ 8001786:	2b01      	cmp	r3, #1
+ 8001788:	d1fa      	bne.n	8001780 <SystemClock_Config+0x58>
   {
 
   }
   LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
- 8001afe:	2000      	movs	r0, #0
- 8001b00:	f7ff fb06 	bl	8001110 <LL_RCC_SetAHBPrescaler>
+ 800178a:	2000      	movs	r0, #0
+ 800178c:	f7ff fa5a 	bl	8000c44 <LL_RCC_SetAHBPrescaler>
   LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
- 8001b04:	2000      	movs	r0, #0
- 8001b06:	f7ff fb17 	bl	8001138 <LL_RCC_SetAPB1Prescaler>
+ 8001790:	2000      	movs	r0, #0
+ 8001792:	f7ff fa6b 	bl	8000c6c <LL_RCC_SetAPB1Prescaler>
   LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
- 8001b0a:	2000      	movs	r0, #0
- 8001b0c:	f7ff fb2a 	bl	8001164 <LL_RCC_SetAPB2Prescaler>
+ 8001796:	2000      	movs	r0, #0
+ 8001798:	f7ff fa7e 	bl	8000c98 <LL_RCC_SetAPB2Prescaler>
   LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
- 8001b10:	2003      	movs	r0, #3
- 8001b12:	f7ff fadd 	bl	80010d0 <LL_RCC_SetSysClkSource>
+ 800179c:	2003      	movs	r0, #3
+ 800179e:	f7ff fa31 	bl	8000c04 <LL_RCC_SetSysClkSource>
 
    /* Wait till System clock is ready */
   while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
- 8001b16:	46c0      	nop			; (mov r8, r8)
- 8001b18:	f7ff faee 	bl	80010f8 <LL_RCC_GetSysClkSource>
- 8001b1c:	0003      	movs	r3, r0
- 8001b1e:	2b0c      	cmp	r3, #12
- 8001b20:	d1fa      	bne.n	8001b18 <SystemClock_Config+0x7c>
+ 80017a2:	46c0      	nop			; (mov r8, r8)
+ 80017a4:	f7ff fa42 	bl	8000c2c <LL_RCC_GetSysClkSource>
+ 80017a8:	0003      	movs	r3, r0
+ 80017aa:	2b0c      	cmp	r3, #12
+ 80017ac:	d1fa      	bne.n	80017a4 <SystemClock_Config+0x7c>
   {
 
   }
 
   LL_Init1msTick(12000000);
- 8001b22:	4b0a      	ldr	r3, [pc, #40]	; (8001b4c <SystemClock_Config+0xb0>)
- 8001b24:	0018      	movs	r0, r3
- 8001b26:	f001 ffc3 	bl	8003ab0 <LL_Init1msTick>
+ 80017ae:	4b0a      	ldr	r3, [pc, #40]	; (80017d8 <SystemClock_Config+0xb0>)
+ 80017b0:	0018      	movs	r0, r3
+ 80017b2:	f001 fb01 	bl	8002db8 <LL_Init1msTick>
 
   LL_SetSystemCoreClock(12000000);
- 8001b2a:	4b08      	ldr	r3, [pc, #32]	; (8001b4c <SystemClock_Config+0xb0>)
- 8001b2c:	0018      	movs	r0, r3
- 8001b2e:	f001 fff1 	bl	8003b14 <LL_SetSystemCoreClock>
+ 80017b6:	4b08      	ldr	r3, [pc, #32]	; (80017d8 <SystemClock_Config+0xb0>)
+ 80017b8:	0018      	movs	r0, r3
+ 80017ba:	f001 fb2f 	bl	8002e1c <LL_SetSystemCoreClock>
   LL_RCC_SetUSARTClockSource(LL_RCC_USART2_CLKSOURCE_PCLK1);
- 8001b32:	23c0      	movs	r3, #192	; 0xc0
- 8001b34:	031b      	lsls	r3, r3, #12
- 8001b36:	0018      	movs	r0, r3
- 8001b38:	f7ff fb2a 	bl	8001190 <LL_RCC_SetUSARTClockSource>
+ 80017be:	23c0      	movs	r3, #192	; 0xc0
+ 80017c0:	031b      	lsls	r3, r3, #12
+ 80017c2:	0018      	movs	r0, r3
+ 80017c4:	f7ff fa7e 	bl	8000cc4 <LL_RCC_SetUSARTClockSource>
   LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1);
- 8001b3c:	23c0      	movs	r3, #192	; 0xc0
- 8001b3e:	029b      	lsls	r3, r3, #10
- 8001b40:	0018      	movs	r0, r3
- 8001b42:	f7ff fb3d 	bl	80011c0 <LL_RCC_SetI2CClockSource>
+ 80017c8:	23c0      	movs	r3, #192	; 0xc0
+ 80017ca:	029b      	lsls	r3, r3, #10
+ 80017cc:	0018      	movs	r0, r3
+ 80017ce:	f7ff fa91 	bl	8000cf4 <LL_RCC_SetI2CClockSource>
 }
- 8001b46:	46c0      	nop			; (mov r8, r8)
- 8001b48:	46bd      	mov	sp, r7
- 8001b4a:	bd80      	pop	{r7, pc}
- 8001b4c:	00b71b00 	.word	0x00b71b00
+ 80017d2:	46c0      	nop			; (mov r8, r8)
+ 80017d4:	46bd      	mov	sp, r7
+ 80017d6:	bd80      	pop	{r7, pc}
+ 80017d8:	00b71b00 	.word	0x00b71b00
 
-08001b50 <MX_I2C1_Init>:
+080017dc <MX_I2C1_Init>:
   * @brief I2C1 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_I2C1_Init(void)
 {
- 8001b50:	b590      	push	{r4, r7, lr}
- 8001b52:	b08f      	sub	sp, #60	; 0x3c
- 8001b54:	af00      	add	r7, sp, #0
+ 80017dc:	b590      	push	{r4, r7, lr}
+ 80017de:	b08f      	sub	sp, #60	; 0x3c
+ 80017e0:	af00      	add	r7, sp, #0
 
   /* USER CODE BEGIN I2C1_Init 0 */
 
   /* USER CODE END I2C1_Init 0 */
 
   LL_I2C_InitTypeDef I2C_InitStruct = {0};
- 8001b56:	241c      	movs	r4, #28
- 8001b58:	193b      	adds	r3, r7, r4
- 8001b5a:	0018      	movs	r0, r3
- 8001b5c:	231c      	movs	r3, #28
- 8001b5e:	001a      	movs	r2, r3
- 8001b60:	2100      	movs	r1, #0
- 8001b62:	f002 f809 	bl	8003b78 <memset>
+ 80017e2:	241c      	movs	r4, #28
+ 80017e4:	193b      	adds	r3, r7, r4
+ 80017e6:	0018      	movs	r0, r3
+ 80017e8:	231c      	movs	r3, #28
+ 80017ea:	001a      	movs	r2, r3
+ 80017ec:	2100      	movs	r1, #0
+ 80017ee:	f002 fb8b 	bl	8003f08 <memset>
 
   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8001b66:	1d3b      	adds	r3, r7, #4
- 8001b68:	0018      	movs	r0, r3
- 8001b6a:	2318      	movs	r3, #24
- 8001b6c:	001a      	movs	r2, r3
- 8001b6e:	2100      	movs	r1, #0
- 8001b70:	f002 f802 	bl	8003b78 <memset>
+ 80017f2:	1d3b      	adds	r3, r7, #4
+ 80017f4:	0018      	movs	r0, r3
+ 80017f6:	2318      	movs	r3, #24
+ 80017f8:	001a      	movs	r2, r3
+ 80017fa:	2100      	movs	r1, #0
+ 80017fc:	f002 fb84 	bl	8003f08 <memset>
 
   LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
- 8001b74:	2001      	movs	r0, #1
- 8001b76:	f7ff fba9 	bl	80012cc <LL_IOP_GRP1_EnableClock>
+ 8001800:	2001      	movs	r0, #1
+ 8001802:	f7ff fafd 	bl	8000e00 <LL_IOP_GRP1_EnableClock>
   /**I2C1 GPIO Configuration
   PA9   ------> I2C1_SCL
   PA10   ------> I2C1_SDA
   */
   GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
- 8001b7a:	1d3b      	adds	r3, r7, #4
- 8001b7c:	2280      	movs	r2, #128	; 0x80
- 8001b7e:	0092      	lsls	r2, r2, #2
- 8001b80:	601a      	str	r2, [r3, #0]
+ 8001806:	1d3b      	adds	r3, r7, #4
+ 8001808:	2280      	movs	r2, #128	; 0x80
+ 800180a:	0092      	lsls	r2, r2, #2
+ 800180c:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8001b82:	1d3b      	adds	r3, r7, #4
- 8001b84:	2202      	movs	r2, #2
- 8001b86:	605a      	str	r2, [r3, #4]
+ 800180e:	1d3b      	adds	r3, r7, #4
+ 8001810:	2202      	movs	r2, #2
+ 8001812:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8001b88:	1d3b      	adds	r3, r7, #4
- 8001b8a:	2203      	movs	r2, #3
- 8001b8c:	609a      	str	r2, [r3, #8]
+ 8001814:	1d3b      	adds	r3, r7, #4
+ 8001816:	2203      	movs	r2, #3
+ 8001818:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
- 8001b8e:	1d3b      	adds	r3, r7, #4
- 8001b90:	2201      	movs	r2, #1
- 8001b92:	60da      	str	r2, [r3, #12]
+ 800181a:	1d3b      	adds	r3, r7, #4
+ 800181c:	2201      	movs	r2, #1
+ 800181e:	60da      	str	r2, [r3, #12]
   GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
- 8001b94:	1d3b      	adds	r3, r7, #4
- 8001b96:	2201      	movs	r2, #1
- 8001b98:	611a      	str	r2, [r3, #16]
+ 8001820:	1d3b      	adds	r3, r7, #4
+ 8001822:	2201      	movs	r2, #1
+ 8001824:	611a      	str	r2, [r3, #16]
   GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
- 8001b9a:	1d3b      	adds	r3, r7, #4
- 8001b9c:	2201      	movs	r2, #1
- 8001b9e:	615a      	str	r2, [r3, #20]
+ 8001826:	1d3b      	adds	r3, r7, #4
+ 8001828:	2201      	movs	r2, #1
+ 800182a:	615a      	str	r2, [r3, #20]
   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8001ba0:	1d3a      	adds	r2, r7, #4
- 8001ba2:	23a0      	movs	r3, #160	; 0xa0
- 8001ba4:	05db      	lsls	r3, r3, #23
- 8001ba6:	0011      	movs	r1, r2
- 8001ba8:	0018      	movs	r0, r3
- 8001baa:	f001 fb49 	bl	8003240 <LL_GPIO_Init>
+ 800182c:	1d3a      	adds	r2, r7, #4
+ 800182e:	23a0      	movs	r3, #160	; 0xa0
+ 8001830:	05db      	lsls	r3, r3, #23
+ 8001832:	0011      	movs	r1, r2
+ 8001834:	0018      	movs	r0, r3
+ 8001836:	f000 fe87 	bl	8002548 <LL_GPIO_Init>
 
   GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
- 8001bae:	1d3b      	adds	r3, r7, #4
- 8001bb0:	2280      	movs	r2, #128	; 0x80
- 8001bb2:	00d2      	lsls	r2, r2, #3
- 8001bb4:	601a      	str	r2, [r3, #0]
+ 800183a:	1d3b      	adds	r3, r7, #4
+ 800183c:	2280      	movs	r2, #128	; 0x80
+ 800183e:	00d2      	lsls	r2, r2, #3
+ 8001840:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8001bb6:	1d3b      	adds	r3, r7, #4
- 8001bb8:	2202      	movs	r2, #2
- 8001bba:	605a      	str	r2, [r3, #4]
+ 8001842:	1d3b      	adds	r3, r7, #4
+ 8001844:	2202      	movs	r2, #2
+ 8001846:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8001bbc:	1d3b      	adds	r3, r7, #4
- 8001bbe:	2203      	movs	r2, #3
- 8001bc0:	609a      	str	r2, [r3, #8]
+ 8001848:	1d3b      	adds	r3, r7, #4
+ 800184a:	2203      	movs	r2, #3
+ 800184c:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
- 8001bc2:	1d3b      	adds	r3, r7, #4
- 8001bc4:	2201      	movs	r2, #1
- 8001bc6:	60da      	str	r2, [r3, #12]
+ 800184e:	1d3b      	adds	r3, r7, #4
+ 8001850:	2201      	movs	r2, #1
+ 8001852:	60da      	str	r2, [r3, #12]
   GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
- 8001bc8:	1d3b      	adds	r3, r7, #4
- 8001bca:	2201      	movs	r2, #1
- 8001bcc:	611a      	str	r2, [r3, #16]
+ 8001854:	1d3b      	adds	r3, r7, #4
+ 8001856:	2201      	movs	r2, #1
+ 8001858:	611a      	str	r2, [r3, #16]
   GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
- 8001bce:	1d3b      	adds	r3, r7, #4
- 8001bd0:	2201      	movs	r2, #1
- 8001bd2:	615a      	str	r2, [r3, #20]
+ 800185a:	1d3b      	adds	r3, r7, #4
+ 800185c:	2201      	movs	r2, #1
+ 800185e:	615a      	str	r2, [r3, #20]
   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8001bd4:	1d3a      	adds	r2, r7, #4
- 8001bd6:	23a0      	movs	r3, #160	; 0xa0
- 8001bd8:	05db      	lsls	r3, r3, #23
- 8001bda:	0011      	movs	r1, r2
- 8001bdc:	0018      	movs	r0, r3
- 8001bde:	f001 fb2f 	bl	8003240 <LL_GPIO_Init>
+ 8001860:	1d3a      	adds	r2, r7, #4
+ 8001862:	23a0      	movs	r3, #160	; 0xa0
+ 8001864:	05db      	lsls	r3, r3, #23
+ 8001866:	0011      	movs	r1, r2
+ 8001868:	0018      	movs	r0, r3
+ 800186a:	f000 fe6d 	bl	8002548 <LL_GPIO_Init>
 
   /* Peripheral clock enable */
   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
- 8001be2:	2380      	movs	r3, #128	; 0x80
- 8001be4:	039b      	lsls	r3, r3, #14
- 8001be6:	0018      	movs	r0, r3
- 8001be8:	f7ff fb44 	bl	8001274 <LL_APB1_GRP1_EnableClock>
+ 800186e:	2380      	movs	r3, #128	; 0x80
+ 8001870:	039b      	lsls	r3, r3, #14
+ 8001872:	0018      	movs	r0, r3
+ 8001874:	f7ff fa98 	bl	8000da8 <LL_APB1_GRP1_EnableClock>
   /* USER CODE BEGIN I2C1_Init 1 */
 
   /* USER CODE END I2C1_Init 1 */
   /** I2C Initialization
   */
   LL_I2C_EnableAutoEndMode(I2C1);
- 8001bec:	4b1a      	ldr	r3, [pc, #104]	; (8001c58 <MX_I2C1_Init+0x108>)
- 8001bee:	0018      	movs	r0, r3
- 8001bf0:	f7ff f9b6 	bl	8000f60 <LL_I2C_EnableAutoEndMode>
+ 8001878:	4b1a      	ldr	r3, [pc, #104]	; (80018e4 <MX_I2C1_Init+0x108>)
+ 800187a:	0018      	movs	r0, r3
+ 800187c:	f7ff f90a 	bl	8000a94 <LL_I2C_EnableAutoEndMode>
   LL_I2C_DisableOwnAddress2(I2C1);
- 8001bf4:	4b18      	ldr	r3, [pc, #96]	; (8001c58 <MX_I2C1_Init+0x108>)
- 8001bf6:	0018      	movs	r0, r3
- 8001bf8:	f7ff f9a2 	bl	8000f40 <LL_I2C_DisableOwnAddress2>
+ 8001880:	4b18      	ldr	r3, [pc, #96]	; (80018e4 <MX_I2C1_Init+0x108>)
+ 8001882:	0018      	movs	r0, r3
+ 8001884:	f7ff f8f6 	bl	8000a74 <LL_I2C_DisableOwnAddress2>
   LL_I2C_DisableGeneralCall(I2C1);
- 8001bfc:	4b16      	ldr	r3, [pc, #88]	; (8001c58 <MX_I2C1_Init+0x108>)
- 8001bfe:	0018      	movs	r0, r3
- 8001c00:	f7ff f978 	bl	8000ef4 <LL_I2C_DisableGeneralCall>
+ 8001888:	4b16      	ldr	r3, [pc, #88]	; (80018e4 <MX_I2C1_Init+0x108>)
+ 800188a:	0018      	movs	r0, r3
+ 800188c:	f7ff f8cc 	bl	8000a28 <LL_I2C_DisableGeneralCall>
   LL_I2C_EnableClockStretching(I2C1);
- 8001c04:	4b14      	ldr	r3, [pc, #80]	; (8001c58 <MX_I2C1_Init+0x108>)
- 8001c06:	0018      	movs	r0, r3
- 8001c08:	f7ff f964 	bl	8000ed4 <LL_I2C_EnableClockStretching>
+ 8001890:	4b14      	ldr	r3, [pc, #80]	; (80018e4 <MX_I2C1_Init+0x108>)
+ 8001892:	0018      	movs	r0, r3
+ 8001894:	f7ff f8b8 	bl	8000a08 <LL_I2C_EnableClockStretching>
   I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C;
- 8001c0c:	0021      	movs	r1, r4
- 8001c0e:	187b      	adds	r3, r7, r1
- 8001c10:	2200      	movs	r2, #0
- 8001c12:	601a      	str	r2, [r3, #0]
+ 8001898:	0021      	movs	r1, r4
+ 800189a:	187b      	adds	r3, r7, r1
+ 800189c:	2200      	movs	r2, #0
+ 800189e:	601a      	str	r2, [r3, #0]
   I2C_InitStruct.Timing = 0x40000A0B;
- 8001c14:	187b      	adds	r3, r7, r1
- 8001c16:	4a11      	ldr	r2, [pc, #68]	; (8001c5c <MX_I2C1_Init+0x10c>)
- 8001c18:	605a      	str	r2, [r3, #4]
+ 80018a0:	187b      	adds	r3, r7, r1
+ 80018a2:	4a11      	ldr	r2, [pc, #68]	; (80018e8 <MX_I2C1_Init+0x10c>)
+ 80018a4:	605a      	str	r2, [r3, #4]
   I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
- 8001c1a:	187b      	adds	r3, r7, r1
- 8001c1c:	2200      	movs	r2, #0
- 8001c1e:	609a      	str	r2, [r3, #8]
+ 80018a6:	187b      	adds	r3, r7, r1
+ 80018a8:	2200      	movs	r2, #0
+ 80018aa:	609a      	str	r2, [r3, #8]
   I2C_InitStruct.DigitalFilter = 0;
- 8001c20:	187b      	adds	r3, r7, r1
- 8001c22:	2200      	movs	r2, #0
- 8001c24:	60da      	str	r2, [r3, #12]
+ 80018ac:	187b      	adds	r3, r7, r1
+ 80018ae:	2200      	movs	r2, #0
+ 80018b0:	60da      	str	r2, [r3, #12]
   I2C_InitStruct.OwnAddress1 = 0;
- 8001c26:	187b      	adds	r3, r7, r1
- 8001c28:	2200      	movs	r2, #0
- 8001c2a:	611a      	str	r2, [r3, #16]
+ 80018b2:	187b      	adds	r3, r7, r1
+ 80018b4:	2200      	movs	r2, #0
+ 80018b6:	611a      	str	r2, [r3, #16]
   I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK;
- 8001c2c:	187b      	adds	r3, r7, r1
- 8001c2e:	2200      	movs	r2, #0
- 8001c30:	615a      	str	r2, [r3, #20]
+ 80018b8:	187b      	adds	r3, r7, r1
+ 80018ba:	2200      	movs	r2, #0
+ 80018bc:	615a      	str	r2, [r3, #20]
   I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
- 8001c32:	187b      	adds	r3, r7, r1
- 8001c34:	2200      	movs	r2, #0
- 8001c36:	619a      	str	r2, [r3, #24]
+ 80018be:	187b      	adds	r3, r7, r1
+ 80018c0:	2200      	movs	r2, #0
+ 80018c2:	619a      	str	r2, [r3, #24]
   LL_I2C_Init(I2C1, &I2C_InitStruct);
- 8001c38:	187b      	adds	r3, r7, r1
- 8001c3a:	4a07      	ldr	r2, [pc, #28]	; (8001c58 <MX_I2C1_Init+0x108>)
- 8001c3c:	0019      	movs	r1, r3
- 8001c3e:	0010      	movs	r0, r2
- 8001c40:	f001 fbfa 	bl	8003438 <LL_I2C_Init>
+ 80018c4:	187b      	adds	r3, r7, r1
+ 80018c6:	4a07      	ldr	r2, [pc, #28]	; (80018e4 <MX_I2C1_Init+0x108>)
+ 80018c8:	0019      	movs	r1, r3
+ 80018ca:	0010      	movs	r0, r2
+ 80018cc:	f000 ff38 	bl	8002740 <LL_I2C_Init>
   LL_I2C_SetOwnAddress2(I2C1, 0, LL_I2C_OWNADDRESS2_NOMASK);
- 8001c44:	4b04      	ldr	r3, [pc, #16]	; (8001c58 <MX_I2C1_Init+0x108>)
- 8001c46:	2200      	movs	r2, #0
- 8001c48:	2100      	movs	r1, #0
- 8001c4a:	0018      	movs	r0, r3
- 8001c4c:	f7ff f962 	bl	8000f14 <LL_I2C_SetOwnAddress2>
+ 80018d0:	4b04      	ldr	r3, [pc, #16]	; (80018e4 <MX_I2C1_Init+0x108>)
+ 80018d2:	2200      	movs	r2, #0
+ 80018d4:	2100      	movs	r1, #0
+ 80018d6:	0018      	movs	r0, r3
+ 80018d8:	f7ff f8b6 	bl	8000a48 <LL_I2C_SetOwnAddress2>
   /* USER CODE BEGIN I2C1_Init 2 */
   /* USER CODE END I2C1_Init 2 */
 
 }
- 8001c50:	46c0      	nop			; (mov r8, r8)
- 8001c52:	46bd      	mov	sp, r7
- 8001c54:	b00f      	add	sp, #60	; 0x3c
- 8001c56:	bd90      	pop	{r4, r7, pc}
- 8001c58:	40005400 	.word	0x40005400
- 8001c5c:	40000a0b 	.word	0x40000a0b
+ 80018dc:	46c0      	nop			; (mov r8, r8)
+ 80018de:	46bd      	mov	sp, r7
+ 80018e0:	b00f      	add	sp, #60	; 0x3c
+ 80018e2:	bd90      	pop	{r4, r7, pc}
+ 80018e4:	40005400 	.word	0x40005400
+ 80018e8:	40000a0b 	.word	0x40000a0b
 
-08001c60 <MX_IWDG_Init>:
+080018ec <MX_IWDG_Init>:
   * @brief IWDG Initialization Function
   * @param None
   * @retval None
   */
 static void MX_IWDG_Init(void)
 {
- 8001c60:	b580      	push	{r7, lr}
- 8001c62:	af00      	add	r7, sp, #0
+ 80018ec:	b580      	push	{r7, lr}
+ 80018ee:	af00      	add	r7, sp, #0
   /* USER CODE END IWDG_Init 0 */
 
   /* USER CODE BEGIN IWDG_Init 1 */
 
   /* USER CODE END IWDG_Init 1 */
   LL_IWDG_Enable(IWDG);
- 8001c64:	4b10      	ldr	r3, [pc, #64]	; (8001ca8 <MX_IWDG_Init+0x48>)
- 8001c66:	0018      	movs	r0, r3
- 8001c68:	f7ff f98a 	bl	8000f80 <LL_IWDG_Enable>
+ 80018f0:	4b10      	ldr	r3, [pc, #64]	; (8001934 <MX_IWDG_Init+0x48>)
+ 80018f2:	0018      	movs	r0, r3
+ 80018f4:	f7ff f8de 	bl	8000ab4 <LL_IWDG_Enable>
   LL_IWDG_EnableWriteAccess(IWDG);
- 8001c6c:	4b0e      	ldr	r3, [pc, #56]	; (8001ca8 <MX_IWDG_Init+0x48>)
- 8001c6e:	0018      	movs	r0, r3
- 8001c70:	f7ff f9a2 	bl	8000fb8 <LL_IWDG_EnableWriteAccess>
+ 80018f8:	4b0e      	ldr	r3, [pc, #56]	; (8001934 <MX_IWDG_Init+0x48>)
+ 80018fa:	0018      	movs	r0, r3
+ 80018fc:	f7ff f8f6 	bl	8000aec <LL_IWDG_EnableWriteAccess>
   LL_IWDG_SetPrescaler(IWDG, LL_IWDG_PRESCALER_256);
- 8001c74:	4b0c      	ldr	r3, [pc, #48]	; (8001ca8 <MX_IWDG_Init+0x48>)
- 8001c76:	2106      	movs	r1, #6
- 8001c78:	0018      	movs	r0, r3
- 8001c7a:	f7ff f9ab 	bl	8000fd4 <LL_IWDG_SetPrescaler>
+ 8001900:	4b0c      	ldr	r3, [pc, #48]	; (8001934 <MX_IWDG_Init+0x48>)
+ 8001902:	2106      	movs	r1, #6
+ 8001904:	0018      	movs	r0, r3
+ 8001906:	f7ff f8ff 	bl	8000b08 <LL_IWDG_SetPrescaler>
   LL_IWDG_SetReloadCounter(IWDG, 4095);
- 8001c7e:	4a0b      	ldr	r2, [pc, #44]	; (8001cac <MX_IWDG_Init+0x4c>)
- 8001c80:	4b09      	ldr	r3, [pc, #36]	; (8001ca8 <MX_IWDG_Init+0x48>)
- 8001c82:	0011      	movs	r1, r2
- 8001c84:	0018      	movs	r0, r3
- 8001c86:	f7ff f9b3 	bl	8000ff0 <LL_IWDG_SetReloadCounter>
+ 800190a:	4a0b      	ldr	r2, [pc, #44]	; (8001938 <MX_IWDG_Init+0x4c>)
+ 800190c:	4b09      	ldr	r3, [pc, #36]	; (8001934 <MX_IWDG_Init+0x48>)
+ 800190e:	0011      	movs	r1, r2
+ 8001910:	0018      	movs	r0, r3
+ 8001912:	f7ff f907 	bl	8000b24 <LL_IWDG_SetReloadCounter>
   while (LL_IWDG_IsReady(IWDG) != 1)
- 8001c8a:	46c0      	nop			; (mov r8, r8)
- 8001c8c:	4b06      	ldr	r3, [pc, #24]	; (8001ca8 <MX_IWDG_Init+0x48>)
- 8001c8e:	0018      	movs	r0, r3
- 8001c90:	f7ff f9bc 	bl	800100c <LL_IWDG_IsReady>
- 8001c94:	0003      	movs	r3, r0
- 8001c96:	2b01      	cmp	r3, #1
- 8001c98:	d1f8      	bne.n	8001c8c <MX_IWDG_Init+0x2c>
+ 8001916:	46c0      	nop			; (mov r8, r8)
+ 8001918:	4b06      	ldr	r3, [pc, #24]	; (8001934 <MX_IWDG_Init+0x48>)
+ 800191a:	0018      	movs	r0, r3
+ 800191c:	f7ff f910 	bl	8000b40 <LL_IWDG_IsReady>
+ 8001920:	0003      	movs	r3, r0
+ 8001922:	2b01      	cmp	r3, #1
+ 8001924:	d1f8      	bne.n	8001918 <MX_IWDG_Init+0x2c>
   {
   }
 
   LL_IWDG_ReloadCounter(IWDG);
- 8001c9a:	4b03      	ldr	r3, [pc, #12]	; (8001ca8 <MX_IWDG_Init+0x48>)
- 8001c9c:	0018      	movs	r0, r3
- 8001c9e:	f7ff f97d 	bl	8000f9c <LL_IWDG_ReloadCounter>
+ 8001926:	4b03      	ldr	r3, [pc, #12]	; (8001934 <MX_IWDG_Init+0x48>)
+ 8001928:	0018      	movs	r0, r3
+ 800192a:	f7ff f8d1 	bl	8000ad0 <LL_IWDG_ReloadCounter>
   /* USER CODE BEGIN IWDG_Init 2 */
 
   /* USER CODE END IWDG_Init 2 */
 
 }
- 8001ca2:	46c0      	nop			; (mov r8, r8)
- 8001ca4:	46bd      	mov	sp, r7
- 8001ca6:	bd80      	pop	{r7, pc}
- 8001ca8:	40003000 	.word	0x40003000
- 8001cac:	00000fff 	.word	0x00000fff
+ 800192e:	46c0      	nop			; (mov r8, r8)
+ 8001930:	46bd      	mov	sp, r7
+ 8001932:	bd80      	pop	{r7, pc}
+ 8001934:	40003000 	.word	0x40003000
+ 8001938:	00000fff 	.word	0x00000fff
 
-08001cb0 <MX_TIM21_Init>:
+0800193c <MX_TIM21_Init>:
   * @brief TIM21 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_TIM21_Init(void)
 {
- 8001cb0:	b580      	push	{r7, lr}
- 8001cb2:	b084      	sub	sp, #16
- 8001cb4:	af00      	add	r7, sp, #0
+ 800193c:	b580      	push	{r7, lr}
+ 800193e:	b084      	sub	sp, #16
+ 8001940:	af00      	add	r7, sp, #0
 
   /* USER CODE BEGIN TIM21_Init 0 */
 
   /* USER CODE END TIM21_Init 0 */
 
   LL_TIM_InitTypeDef TIM_InitStruct = {0};
- 8001cb6:	003b      	movs	r3, r7
- 8001cb8:	0018      	movs	r0, r3
- 8001cba:	2310      	movs	r3, #16
- 8001cbc:	001a      	movs	r2, r3
- 8001cbe:	2100      	movs	r1, #0
- 8001cc0:	f001 ff5a 	bl	8003b78 <memset>
+ 8001942:	003b      	movs	r3, r7
+ 8001944:	0018      	movs	r0, r3
+ 8001946:	2310      	movs	r3, #16
+ 8001948:	001a      	movs	r2, r3
+ 800194a:	2100      	movs	r1, #0
+ 800194c:	f002 fadc 	bl	8003f08 <memset>
 
   /* Peripheral clock enable */
   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM21);
- 8001cc4:	2004      	movs	r0, #4
- 8001cc6:	f7ff faeb 	bl	80012a0 <LL_APB2_GRP1_EnableClock>
+ 8001950:	2004      	movs	r0, #4
+ 8001952:	f7ff fa3f 	bl	8000dd4 <LL_APB2_GRP1_EnableClock>
 
   /* TIM21 interrupt Init */
   NVIC_SetPriority(TIM21_IRQn, 0);
- 8001cca:	2100      	movs	r1, #0
- 8001ccc:	2014      	movs	r0, #20
- 8001cce:	f7ff f873 	bl	8000db8 <__NVIC_SetPriority>
+ 8001956:	2100      	movs	r1, #0
+ 8001958:	2014      	movs	r0, #20
+ 800195a:	f7fe ffc7 	bl	80008ec <__NVIC_SetPriority>
   NVIC_EnableIRQ(TIM21_IRQn);
- 8001cd2:	2014      	movs	r0, #20
- 8001cd4:	f7ff f856 	bl	8000d84 <__NVIC_EnableIRQ>
+ 800195e:	2014      	movs	r0, #20
+ 8001960:	f7fe ffaa 	bl	80008b8 <__NVIC_EnableIRQ>
 
   /* USER CODE BEGIN TIM21_Init 1 */
 
   /* USER CODE END TIM21_Init 1 */
   TIM_InitStruct.Prescaler = tim21_prescaler;
- 8001cd8:	4a14      	ldr	r2, [pc, #80]	; (8001d2c <MX_TIM21_Init+0x7c>)
- 8001cda:	003b      	movs	r3, r7
- 8001cdc:	801a      	strh	r2, [r3, #0]
+ 8001964:	4a14      	ldr	r2, [pc, #80]	; (80019b8 <MX_TIM21_Init+0x7c>)
+ 8001966:	003b      	movs	r3, r7
+ 8001968:	801a      	strh	r2, [r3, #0]
   TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 8001cde:	003b      	movs	r3, r7
- 8001ce0:	2200      	movs	r2, #0
- 8001ce2:	605a      	str	r2, [r3, #4]
+ 800196a:	003b      	movs	r3, r7
+ 800196c:	2200      	movs	r2, #0
+ 800196e:	605a      	str	r2, [r3, #4]
   TIM_InitStruct.Autoreload = tim21_period;
- 8001ce4:	4b12      	ldr	r3, [pc, #72]	; (8001d30 <MX_TIM21_Init+0x80>)
- 8001ce6:	001a      	movs	r2, r3
- 8001ce8:	003b      	movs	r3, r7
- 8001cea:	609a      	str	r2, [r3, #8]
+ 8001970:	4b12      	ldr	r3, [pc, #72]	; (80019bc <MX_TIM21_Init+0x80>)
+ 8001972:	001a      	movs	r2, r3
+ 8001974:	003b      	movs	r3, r7
+ 8001976:	609a      	str	r2, [r3, #8]
   TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 8001cec:	003b      	movs	r3, r7
- 8001cee:	2200      	movs	r2, #0
- 8001cf0:	60da      	str	r2, [r3, #12]
+ 8001978:	003b      	movs	r3, r7
+ 800197a:	2200      	movs	r2, #0
+ 800197c:	60da      	str	r2, [r3, #12]
   LL_TIM_Init(TIM21, &TIM_InitStruct);
- 8001cf2:	003b      	movs	r3, r7
- 8001cf4:	4a0f      	ldr	r2, [pc, #60]	; (8001d34 <MX_TIM21_Init+0x84>)
- 8001cf6:	0019      	movs	r1, r3
- 8001cf8:	0010      	movs	r0, r2
- 8001cfa:	f001 fd9f 	bl	800383c <LL_TIM_Init>
+ 800197e:	003b      	movs	r3, r7
+ 8001980:	4a0f      	ldr	r2, [pc, #60]	; (80019c0 <MX_TIM21_Init+0x84>)
+ 8001982:	0019      	movs	r1, r3
+ 8001984:	0010      	movs	r0, r2
+ 8001986:	f001 f8dd 	bl	8002b44 <LL_TIM_Init>
   LL_TIM_EnableARRPreload(TIM21);
- 8001cfe:	4b0d      	ldr	r3, [pc, #52]	; (8001d34 <MX_TIM21_Init+0x84>)
- 8001d00:	0018      	movs	r0, r3
- 8001d02:	f7ff fb3d 	bl	8001380 <LL_TIM_EnableARRPreload>
+ 800198a:	4b0d      	ldr	r3, [pc, #52]	; (80019c0 <MX_TIM21_Init+0x84>)
+ 800198c:	0018      	movs	r0, r3
+ 800198e:	f7ff fa91 	bl	8000eb4 <LL_TIM_EnableARRPreload>
   LL_TIM_SetClockSource(TIM21, LL_TIM_CLOCKSOURCE_INTERNAL);
- 8001d06:	4b0b      	ldr	r3, [pc, #44]	; (8001d34 <MX_TIM21_Init+0x84>)
- 8001d08:	2100      	movs	r1, #0
- 8001d0a:	0018      	movs	r0, r3
- 8001d0c:	f7ff fb46 	bl	800139c <LL_TIM_SetClockSource>
+ 8001992:	4b0b      	ldr	r3, [pc, #44]	; (80019c0 <MX_TIM21_Init+0x84>)
+ 8001994:	2100      	movs	r1, #0
+ 8001996:	0018      	movs	r0, r3
+ 8001998:	f7ff fa9a 	bl	8000ed0 <LL_TIM_SetClockSource>
   LL_TIM_SetTriggerOutput(TIM21, LL_TIM_TRGO_RESET);
- 8001d10:	4b08      	ldr	r3, [pc, #32]	; (8001d34 <MX_TIM21_Init+0x84>)
- 8001d12:	2100      	movs	r1, #0
- 8001d14:	0018      	movs	r0, r3
- 8001d16:	f7ff fb55 	bl	80013c4 <LL_TIM_SetTriggerOutput>
+ 800199c:	4b08      	ldr	r3, [pc, #32]	; (80019c0 <MX_TIM21_Init+0x84>)
+ 800199e:	2100      	movs	r1, #0
+ 80019a0:	0018      	movs	r0, r3
+ 80019a2:	f7ff faa9 	bl	8000ef8 <LL_TIM_SetTriggerOutput>
   LL_TIM_DisableMasterSlaveMode(TIM21);
- 8001d1a:	4b06      	ldr	r3, [pc, #24]	; (8001d34 <MX_TIM21_Init+0x84>)
- 8001d1c:	0018      	movs	r0, r3
- 8001d1e:	f7ff fb63 	bl	80013e8 <LL_TIM_DisableMasterSlaveMode>
+ 80019a6:	4b06      	ldr	r3, [pc, #24]	; (80019c0 <MX_TIM21_Init+0x84>)
+ 80019a8:	0018      	movs	r0, r3
+ 80019aa:	f7ff fab7 	bl	8000f1c <LL_TIM_DisableMasterSlaveMode>
   /* USER CODE BEGIN TIM21_Init 2 */
 
   /* USER CODE END TIM21_Init 2 */
 
 }
- 8001d22:	46c0      	nop			; (mov r8, r8)
- 8001d24:	46bd      	mov	sp, r7
- 8001d26:	b004      	add	sp, #16
- 8001d28:	bd80      	pop	{r7, pc}
- 8001d2a:	46c0      	nop			; (mov r8, r8)
- 8001d2c:	0000ea5f 	.word	0x0000ea5f
- 8001d30:	000004af 	.word	0x000004af
- 8001d34:	40010800 	.word	0x40010800
+ 80019ae:	46c0      	nop			; (mov r8, r8)
+ 80019b0:	46bd      	mov	sp, r7
+ 80019b2:	b004      	add	sp, #16
+ 80019b4:	bd80      	pop	{r7, pc}
+ 80019b6:	46c0      	nop			; (mov r8, r8)
+ 80019b8:	0000ea5f 	.word	0x0000ea5f
+ 80019bc:	000004af 	.word	0x000004af
+ 80019c0:	40010800 	.word	0x40010800
 
-08001d38 <MX_USART2_UART_Init>:
+080019c4 <MX_USART2_UART_Init>:
   * @brief USART2 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_USART2_UART_Init(void)
 {
- 8001d38:	b590      	push	{r4, r7, lr}
- 8001d3a:	b08f      	sub	sp, #60	; 0x3c
- 8001d3c:	af00      	add	r7, sp, #0
+ 80019c4:	b590      	push	{r4, r7, lr}
+ 80019c6:	b08f      	sub	sp, #60	; 0x3c
+ 80019c8:	af00      	add	r7, sp, #0
 
   /* USER CODE BEGIN USART2_Init 0 */
 
   /* USER CODE END USART2_Init 0 */
 
   LL_USART_InitTypeDef USART_InitStruct = {0};
- 8001d3e:	241c      	movs	r4, #28
- 8001d40:	193b      	adds	r3, r7, r4
- 8001d42:	0018      	movs	r0, r3
- 8001d44:	231c      	movs	r3, #28
- 8001d46:	001a      	movs	r2, r3
- 8001d48:	2100      	movs	r1, #0
- 8001d4a:	f001 ff15 	bl	8003b78 <memset>
+ 80019ca:	241c      	movs	r4, #28
+ 80019cc:	193b      	adds	r3, r7, r4
+ 80019ce:	0018      	movs	r0, r3
+ 80019d0:	231c      	movs	r3, #28
+ 80019d2:	001a      	movs	r2, r3
+ 80019d4:	2100      	movs	r1, #0
+ 80019d6:	f002 fa97 	bl	8003f08 <memset>
 
   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8001d4e:	1d3b      	adds	r3, r7, #4
- 8001d50:	0018      	movs	r0, r3
- 8001d52:	2318      	movs	r3, #24
- 8001d54:	001a      	movs	r2, r3
- 8001d56:	2100      	movs	r1, #0
- 8001d58:	f001 ff0e 	bl	8003b78 <memset>
+ 80019da:	1d3b      	adds	r3, r7, #4
+ 80019dc:	0018      	movs	r0, r3
+ 80019de:	2318      	movs	r3, #24
+ 80019e0:	001a      	movs	r2, r3
+ 80019e2:	2100      	movs	r1, #0
+ 80019e4:	f002 fa90 	bl	8003f08 <memset>
 
   /* Peripheral clock enable */
   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
- 8001d5c:	2380      	movs	r3, #128	; 0x80
- 8001d5e:	029b      	lsls	r3, r3, #10
- 8001d60:	0018      	movs	r0, r3
- 8001d62:	f7ff fa87 	bl	8001274 <LL_APB1_GRP1_EnableClock>
+ 80019e8:	2380      	movs	r3, #128	; 0x80
+ 80019ea:	029b      	lsls	r3, r3, #10
+ 80019ec:	0018      	movs	r0, r3
+ 80019ee:	f7ff f9db 	bl	8000da8 <LL_APB1_GRP1_EnableClock>
 
   LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
- 8001d66:	2001      	movs	r0, #1
- 8001d68:	f7ff fab0 	bl	80012cc <LL_IOP_GRP1_EnableClock>
+ 80019f2:	2001      	movs	r0, #1
+ 80019f4:	f7ff fa04 	bl	8000e00 <LL_IOP_GRP1_EnableClock>
   /**USART2 GPIO Configuration
   PA1   ------> USART2_DE
   PA2   ------> USART2_TX
   PA3   ------> USART2_RX
   */
   GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
- 8001d6c:	1d3b      	adds	r3, r7, #4
- 8001d6e:	2202      	movs	r2, #2
- 8001d70:	601a      	str	r2, [r3, #0]
+ 80019f8:	1d3b      	adds	r3, r7, #4
+ 80019fa:	2202      	movs	r2, #2
+ 80019fc:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8001d72:	1d3b      	adds	r3, r7, #4
- 8001d74:	2202      	movs	r2, #2
- 8001d76:	605a      	str	r2, [r3, #4]
+ 80019fe:	1d3b      	adds	r3, r7, #4
+ 8001a00:	2202      	movs	r2, #2
+ 8001a02:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8001d78:	1d3b      	adds	r3, r7, #4
- 8001d7a:	2203      	movs	r2, #3
- 8001d7c:	609a      	str	r2, [r3, #8]
+ 8001a04:	1d3b      	adds	r3, r7, #4
+ 8001a06:	2203      	movs	r2, #3
+ 8001a08:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8001d7e:	1d3b      	adds	r3, r7, #4
- 8001d80:	2200      	movs	r2, #0
- 8001d82:	60da      	str	r2, [r3, #12]
+ 8001a0a:	1d3b      	adds	r3, r7, #4
+ 8001a0c:	2200      	movs	r2, #0
+ 8001a0e:	60da      	str	r2, [r3, #12]
   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8001d84:	1d3b      	adds	r3, r7, #4
- 8001d86:	2200      	movs	r2, #0
- 8001d88:	611a      	str	r2, [r3, #16]
+ 8001a10:	1d3b      	adds	r3, r7, #4
+ 8001a12:	2200      	movs	r2, #0
+ 8001a14:	611a      	str	r2, [r3, #16]
   GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
- 8001d8a:	1d3b      	adds	r3, r7, #4
- 8001d8c:	2204      	movs	r2, #4
- 8001d8e:	615a      	str	r2, [r3, #20]
+ 8001a16:	1d3b      	adds	r3, r7, #4
+ 8001a18:	2204      	movs	r2, #4
+ 8001a1a:	615a      	str	r2, [r3, #20]
   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8001d90:	1d3a      	adds	r2, r7, #4
- 8001d92:	23a0      	movs	r3, #160	; 0xa0
- 8001d94:	05db      	lsls	r3, r3, #23
- 8001d96:	0011      	movs	r1, r2
- 8001d98:	0018      	movs	r0, r3
- 8001d9a:	f001 fa51 	bl	8003240 <LL_GPIO_Init>
+ 8001a1c:	1d3a      	adds	r2, r7, #4
+ 8001a1e:	23a0      	movs	r3, #160	; 0xa0
+ 8001a20:	05db      	lsls	r3, r3, #23
+ 8001a22:	0011      	movs	r1, r2
+ 8001a24:	0018      	movs	r0, r3
+ 8001a26:	f000 fd8f 	bl	8002548 <LL_GPIO_Init>
 
   GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
- 8001d9e:	1d3b      	adds	r3, r7, #4
- 8001da0:	2204      	movs	r2, #4
- 8001da2:	601a      	str	r2, [r3, #0]
+ 8001a2a:	1d3b      	adds	r3, r7, #4
+ 8001a2c:	2204      	movs	r2, #4
+ 8001a2e:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8001da4:	1d3b      	adds	r3, r7, #4
- 8001da6:	2202      	movs	r2, #2
- 8001da8:	605a      	str	r2, [r3, #4]
+ 8001a30:	1d3b      	adds	r3, r7, #4
+ 8001a32:	2202      	movs	r2, #2
+ 8001a34:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8001daa:	1d3b      	adds	r3, r7, #4
- 8001dac:	2203      	movs	r2, #3
- 8001dae:	609a      	str	r2, [r3, #8]
+ 8001a36:	1d3b      	adds	r3, r7, #4
+ 8001a38:	2203      	movs	r2, #3
+ 8001a3a:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8001db0:	1d3b      	adds	r3, r7, #4
- 8001db2:	2200      	movs	r2, #0
- 8001db4:	60da      	str	r2, [r3, #12]
+ 8001a3c:	1d3b      	adds	r3, r7, #4
+ 8001a3e:	2200      	movs	r2, #0
+ 8001a40:	60da      	str	r2, [r3, #12]
   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8001db6:	1d3b      	adds	r3, r7, #4
- 8001db8:	2200      	movs	r2, #0
- 8001dba:	611a      	str	r2, [r3, #16]
+ 8001a42:	1d3b      	adds	r3, r7, #4
+ 8001a44:	2200      	movs	r2, #0
+ 8001a46:	611a      	str	r2, [r3, #16]
   GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
- 8001dbc:	1d3b      	adds	r3, r7, #4
- 8001dbe:	2204      	movs	r2, #4
- 8001dc0:	615a      	str	r2, [r3, #20]
+ 8001a48:	1d3b      	adds	r3, r7, #4
+ 8001a4a:	2204      	movs	r2, #4
+ 8001a4c:	615a      	str	r2, [r3, #20]
   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8001dc2:	1d3a      	adds	r2, r7, #4
- 8001dc4:	23a0      	movs	r3, #160	; 0xa0
- 8001dc6:	05db      	lsls	r3, r3, #23
- 8001dc8:	0011      	movs	r1, r2
- 8001dca:	0018      	movs	r0, r3
- 8001dcc:	f001 fa38 	bl	8003240 <LL_GPIO_Init>
+ 8001a4e:	1d3a      	adds	r2, r7, #4
+ 8001a50:	23a0      	movs	r3, #160	; 0xa0
+ 8001a52:	05db      	lsls	r3, r3, #23
+ 8001a54:	0011      	movs	r1, r2
+ 8001a56:	0018      	movs	r0, r3
+ 8001a58:	f000 fd76 	bl	8002548 <LL_GPIO_Init>
 
   GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
- 8001dd0:	1d3b      	adds	r3, r7, #4
- 8001dd2:	2208      	movs	r2, #8
- 8001dd4:	601a      	str	r2, [r3, #0]
+ 8001a5c:	1d3b      	adds	r3, r7, #4
+ 8001a5e:	2208      	movs	r2, #8
+ 8001a60:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8001dd6:	1d3b      	adds	r3, r7, #4
- 8001dd8:	2202      	movs	r2, #2
- 8001dda:	605a      	str	r2, [r3, #4]
+ 8001a62:	1d3b      	adds	r3, r7, #4
+ 8001a64:	2202      	movs	r2, #2
+ 8001a66:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8001ddc:	1d3b      	adds	r3, r7, #4
- 8001dde:	2203      	movs	r2, #3
- 8001de0:	609a      	str	r2, [r3, #8]
+ 8001a68:	1d3b      	adds	r3, r7, #4
+ 8001a6a:	2203      	movs	r2, #3
+ 8001a6c:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8001de2:	1d3b      	adds	r3, r7, #4
- 8001de4:	2200      	movs	r2, #0
- 8001de6:	60da      	str	r2, [r3, #12]
+ 8001a6e:	1d3b      	adds	r3, r7, #4
+ 8001a70:	2200      	movs	r2, #0
+ 8001a72:	60da      	str	r2, [r3, #12]
   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8001de8:	1d3b      	adds	r3, r7, #4
- 8001dea:	2200      	movs	r2, #0
- 8001dec:	611a      	str	r2, [r3, #16]
+ 8001a74:	1d3b      	adds	r3, r7, #4
+ 8001a76:	2200      	movs	r2, #0
+ 8001a78:	611a      	str	r2, [r3, #16]
   GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
- 8001dee:	1d3b      	adds	r3, r7, #4
- 8001df0:	2204      	movs	r2, #4
- 8001df2:	615a      	str	r2, [r3, #20]
+ 8001a7a:	1d3b      	adds	r3, r7, #4
+ 8001a7c:	2204      	movs	r2, #4
+ 8001a7e:	615a      	str	r2, [r3, #20]
   LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8001df4:	1d3a      	adds	r2, r7, #4
- 8001df6:	23a0      	movs	r3, #160	; 0xa0
- 8001df8:	05db      	lsls	r3, r3, #23
- 8001dfa:	0011      	movs	r1, r2
- 8001dfc:	0018      	movs	r0, r3
- 8001dfe:	f001 fa1f 	bl	8003240 <LL_GPIO_Init>
+ 8001a80:	1d3a      	adds	r2, r7, #4
+ 8001a82:	23a0      	movs	r3, #160	; 0xa0
+ 8001a84:	05db      	lsls	r3, r3, #23
+ 8001a86:	0011      	movs	r1, r2
+ 8001a88:	0018      	movs	r0, r3
+ 8001a8a:	f000 fd5d 	bl	8002548 <LL_GPIO_Init>
 
   /* USART2 interrupt Init */
   NVIC_SetPriority(USART2_IRQn, 0);
- 8001e02:	2100      	movs	r1, #0
- 8001e04:	201c      	movs	r0, #28
- 8001e06:	f7fe ffd7 	bl	8000db8 <__NVIC_SetPriority>
+ 8001a8e:	2100      	movs	r1, #0
+ 8001a90:	201c      	movs	r0, #28
+ 8001a92:	f7fe ff2b 	bl	80008ec <__NVIC_SetPriority>
   NVIC_EnableIRQ(USART2_IRQn);
- 8001e0a:	201c      	movs	r0, #28
- 8001e0c:	f7fe ffba 	bl	8000d84 <__NVIC_EnableIRQ>
+ 8001a96:	201c      	movs	r0, #28
+ 8001a98:	f7fe ff0e 	bl	80008b8 <__NVIC_EnableIRQ>
 
   /* USER CODE BEGIN USART2_Init 1 */
 
   /* USER CODE END USART2_Init 1 */
   USART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index];
- 8001e10:	4b2a      	ldr	r3, [pc, #168]	; (8001ebc <MX_USART2_UART_Init+0x184>)
- 8001e12:	691a      	ldr	r2, [r3, #16]
- 8001e14:	4b2a      	ldr	r3, [pc, #168]	; (8001ec0 <MX_USART2_UART_Init+0x188>)
- 8001e16:	0092      	lsls	r2, r2, #2
- 8001e18:	58d2      	ldr	r2, [r2, r3]
- 8001e1a:	0021      	movs	r1, r4
- 8001e1c:	187b      	adds	r3, r7, r1
- 8001e1e:	601a      	str	r2, [r3, #0]
+ 8001a9c:	4b2a      	ldr	r3, [pc, #168]	; (8001b48 <MX_USART2_UART_Init+0x184>)
+ 8001a9e:	689a      	ldr	r2, [r3, #8]
+ 8001aa0:	4b2a      	ldr	r3, [pc, #168]	; (8001b4c <MX_USART2_UART_Init+0x188>)
+ 8001aa2:	0092      	lsls	r2, r2, #2
+ 8001aa4:	58d2      	ldr	r2, [r2, r3]
+ 8001aa6:	0021      	movs	r1, r4
+ 8001aa8:	187b      	adds	r3, r7, r1
+ 8001aaa:	601a      	str	r2, [r3, #0]
   USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_9B;
- 8001e20:	187b      	adds	r3, r7, r1
- 8001e22:	2280      	movs	r2, #128	; 0x80
- 8001e24:	0152      	lsls	r2, r2, #5
- 8001e26:	605a      	str	r2, [r3, #4]
+ 8001aac:	187b      	adds	r3, r7, r1
+ 8001aae:	2280      	movs	r2, #128	; 0x80
+ 8001ab0:	0152      	lsls	r2, r2, #5
+ 8001ab2:	605a      	str	r2, [r3, #4]
   USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
- 8001e28:	187b      	adds	r3, r7, r1
- 8001e2a:	2200      	movs	r2, #0
- 8001e2c:	609a      	str	r2, [r3, #8]
+ 8001ab4:	187b      	adds	r3, r7, r1
+ 8001ab6:	2200      	movs	r2, #0
+ 8001ab8:	609a      	str	r2, [r3, #8]
   USART_InitStruct.Parity = LL_USART_PARITY_EVEN;
- 8001e2e:	187b      	adds	r3, r7, r1
- 8001e30:	2280      	movs	r2, #128	; 0x80
- 8001e32:	00d2      	lsls	r2, r2, #3
- 8001e34:	60da      	str	r2, [r3, #12]
+ 8001aba:	187b      	adds	r3, r7, r1
+ 8001abc:	2280      	movs	r2, #128	; 0x80
+ 8001abe:	00d2      	lsls	r2, r2, #3
+ 8001ac0:	60da      	str	r2, [r3, #12]
   USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
- 8001e36:	187b      	adds	r3, r7, r1
- 8001e38:	220c      	movs	r2, #12
- 8001e3a:	611a      	str	r2, [r3, #16]
+ 8001ac2:	187b      	adds	r3, r7, r1
+ 8001ac4:	220c      	movs	r2, #12
+ 8001ac6:	611a      	str	r2, [r3, #16]
   USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
- 8001e3c:	187b      	adds	r3, r7, r1
- 8001e3e:	2200      	movs	r2, #0
- 8001e40:	615a      	str	r2, [r3, #20]
+ 8001ac8:	187b      	adds	r3, r7, r1
+ 8001aca:	2200      	movs	r2, #0
+ 8001acc:	615a      	str	r2, [r3, #20]
   USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
- 8001e42:	187b      	adds	r3, r7, r1
- 8001e44:	2200      	movs	r2, #0
- 8001e46:	619a      	str	r2, [r3, #24]
+ 8001ace:	187b      	adds	r3, r7, r1
+ 8001ad0:	2200      	movs	r2, #0
+ 8001ad2:	619a      	str	r2, [r3, #24]
   LL_USART_Init(USART2, &USART_InitStruct);
- 8001e48:	187b      	adds	r3, r7, r1
- 8001e4a:	4a1e      	ldr	r2, [pc, #120]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e4c:	0019      	movs	r1, r3
- 8001e4e:	0010      	movs	r0, r2
- 8001e50:	f001 fdbc 	bl	80039cc <LL_USART_Init>
+ 8001ad4:	187b      	adds	r3, r7, r1
+ 8001ad6:	4a1e      	ldr	r2, [pc, #120]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001ad8:	0019      	movs	r1, r3
+ 8001ada:	0010      	movs	r0, r2
+ 8001adc:	f001 f8fa 	bl	8002cd4 <LL_USART_Init>
   LL_USART_EnableDEMode(USART2);
- 8001e54:	4b1b      	ldr	r3, [pc, #108]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e56:	0018      	movs	r0, r3
- 8001e58:	f7ff fbe0 	bl	800161c <LL_USART_EnableDEMode>
+ 8001ae0:	4b1b      	ldr	r3, [pc, #108]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001ae2:	0018      	movs	r0, r3
+ 8001ae4:	f7ff fb34 	bl	8001150 <LL_USART_EnableDEMode>
   LL_USART_SetDESignalPolarity(USART2, LL_USART_DE_POLARITY_HIGH);
- 8001e5c:	4b19      	ldr	r3, [pc, #100]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e5e:	2100      	movs	r1, #0
- 8001e60:	0018      	movs	r0, r3
- 8001e62:	f7ff fbeb 	bl	800163c <LL_USART_SetDESignalPolarity>
+ 8001ae8:	4b19      	ldr	r3, [pc, #100]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001aea:	2100      	movs	r1, #0
+ 8001aec:	0018      	movs	r0, r3
+ 8001aee:	f7ff fb3f 	bl	8001170 <LL_USART_SetDESignalPolarity>
   LL_USART_SetDEAssertionTime(USART2, 0);
- 8001e66:	4b17      	ldr	r3, [pc, #92]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e68:	2100      	movs	r1, #0
- 8001e6a:	0018      	movs	r0, r3
- 8001e6c:	f7ff fbc2 	bl	80015f4 <LL_USART_SetDEAssertionTime>
+ 8001af2:	4b17      	ldr	r3, [pc, #92]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001af4:	2100      	movs	r1, #0
+ 8001af6:	0018      	movs	r0, r3
+ 8001af8:	f7ff fb16 	bl	8001128 <LL_USART_SetDEAssertionTime>
   LL_USART_SetDEDeassertionTime(USART2, 0);
- 8001e70:	4b14      	ldr	r3, [pc, #80]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e72:	2100      	movs	r1, #0
- 8001e74:	0018      	movs	r0, r3
- 8001e76:	f7ff fba9 	bl	80015cc <LL_USART_SetDEDeassertionTime>
+ 8001afc:	4b14      	ldr	r3, [pc, #80]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001afe:	2100      	movs	r1, #0
+ 8001b00:	0018      	movs	r0, r3
+ 8001b02:	f7ff fafd 	bl	8001100 <LL_USART_SetDEDeassertionTime>
   LL_USART_ConfigAsyncMode(USART2);
- 8001e7a:	4b12      	ldr	r3, [pc, #72]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e7c:	0018      	movs	r0, r3
- 8001e7e:	f7ff fbf1 	bl	8001664 <LL_USART_ConfigAsyncMode>
+ 8001b06:	4b12      	ldr	r3, [pc, #72]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001b08:	0018      	movs	r0, r3
+ 8001b0a:	f7ff fb45 	bl	8001198 <LL_USART_ConfigAsyncMode>
   LL_USART_Enable(USART2);
- 8001e82:	4b10      	ldr	r3, [pc, #64]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e84:	0018      	movs	r0, r3
- 8001e86:	f7ff facc 	bl	8001422 <LL_USART_Enable>
+ 8001b0e:	4b10      	ldr	r3, [pc, #64]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001b10:	0018      	movs	r0, r3
+ 8001b12:	f7ff fa20 	bl	8000f56 <LL_USART_Enable>
   /* USER CODE BEGIN USART2_Init 2 */
 
   /* Enable IDLE Interrupt */
   LL_USART_EnableIT_IDLE(USART2);
- 8001e8a:	4b0e      	ldr	r3, [pc, #56]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e8c:	0018      	movs	r0, r3
- 8001e8e:	f7ff fc12 	bl	80016b6 <LL_USART_EnableIT_IDLE>
+ 8001b16:	4b0e      	ldr	r3, [pc, #56]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001b18:	0018      	movs	r0, r3
+ 8001b1a:	f7ff fb66 	bl	80011ea <LL_USART_EnableIT_IDLE>
 
   /* Enable RX Not Empty Interrupt */
   LL_USART_EnableIT_RXNE(USART2);
- 8001e92:	4b0c      	ldr	r3, [pc, #48]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e94:	0018      	movs	r0, r3
- 8001e96:	f7ff fc2d 	bl	80016f4 <LL_USART_EnableIT_RXNE>
+ 8001b1e:	4b0c      	ldr	r3, [pc, #48]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001b20:	0018      	movs	r0, r3
+ 8001b22:	f7ff fb81 	bl	8001228 <LL_USART_EnableIT_RXNE>
 
   LL_USART_EnableDirectionRx(USART2);
- 8001e9a:	4b0a      	ldr	r3, [pc, #40]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001e9c:	0018      	movs	r0, r3
- 8001e9e:	f7ff fadd 	bl	800145c <LL_USART_EnableDirectionRx>
+ 8001b26:	4b0a      	ldr	r3, [pc, #40]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001b28:	0018      	movs	r0, r3
+ 8001b2a:	f7ff fa31 	bl	8000f90 <LL_USART_EnableDirectionRx>
   LL_USART_EnableDirectionTx(USART2);
- 8001ea2:	4b08      	ldr	r3, [pc, #32]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001ea4:	0018      	movs	r0, r3
- 8001ea6:	f7ff faf8 	bl	800149a <LL_USART_EnableDirectionTx>
+ 8001b2e:	4b08      	ldr	r3, [pc, #32]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001b30:	0018      	movs	r0, r3
+ 8001b32:	f7ff fa4c 	bl	8000fce <LL_USART_EnableDirectionTx>
   LL_USART_Enable(USART2);
- 8001eaa:	4b06      	ldr	r3, [pc, #24]	; (8001ec4 <MX_USART2_UART_Init+0x18c>)
- 8001eac:	0018      	movs	r0, r3
- 8001eae:	f7ff fab8 	bl	8001422 <LL_USART_Enable>
+ 8001b36:	4b06      	ldr	r3, [pc, #24]	; (8001b50 <MX_USART2_UART_Init+0x18c>)
+ 8001b38:	0018      	movs	r0, r3
+ 8001b3a:	f7ff fa0c 	bl	8000f56 <LL_USART_Enable>
   /* USER CODE END USART2_Init 2 */
 
 }
- 8001eb2:	46c0      	nop			; (mov r8, r8)
- 8001eb4:	46bd      	mov	sp, r7
- 8001eb6:	b00f      	add	sp, #60	; 0x3c
- 8001eb8:	bd90      	pop	{r4, r7, pc}
- 8001eba:	46c0      	nop			; (mov r8, r8)
- 8001ebc:	20000068 	.word	0x20000068
- 8001ec0:	08003c0c 	.word	0x08003c0c
- 8001ec4:	40004400 	.word	0x40004400
+ 8001b3e:	46c0      	nop			; (mov r8, r8)
+ 8001b40:	46bd      	mov	sp, r7
+ 8001b42:	b00f      	add	sp, #60	; 0x3c
+ 8001b44:	bd90      	pop	{r4, r7, pc}
+ 8001b46:	46c0      	nop			; (mov r8, r8)
+ 8001b48:	20000068 	.word	0x20000068
+ 8001b4c:	08003f9c 	.word	0x08003f9c
+ 8001b50:	40004400 	.word	0x40004400
 
-08001ec8 <MX_GPIO_Init>:
+08001b54 <MX_GPIO_Init>:
   * @brief GPIO Initialization Function
   * @param None
   * @retval None
   */
 static void MX_GPIO_Init(void)
 {
- 8001ec8:	b580      	push	{r7, lr}
- 8001eca:	af00      	add	r7, sp, #0
+ 8001b54:	b580      	push	{r7, lr}
+ 8001b56:	af00      	add	r7, sp, #0
 
   /* GPIO Ports Clock Enable */
   LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
- 8001ecc:	2001      	movs	r0, #1
- 8001ece:	f7ff f9fd 	bl	80012cc <LL_IOP_GRP1_EnableClock>
+ 8001b58:	2001      	movs	r0, #1
+ 8001b5a:	f7ff f951 	bl	8000e00 <LL_IOP_GRP1_EnableClock>
 
 }
- 8001ed2:	46c0      	nop			; (mov r8, r8)
- 8001ed4:	46bd      	mov	sp, r7
- 8001ed6:	bd80      	pop	{r7, pc}
+ 8001b5e:	46c0      	nop			; (mov r8, r8)
+ 8001b60:	46bd      	mov	sp, r7
+ 8001b62:	bd80      	pop	{r7, pc}
 
-08001ed8 <USART2_TX_Buffer>:
+08001b64 <USART2_TX_Buffer>:
 
 /* USER CODE BEGIN 4 */
 void USART2_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len)
 {
- 8001ed8:	b580      	push	{r7, lr}
- 8001eda:	b084      	sub	sp, #16
- 8001edc:	af00      	add	r7, sp, #0
- 8001ede:	6078      	str	r0, [r7, #4]
- 8001ee0:	000a      	movs	r2, r1
- 8001ee2:	1cbb      	adds	r3, r7, #2
- 8001ee4:	801a      	strh	r2, [r3, #0]
+ 8001b64:	b580      	push	{r7, lr}
+ 8001b66:	b084      	sub	sp, #16
+ 8001b68:	af00      	add	r7, sp, #0
+ 8001b6a:	6078      	str	r0, [r7, #4]
+ 8001b6c:	000a      	movs	r2, r1
+ 8001b6e:	1cbb      	adds	r3, r7, #2
+ 8001b70:	801a      	strh	r2, [r3, #0]
   __ASM volatile ("cpsid i" : : : "memory");
- 8001ee6:	b672      	cpsid	i
+ 8001b72:	b672      	cpsid	i
 }
- 8001ee8:	46c0      	nop			; (mov r8, r8)
+ 8001b74:	46c0      	nop			; (mov r8, r8)
 	__disable_irq();
 	for (uint16_t i = 0; i < buffer_tx_len; i++)
- 8001eea:	230e      	movs	r3, #14
- 8001eec:	18fb      	adds	r3, r7, r3
- 8001eee:	2200      	movs	r2, #0
- 8001ef0:	801a      	strh	r2, [r3, #0]
- 8001ef2:	e018      	b.n	8001f26 <USART2_TX_Buffer+0x4e>
+ 8001b76:	230e      	movs	r3, #14
+ 8001b78:	18fb      	adds	r3, r7, r3
+ 8001b7a:	2200      	movs	r2, #0
+ 8001b7c:	801a      	strh	r2, [r3, #0]
+ 8001b7e:	e018      	b.n	8001bb2 <USART2_TX_Buffer+0x4e>
 	{
 		  LL_USART_TransmitData9(USART2, buffer_tx[i]);
- 8001ef4:	230e      	movs	r3, #14
- 8001ef6:	18fb      	adds	r3, r7, r3
- 8001ef8:	881b      	ldrh	r3, [r3, #0]
- 8001efa:	687a      	ldr	r2, [r7, #4]
- 8001efc:	18d3      	adds	r3, r2, r3
- 8001efe:	781b      	ldrb	r3, [r3, #0]
- 8001f00:	b29b      	uxth	r3, r3
- 8001f02:	4a0f      	ldr	r2, [pc, #60]	; (8001f40 <USART2_TX_Buffer+0x68>)
- 8001f04:	0019      	movs	r1, r3
- 8001f06:	0010      	movs	r0, r2
- 8001f08:	f7ff fc53 	bl	80017b2 <LL_USART_TransmitData9>
+ 8001b80:	230e      	movs	r3, #14
+ 8001b82:	18fb      	adds	r3, r7, r3
+ 8001b84:	881b      	ldrh	r3, [r3, #0]
+ 8001b86:	687a      	ldr	r2, [r7, #4]
+ 8001b88:	18d3      	adds	r3, r2, r3
+ 8001b8a:	781b      	ldrb	r3, [r3, #0]
+ 8001b8c:	b29b      	uxth	r3, r3
+ 8001b8e:	4a0f      	ldr	r2, [pc, #60]	; (8001bcc <USART2_TX_Buffer+0x68>)
+ 8001b90:	0019      	movs	r1, r3
+ 8001b92:	0010      	movs	r0, r2
+ 8001b94:	f7ff fba7 	bl	80012e6 <LL_USART_TransmitData9>
 		  while (!LL_USART_IsActiveFlag_TXE(USART2));
- 8001f0c:	46c0      	nop			; (mov r8, r8)
- 8001f0e:	4b0c      	ldr	r3, [pc, #48]	; (8001f40 <USART2_TX_Buffer+0x68>)
- 8001f10:	0018      	movs	r0, r3
- 8001f12:	f7ff fbbf 	bl	8001694 <LL_USART_IsActiveFlag_TXE>
- 8001f16:	1e03      	subs	r3, r0, #0
- 8001f18:	d0f9      	beq.n	8001f0e <USART2_TX_Buffer+0x36>
+ 8001b98:	46c0      	nop			; (mov r8, r8)
+ 8001b9a:	4b0c      	ldr	r3, [pc, #48]	; (8001bcc <USART2_TX_Buffer+0x68>)
+ 8001b9c:	0018      	movs	r0, r3
+ 8001b9e:	f7ff fb13 	bl	80011c8 <LL_USART_IsActiveFlag_TXE>
+ 8001ba2:	1e03      	subs	r3, r0, #0
+ 8001ba4:	d0f9      	beq.n	8001b9a <USART2_TX_Buffer+0x36>
 	for (uint16_t i = 0; i < buffer_tx_len; i++)
- 8001f1a:	210e      	movs	r1, #14
- 8001f1c:	187b      	adds	r3, r7, r1
- 8001f1e:	881a      	ldrh	r2, [r3, #0]
- 8001f20:	187b      	adds	r3, r7, r1
- 8001f22:	3201      	adds	r2, #1
- 8001f24:	801a      	strh	r2, [r3, #0]
- 8001f26:	230e      	movs	r3, #14
- 8001f28:	18fa      	adds	r2, r7, r3
- 8001f2a:	1cbb      	adds	r3, r7, #2
- 8001f2c:	8812      	ldrh	r2, [r2, #0]
- 8001f2e:	881b      	ldrh	r3, [r3, #0]
- 8001f30:	429a      	cmp	r2, r3
- 8001f32:	d3df      	bcc.n	8001ef4 <USART2_TX_Buffer+0x1c>
+ 8001ba6:	210e      	movs	r1, #14
+ 8001ba8:	187b      	adds	r3, r7, r1
+ 8001baa:	881a      	ldrh	r2, [r3, #0]
+ 8001bac:	187b      	adds	r3, r7, r1
+ 8001bae:	3201      	adds	r2, #1
+ 8001bb0:	801a      	strh	r2, [r3, #0]
+ 8001bb2:	230e      	movs	r3, #14
+ 8001bb4:	18fa      	adds	r2, r7, r3
+ 8001bb6:	1cbb      	adds	r3, r7, #2
+ 8001bb8:	8812      	ldrh	r2, [r2, #0]
+ 8001bba:	881b      	ldrh	r3, [r3, #0]
+ 8001bbc:	429a      	cmp	r2, r3
+ 8001bbe:	d3df      	bcc.n	8001b80 <USART2_TX_Buffer+0x1c>
   __ASM volatile ("cpsie i" : : : "memory");
- 8001f34:	b662      	cpsie	i
+ 8001bc0:	b662      	cpsie	i
 }
- 8001f36:	46c0      	nop			; (mov r8, r8)
+ 8001bc2:	46c0      	nop			; (mov r8, r8)
 	}
 	__enable_irq();
 }
- 8001f38:	46c0      	nop			; (mov r8, r8)
- 8001f3a:	46bd      	mov	sp, r7
- 8001f3c:	b004      	add	sp, #16
- 8001f3e:	bd80      	pop	{r7, pc}
- 8001f40:	40004400 	.word	0x40004400
+ 8001bc4:	46c0      	nop			; (mov r8, r8)
+ 8001bc6:	46bd      	mov	sp, r7
+ 8001bc8:	b004      	add	sp, #16
+ 8001bca:	bd80      	pop	{r7, pc}
+ 8001bcc:	40004400 	.word	0x40004400
 
-08001f44 <uart_disable_interrupts>:
+08001bd0 <uart_disable_interrupts>:
 
 int8_t uart_disable_interrupts(void)
 {
- 8001f44:	b580      	push	{r7, lr}
- 8001f46:	af00      	add	r7, sp, #0
+ 8001bd0:	b580      	push	{r7, lr}
+ 8001bd2:	af00      	add	r7, sp, #0
 	LL_USART_Disable(USART2);
- 8001f48:	4b07      	ldr	r3, [pc, #28]	; (8001f68 <uart_disable_interrupts+0x24>)
- 8001f4a:	0018      	movs	r0, r3
- 8001f4c:	f7ff fa77 	bl	800143e <LL_USART_Disable>
+ 8001bd4:	4b07      	ldr	r3, [pc, #28]	; (8001bf4 <uart_disable_interrupts+0x24>)
+ 8001bd6:	0018      	movs	r0, r3
+ 8001bd8:	f7ff f9cb 	bl	8000f72 <LL_USART_Disable>
 	LL_USART_DisableIT_IDLE(USART2);
- 8001f50:	4b05      	ldr	r3, [pc, #20]	; (8001f68 <uart_disable_interrupts+0x24>)
- 8001f52:	0018      	movs	r0, r3
- 8001f54:	f7ff fbed 	bl	8001732 <LL_USART_DisableIT_IDLE>
+ 8001bdc:	4b05      	ldr	r3, [pc, #20]	; (8001bf4 <uart_disable_interrupts+0x24>)
+ 8001bde:	0018      	movs	r0, r3
+ 8001be0:	f7ff fb41 	bl	8001266 <LL_USART_DisableIT_IDLE>
 	LL_USART_EnableIT_RXNE(USART2);
- 8001f58:	4b03      	ldr	r3, [pc, #12]	; (8001f68 <uart_disable_interrupts+0x24>)
- 8001f5a:	0018      	movs	r0, r3
- 8001f5c:	f7ff fbca 	bl	80016f4 <LL_USART_EnableIT_RXNE>
+ 8001be4:	4b03      	ldr	r3, [pc, #12]	; (8001bf4 <uart_disable_interrupts+0x24>)
+ 8001be6:	0018      	movs	r0, r3
+ 8001be8:	f7ff fb1e 	bl	8001228 <LL_USART_EnableIT_RXNE>
 
 	return 0;
- 8001f60:	2300      	movs	r3, #0
+ 8001bec:	2300      	movs	r3, #0
 }
- 8001f62:	0018      	movs	r0, r3
- 8001f64:	46bd      	mov	sp, r7
- 8001f66:	bd80      	pop	{r7, pc}
- 8001f68:	40004400 	.word	0x40004400
+ 8001bee:	0018      	movs	r0, r3
+ 8001bf0:	46bd      	mov	sp, r7
+ 8001bf2:	bd80      	pop	{r7, pc}
+ 8001bf4:	40004400 	.word	0x40004400
 
-08001f6c <uart_enable_interrupts>:
+08001bf8 <uart_enable_interrupts>:
 
 int8_t uart_enable_interrupts(void)
 {
- 8001f6c:	b580      	push	{r7, lr}
- 8001f6e:	af00      	add	r7, sp, #0
+ 8001bf8:	b580      	push	{r7, lr}
+ 8001bfa:	af00      	add	r7, sp, #0
 	LL_USART_Enable(USART2);
- 8001f70:	4b07      	ldr	r3, [pc, #28]	; (8001f90 <uart_enable_interrupts+0x24>)
- 8001f72:	0018      	movs	r0, r3
- 8001f74:	f7ff fa55 	bl	8001422 <LL_USART_Enable>
+ 8001bfc:	4b07      	ldr	r3, [pc, #28]	; (8001c1c <uart_enable_interrupts+0x24>)
+ 8001bfe:	0018      	movs	r0, r3
+ 8001c00:	f7ff f9a9 	bl	8000f56 <LL_USART_Enable>
 	LL_USART_EnableIT_IDLE(USART2);
- 8001f78:	4b05      	ldr	r3, [pc, #20]	; (8001f90 <uart_enable_interrupts+0x24>)
- 8001f7a:	0018      	movs	r0, r3
- 8001f7c:	f7ff fb9b 	bl	80016b6 <LL_USART_EnableIT_IDLE>
+ 8001c04:	4b05      	ldr	r3, [pc, #20]	; (8001c1c <uart_enable_interrupts+0x24>)
+ 8001c06:	0018      	movs	r0, r3
+ 8001c08:	f7ff faef 	bl	80011ea <LL_USART_EnableIT_IDLE>
 	LL_USART_EnableIT_RXNE(USART2);
- 8001f80:	4b03      	ldr	r3, [pc, #12]	; (8001f90 <uart_enable_interrupts+0x24>)
- 8001f82:	0018      	movs	r0, r3
- 8001f84:	f7ff fbb6 	bl	80016f4 <LL_USART_EnableIT_RXNE>
+ 8001c0c:	4b03      	ldr	r3, [pc, #12]	; (8001c1c <uart_enable_interrupts+0x24>)
+ 8001c0e:	0018      	movs	r0, r3
+ 8001c10:	f7ff fb0a 	bl	8001228 <LL_USART_EnableIT_RXNE>
 
 	return 0;
- 8001f88:	2300      	movs	r3, #0
+ 8001c14:	2300      	movs	r3, #0
 }
- 8001f8a:	0018      	movs	r0, r3
- 8001f8c:	46bd      	mov	sp, r7
- 8001f8e:	bd80      	pop	{r7, pc}
- 8001f90:	40004400 	.word	0x40004400
+ 8001c16:	0018      	movs	r0, r3
+ 8001c18:	46bd      	mov	sp, r7
+ 8001c1a:	bd80      	pop	{r7, pc}
+ 8001c1c:	40004400 	.word	0x40004400
 
-08001f94 <modbus_slave_callback>:
+08001c20 <modbus_slave_callback>:
 
 int8_t modbus_slave_callback(modbus_transaction_t *transaction)
 {
- 8001f94:	b580      	push	{r7, lr}
- 8001f96:	b086      	sub	sp, #24
- 8001f98:	af00      	add	r7, sp, #0
- 8001f9a:	6078      	str	r0, [r7, #4]
+ 8001c20:	b580      	push	{r7, lr}
+ 8001c22:	b086      	sub	sp, #24
+ 8001c24:	af00      	add	r7, sp, #0
+ 8001c26:	6078      	str	r0, [r7, #4]
 	uint16_t register_number = transaction->register_number;
- 8001f9c:	2316      	movs	r3, #22
- 8001f9e:	18fb      	adds	r3, r7, r3
- 8001fa0:	687a      	ldr	r2, [r7, #4]
- 8001fa2:	8892      	ldrh	r2, [r2, #4]
- 8001fa4:	801a      	strh	r2, [r3, #0]
+ 8001c28:	2316      	movs	r3, #22
+ 8001c2a:	18fb      	adds	r3, r7, r3
+ 8001c2c:	687a      	ldr	r2, [r7, #4]
+ 8001c2e:	8892      	ldrh	r2, [r2, #4]
+ 8001c30:	801a      	strh	r2, [r3, #0]
 	switch (transaction->function_code)
- 8001fa6:	687b      	ldr	r3, [r7, #4]
- 8001fa8:	781b      	ldrb	r3, [r3, #0]
- 8001faa:	2b10      	cmp	r3, #16
- 8001fac:	d100      	bne.n	8001fb0 <modbus_slave_callback+0x1c>
- 8001fae:	e090      	b.n	80020d2 <modbus_slave_callback+0x13e>
- 8001fb0:	dd00      	ble.n	8001fb4 <modbus_slave_callback+0x20>
- 8001fb2:	e106      	b.n	80021c2 <modbus_slave_callback+0x22e>
- 8001fb4:	2b06      	cmp	r3, #6
- 8001fb6:	d100      	bne.n	8001fba <modbus_slave_callback+0x26>
- 8001fb8:	e088      	b.n	80020cc <modbus_slave_callback+0x138>
- 8001fba:	dd00      	ble.n	8001fbe <modbus_slave_callback+0x2a>
- 8001fbc:	e101      	b.n	80021c2 <modbus_slave_callback+0x22e>
- 8001fbe:	2b03      	cmp	r3, #3
- 8001fc0:	d04c      	beq.n	800205c <modbus_slave_callback+0xc8>
- 8001fc2:	2b04      	cmp	r3, #4
- 8001fc4:	d000      	beq.n	8001fc8 <modbus_slave_callback+0x34>
- 8001fc6:	e0fc      	b.n	80021c2 <modbus_slave_callback+0x22e>
+ 8001c32:	687b      	ldr	r3, [r7, #4]
+ 8001c34:	781b      	ldrb	r3, [r3, #0]
+ 8001c36:	2b10      	cmp	r3, #16
+ 8001c38:	d100      	bne.n	8001c3c <modbus_slave_callback+0x1c>
+ 8001c3a:	e0d6      	b.n	8001dea <modbus_slave_callback+0x1ca>
+ 8001c3c:	dd00      	ble.n	8001c40 <modbus_slave_callback+0x20>
+ 8001c3e:	e286      	b.n	800214e <modbus_slave_callback+0x52e>
+ 8001c40:	2b06      	cmp	r3, #6
+ 8001c42:	d100      	bne.n	8001c46 <modbus_slave_callback+0x26>
+ 8001c44:	e0ce      	b.n	8001de4 <modbus_slave_callback+0x1c4>
+ 8001c46:	dd00      	ble.n	8001c4a <modbus_slave_callback+0x2a>
+ 8001c48:	e281      	b.n	800214e <modbus_slave_callback+0x52e>
+ 8001c4a:	2b03      	cmp	r3, #3
+ 8001c4c:	d05f      	beq.n	8001d0e <modbus_slave_callback+0xee>
+ 8001c4e:	2b04      	cmp	r3, #4
+ 8001c50:	d000      	beq.n	8001c54 <modbus_slave_callback+0x34>
+ 8001c52:	e27c      	b.n	800214e <modbus_slave_callback+0x52e>
 	{
 		case MODBUS_READ_INPUT_REGISTERS:
 			for (int i = 0; i < transaction->register_count; i++, register_number++)
- 8001fc8:	2300      	movs	r3, #0
- 8001fca:	613b      	str	r3, [r7, #16]
- 8001fcc:	e03e      	b.n	800204c <modbus_slave_callback+0xb8>
+ 8001c54:	2300      	movs	r3, #0
+ 8001c56:	613b      	str	r3, [r7, #16]
+ 8001c58:	e051      	b.n	8001cfe <modbus_slave_callback+0xde>
 			{
 				switch (register_number)
- 8001fce:	2316      	movs	r3, #22
- 8001fd0:	18fb      	adds	r3, r7, r3
- 8001fd2:	881b      	ldrh	r3, [r3, #0]
- 8001fd4:	4a7e      	ldr	r2, [pc, #504]	; (80021d0 <modbus_slave_callback+0x23c>)
- 8001fd6:	4293      	cmp	r3, r2
- 8001fd8:	d021      	beq.n	800201e <modbus_slave_callback+0x8a>
- 8001fda:	4a7d      	ldr	r2, [pc, #500]	; (80021d0 <modbus_slave_callback+0x23c>)
- 8001fdc:	4293      	cmp	r3, r2
- 8001fde:	dc29      	bgt.n	8002034 <modbus_slave_callback+0xa0>
- 8001fe0:	4a7c      	ldr	r2, [pc, #496]	; (80021d4 <modbus_slave_callback+0x240>)
- 8001fe2:	4293      	cmp	r3, r2
- 8001fe4:	d003      	beq.n	8001fee <modbus_slave_callback+0x5a>
- 8001fe6:	4a7c      	ldr	r2, [pc, #496]	; (80021d8 <modbus_slave_callback+0x244>)
- 8001fe8:	4293      	cmp	r3, r2
- 8001fea:	d00c      	beq.n	8002006 <modbus_slave_callback+0x72>
- 8001fec:	e022      	b.n	8002034 <modbus_slave_callback+0xa0>
+ 8001c5a:	2316      	movs	r3, #22
+ 8001c5c:	18fb      	adds	r3, r7, r3
+ 8001c5e:	881b      	ldrh	r3, [r3, #0]
+ 8001c60:	4aba      	ldr	r2, [pc, #744]	; (8001f4c <modbus_slave_callback+0x32c>)
+ 8001c62:	4694      	mov	ip, r2
+ 8001c64:	4463      	add	r3, ip
+ 8001c66:	2b04      	cmp	r3, #4
+ 8001c68:	d83d      	bhi.n	8001ce6 <modbus_slave_callback+0xc6>
+ 8001c6a:	009a      	lsls	r2, r3, #2
+ 8001c6c:	4bb8      	ldr	r3, [pc, #736]	; (8001f50 <modbus_slave_callback+0x330>)
+ 8001c6e:	18d3      	adds	r3, r2, r3
+ 8001c70:	681b      	ldr	r3, [r3, #0]
+ 8001c72:	469f      	mov	pc, r3
 				{
 					case REGISTER_NUM_T:
 						transaction->input_registers_signed[i] = (int16_t)T_SHT4x;
- 8001fee:	4b7b      	ldr	r3, [pc, #492]	; (80021dc <modbus_slave_callback+0x248>)
- 8001ff0:	2100      	movs	r1, #0
- 8001ff2:	5e59      	ldrsh	r1, [r3, r1]
- 8001ff4:	687a      	ldr	r2, [r7, #4]
- 8001ff6:	693b      	ldr	r3, [r7, #16]
- 8001ff8:	3304      	adds	r3, #4
- 8001ffa:	005b      	lsls	r3, r3, #1
- 8001ffc:	18d3      	adds	r3, r2, r3
- 8001ffe:	3302      	adds	r3, #2
- 8002000:	1c0a      	adds	r2, r1, #0
- 8002002:	801a      	strh	r2, [r3, #0]
+ 8001c74:	4bb7      	ldr	r3, [pc, #732]	; (8001f54 <modbus_slave_callback+0x334>)
+ 8001c76:	2100      	movs	r1, #0
+ 8001c78:	5e59      	ldrsh	r1, [r3, r1]
+ 8001c7a:	687a      	ldr	r2, [r7, #4]
+ 8001c7c:	693b      	ldr	r3, [r7, #16]
+ 8001c7e:	3304      	adds	r3, #4
+ 8001c80:	005b      	lsls	r3, r3, #1
+ 8001c82:	18d3      	adds	r3, r2, r3
+ 8001c84:	3302      	adds	r3, #2
+ 8001c86:	1c0a      	adds	r2, r1, #0
+ 8001c88:	801a      	strh	r2, [r3, #0]
 						break;
- 8002004:	e019      	b.n	800203a <modbus_slave_callback+0xa6>
+ 8001c8a:	e02f      	b.n	8001cec <modbus_slave_callback+0xcc>
 					case REGISTER_NUM_T_F:
 						transaction->input_registers_signed[i] = (int16_t)TF_SHT4x;
- 8002006:	4b76      	ldr	r3, [pc, #472]	; (80021e0 <modbus_slave_callback+0x24c>)
- 8002008:	2100      	movs	r1, #0
- 800200a:	5e59      	ldrsh	r1, [r3, r1]
- 800200c:	687a      	ldr	r2, [r7, #4]
- 800200e:	693b      	ldr	r3, [r7, #16]
- 8002010:	3304      	adds	r3, #4
- 8002012:	005b      	lsls	r3, r3, #1
- 8002014:	18d3      	adds	r3, r2, r3
- 8002016:	3302      	adds	r3, #2
- 8002018:	1c0a      	adds	r2, r1, #0
- 800201a:	801a      	strh	r2, [r3, #0]
+ 8001c8c:	4bb2      	ldr	r3, [pc, #712]	; (8001f58 <modbus_slave_callback+0x338>)
+ 8001c8e:	2100      	movs	r1, #0
+ 8001c90:	5e59      	ldrsh	r1, [r3, r1]
+ 8001c92:	687a      	ldr	r2, [r7, #4]
+ 8001c94:	693b      	ldr	r3, [r7, #16]
+ 8001c96:	3304      	adds	r3, #4
+ 8001c98:	005b      	lsls	r3, r3, #1
+ 8001c9a:	18d3      	adds	r3, r2, r3
+ 8001c9c:	3302      	adds	r3, #2
+ 8001c9e:	1c0a      	adds	r2, r1, #0
+ 8001ca0:	801a      	strh	r2, [r3, #0]
 						break;
- 800201c:	e00d      	b.n	800203a <modbus_slave_callback+0xa6>
+ 8001ca2:	e023      	b.n	8001cec <modbus_slave_callback+0xcc>
 					case REGISTER_NUM_RH:
 						transaction->input_registers[i] = (uint16_t)RH_SHT4x;
- 800201e:	4b71      	ldr	r3, [pc, #452]	; (80021e4 <modbus_slave_callback+0x250>)
- 8002020:	8819      	ldrh	r1, [r3, #0]
- 8002022:	687a      	ldr	r2, [r7, #4]
- 8002024:	693b      	ldr	r3, [r7, #16]
- 8002026:	3304      	adds	r3, #4
- 8002028:	005b      	lsls	r3, r3, #1
- 800202a:	18d3      	adds	r3, r2, r3
- 800202c:	3302      	adds	r3, #2
- 800202e:	1c0a      	adds	r2, r1, #0
- 8002030:	801a      	strh	r2, [r3, #0]
+ 8001ca4:	4bad      	ldr	r3, [pc, #692]	; (8001f5c <modbus_slave_callback+0x33c>)
+ 8001ca6:	8819      	ldrh	r1, [r3, #0]
+ 8001ca8:	687a      	ldr	r2, [r7, #4]
+ 8001caa:	693b      	ldr	r3, [r7, #16]
+ 8001cac:	3304      	adds	r3, #4
+ 8001cae:	005b      	lsls	r3, r3, #1
+ 8001cb0:	18d3      	adds	r3, r2, r3
+ 8001cb2:	3302      	adds	r3, #2
+ 8001cb4:	1c0a      	adds	r2, r1, #0
+ 8001cb6:	801a      	strh	r2, [r3, #0]
 						break;
- 8002032:	e002      	b.n	800203a <modbus_slave_callback+0xa6>
+ 8001cb8:	e018      	b.n	8001cec <modbus_slave_callback+0xcc>
+					case REGISTER_NUM_LIGHT_INTENSITY_0:
+						transaction->input_registers[i] = (uint16_t)light_ch0;
+ 8001cba:	4ba9      	ldr	r3, [pc, #676]	; (8001f60 <modbus_slave_callback+0x340>)
+ 8001cbc:	8819      	ldrh	r1, [r3, #0]
+ 8001cbe:	687a      	ldr	r2, [r7, #4]
+ 8001cc0:	693b      	ldr	r3, [r7, #16]
+ 8001cc2:	3304      	adds	r3, #4
+ 8001cc4:	005b      	lsls	r3, r3, #1
+ 8001cc6:	18d3      	adds	r3, r2, r3
+ 8001cc8:	3302      	adds	r3, #2
+ 8001cca:	1c0a      	adds	r2, r1, #0
+ 8001ccc:	801a      	strh	r2, [r3, #0]
+						break;
+ 8001cce:	e00d      	b.n	8001cec <modbus_slave_callback+0xcc>
+					case REGISTER_NUM_LIGHT_INTENSITY_1:
+						transaction->input_registers[i] = (uint16_t)light_ch1;
+ 8001cd0:	4ba4      	ldr	r3, [pc, #656]	; (8001f64 <modbus_slave_callback+0x344>)
+ 8001cd2:	8819      	ldrh	r1, [r3, #0]
+ 8001cd4:	687a      	ldr	r2, [r7, #4]
+ 8001cd6:	693b      	ldr	r3, [r7, #16]
+ 8001cd8:	3304      	adds	r3, #4
+ 8001cda:	005b      	lsls	r3, r3, #1
+ 8001cdc:	18d3      	adds	r3, r2, r3
+ 8001cde:	3302      	adds	r3, #2
+ 8001ce0:	1c0a      	adds	r2, r1, #0
+ 8001ce2:	801a      	strh	r2, [r3, #0]
+						break;
+ 8001ce4:	e002      	b.n	8001cec <modbus_slave_callback+0xcc>
 					default:
 						return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
- 8002034:	2305      	movs	r3, #5
- 8002036:	425b      	negs	r3, r3
- 8002038:	e0c5      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 8001ce6:	2305      	movs	r3, #5
+ 8001ce8:	425b      	negs	r3, r3
+ 8001cea:	e232      	b.n	8002152 <modbus_slave_callback+0x532>
 			for (int i = 0; i < transaction->register_count; i++, register_number++)
- 800203a:	693b      	ldr	r3, [r7, #16]
- 800203c:	3301      	adds	r3, #1
- 800203e:	613b      	str	r3, [r7, #16]
- 8002040:	2116      	movs	r1, #22
- 8002042:	187b      	adds	r3, r7, r1
- 8002044:	881a      	ldrh	r2, [r3, #0]
- 8002046:	187b      	adds	r3, r7, r1
- 8002048:	3201      	adds	r2, #1
- 800204a:	801a      	strh	r2, [r3, #0]
- 800204c:	687b      	ldr	r3, [r7, #4]
- 800204e:	799b      	ldrb	r3, [r3, #6]
- 8002050:	001a      	movs	r2, r3
- 8002052:	693b      	ldr	r3, [r7, #16]
- 8002054:	4293      	cmp	r3, r2
- 8002056:	dbba      	blt.n	8001fce <modbus_slave_callback+0x3a>
+ 8001cec:	693b      	ldr	r3, [r7, #16]
+ 8001cee:	3301      	adds	r3, #1
+ 8001cf0:	613b      	str	r3, [r7, #16]
+ 8001cf2:	2116      	movs	r1, #22
+ 8001cf4:	187b      	adds	r3, r7, r1
+ 8001cf6:	881a      	ldrh	r2, [r3, #0]
+ 8001cf8:	187b      	adds	r3, r7, r1
+ 8001cfa:	3201      	adds	r2, #1
+ 8001cfc:	801a      	strh	r2, [r3, #0]
+ 8001cfe:	687b      	ldr	r3, [r7, #4]
+ 8001d00:	799b      	ldrb	r3, [r3, #6]
+ 8001d02:	001a      	movs	r2, r3
+ 8001d04:	693b      	ldr	r3, [r7, #16]
+ 8001d06:	4293      	cmp	r3, r2
+ 8001d08:	dba7      	blt.n	8001c5a <modbus_slave_callback+0x3a>
 				}
 			}
 			return MODBUS_OK;
- 8002058:	2300      	movs	r3, #0
- 800205a:	e0b4      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 8001d0a:	2300      	movs	r3, #0
+ 8001d0c:	e221      	b.n	8002152 <modbus_slave_callback+0x532>
 		case MODBUS_READ_HOLDING_REGISTERS:
 			for (int i = 0; i < transaction->register_count; i++, register_number++)
- 800205c:	2300      	movs	r3, #0
- 800205e:	60fb      	str	r3, [r7, #12]
- 8002060:	e02c      	b.n	80020bc <modbus_slave_callback+0x128>
+ 8001d0e:	2300      	movs	r3, #0
+ 8001d10:	60fb      	str	r3, [r7, #12]
+ 8001d12:	e05f      	b.n	8001dd4 <modbus_slave_callback+0x1b4>
 			{
 				switch (register_number)
- 8002062:	2316      	movs	r3, #22
- 8002064:	18fb      	adds	r3, r7, r3
- 8002066:	881b      	ldrh	r3, [r3, #0]
- 8002068:	4a5f      	ldr	r2, [pc, #380]	; (80021e8 <modbus_slave_callback+0x254>)
- 800206a:	4293      	cmp	r3, r2
- 800206c:	d003      	beq.n	8002076 <modbus_slave_callback+0xe2>
- 800206e:	4a5f      	ldr	r2, [pc, #380]	; (80021ec <modbus_slave_callback+0x258>)
- 8002070:	4293      	cmp	r3, r2
- 8002072:	d00b      	beq.n	800208c <modbus_slave_callback+0xf8>
- 8002074:	e016      	b.n	80020a4 <modbus_slave_callback+0x110>
+ 8001d14:	2316      	movs	r3, #22
+ 8001d16:	18fb      	adds	r3, r7, r3
+ 8001d18:	881b      	ldrh	r3, [r3, #0]
+ 8001d1a:	4a93      	ldr	r2, [pc, #588]	; (8001f68 <modbus_slave_callback+0x348>)
+ 8001d1c:	4694      	mov	ip, r2
+ 8001d1e:	4463      	add	r3, ip
+ 8001d20:	2b07      	cmp	r3, #7
+ 8001d22:	d84b      	bhi.n	8001dbc <modbus_slave_callback+0x19c>
+ 8001d24:	009a      	lsls	r2, r3, #2
+ 8001d26:	4b91      	ldr	r3, [pc, #580]	; (8001f6c <modbus_slave_callback+0x34c>)
+ 8001d28:	18d3      	adds	r3, r2, r3
+ 8001d2a:	681b      	ldr	r3, [r3, #0]
+ 8001d2c:	469f      	mov	pc, r3
 				{
 					case REGISTER_NUM_MODBUS_ADDR:
 						transaction->holding_registers[i] = (uint16_t)(sensor_config.modbus_addr);
- 8002076:	4b5e      	ldr	r3, [pc, #376]	; (80021f0 <modbus_slave_callback+0x25c>)
- 8002078:	8999      	ldrh	r1, [r3, #12]
- 800207a:	687a      	ldr	r2, [r7, #4]
- 800207c:	68fb      	ldr	r3, [r7, #12]
- 800207e:	3304      	adds	r3, #4
- 8002080:	005b      	lsls	r3, r3, #1
- 8002082:	18d3      	adds	r3, r2, r3
- 8002084:	3302      	adds	r3, #2
- 8002086:	1c0a      	adds	r2, r1, #0
- 8002088:	801a      	strh	r2, [r3, #0]
+ 8001d2e:	4b90      	ldr	r3, [pc, #576]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001d30:	8899      	ldrh	r1, [r3, #4]
+ 8001d32:	687a      	ldr	r2, [r7, #4]
+ 8001d34:	68fb      	ldr	r3, [r7, #12]
+ 8001d36:	3304      	adds	r3, #4
+ 8001d38:	005b      	lsls	r3, r3, #1
+ 8001d3a:	18d3      	adds	r3, r2, r3
+ 8001d3c:	3302      	adds	r3, #2
+ 8001d3e:	1c0a      	adds	r2, r1, #0
+ 8001d40:	801a      	strh	r2, [r3, #0]
 						break;
- 800208a:	e00e      	b.n	80020aa <modbus_slave_callback+0x116>
+ 8001d42:	e03e      	b.n	8001dc2 <modbus_slave_callback+0x1a2>
 					case REGISTER_NUM_BAUDRATE:
 						transaction->holding_registers[i] = (uint16_t)(sensor_config.baudrate_index);
- 800208c:	4b58      	ldr	r3, [pc, #352]	; (80021f0 <modbus_slave_callback+0x25c>)
- 800208e:	691b      	ldr	r3, [r3, #16]
- 8002090:	b299      	uxth	r1, r3
- 8002092:	687a      	ldr	r2, [r7, #4]
- 8002094:	68fb      	ldr	r3, [r7, #12]
- 8002096:	3304      	adds	r3, #4
- 8002098:	005b      	lsls	r3, r3, #1
- 800209a:	18d3      	adds	r3, r2, r3
- 800209c:	3302      	adds	r3, #2
- 800209e:	1c0a      	adds	r2, r1, #0
- 80020a0:	801a      	strh	r2, [r3, #0]
+ 8001d44:	4b8a      	ldr	r3, [pc, #552]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001d46:	689b      	ldr	r3, [r3, #8]
+ 8001d48:	b299      	uxth	r1, r3
+ 8001d4a:	687a      	ldr	r2, [r7, #4]
+ 8001d4c:	68fb      	ldr	r3, [r7, #12]
+ 8001d4e:	3304      	adds	r3, #4
+ 8001d50:	005b      	lsls	r3, r3, #1
+ 8001d52:	18d3      	adds	r3, r2, r3
+ 8001d54:	3302      	adds	r3, #2
+ 8001d56:	1c0a      	adds	r2, r1, #0
+ 8001d58:	801a      	strh	r2, [r3, #0]
 						break;
- 80020a2:	e002      	b.n	80020aa <modbus_slave_callback+0x116>
+ 8001d5a:	e032      	b.n	8001dc2 <modbus_slave_callback+0x1a2>
+					case REGISTER_NUM_LTR329_GAIN:
+						transaction->holding_registers[i] = (uint16_t)(sensor_config.ltr329_gain);
+ 8001d5c:	4b84      	ldr	r3, [pc, #528]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001d5e:	781b      	ldrb	r3, [r3, #0]
+ 8001d60:	b299      	uxth	r1, r3
+ 8001d62:	687a      	ldr	r2, [r7, #4]
+ 8001d64:	68fb      	ldr	r3, [r7, #12]
+ 8001d66:	3304      	adds	r3, #4
+ 8001d68:	005b      	lsls	r3, r3, #1
+ 8001d6a:	18d3      	adds	r3, r2, r3
+ 8001d6c:	3302      	adds	r3, #2
+ 8001d6e:	1c0a      	adds	r2, r1, #0
+ 8001d70:	801a      	strh	r2, [r3, #0]
+						/* TODO : IMPLEMENT */
+						break;
+ 8001d72:	e026      	b.n	8001dc2 <modbus_slave_callback+0x1a2>
+					case REGISTER_NUM_LTR329_INTEGRATION_TIME:
+						transaction->holding_registers[i] = (uint16_t)(sensor_config.ltr329_integ_time);
+ 8001d74:	4b7e      	ldr	r3, [pc, #504]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001d76:	789b      	ldrb	r3, [r3, #2]
+ 8001d78:	b299      	uxth	r1, r3
+ 8001d7a:	687a      	ldr	r2, [r7, #4]
+ 8001d7c:	68fb      	ldr	r3, [r7, #12]
+ 8001d7e:	3304      	adds	r3, #4
+ 8001d80:	005b      	lsls	r3, r3, #1
+ 8001d82:	18d3      	adds	r3, r2, r3
+ 8001d84:	3302      	adds	r3, #2
+ 8001d86:	1c0a      	adds	r2, r1, #0
+ 8001d88:	801a      	strh	r2, [r3, #0]
+						/* TODO : IMPLEMENT */
+						break;
+ 8001d8a:	e01a      	b.n	8001dc2 <modbus_slave_callback+0x1a2>
+					case REGISTER_NUM_LTR329_MEAS_RATE:
+						transaction->holding_registers[i] = (uint16_t)(sensor_config.ltr329_meas_rate);
+ 8001d8c:	4b78      	ldr	r3, [pc, #480]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001d8e:	78db      	ldrb	r3, [r3, #3]
+ 8001d90:	b299      	uxth	r1, r3
+ 8001d92:	687a      	ldr	r2, [r7, #4]
+ 8001d94:	68fb      	ldr	r3, [r7, #12]
+ 8001d96:	3304      	adds	r3, #4
+ 8001d98:	005b      	lsls	r3, r3, #1
+ 8001d9a:	18d3      	adds	r3, r2, r3
+ 8001d9c:	3302      	adds	r3, #2
+ 8001d9e:	1c0a      	adds	r2, r1, #0
+ 8001da0:	801a      	strh	r2, [r3, #0]
+						/* TODO : IMPLEMENT */
+						break;
+ 8001da2:	e00e      	b.n	8001dc2 <modbus_slave_callback+0x1a2>
+					case REGISTER_NUM_LTR329_MODE:
+						transaction->holding_registers[i] = (uint16_t)(sensor_config.ltr329_mode);
+ 8001da4:	4b72      	ldr	r3, [pc, #456]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001da6:	785b      	ldrb	r3, [r3, #1]
+ 8001da8:	b299      	uxth	r1, r3
+ 8001daa:	687a      	ldr	r2, [r7, #4]
+ 8001dac:	68fb      	ldr	r3, [r7, #12]
+ 8001dae:	3304      	adds	r3, #4
+ 8001db0:	005b      	lsls	r3, r3, #1
+ 8001db2:	18d3      	adds	r3, r2, r3
+ 8001db4:	3302      	adds	r3, #2
+ 8001db6:	1c0a      	adds	r2, r1, #0
+ 8001db8:	801a      	strh	r2, [r3, #0]
+						/* TODO : IMPLEMENT */
+						break;
+ 8001dba:	e002      	b.n	8001dc2 <modbus_slave_callback+0x1a2>
 					default:
 						return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
- 80020a4:	2305      	movs	r3, #5
- 80020a6:	425b      	negs	r3, r3
- 80020a8:	e08d      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 8001dbc:	2305      	movs	r3, #5
+ 8001dbe:	425b      	negs	r3, r3
+ 8001dc0:	e1c7      	b.n	8002152 <modbus_slave_callback+0x532>
 			for (int i = 0; i < transaction->register_count; i++, register_number++)
- 80020aa:	68fb      	ldr	r3, [r7, #12]
- 80020ac:	3301      	adds	r3, #1
- 80020ae:	60fb      	str	r3, [r7, #12]
- 80020b0:	2116      	movs	r1, #22
- 80020b2:	187b      	adds	r3, r7, r1
- 80020b4:	881a      	ldrh	r2, [r3, #0]
- 80020b6:	187b      	adds	r3, r7, r1
- 80020b8:	3201      	adds	r2, #1
- 80020ba:	801a      	strh	r2, [r3, #0]
- 80020bc:	687b      	ldr	r3, [r7, #4]
- 80020be:	799b      	ldrb	r3, [r3, #6]
- 80020c0:	001a      	movs	r2, r3
- 80020c2:	68fb      	ldr	r3, [r7, #12]
- 80020c4:	4293      	cmp	r3, r2
- 80020c6:	dbcc      	blt.n	8002062 <modbus_slave_callback+0xce>
+ 8001dc2:	68fb      	ldr	r3, [r7, #12]
+ 8001dc4:	3301      	adds	r3, #1
+ 8001dc6:	60fb      	str	r3, [r7, #12]
+ 8001dc8:	2116      	movs	r1, #22
+ 8001dca:	187b      	adds	r3, r7, r1
+ 8001dcc:	881a      	ldrh	r2, [r3, #0]
+ 8001dce:	187b      	adds	r3, r7, r1
+ 8001dd0:	3201      	adds	r2, #1
+ 8001dd2:	801a      	strh	r2, [r3, #0]
+ 8001dd4:	687b      	ldr	r3, [r7, #4]
+ 8001dd6:	799b      	ldrb	r3, [r3, #6]
+ 8001dd8:	001a      	movs	r2, r3
+ 8001dda:	68fb      	ldr	r3, [r7, #12]
+ 8001ddc:	4293      	cmp	r3, r2
+ 8001dde:	db99      	blt.n	8001d14 <modbus_slave_callback+0xf4>
 				}
 			}
 			return MODBUS_OK;
- 80020c8:	2300      	movs	r3, #0
- 80020ca:	e07c      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 8001de0:	2300      	movs	r3, #0
+ 8001de2:	e1b6      	b.n	8002152 <modbus_slave_callback+0x532>
 		case MODBUS_WRITE_SINGLE_REGISTER:
 			transaction->register_count = 1;
- 80020cc:	687b      	ldr	r3, [r7, #4]
- 80020ce:	2201      	movs	r2, #1
- 80020d0:	719a      	strb	r2, [r3, #6]
+ 8001de4:	687b      	ldr	r3, [r7, #4]
+ 8001de6:	2201      	movs	r2, #1
+ 8001de8:	719a      	strb	r2, [r3, #6]
 		case MODBUS_WRITE_MULTIPLE_REGISTERS:
 			for (int i = 0; i < transaction->register_count; i++, register_number++)
- 80020d2:	2300      	movs	r3, #0
- 80020d4:	60bb      	str	r3, [r7, #8]
- 80020d6:	e069      	b.n	80021ac <modbus_slave_callback+0x218>
+ 8001dea:	2300      	movs	r3, #0
+ 8001dec:	60bb      	str	r3, [r7, #8]
+ 8001dee:	e1a2      	b.n	8002136 <modbus_slave_callback+0x516>
 			{
 				switch (register_number)
- 80020d8:	2316      	movs	r3, #22
- 80020da:	18fb      	adds	r3, r7, r3
- 80020dc:	881b      	ldrh	r3, [r3, #0]
- 80020de:	4a45      	ldr	r2, [pc, #276]	; (80021f4 <modbus_slave_callback+0x260>)
- 80020e0:	4293      	cmp	r3, r2
- 80020e2:	d048      	beq.n	8002176 <modbus_slave_callback+0x1e2>
- 80020e4:	4a43      	ldr	r2, [pc, #268]	; (80021f4 <modbus_slave_callback+0x260>)
- 80020e6:	4293      	cmp	r3, r2
- 80020e8:	dc54      	bgt.n	8002194 <modbus_slave_callback+0x200>
- 80020ea:	4a3f      	ldr	r2, [pc, #252]	; (80021e8 <modbus_slave_callback+0x254>)
- 80020ec:	4293      	cmp	r3, r2
- 80020ee:	d003      	beq.n	80020f8 <modbus_slave_callback+0x164>
- 80020f0:	4a3e      	ldr	r2, [pc, #248]	; (80021ec <modbus_slave_callback+0x258>)
- 80020f2:	4293      	cmp	r3, r2
- 80020f4:	d022      	beq.n	800213c <modbus_slave_callback+0x1a8>
- 80020f6:	e04d      	b.n	8002194 <modbus_slave_callback+0x200>
+ 8001df0:	2316      	movs	r3, #22
+ 8001df2:	18fb      	adds	r3, r7, r3
+ 8001df4:	881b      	ldrh	r3, [r3, #0]
+ 8001df6:	4a5f      	ldr	r2, [pc, #380]	; (8001f74 <modbus_slave_callback+0x354>)
+ 8001df8:	4293      	cmp	r3, r2
+ 8001dfa:	dc0e      	bgt.n	8001e1a <modbus_slave_callback+0x1fa>
+ 8001dfc:	4a5e      	ldr	r2, [pc, #376]	; (8001f78 <modbus_slave_callback+0x358>)
+ 8001dfe:	4293      	cmp	r3, r2
+ 8001e00:	da00      	bge.n	8001e04 <modbus_slave_callback+0x1e4>
+ 8001e02:	e18c      	b.n	800211e <modbus_slave_callback+0x4fe>
+ 8001e04:	4a58      	ldr	r2, [pc, #352]	; (8001f68 <modbus_slave_callback+0x348>)
+ 8001e06:	4694      	mov	ip, r2
+ 8001e08:	4463      	add	r3, ip
+ 8001e0a:	2b07      	cmp	r3, #7
+ 8001e0c:	d900      	bls.n	8001e10 <modbus_slave_callback+0x1f0>
+ 8001e0e:	e186      	b.n	800211e <modbus_slave_callback+0x4fe>
+ 8001e10:	009a      	lsls	r2, r3, #2
+ 8001e12:	4b5a      	ldr	r3, [pc, #360]	; (8001f7c <modbus_slave_callback+0x35c>)
+ 8001e14:	18d3      	adds	r3, r2, r3
+ 8001e16:	681b      	ldr	r3, [r3, #0]
+ 8001e18:	469f      	mov	pc, r3
+ 8001e1a:	4a59      	ldr	r2, [pc, #356]	; (8001f80 <modbus_slave_callback+0x360>)
+ 8001e1c:	4293      	cmp	r3, r2
+ 8001e1e:	d03f      	beq.n	8001ea0 <modbus_slave_callback+0x280>
+ 8001e20:	e17d      	b.n	800211e <modbus_slave_callback+0x4fe>
 				{
 					case REGISTER_NUM_MODBUS_ADDR:
 						/* allowed values: [1, 247] (from 1 to 247) as given in section 2.1 of document
 						 * MODBUS over Serial Line: Specification and Implementation Guide (V1.02) */
 						if (transaction->holding_registers[i] < 1 || transaction->holding_registers[i] > 247) {
- 80020f8:	687a      	ldr	r2, [r7, #4]
- 80020fa:	68bb      	ldr	r3, [r7, #8]
- 80020fc:	3304      	adds	r3, #4
- 80020fe:	005b      	lsls	r3, r3, #1
- 8002100:	18d3      	adds	r3, r2, r3
- 8002102:	3302      	adds	r3, #2
- 8002104:	881b      	ldrh	r3, [r3, #0]
- 8002106:	2b00      	cmp	r3, #0
- 8002108:	d008      	beq.n	800211c <modbus_slave_callback+0x188>
- 800210a:	687a      	ldr	r2, [r7, #4]
- 800210c:	68bb      	ldr	r3, [r7, #8]
- 800210e:	3304      	adds	r3, #4
- 8002110:	005b      	lsls	r3, r3, #1
- 8002112:	18d3      	adds	r3, r2, r3
- 8002114:	3302      	adds	r3, #2
- 8002116:	881b      	ldrh	r3, [r3, #0]
- 8002118:	2bf7      	cmp	r3, #247	; 0xf7
- 800211a:	d902      	bls.n	8002122 <modbus_slave_callback+0x18e>
+ 8001e22:	687a      	ldr	r2, [r7, #4]
+ 8001e24:	68bb      	ldr	r3, [r7, #8]
+ 8001e26:	3304      	adds	r3, #4
+ 8001e28:	005b      	lsls	r3, r3, #1
+ 8001e2a:	18d3      	adds	r3, r2, r3
+ 8001e2c:	3302      	adds	r3, #2
+ 8001e2e:	881b      	ldrh	r3, [r3, #0]
+ 8001e30:	2b00      	cmp	r3, #0
+ 8001e32:	d008      	beq.n	8001e46 <modbus_slave_callback+0x226>
+ 8001e34:	687a      	ldr	r2, [r7, #4]
+ 8001e36:	68bb      	ldr	r3, [r7, #8]
+ 8001e38:	3304      	adds	r3, #4
+ 8001e3a:	005b      	lsls	r3, r3, #1
+ 8001e3c:	18d3      	adds	r3, r2, r3
+ 8001e3e:	3302      	adds	r3, #2
+ 8001e40:	881b      	ldrh	r3, [r3, #0]
+ 8001e42:	2bf7      	cmp	r3, #247	; 0xf7
+ 8001e44:	d902      	bls.n	8001e4c <modbus_slave_callback+0x22c>
 							return MODBUS_ERROR_OUT_OF_BOUNDS;
- 800211c:	2304      	movs	r3, #4
- 800211e:	425b      	negs	r3, r3
- 8002120:	e051      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 8001e46:	2304      	movs	r3, #4
+ 8001e48:	425b      	negs	r3, r3
+ 8001e4a:	e182      	b.n	8002152 <modbus_slave_callback+0x532>
 						}
 						sensor_config.modbus_addr = (uint16_t) transaction->holding_registers[i];
- 8002122:	687a      	ldr	r2, [r7, #4]
- 8002124:	68bb      	ldr	r3, [r7, #8]
- 8002126:	3304      	adds	r3, #4
- 8002128:	005b      	lsls	r3, r3, #1
- 800212a:	18d3      	adds	r3, r2, r3
- 800212c:	3302      	adds	r3, #2
- 800212e:	881a      	ldrh	r2, [r3, #0]
- 8002130:	4b2f      	ldr	r3, [pc, #188]	; (80021f0 <modbus_slave_callback+0x25c>)
- 8002132:	819a      	strh	r2, [r3, #12]
+ 8001e4c:	687a      	ldr	r2, [r7, #4]
+ 8001e4e:	68bb      	ldr	r3, [r7, #8]
+ 8001e50:	3304      	adds	r3, #4
+ 8001e52:	005b      	lsls	r3, r3, #1
+ 8001e54:	18d3      	adds	r3, r2, r3
+ 8001e56:	3302      	adds	r3, #2
+ 8001e58:	881a      	ldrh	r2, [r3, #0]
+ 8001e5a:	4b45      	ldr	r3, [pc, #276]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001e5c:	809a      	strh	r2, [r3, #4]
 						modbus_address_changed = 1;
- 8002134:	4b30      	ldr	r3, [pc, #192]	; (80021f8 <modbus_slave_callback+0x264>)
- 8002136:	2201      	movs	r2, #1
- 8002138:	701a      	strb	r2, [r3, #0]
+ 8001e5e:	4b49      	ldr	r3, [pc, #292]	; (8001f84 <modbus_slave_callback+0x364>)
+ 8001e60:	2201      	movs	r2, #1
+ 8001e62:	701a      	strb	r2, [r3, #0]
 						break;
- 800213a:	e02e      	b.n	800219a <modbus_slave_callback+0x206>
+ 8001e64:	e15e      	b.n	8002124 <modbus_slave_callback+0x504>
 					case REGISTER_NUM_BAUDRATE:
 						/* allowed values: [0, 9] (from 0 to 9, where 9 == config_baudrates_length) */
 						if (transaction->holding_registers[i] >= config_baudrates_length) {
- 800213c:	687a      	ldr	r2, [r7, #4]
- 800213e:	68bb      	ldr	r3, [r7, #8]
- 8002140:	3304      	adds	r3, #4
- 8002142:	005b      	lsls	r3, r3, #1
- 8002144:	18d3      	adds	r3, r2, r3
- 8002146:	3302      	adds	r3, #2
- 8002148:	881a      	ldrh	r2, [r3, #0]
- 800214a:	4b2c      	ldr	r3, [pc, #176]	; (80021fc <modbus_slave_callback+0x268>)
- 800214c:	781b      	ldrb	r3, [r3, #0]
- 800214e:	b29b      	uxth	r3, r3
- 8002150:	429a      	cmp	r2, r3
- 8002152:	d302      	bcc.n	800215a <modbus_slave_callback+0x1c6>
+ 8001e66:	687a      	ldr	r2, [r7, #4]
+ 8001e68:	68bb      	ldr	r3, [r7, #8]
+ 8001e6a:	3304      	adds	r3, #4
+ 8001e6c:	005b      	lsls	r3, r3, #1
+ 8001e6e:	18d3      	adds	r3, r2, r3
+ 8001e70:	3302      	adds	r3, #2
+ 8001e72:	881a      	ldrh	r2, [r3, #0]
+ 8001e74:	4b44      	ldr	r3, [pc, #272]	; (8001f88 <modbus_slave_callback+0x368>)
+ 8001e76:	781b      	ldrb	r3, [r3, #0]
+ 8001e78:	b29b      	uxth	r3, r3
+ 8001e7a:	429a      	cmp	r2, r3
+ 8001e7c:	d302      	bcc.n	8001e84 <modbus_slave_callback+0x264>
 							return MODBUS_ERROR_OUT_OF_BOUNDS;
- 8002154:	2304      	movs	r3, #4
- 8002156:	425b      	negs	r3, r3
- 8002158:	e035      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 8001e7e:	2304      	movs	r3, #4
+ 8001e80:	425b      	negs	r3, r3
+ 8001e82:	e166      	b.n	8002152 <modbus_slave_callback+0x532>
 						}
 						sensor_config.baudrate_index = (uint16_t) (transaction->holding_registers[i]);
- 800215a:	687a      	ldr	r2, [r7, #4]
- 800215c:	68bb      	ldr	r3, [r7, #8]
- 800215e:	3304      	adds	r3, #4
- 8002160:	005b      	lsls	r3, r3, #1
- 8002162:	18d3      	adds	r3, r2, r3
- 8002164:	3302      	adds	r3, #2
- 8002166:	881b      	ldrh	r3, [r3, #0]
- 8002168:	001a      	movs	r2, r3
- 800216a:	4b21      	ldr	r3, [pc, #132]	; (80021f0 <modbus_slave_callback+0x25c>)
- 800216c:	611a      	str	r2, [r3, #16]
+ 8001e84:	687a      	ldr	r2, [r7, #4]
+ 8001e86:	68bb      	ldr	r3, [r7, #8]
+ 8001e88:	3304      	adds	r3, #4
+ 8001e8a:	005b      	lsls	r3, r3, #1
+ 8001e8c:	18d3      	adds	r3, r2, r3
+ 8001e8e:	3302      	adds	r3, #2
+ 8001e90:	881b      	ldrh	r3, [r3, #0]
+ 8001e92:	001a      	movs	r2, r3
+ 8001e94:	4b36      	ldr	r3, [pc, #216]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001e96:	609a      	str	r2, [r3, #8]
 						baudrate_changed = 1;
- 800216e:	4b24      	ldr	r3, [pc, #144]	; (8002200 <modbus_slave_callback+0x26c>)
- 8002170:	2201      	movs	r2, #1
- 8002172:	701a      	strb	r2, [r3, #0]
+ 8001e98:	4b3c      	ldr	r3, [pc, #240]	; (8001f8c <modbus_slave_callback+0x36c>)
+ 8001e9a:	2201      	movs	r2, #1
+ 8001e9c:	701a      	strb	r2, [r3, #0]
 						break;
- 8002174:	e011      	b.n	800219a <modbus_slave_callback+0x206>
+ 8001e9e:	e141      	b.n	8002124 <modbus_slave_callback+0x504>
 					case REGISTER_NUM_RESET_DEVICE:
 						if (transaction->holding_registers[i] == 0xABCD) {
- 8002176:	687a      	ldr	r2, [r7, #4]
- 8002178:	68bb      	ldr	r3, [r7, #8]
- 800217a:	3304      	adds	r3, #4
- 800217c:	005b      	lsls	r3, r3, #1
- 800217e:	18d3      	adds	r3, r2, r3
- 8002180:	3302      	adds	r3, #2
- 8002182:	881b      	ldrh	r3, [r3, #0]
- 8002184:	4a1f      	ldr	r2, [pc, #124]	; (8002204 <modbus_slave_callback+0x270>)
- 8002186:	4293      	cmp	r3, r2
- 8002188:	d101      	bne.n	800218e <modbus_slave_callback+0x1fa>
+ 8001ea0:	687a      	ldr	r2, [r7, #4]
+ 8001ea2:	68bb      	ldr	r3, [r7, #8]
+ 8001ea4:	3304      	adds	r3, #4
+ 8001ea6:	005b      	lsls	r3, r3, #1
+ 8001ea8:	18d3      	adds	r3, r2, r3
+ 8001eaa:	3302      	adds	r3, #2
+ 8001eac:	881b      	ldrh	r3, [r3, #0]
+ 8001eae:	4a38      	ldr	r2, [pc, #224]	; (8001f90 <modbus_slave_callback+0x370>)
+ 8001eb0:	4293      	cmp	r3, r2
+ 8001eb2:	d101      	bne.n	8001eb8 <modbus_slave_callback+0x298>
 							/* software reset */
 							NVIC_SystemReset();
- 800218a:	f7fe fe83 	bl	8000e94 <__NVIC_SystemReset>
+ 8001eb4:	f7fe fd88 	bl	80009c8 <__NVIC_SystemReset>
 						} else {
 							return MODBUS_ERROR_OUT_OF_BOUNDS;
- 800218e:	2304      	movs	r3, #4
- 8002190:	425b      	negs	r3, r3
- 8002192:	e018      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 8001eb8:	2304      	movs	r3, #4
+ 8001eba:	425b      	negs	r3, r3
+ 8001ebc:	e149      	b.n	8002152 <modbus_slave_callback+0x532>
 						}
 						break;
+					case REGISTER_NUM_LTR329_GAIN:
+						if (transaction->holding_registers[i] != LTR329_GAIN_1X ||
+ 8001ebe:	687a      	ldr	r2, [r7, #4]
+ 8001ec0:	68bb      	ldr	r3, [r7, #8]
+ 8001ec2:	3304      	adds	r3, #4
+ 8001ec4:	005b      	lsls	r3, r3, #1
+ 8001ec6:	18d3      	adds	r3, r2, r3
+ 8001ec8:	3302      	adds	r3, #2
+ 8001eca:	881b      	ldrh	r3, [r3, #0]
+ 8001ecc:	2b00      	cmp	r3, #0
+ 8001ece:	d12c      	bne.n	8001f2a <modbus_slave_callback+0x30a>
+							transaction->holding_registers[i] != LTR329_GAIN_2X ||
+ 8001ed0:	687a      	ldr	r2, [r7, #4]
+ 8001ed2:	68bb      	ldr	r3, [r7, #8]
+ 8001ed4:	3304      	adds	r3, #4
+ 8001ed6:	005b      	lsls	r3, r3, #1
+ 8001ed8:	18d3      	adds	r3, r2, r3
+ 8001eda:	3302      	adds	r3, #2
+ 8001edc:	881b      	ldrh	r3, [r3, #0]
+						if (transaction->holding_registers[i] != LTR329_GAIN_1X ||
+ 8001ede:	2b04      	cmp	r3, #4
+ 8001ee0:	d123      	bne.n	8001f2a <modbus_slave_callback+0x30a>
+							transaction->holding_registers[i] != LTR329_GAIN_4X ||
+ 8001ee2:	687a      	ldr	r2, [r7, #4]
+ 8001ee4:	68bb      	ldr	r3, [r7, #8]
+ 8001ee6:	3304      	adds	r3, #4
+ 8001ee8:	005b      	lsls	r3, r3, #1
+ 8001eea:	18d3      	adds	r3, r2, r3
+ 8001eec:	3302      	adds	r3, #2
+ 8001eee:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_GAIN_2X ||
+ 8001ef0:	2b08      	cmp	r3, #8
+ 8001ef2:	d11a      	bne.n	8001f2a <modbus_slave_callback+0x30a>
+							transaction->holding_registers[i] != LTR329_GAIN_8X ||
+ 8001ef4:	687a      	ldr	r2, [r7, #4]
+ 8001ef6:	68bb      	ldr	r3, [r7, #8]
+ 8001ef8:	3304      	adds	r3, #4
+ 8001efa:	005b      	lsls	r3, r3, #1
+ 8001efc:	18d3      	adds	r3, r2, r3
+ 8001efe:	3302      	adds	r3, #2
+ 8001f00:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_GAIN_4X ||
+ 8001f02:	2b0c      	cmp	r3, #12
+ 8001f04:	d111      	bne.n	8001f2a <modbus_slave_callback+0x30a>
+							transaction->holding_registers[i] != LTR329_GAIN_48X ||
+ 8001f06:	687a      	ldr	r2, [r7, #4]
+ 8001f08:	68bb      	ldr	r3, [r7, #8]
+ 8001f0a:	3304      	adds	r3, #4
+ 8001f0c:	005b      	lsls	r3, r3, #1
+ 8001f0e:	18d3      	adds	r3, r2, r3
+ 8001f10:	3302      	adds	r3, #2
+ 8001f12:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_GAIN_8X ||
+ 8001f14:	2b18      	cmp	r3, #24
+ 8001f16:	d108      	bne.n	8001f2a <modbus_slave_callback+0x30a>
+							transaction->holding_registers[i] != LTR329_GAIN_96X)
+ 8001f18:	687a      	ldr	r2, [r7, #4]
+ 8001f1a:	68bb      	ldr	r3, [r7, #8]
+ 8001f1c:	3304      	adds	r3, #4
+ 8001f1e:	005b      	lsls	r3, r3, #1
+ 8001f20:	18d3      	adds	r3, r2, r3
+ 8001f22:	3302      	adds	r3, #2
+ 8001f24:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_GAIN_48X ||
+ 8001f26:	2b1c      	cmp	r3, #28
+ 8001f28:	d002      	beq.n	8001f30 <modbus_slave_callback+0x310>
+						{
+							return MODBUS_ERROR_OUT_OF_BOUNDS;
+ 8001f2a:	2304      	movs	r3, #4
+ 8001f2c:	425b      	negs	r3, r3
+ 8001f2e:	e110      	b.n	8002152 <modbus_slave_callback+0x532>
+						}
+						sensor_config.ltr329_gain = (ltr329_gain_t) (transaction->holding_registers[i]);
+ 8001f30:	687a      	ldr	r2, [r7, #4]
+ 8001f32:	68bb      	ldr	r3, [r7, #8]
+ 8001f34:	3304      	adds	r3, #4
+ 8001f36:	005b      	lsls	r3, r3, #1
+ 8001f38:	18d3      	adds	r3, r2, r3
+ 8001f3a:	3302      	adds	r3, #2
+ 8001f3c:	881b      	ldrh	r3, [r3, #0]
+ 8001f3e:	b2da      	uxtb	r2, r3
+ 8001f40:	4b0b      	ldr	r3, [pc, #44]	; (8001f70 <modbus_slave_callback+0x350>)
+ 8001f42:	701a      	strb	r2, [r3, #0]
+						ltr329_config_changed = 1;
+ 8001f44:	4b13      	ldr	r3, [pc, #76]	; (8001f94 <modbus_slave_callback+0x374>)
+ 8001f46:	2201      	movs	r2, #1
+ 8001f48:	701a      	strb	r2, [r3, #0]
+						break;
+ 8001f4a:	e0eb      	b.n	8002124 <modbus_slave_callback+0x504>
+ 8001f4c:	ffff8ac6 	.word	0xffff8ac6
+ 8001f50:	08003fc8 	.word	0x08003fc8
+ 8001f54:	2000003c 	.word	0x2000003c
+ 8001f58:	20000074 	.word	0x20000074
+ 8001f5c:	20000078 	.word	0x20000078
+ 8001f60:	20000076 	.word	0x20000076
+ 8001f64:	2000003e 	.word	0x2000003e
+ 8001f68:	ffff63bf 	.word	0xffff63bf
+ 8001f6c:	08003fdc 	.word	0x08003fdc
+ 8001f70:	20000068 	.word	0x20000068
+ 8001f74:	00009c48 	.word	0x00009c48
+ 8001f78:	00009c41 	.word	0x00009c41
+ 8001f7c:	08003ffc 	.word	0x08003ffc
+ 8001f80:	00009ca4 	.word	0x00009ca4
+ 8001f84:	2000002b 	.word	0x2000002b
+ 8001f88:	08003fc4 	.word	0x08003fc4
+ 8001f8c:	20000029 	.word	0x20000029
+ 8001f90:	0000abcd 	.word	0x0000abcd
+ 8001f94:	2000002a 	.word	0x2000002a
+					case REGISTER_NUM_LTR329_INTEGRATION_TIME:
+						if (transaction->holding_registers[i] != LTR329_INTEGRATION_50MS  ||
+ 8001f98:	687a      	ldr	r2, [r7, #4]
+ 8001f9a:	68bb      	ldr	r3, [r7, #8]
+ 8001f9c:	3304      	adds	r3, #4
+ 8001f9e:	005b      	lsls	r3, r3, #1
+ 8001fa0:	18d3      	adds	r3, r2, r3
+ 8001fa2:	3302      	adds	r3, #2
+ 8001fa4:	881b      	ldrh	r3, [r3, #0]
+ 8001fa6:	2b08      	cmp	r3, #8
+ 8001fa8:	d13e      	bne.n	8002028 <modbus_slave_callback+0x408>
+							transaction->holding_registers[i] != LTR329_INTEGRATION_100MS ||
+ 8001faa:	687a      	ldr	r2, [r7, #4]
+ 8001fac:	68bb      	ldr	r3, [r7, #8]
+ 8001fae:	3304      	adds	r3, #4
+ 8001fb0:	005b      	lsls	r3, r3, #1
+ 8001fb2:	18d3      	adds	r3, r2, r3
+ 8001fb4:	3302      	adds	r3, #2
+ 8001fb6:	881b      	ldrh	r3, [r3, #0]
+						if (transaction->holding_registers[i] != LTR329_INTEGRATION_50MS  ||
+ 8001fb8:	2b00      	cmp	r3, #0
+ 8001fba:	d135      	bne.n	8002028 <modbus_slave_callback+0x408>
+							transaction->holding_registers[i] != LTR329_INTEGRATION_150MS ||
+ 8001fbc:	687a      	ldr	r2, [r7, #4]
+ 8001fbe:	68bb      	ldr	r3, [r7, #8]
+ 8001fc0:	3304      	adds	r3, #4
+ 8001fc2:	005b      	lsls	r3, r3, #1
+ 8001fc4:	18d3      	adds	r3, r2, r3
+ 8001fc6:	3302      	adds	r3, #2
+ 8001fc8:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_INTEGRATION_100MS ||
+ 8001fca:	2b20      	cmp	r3, #32
+ 8001fcc:	d12c      	bne.n	8002028 <modbus_slave_callback+0x408>
+							transaction->holding_registers[i] != LTR329_INTEGRATION_200MS ||
+ 8001fce:	687a      	ldr	r2, [r7, #4]
+ 8001fd0:	68bb      	ldr	r3, [r7, #8]
+ 8001fd2:	3304      	adds	r3, #4
+ 8001fd4:	005b      	lsls	r3, r3, #1
+ 8001fd6:	18d3      	adds	r3, r2, r3
+ 8001fd8:	3302      	adds	r3, #2
+ 8001fda:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_INTEGRATION_150MS ||
+ 8001fdc:	2b10      	cmp	r3, #16
+ 8001fde:	d123      	bne.n	8002028 <modbus_slave_callback+0x408>
+							transaction->holding_registers[i] != LTR329_INTEGRATION_250MS ||
+ 8001fe0:	687a      	ldr	r2, [r7, #4]
+ 8001fe2:	68bb      	ldr	r3, [r7, #8]
+ 8001fe4:	3304      	adds	r3, #4
+ 8001fe6:	005b      	lsls	r3, r3, #1
+ 8001fe8:	18d3      	adds	r3, r2, r3
+ 8001fea:	3302      	adds	r3, #2
+ 8001fec:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_INTEGRATION_200MS ||
+ 8001fee:	2b28      	cmp	r3, #40	; 0x28
+ 8001ff0:	d11a      	bne.n	8002028 <modbus_slave_callback+0x408>
+							transaction->holding_registers[i] != LTR329_INTEGRATION_300MS ||
+ 8001ff2:	687a      	ldr	r2, [r7, #4]
+ 8001ff4:	68bb      	ldr	r3, [r7, #8]
+ 8001ff6:	3304      	adds	r3, #4
+ 8001ff8:	005b      	lsls	r3, r3, #1
+ 8001ffa:	18d3      	adds	r3, r2, r3
+ 8001ffc:	3302      	adds	r3, #2
+ 8001ffe:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_INTEGRATION_250MS ||
+ 8002000:	2b30      	cmp	r3, #48	; 0x30
+ 8002002:	d111      	bne.n	8002028 <modbus_slave_callback+0x408>
+							transaction->holding_registers[i] != LTR329_INTEGRATION_350MS ||
+ 8002004:	687a      	ldr	r2, [r7, #4]
+ 8002006:	68bb      	ldr	r3, [r7, #8]
+ 8002008:	3304      	adds	r3, #4
+ 800200a:	005b      	lsls	r3, r3, #1
+ 800200c:	18d3      	adds	r3, r2, r3
+ 800200e:	3302      	adds	r3, #2
+ 8002010:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_INTEGRATION_300MS ||
+ 8002012:	2b38      	cmp	r3, #56	; 0x38
+ 8002014:	d108      	bne.n	8002028 <modbus_slave_callback+0x408>
+							transaction->holding_registers[i] != LTR329_INTEGRATION_400MS)
+ 8002016:	687a      	ldr	r2, [r7, #4]
+ 8002018:	68bb      	ldr	r3, [r7, #8]
+ 800201a:	3304      	adds	r3, #4
+ 800201c:	005b      	lsls	r3, r3, #1
+ 800201e:	18d3      	adds	r3, r2, r3
+ 8002020:	3302      	adds	r3, #2
+ 8002022:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_INTEGRATION_350MS ||
+ 8002024:	2b18      	cmp	r3, #24
+ 8002026:	d002      	beq.n	800202e <modbus_slave_callback+0x40e>
+						{
+							return MODBUS_ERROR_OUT_OF_BOUNDS;
+ 8002028:	2304      	movs	r3, #4
+ 800202a:	425b      	negs	r3, r3
+ 800202c:	e091      	b.n	8002152 <modbus_slave_callback+0x532>
+						}
+						sensor_config.ltr329_integ_time = (ltr329_integration_time_t) (transaction->holding_registers[i]);
+ 800202e:	687a      	ldr	r2, [r7, #4]
+ 8002030:	68bb      	ldr	r3, [r7, #8]
+ 8002032:	3304      	adds	r3, #4
+ 8002034:	005b      	lsls	r3, r3, #1
+ 8002036:	18d3      	adds	r3, r2, r3
+ 8002038:	3302      	adds	r3, #2
+ 800203a:	881b      	ldrh	r3, [r3, #0]
+ 800203c:	b2da      	uxtb	r2, r3
+ 800203e:	4b47      	ldr	r3, [pc, #284]	; (800215c <modbus_slave_callback+0x53c>)
+ 8002040:	709a      	strb	r2, [r3, #2]
+						ltr329_config_changed = 1;
+ 8002042:	4b47      	ldr	r3, [pc, #284]	; (8002160 <modbus_slave_callback+0x540>)
+ 8002044:	2201      	movs	r2, #1
+ 8002046:	701a      	strb	r2, [r3, #0]
+						break;
+ 8002048:	e06c      	b.n	8002124 <modbus_slave_callback+0x504>
+					case REGISTER_NUM_LTR329_MEAS_RATE:
+						if (transaction->holding_registers[i] != LTR329_MEAS_RATE_50MS   ||
+ 800204a:	687a      	ldr	r2, [r7, #4]
+ 800204c:	68bb      	ldr	r3, [r7, #8]
+ 800204e:	3304      	adds	r3, #4
+ 8002050:	005b      	lsls	r3, r3, #1
+ 8002052:	18d3      	adds	r3, r2, r3
+ 8002054:	3302      	adds	r3, #2
+ 8002056:	881b      	ldrh	r3, [r3, #0]
+ 8002058:	2b00      	cmp	r3, #0
+ 800205a:	d12c      	bne.n	80020b6 <modbus_slave_callback+0x496>
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_100MS  ||
+ 800205c:	687a      	ldr	r2, [r7, #4]
+ 800205e:	68bb      	ldr	r3, [r7, #8]
+ 8002060:	3304      	adds	r3, #4
+ 8002062:	005b      	lsls	r3, r3, #1
+ 8002064:	18d3      	adds	r3, r2, r3
+ 8002066:	3302      	adds	r3, #2
+ 8002068:	881b      	ldrh	r3, [r3, #0]
+						if (transaction->holding_registers[i] != LTR329_MEAS_RATE_50MS   ||
+ 800206a:	2b01      	cmp	r3, #1
+ 800206c:	d123      	bne.n	80020b6 <modbus_slave_callback+0x496>
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_200MS  ||
+ 800206e:	687a      	ldr	r2, [r7, #4]
+ 8002070:	68bb      	ldr	r3, [r7, #8]
+ 8002072:	3304      	adds	r3, #4
+ 8002074:	005b      	lsls	r3, r3, #1
+ 8002076:	18d3      	adds	r3, r2, r3
+ 8002078:	3302      	adds	r3, #2
+ 800207a:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_100MS  ||
+ 800207c:	2b02      	cmp	r3, #2
+ 800207e:	d11a      	bne.n	80020b6 <modbus_slave_callback+0x496>
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_500MS  ||
+ 8002080:	687a      	ldr	r2, [r7, #4]
+ 8002082:	68bb      	ldr	r3, [r7, #8]
+ 8002084:	3304      	adds	r3, #4
+ 8002086:	005b      	lsls	r3, r3, #1
+ 8002088:	18d3      	adds	r3, r2, r3
+ 800208a:	3302      	adds	r3, #2
+ 800208c:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_200MS  ||
+ 800208e:	2b03      	cmp	r3, #3
+ 8002090:	d111      	bne.n	80020b6 <modbus_slave_callback+0x496>
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_1000MS ||
+ 8002092:	687a      	ldr	r2, [r7, #4]
+ 8002094:	68bb      	ldr	r3, [r7, #8]
+ 8002096:	3304      	adds	r3, #4
+ 8002098:	005b      	lsls	r3, r3, #1
+ 800209a:	18d3      	adds	r3, r2, r3
+ 800209c:	3302      	adds	r3, #2
+ 800209e:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_500MS  ||
+ 80020a0:	2b04      	cmp	r3, #4
+ 80020a2:	d108      	bne.n	80020b6 <modbus_slave_callback+0x496>
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_2000MS)
+ 80020a4:	687a      	ldr	r2, [r7, #4]
+ 80020a6:	68bb      	ldr	r3, [r7, #8]
+ 80020a8:	3304      	adds	r3, #4
+ 80020aa:	005b      	lsls	r3, r3, #1
+ 80020ac:	18d3      	adds	r3, r2, r3
+ 80020ae:	3302      	adds	r3, #2
+ 80020b0:	881b      	ldrh	r3, [r3, #0]
+							transaction->holding_registers[i] != LTR329_MEAS_RATE_1000MS ||
+ 80020b2:	2b07      	cmp	r3, #7
+ 80020b4:	d002      	beq.n	80020bc <modbus_slave_callback+0x49c>
+						{
+							return MODBUS_ERROR_OUT_OF_BOUNDS;
+ 80020b6:	2304      	movs	r3, #4
+ 80020b8:	425b      	negs	r3, r3
+ 80020ba:	e04a      	b.n	8002152 <modbus_slave_callback+0x532>
+						}
+						sensor_config.ltr329_meas_rate = (ltr329_measurement_rate_t) (transaction->holding_registers[i]);
+ 80020bc:	687a      	ldr	r2, [r7, #4]
+ 80020be:	68bb      	ldr	r3, [r7, #8]
+ 80020c0:	3304      	adds	r3, #4
+ 80020c2:	005b      	lsls	r3, r3, #1
+ 80020c4:	18d3      	adds	r3, r2, r3
+ 80020c6:	3302      	adds	r3, #2
+ 80020c8:	881b      	ldrh	r3, [r3, #0]
+ 80020ca:	b2da      	uxtb	r2, r3
+ 80020cc:	4b23      	ldr	r3, [pc, #140]	; (800215c <modbus_slave_callback+0x53c>)
+ 80020ce:	70da      	strb	r2, [r3, #3]
+						ltr329_config_changed = 1;
+ 80020d0:	4b23      	ldr	r3, [pc, #140]	; (8002160 <modbus_slave_callback+0x540>)
+ 80020d2:	2201      	movs	r2, #1
+ 80020d4:	701a      	strb	r2, [r3, #0]
+						break;
+ 80020d6:	e025      	b.n	8002124 <modbus_slave_callback+0x504>
+					case REGISTER_NUM_LTR329_MODE:
+						if (transaction->holding_registers[i] != LTR329_MODE_STAND_BY   ||
+ 80020d8:	687a      	ldr	r2, [r7, #4]
+ 80020da:	68bb      	ldr	r3, [r7, #8]
+ 80020dc:	3304      	adds	r3, #4
+ 80020de:	005b      	lsls	r3, r3, #1
+ 80020e0:	18d3      	adds	r3, r2, r3
+ 80020e2:	3302      	adds	r3, #2
+ 80020e4:	881b      	ldrh	r3, [r3, #0]
+ 80020e6:	2b00      	cmp	r3, #0
+ 80020e8:	d108      	bne.n	80020fc <modbus_slave_callback+0x4dc>
+							transaction->holding_registers[i] != LTR329_MODE_ACTIVE)
+ 80020ea:	687a      	ldr	r2, [r7, #4]
+ 80020ec:	68bb      	ldr	r3, [r7, #8]
+ 80020ee:	3304      	adds	r3, #4
+ 80020f0:	005b      	lsls	r3, r3, #1
+ 80020f2:	18d3      	adds	r3, r2, r3
+ 80020f4:	3302      	adds	r3, #2
+ 80020f6:	881b      	ldrh	r3, [r3, #0]
+						if (transaction->holding_registers[i] != LTR329_MODE_STAND_BY   ||
+ 80020f8:	2b01      	cmp	r3, #1
+ 80020fa:	d002      	beq.n	8002102 <modbus_slave_callback+0x4e2>
+						{
+							return MODBUS_ERROR_OUT_OF_BOUNDS;
+ 80020fc:	2304      	movs	r3, #4
+ 80020fe:	425b      	negs	r3, r3
+ 8002100:	e027      	b.n	8002152 <modbus_slave_callback+0x532>
+						}
+						sensor_config.ltr329_mode = (ltr329_als_mode_t) (transaction->holding_registers[i]);
+ 8002102:	687a      	ldr	r2, [r7, #4]
+ 8002104:	68bb      	ldr	r3, [r7, #8]
+ 8002106:	3304      	adds	r3, #4
+ 8002108:	005b      	lsls	r3, r3, #1
+ 800210a:	18d3      	adds	r3, r2, r3
+ 800210c:	3302      	adds	r3, #2
+ 800210e:	881b      	ldrh	r3, [r3, #0]
+ 8002110:	b2da      	uxtb	r2, r3
+ 8002112:	4b12      	ldr	r3, [pc, #72]	; (800215c <modbus_slave_callback+0x53c>)
+ 8002114:	705a      	strb	r2, [r3, #1]
+						ltr329_config_changed = 1;
+ 8002116:	4b12      	ldr	r3, [pc, #72]	; (8002160 <modbus_slave_callback+0x540>)
+ 8002118:	2201      	movs	r2, #1
+ 800211a:	701a      	strb	r2, [r3, #0]
+						break;
+ 800211c:	e002      	b.n	8002124 <modbus_slave_callback+0x504>
 					default:
 						return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
- 8002194:	2305      	movs	r3, #5
- 8002196:	425b      	negs	r3, r3
- 8002198:	e015      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 800211e:	2305      	movs	r3, #5
+ 8002120:	425b      	negs	r3, r3
+ 8002122:	e016      	b.n	8002152 <modbus_slave_callback+0x532>
 			for (int i = 0; i < transaction->register_count; i++, register_number++)
- 800219a:	68bb      	ldr	r3, [r7, #8]
- 800219c:	3301      	adds	r3, #1
- 800219e:	60bb      	str	r3, [r7, #8]
- 80021a0:	2116      	movs	r1, #22
- 80021a2:	187b      	adds	r3, r7, r1
- 80021a4:	881a      	ldrh	r2, [r3, #0]
- 80021a6:	187b      	adds	r3, r7, r1
- 80021a8:	3201      	adds	r2, #1
- 80021aa:	801a      	strh	r2, [r3, #0]
- 80021ac:	687b      	ldr	r3, [r7, #4]
- 80021ae:	799b      	ldrb	r3, [r3, #6]
- 80021b0:	001a      	movs	r2, r3
- 80021b2:	68bb      	ldr	r3, [r7, #8]
- 80021b4:	4293      	cmp	r3, r2
- 80021b6:	db8f      	blt.n	80020d8 <modbus_slave_callback+0x144>
+ 8002124:	68bb      	ldr	r3, [r7, #8]
+ 8002126:	3301      	adds	r3, #1
+ 8002128:	60bb      	str	r3, [r7, #8]
+ 800212a:	2116      	movs	r1, #22
+ 800212c:	187b      	adds	r3, r7, r1
+ 800212e:	881a      	ldrh	r2, [r3, #0]
+ 8002130:	187b      	adds	r3, r7, r1
+ 8002132:	3201      	adds	r2, #1
+ 8002134:	801a      	strh	r2, [r3, #0]
+ 8002136:	687b      	ldr	r3, [r7, #4]
+ 8002138:	799b      	ldrb	r3, [r3, #6]
+ 800213a:	001a      	movs	r2, r3
+ 800213c:	68bb      	ldr	r3, [r7, #8]
+ 800213e:	4293      	cmp	r3, r2
+ 8002140:	da00      	bge.n	8002144 <modbus_slave_callback+0x524>
+ 8002142:	e655      	b.n	8001df0 <modbus_slave_callback+0x1d0>
 				}
 			}
 			sensor_config_pending_write = 1;
- 80021b8:	4b13      	ldr	r3, [pc, #76]	; (8002208 <modbus_slave_callback+0x274>)
- 80021ba:	2201      	movs	r2, #1
- 80021bc:	701a      	strb	r2, [r3, #0]
+ 8002144:	4b07      	ldr	r3, [pc, #28]	; (8002164 <modbus_slave_callback+0x544>)
+ 8002146:	2201      	movs	r2, #1
+ 8002148:	701a      	strb	r2, [r3, #0]
 			return MODBUS_OK;
- 80021be:	2300      	movs	r3, #0
- 80021c0:	e001      	b.n	80021c6 <modbus_slave_callback+0x232>
+ 800214a:	2300      	movs	r3, #0
+ 800214c:	e001      	b.n	8002152 <modbus_slave_callback+0x532>
 		default:
 			return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED;
- 80021c2:	2305      	movs	r3, #5
- 80021c4:	425b      	negs	r3, r3
+ 800214e:	2305      	movs	r3, #5
+ 8002150:	425b      	negs	r3, r3
 	}
 	/* Catch-all error */
 	return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; /* nothing implemented yet! TODO */
 }
- 80021c6:	0018      	movs	r0, r3
- 80021c8:	46bd      	mov	sp, r7
- 80021ca:	b006      	add	sp, #24
- 80021cc:	bd80      	pop	{r7, pc}
- 80021ce:	46c0      	nop			; (mov r8, r8)
- 80021d0:	0000753c 	.word	0x0000753c
- 80021d4:	0000753a 	.word	0x0000753a
- 80021d8:	0000753b 	.word	0x0000753b
- 80021dc:	2000003c 	.word	0x2000003c
- 80021e0:	2000007c 	.word	0x2000007c
- 80021e4:	20000080 	.word	0x20000080
- 80021e8:	00009c47 	.word	0x00009c47
- 80021ec:	00009c48 	.word	0x00009c48
- 80021f0:	20000068 	.word	0x20000068
- 80021f4:	00009ca4 	.word	0x00009ca4
- 80021f8:	2000002a 	.word	0x2000002a
- 80021fc:	08003c34 	.word	0x08003c34
- 8002200:	20000029 	.word	0x20000029
- 8002204:	0000abcd 	.word	0x0000abcd
- 8002208:	20000028 	.word	0x20000028
+ 8002152:	0018      	movs	r0, r3
+ 8002154:	46bd      	mov	sp, r7
+ 8002156:	b006      	add	sp, #24
+ 8002158:	bd80      	pop	{r7, pc}
+ 800215a:	46c0      	nop			; (mov r8, r8)
+ 800215c:	20000068 	.word	0x20000068
+ 8002160:	2000002a 	.word	0x2000002a
+ 8002164:	20000028 	.word	0x20000028
 
-0800220c <modbus_transmit_function>:
+08002168 <modbus_transmit_function>:
 
 int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len)
 {
- 800220c:	b580      	push	{r7, lr}
- 800220e:	b082      	sub	sp, #8
- 8002210:	af00      	add	r7, sp, #0
- 8002212:	6078      	str	r0, [r7, #4]
- 8002214:	000a      	movs	r2, r1
- 8002216:	1cbb      	adds	r3, r7, #2
- 8002218:	801a      	strh	r2, [r3, #0]
+ 8002168:	b580      	push	{r7, lr}
+ 800216a:	b082      	sub	sp, #8
+ 800216c:	af00      	add	r7, sp, #0
+ 800216e:	6078      	str	r0, [r7, #4]
+ 8002170:	000a      	movs	r2, r1
+ 8002172:	1cbb      	adds	r3, r7, #2
+ 8002174:	801a      	strh	r2, [r3, #0]
 	 /* TODO */
 	USART2_TX_Buffer(buffer, data_len);
- 800221a:	1cbb      	adds	r3, r7, #2
- 800221c:	881a      	ldrh	r2, [r3, #0]
- 800221e:	687b      	ldr	r3, [r7, #4]
- 8002220:	0011      	movs	r1, r2
- 8002222:	0018      	movs	r0, r3
- 8002224:	f7ff fe58 	bl	8001ed8 <USART2_TX_Buffer>
+ 8002176:	1cbb      	adds	r3, r7, #2
+ 8002178:	881a      	ldrh	r2, [r3, #0]
+ 800217a:	687b      	ldr	r3, [r7, #4]
+ 800217c:	0011      	movs	r1, r2
+ 800217e:	0018      	movs	r0, r3
+ 8002180:	f7ff fcf0 	bl	8001b64 <USART2_TX_Buffer>
 	return MODBUS_OK;
- 8002228:	2300      	movs	r3, #0
+ 8002184:	2300      	movs	r3, #0
 }
- 800222a:	0018      	movs	r0, r3
- 800222c:	46bd      	mov	sp, r7
- 800222e:	b002      	add	sp, #8
- 8002230:	bd80      	pop	{r7, pc}
-	...
+ 8002186:	0018      	movs	r0, r3
+ 8002188:	46bd      	mov	sp, r7
+ 800218a:	b002      	add	sp, #8
+ 800218c:	bd80      	pop	{r7, pc}
 
-08002234 <modbus_CRC16>:
- */
-
-/* CRC16 (without memory mapped values)
- * taken from https://ctlsys.com/support/how_to_compute_the_modbus_rtu_message_crc/ */
-uint16_t modbus_CRC16(const uint8_t *buf, int len)
+0800218e <LL_TIM_ClearFlag_UPDATE>:
 {
- 8002234:	b580      	push	{r7, lr}
- 8002236:	b086      	sub	sp, #24
- 8002238:	af00      	add	r7, sp, #0
- 800223a:	6078      	str	r0, [r7, #4]
- 800223c:	6039      	str	r1, [r7, #0]
-	uint16_t crc = 0xFFFF;
- 800223e:	2316      	movs	r3, #22
- 8002240:	18fb      	adds	r3, r7, r3
- 8002242:	2201      	movs	r2, #1
- 8002244:	4252      	negs	r2, r2
- 8002246:	801a      	strh	r2, [r3, #0]
-
-	for (int pos = 0; pos < len; pos++) {
- 8002248:	2300      	movs	r3, #0
- 800224a:	613b      	str	r3, [r7, #16]
- 800224c:	e02e      	b.n	80022ac <modbus_CRC16+0x78>
-		crc ^= (uint16_t)buf[pos];          // XOR byte into least sig. byte of crc
- 800224e:	693b      	ldr	r3, [r7, #16]
- 8002250:	687a      	ldr	r2, [r7, #4]
- 8002252:	18d3      	adds	r3, r2, r3
- 8002254:	781b      	ldrb	r3, [r3, #0]
- 8002256:	b299      	uxth	r1, r3
- 8002258:	2216      	movs	r2, #22
- 800225a:	18bb      	adds	r3, r7, r2
- 800225c:	18ba      	adds	r2, r7, r2
- 800225e:	8812      	ldrh	r2, [r2, #0]
- 8002260:	404a      	eors	r2, r1
- 8002262:	801a      	strh	r2, [r3, #0]
-       
-		for (int i = 8; i != 0; i--) {    // Loop over each bit
- 8002264:	2308      	movs	r3, #8
- 8002266:	60fb      	str	r3, [r7, #12]
- 8002268:	e01a      	b.n	80022a0 <modbus_CRC16+0x6c>
-			if ((crc & 0x0001) != 0) {      // If the LSB is set
- 800226a:	2116      	movs	r1, #22
- 800226c:	187b      	adds	r3, r7, r1
- 800226e:	881b      	ldrh	r3, [r3, #0]
- 8002270:	2201      	movs	r2, #1
- 8002272:	4013      	ands	r3, r2
- 8002274:	d00b      	beq.n	800228e <modbus_CRC16+0x5a>
-				crc >>= 1;                    // Shift right and XOR 0xA001
- 8002276:	187b      	adds	r3, r7, r1
- 8002278:	187a      	adds	r2, r7, r1
- 800227a:	8812      	ldrh	r2, [r2, #0]
- 800227c:	0852      	lsrs	r2, r2, #1
- 800227e:	801a      	strh	r2, [r3, #0]
-				crc ^= 0xA001;
- 8002280:	187b      	adds	r3, r7, r1
- 8002282:	187a      	adds	r2, r7, r1
- 8002284:	8812      	ldrh	r2, [r2, #0]
- 8002286:	490f      	ldr	r1, [pc, #60]	; (80022c4 <modbus_CRC16+0x90>)
- 8002288:	404a      	eors	r2, r1
- 800228a:	801a      	strh	r2, [r3, #0]
- 800228c:	e005      	b.n	800229a <modbus_CRC16+0x66>
-			} else {                            // Else LSB is not set
-				crc >>= 1;                    // Just shift right
- 800228e:	2216      	movs	r2, #22
- 8002290:	18bb      	adds	r3, r7, r2
- 8002292:	18ba      	adds	r2, r7, r2
- 8002294:	8812      	ldrh	r2, [r2, #0]
- 8002296:	0852      	lsrs	r2, r2, #1
- 8002298:	801a      	strh	r2, [r3, #0]
-		for (int i = 8; i != 0; i--) {    // Loop over each bit
- 800229a:	68fb      	ldr	r3, [r7, #12]
- 800229c:	3b01      	subs	r3, #1
- 800229e:	60fb      	str	r3, [r7, #12]
- 80022a0:	68fb      	ldr	r3, [r7, #12]
- 80022a2:	2b00      	cmp	r3, #0
- 80022a4:	d1e1      	bne.n	800226a <modbus_CRC16+0x36>
-	for (int pos = 0; pos < len; pos++) {
- 80022a6:	693b      	ldr	r3, [r7, #16]
- 80022a8:	3301      	adds	r3, #1
- 80022aa:	613b      	str	r3, [r7, #16]
- 80022ac:	693a      	ldr	r2, [r7, #16]
- 80022ae:	683b      	ldr	r3, [r7, #0]
- 80022b0:	429a      	cmp	r2, r3
- 80022b2:	dbcc      	blt.n	800224e <modbus_CRC16+0x1a>
-			}
-		}
-	}
-	// Note, this number has low and high bytes swapped, so use it accordingly (or swap bytes)
-	return crc;  
- 80022b4:	2316      	movs	r3, #22
- 80022b6:	18fb      	adds	r3, r7, r3
- 80022b8:	881b      	ldrh	r3, [r3, #0]
-}
- 80022ba:	0018      	movs	r0, r3
- 80022bc:	46bd      	mov	sp, r7
- 80022be:	b006      	add	sp, #24
- 80022c0:	bd80      	pop	{r7, pc}
- 80022c2:	46c0      	nop			; (mov r8, r8)
- 80022c4:	ffffa001 	.word	0xffffa001
-
-080022c8 <modbus_fill_device_id_objects>:
-/*
- * Private functions
- */
-
-static uint8_t modbus_fill_device_id_objects(uint8_t *buffer, modbus_transaction_t *transaction)
-{
- 80022c8:	b5b0      	push	{r4, r5, r7, lr}
- 80022ca:	b086      	sub	sp, #24
- 80022cc:	af00      	add	r7, sp, #0
- 80022ce:	6078      	str	r0, [r7, #4]
- 80022d0:	6039      	str	r1, [r7, #0]
-	/* we assume buffer is 256 - MODBUS_READ_DEVICE_ID_RESPONSE_HEADER_LEN = 252 bytes long */
-	/* find out how many objects we copy to buffer */
-	int len;
-	uint8_t object_index = transaction->object_id;
- 80022d2:	2313      	movs	r3, #19
- 80022d4:	18fb      	adds	r3, r7, r3
- 80022d6:	6839      	ldr	r1, [r7, #0]
- 80022d8:	220c      	movs	r2, #12
- 80022da:	32ff      	adds	r2, #255	; 0xff
- 80022dc:	5c8a      	ldrb	r2, [r1, r2]
- 80022de:	701a      	strb	r2, [r3, #0]
-	uint8_t object_count;
-	uint8_t more_follows = MODBUS_NO_MORE_FOLLOWS;
- 80022e0:	2311      	movs	r3, #17
- 80022e2:	18fb      	adds	r3, r7, r3
- 80022e4:	2200      	movs	r2, #0
- 80022e6:	701a      	strb	r2, [r3, #0]
-	uint8_t next_object_id;
-	uint8_t last_object;
-	const uint8_t max_len = 256 - MODBUS_READ_DEVICE_ID_RESPONSE_HEADER_LEN;
- 80022e8:	230e      	movs	r3, #14
- 80022ea:	18fb      	adds	r3, r7, r3
- 80022ec:	22fc      	movs	r2, #252	; 0xfc
- 80022ee:	701a      	strb	r2, [r3, #0]
-
-	/* last object index */
-	if (transaction->read_device_id_code == MODBUS_CONFORMITY_BASIC) {
- 80022f0:	683a      	ldr	r2, [r7, #0]
- 80022f2:	2385      	movs	r3, #133	; 0x85
- 80022f4:	005b      	lsls	r3, r3, #1
- 80022f6:	5cd3      	ldrb	r3, [r2, r3]
- 80022f8:	2b01      	cmp	r3, #1
- 80022fa:	d104      	bne.n	8002306 <modbus_fill_device_id_objects+0x3e>
-		last_object = MODBUS_BASIC_OBJECT_COUNT;
- 80022fc:	230f      	movs	r3, #15
- 80022fe:	18fb      	adds	r3, r7, r3
- 8002300:	2203      	movs	r2, #3
- 8002302:	701a      	strb	r2, [r3, #0]
- 8002304:	e00e      	b.n	8002324 <modbus_fill_device_id_objects+0x5c>
-	} else if (transaction->read_device_id_code == MODBUS_CONFORMITY_REGULAR) {
- 8002306:	683a      	ldr	r2, [r7, #0]
- 8002308:	2385      	movs	r3, #133	; 0x85
- 800230a:	005b      	lsls	r3, r3, #1
- 800230c:	5cd3      	ldrb	r3, [r2, r3]
- 800230e:	2b02      	cmp	r3, #2
- 8002310:	d104      	bne.n	800231c <modbus_fill_device_id_objects+0x54>
-		last_object = MODBUS_REGULAR_OBJECT_COUNT;
- 8002312:	230f      	movs	r3, #15
- 8002314:	18fb      	adds	r3, r7, r3
- 8002316:	2207      	movs	r2, #7
- 8002318:	701a      	strb	r2, [r3, #0]
- 800231a:	e003      	b.n	8002324 <modbus_fill_device_id_objects+0x5c>
-	/* extended not implemented */
-//	} else if (transaction->read_device_id_code == MODBUS_CONFORMITY_EXTENDED){
-//		last_object = MODBUS_EXTENDED_OBJECT_COUNT;
-	} else {
-		/* fallback: regular */
-		last_object = MODBUS_REGULAR_OBJECT_COUNT;
- 800231c:	230f      	movs	r3, #15
- 800231e:	18fb      	adds	r3, r7, r3
- 8002320:	2207      	movs	r2, #7
- 8002322:	701a      	strb	r2, [r3, #0]
-	}
-	last_object--; // we need index
- 8002324:	210f      	movs	r1, #15
- 8002326:	187b      	adds	r3, r7, r1
- 8002328:	781a      	ldrb	r2, [r3, #0]
- 800232a:	187b      	adds	r3, r7, r1
- 800232c:	3a01      	subs	r2, #1
- 800232e:	701a      	strb	r2, [r3, #0]
-	/* copy as many objects as possible */
-	do {
-		/* copy object */
-		int object_len = strlen(modbus_device_id->object_id[object_index]);
- 8002330:	4b36      	ldr	r3, [pc, #216]	; (800240c <modbus_fill_device_id_objects+0x144>)
- 8002332:	681b      	ldr	r3, [r3, #0]
- 8002334:	2413      	movs	r4, #19
- 8002336:	193a      	adds	r2, r7, r4
- 8002338:	7812      	ldrb	r2, [r2, #0]
- 800233a:	0092      	lsls	r2, r2, #2
- 800233c:	58d3      	ldr	r3, [r2, r3]
- 800233e:	0018      	movs	r0, r3
- 8002340:	f7fd fee2 	bl	8000108 <strlen>
- 8002344:	0003      	movs	r3, r0
- 8002346:	60bb      	str	r3, [r7, #8]
-		if (len + object_len + 2 > max_len) {
- 8002348:	697a      	ldr	r2, [r7, #20]
- 800234a:	68bb      	ldr	r3, [r7, #8]
- 800234c:	18d3      	adds	r3, r2, r3
- 800234e:	1c5a      	adds	r2, r3, #1
- 8002350:	230e      	movs	r3, #14
- 8002352:	18fb      	adds	r3, r7, r3
- 8002354:	781b      	ldrb	r3, [r3, #0]
- 8002356:	429a      	cmp	r2, r3
- 8002358:	db09      	blt.n	800236e <modbus_fill_device_id_objects+0xa6>
-			more_follows = MODBUS_MORE_FOLLOWS;
- 800235a:	2311      	movs	r3, #17
- 800235c:	18fb      	adds	r3, r7, r3
- 800235e:	22ff      	movs	r2, #255	; 0xff
- 8002360:	701a      	strb	r2, [r3, #0]
-			next_object_id = object_index;
- 8002362:	2310      	movs	r3, #16
- 8002364:	18fb      	adds	r3, r7, r3
- 8002366:	193a      	adds	r2, r7, r4
- 8002368:	7812      	ldrb	r2, [r2, #0]
- 800236a:	701a      	strb	r2, [r3, #0]
-			break;
- 800236c:	e035      	b.n	80023da <modbus_fill_device_id_objects+0x112>
-		}
-		/* offset is for "more follows", "next object id", "object count" */
-		buffer[MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len++] = object_index;
- 800236e:	697b      	ldr	r3, [r7, #20]
- 8002370:	1c5a      	adds	r2, r3, #1
- 8002372:	617a      	str	r2, [r7, #20]
- 8002374:	3303      	adds	r3, #3
- 8002376:	001a      	movs	r2, r3
- 8002378:	687b      	ldr	r3, [r7, #4]
- 800237a:	189b      	adds	r3, r3, r2
- 800237c:	2513      	movs	r5, #19
- 800237e:	197a      	adds	r2, r7, r5
- 8002380:	7812      	ldrb	r2, [r2, #0]
- 8002382:	701a      	strb	r2, [r3, #0]
-		buffer[MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len++] = object_len;
- 8002384:	697b      	ldr	r3, [r7, #20]
- 8002386:	1c5a      	adds	r2, r3, #1
- 8002388:	617a      	str	r2, [r7, #20]
- 800238a:	3303      	adds	r3, #3
- 800238c:	001a      	movs	r2, r3
- 800238e:	687b      	ldr	r3, [r7, #4]
- 8002390:	189b      	adds	r3, r3, r2
- 8002392:	68ba      	ldr	r2, [r7, #8]
- 8002394:	b2d2      	uxtb	r2, r2
- 8002396:	701a      	strb	r2, [r3, #0]
-		/* note that string copied to buffer is not null-terminated */
-		strncpy((char*)(buffer + len), (char*)modbus_device_id->object_id[object_index++], object_len);
- 8002398:	697b      	ldr	r3, [r7, #20]
- 800239a:	687a      	ldr	r2, [r7, #4]
- 800239c:	18d0      	adds	r0, r2, r3
- 800239e:	4b1b      	ldr	r3, [pc, #108]	; (800240c <modbus_fill_device_id_objects+0x144>)
- 80023a0:	681a      	ldr	r2, [r3, #0]
- 80023a2:	197b      	adds	r3, r7, r5
- 80023a4:	781b      	ldrb	r3, [r3, #0]
- 80023a6:	1979      	adds	r1, r7, r5
- 80023a8:	1c5c      	adds	r4, r3, #1
- 80023aa:	700c      	strb	r4, [r1, #0]
- 80023ac:	009b      	lsls	r3, r3, #2
- 80023ae:	589b      	ldr	r3, [r3, r2]
- 80023b0:	68ba      	ldr	r2, [r7, #8]
- 80023b2:	0019      	movs	r1, r3
- 80023b4:	f001 fbe8 	bl	8003b88 <strncpy>
-		len += object_len;
- 80023b8:	697a      	ldr	r2, [r7, #20]
- 80023ba:	68bb      	ldr	r3, [r7, #8]
- 80023bc:	18d3      	adds	r3, r2, r3
- 80023be:	617b      	str	r3, [r7, #20]
-		object_count++;
- 80023c0:	2112      	movs	r1, #18
- 80023c2:	187b      	adds	r3, r7, r1
- 80023c4:	781a      	ldrb	r2, [r3, #0]
- 80023c6:	187b      	adds	r3, r7, r1
- 80023c8:	3201      	adds	r2, #1
- 80023ca:	701a      	strb	r2, [r3, #0]
-	} while (object_index < last_object);
- 80023cc:	197a      	adds	r2, r7, r5
- 80023ce:	230f      	movs	r3, #15
- 80023d0:	18fb      	adds	r3, r7, r3
- 80023d2:	7812      	ldrb	r2, [r2, #0]
- 80023d4:	781b      	ldrb	r3, [r3, #0]
- 80023d6:	429a      	cmp	r2, r3
- 80023d8:	d3aa      	bcc.n	8002330 <modbus_fill_device_id_objects+0x68>
-	buffer[0] = more_follows;
- 80023da:	687b      	ldr	r3, [r7, #4]
- 80023dc:	2211      	movs	r2, #17
- 80023de:	18ba      	adds	r2, r7, r2
- 80023e0:	7812      	ldrb	r2, [r2, #0]
- 80023e2:	701a      	strb	r2, [r3, #0]
-	buffer[1] = next_object_id;
- 80023e4:	687b      	ldr	r3, [r7, #4]
- 80023e6:	3301      	adds	r3, #1
- 80023e8:	2210      	movs	r2, #16
- 80023ea:	18ba      	adds	r2, r7, r2
- 80023ec:	7812      	ldrb	r2, [r2, #0]
- 80023ee:	701a      	strb	r2, [r3, #0]
-	buffer[2] = object_count;
- 80023f0:	687b      	ldr	r3, [r7, #4]
- 80023f2:	3302      	adds	r3, #2
- 80023f4:	2212      	movs	r2, #18
- 80023f6:	18ba      	adds	r2, r7, r2
- 80023f8:	7812      	ldrb	r2, [r2, #0]
- 80023fa:	701a      	strb	r2, [r3, #0]
-	return MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len;
- 80023fc:	697b      	ldr	r3, [r7, #20]
- 80023fe:	b2db      	uxtb	r3, r3
- 8002400:	3303      	adds	r3, #3
- 8002402:	b2db      	uxtb	r3, r3
-}
- 8002404:	0018      	movs	r0, r3
- 8002406:	46bd      	mov	sp, r7
- 8002408:	b006      	add	sp, #24
- 800240a:	bdb0      	pop	{r4, r5, r7, pc}
- 800240c:	20000030 	.word	0x20000030
-
-08002410 <modbus_transaction_to_buffer>:
-
-/* here we assume buffer has minimal size of MODBUS_MAX_RTU_FRAME_SIZE;
- * this function is private, so hopefully it's going to be ok */
-static int8_t modbus_transaction_to_buffer(uint8_t *buffer, uint8_t *msg_len, modbus_transaction_t *transaction)
-{
- 8002410:	b5f0      	push	{r4, r5, r6, r7, lr}
- 8002412:	b089      	sub	sp, #36	; 0x24
- 8002414:	af00      	add	r7, sp, #0
- 8002416:	60f8      	str	r0, [r7, #12]
- 8002418:	60b9      	str	r1, [r7, #8]
- 800241a:	607a      	str	r2, [r7, #4]
-	uint16_t crc16;
-	uint8_t byte_count;
-	uint8_t buffer_pos = 0;
- 800241c:	201f      	movs	r0, #31
- 800241e:	183b      	adds	r3, r7, r0
- 8002420:	2200      	movs	r2, #0
- 8002422:	701a      	strb	r2, [r3, #0]
-
-	// TODO use relative indices (increments) instead of absolute
-	buffer[buffer_pos++] = modbus_slave_address;
- 8002424:	183b      	adds	r3, r7, r0
- 8002426:	781b      	ldrb	r3, [r3, #0]
- 8002428:	183a      	adds	r2, r7, r0
- 800242a:	1c59      	adds	r1, r3, #1
- 800242c:	7011      	strb	r1, [r2, #0]
- 800242e:	001a      	movs	r2, r3
- 8002430:	68fb      	ldr	r3, [r7, #12]
- 8002432:	189b      	adds	r3, r3, r2
- 8002434:	4aaa      	ldr	r2, [pc, #680]	; (80026e0 <modbus_transaction_to_buffer+0x2d0>)
- 8002436:	7812      	ldrb	r2, [r2, #0]
- 8002438:	701a      	strb	r2, [r3, #0]
-	buffer[buffer_pos++] = transaction->function_code;
- 800243a:	183b      	adds	r3, r7, r0
- 800243c:	781b      	ldrb	r3, [r3, #0]
- 800243e:	183a      	adds	r2, r7, r0
- 8002440:	1c59      	adds	r1, r3, #1
- 8002442:	7011      	strb	r1, [r2, #0]
- 8002444:	001a      	movs	r2, r3
- 8002446:	68fb      	ldr	r3, [r7, #12]
- 8002448:	189b      	adds	r3, r3, r2
- 800244a:	687a      	ldr	r2, [r7, #4]
- 800244c:	7812      	ldrb	r2, [r2, #0]
- 800244e:	701a      	strb	r2, [r3, #0]
-	*msg_len = 5;
- 8002450:	68bb      	ldr	r3, [r7, #8]
- 8002452:	2205      	movs	r2, #5
- 8002454:	701a      	strb	r2, [r3, #0]
-
-	if (transaction->function_code & MODBUS_ERROR_FLAG) {
- 8002456:	687b      	ldr	r3, [r7, #4]
- 8002458:	781b      	ldrb	r3, [r3, #0]
- 800245a:	b25b      	sxtb	r3, r3
- 800245c:	2b00      	cmp	r3, #0
- 800245e:	da0b      	bge.n	8002478 <modbus_transaction_to_buffer+0x68>
-		/* sending error reply */
-		buffer[buffer_pos++] = transaction->exception;
- 8002460:	183b      	adds	r3, r7, r0
- 8002462:	781b      	ldrb	r3, [r3, #0]
- 8002464:	183a      	adds	r2, r7, r0
- 8002466:	1c59      	adds	r1, r3, #1
- 8002468:	7011      	strb	r1, [r2, #0]
- 800246a:	001a      	movs	r2, r3
- 800246c:	68fb      	ldr	r3, [r7, #12]
- 800246e:	189b      	adds	r3, r3, r2
- 8002470:	687a      	ldr	r2, [r7, #4]
- 8002472:	79d2      	ldrb	r2, [r2, #7]
- 8002474:	701a      	strb	r2, [r3, #0]
- 8002476:	e106      	b.n	8002686 <modbus_transaction_to_buffer+0x276>
-	} else {
-		switch (transaction->function_code) {
- 8002478:	687b      	ldr	r3, [r7, #4]
- 800247a:	781b      	ldrb	r3, [r3, #0]
- 800247c:	2b2b      	cmp	r3, #43	; 0x2b
- 800247e:	d100      	bne.n	8002482 <modbus_transaction_to_buffer+0x72>
- 8002480:	e0c8      	b.n	8002614 <modbus_transaction_to_buffer+0x204>
- 8002482:	dd00      	ble.n	8002486 <modbus_transaction_to_buffer+0x76>
- 8002484:	e0ff      	b.n	8002686 <modbus_transaction_to_buffer+0x276>
- 8002486:	2b10      	cmp	r3, #16
- 8002488:	d100      	bne.n	800248c <modbus_transaction_to_buffer+0x7c>
- 800248a:	e08c      	b.n	80025a6 <modbus_transaction_to_buffer+0x196>
- 800248c:	dd00      	ble.n	8002490 <modbus_transaction_to_buffer+0x80>
- 800248e:	e0fa      	b.n	8002686 <modbus_transaction_to_buffer+0x276>
- 8002490:	2b04      	cmp	r3, #4
- 8002492:	dc02      	bgt.n	800249a <modbus_transaction_to_buffer+0x8a>
- 8002494:	2b03      	cmp	r3, #3
- 8002496:	da03      	bge.n	80024a0 <modbus_transaction_to_buffer+0x90>
- 8002498:	e0f5      	b.n	8002686 <modbus_transaction_to_buffer+0x276>
- 800249a:	2b06      	cmp	r3, #6
- 800249c:	d04a      	beq.n	8002534 <modbus_transaction_to_buffer+0x124>
- 800249e:	e0f2      	b.n	8002686 <modbus_transaction_to_buffer+0x276>
-			case MODBUS_READ_HOLDING_REGISTERS:
-			case MODBUS_READ_INPUT_REGISTERS:
-				byte_count = transaction->register_count * 2;
- 80024a0:	687b      	ldr	r3, [r7, #4]
- 80024a2:	799b      	ldrb	r3, [r3, #6]
- 80024a4:	2017      	movs	r0, #23
- 80024a6:	183a      	adds	r2, r7, r0
- 80024a8:	18db      	adds	r3, r3, r3
- 80024aa:	7013      	strb	r3, [r2, #0]
-				buffer[buffer_pos++] = byte_count;
- 80024ac:	221f      	movs	r2, #31
- 80024ae:	18bb      	adds	r3, r7, r2
- 80024b0:	781b      	ldrb	r3, [r3, #0]
- 80024b2:	18ba      	adds	r2, r7, r2
- 80024b4:	1c59      	adds	r1, r3, #1
- 80024b6:	7011      	strb	r1, [r2, #0]
- 80024b8:	001a      	movs	r2, r3
- 80024ba:	68fb      	ldr	r3, [r7, #12]
- 80024bc:	189b      	adds	r3, r3, r2
- 80024be:	183a      	adds	r2, r7, r0
- 80024c0:	7812      	ldrb	r2, [r2, #0]
- 80024c2:	701a      	strb	r2, [r3, #0]
-				*msg_len = byte_count + 5;
- 80024c4:	183b      	adds	r3, r7, r0
- 80024c6:	781b      	ldrb	r3, [r3, #0]
- 80024c8:	3305      	adds	r3, #5
- 80024ca:	b2da      	uxtb	r2, r3
- 80024cc:	68bb      	ldr	r3, [r7, #8]
- 80024ce:	701a      	strb	r2, [r3, #0]
-				for (int i = 0; i < transaction->register_count; i++) {
- 80024d0:	2300      	movs	r3, #0
- 80024d2:	61bb      	str	r3, [r7, #24]
- 80024d4:	e027      	b.n	8002526 <modbus_transaction_to_buffer+0x116>
-					// TODO endianness handling
-					/* buffer16b is alias for both holding and input register buffers */
-					buffer[buffer_pos++] = transaction->buffer16b[i] >> 8;
- 80024d6:	687a      	ldr	r2, [r7, #4]
- 80024d8:	69bb      	ldr	r3, [r7, #24]
- 80024da:	3304      	adds	r3, #4
- 80024dc:	005b      	lsls	r3, r3, #1
- 80024de:	18d3      	adds	r3, r2, r3
- 80024e0:	3302      	adds	r3, #2
- 80024e2:	881b      	ldrh	r3, [r3, #0]
- 80024e4:	0a1b      	lsrs	r3, r3, #8
- 80024e6:	b299      	uxth	r1, r3
- 80024e8:	241f      	movs	r4, #31
- 80024ea:	193b      	adds	r3, r7, r4
- 80024ec:	781b      	ldrb	r3, [r3, #0]
- 80024ee:	193a      	adds	r2, r7, r4
- 80024f0:	1c58      	adds	r0, r3, #1
- 80024f2:	7010      	strb	r0, [r2, #0]
- 80024f4:	001a      	movs	r2, r3
- 80024f6:	68fb      	ldr	r3, [r7, #12]
- 80024f8:	189b      	adds	r3, r3, r2
- 80024fa:	b2ca      	uxtb	r2, r1
- 80024fc:	701a      	strb	r2, [r3, #0]
-					buffer[buffer_pos++] = transaction->buffer16b[i] & 0xff;
- 80024fe:	687a      	ldr	r2, [r7, #4]
- 8002500:	69bb      	ldr	r3, [r7, #24]
- 8002502:	3304      	adds	r3, #4
- 8002504:	005b      	lsls	r3, r3, #1
- 8002506:	18d3      	adds	r3, r2, r3
- 8002508:	3302      	adds	r3, #2
- 800250a:	8819      	ldrh	r1, [r3, #0]
- 800250c:	193b      	adds	r3, r7, r4
- 800250e:	781b      	ldrb	r3, [r3, #0]
- 8002510:	193a      	adds	r2, r7, r4
- 8002512:	1c58      	adds	r0, r3, #1
- 8002514:	7010      	strb	r0, [r2, #0]
- 8002516:	001a      	movs	r2, r3
- 8002518:	68fb      	ldr	r3, [r7, #12]
- 800251a:	189b      	adds	r3, r3, r2
- 800251c:	b2ca      	uxtb	r2, r1
- 800251e:	701a      	strb	r2, [r3, #0]
-				for (int i = 0; i < transaction->register_count; i++) {
- 8002520:	69bb      	ldr	r3, [r7, #24]
- 8002522:	3301      	adds	r3, #1
- 8002524:	61bb      	str	r3, [r7, #24]
- 8002526:	687b      	ldr	r3, [r7, #4]
- 8002528:	799b      	ldrb	r3, [r3, #6]
- 800252a:	001a      	movs	r2, r3
- 800252c:	69bb      	ldr	r3, [r7, #24]
- 800252e:	4293      	cmp	r3, r2
- 8002530:	dbd1      	blt.n	80024d6 <modbus_transaction_to_buffer+0xc6>
-				}
-				break;
- 8002532:	e0a8      	b.n	8002686 <modbus_transaction_to_buffer+0x276>
-			case MODBUS_WRITE_SINGLE_REGISTER:
-				buffer[buffer_pos++] = (uint8_t) (transaction->register_address >> 8);
- 8002534:	687b      	ldr	r3, [r7, #4]
- 8002536:	885b      	ldrh	r3, [r3, #2]
- 8002538:	0a1b      	lsrs	r3, r3, #8
- 800253a:	b299      	uxth	r1, r3
- 800253c:	241f      	movs	r4, #31
- 800253e:	193b      	adds	r3, r7, r4
- 8002540:	781b      	ldrb	r3, [r3, #0]
- 8002542:	193a      	adds	r2, r7, r4
- 8002544:	1c58      	adds	r0, r3, #1
- 8002546:	7010      	strb	r0, [r2, #0]
- 8002548:	001a      	movs	r2, r3
- 800254a:	68fb      	ldr	r3, [r7, #12]
- 800254c:	189b      	adds	r3, r3, r2
- 800254e:	b2ca      	uxtb	r2, r1
- 8002550:	701a      	strb	r2, [r3, #0]
-				buffer[buffer_pos++] = (uint8_t) transaction->register_address;
- 8002552:	687b      	ldr	r3, [r7, #4]
- 8002554:	8859      	ldrh	r1, [r3, #2]
- 8002556:	193b      	adds	r3, r7, r4
- 8002558:	781b      	ldrb	r3, [r3, #0]
- 800255a:	193a      	adds	r2, r7, r4
- 800255c:	1c58      	adds	r0, r3, #1
- 800255e:	7010      	strb	r0, [r2, #0]
- 8002560:	001a      	movs	r2, r3
- 8002562:	68fb      	ldr	r3, [r7, #12]
- 8002564:	189b      	adds	r3, r3, r2
- 8002566:	b2ca      	uxtb	r2, r1
- 8002568:	701a      	strb	r2, [r3, #0]
-				buffer[buffer_pos++] = (uint8_t) (transaction->holding_registers[0] >> 8);
- 800256a:	687b      	ldr	r3, [r7, #4]
- 800256c:	895b      	ldrh	r3, [r3, #10]
- 800256e:	0a1b      	lsrs	r3, r3, #8
- 8002570:	b299      	uxth	r1, r3
- 8002572:	193b      	adds	r3, r7, r4
- 8002574:	781b      	ldrb	r3, [r3, #0]
- 8002576:	193a      	adds	r2, r7, r4
- 8002578:	1c58      	adds	r0, r3, #1
- 800257a:	7010      	strb	r0, [r2, #0]
- 800257c:	001a      	movs	r2, r3
- 800257e:	68fb      	ldr	r3, [r7, #12]
- 8002580:	189b      	adds	r3, r3, r2
- 8002582:	b2ca      	uxtb	r2, r1
- 8002584:	701a      	strb	r2, [r3, #0]
-				buffer[buffer_pos++] = (uint8_t) transaction->holding_registers[0];
- 8002586:	687b      	ldr	r3, [r7, #4]
- 8002588:	8959      	ldrh	r1, [r3, #10]
- 800258a:	193b      	adds	r3, r7, r4
- 800258c:	781b      	ldrb	r3, [r3, #0]
- 800258e:	193a      	adds	r2, r7, r4
- 8002590:	1c58      	adds	r0, r3, #1
- 8002592:	7010      	strb	r0, [r2, #0]
- 8002594:	001a      	movs	r2, r3
- 8002596:	68fb      	ldr	r3, [r7, #12]
- 8002598:	189b      	adds	r3, r3, r2
- 800259a:	b2ca      	uxtb	r2, r1
- 800259c:	701a      	strb	r2, [r3, #0]
-				*msg_len = 8; /* includes 2 bytes for CRC */
- 800259e:	68bb      	ldr	r3, [r7, #8]
- 80025a0:	2208      	movs	r2, #8
- 80025a2:	701a      	strb	r2, [r3, #0]
-				break;
- 80025a4:	e06f      	b.n	8002686 <modbus_transaction_to_buffer+0x276>
-			case MODBUS_WRITE_MULTIPLE_REGISTERS:
-				buffer[buffer_pos++] = (uint8_t) (transaction->register_address >> 8);
- 80025a6:	687b      	ldr	r3, [r7, #4]
- 80025a8:	885b      	ldrh	r3, [r3, #2]
- 80025aa:	0a1b      	lsrs	r3, r3, #8
- 80025ac:	b299      	uxth	r1, r3
- 80025ae:	241f      	movs	r4, #31
- 80025b0:	193b      	adds	r3, r7, r4
- 80025b2:	781b      	ldrb	r3, [r3, #0]
- 80025b4:	193a      	adds	r2, r7, r4
- 80025b6:	1c58      	adds	r0, r3, #1
- 80025b8:	7010      	strb	r0, [r2, #0]
- 80025ba:	001a      	movs	r2, r3
- 80025bc:	68fb      	ldr	r3, [r7, #12]
- 80025be:	189b      	adds	r3, r3, r2
- 80025c0:	b2ca      	uxtb	r2, r1
- 80025c2:	701a      	strb	r2, [r3, #0]
-				buffer[buffer_pos++] = (uint8_t) transaction->register_address;
- 80025c4:	687b      	ldr	r3, [r7, #4]
- 80025c6:	8859      	ldrh	r1, [r3, #2]
- 80025c8:	193b      	adds	r3, r7, r4
- 80025ca:	781b      	ldrb	r3, [r3, #0]
- 80025cc:	193a      	adds	r2, r7, r4
- 80025ce:	1c58      	adds	r0, r3, #1
- 80025d0:	7010      	strb	r0, [r2, #0]
- 80025d2:	001a      	movs	r2, r3
- 80025d4:	68fb      	ldr	r3, [r7, #12]
- 80025d6:	189b      	adds	r3, r3, r2
- 80025d8:	b2ca      	uxtb	r2, r1
- 80025da:	701a      	strb	r2, [r3, #0]
-				buffer[buffer_pos++] = (uint8_t) (transaction->register_count >> 8);
- 80025dc:	687b      	ldr	r3, [r7, #4]
- 80025de:	799b      	ldrb	r3, [r3, #6]
- 80025e0:	1219      	asrs	r1, r3, #8
- 80025e2:	193b      	adds	r3, r7, r4
- 80025e4:	781b      	ldrb	r3, [r3, #0]
- 80025e6:	193a      	adds	r2, r7, r4
- 80025e8:	1c58      	adds	r0, r3, #1
- 80025ea:	7010      	strb	r0, [r2, #0]
- 80025ec:	001a      	movs	r2, r3
- 80025ee:	68fb      	ldr	r3, [r7, #12]
- 80025f0:	189b      	adds	r3, r3, r2
- 80025f2:	b2ca      	uxtb	r2, r1
- 80025f4:	701a      	strb	r2, [r3, #0]
-				buffer[buffer_pos++] = (uint8_t) transaction->register_count;
- 80025f6:	193b      	adds	r3, r7, r4
- 80025f8:	781b      	ldrb	r3, [r3, #0]
- 80025fa:	193a      	adds	r2, r7, r4
- 80025fc:	1c59      	adds	r1, r3, #1
- 80025fe:	7011      	strb	r1, [r2, #0]
- 8002600:	001a      	movs	r2, r3
- 8002602:	68fb      	ldr	r3, [r7, #12]
- 8002604:	189b      	adds	r3, r3, r2
- 8002606:	687a      	ldr	r2, [r7, #4]
- 8002608:	7992      	ldrb	r2, [r2, #6]
- 800260a:	701a      	strb	r2, [r3, #0]
-				*msg_len = 8; /* includes 2 bytes for CRC */
- 800260c:	68bb      	ldr	r3, [r7, #8]
- 800260e:	2208      	movs	r2, #8
- 8002610:	701a      	strb	r2, [r3, #0]
-				break;
- 8002612:	e038      	b.n	8002686 <modbus_transaction_to_buffer+0x276>
-			case MODBUS_READ_DEVICE_IDENTIFICATION:
-				/* MEI type */
-				buffer[buffer_pos++] = MODBUS_MEI;
- 8002614:	201f      	movs	r0, #31
- 8002616:	183b      	adds	r3, r7, r0
- 8002618:	781b      	ldrb	r3, [r3, #0]
- 800261a:	183a      	adds	r2, r7, r0
- 800261c:	1c59      	adds	r1, r3, #1
- 800261e:	7011      	strb	r1, [r2, #0]
- 8002620:	001a      	movs	r2, r3
- 8002622:	68fb      	ldr	r3, [r7, #12]
- 8002624:	189b      	adds	r3, r3, r2
- 8002626:	220e      	movs	r2, #14
- 8002628:	701a      	strb	r2, [r3, #0]
-				/* read device id */
-				buffer[buffer_pos++] = transaction->read_device_id_code;
- 800262a:	183b      	adds	r3, r7, r0
- 800262c:	781b      	ldrb	r3, [r3, #0]
- 800262e:	183a      	adds	r2, r7, r0
- 8002630:	1c59      	adds	r1, r3, #1
- 8002632:	7011      	strb	r1, [r2, #0]
- 8002634:	001a      	movs	r2, r3
- 8002636:	68fb      	ldr	r3, [r7, #12]
- 8002638:	189b      	adds	r3, r3, r2
- 800263a:	6879      	ldr	r1, [r7, #4]
- 800263c:	2285      	movs	r2, #133	; 0x85
- 800263e:	0052      	lsls	r2, r2, #1
- 8002640:	5c8a      	ldrb	r2, [r1, r2]
- 8002642:	701a      	strb	r2, [r3, #0]
-				/* conformity level */
-				buffer[buffer_pos++] = modbus_device_id->conformity_level;
- 8002644:	4b27      	ldr	r3, [pc, #156]	; (80026e4 <modbus_transaction_to_buffer+0x2d4>)
- 8002646:	681a      	ldr	r2, [r3, #0]
- 8002648:	183b      	adds	r3, r7, r0
- 800264a:	781b      	ldrb	r3, [r3, #0]
- 800264c:	0004      	movs	r4, r0
- 800264e:	1839      	adds	r1, r7, r0
- 8002650:	1c58      	adds	r0, r3, #1
- 8002652:	7008      	strb	r0, [r1, #0]
- 8002654:	0019      	movs	r1, r3
- 8002656:	68fb      	ldr	r3, [r7, #12]
- 8002658:	185b      	adds	r3, r3, r1
- 800265a:	7f12      	ldrb	r2, [r2, #28]
- 800265c:	701a      	strb	r2, [r3, #0]
-				/* fill buffer with as many objects as possible  */
-				*msg_len = modbus_fill_device_id_objects(buffer+buffer_pos, transaction);
- 800265e:	193b      	adds	r3, r7, r4
- 8002660:	781b      	ldrb	r3, [r3, #0]
- 8002662:	68fa      	ldr	r2, [r7, #12]
- 8002664:	18d3      	adds	r3, r2, r3
- 8002666:	687a      	ldr	r2, [r7, #4]
- 8002668:	0011      	movs	r1, r2
- 800266a:	0018      	movs	r0, r3
- 800266c:	f7ff fe2c 	bl	80022c8 <modbus_fill_device_id_objects>
- 8002670:	0003      	movs	r3, r0
- 8002672:	001a      	movs	r2, r3
- 8002674:	68bb      	ldr	r3, [r7, #8]
- 8002676:	701a      	strb	r2, [r3, #0]
-				*msg_len += 7; /* includes 2 bytes for CRC */
- 8002678:	68bb      	ldr	r3, [r7, #8]
- 800267a:	781b      	ldrb	r3, [r3, #0]
- 800267c:	3307      	adds	r3, #7
- 800267e:	b2da      	uxtb	r2, r3
- 8002680:	68bb      	ldr	r3, [r7, #8]
- 8002682:	701a      	strb	r2, [r3, #0]
-				break;
- 8002684:	46c0      	nop			; (mov r8, r8)
-		}
-	}
-	crc16 = modbus_CRC16(buffer, buffer_pos); /* last two bytes is the checksum itself */
- 8002686:	251f      	movs	r5, #31
- 8002688:	197b      	adds	r3, r7, r5
- 800268a:	781a      	ldrb	r2, [r3, #0]
- 800268c:	2614      	movs	r6, #20
- 800268e:	19bc      	adds	r4, r7, r6
- 8002690:	68fb      	ldr	r3, [r7, #12]
- 8002692:	0011      	movs	r1, r2
- 8002694:	0018      	movs	r0, r3
- 8002696:	f7ff fdcd 	bl	8002234 <modbus_CRC16>
- 800269a:	0003      	movs	r3, r0
- 800269c:	8023      	strh	r3, [r4, #0]
-	buffer[buffer_pos++] = crc16 & 0xff;
- 800269e:	0028      	movs	r0, r5
- 80026a0:	183b      	adds	r3, r7, r0
- 80026a2:	781b      	ldrb	r3, [r3, #0]
- 80026a4:	183a      	adds	r2, r7, r0
- 80026a6:	1c59      	adds	r1, r3, #1
- 80026a8:	7011      	strb	r1, [r2, #0]
- 80026aa:	001a      	movs	r2, r3
- 80026ac:	68fb      	ldr	r3, [r7, #12]
- 80026ae:	189b      	adds	r3, r3, r2
- 80026b0:	19ba      	adds	r2, r7, r6
- 80026b2:	8812      	ldrh	r2, [r2, #0]
- 80026b4:	b2d2      	uxtb	r2, r2
- 80026b6:	701a      	strb	r2, [r3, #0]
-	buffer[buffer_pos++] = crc16 >> 8;
- 80026b8:	19bb      	adds	r3, r7, r6
- 80026ba:	881b      	ldrh	r3, [r3, #0]
- 80026bc:	0a1b      	lsrs	r3, r3, #8
- 80026be:	b299      	uxth	r1, r3
- 80026c0:	183b      	adds	r3, r7, r0
- 80026c2:	781b      	ldrb	r3, [r3, #0]
- 80026c4:	183a      	adds	r2, r7, r0
- 80026c6:	1c58      	adds	r0, r3, #1
- 80026c8:	7010      	strb	r0, [r2, #0]
- 80026ca:	001a      	movs	r2, r3
- 80026cc:	68fb      	ldr	r3, [r7, #12]
- 80026ce:	189b      	adds	r3, r3, r2
- 80026d0:	b2ca      	uxtb	r2, r1
- 80026d2:	701a      	strb	r2, [r3, #0]
-	return MODBUS_OK;
- 80026d4:	2300      	movs	r3, #0
-}
- 80026d6:	0018      	movs	r0, r3
- 80026d8:	46bd      	mov	sp, r7
- 80026da:	b009      	add	sp, #36	; 0x24
- 80026dc:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 80026de:	46c0      	nop			; (mov r8, r8)
- 80026e0:	20000000 	.word	0x20000000
- 80026e4:	20000030 	.word	0x20000030
-
-080026e8 <modbus_process_device_id_request>:
-
-static int8_t modbus_process_device_id_request(const uint8_t *buffer, int len, modbus_transaction_t *transaction)
-{
- 80026e8:	b580      	push	{r7, lr}
- 80026ea:	b086      	sub	sp, #24
- 80026ec:	af00      	add	r7, sp, #0
- 80026ee:	60f8      	str	r0, [r7, #12]
- 80026f0:	60b9      	str	r1, [r7, #8]
- 80026f2:	607a      	str	r2, [r7, #4]
-	uint8_t MEI_type;
-	uint8_t read_device_id_code;
-	uint8_t object_id;
-	uint8_t buffer_pos = 0;
- 80026f4:	2317      	movs	r3, #23
- 80026f6:	18fb      	adds	r3, r7, r3
- 80026f8:	2200      	movs	r2, #0
- 80026fa:	701a      	strb	r2, [r3, #0]
-
-	if (transaction->broadcast == 1) {
- 80026fc:	687b      	ldr	r3, [r7, #4]
- 80026fe:	7a1b      	ldrb	r3, [r3, #8]
- 8002700:	2b01      	cmp	r3, #1
- 8002702:	d102      	bne.n	800270a <modbus_process_device_id_request+0x22>
-		/* Read device ID broadcast - invalid; ignore (master will get timeout) */
-		return MODBUS_ERROR;
- 8002704:	2301      	movs	r3, #1
- 8002706:	425b      	negs	r3, r3
- 8002708:	e061      	b.n	80027ce <modbus_process_device_id_request+0xe6>
-	}
-	if (modbus_device_id == NULL) {
- 800270a:	4b33      	ldr	r3, [pc, #204]	; (80027d8 <modbus_process_device_id_request+0xf0>)
- 800270c:	681b      	ldr	r3, [r3, #0]
- 800270e:	2b00      	cmp	r3, #0
- 8002710:	d104      	bne.n	800271c <modbus_process_device_id_request+0x34>
-		/* modbus_device_id not initialized; user should use modbus_slave_init_device_id() first */
-		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DEVICE_ID_CODE;
- 8002712:	687b      	ldr	r3, [r7, #4]
- 8002714:	2203      	movs	r2, #3
- 8002716:	71da      	strb	r2, [r3, #7]
-		return MODBUS_OK;
- 8002718:	2300      	movs	r3, #0
- 800271a:	e058      	b.n	80027ce <modbus_process_device_id_request+0xe6>
-	}
-	if (len < MODBUS_READ_DEVICE_ID_REQUEST_LEN) {
- 800271c:	68bb      	ldr	r3, [r7, #8]
- 800271e:	2b03      	cmp	r3, #3
- 8002720:	dc02      	bgt.n	8002728 <modbus_process_device_id_request+0x40>
-		/* frame too short, ignore */
-		return MODBUS_ERROR;
- 8002722:	2301      	movs	r3, #1
- 8002724:	425b      	negs	r3, r3
- 8002726:	e052      	b.n	80027ce <modbus_process_device_id_request+0xe6>
-	}
-	/* next byte should be MEI = 0x0E */
-	MEI_type = buffer[buffer_pos++];
- 8002728:	2217      	movs	r2, #23
- 800272a:	18bb      	adds	r3, r7, r2
- 800272c:	781b      	ldrb	r3, [r3, #0]
- 800272e:	18ba      	adds	r2, r7, r2
- 8002730:	1c59      	adds	r1, r3, #1
- 8002732:	7011      	strb	r1, [r2, #0]
- 8002734:	001a      	movs	r2, r3
- 8002736:	68fb      	ldr	r3, [r7, #12]
- 8002738:	189a      	adds	r2, r3, r2
- 800273a:	2116      	movs	r1, #22
- 800273c:	187b      	adds	r3, r7, r1
- 800273e:	7812      	ldrb	r2, [r2, #0]
- 8002740:	701a      	strb	r2, [r3, #0]
-	if (MEI_type != MODBUS_MEI) {
- 8002742:	187b      	adds	r3, r7, r1
- 8002744:	781b      	ldrb	r3, [r3, #0]
- 8002746:	2b0e      	cmp	r3, #14
- 8002748:	d002      	beq.n	8002750 <modbus_process_device_id_request+0x68>
-		/* invalid MEI, ignore. I have no idea what MEI does, but it should always be 0x0E */
-		return MODBUS_ERROR;
- 800274a:	2301      	movs	r3, #1
- 800274c:	425b      	negs	r3, r3
- 800274e:	e03e      	b.n	80027ce <modbus_process_device_id_request+0xe6>
-	}
-	/* next byte is read device id code */
-	read_device_id_code = buffer[buffer_pos++];
- 8002750:	2217      	movs	r2, #23
- 8002752:	18bb      	adds	r3, r7, r2
- 8002754:	781b      	ldrb	r3, [r3, #0]
- 8002756:	18ba      	adds	r2, r7, r2
- 8002758:	1c59      	adds	r1, r3, #1
- 800275a:	7011      	strb	r1, [r2, #0]
- 800275c:	001a      	movs	r2, r3
- 800275e:	68fb      	ldr	r3, [r7, #12]
- 8002760:	189a      	adds	r2, r3, r2
- 8002762:	2115      	movs	r1, #21
- 8002764:	187b      	adds	r3, r7, r1
- 8002766:	7812      	ldrb	r2, [r2, #0]
- 8002768:	701a      	strb	r2, [r3, #0]
-	/* read device id code can only have values 1,2,3,4 */
-	if (read_device_id_code < 1 || read_device_id_code > 4) {
- 800276a:	000a      	movs	r2, r1
- 800276c:	18bb      	adds	r3, r7, r2
- 800276e:	781b      	ldrb	r3, [r3, #0]
- 8002770:	2b00      	cmp	r3, #0
- 8002772:	d003      	beq.n	800277c <modbus_process_device_id_request+0x94>
- 8002774:	18bb      	adds	r3, r7, r2
- 8002776:	781b      	ldrb	r3, [r3, #0]
- 8002778:	2b04      	cmp	r3, #4
- 800277a:	d904      	bls.n	8002786 <modbus_process_device_id_request+0x9e>
-		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DEVICE_ID_CODE;
- 800277c:	687b      	ldr	r3, [r7, #4]
- 800277e:	2203      	movs	r2, #3
- 8002780:	71da      	strb	r2, [r3, #7]
-		return MODBUS_OK;
- 8002782:	2300      	movs	r3, #0
- 8002784:	e023      	b.n	80027ce <modbus_process_device_id_request+0xe6>
-	}
-	transaction->read_device_id_code = read_device_id_code;
- 8002786:	687a      	ldr	r2, [r7, #4]
- 8002788:	2315      	movs	r3, #21
- 800278a:	18f9      	adds	r1, r7, r3
- 800278c:	2385      	movs	r3, #133	; 0x85
- 800278e:	005b      	lsls	r3, r3, #1
- 8002790:	7809      	ldrb	r1, [r1, #0]
- 8002792:	54d1      	strb	r1, [r2, r3]
-	/* next byte is object id */
-	object_id = buffer[buffer_pos++];
- 8002794:	2217      	movs	r2, #23
- 8002796:	18bb      	adds	r3, r7, r2
- 8002798:	781b      	ldrb	r3, [r3, #0]
- 800279a:	18ba      	adds	r2, r7, r2
- 800279c:	1c59      	adds	r1, r3, #1
- 800279e:	7011      	strb	r1, [r2, #0]
- 80027a0:	001a      	movs	r2, r3
- 80027a2:	68fb      	ldr	r3, [r7, #12]
- 80027a4:	189a      	adds	r2, r3, r2
- 80027a6:	2014      	movs	r0, #20
- 80027a8:	183b      	adds	r3, r7, r0
- 80027aa:	7812      	ldrb	r2, [r2, #0]
- 80027ac:	701a      	strb	r2, [r3, #0]
-	transaction->object_id = object_id;
- 80027ae:	687a      	ldr	r2, [r7, #4]
- 80027b0:	1839      	adds	r1, r7, r0
- 80027b2:	230c      	movs	r3, #12
- 80027b4:	33ff      	adds	r3, #255	; 0xff
- 80027b6:	7809      	ldrb	r1, [r1, #0]
- 80027b8:	54d1      	strb	r1, [r2, r3]
-	if (object_id > MODBUS_DEVICE_ID_OBJECT_NUM) {
- 80027ba:	183b      	adds	r3, r7, r0
- 80027bc:	781b      	ldrb	r3, [r3, #0]
- 80027be:	2b07      	cmp	r3, #7
- 80027c0:	d904      	bls.n	80027cc <modbus_process_device_id_request+0xe4>
-		/* illegal object ID */
-		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS;
- 80027c2:	687b      	ldr	r3, [r7, #4]
- 80027c4:	2202      	movs	r2, #2
- 80027c6:	71da      	strb	r2, [r3, #7]
-		return MODBUS_OK;
- 80027c8:	2300      	movs	r3, #0
- 80027ca:	e000      	b.n	80027ce <modbus_process_device_id_request+0xe6>
-	}
-	/* Message processed */
-	return MODBUS_OK;
- 80027cc:	2300      	movs	r3, #0
-}
- 80027ce:	0018      	movs	r0, r3
- 80027d0:	46bd      	mov	sp, r7
- 80027d2:	b006      	add	sp, #24
- 80027d4:	bd80      	pop	{r7, pc}
- 80027d6:	46c0      	nop			; (mov r8, r8)
- 80027d8:	20000030 	.word	0x20000030
-
-080027dc <modbus_process_read_write_request>:
-
-/* returns ERROR only when no response to master is needed */
-static int8_t modbus_process_read_write_request(const uint8_t *buffer, int len, modbus_transaction_t *transaction)
-{
- 80027dc:	b5b0      	push	{r4, r5, r7, lr}
- 80027de:	b086      	sub	sp, #24
- 80027e0:	af00      	add	r7, sp, #0
- 80027e2:	60f8      	str	r0, [r7, #12]
- 80027e4:	60b9      	str	r1, [r7, #8]
- 80027e6:	607a      	str	r2, [r7, #4]
-	uint8_t byte_count;
-	int8_t callback_result;
-	uint8_t buffer_pos = 0;
- 80027e8:	2317      	movs	r3, #23
- 80027ea:	18fb      	adds	r3, r7, r3
- 80027ec:	2200      	movs	r2, #0
- 80027ee:	701a      	strb	r2, [r3, #0]
-
-	/* set starting register number */
-	switch (transaction->function_code) {
- 80027f0:	687b      	ldr	r3, [r7, #4]
- 80027f2:	781b      	ldrb	r3, [r3, #0]
- 80027f4:	2b17      	cmp	r3, #23
- 80027f6:	d814      	bhi.n	8002822 <modbus_process_read_write_request+0x46>
- 80027f8:	009a      	lsls	r2, r3, #2
- 80027fa:	4bad      	ldr	r3, [pc, #692]	; (8002ab0 <modbus_process_read_write_request+0x2d4>)
- 80027fc:	18d3      	adds	r3, r2, r3
- 80027fe:	681b      	ldr	r3, [r3, #0]
- 8002800:	469f      	mov	pc, r3
-	/* coils */
-	case MODBUS_READ_DO:
-	case MODBUS_WRITE_SINGLE_DO:
-	case MODBUS_WRITE_MULTIPLE_DO:
-		transaction->register_number = MODBUS_DO_START_NUMBER;
- 8002802:	687b      	ldr	r3, [r7, #4]
- 8002804:	2201      	movs	r2, #1
- 8002806:	809a      	strh	r2, [r3, #4]
-		break;
- 8002808:	e00b      	b.n	8002822 <modbus_process_read_write_request+0x46>
-	/* discrete inputs */
-	case MODBUS_READ_DI:
-		transaction->register_number = MODBUS_DI_START_NUMBER;
- 800280a:	687b      	ldr	r3, [r7, #4]
- 800280c:	4aa9      	ldr	r2, [pc, #676]	; (8002ab4 <modbus_process_read_write_request+0x2d8>)
- 800280e:	809a      	strh	r2, [r3, #4]
-		break;
- 8002810:	e007      	b.n	8002822 <modbus_process_read_write_request+0x46>
-	/* input registers */
-	case MODBUS_READ_AI:
-		transaction->register_number = MODBUS_AI_START_NUMBER;
- 8002812:	687b      	ldr	r3, [r7, #4]
- 8002814:	4aa8      	ldr	r2, [pc, #672]	; (8002ab8 <modbus_process_read_write_request+0x2dc>)
- 8002816:	809a      	strh	r2, [r3, #4]
-		break;
- 8002818:	e003      	b.n	8002822 <modbus_process_read_write_request+0x46>
-	/* holding registers */
-	case MODBUS_READ_AO:
-	case MODBUS_WRITE_SINGLE_AO:
-	case MODBUS_WRITE_MULTIPLE_AO:
-	case MODBUS_READ_WRITE_MULTIPLE_REGISTERS:
-		transaction->register_number = MODBUS_AO_START_NUMBER;
- 800281a:	687b      	ldr	r3, [r7, #4]
- 800281c:	4aa7      	ldr	r2, [pc, #668]	; (8002abc <modbus_process_read_write_request+0x2e0>)
- 800281e:	809a      	strh	r2, [r3, #4]
-		break;	
- 8002820:	46c0      	nop			; (mov r8, r8)
-	}
-
-	#define MODBUS_FLAG_WRITE  0x01
-	#define MODBUS_FLAG_SINGLE 0x02
-	uint8_t flags = 0x00;
- 8002822:	2316      	movs	r3, #22
- 8002824:	18fb      	adds	r3, r7, r3
- 8002826:	2200      	movs	r2, #0
- 8002828:	701a      	strb	r2, [r3, #0]
-
-	/* process message */
-	switch (transaction->function_code) {
- 800282a:	687b      	ldr	r3, [r7, #4]
- 800282c:	781b      	ldrb	r3, [r3, #0]
- 800282e:	2b10      	cmp	r3, #16
- 8002830:	dd00      	ble.n	8002834 <modbus_process_read_write_request+0x58>
- 8002832:	e0ff      	b.n	8002a34 <modbus_process_read_write_request+0x258>
- 8002834:	2b0f      	cmp	r3, #15
- 8002836:	da0f      	bge.n	8002858 <modbus_process_read_write_request+0x7c>
- 8002838:	2b04      	cmp	r3, #4
- 800283a:	dc02      	bgt.n	8002842 <modbus_process_read_write_request+0x66>
- 800283c:	2b00      	cmp	r3, #0
- 800283e:	dc12      	bgt.n	8002866 <modbus_process_read_write_request+0x8a>
- 8002840:	e0f8      	b.n	8002a34 <modbus_process_read_write_request+0x258>
- 8002842:	3b05      	subs	r3, #5
- 8002844:	2b01      	cmp	r3, #1
- 8002846:	d900      	bls.n	800284a <modbus_process_read_write_request+0x6e>
- 8002848:	e0f4      	b.n	8002a34 <modbus_process_read_write_request+0x258>
-	case MODBUS_WRITE_SINGLE_COIL:
-	case MODBUS_WRITE_SINGLE_REGISTER: /* holding register */
-		flags |= MODBUS_FLAG_SINGLE;
- 800284a:	2216      	movs	r2, #22
- 800284c:	18bb      	adds	r3, r7, r2
- 800284e:	18ba      	adds	r2, r7, r2
- 8002850:	7812      	ldrb	r2, [r2, #0]
- 8002852:	2102      	movs	r1, #2
- 8002854:	430a      	orrs	r2, r1
- 8002856:	701a      	strb	r2, [r3, #0]
-	case MODBUS_WRITE_MULTIPLE_COILS:
-	case MODBUS_WRITE_MULTIPLE_REGISTERS:
-		flags |= MODBUS_FLAG_WRITE;
- 8002858:	2216      	movs	r2, #22
- 800285a:	18bb      	adds	r3, r7, r2
- 800285c:	18ba      	adds	r2, r7, r2
- 800285e:	7812      	ldrb	r2, [r2, #0]
- 8002860:	2101      	movs	r1, #1
- 8002862:	430a      	orrs	r2, r1
- 8002864:	701a      	strb	r2, [r3, #0]
-	case MODBUS_READ_DISCRETE_INPUTS:
-	case MODBUS_READ_COILS:
-	case MODBUS_READ_INPUT_REGISTERS:
-	case MODBUS_READ_HOLDING_REGISTERS:
-		if (len < MODBUS_MINIMAL_READWRITE_LEN) {
- 8002866:	68bb      	ldr	r3, [r7, #8]
- 8002868:	2b03      	cmp	r3, #3
- 800286a:	dc02      	bgt.n	8002872 <modbus_process_read_write_request+0x96>
-			/* buffer too short to contain everything we need */
-			return MODBUS_ERROR;
- 800286c:	2301      	movs	r3, #1
- 800286e:	425b      	negs	r3, r3
- 8002870:	e11a      	b.n	8002aa8 <modbus_process_read_write_request+0x2cc>
-		}
-		transaction->register_address = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
- 8002872:	2017      	movs	r0, #23
- 8002874:	183b      	adds	r3, r7, r0
- 8002876:	781b      	ldrb	r3, [r3, #0]
- 8002878:	68fa      	ldr	r2, [r7, #12]
- 800287a:	18d3      	adds	r3, r2, r3
- 800287c:	781b      	ldrb	r3, [r3, #0]
- 800287e:	021b      	lsls	r3, r3, #8
- 8002880:	b21a      	sxth	r2, r3
- 8002882:	183b      	adds	r3, r7, r0
- 8002884:	781b      	ldrb	r3, [r3, #0]
- 8002886:	3301      	adds	r3, #1
- 8002888:	68f9      	ldr	r1, [r7, #12]
- 800288a:	18cb      	adds	r3, r1, r3
- 800288c:	781b      	ldrb	r3, [r3, #0]
- 800288e:	b21b      	sxth	r3, r3
- 8002890:	4313      	orrs	r3, r2
- 8002892:	b21b      	sxth	r3, r3
- 8002894:	b29a      	uxth	r2, r3
- 8002896:	687b      	ldr	r3, [r7, #4]
- 8002898:	805a      	strh	r2, [r3, #2]
-		buffer += 2;
- 800289a:	68fb      	ldr	r3, [r7, #12]
- 800289c:	3302      	adds	r3, #2
- 800289e:	60fb      	str	r3, [r7, #12]
-		// TODO check length!
-		if (flags & MODBUS_FLAG_WRITE) {
- 80028a0:	2116      	movs	r1, #22
- 80028a2:	187b      	adds	r3, r7, r1
- 80028a4:	781b      	ldrb	r3, [r3, #0]
- 80028a6:	2201      	movs	r2, #1
- 80028a8:	4013      	ands	r3, r2
- 80028aa:	d100      	bne.n	80028ae <modbus_process_read_write_request+0xd2>
- 80028ac:	e095      	b.n	80029da <modbus_process_read_write_request+0x1fe>
-			if (flags & MODBUS_FLAG_SINGLE) {
- 80028ae:	187b      	adds	r3, r7, r1
- 80028b0:	781b      	ldrb	r3, [r3, #0]
- 80028b2:	2202      	movs	r2, #2
- 80028b4:	4013      	ands	r3, r2
- 80028b6:	d018      	beq.n	80028ea <modbus_process_read_write_request+0x10e>
-				transaction->holding_registers[0] = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
- 80028b8:	183b      	adds	r3, r7, r0
- 80028ba:	781b      	ldrb	r3, [r3, #0]
- 80028bc:	68fa      	ldr	r2, [r7, #12]
- 80028be:	18d3      	adds	r3, r2, r3
- 80028c0:	781b      	ldrb	r3, [r3, #0]
- 80028c2:	021b      	lsls	r3, r3, #8
- 80028c4:	b21a      	sxth	r2, r3
- 80028c6:	183b      	adds	r3, r7, r0
- 80028c8:	781b      	ldrb	r3, [r3, #0]
- 80028ca:	3301      	adds	r3, #1
- 80028cc:	68f9      	ldr	r1, [r7, #12]
- 80028ce:	18cb      	adds	r3, r1, r3
- 80028d0:	781b      	ldrb	r3, [r3, #0]
- 80028d2:	b21b      	sxth	r3, r3
- 80028d4:	4313      	orrs	r3, r2
- 80028d6:	b21b      	sxth	r3, r3
- 80028d8:	b29a      	uxth	r2, r3
- 80028da:	687b      	ldr	r3, [r7, #4]
- 80028dc:	815a      	strh	r2, [r3, #10]
-				buffer_pos += 2;
- 80028de:	183b      	adds	r3, r7, r0
- 80028e0:	183a      	adds	r2, r7, r0
- 80028e2:	7812      	ldrb	r2, [r2, #0]
- 80028e4:	3202      	adds	r2, #2
- 80028e6:	701a      	strb	r2, [r3, #0]
- 80028e8:	e09b      	b.n	8002a22 <modbus_process_read_write_request+0x246>
-			} else {
-				/* Write multiple registers */
-				transaction->register_count = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
- 80028ea:	2017      	movs	r0, #23
- 80028ec:	183b      	adds	r3, r7, r0
- 80028ee:	781b      	ldrb	r3, [r3, #0]
- 80028f0:	68fa      	ldr	r2, [r7, #12]
- 80028f2:	18d3      	adds	r3, r2, r3
- 80028f4:	781b      	ldrb	r3, [r3, #0]
- 80028f6:	021b      	lsls	r3, r3, #8
- 80028f8:	b25a      	sxtb	r2, r3
- 80028fa:	183b      	adds	r3, r7, r0
- 80028fc:	781b      	ldrb	r3, [r3, #0]
- 80028fe:	3301      	adds	r3, #1
- 8002900:	68f9      	ldr	r1, [r7, #12]
- 8002902:	18cb      	adds	r3, r1, r3
- 8002904:	781b      	ldrb	r3, [r3, #0]
- 8002906:	b25b      	sxtb	r3, r3
- 8002908:	4313      	orrs	r3, r2
- 800290a:	b25b      	sxtb	r3, r3
- 800290c:	b2da      	uxtb	r2, r3
- 800290e:	687b      	ldr	r3, [r7, #4]
- 8002910:	719a      	strb	r2, [r3, #6]
-				buffer_pos += 2;
- 8002912:	183b      	adds	r3, r7, r0
- 8002914:	183a      	adds	r2, r7, r0
- 8002916:	7812      	ldrb	r2, [r2, #0]
- 8002918:	3202      	adds	r2, #2
- 800291a:	701a      	strb	r2, [r3, #0]
-				if (len < MODBUS_MINIMAL_WRITE_MULTIPLE_LEN) {
- 800291c:	68bb      	ldr	r3, [r7, #8]
- 800291e:	2b04      	cmp	r3, #4
- 8002920:	dc02      	bgt.n	8002928 <modbus_process_read_write_request+0x14c>
-					return MODBUS_ERROR;
- 8002922:	2301      	movs	r3, #1
- 8002924:	425b      	negs	r3, r3
- 8002926:	e0bf      	b.n	8002aa8 <modbus_process_read_write_request+0x2cc>
-				}
-				byte_count = buffer[buffer_pos++];
- 8002928:	2217      	movs	r2, #23
- 800292a:	18bb      	adds	r3, r7, r2
- 800292c:	781b      	ldrb	r3, [r3, #0]
- 800292e:	18ba      	adds	r2, r7, r2
- 8002930:	1c59      	adds	r1, r3, #1
- 8002932:	7011      	strb	r1, [r2, #0]
- 8002934:	001a      	movs	r2, r3
- 8002936:	68fb      	ldr	r3, [r7, #12]
- 8002938:	189a      	adds	r2, r3, r2
- 800293a:	2114      	movs	r1, #20
- 800293c:	187b      	adds	r3, r7, r1
- 800293e:	7812      	ldrb	r2, [r2, #0]
- 8002940:	701a      	strb	r2, [r3, #0]
-				if (transaction->register_count > 123 || 2*transaction->register_count != byte_count) {
- 8002942:	687b      	ldr	r3, [r7, #4]
- 8002944:	799b      	ldrb	r3, [r3, #6]
- 8002946:	2b7b      	cmp	r3, #123	; 0x7b
- 8002948:	d806      	bhi.n	8002958 <modbus_process_read_write_request+0x17c>
- 800294a:	687b      	ldr	r3, [r7, #4]
- 800294c:	799b      	ldrb	r3, [r3, #6]
- 800294e:	005a      	lsls	r2, r3, #1
- 8002950:	187b      	adds	r3, r7, r1
- 8002952:	781b      	ldrb	r3, [r3, #0]
- 8002954:	429a      	cmp	r2, r3
- 8002956:	d003      	beq.n	8002960 <modbus_process_read_write_request+0x184>
-					/* Max number of register is defined by Modbus_Application_Protocol_V1_1b, section 6.12 */
-					transaction->exception = MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY;
- 8002958:	687b      	ldr	r3, [r7, #4]
- 800295a:	2202      	movs	r2, #2
- 800295c:	71da      	strb	r2, [r3, #7]
- 800295e:	e060      	b.n	8002a22 <modbus_process_read_write_request+0x246>
-				} else {
-					if (len < MODBUS_MINIMAL_WRITE_MULTIPLE_LEN + byte_count) {
- 8002960:	2314      	movs	r3, #20
- 8002962:	18fb      	adds	r3, r7, r3
- 8002964:	781b      	ldrb	r3, [r3, #0]
- 8002966:	3304      	adds	r3, #4
- 8002968:	68ba      	ldr	r2, [r7, #8]
- 800296a:	429a      	cmp	r2, r3
- 800296c:	dc02      	bgt.n	8002974 <modbus_process_read_write_request+0x198>
-						return MODBUS_ERROR;
- 800296e:	2301      	movs	r3, #1
- 8002970:	425b      	negs	r3, r3
- 8002972:	e099      	b.n	8002aa8 <modbus_process_read_write_request+0x2cc>
-					}
-					for (uint8_t i = 0; i < transaction->register_count; i++) {
- 8002974:	2315      	movs	r3, #21
- 8002976:	18fb      	adds	r3, r7, r3
- 8002978:	2200      	movs	r2, #0
- 800297a:	701a      	strb	r2, [r3, #0]
- 800297c:	e025      	b.n	80029ca <modbus_process_read_write_request+0x1ee>
-						transaction->holding_registers[i] = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
- 800297e:	2017      	movs	r0, #23
- 8002980:	183b      	adds	r3, r7, r0
- 8002982:	781b      	ldrb	r3, [r3, #0]
- 8002984:	68fa      	ldr	r2, [r7, #12]
- 8002986:	18d3      	adds	r3, r2, r3
- 8002988:	781b      	ldrb	r3, [r3, #0]
- 800298a:	021b      	lsls	r3, r3, #8
- 800298c:	b21a      	sxth	r2, r3
- 800298e:	183b      	adds	r3, r7, r0
- 8002990:	781b      	ldrb	r3, [r3, #0]
- 8002992:	3301      	adds	r3, #1
- 8002994:	68f9      	ldr	r1, [r7, #12]
- 8002996:	18cb      	adds	r3, r1, r3
- 8002998:	781b      	ldrb	r3, [r3, #0]
- 800299a:	b21b      	sxth	r3, r3
- 800299c:	4313      	orrs	r3, r2
- 800299e:	b21a      	sxth	r2, r3
- 80029a0:	2415      	movs	r4, #21
- 80029a2:	193b      	adds	r3, r7, r4
- 80029a4:	781b      	ldrb	r3, [r3, #0]
- 80029a6:	b291      	uxth	r1, r2
- 80029a8:	687a      	ldr	r2, [r7, #4]
- 80029aa:	3304      	adds	r3, #4
- 80029ac:	005b      	lsls	r3, r3, #1
- 80029ae:	18d3      	adds	r3, r2, r3
- 80029b0:	3302      	adds	r3, #2
- 80029b2:	1c0a      	adds	r2, r1, #0
- 80029b4:	801a      	strh	r2, [r3, #0]
-						buffer_pos += 2;
- 80029b6:	183b      	adds	r3, r7, r0
- 80029b8:	183a      	adds	r2, r7, r0
- 80029ba:	7812      	ldrb	r2, [r2, #0]
- 80029bc:	3202      	adds	r2, #2
- 80029be:	701a      	strb	r2, [r3, #0]
-					for (uint8_t i = 0; i < transaction->register_count; i++) {
- 80029c0:	193b      	adds	r3, r7, r4
- 80029c2:	781a      	ldrb	r2, [r3, #0]
- 80029c4:	193b      	adds	r3, r7, r4
- 80029c6:	3201      	adds	r2, #1
- 80029c8:	701a      	strb	r2, [r3, #0]
- 80029ca:	687b      	ldr	r3, [r7, #4]
- 80029cc:	799b      	ldrb	r3, [r3, #6]
- 80029ce:	2215      	movs	r2, #21
- 80029d0:	18ba      	adds	r2, r7, r2
- 80029d2:	7812      	ldrb	r2, [r2, #0]
- 80029d4:	429a      	cmp	r2, r3
- 80029d6:	d3d2      	bcc.n	800297e <modbus_process_read_write_request+0x1a2>
- 80029d8:	e023      	b.n	8002a22 <modbus_process_read_write_request+0x246>
-					}
-				}
-			}
-		} else {
-			transaction->register_count = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
- 80029da:	2017      	movs	r0, #23
- 80029dc:	183b      	adds	r3, r7, r0
- 80029de:	781b      	ldrb	r3, [r3, #0]
- 80029e0:	68fa      	ldr	r2, [r7, #12]
- 80029e2:	18d3      	adds	r3, r2, r3
- 80029e4:	781b      	ldrb	r3, [r3, #0]
- 80029e6:	021b      	lsls	r3, r3, #8
- 80029e8:	b25a      	sxtb	r2, r3
- 80029ea:	183b      	adds	r3, r7, r0
- 80029ec:	781b      	ldrb	r3, [r3, #0]
- 80029ee:	3301      	adds	r3, #1
- 80029f0:	68f9      	ldr	r1, [r7, #12]
- 80029f2:	18cb      	adds	r3, r1, r3
- 80029f4:	781b      	ldrb	r3, [r3, #0]
- 80029f6:	b25b      	sxtb	r3, r3
- 80029f8:	4313      	orrs	r3, r2
- 80029fa:	b25b      	sxtb	r3, r3
- 80029fc:	b2da      	uxtb	r2, r3
- 80029fe:	687b      	ldr	r3, [r7, #4]
- 8002a00:	719a      	strb	r2, [r3, #6]
-			buffer_pos += 2;
- 8002a02:	183b      	adds	r3, r7, r0
- 8002a04:	183a      	adds	r2, r7, r0
- 8002a06:	7812      	ldrb	r2, [r2, #0]
- 8002a08:	3202      	adds	r2, #2
- 8002a0a:	701a      	strb	r2, [r3, #0]
-			if (
-					transaction->register_count < 1 ||
- 8002a0c:	687b      	ldr	r3, [r7, #4]
- 8002a0e:	799b      	ldrb	r3, [r3, #6]
-			if (
- 8002a10:	2b00      	cmp	r3, #0
- 8002a12:	d003      	beq.n	8002a1c <modbus_process_read_write_request+0x240>
-					transaction->register_count > MODBUS_MAX_REGISTERS
- 8002a14:	687b      	ldr	r3, [r7, #4]
- 8002a16:	799b      	ldrb	r3, [r3, #6]
-					transaction->register_count < 1 ||
- 8002a18:	2b7d      	cmp	r3, #125	; 0x7d
- 8002a1a:	d902      	bls.n	8002a22 <modbus_process_read_write_request+0x246>
-			   ) {
-				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE;
- 8002a1c:	687b      	ldr	r3, [r7, #4]
- 8002a1e:	2203      	movs	r2, #3
- 8002a20:	71da      	strb	r2, [r3, #7]
-			}
-		}
-		// add offset to register number
-		transaction->register_number += transaction->register_address;
- 8002a22:	687b      	ldr	r3, [r7, #4]
- 8002a24:	889a      	ldrh	r2, [r3, #4]
- 8002a26:	687b      	ldr	r3, [r7, #4]
- 8002a28:	885b      	ldrh	r3, [r3, #2]
- 8002a2a:	18d3      	adds	r3, r2, r3
- 8002a2c:	b29a      	uxth	r2, r3
- 8002a2e:	687b      	ldr	r3, [r7, #4]
- 8002a30:	809a      	strh	r2, [r3, #4]
-		break;
- 8002a32:	e003      	b.n	8002a3c <modbus_process_read_write_request+0x260>
-	default:
-		/* function code not known / not implemented, reply with
-		 * ExceptionCode 1 */
-		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
- 8002a34:	687b      	ldr	r3, [r7, #4]
- 8002a36:	2201      	movs	r2, #1
- 8002a38:	71da      	strb	r2, [r3, #7]
-		break;
- 8002a3a:	46c0      	nop			; (mov r8, r8)
-	}
-	/* data in modbus_buffer have been processed and buffer can be re-used for TX */
-	/* handle reply */
-	if (transaction->exception != 0) {
- 8002a3c:	687b      	ldr	r3, [r7, #4]
- 8002a3e:	79db      	ldrb	r3, [r3, #7]
- 8002a40:	2b00      	cmp	r3, #0
- 8002a42:	d008      	beq.n	8002a56 <modbus_process_read_write_request+0x27a>
-		/* indicate error */
-		transaction->function_code |= MODBUS_ERROR_FLAG;
- 8002a44:	687b      	ldr	r3, [r7, #4]
- 8002a46:	781b      	ldrb	r3, [r3, #0]
- 8002a48:	2280      	movs	r2, #128	; 0x80
- 8002a4a:	4252      	negs	r2, r2
- 8002a4c:	4313      	orrs	r3, r2
- 8002a4e:	b2da      	uxtb	r2, r3
- 8002a50:	687b      	ldr	r3, [r7, #4]
- 8002a52:	701a      	strb	r2, [r3, #0]
- 8002a54:	e027      	b.n	8002aa6 <modbus_process_read_write_request+0x2ca>
-	} else {
-		callback_result = modbus_slave_callback(transaction);
- 8002a56:	2513      	movs	r5, #19
- 8002a58:	197c      	adds	r4, r7, r5
- 8002a5a:	687b      	ldr	r3, [r7, #4]
- 8002a5c:	0018      	movs	r0, r3
- 8002a5e:	f7ff fa99 	bl	8001f94 <modbus_slave_callback>
- 8002a62:	0003      	movs	r3, r0
- 8002a64:	7023      	strb	r3, [r4, #0]
-		/* error handling */
-		if (callback_result != MODBUS_OK) {
- 8002a66:	0029      	movs	r1, r5
- 8002a68:	187b      	adds	r3, r7, r1
- 8002a6a:	781b      	ldrb	r3, [r3, #0]
- 8002a6c:	b25b      	sxtb	r3, r3
- 8002a6e:	2b00      	cmp	r3, #0
- 8002a70:	d019      	beq.n	8002aa6 <modbus_process_read_write_request+0x2ca>
-			transaction->function_code |= MODBUS_ERROR_FLAG;
- 8002a72:	687b      	ldr	r3, [r7, #4]
- 8002a74:	781b      	ldrb	r3, [r3, #0]
- 8002a76:	2280      	movs	r2, #128	; 0x80
- 8002a78:	4252      	negs	r2, r2
- 8002a7a:	4313      	orrs	r3, r2
- 8002a7c:	b2da      	uxtb	r2, r3
- 8002a7e:	687b      	ldr	r3, [r7, #4]
- 8002a80:	701a      	strb	r2, [r3, #0]
-			if (callback_result == MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED) {
- 8002a82:	187b      	adds	r3, r7, r1
- 8002a84:	781b      	ldrb	r3, [r3, #0]
- 8002a86:	b25b      	sxtb	r3, r3
- 8002a88:	3305      	adds	r3, #5
- 8002a8a:	d103      	bne.n	8002a94 <modbus_process_read_write_request+0x2b8>
-				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
- 8002a8c:	687b      	ldr	r3, [r7, #4]
- 8002a8e:	2201      	movs	r2, #1
- 8002a90:	71da      	strb	r2, [r3, #7]
- 8002a92:	e008      	b.n	8002aa6 <modbus_process_read_write_request+0x2ca>
-			} else if (callback_result == MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED) {
- 8002a94:	2313      	movs	r3, #19
- 8002a96:	18fb      	adds	r3, r7, r3
- 8002a98:	781b      	ldrb	r3, [r3, #0]
- 8002a9a:	b25b      	sxtb	r3, r3
- 8002a9c:	3306      	adds	r3, #6
- 8002a9e:	d102      	bne.n	8002aa6 <modbus_process_read_write_request+0x2ca>
-				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS;
- 8002aa0:	687b      	ldr	r3, [r7, #4]
- 8002aa2:	2202      	movs	r2, #2
- 8002aa4:	71da      	strb	r2, [r3, #7]
-			}
-		}
-	}
-	return MODBUS_OK;
- 8002aa6:	2300      	movs	r3, #0
-}
- 8002aa8:	0018      	movs	r0, r3
- 8002aaa:	46bd      	mov	sp, r7
- 8002aac:	b006      	add	sp, #24
- 8002aae:	bdb0      	pop	{r4, r5, r7, pc}
- 8002ab0:	08003c38 	.word	0x08003c38
- 8002ab4:	00002711 	.word	0x00002711
- 8002ab8:	00007531 	.word	0x00007531
- 8002abc:	ffff9c41 	.word	0xffff9c41
-
-08002ac0 <modbus_slave_set_address>:
-/*
- * Public function definitions
- */
-
-int8_t modbus_slave_set_address(uint8_t address)
-{
- 8002ac0:	b580      	push	{r7, lr}
- 8002ac2:	b082      	sub	sp, #8
- 8002ac4:	af00      	add	r7, sp, #0
- 8002ac6:	0002      	movs	r2, r0
- 8002ac8:	1dfb      	adds	r3, r7, #7
- 8002aca:	701a      	strb	r2, [r3, #0]
-	if (address == 0) {
- 8002acc:	1dfb      	adds	r3, r7, #7
- 8002ace:	781b      	ldrb	r3, [r3, #0]
- 8002ad0:	2b00      	cmp	r3, #0
- 8002ad2:	d102      	bne.n	8002ada <modbus_slave_set_address+0x1a>
-		/* address 0 is broadcast address */
-		return MODBUS_ERROR;
- 8002ad4:	2301      	movs	r3, #1
- 8002ad6:	425b      	negs	r3, r3
- 8002ad8:	e004      	b.n	8002ae4 <modbus_slave_set_address+0x24>
-	}
-	modbus_slave_address = address;
- 8002ada:	4b04      	ldr	r3, [pc, #16]	; (8002aec <modbus_slave_set_address+0x2c>)
- 8002adc:	1dfa      	adds	r2, r7, #7
- 8002ade:	7812      	ldrb	r2, [r2, #0]
- 8002ae0:	701a      	strb	r2, [r3, #0]
-	return MODBUS_OK;
- 8002ae2:	2300      	movs	r3, #0
-}
- 8002ae4:	0018      	movs	r0, r3
- 8002ae6:	46bd      	mov	sp, r7
- 8002ae8:	b002      	add	sp, #8
- 8002aea:	bd80      	pop	{r7, pc}
- 8002aec:	20000000 	.word	0x20000000
-
-08002af0 <modbus_slave_process_msg>:
-
-
-int8_t modbus_slave_process_msg(const uint8_t *buffer, int len)
-{
- 8002af0:	b5f0      	push	{r4, r5, r6, r7, lr}
- 8002af2:	b0c9      	sub	sp, #292	; 0x124
- 8002af4:	af00      	add	r7, sp, #0
- 8002af6:	6078      	str	r0, [r7, #4]
- 8002af8:	6039      	str	r1, [r7, #0]
-
-
-	/* transaction holds message context and content:
-	 * it wraps all necessary buffers and variables */
-	modbus_transaction_t transaction;
-	uint8_t buffer_pos = 0;
- 8002afa:	238f      	movs	r3, #143	; 0x8f
- 8002afc:	005b      	lsls	r3, r3, #1
- 8002afe:	18fb      	adds	r3, r7, r3
- 8002b00:	2200      	movs	r2, #0
- 8002b02:	701a      	strb	r2, [r3, #0]
-
-	if (len < MODBUS_MINIMAL_FRAME_LEN) {
- 8002b04:	683b      	ldr	r3, [r7, #0]
- 8002b06:	2b03      	cmp	r3, #3
- 8002b08:	dc02      	bgt.n	8002b10 <modbus_slave_process_msg+0x20>
-		/* frame too short; return error (no reply needed) */
-		return MODBUS_ERROR_FRAME_INVALID;
- 8002b0a:	2303      	movs	r3, #3
- 8002b0c:	425b      	negs	r3, r3
- 8002b0e:	e0c6      	b.n	8002c9e <modbus_slave_process_msg+0x1ae>
-	}
-	/* check CRC first */
-	uint16_t crc_received = (buffer[len - 1] << 8) | buffer[len - 2];
- 8002b10:	683b      	ldr	r3, [r7, #0]
- 8002b12:	3b01      	subs	r3, #1
- 8002b14:	687a      	ldr	r2, [r7, #4]
- 8002b16:	18d3      	adds	r3, r2, r3
- 8002b18:	781b      	ldrb	r3, [r3, #0]
- 8002b1a:	021b      	lsls	r3, r3, #8
- 8002b1c:	b21a      	sxth	r2, r3
- 8002b1e:	683b      	ldr	r3, [r7, #0]
- 8002b20:	3b02      	subs	r3, #2
- 8002b22:	6879      	ldr	r1, [r7, #4]
- 8002b24:	18cb      	adds	r3, r1, r3
- 8002b26:	781b      	ldrb	r3, [r3, #0]
- 8002b28:	b21b      	sxth	r3, r3
- 8002b2a:	4313      	orrs	r3, r2
- 8002b2c:	b21a      	sxth	r2, r3
- 8002b2e:	258e      	movs	r5, #142	; 0x8e
- 8002b30:	006d      	lsls	r5, r5, #1
- 8002b32:	197b      	adds	r3, r7, r5
- 8002b34:	801a      	strh	r2, [r3, #0]
-	uint16_t crc_calculated = modbus_CRC16(buffer, len - 2);
- 8002b36:	683b      	ldr	r3, [r7, #0]
- 8002b38:	1e9a      	subs	r2, r3, #2
- 8002b3a:	268d      	movs	r6, #141	; 0x8d
- 8002b3c:	0076      	lsls	r6, r6, #1
- 8002b3e:	19bc      	adds	r4, r7, r6
- 8002b40:	687b      	ldr	r3, [r7, #4]
- 8002b42:	0011      	movs	r1, r2
- 8002b44:	0018      	movs	r0, r3
- 8002b46:	f7ff fb75 	bl	8002234 <modbus_CRC16>
- 8002b4a:	0003      	movs	r3, r0
- 8002b4c:	8023      	strh	r3, [r4, #0]
-	if (crc_received != crc_calculated) {
- 8002b4e:	197a      	adds	r2, r7, r5
- 8002b50:	19bb      	adds	r3, r7, r6
- 8002b52:	8812      	ldrh	r2, [r2, #0]
- 8002b54:	881b      	ldrh	r3, [r3, #0]
- 8002b56:	429a      	cmp	r2, r3
- 8002b58:	d002      	beq.n	8002b60 <modbus_slave_process_msg+0x70>
-		/* CRC mismatch, return error (no reply needed) */
-		return MODBUS_ERROR_CRC;
- 8002b5a:	2302      	movs	r3, #2
- 8002b5c:	425b      	negs	r3, r3
- 8002b5e:	e09e      	b.n	8002c9e <modbus_slave_process_msg+0x1ae>
-	}
-	/* check if address matches ours */
-	uint8_t address = buffer[buffer_pos++];
- 8002b60:	228f      	movs	r2, #143	; 0x8f
- 8002b62:	0052      	lsls	r2, r2, #1
- 8002b64:	18bb      	adds	r3, r7, r2
- 8002b66:	781b      	ldrb	r3, [r3, #0]
- 8002b68:	18ba      	adds	r2, r7, r2
- 8002b6a:	1c59      	adds	r1, r3, #1
- 8002b6c:	7011      	strb	r1, [r2, #0]
- 8002b6e:	001a      	movs	r2, r3
- 8002b70:	687b      	ldr	r3, [r7, #4]
- 8002b72:	189a      	adds	r2, r3, r2
- 8002b74:	211a      	movs	r1, #26
- 8002b76:	31ff      	adds	r1, #255	; 0xff
- 8002b78:	187b      	adds	r3, r7, r1
- 8002b7a:	7812      	ldrb	r2, [r2, #0]
- 8002b7c:	701a      	strb	r2, [r3, #0]
-	transaction.broadcast = (address == MODBUS_BROADCAST_ADDR);
- 8002b7e:	187b      	adds	r3, r7, r1
- 8002b80:	781b      	ldrb	r3, [r3, #0]
- 8002b82:	425a      	negs	r2, r3
- 8002b84:	4153      	adcs	r3, r2
- 8002b86:	b2db      	uxtb	r3, r3
- 8002b88:	001a      	movs	r2, r3
- 8002b8a:	4b47      	ldr	r3, [pc, #284]	; (8002ca8 <modbus_slave_process_msg+0x1b8>)
- 8002b8c:	2090      	movs	r0, #144	; 0x90
- 8002b8e:	0040      	lsls	r0, r0, #1
- 8002b90:	4684      	mov	ip, r0
- 8002b92:	44bc      	add	ip, r7
- 8002b94:	4463      	add	r3, ip
- 8002b96:	721a      	strb	r2, [r3, #8]
-	if (address != modbus_slave_address && transaction.broadcast != 1) {
- 8002b98:	4b44      	ldr	r3, [pc, #272]	; (8002cac <modbus_slave_process_msg+0x1bc>)
- 8002b9a:	781b      	ldrb	r3, [r3, #0]
- 8002b9c:	187a      	adds	r2, r7, r1
- 8002b9e:	7812      	ldrb	r2, [r2, #0]
- 8002ba0:	429a      	cmp	r2, r3
- 8002ba2:	d00a      	beq.n	8002bba <modbus_slave_process_msg+0xca>
- 8002ba4:	4b40      	ldr	r3, [pc, #256]	; (8002ca8 <modbus_slave_process_msg+0x1b8>)
- 8002ba6:	2290      	movs	r2, #144	; 0x90
- 8002ba8:	0052      	lsls	r2, r2, #1
- 8002baa:	4694      	mov	ip, r2
- 8002bac:	44bc      	add	ip, r7
- 8002bae:	4463      	add	r3, ip
- 8002bb0:	7a1b      	ldrb	r3, [r3, #8]
- 8002bb2:	2b01      	cmp	r3, #1
- 8002bb4:	d001      	beq.n	8002bba <modbus_slave_process_msg+0xca>
-		/* Message is not for us (no reply needed) */
-		return MODBUS_OK;
- 8002bb6:	2300      	movs	r3, #0
- 8002bb8:	e071      	b.n	8002c9e <modbus_slave_process_msg+0x1ae>
-	}
-	/* get function code */
-	transaction.function_code = buffer[buffer_pos++];
- 8002bba:	208f      	movs	r0, #143	; 0x8f
- 8002bbc:	0040      	lsls	r0, r0, #1
- 8002bbe:	183b      	adds	r3, r7, r0
- 8002bc0:	781b      	ldrb	r3, [r3, #0]
- 8002bc2:	183a      	adds	r2, r7, r0
- 8002bc4:	1c59      	adds	r1, r3, #1
- 8002bc6:	7011      	strb	r1, [r2, #0]
- 8002bc8:	001a      	movs	r2, r3
- 8002bca:	687b      	ldr	r3, [r7, #4]
- 8002bcc:	189b      	adds	r3, r3, r2
- 8002bce:	781a      	ldrb	r2, [r3, #0]
- 8002bd0:	4b35      	ldr	r3, [pc, #212]	; (8002ca8 <modbus_slave_process_msg+0x1b8>)
- 8002bd2:	2190      	movs	r1, #144	; 0x90
- 8002bd4:	0049      	lsls	r1, r1, #1
- 8002bd6:	468c      	mov	ip, r1
- 8002bd8:	44bc      	add	ip, r7
- 8002bda:	4463      	add	r3, ip
- 8002bdc:	701a      	strb	r2, [r3, #0]
-	transaction.exception = 0;
- 8002bde:	4b32      	ldr	r3, [pc, #200]	; (8002ca8 <modbus_slave_process_msg+0x1b8>)
- 8002be0:	2290      	movs	r2, #144	; 0x90
- 8002be2:	0052      	lsls	r2, r2, #1
- 8002be4:	4694      	mov	ip, r2
- 8002be6:	44bc      	add	ip, r7
- 8002be8:	4463      	add	r3, ip
- 8002bea:	2200      	movs	r2, #0
- 8002bec:	71da      	strb	r2, [r3, #7]
-	uint8_t request_processing_result;
-	if (transaction.function_code == MODBUS_READ_DEVICE_IDENTIFICATION) {
- 8002bee:	4b2e      	ldr	r3, [pc, #184]	; (8002ca8 <modbus_slave_process_msg+0x1b8>)
- 8002bf0:	2290      	movs	r2, #144	; 0x90
- 8002bf2:	0052      	lsls	r2, r2, #1
- 8002bf4:	4694      	mov	ip, r2
- 8002bf6:	44bc      	add	ip, r7
- 8002bf8:	4463      	add	r3, ip
- 8002bfa:	781b      	ldrb	r3, [r3, #0]
- 8002bfc:	2b2b      	cmp	r3, #43	; 0x2b
- 8002bfe:	d114      	bne.n	8002c2a <modbus_slave_process_msg+0x13a>
-		/* Read device ID request is quite complicated, therefore it has its own processing function */
-		request_processing_result = modbus_process_device_id_request(buffer + buffer_pos, len - buffer_pos, &transaction);
- 8002c00:	0001      	movs	r1, r0
- 8002c02:	187b      	adds	r3, r7, r1
- 8002c04:	781b      	ldrb	r3, [r3, #0]
- 8002c06:	687a      	ldr	r2, [r7, #4]
- 8002c08:	18d0      	adds	r0, r2, r3
- 8002c0a:	187b      	adds	r3, r7, r1
- 8002c0c:	781b      	ldrb	r3, [r3, #0]
- 8002c0e:	683a      	ldr	r2, [r7, #0]
- 8002c10:	1ad3      	subs	r3, r2, r3
- 8002c12:	220c      	movs	r2, #12
- 8002c14:	18ba      	adds	r2, r7, r2
- 8002c16:	0019      	movs	r1, r3
- 8002c18:	f7ff fd66 	bl	80026e8 <modbus_process_device_id_request>
- 8002c1c:	0003      	movs	r3, r0
- 8002c1e:	001a      	movs	r2, r3
- 8002c20:	2320      	movs	r3, #32
- 8002c22:	33ff      	adds	r3, #255	; 0xff
- 8002c24:	18fb      	adds	r3, r7, r3
- 8002c26:	701a      	strb	r2, [r3, #0]
- 8002c28:	e014      	b.n	8002c54 <modbus_slave_process_msg+0x164>
-	} else {
-		/* process other requests: input register read, holding register read/write */
-		request_processing_result = modbus_process_read_write_request(buffer + buffer_pos, len - buffer_pos, &transaction);
- 8002c2a:	218f      	movs	r1, #143	; 0x8f
- 8002c2c:	0049      	lsls	r1, r1, #1
- 8002c2e:	187b      	adds	r3, r7, r1
- 8002c30:	781b      	ldrb	r3, [r3, #0]
- 8002c32:	687a      	ldr	r2, [r7, #4]
- 8002c34:	18d0      	adds	r0, r2, r3
- 8002c36:	187b      	adds	r3, r7, r1
- 8002c38:	781b      	ldrb	r3, [r3, #0]
- 8002c3a:	683a      	ldr	r2, [r7, #0]
- 8002c3c:	1ad3      	subs	r3, r2, r3
- 8002c3e:	220c      	movs	r2, #12
- 8002c40:	18ba      	adds	r2, r7, r2
- 8002c42:	0019      	movs	r1, r3
- 8002c44:	f7ff fdca 	bl	80027dc <modbus_process_read_write_request>
- 8002c48:	0003      	movs	r3, r0
- 8002c4a:	001a      	movs	r2, r3
- 8002c4c:	2320      	movs	r3, #32
- 8002c4e:	33ff      	adds	r3, #255	; 0xff
- 8002c50:	18fb      	adds	r3, r7, r3
- 8002c52:	701a      	strb	r2, [r3, #0]
-	}
-	uint8_t msg_len;
-	/* reply only if request was processed successfully and message was not broadcast */
-	if (request_processing_result == MODBUS_OK && transaction.broadcast == 0) {
- 8002c54:	2320      	movs	r3, #32
- 8002c56:	33ff      	adds	r3, #255	; 0xff
- 8002c58:	18fb      	adds	r3, r7, r3
- 8002c5a:	781b      	ldrb	r3, [r3, #0]
- 8002c5c:	2b00      	cmp	r3, #0
- 8002c5e:	d11d      	bne.n	8002c9c <modbus_slave_process_msg+0x1ac>
- 8002c60:	4b11      	ldr	r3, [pc, #68]	; (8002ca8 <modbus_slave_process_msg+0x1b8>)
- 8002c62:	2290      	movs	r2, #144	; 0x90
- 8002c64:	0052      	lsls	r2, r2, #1
- 8002c66:	4694      	mov	ip, r2
- 8002c68:	44bc      	add	ip, r7
- 8002c6a:	4463      	add	r3, ip
- 8002c6c:	7a1b      	ldrb	r3, [r3, #8]
- 8002c6e:	2b00      	cmp	r3, #0
- 8002c70:	d114      	bne.n	8002c9c <modbus_slave_process_msg+0x1ac>
-		modbus_transaction_to_buffer(modbus_buffer, &msg_len, &transaction);
- 8002c72:	230c      	movs	r3, #12
- 8002c74:	18fa      	adds	r2, r7, r3
- 8002c76:	230b      	movs	r3, #11
- 8002c78:	18f9      	adds	r1, r7, r3
- 8002c7a:	4b0d      	ldr	r3, [pc, #52]	; (8002cb0 <modbus_slave_process_msg+0x1c0>)
- 8002c7c:	0018      	movs	r0, r3
- 8002c7e:	f7ff fbc7 	bl	8002410 <modbus_transaction_to_buffer>
-		/* send reply */
-		modbus_transmit_function(modbus_buffer, msg_len);
- 8002c82:	4b0c      	ldr	r3, [pc, #48]	; (8002cb4 <modbus_slave_process_msg+0x1c4>)
- 8002c84:	2290      	movs	r2, #144	; 0x90
- 8002c86:	0052      	lsls	r2, r2, #1
- 8002c88:	4694      	mov	ip, r2
- 8002c8a:	44bc      	add	ip, r7
- 8002c8c:	4463      	add	r3, ip
- 8002c8e:	781b      	ldrb	r3, [r3, #0]
- 8002c90:	b29a      	uxth	r2, r3
- 8002c92:	4b07      	ldr	r3, [pc, #28]	; (8002cb0 <modbus_slave_process_msg+0x1c0>)
- 8002c94:	0011      	movs	r1, r2
- 8002c96:	0018      	movs	r0, r3
- 8002c98:	f7ff fab8 	bl	800220c <modbus_transmit_function>
-	}
-	return MODBUS_OK;
- 8002c9c:	2300      	movs	r3, #0
-}
- 8002c9e:	0018      	movs	r0, r3
- 8002ca0:	46bd      	mov	sp, r7
- 8002ca2:	b049      	add	sp, #292	; 0x124
- 8002ca4:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 8002ca6:	46c0      	nop			; (mov r8, r8)
- 8002ca8:	fffffeec 	.word	0xfffffeec
- 8002cac:	20000000 	.word	0x20000000
- 8002cb0:	20000084 	.word	0x20000084
- 8002cb4:	fffffeeb 	.word	0xfffffeeb
-
-08002cb8 <modbus_slave_init_device_id>:
-
-int8_t modbus_slave_init_device_id(modbus_device_id_t *device_id)
-{
- 8002cb8:	b580      	push	{r7, lr}
- 8002cba:	b082      	sub	sp, #8
- 8002cbc:	af00      	add	r7, sp, #0
- 8002cbe:	6078      	str	r0, [r7, #4]
-	if (device_id == NULL) {
- 8002cc0:	687b      	ldr	r3, [r7, #4]
- 8002cc2:	2b00      	cmp	r3, #0
- 8002cc4:	d102      	bne.n	8002ccc <modbus_slave_init_device_id+0x14>
-		return MODBUS_ERROR;
- 8002cc6:	2301      	movs	r3, #1
- 8002cc8:	425b      	negs	r3, r3
- 8002cca:	e02d      	b.n	8002d28 <modbus_slave_init_device_id+0x70>
-	}
-	/* at least basic category objects have to be implemented */
-	if (	device_id->object_name.VendorName == NULL  ||
- 8002ccc:	687b      	ldr	r3, [r7, #4]
- 8002cce:	681b      	ldr	r3, [r3, #0]
- 8002cd0:	2b00      	cmp	r3, #0
- 8002cd2:	d007      	beq.n	8002ce4 <modbus_slave_init_device_id+0x2c>
-			device_id->object_name.ProductCode == NULL ||
- 8002cd4:	687b      	ldr	r3, [r7, #4]
- 8002cd6:	685b      	ldr	r3, [r3, #4]
-	if (	device_id->object_name.VendorName == NULL  ||
- 8002cd8:	2b00      	cmp	r3, #0
- 8002cda:	d003      	beq.n	8002ce4 <modbus_slave_init_device_id+0x2c>
-			device_id->object_name.MajorMinorRevision == NULL
- 8002cdc:	687b      	ldr	r3, [r7, #4]
- 8002cde:	689b      	ldr	r3, [r3, #8]
-			device_id->object_name.ProductCode == NULL ||
- 8002ce0:	2b00      	cmp	r3, #0
- 8002ce2:	d102      	bne.n	8002cea <modbus_slave_init_device_id+0x32>
-	) {
-		return MODBUS_ERROR;
- 8002ce4:	2301      	movs	r3, #1
- 8002ce6:	425b      	negs	r3, r3
- 8002ce8:	e01e      	b.n	8002d28 <modbus_slave_init_device_id+0x70>
-	}
-	/* set conformity level: currently only "basic" and "regular" is implemented */
-	if ( 	device_id->object_id[3] != NULL &&
- 8002cea:	687b      	ldr	r3, [r7, #4]
- 8002cec:	68db      	ldr	r3, [r3, #12]
- 8002cee:	2b00      	cmp	r3, #0
- 8002cf0:	d00b      	beq.n	8002d0a <modbus_slave_init_device_id+0x52>
-			device_id->object_id[4] != NULL &&
- 8002cf2:	687b      	ldr	r3, [r7, #4]
- 8002cf4:	691b      	ldr	r3, [r3, #16]
-	if ( 	device_id->object_id[3] != NULL &&
- 8002cf6:	2b00      	cmp	r3, #0
- 8002cf8:	d007      	beq.n	8002d0a <modbus_slave_init_device_id+0x52>
-			device_id->object_id[5] != NULL
- 8002cfa:	687b      	ldr	r3, [r7, #4]
- 8002cfc:	695b      	ldr	r3, [r3, #20]
-			device_id->object_id[4] != NULL &&
- 8002cfe:	2b00      	cmp	r3, #0
- 8002d00:	d003      	beq.n	8002d0a <modbus_slave_init_device_id+0x52>
-
-	) {
-		/* strings are present in regular category (optional) */
-		device_id->conformity_level = MODBUS_CONFORMITY_REGULAR;
- 8002d02:	687b      	ldr	r3, [r7, #4]
- 8002d04:	2202      	movs	r2, #2
- 8002d06:	771a      	strb	r2, [r3, #28]
- 8002d08:	e002      	b.n	8002d10 <modbus_slave_init_device_id+0x58>
-	} else {
-		device_id->conformity_level = MODBUS_CONFORMITY_BASIC;
- 8002d0a:	687b      	ldr	r3, [r7, #4]
- 8002d0c:	2201      	movs	r2, #1
- 8002d0e:	771a      	strb	r2, [r3, #28]
-	}
-	/* we support both stream and individual access to objects */
-	device_id->conformity_level |= MODBUS_DEVICE_ID_INDIVIDUAL_ACCESS_FLAG;
- 8002d10:	687b      	ldr	r3, [r7, #4]
- 8002d12:	7f1b      	ldrb	r3, [r3, #28]
- 8002d14:	2280      	movs	r2, #128	; 0x80
- 8002d16:	4252      	negs	r2, r2
- 8002d18:	4313      	orrs	r3, r2
- 8002d1a:	b2da      	uxtb	r2, r3
- 8002d1c:	687b      	ldr	r3, [r7, #4]
- 8002d1e:	771a      	strb	r2, [r3, #28]
-	modbus_device_id = device_id;
- 8002d20:	4b03      	ldr	r3, [pc, #12]	; (8002d30 <modbus_slave_init_device_id+0x78>)
- 8002d22:	687a      	ldr	r2, [r7, #4]
- 8002d24:	601a      	str	r2, [r3, #0]
-	return MODBUS_OK;
- 8002d26:	2300      	movs	r3, #0
-}
- 8002d28:	0018      	movs	r0, r3
- 8002d2a:	46bd      	mov	sp, r7
- 8002d2c:	b002      	add	sp, #8
- 8002d2e:	bd80      	pop	{r7, pc}
- 8002d30:	20000030 	.word	0x20000030
-
-08002d34 <sht4x_measure>:
-{
-	return SHT4X_OK;
-}
-
-int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity)
-{
- 8002d34:	b5f0      	push	{r4, r5, r6, r7, lr}
- 8002d36:	b093      	sub	sp, #76	; 0x4c
- 8002d38:	af00      	add	r7, sp, #0
- 8002d3a:	6078      	str	r0, [r7, #4]
- 8002d3c:	6039      	str	r1, [r7, #0]
-	uint8_t buffer[32];
-	int result;
-
-	/* disable interrupts to prevent modbus/i2c conflict */
-	// start measurement
-	buffer[0] = SHT4X_START_MEAS_HIGH_PRECISION;
- 8002d3e:	240c      	movs	r4, #12
- 8002d40:	193b      	adds	r3, r7, r4
- 8002d42:	22fd      	movs	r2, #253	; 0xfd
- 8002d44:	701a      	strb	r2, [r3, #0]
-	uart_disable_interrupts();
- 8002d46:	f7ff f8fd 	bl	8001f44 <uart_disable_interrupts>
-	result = i2c_transmit(SHT4X_I2C_ADDRESS<<1, buffer, 1);
- 8002d4a:	193b      	adds	r3, r7, r4
- 8002d4c:	2201      	movs	r2, #1
- 8002d4e:	0019      	movs	r1, r3
- 8002d50:	2088      	movs	r0, #136	; 0x88
- 8002d52:	f7fd fe05 	bl	8000960 <i2c_transmit>
- 8002d56:	0003      	movs	r3, r0
- 8002d58:	643b      	str	r3, [r7, #64]	; 0x40
-	uart_enable_interrupts();
- 8002d5a:	f7ff f907 	bl	8001f6c <uart_enable_interrupts>
-	if (result != I2C_OK) {
- 8002d5e:	6c3b      	ldr	r3, [r7, #64]	; 0x40
- 8002d60:	2b00      	cmp	r3, #0
- 8002d62:	d002      	beq.n	8002d6a <sht4x_measure+0x36>
-		return SHT4X_ERROR;
- 8002d64:	2301      	movs	r3, #1
- 8002d66:	425b      	negs	r3, r3
- 8002d68:	e086      	b.n	8002e78 <sht4x_measure+0x144>
-	}
-	LL_mDelay(10); /* 10 ms should be enough */
- 8002d6a:	200a      	movs	r0, #10
- 8002d6c:	f000 feb0 	bl	8003ad0 <LL_mDelay>
-	/* read out */
-	uart_disable_interrupts();
- 8002d70:	f7ff f8e8 	bl	8001f44 <uart_disable_interrupts>
-	result = i2c_receive(SHT4X_I2C_ADDRESS<<1, buffer, 6);
- 8002d74:	230c      	movs	r3, #12
- 8002d76:	18fb      	adds	r3, r7, r3
- 8002d78:	2206      	movs	r2, #6
- 8002d7a:	0019      	movs	r1, r3
- 8002d7c:	2088      	movs	r0, #136	; 0x88
- 8002d7e:	f7fd fe47 	bl	8000a10 <i2c_receive>
- 8002d82:	0003      	movs	r3, r0
- 8002d84:	643b      	str	r3, [r7, #64]	; 0x40
-	uart_enable_interrupts();
- 8002d86:	f7ff f8f1 	bl	8001f6c <uart_enable_interrupts>
-	if (result != I2C_OK) {
- 8002d8a:	6c3b      	ldr	r3, [r7, #64]	; 0x40
- 8002d8c:	2b00      	cmp	r3, #0
- 8002d8e:	d002      	beq.n	8002d96 <sht4x_measure+0x62>
-		return SHT4X_ERROR;
- 8002d90:	2301      	movs	r3, #1
- 8002d92:	425b      	negs	r3, r3
- 8002d94:	e070      	b.n	8002e78 <sht4x_measure+0x144>
-	}
-	/* Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3 */
-	uint32_t t_ticks = (buffer[0] << 8) + buffer[1];
- 8002d96:	240c      	movs	r4, #12
- 8002d98:	193b      	adds	r3, r7, r4
- 8002d9a:	781b      	ldrb	r3, [r3, #0]
- 8002d9c:	021b      	lsls	r3, r3, #8
- 8002d9e:	193a      	adds	r2, r7, r4
- 8002da0:	7852      	ldrb	r2, [r2, #1]
- 8002da2:	189b      	adds	r3, r3, r2
- 8002da4:	63fb      	str	r3, [r7, #60]	; 0x3c
-	uint8_t t_crc = buffer[2];
- 8002da6:	253b      	movs	r5, #59	; 0x3b
- 8002da8:	197b      	adds	r3, r7, r5
- 8002daa:	193a      	adds	r2, r7, r4
- 8002dac:	7892      	ldrb	r2, [r2, #2]
- 8002dae:	701a      	strb	r2, [r3, #0]
-	uint32_t rh_ticks = (buffer[3] << 8) + buffer[4];
- 8002db0:	193b      	adds	r3, r7, r4
- 8002db2:	78db      	ldrb	r3, [r3, #3]
- 8002db4:	021b      	lsls	r3, r3, #8
- 8002db6:	193a      	adds	r2, r7, r4
- 8002db8:	7912      	ldrb	r2, [r2, #4]
- 8002dba:	189b      	adds	r3, r3, r2
- 8002dbc:	637b      	str	r3, [r7, #52]	; 0x34
-	uint8_t rh_crc = buffer[5];
- 8002dbe:	2633      	movs	r6, #51	; 0x33
- 8002dc0:	19bb      	adds	r3, r7, r6
- 8002dc2:	193a      	adds	r2, r7, r4
- 8002dc4:	7952      	ldrb	r2, [r2, #5]
- 8002dc6:	701a      	strb	r2, [r3, #0]
-	/* check CRC-8 checksum */
-	uint8_t crc_correct = crc8_calculate(buffer, 2) == t_crc;
- 8002dc8:	193b      	adds	r3, r7, r4
- 8002dca:	2102      	movs	r1, #2
- 8002dcc:	0018      	movs	r0, r3
- 8002dce:	f7fd fcd1 	bl	8000774 <crc8_calculate>
- 8002dd2:	0003      	movs	r3, r0
- 8002dd4:	001a      	movs	r2, r3
- 8002dd6:	197b      	adds	r3, r7, r5
- 8002dd8:	781b      	ldrb	r3, [r3, #0]
- 8002dda:	1a9b      	subs	r3, r3, r2
- 8002ddc:	425a      	negs	r2, r3
- 8002dde:	4153      	adcs	r3, r2
- 8002de0:	b2da      	uxtb	r2, r3
- 8002de2:	2532      	movs	r5, #50	; 0x32
- 8002de4:	197b      	adds	r3, r7, r5
- 8002de6:	701a      	strb	r2, [r3, #0]
-	crc_correct &= crc8_calculate(buffer + 3, 2) == rh_crc;
- 8002de8:	193b      	adds	r3, r7, r4
- 8002dea:	3303      	adds	r3, #3
- 8002dec:	2102      	movs	r1, #2
- 8002dee:	0018      	movs	r0, r3
- 8002df0:	f7fd fcc0 	bl	8000774 <crc8_calculate>
- 8002df4:	0003      	movs	r3, r0
- 8002df6:	001a      	movs	r2, r3
- 8002df8:	19bb      	adds	r3, r7, r6
- 8002dfa:	781b      	ldrb	r3, [r3, #0]
- 8002dfc:	1a9b      	subs	r3, r3, r2
- 8002dfe:	425a      	negs	r2, r3
- 8002e00:	4153      	adcs	r3, r2
- 8002e02:	b2db      	uxtb	r3, r3
- 8002e04:	b25b      	sxtb	r3, r3
- 8002e06:	197a      	adds	r2, r7, r5
- 8002e08:	7812      	ldrb	r2, [r2, #0]
- 8002e0a:	b252      	sxtb	r2, r2
- 8002e0c:	4013      	ands	r3, r2
- 8002e0e:	b25a      	sxtb	r2, r3
- 8002e10:	197b      	adds	r3, r7, r5
- 8002e12:	701a      	strb	r2, [r3, #0]
-	if (!crc_correct) {
- 8002e14:	197b      	adds	r3, r7, r5
- 8002e16:	781b      	ldrb	r3, [r3, #0]
- 8002e18:	2b00      	cmp	r3, #0
- 8002e1a:	d102      	bne.n	8002e22 <sht4x_measure+0xee>
-		return SHT4X_CRC8_ERROR;
- 8002e1c:	2302      	movs	r3, #2
- 8002e1e:	425b      	negs	r3, r3
- 8002e20:	e02a      	b.n	8002e78 <sht4x_measure+0x144>
-	}
-	/* copy data to output variables */
-	int t_degC = -450 + 10 * 175 * t_ticks / 65535; /* temperature * 10 */
- 8002e22:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
- 8002e24:	4a16      	ldr	r2, [pc, #88]	; (8002e80 <sht4x_measure+0x14c>)
- 8002e26:	4353      	muls	r3, r2
- 8002e28:	4916      	ldr	r1, [pc, #88]	; (8002e84 <sht4x_measure+0x150>)
- 8002e2a:	0018      	movs	r0, r3
- 8002e2c:	f7fd f974 	bl	8000118 <__udivsi3>
- 8002e30:	0003      	movs	r3, r0
- 8002e32:	3bc3      	subs	r3, #195	; 0xc3
- 8002e34:	3bff      	subs	r3, #255	; 0xff
- 8002e36:	62fb      	str	r3, [r7, #44]	; 0x2c
-	int rh_pRH = -6 + 125 * rh_ticks / 65535;
- 8002e38:	6b7a      	ldr	r2, [r7, #52]	; 0x34
- 8002e3a:	0013      	movs	r3, r2
- 8002e3c:	015b      	lsls	r3, r3, #5
- 8002e3e:	1a9b      	subs	r3, r3, r2
- 8002e40:	009b      	lsls	r3, r3, #2
- 8002e42:	189b      	adds	r3, r3, r2
- 8002e44:	490f      	ldr	r1, [pc, #60]	; (8002e84 <sht4x_measure+0x150>)
- 8002e46:	0018      	movs	r0, r3
- 8002e48:	f7fd f966 	bl	8000118 <__udivsi3>
- 8002e4c:	0003      	movs	r3, r0
- 8002e4e:	3b06      	subs	r3, #6
- 8002e50:	647b      	str	r3, [r7, #68]	; 0x44
-	if (rh_pRH > 100) {
- 8002e52:	6c7b      	ldr	r3, [r7, #68]	; 0x44
- 8002e54:	2b64      	cmp	r3, #100	; 0x64
- 8002e56:	dd01      	ble.n	8002e5c <sht4x_measure+0x128>
-			rh_pRH = 100;
- 8002e58:	2364      	movs	r3, #100	; 0x64
- 8002e5a:	647b      	str	r3, [r7, #68]	; 0x44
-	}
-	if (rh_pRH < 0) {
- 8002e5c:	6c7b      	ldr	r3, [r7, #68]	; 0x44
- 8002e5e:	2b00      	cmp	r3, #0
- 8002e60:	da01      	bge.n	8002e66 <sht4x_measure+0x132>
-		rh_pRH = 0;
- 8002e62:	2300      	movs	r3, #0
- 8002e64:	647b      	str	r3, [r7, #68]	; 0x44
-	}
-	*temperature = t_degC;
- 8002e66:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 8002e68:	b21a      	sxth	r2, r3
- 8002e6a:	687b      	ldr	r3, [r7, #4]
- 8002e6c:	801a      	strh	r2, [r3, #0]
-	*relative_humidity = rh_pRH;
- 8002e6e:	6c7b      	ldr	r3, [r7, #68]	; 0x44
- 8002e70:	b29a      	uxth	r2, r3
- 8002e72:	683b      	ldr	r3, [r7, #0]
- 8002e74:	801a      	strh	r2, [r3, #0]
-
-	return SHT4X_OK;
- 8002e76:	2300      	movs	r3, #0
-}
- 8002e78:	0018      	movs	r0, r3
- 8002e7a:	46bd      	mov	sp, r7
- 8002e7c:	b013      	add	sp, #76	; 0x4c
- 8002e7e:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 8002e80:	000006d6 	.word	0x000006d6
- 8002e84:	0000ffff 	.word	0x0000ffff
-
-08002e88 <LL_TIM_ClearFlag_UPDATE>:
-{
- 8002e88:	b580      	push	{r7, lr}
- 8002e8a:	b082      	sub	sp, #8
- 8002e8c:	af00      	add	r7, sp, #0
- 8002e8e:	6078      	str	r0, [r7, #4]
+ 800218e:	b580      	push	{r7, lr}
+ 8002190:	b082      	sub	sp, #8
+ 8002192:	af00      	add	r7, sp, #0
+ 8002194:	6078      	str	r0, [r7, #4]
   WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
- 8002e90:	687b      	ldr	r3, [r7, #4]
- 8002e92:	2202      	movs	r2, #2
- 8002e94:	4252      	negs	r2, r2
- 8002e96:	611a      	str	r2, [r3, #16]
+ 8002196:	687b      	ldr	r3, [r7, #4]
+ 8002198:	2202      	movs	r2, #2
+ 800219a:	4252      	negs	r2, r2
+ 800219c:	611a      	str	r2, [r3, #16]
 }
- 8002e98:	46c0      	nop			; (mov r8, r8)
- 8002e9a:	46bd      	mov	sp, r7
- 8002e9c:	b002      	add	sp, #8
- 8002e9e:	bd80      	pop	{r7, pc}
+ 800219e:	46c0      	nop			; (mov r8, r8)
+ 80021a0:	46bd      	mov	sp, r7
+ 80021a2:	b002      	add	sp, #8
+ 80021a4:	bd80      	pop	{r7, pc}
 
-08002ea0 <LL_USART_IsActiveFlag_IDLE>:
+080021a6 <LL_USART_IsActiveFlag_IDLE>:
 {
- 8002ea0:	b580      	push	{r7, lr}
- 8002ea2:	b082      	sub	sp, #8
- 8002ea4:	af00      	add	r7, sp, #0
- 8002ea6:	6078      	str	r0, [r7, #4]
+ 80021a6:	b580      	push	{r7, lr}
+ 80021a8:	b082      	sub	sp, #8
+ 80021aa:	af00      	add	r7, sp, #0
+ 80021ac:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
- 8002ea8:	687b      	ldr	r3, [r7, #4]
- 8002eaa:	69db      	ldr	r3, [r3, #28]
- 8002eac:	2210      	movs	r2, #16
- 8002eae:	4013      	ands	r3, r2
- 8002eb0:	2b10      	cmp	r3, #16
- 8002eb2:	d101      	bne.n	8002eb8 <LL_USART_IsActiveFlag_IDLE+0x18>
- 8002eb4:	2301      	movs	r3, #1
- 8002eb6:	e000      	b.n	8002eba <LL_USART_IsActiveFlag_IDLE+0x1a>
- 8002eb8:	2300      	movs	r3, #0
+ 80021ae:	687b      	ldr	r3, [r7, #4]
+ 80021b0:	69db      	ldr	r3, [r3, #28]
+ 80021b2:	2210      	movs	r2, #16
+ 80021b4:	4013      	ands	r3, r2
+ 80021b6:	2b10      	cmp	r3, #16
+ 80021b8:	d101      	bne.n	80021be <LL_USART_IsActiveFlag_IDLE+0x18>
+ 80021ba:	2301      	movs	r3, #1
+ 80021bc:	e000      	b.n	80021c0 <LL_USART_IsActiveFlag_IDLE+0x1a>
+ 80021be:	2300      	movs	r3, #0
 }
- 8002eba:	0018      	movs	r0, r3
- 8002ebc:	46bd      	mov	sp, r7
- 8002ebe:	b002      	add	sp, #8
- 8002ec0:	bd80      	pop	{r7, pc}
+ 80021c0:	0018      	movs	r0, r3
+ 80021c2:	46bd      	mov	sp, r7
+ 80021c4:	b002      	add	sp, #8
+ 80021c6:	bd80      	pop	{r7, pc}
 
-08002ec2 <LL_USART_IsActiveFlag_RXNE>:
+080021c8 <LL_USART_IsActiveFlag_RXNE>:
 {
- 8002ec2:	b580      	push	{r7, lr}
- 8002ec4:	b082      	sub	sp, #8
- 8002ec6:	af00      	add	r7, sp, #0
- 8002ec8:	6078      	str	r0, [r7, #4]
+ 80021c8:	b580      	push	{r7, lr}
+ 80021ca:	b082      	sub	sp, #8
+ 80021cc:	af00      	add	r7, sp, #0
+ 80021ce:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL);
- 8002eca:	687b      	ldr	r3, [r7, #4]
- 8002ecc:	69db      	ldr	r3, [r3, #28]
- 8002ece:	2220      	movs	r2, #32
- 8002ed0:	4013      	ands	r3, r2
- 8002ed2:	2b20      	cmp	r3, #32
- 8002ed4:	d101      	bne.n	8002eda <LL_USART_IsActiveFlag_RXNE+0x18>
- 8002ed6:	2301      	movs	r3, #1
- 8002ed8:	e000      	b.n	8002edc <LL_USART_IsActiveFlag_RXNE+0x1a>
- 8002eda:	2300      	movs	r3, #0
+ 80021d0:	687b      	ldr	r3, [r7, #4]
+ 80021d2:	69db      	ldr	r3, [r3, #28]
+ 80021d4:	2220      	movs	r2, #32
+ 80021d6:	4013      	ands	r3, r2
+ 80021d8:	2b20      	cmp	r3, #32
+ 80021da:	d101      	bne.n	80021e0 <LL_USART_IsActiveFlag_RXNE+0x18>
+ 80021dc:	2301      	movs	r3, #1
+ 80021de:	e000      	b.n	80021e2 <LL_USART_IsActiveFlag_RXNE+0x1a>
+ 80021e0:	2300      	movs	r3, #0
 }
- 8002edc:	0018      	movs	r0, r3
- 8002ede:	46bd      	mov	sp, r7
- 8002ee0:	b002      	add	sp, #8
- 8002ee2:	bd80      	pop	{r7, pc}
+ 80021e2:	0018      	movs	r0, r3
+ 80021e4:	46bd      	mov	sp, r7
+ 80021e6:	b002      	add	sp, #8
+ 80021e8:	bd80      	pop	{r7, pc}
 
-08002ee4 <LL_USART_ClearFlag_IDLE>:
+080021ea <LL_USART_ClearFlag_IDLE>:
 {
- 8002ee4:	b580      	push	{r7, lr}
- 8002ee6:	b082      	sub	sp, #8
- 8002ee8:	af00      	add	r7, sp, #0
- 8002eea:	6078      	str	r0, [r7, #4]
+ 80021ea:	b580      	push	{r7, lr}
+ 80021ec:	b082      	sub	sp, #8
+ 80021ee:	af00      	add	r7, sp, #0
+ 80021f0:	6078      	str	r0, [r7, #4]
   WRITE_REG(USARTx->ICR, USART_ICR_IDLECF);
- 8002eec:	687b      	ldr	r3, [r7, #4]
- 8002eee:	2210      	movs	r2, #16
- 8002ef0:	621a      	str	r2, [r3, #32]
+ 80021f2:	687b      	ldr	r3, [r7, #4]
+ 80021f4:	2210      	movs	r2, #16
+ 80021f6:	621a      	str	r2, [r3, #32]
 }
- 8002ef2:	46c0      	nop			; (mov r8, r8)
- 8002ef4:	46bd      	mov	sp, r7
- 8002ef6:	b002      	add	sp, #8
- 8002ef8:	bd80      	pop	{r7, pc}
+ 80021f8:	46c0      	nop			; (mov r8, r8)
+ 80021fa:	46bd      	mov	sp, r7
+ 80021fc:	b002      	add	sp, #8
+ 80021fe:	bd80      	pop	{r7, pc}
 
-08002efa <LL_USART_IsEnabledIT_IDLE>:
+08002200 <LL_USART_IsEnabledIT_IDLE>:
 {
- 8002efa:	b580      	push	{r7, lr}
- 8002efc:	b082      	sub	sp, #8
- 8002efe:	af00      	add	r7, sp, #0
- 8002f00:	6078      	str	r0, [r7, #4]
+ 8002200:	b580      	push	{r7, lr}
+ 8002202:	b082      	sub	sp, #8
+ 8002204:	af00      	add	r7, sp, #0
+ 8002206:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
- 8002f02:	687b      	ldr	r3, [r7, #4]
- 8002f04:	681b      	ldr	r3, [r3, #0]
- 8002f06:	2210      	movs	r2, #16
- 8002f08:	4013      	ands	r3, r2
- 8002f0a:	2b10      	cmp	r3, #16
- 8002f0c:	d101      	bne.n	8002f12 <LL_USART_IsEnabledIT_IDLE+0x18>
- 8002f0e:	2301      	movs	r3, #1
- 8002f10:	e000      	b.n	8002f14 <LL_USART_IsEnabledIT_IDLE+0x1a>
- 8002f12:	2300      	movs	r3, #0
+ 8002208:	687b      	ldr	r3, [r7, #4]
+ 800220a:	681b      	ldr	r3, [r3, #0]
+ 800220c:	2210      	movs	r2, #16
+ 800220e:	4013      	ands	r3, r2
+ 8002210:	2b10      	cmp	r3, #16
+ 8002212:	d101      	bne.n	8002218 <LL_USART_IsEnabledIT_IDLE+0x18>
+ 8002214:	2301      	movs	r3, #1
+ 8002216:	e000      	b.n	800221a <LL_USART_IsEnabledIT_IDLE+0x1a>
+ 8002218:	2300      	movs	r3, #0
 }
- 8002f14:	0018      	movs	r0, r3
- 8002f16:	46bd      	mov	sp, r7
- 8002f18:	b002      	add	sp, #8
- 8002f1a:	bd80      	pop	{r7, pc}
+ 800221a:	0018      	movs	r0, r3
+ 800221c:	46bd      	mov	sp, r7
+ 800221e:	b002      	add	sp, #8
+ 8002220:	bd80      	pop	{r7, pc}
 
-08002f1c <LL_USART_IsEnabledIT_RXNE>:
+08002222 <LL_USART_IsEnabledIT_RXNE>:
 {
- 8002f1c:	b580      	push	{r7, lr}
- 8002f1e:	b082      	sub	sp, #8
- 8002f20:	af00      	add	r7, sp, #0
- 8002f22:	6078      	str	r0, [r7, #4]
+ 8002222:	b580      	push	{r7, lr}
+ 8002224:	b082      	sub	sp, #8
+ 8002226:	af00      	add	r7, sp, #0
+ 8002228:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U);
- 8002f24:	687b      	ldr	r3, [r7, #4]
- 8002f26:	681b      	ldr	r3, [r3, #0]
- 8002f28:	2220      	movs	r2, #32
- 8002f2a:	4013      	ands	r3, r2
- 8002f2c:	2b20      	cmp	r3, #32
- 8002f2e:	d101      	bne.n	8002f34 <LL_USART_IsEnabledIT_RXNE+0x18>
- 8002f30:	2301      	movs	r3, #1
- 8002f32:	e000      	b.n	8002f36 <LL_USART_IsEnabledIT_RXNE+0x1a>
- 8002f34:	2300      	movs	r3, #0
+ 800222a:	687b      	ldr	r3, [r7, #4]
+ 800222c:	681b      	ldr	r3, [r3, #0]
+ 800222e:	2220      	movs	r2, #32
+ 8002230:	4013      	ands	r3, r2
+ 8002232:	2b20      	cmp	r3, #32
+ 8002234:	d101      	bne.n	800223a <LL_USART_IsEnabledIT_RXNE+0x18>
+ 8002236:	2301      	movs	r3, #1
+ 8002238:	e000      	b.n	800223c <LL_USART_IsEnabledIT_RXNE+0x1a>
+ 800223a:	2300      	movs	r3, #0
 }
- 8002f36:	0018      	movs	r0, r3
- 8002f38:	46bd      	mov	sp, r7
- 8002f3a:	b002      	add	sp, #8
- 8002f3c:	bd80      	pop	{r7, pc}
+ 800223c:	0018      	movs	r0, r3
+ 800223e:	46bd      	mov	sp, r7
+ 8002240:	b002      	add	sp, #8
+ 8002242:	bd80      	pop	{r7, pc}
 
-08002f3e <LL_USART_ReceiveData9>:
+08002244 <LL_USART_ReceiveData9>:
 {
- 8002f3e:	b580      	push	{r7, lr}
- 8002f40:	b082      	sub	sp, #8
- 8002f42:	af00      	add	r7, sp, #0
- 8002f44:	6078      	str	r0, [r7, #4]
+ 8002244:	b580      	push	{r7, lr}
+ 8002246:	b082      	sub	sp, #8
+ 8002248:	af00      	add	r7, sp, #0
+ 800224a:	6078      	str	r0, [r7, #4]
   return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
- 8002f46:	687b      	ldr	r3, [r7, #4]
- 8002f48:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8002f4a:	b29b      	uxth	r3, r3
- 8002f4c:	05db      	lsls	r3, r3, #23
- 8002f4e:	0ddb      	lsrs	r3, r3, #23
- 8002f50:	b29b      	uxth	r3, r3
+ 800224c:	687b      	ldr	r3, [r7, #4]
+ 800224e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002250:	b29b      	uxth	r3, r3
+ 8002252:	05db      	lsls	r3, r3, #23
+ 8002254:	0ddb      	lsrs	r3, r3, #23
+ 8002256:	b29b      	uxth	r3, r3
 }
- 8002f52:	0018      	movs	r0, r3
- 8002f54:	46bd      	mov	sp, r7
- 8002f56:	b002      	add	sp, #8
- 8002f58:	bd80      	pop	{r7, pc}
+ 8002258:	0018      	movs	r0, r3
+ 800225a:	46bd      	mov	sp, r7
+ 800225c:	b002      	add	sp, #8
+ 800225e:	bd80      	pop	{r7, pc}
 
-08002f5a <NMI_Handler>:
+08002260 <NMI_Handler>:
 /******************************************************************************/
 /**
   * @brief This function handles Non maskable Interrupt.
   */
 void NMI_Handler(void)
 {
- 8002f5a:	b580      	push	{r7, lr}
- 8002f5c:	af00      	add	r7, sp, #0
+ 8002260:	b580      	push	{r7, lr}
+ 8002262:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   while (1)
- 8002f5e:	e7fe      	b.n	8002f5e <NMI_Handler+0x4>
+ 8002264:	e7fe      	b.n	8002264 <NMI_Handler+0x4>
 
-08002f60 <HardFault_Handler>:
+08002266 <HardFault_Handler>:
 
 /**
   * @brief This function handles Hard fault interrupt.
   */
 void HardFault_Handler(void)
 {
- 8002f60:	b580      	push	{r7, lr}
- 8002f62:	af00      	add	r7, sp, #0
+ 8002266:	b580      	push	{r7, lr}
+ 8002268:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
- 8002f64:	e7fe      	b.n	8002f64 <HardFault_Handler+0x4>
+ 800226a:	e7fe      	b.n	800226a <HardFault_Handler+0x4>
 
-08002f66 <SVC_Handler>:
+0800226c <SVC_Handler>:
 
 /**
   * @brief This function handles System service call via SWI instruction.
   */
 void SVC_Handler(void)
 {
- 8002f66:	b580      	push	{r7, lr}
- 8002f68:	af00      	add	r7, sp, #0
+ 800226c:	b580      	push	{r7, lr}
+ 800226e:	af00      	add	r7, sp, #0
 
   /* USER CODE END SVC_IRQn 0 */
   /* USER CODE BEGIN SVC_IRQn 1 */
 
   /* USER CODE END SVC_IRQn 1 */
 }
- 8002f6a:	46c0      	nop			; (mov r8, r8)
- 8002f6c:	46bd      	mov	sp, r7
- 8002f6e:	bd80      	pop	{r7, pc}
+ 8002270:	46c0      	nop			; (mov r8, r8)
+ 8002272:	46bd      	mov	sp, r7
+ 8002274:	bd80      	pop	{r7, pc}
 
-08002f70 <PendSV_Handler>:
+08002276 <PendSV_Handler>:
 
 /**
   * @brief This function handles Pendable request for system service.
   */
 void PendSV_Handler(void)
 {
- 8002f70:	b580      	push	{r7, lr}
- 8002f72:	af00      	add	r7, sp, #0
+ 8002276:	b580      	push	{r7, lr}
+ 8002278:	af00      	add	r7, sp, #0
 
   /* USER CODE END PendSV_IRQn 0 */
   /* USER CODE BEGIN PendSV_IRQn 1 */
 
   /* USER CODE END PendSV_IRQn 1 */
 }
- 8002f74:	46c0      	nop			; (mov r8, r8)
- 8002f76:	46bd      	mov	sp, r7
- 8002f78:	bd80      	pop	{r7, pc}
+ 800227a:	46c0      	nop			; (mov r8, r8)
+ 800227c:	46bd      	mov	sp, r7
+ 800227e:	bd80      	pop	{r7, pc}
 
-08002f7a <SysTick_Handler>:
+08002280 <SysTick_Handler>:
 
 /**
   * @brief This function handles System tick timer.
   */
 void SysTick_Handler(void)
 {
- 8002f7a:	b580      	push	{r7, lr}
- 8002f7c:	af00      	add	r7, sp, #0
+ 8002280:	b580      	push	{r7, lr}
+ 8002282:	af00      	add	r7, sp, #0
 
   /* USER CODE END SysTick_IRQn 0 */
 
   /* USER CODE BEGIN SysTick_IRQn 1 */
   /* USER CODE END SysTick_IRQn 1 */
 }
- 8002f7e:	46c0      	nop			; (mov r8, r8)
- 8002f80:	46bd      	mov	sp, r7
- 8002f82:	bd80      	pop	{r7, pc}
+ 8002284:	46c0      	nop			; (mov r8, r8)
+ 8002286:	46bd      	mov	sp, r7
+ 8002288:	bd80      	pop	{r7, pc}
+	...
 
-08002f84 <TIM21_IRQHandler>:
+0800228c <TIM21_IRQHandler>:
 
 /**
   * @brief This function handles TIM21 global interrupt.
   */
 void TIM21_IRQHandler(void)
 {
- 8002f84:	b580      	push	{r7, lr}
- 8002f86:	af00      	add	r7, sp, #0
+ 800228c:	b580      	push	{r7, lr}
+ 800228e:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN TIM21_IRQn 0 */
 	LL_TIM_ClearFlag_UPDATE(TIM21);
- 8002f88:	4b04      	ldr	r3, [pc, #16]	; (8002f9c <TIM21_IRQHandler+0x18>)
- 8002f8a:	0018      	movs	r0, r3
- 8002f8c:	f7ff ff7c 	bl	8002e88 <LL_TIM_ClearFlag_UPDATE>
+ 8002290:	4b04      	ldr	r3, [pc, #16]	; (80022a4 <TIM21_IRQHandler+0x18>)
+ 8002292:	0018      	movs	r0, r3
+ 8002294:	f7ff ff7b 	bl	800218e <LL_TIM_ClearFlag_UPDATE>
 	tim21_elapsed_period = 1;
- 8002f90:	4b03      	ldr	r3, [pc, #12]	; (8002fa0 <TIM21_IRQHandler+0x1c>)
- 8002f92:	2201      	movs	r2, #1
- 8002f94:	701a      	strb	r2, [r3, #0]
+ 8002298:	4b03      	ldr	r3, [pc, #12]	; (80022a8 <TIM21_IRQHandler+0x1c>)
+ 800229a:	2201      	movs	r2, #1
+ 800229c:	701a      	strb	r2, [r3, #0]
   /* USER CODE END TIM21_IRQn 0 */
   /* USER CODE BEGIN TIM21_IRQn 1 */
 
   /* USER CODE END TIM21_IRQn 1 */
 }
- 8002f96:	46c0      	nop			; (mov r8, r8)
- 8002f98:	46bd      	mov	sp, r7
- 8002f9a:	bd80      	pop	{r7, pc}
- 8002f9c:	40010800 	.word	0x40010800
- 8002fa0:	2000003a 	.word	0x2000003a
+ 800229e:	46c0      	nop			; (mov r8, r8)
+ 80022a0:	46bd      	mov	sp, r7
+ 80022a2:	bd80      	pop	{r7, pc}
+ 80022a4:	40010800 	.word	0x40010800
+ 80022a8:	20000036 	.word	0x20000036
 
-08002fa4 <USART2_IRQHandler>:
+080022ac <USART2_IRQHandler>:
 
 /**
   * @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI line 26.
   */
 void USART2_IRQHandler(void)
 {
- 8002fa4:	b580      	push	{r7, lr}
- 8002fa6:	af00      	add	r7, sp, #0
+ 80022ac:	b580      	push	{r7, lr}
+ 80022ae:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN USART2_IRQn 0 */
     /* Check RXNE flag value in SR register */
 	if(LL_USART_IsActiveFlag_RXNE(USART2) && LL_USART_IsEnabledIT_RXNE(USART2))
- 8002fa8:	4b19      	ldr	r3, [pc, #100]	; (8003010 <USART2_IRQHandler+0x6c>)
- 8002faa:	0018      	movs	r0, r3
- 8002fac:	f7ff ff89 	bl	8002ec2 <LL_USART_IsActiveFlag_RXNE>
- 8002fb0:	1e03      	subs	r3, r0, #0
- 8002fb2:	d007      	beq.n	8002fc4 <USART2_IRQHandler+0x20>
- 8002fb4:	4b16      	ldr	r3, [pc, #88]	; (8003010 <USART2_IRQHandler+0x6c>)
- 8002fb6:	0018      	movs	r0, r3
- 8002fb8:	f7ff ffb0 	bl	8002f1c <LL_USART_IsEnabledIT_RXNE>
- 8002fbc:	1e03      	subs	r3, r0, #0
- 8002fbe:	d001      	beq.n	8002fc4 <USART2_IRQHandler+0x20>
+ 80022b0:	4b19      	ldr	r3, [pc, #100]	; (8002318 <USART2_IRQHandler+0x6c>)
+ 80022b2:	0018      	movs	r0, r3
+ 80022b4:	f7ff ff88 	bl	80021c8 <LL_USART_IsActiveFlag_RXNE>
+ 80022b8:	1e03      	subs	r3, r0, #0
+ 80022ba:	d007      	beq.n	80022cc <USART2_IRQHandler+0x20>
+ 80022bc:	4b16      	ldr	r3, [pc, #88]	; (8002318 <USART2_IRQHandler+0x6c>)
+ 80022be:	0018      	movs	r0, r3
+ 80022c0:	f7ff ffaf 	bl	8002222 <LL_USART_IsEnabledIT_RXNE>
+ 80022c4:	1e03      	subs	r3, r0, #0
+ 80022c6:	d001      	beq.n	80022cc <USART2_IRQHandler+0x20>
 	{
 		/* RXNE flag will be cleared by reading of DR register (done in call) */
 		/* Call function in charge of handling Character reception */
 		USART2_CharReception_Callback();
- 8002fc0:	f000 f830 	bl	8003024 <USART2_CharReception_Callback>
+ 80022c8:	f000 f830 	bl	800232c <USART2_CharReception_Callback>
 	}
   /* USER CODE END USART2_IRQn 0 */
   /* USER CODE BEGIN USART2_IRQn 1 */
 	/* If the IDLE flag is active */
 	if (LL_USART_IsActiveFlag_IDLE(USART2) && LL_USART_IsEnabledIT_IDLE(USART2))
- 8002fc4:	4b12      	ldr	r3, [pc, #72]	; (8003010 <USART2_IRQHandler+0x6c>)
- 8002fc6:	0018      	movs	r0, r3
- 8002fc8:	f7ff ff6a 	bl	8002ea0 <LL_USART_IsActiveFlag_IDLE>
- 8002fcc:	1e03      	subs	r3, r0, #0
- 8002fce:	d01c      	beq.n	800300a <USART2_IRQHandler+0x66>
- 8002fd0:	4b0f      	ldr	r3, [pc, #60]	; (8003010 <USART2_IRQHandler+0x6c>)
- 8002fd2:	0018      	movs	r0, r3
- 8002fd4:	f7ff ff91 	bl	8002efa <LL_USART_IsEnabledIT_IDLE>
- 8002fd8:	1e03      	subs	r3, r0, #0
- 8002fda:	d016      	beq.n	800300a <USART2_IRQHandler+0x66>
+ 80022cc:	4b12      	ldr	r3, [pc, #72]	; (8002318 <USART2_IRQHandler+0x6c>)
+ 80022ce:	0018      	movs	r0, r3
+ 80022d0:	f7ff ff69 	bl	80021a6 <LL_USART_IsActiveFlag_IDLE>
+ 80022d4:	1e03      	subs	r3, r0, #0
+ 80022d6:	d01c      	beq.n	8002312 <USART2_IRQHandler+0x66>
+ 80022d8:	4b0f      	ldr	r3, [pc, #60]	; (8002318 <USART2_IRQHandler+0x6c>)
+ 80022da:	0018      	movs	r0, r3
+ 80022dc:	f7ff ff90 	bl	8002200 <LL_USART_IsEnabledIT_IDLE>
+ 80022e0:	1e03      	subs	r3, r0, #0
+ 80022e2:	d016      	beq.n	8002312 <USART2_IRQHandler+0x66>
 	{
 		/* Clear the IDLE flag */
 		LL_USART_ClearFlag_IDLE(USART2);
- 8002fdc:	4b0c      	ldr	r3, [pc, #48]	; (8003010 <USART2_IRQHandler+0x6c>)
- 8002fde:	0018      	movs	r0, r3
- 8002fe0:	f7ff ff80 	bl	8002ee4 <LL_USART_ClearFlag_IDLE>
+ 80022e4:	4b0c      	ldr	r3, [pc, #48]	; (8002318 <USART2_IRQHandler+0x6c>)
+ 80022e6:	0018      	movs	r0, r3
+ 80022e8:	f7ff ff7f 	bl	80021ea <LL_USART_ClearFlag_IDLE>
 
 		/* Reset the buffer index */
 		usart2_rx_message_len = usart2_rx_message_index;
- 8002fe4:	4b0b      	ldr	r3, [pc, #44]	; (8003014 <USART2_IRQHandler+0x70>)
- 8002fe6:	881a      	ldrh	r2, [r3, #0]
- 8002fe8:	4b0b      	ldr	r3, [pc, #44]	; (8003018 <USART2_IRQHandler+0x74>)
- 8002fea:	801a      	strh	r2, [r3, #0]
+ 80022ec:	4b0b      	ldr	r3, [pc, #44]	; (800231c <USART2_IRQHandler+0x70>)
+ 80022ee:	881a      	ldrh	r2, [r3, #0]
+ 80022f0:	4b0b      	ldr	r3, [pc, #44]	; (8002320 <USART2_IRQHandler+0x74>)
+ 80022f2:	801a      	strh	r2, [r3, #0]
 		usart2_rx_message_index = 0;
- 8002fec:	4b09      	ldr	r3, [pc, #36]	; (8003014 <USART2_IRQHandler+0x70>)
- 8002fee:	2200      	movs	r2, #0
- 8002ff0:	801a      	strh	r2, [r3, #0]
+ 80022f4:	4b09      	ldr	r3, [pc, #36]	; (800231c <USART2_IRQHandler+0x70>)
+ 80022f6:	2200      	movs	r2, #0
+ 80022f8:	801a      	strh	r2, [r3, #0]
 		usart2_rx_done = 1;
- 8002ff2:	4b0a      	ldr	r3, [pc, #40]	; (800301c <USART2_IRQHandler+0x78>)
- 8002ff4:	2201      	movs	r2, #1
- 8002ff6:	701a      	strb	r2, [r3, #0]
+ 80022fa:	4b0a      	ldr	r3, [pc, #40]	; (8002324 <USART2_IRQHandler+0x78>)
+ 80022fc:	2201      	movs	r2, #1
+ 80022fe:	701a      	strb	r2, [r3, #0]
 		if (usart2_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE)
- 8002ff8:	4b07      	ldr	r3, [pc, #28]	; (8003018 <USART2_IRQHandler+0x74>)
- 8002ffa:	881a      	ldrh	r2, [r3, #0]
- 8002ffc:	2380      	movs	r3, #128	; 0x80
- 8002ffe:	005b      	lsls	r3, r3, #1
- 8003000:	429a      	cmp	r2, r3
- 8003002:	d902      	bls.n	800300a <USART2_IRQHandler+0x66>
+ 8002300:	4b07      	ldr	r3, [pc, #28]	; (8002320 <USART2_IRQHandler+0x74>)
+ 8002302:	881a      	ldrh	r2, [r3, #0]
+ 8002304:	2380      	movs	r3, #128	; 0x80
+ 8002306:	005b      	lsls	r3, r3, #1
+ 8002308:	429a      	cmp	r2, r3
+ 800230a:	d902      	bls.n	8002312 <USART2_IRQHandler+0x66>
 		{
 			usart2_rx_message_too_long = 1;
- 8003004:	4b06      	ldr	r3, [pc, #24]	; (8003020 <USART2_IRQHandler+0x7c>)
- 8003006:	2201      	movs	r2, #1
- 8003008:	701a      	strb	r2, [r3, #0]
+ 800230c:	4b06      	ldr	r3, [pc, #24]	; (8002328 <USART2_IRQHandler+0x7c>)
+ 800230e:	2201      	movs	r2, #1
+ 8002310:	701a      	strb	r2, [r3, #0]
 		}
 	}
   /* USER CODE END USART2_IRQn 1 */
 }
- 800300a:	46c0      	nop			; (mov r8, r8)
- 800300c:	46bd      	mov	sp, r7
- 800300e:	bd80      	pop	{r7, pc}
- 8003010:	40004400 	.word	0x40004400
- 8003014:	20000034 	.word	0x20000034
- 8003018:	20000036 	.word	0x20000036
- 800301c:	20000038 	.word	0x20000038
- 8003020:	20000039 	.word	0x20000039
+ 8002312:	46c0      	nop			; (mov r8, r8)
+ 8002314:	46bd      	mov	sp, r7
+ 8002316:	bd80      	pop	{r7, pc}
+ 8002318:	40004400 	.word	0x40004400
+ 800231c:	20000030 	.word	0x20000030
+ 8002320:	20000032 	.word	0x20000032
+ 8002324:	20000034 	.word	0x20000034
+ 8002328:	20000035 	.word	0x20000035
 
-08003024 <USART2_CharReception_Callback>:
+0800232c <USART2_CharReception_Callback>:
 
 /* USER CODE BEGIN 1 */
 void USART2_CharReception_Callback( void )
 {
- 8003024:	b590      	push	{r4, r7, lr}
- 8003026:	b083      	sub	sp, #12
- 8003028:	af00      	add	r7, sp, #0
+ 800232c:	b590      	push	{r4, r7, lr}
+ 800232e:	b083      	sub	sp, #12
+ 8002330:	af00      	add	r7, sp, #0
 	uint16_t usart2_rx_bit = LL_USART_ReceiveData9(USART2);
- 800302a:	1dbc      	adds	r4, r7, #6
- 800302c:	4b0d      	ldr	r3, [pc, #52]	; (8003064 <USART2_CharReception_Callback+0x40>)
- 800302e:	0018      	movs	r0, r3
- 8003030:	f7ff ff85 	bl	8002f3e <LL_USART_ReceiveData9>
- 8003034:	0003      	movs	r3, r0
- 8003036:	8023      	strh	r3, [r4, #0]
+ 8002332:	1dbc      	adds	r4, r7, #6
+ 8002334:	4b0d      	ldr	r3, [pc, #52]	; (800236c <USART2_CharReception_Callback+0x40>)
+ 8002336:	0018      	movs	r0, r3
+ 8002338:	f7ff ff84 	bl	8002244 <LL_USART_ReceiveData9>
+ 800233c:	0003      	movs	r3, r0
+ 800233e:	8023      	strh	r3, [r4, #0]
 	if (usart2_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE)
- 8003038:	4b0b      	ldr	r3, [pc, #44]	; (8003068 <USART2_CharReception_Callback+0x44>)
- 800303a:	881b      	ldrh	r3, [r3, #0]
- 800303c:	2bff      	cmp	r3, #255	; 0xff
- 800303e:	d807      	bhi.n	8003050 <USART2_CharReception_Callback+0x2c>
+ 8002340:	4b0b      	ldr	r3, [pc, #44]	; (8002370 <USART2_CharReception_Callback+0x44>)
+ 8002342:	881b      	ldrh	r3, [r3, #0]
+ 8002344:	2bff      	cmp	r3, #255	; 0xff
+ 8002346:	d807      	bhi.n	8002358 <USART2_CharReception_Callback+0x2c>
 	{
 		modbus_buffer[usart2_rx_message_index] = (uint8_t)usart2_rx_bit;
- 8003040:	4b09      	ldr	r3, [pc, #36]	; (8003068 <USART2_CharReception_Callback+0x44>)
- 8003042:	881b      	ldrh	r3, [r3, #0]
- 8003044:	001a      	movs	r2, r3
- 8003046:	1dbb      	adds	r3, r7, #6
- 8003048:	881b      	ldrh	r3, [r3, #0]
- 800304a:	b2d9      	uxtb	r1, r3
- 800304c:	4b07      	ldr	r3, [pc, #28]	; (800306c <USART2_CharReception_Callback+0x48>)
- 800304e:	5499      	strb	r1, [r3, r2]
+ 8002348:	4b09      	ldr	r3, [pc, #36]	; (8002370 <USART2_CharReception_Callback+0x44>)
+ 800234a:	881b      	ldrh	r3, [r3, #0]
+ 800234c:	001a      	movs	r2, r3
+ 800234e:	1dbb      	adds	r3, r7, #6
+ 8002350:	881b      	ldrh	r3, [r3, #0]
+ 8002352:	b2d9      	uxtb	r1, r3
+ 8002354:	4b07      	ldr	r3, [pc, #28]	; (8002374 <USART2_CharReception_Callback+0x48>)
+ 8002356:	5499      	strb	r1, [r3, r2]
 	}
     usart2_rx_message_index++;
- 8003050:	4b05      	ldr	r3, [pc, #20]	; (8003068 <USART2_CharReception_Callback+0x44>)
- 8003052:	881b      	ldrh	r3, [r3, #0]
- 8003054:	3301      	adds	r3, #1
- 8003056:	b29a      	uxth	r2, r3
- 8003058:	4b03      	ldr	r3, [pc, #12]	; (8003068 <USART2_CharReception_Callback+0x44>)
- 800305a:	801a      	strh	r2, [r3, #0]
+ 8002358:	4b05      	ldr	r3, [pc, #20]	; (8002370 <USART2_CharReception_Callback+0x44>)
+ 800235a:	881b      	ldrh	r3, [r3, #0]
+ 800235c:	3301      	adds	r3, #1
+ 800235e:	b29a      	uxth	r2, r3
+ 8002360:	4b03      	ldr	r3, [pc, #12]	; (8002370 <USART2_CharReception_Callback+0x44>)
+ 8002362:	801a      	strh	r2, [r3, #0]
 }
- 800305c:	46c0      	nop			; (mov r8, r8)
- 800305e:	46bd      	mov	sp, r7
- 8003060:	b003      	add	sp, #12
- 8003062:	bd90      	pop	{r4, r7, pc}
- 8003064:	40004400 	.word	0x40004400
- 8003068:	20000034 	.word	0x20000034
- 800306c:	20000084 	.word	0x20000084
+ 8002364:	46c0      	nop			; (mov r8, r8)
+ 8002366:	46bd      	mov	sp, r7
+ 8002368:	b003      	add	sp, #12
+ 800236a:	bd90      	pop	{r4, r7, pc}
+ 800236c:	40004400 	.word	0x40004400
+ 8002370:	20000030 	.word	0x20000030
+ 8002374:	2000007c 	.word	0x2000007c
 
-08003070 <SystemInit>:
+08002378 <SystemInit>:
   * @brief  Setup the microcontroller system.
   * @param  None
   * @retval None
   */
 void SystemInit (void)
 {
- 8003070:	b580      	push	{r7, lr}
- 8003072:	af00      	add	r7, sp, #0
+ 8002378:	b580      	push	{r7, lr}
+ 800237a:	af00      	add	r7, sp, #0
   /* Configure the Vector Table location add offset address ------------------*/
 #if defined (USER_VECT_TAB_ADDRESS)
   SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #endif /* USER_VECT_TAB_ADDRESS */
 }
- 8003074:	46c0      	nop			; (mov r8, r8)
- 8003076:	46bd      	mov	sp, r7
- 8003078:	bd80      	pop	{r7, pc}
+ 800237c:	46c0      	nop			; (mov r8, r8)
+ 800237e:	46bd      	mov	sp, r7
+ 8002380:	bd80      	pop	{r7, pc}
 	...
 
-0800307c <Reset_Handler>:
+08002384 <Reset_Handler>:
 
     .section  .text.Reset_Handler
   .weak  Reset_Handler
   .type  Reset_Handler, %function
 Reset_Handler:  
    ldr   r0, =_estack
- 800307c:	480d      	ldr	r0, [pc, #52]	; (80030b4 <LoopForever+0x2>)
+ 8002384:	480d      	ldr	r0, [pc, #52]	; (80023bc <LoopForever+0x2>)
    mov   sp, r0          /* set stack pointer */
- 800307e:	4685      	mov	sp, r0
+ 8002386:	4685      	mov	sp, r0
 
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
- 8003080:	480d      	ldr	r0, [pc, #52]	; (80030b8 <LoopForever+0x6>)
+ 8002388:	480d      	ldr	r0, [pc, #52]	; (80023c0 <LoopForever+0x6>)
   ldr r1, =_edata
- 8003082:	490e      	ldr	r1, [pc, #56]	; (80030bc <LoopForever+0xa>)
+ 800238a:	490e      	ldr	r1, [pc, #56]	; (80023c4 <LoopForever+0xa>)
   ldr r2, =_sidata
- 8003084:	4a0e      	ldr	r2, [pc, #56]	; (80030c0 <LoopForever+0xe>)
+ 800238c:	4a0e      	ldr	r2, [pc, #56]	; (80023c8 <LoopForever+0xe>)
   movs r3, #0
- 8003086:	2300      	movs	r3, #0
+ 800238e:	2300      	movs	r3, #0
   b LoopCopyDataInit
- 8003088:	e002      	b.n	8003090 <LoopCopyDataInit>
+ 8002390:	e002      	b.n	8002398 <LoopCopyDataInit>
 
-0800308a <CopyDataInit>:
+08002392 <CopyDataInit>:
 
 CopyDataInit:
   ldr r4, [r2, r3]
- 800308a:	58d4      	ldr	r4, [r2, r3]
+ 8002392:	58d4      	ldr	r4, [r2, r3]
   str r4, [r0, r3]
- 800308c:	50c4      	str	r4, [r0, r3]
+ 8002394:	50c4      	str	r4, [r0, r3]
   adds r3, r3, #4
- 800308e:	3304      	adds	r3, #4
+ 8002396:	3304      	adds	r3, #4
 
-08003090 <LoopCopyDataInit>:
+08002398 <LoopCopyDataInit>:
 
 LoopCopyDataInit:
   adds r4, r0, r3
- 8003090:	18c4      	adds	r4, r0, r3
+ 8002398:	18c4      	adds	r4, r0, r3
   cmp r4, r1
- 8003092:	428c      	cmp	r4, r1
+ 800239a:	428c      	cmp	r4, r1
   bcc CopyDataInit
- 8003094:	d3f9      	bcc.n	800308a <CopyDataInit>
+ 800239c:	d3f9      	bcc.n	8002392 <CopyDataInit>
   
 /* Zero fill the bss segment. */
   ldr r2, =_sbss
- 8003096:	4a0b      	ldr	r2, [pc, #44]	; (80030c4 <LoopForever+0x12>)
+ 800239e:	4a0b      	ldr	r2, [pc, #44]	; (80023cc <LoopForever+0x12>)
   ldr r4, =_ebss
- 8003098:	4c0b      	ldr	r4, [pc, #44]	; (80030c8 <LoopForever+0x16>)
+ 80023a0:	4c0b      	ldr	r4, [pc, #44]	; (80023d0 <LoopForever+0x16>)
   movs r3, #0
- 800309a:	2300      	movs	r3, #0
+ 80023a2:	2300      	movs	r3, #0
   b LoopFillZerobss
- 800309c:	e001      	b.n	80030a2 <LoopFillZerobss>
+ 80023a4:	e001      	b.n	80023aa <LoopFillZerobss>
 
-0800309e <FillZerobss>:
+080023a6 <FillZerobss>:
 
 FillZerobss:
   str  r3, [r2]
- 800309e:	6013      	str	r3, [r2, #0]
+ 80023a6:	6013      	str	r3, [r2, #0]
   adds r2, r2, #4
- 80030a0:	3204      	adds	r2, #4
+ 80023a8:	3204      	adds	r2, #4
 
-080030a2 <LoopFillZerobss>:
+080023aa <LoopFillZerobss>:
 
 LoopFillZerobss:
   cmp r2, r4
- 80030a2:	42a2      	cmp	r2, r4
+ 80023aa:	42a2      	cmp	r2, r4
   bcc FillZerobss
- 80030a4:	d3fb      	bcc.n	800309e <FillZerobss>
+ 80023ac:	d3fb      	bcc.n	80023a6 <FillZerobss>
 
 /* Call the clock system intitialization function.*/
   bl  SystemInit
- 80030a6:	f7ff ffe3 	bl	8003070 <SystemInit>
+ 80023ae:	f7ff ffe3 	bl	8002378 <SystemInit>
 /* Call static constructors */
     bl __libc_init_array
- 80030aa:	f000 fd41 	bl	8003b30 <__libc_init_array>
+ 80023b2:	f001 fd85 	bl	8003ec0 <__libc_init_array>
 /* Call the application's entry point.*/
   bl  main
- 80030ae:	f7fe fb91 	bl	80017d4 <main>
+ 80023b6:	f7ff f83b 	bl	8001430 <main>
 
-080030b2 <LoopForever>:
+080023ba <LoopForever>:
 
 LoopForever:
     b LoopForever
- 80030b2:	e7fe      	b.n	80030b2 <LoopForever>
+ 80023ba:	e7fe      	b.n	80023ba <LoopForever>
    ldr   r0, =_estack
- 80030b4:	20002000 	.word	0x20002000
+ 80023bc:	20002000 	.word	0x20002000
   ldr r0, =_sdata
- 80030b8:	20000000 	.word	0x20000000
+ 80023c0:	20000000 	.word	0x20000000
   ldr r1, =_edata
- 80030bc:	20000008 	.word	0x20000008
+ 80023c4:	20000008 	.word	0x20000008
   ldr r2, =_sidata
- 80030c0:	08003cc4 	.word	0x08003cc4
+ 80023c8:	080040a8 	.word	0x080040a8
   ldr r2, =_sbss
- 80030c4:	20000008 	.word	0x20000008
+ 80023cc:	20000008 	.word	0x20000008
   ldr r4, =_ebss
- 80030c8:	20000184 	.word	0x20000184
+ 80023d0:	2000017c 	.word	0x2000017c
 
-080030cc <ADC1_COMP_IRQHandler>:
+080023d4 <ADC1_COMP_IRQHandler>:
  * @retval : None
 */
     .section  .text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
   b  Infinite_Loop
- 80030cc:	e7fe      	b.n	80030cc <ADC1_COMP_IRQHandler>
+ 80023d4:	e7fe      	b.n	80023d4 <ADC1_COMP_IRQHandler>
 
-080030ce <LL_GPIO_SetPinMode>:
+080023d6 <LL_GPIO_SetPinMode>:
   *         @arg @ref LL_GPIO_MODE_ALTERNATE
   *         @arg @ref LL_GPIO_MODE_ANALOG
   * @retval None
   */
 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
 {
- 80030ce:	b580      	push	{r7, lr}
- 80030d0:	b084      	sub	sp, #16
- 80030d2:	af00      	add	r7, sp, #0
- 80030d4:	60f8      	str	r0, [r7, #12]
- 80030d6:	60b9      	str	r1, [r7, #8]
- 80030d8:	607a      	str	r2, [r7, #4]
+ 80023d6:	b580      	push	{r7, lr}
+ 80023d8:	b084      	sub	sp, #16
+ 80023da:	af00      	add	r7, sp, #0
+ 80023dc:	60f8      	str	r0, [r7, #12]
+ 80023de:	60b9      	str	r1, [r7, #8]
+ 80023e0:	607a      	str	r2, [r7, #4]
   MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODE0), ((Pin * Pin) * Mode));
- 80030da:	68fb      	ldr	r3, [r7, #12]
- 80030dc:	6819      	ldr	r1, [r3, #0]
- 80030de:	68bb      	ldr	r3, [r7, #8]
- 80030e0:	435b      	muls	r3, r3
- 80030e2:	001a      	movs	r2, r3
- 80030e4:	0013      	movs	r3, r2
- 80030e6:	005b      	lsls	r3, r3, #1
- 80030e8:	189b      	adds	r3, r3, r2
- 80030ea:	43db      	mvns	r3, r3
- 80030ec:	400b      	ands	r3, r1
- 80030ee:	001a      	movs	r2, r3
- 80030f0:	68bb      	ldr	r3, [r7, #8]
- 80030f2:	435b      	muls	r3, r3
- 80030f4:	6879      	ldr	r1, [r7, #4]
- 80030f6:	434b      	muls	r3, r1
- 80030f8:	431a      	orrs	r2, r3
- 80030fa:	68fb      	ldr	r3, [r7, #12]
- 80030fc:	601a      	str	r2, [r3, #0]
+ 80023e2:	68fb      	ldr	r3, [r7, #12]
+ 80023e4:	6819      	ldr	r1, [r3, #0]
+ 80023e6:	68bb      	ldr	r3, [r7, #8]
+ 80023e8:	435b      	muls	r3, r3
+ 80023ea:	001a      	movs	r2, r3
+ 80023ec:	0013      	movs	r3, r2
+ 80023ee:	005b      	lsls	r3, r3, #1
+ 80023f0:	189b      	adds	r3, r3, r2
+ 80023f2:	43db      	mvns	r3, r3
+ 80023f4:	400b      	ands	r3, r1
+ 80023f6:	001a      	movs	r2, r3
+ 80023f8:	68bb      	ldr	r3, [r7, #8]
+ 80023fa:	435b      	muls	r3, r3
+ 80023fc:	6879      	ldr	r1, [r7, #4]
+ 80023fe:	434b      	muls	r3, r1
+ 8002400:	431a      	orrs	r2, r3
+ 8002402:	68fb      	ldr	r3, [r7, #12]
+ 8002404:	601a      	str	r2, [r3, #0]
 }
- 80030fe:	46c0      	nop			; (mov r8, r8)
- 8003100:	46bd      	mov	sp, r7
- 8003102:	b004      	add	sp, #16
- 8003104:	bd80      	pop	{r7, pc}
+ 8002406:	46c0      	nop			; (mov r8, r8)
+ 8002408:	46bd      	mov	sp, r7
+ 800240a:	b004      	add	sp, #16
+ 800240c:	bd80      	pop	{r7, pc}
 
-08003106 <LL_GPIO_SetPinOutputType>:
+0800240e <LL_GPIO_SetPinOutputType>:
   *         @arg @ref LL_GPIO_OUTPUT_PUSHPULL
   *         @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
   * @retval None
   */
 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
 {
- 8003106:	b580      	push	{r7, lr}
- 8003108:	b084      	sub	sp, #16
- 800310a:	af00      	add	r7, sp, #0
- 800310c:	60f8      	str	r0, [r7, #12]
- 800310e:	60b9      	str	r1, [r7, #8]
- 8003110:	607a      	str	r2, [r7, #4]
+ 800240e:	b580      	push	{r7, lr}
+ 8002410:	b084      	sub	sp, #16
+ 8002412:	af00      	add	r7, sp, #0
+ 8002414:	60f8      	str	r0, [r7, #12]
+ 8002416:	60b9      	str	r1, [r7, #8]
+ 8002418:	607a      	str	r2, [r7, #4]
   MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
- 8003112:	68fb      	ldr	r3, [r7, #12]
- 8003114:	685b      	ldr	r3, [r3, #4]
- 8003116:	68ba      	ldr	r2, [r7, #8]
- 8003118:	43d2      	mvns	r2, r2
- 800311a:	401a      	ands	r2, r3
- 800311c:	68bb      	ldr	r3, [r7, #8]
- 800311e:	6879      	ldr	r1, [r7, #4]
- 8003120:	434b      	muls	r3, r1
- 8003122:	431a      	orrs	r2, r3
- 8003124:	68fb      	ldr	r3, [r7, #12]
- 8003126:	605a      	str	r2, [r3, #4]
+ 800241a:	68fb      	ldr	r3, [r7, #12]
+ 800241c:	685b      	ldr	r3, [r3, #4]
+ 800241e:	68ba      	ldr	r2, [r7, #8]
+ 8002420:	43d2      	mvns	r2, r2
+ 8002422:	401a      	ands	r2, r3
+ 8002424:	68bb      	ldr	r3, [r7, #8]
+ 8002426:	6879      	ldr	r1, [r7, #4]
+ 8002428:	434b      	muls	r3, r1
+ 800242a:	431a      	orrs	r2, r3
+ 800242c:	68fb      	ldr	r3, [r7, #12]
+ 800242e:	605a      	str	r2, [r3, #4]
 }
- 8003128:	46c0      	nop			; (mov r8, r8)
- 800312a:	46bd      	mov	sp, r7
- 800312c:	b004      	add	sp, #16
- 800312e:	bd80      	pop	{r7, pc}
+ 8002430:	46c0      	nop			; (mov r8, r8)
+ 8002432:	46bd      	mov	sp, r7
+ 8002434:	b004      	add	sp, #16
+ 8002436:	bd80      	pop	{r7, pc}
 
-08003130 <LL_GPIO_SetPinSpeed>:
+08002438 <LL_GPIO_SetPinSpeed>:
   *         @arg @ref LL_GPIO_SPEED_FREQ_HIGH
   *         @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
   * @retval None
   */
 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t  Speed)
 {
- 8003130:	b580      	push	{r7, lr}
- 8003132:	b084      	sub	sp, #16
- 8003134:	af00      	add	r7, sp, #0
- 8003136:	60f8      	str	r0, [r7, #12]
- 8003138:	60b9      	str	r1, [r7, #8]
- 800313a:	607a      	str	r2, [r7, #4]
+ 8002438:	b580      	push	{r7, lr}
+ 800243a:	b084      	sub	sp, #16
+ 800243c:	af00      	add	r7, sp, #0
+ 800243e:	60f8      	str	r0, [r7, #12]
+ 8002440:	60b9      	str	r1, [r7, #8]
+ 8002442:	607a      	str	r2, [r7, #4]
   MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDER_OSPEED0), ((Pin * Pin) * Speed));
- 800313c:	68fb      	ldr	r3, [r7, #12]
- 800313e:	6899      	ldr	r1, [r3, #8]
- 8003140:	68bb      	ldr	r3, [r7, #8]
- 8003142:	435b      	muls	r3, r3
- 8003144:	001a      	movs	r2, r3
- 8003146:	0013      	movs	r3, r2
- 8003148:	005b      	lsls	r3, r3, #1
- 800314a:	189b      	adds	r3, r3, r2
- 800314c:	43db      	mvns	r3, r3
- 800314e:	400b      	ands	r3, r1
- 8003150:	001a      	movs	r2, r3
- 8003152:	68bb      	ldr	r3, [r7, #8]
- 8003154:	435b      	muls	r3, r3
- 8003156:	6879      	ldr	r1, [r7, #4]
- 8003158:	434b      	muls	r3, r1
- 800315a:	431a      	orrs	r2, r3
- 800315c:	68fb      	ldr	r3, [r7, #12]
- 800315e:	609a      	str	r2, [r3, #8]
+ 8002444:	68fb      	ldr	r3, [r7, #12]
+ 8002446:	6899      	ldr	r1, [r3, #8]
+ 8002448:	68bb      	ldr	r3, [r7, #8]
+ 800244a:	435b      	muls	r3, r3
+ 800244c:	001a      	movs	r2, r3
+ 800244e:	0013      	movs	r3, r2
+ 8002450:	005b      	lsls	r3, r3, #1
+ 8002452:	189b      	adds	r3, r3, r2
+ 8002454:	43db      	mvns	r3, r3
+ 8002456:	400b      	ands	r3, r1
+ 8002458:	001a      	movs	r2, r3
+ 800245a:	68bb      	ldr	r3, [r7, #8]
+ 800245c:	435b      	muls	r3, r3
+ 800245e:	6879      	ldr	r1, [r7, #4]
+ 8002460:	434b      	muls	r3, r1
+ 8002462:	431a      	orrs	r2, r3
+ 8002464:	68fb      	ldr	r3, [r7, #12]
+ 8002466:	609a      	str	r2, [r3, #8]
 }
- 8003160:	46c0      	nop			; (mov r8, r8)
- 8003162:	46bd      	mov	sp, r7
- 8003164:	b004      	add	sp, #16
- 8003166:	bd80      	pop	{r7, pc}
+ 8002468:	46c0      	nop			; (mov r8, r8)
+ 800246a:	46bd      	mov	sp, r7
+ 800246c:	b004      	add	sp, #16
+ 800246e:	bd80      	pop	{r7, pc}
 
-08003168 <LL_GPIO_SetPinPull>:
+08002470 <LL_GPIO_SetPinPull>:
   *         @arg @ref LL_GPIO_PULL_UP
   *         @arg @ref LL_GPIO_PULL_DOWN
   * @retval None
   */
 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
 {
- 8003168:	b580      	push	{r7, lr}
- 800316a:	b084      	sub	sp, #16
- 800316c:	af00      	add	r7, sp, #0
- 800316e:	60f8      	str	r0, [r7, #12]
- 8003170:	60b9      	str	r1, [r7, #8]
- 8003172:	607a      	str	r2, [r7, #4]
+ 8002470:	b580      	push	{r7, lr}
+ 8002472:	b084      	sub	sp, #16
+ 8002474:	af00      	add	r7, sp, #0
+ 8002476:	60f8      	str	r0, [r7, #12]
+ 8002478:	60b9      	str	r1, [r7, #8]
+ 800247a:	607a      	str	r2, [r7, #4]
   MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPD0), ((Pin * Pin) * Pull));
- 8003174:	68fb      	ldr	r3, [r7, #12]
- 8003176:	68d9      	ldr	r1, [r3, #12]
- 8003178:	68bb      	ldr	r3, [r7, #8]
- 800317a:	435b      	muls	r3, r3
- 800317c:	001a      	movs	r2, r3
- 800317e:	0013      	movs	r3, r2
- 8003180:	005b      	lsls	r3, r3, #1
- 8003182:	189b      	adds	r3, r3, r2
- 8003184:	43db      	mvns	r3, r3
- 8003186:	400b      	ands	r3, r1
- 8003188:	001a      	movs	r2, r3
- 800318a:	68bb      	ldr	r3, [r7, #8]
- 800318c:	435b      	muls	r3, r3
- 800318e:	6879      	ldr	r1, [r7, #4]
- 8003190:	434b      	muls	r3, r1
- 8003192:	431a      	orrs	r2, r3
- 8003194:	68fb      	ldr	r3, [r7, #12]
- 8003196:	60da      	str	r2, [r3, #12]
+ 800247c:	68fb      	ldr	r3, [r7, #12]
+ 800247e:	68d9      	ldr	r1, [r3, #12]
+ 8002480:	68bb      	ldr	r3, [r7, #8]
+ 8002482:	435b      	muls	r3, r3
+ 8002484:	001a      	movs	r2, r3
+ 8002486:	0013      	movs	r3, r2
+ 8002488:	005b      	lsls	r3, r3, #1
+ 800248a:	189b      	adds	r3, r3, r2
+ 800248c:	43db      	mvns	r3, r3
+ 800248e:	400b      	ands	r3, r1
+ 8002490:	001a      	movs	r2, r3
+ 8002492:	68bb      	ldr	r3, [r7, #8]
+ 8002494:	435b      	muls	r3, r3
+ 8002496:	6879      	ldr	r1, [r7, #4]
+ 8002498:	434b      	muls	r3, r1
+ 800249a:	431a      	orrs	r2, r3
+ 800249c:	68fb      	ldr	r3, [r7, #12]
+ 800249e:	60da      	str	r2, [r3, #12]
 }
- 8003198:	46c0      	nop			; (mov r8, r8)
- 800319a:	46bd      	mov	sp, r7
- 800319c:	b004      	add	sp, #16
- 800319e:	bd80      	pop	{r7, pc}
+ 80024a0:	46c0      	nop			; (mov r8, r8)
+ 80024a2:	46bd      	mov	sp, r7
+ 80024a4:	b004      	add	sp, #16
+ 80024a6:	bd80      	pop	{r7, pc}
 
-080031a0 <LL_GPIO_SetAFPin_0_7>:
+080024a8 <LL_GPIO_SetAFPin_0_7>:
   *         @arg @ref LL_GPIO_AF_6
   *         @arg @ref LL_GPIO_AF_7
   * @retval None
   */
 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
 {
- 80031a0:	b580      	push	{r7, lr}
- 80031a2:	b084      	sub	sp, #16
- 80031a4:	af00      	add	r7, sp, #0
- 80031a6:	60f8      	str	r0, [r7, #12]
- 80031a8:	60b9      	str	r1, [r7, #8]
- 80031aa:	607a      	str	r2, [r7, #4]
+ 80024a8:	b580      	push	{r7, lr}
+ 80024aa:	b084      	sub	sp, #16
+ 80024ac:	af00      	add	r7, sp, #0
+ 80024ae:	60f8      	str	r0, [r7, #12]
+ 80024b0:	60b9      	str	r1, [r7, #8]
+ 80024b2:	607a      	str	r2, [r7, #4]
   MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0),
- 80031ac:	68fb      	ldr	r3, [r7, #12]
- 80031ae:	6a19      	ldr	r1, [r3, #32]
- 80031b0:	68bb      	ldr	r3, [r7, #8]
- 80031b2:	435b      	muls	r3, r3
- 80031b4:	68ba      	ldr	r2, [r7, #8]
- 80031b6:	4353      	muls	r3, r2
- 80031b8:	68ba      	ldr	r2, [r7, #8]
- 80031ba:	435a      	muls	r2, r3
- 80031bc:	0013      	movs	r3, r2
- 80031be:	011b      	lsls	r3, r3, #4
- 80031c0:	1a9b      	subs	r3, r3, r2
- 80031c2:	43db      	mvns	r3, r3
- 80031c4:	400b      	ands	r3, r1
- 80031c6:	001a      	movs	r2, r3
- 80031c8:	68bb      	ldr	r3, [r7, #8]
- 80031ca:	435b      	muls	r3, r3
- 80031cc:	68b9      	ldr	r1, [r7, #8]
- 80031ce:	434b      	muls	r3, r1
- 80031d0:	68b9      	ldr	r1, [r7, #8]
- 80031d2:	434b      	muls	r3, r1
- 80031d4:	6879      	ldr	r1, [r7, #4]
- 80031d6:	434b      	muls	r3, r1
- 80031d8:	431a      	orrs	r2, r3
- 80031da:	68fb      	ldr	r3, [r7, #12]
- 80031dc:	621a      	str	r2, [r3, #32]
+ 80024b4:	68fb      	ldr	r3, [r7, #12]
+ 80024b6:	6a19      	ldr	r1, [r3, #32]
+ 80024b8:	68bb      	ldr	r3, [r7, #8]
+ 80024ba:	435b      	muls	r3, r3
+ 80024bc:	68ba      	ldr	r2, [r7, #8]
+ 80024be:	4353      	muls	r3, r2
+ 80024c0:	68ba      	ldr	r2, [r7, #8]
+ 80024c2:	435a      	muls	r2, r3
+ 80024c4:	0013      	movs	r3, r2
+ 80024c6:	011b      	lsls	r3, r3, #4
+ 80024c8:	1a9b      	subs	r3, r3, r2
+ 80024ca:	43db      	mvns	r3, r3
+ 80024cc:	400b      	ands	r3, r1
+ 80024ce:	001a      	movs	r2, r3
+ 80024d0:	68bb      	ldr	r3, [r7, #8]
+ 80024d2:	435b      	muls	r3, r3
+ 80024d4:	68b9      	ldr	r1, [r7, #8]
+ 80024d6:	434b      	muls	r3, r1
+ 80024d8:	68b9      	ldr	r1, [r7, #8]
+ 80024da:	434b      	muls	r3, r1
+ 80024dc:	6879      	ldr	r1, [r7, #4]
+ 80024de:	434b      	muls	r3, r1
+ 80024e0:	431a      	orrs	r2, r3
+ 80024e2:	68fb      	ldr	r3, [r7, #12]
+ 80024e4:	621a      	str	r2, [r3, #32]
              ((((Pin * Pin) * Pin) * Pin) * Alternate));
 }
- 80031de:	46c0      	nop			; (mov r8, r8)
- 80031e0:	46bd      	mov	sp, r7
- 80031e2:	b004      	add	sp, #16
- 80031e4:	bd80      	pop	{r7, pc}
+ 80024e6:	46c0      	nop			; (mov r8, r8)
+ 80024e8:	46bd      	mov	sp, r7
+ 80024ea:	b004      	add	sp, #16
+ 80024ec:	bd80      	pop	{r7, pc}
 
-080031e6 <LL_GPIO_SetAFPin_8_15>:
+080024ee <LL_GPIO_SetAFPin_8_15>:
   *         @arg @ref LL_GPIO_AF_6
   *         @arg @ref LL_GPIO_AF_7
   * @retval None
   */
 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
 {
- 80031e6:	b580      	push	{r7, lr}
- 80031e8:	b084      	sub	sp, #16
- 80031ea:	af00      	add	r7, sp, #0
- 80031ec:	60f8      	str	r0, [r7, #12]
- 80031ee:	60b9      	str	r1, [r7, #8]
- 80031f0:	607a      	str	r2, [r7, #4]
+ 80024ee:	b580      	push	{r7, lr}
+ 80024f0:	b084      	sub	sp, #16
+ 80024f2:	af00      	add	r7, sp, #0
+ 80024f4:	60f8      	str	r0, [r7, #12]
+ 80024f6:	60b9      	str	r1, [r7, #8]
+ 80024f8:	607a      	str	r2, [r7, #4]
   MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8),
- 80031f2:	68fb      	ldr	r3, [r7, #12]
- 80031f4:	6a59      	ldr	r1, [r3, #36]	; 0x24
- 80031f6:	68bb      	ldr	r3, [r7, #8]
- 80031f8:	0a1b      	lsrs	r3, r3, #8
- 80031fa:	68ba      	ldr	r2, [r7, #8]
- 80031fc:	0a12      	lsrs	r2, r2, #8
- 80031fe:	4353      	muls	r3, r2
- 8003200:	68ba      	ldr	r2, [r7, #8]
- 8003202:	0a12      	lsrs	r2, r2, #8
- 8003204:	4353      	muls	r3, r2
- 8003206:	68ba      	ldr	r2, [r7, #8]
- 8003208:	0a12      	lsrs	r2, r2, #8
- 800320a:	435a      	muls	r2, r3
- 800320c:	0013      	movs	r3, r2
- 800320e:	011b      	lsls	r3, r3, #4
- 8003210:	1a9b      	subs	r3, r3, r2
- 8003212:	43db      	mvns	r3, r3
- 8003214:	400b      	ands	r3, r1
- 8003216:	001a      	movs	r2, r3
- 8003218:	68bb      	ldr	r3, [r7, #8]
- 800321a:	0a1b      	lsrs	r3, r3, #8
- 800321c:	68b9      	ldr	r1, [r7, #8]
- 800321e:	0a09      	lsrs	r1, r1, #8
- 8003220:	434b      	muls	r3, r1
- 8003222:	68b9      	ldr	r1, [r7, #8]
- 8003224:	0a09      	lsrs	r1, r1, #8
- 8003226:	434b      	muls	r3, r1
- 8003228:	68b9      	ldr	r1, [r7, #8]
- 800322a:	0a09      	lsrs	r1, r1, #8
- 800322c:	434b      	muls	r3, r1
- 800322e:	6879      	ldr	r1, [r7, #4]
- 8003230:	434b      	muls	r3, r1
- 8003232:	431a      	orrs	r2, r3
- 8003234:	68fb      	ldr	r3, [r7, #12]
- 8003236:	625a      	str	r2, [r3, #36]	; 0x24
+ 80024fa:	68fb      	ldr	r3, [r7, #12]
+ 80024fc:	6a59      	ldr	r1, [r3, #36]	; 0x24
+ 80024fe:	68bb      	ldr	r3, [r7, #8]
+ 8002500:	0a1b      	lsrs	r3, r3, #8
+ 8002502:	68ba      	ldr	r2, [r7, #8]
+ 8002504:	0a12      	lsrs	r2, r2, #8
+ 8002506:	4353      	muls	r3, r2
+ 8002508:	68ba      	ldr	r2, [r7, #8]
+ 800250a:	0a12      	lsrs	r2, r2, #8
+ 800250c:	4353      	muls	r3, r2
+ 800250e:	68ba      	ldr	r2, [r7, #8]
+ 8002510:	0a12      	lsrs	r2, r2, #8
+ 8002512:	435a      	muls	r2, r3
+ 8002514:	0013      	movs	r3, r2
+ 8002516:	011b      	lsls	r3, r3, #4
+ 8002518:	1a9b      	subs	r3, r3, r2
+ 800251a:	43db      	mvns	r3, r3
+ 800251c:	400b      	ands	r3, r1
+ 800251e:	001a      	movs	r2, r3
+ 8002520:	68bb      	ldr	r3, [r7, #8]
+ 8002522:	0a1b      	lsrs	r3, r3, #8
+ 8002524:	68b9      	ldr	r1, [r7, #8]
+ 8002526:	0a09      	lsrs	r1, r1, #8
+ 8002528:	434b      	muls	r3, r1
+ 800252a:	68b9      	ldr	r1, [r7, #8]
+ 800252c:	0a09      	lsrs	r1, r1, #8
+ 800252e:	434b      	muls	r3, r1
+ 8002530:	68b9      	ldr	r1, [r7, #8]
+ 8002532:	0a09      	lsrs	r1, r1, #8
+ 8002534:	434b      	muls	r3, r1
+ 8002536:	6879      	ldr	r1, [r7, #4]
+ 8002538:	434b      	muls	r3, r1
+ 800253a:	431a      	orrs	r2, r3
+ 800253c:	68fb      	ldr	r3, [r7, #12]
+ 800253e:	625a      	str	r2, [r3, #36]	; 0x24
              (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * Alternate));
 }
- 8003238:	46c0      	nop			; (mov r8, r8)
- 800323a:	46bd      	mov	sp, r7
- 800323c:	b004      	add	sp, #16
- 800323e:	bd80      	pop	{r7, pc}
+ 8002540:	46c0      	nop			; (mov r8, r8)
+ 8002542:	46bd      	mov	sp, r7
+ 8002544:	b004      	add	sp, #16
+ 8002546:	bd80      	pop	{r7, pc}
 
-08003240 <LL_GPIO_Init>:
+08002548 <LL_GPIO_Init>:
   * @retval An ErrorStatus enumeration value:
   *          - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
   *          - ERROR:   Not applicable
   */
 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
 {
- 8003240:	b580      	push	{r7, lr}
- 8003242:	b084      	sub	sp, #16
- 8003244:	af00      	add	r7, sp, #0
- 8003246:	6078      	str	r0, [r7, #4]
- 8003248:	6039      	str	r1, [r7, #0]
+ 8002548:	b580      	push	{r7, lr}
+ 800254a:	b084      	sub	sp, #16
+ 800254c:	af00      	add	r7, sp, #0
+ 800254e:	6078      	str	r0, [r7, #4]
+ 8002550:	6039      	str	r1, [r7, #0]
   uint32_t pinpos     = 0x00000000U;
- 800324a:	2300      	movs	r3, #0
- 800324c:	60fb      	str	r3, [r7, #12]
+ 8002552:	2300      	movs	r3, #0
+ 8002554:	60fb      	str	r3, [r7, #12]
   uint32_t currentpin = 0x00000000U;
- 800324e:	2300      	movs	r3, #0
- 8003250:	60bb      	str	r3, [r7, #8]
+ 8002556:	2300      	movs	r3, #0
+ 8002558:	60bb      	str	r3, [r7, #8]
   /* ------------------------- Configure the port pins ---------------- */
   /* Initialize  pinpos on first pin set */
   /* pinpos = 0; useless as already done in default initialization */
 
   /* Configure the port pins */
   while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U)
- 8003252:	e048      	b.n	80032e6 <LL_GPIO_Init+0xa6>
+ 800255a:	e048      	b.n	80025ee <LL_GPIO_Init+0xa6>
   {
     /* Get current io position */
     currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos);
- 8003254:	683b      	ldr	r3, [r7, #0]
- 8003256:	681b      	ldr	r3, [r3, #0]
- 8003258:	2101      	movs	r1, #1
- 800325a:	68fa      	ldr	r2, [r7, #12]
- 800325c:	4091      	lsls	r1, r2
- 800325e:	000a      	movs	r2, r1
- 8003260:	4013      	ands	r3, r2
- 8003262:	60bb      	str	r3, [r7, #8]
+ 800255c:	683b      	ldr	r3, [r7, #0]
+ 800255e:	681b      	ldr	r3, [r3, #0]
+ 8002560:	2101      	movs	r1, #1
+ 8002562:	68fa      	ldr	r2, [r7, #12]
+ 8002564:	4091      	lsls	r1, r2
+ 8002566:	000a      	movs	r2, r1
+ 8002568:	4013      	ands	r3, r2
+ 800256a:	60bb      	str	r3, [r7, #8]
 
     if (currentpin)
- 8003264:	68bb      	ldr	r3, [r7, #8]
- 8003266:	2b00      	cmp	r3, #0
- 8003268:	d03a      	beq.n	80032e0 <LL_GPIO_Init+0xa0>
+ 800256c:	68bb      	ldr	r3, [r7, #8]
+ 800256e:	2b00      	cmp	r3, #0
+ 8002570:	d03a      	beq.n	80025e8 <LL_GPIO_Init+0xa0>
     {
       if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
- 800326a:	683b      	ldr	r3, [r7, #0]
- 800326c:	685b      	ldr	r3, [r3, #4]
- 800326e:	2b01      	cmp	r3, #1
- 8003270:	d003      	beq.n	800327a <LL_GPIO_Init+0x3a>
- 8003272:	683b      	ldr	r3, [r7, #0]
- 8003274:	685b      	ldr	r3, [r3, #4]
- 8003276:	2b02      	cmp	r3, #2
- 8003278:	d10e      	bne.n	8003298 <LL_GPIO_Init+0x58>
+ 8002572:	683b      	ldr	r3, [r7, #0]
+ 8002574:	685b      	ldr	r3, [r3, #4]
+ 8002576:	2b01      	cmp	r3, #1
+ 8002578:	d003      	beq.n	8002582 <LL_GPIO_Init+0x3a>
+ 800257a:	683b      	ldr	r3, [r7, #0]
+ 800257c:	685b      	ldr	r3, [r3, #4]
+ 800257e:	2b02      	cmp	r3, #2
+ 8002580:	d10e      	bne.n	80025a0 <LL_GPIO_Init+0x58>
       {
         /* Check Speed mode parameters */
         assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
 
         /* Speed mode configuration */
         LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
- 800327a:	683b      	ldr	r3, [r7, #0]
- 800327c:	689a      	ldr	r2, [r3, #8]
- 800327e:	68b9      	ldr	r1, [r7, #8]
- 8003280:	687b      	ldr	r3, [r7, #4]
- 8003282:	0018      	movs	r0, r3
- 8003284:	f7ff ff54 	bl	8003130 <LL_GPIO_SetPinSpeed>
+ 8002582:	683b      	ldr	r3, [r7, #0]
+ 8002584:	689a      	ldr	r2, [r3, #8]
+ 8002586:	68b9      	ldr	r1, [r7, #8]
+ 8002588:	687b      	ldr	r3, [r7, #4]
+ 800258a:	0018      	movs	r0, r3
+ 800258c:	f7ff ff54 	bl	8002438 <LL_GPIO_SetPinSpeed>
 
         /* Check Output mode parameters */
         assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
 
         /* Output mode configuration*/
         LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
- 8003288:	683b      	ldr	r3, [r7, #0]
- 800328a:	6819      	ldr	r1, [r3, #0]
- 800328c:	683b      	ldr	r3, [r7, #0]
- 800328e:	68da      	ldr	r2, [r3, #12]
- 8003290:	687b      	ldr	r3, [r7, #4]
- 8003292:	0018      	movs	r0, r3
- 8003294:	f7ff ff37 	bl	8003106 <LL_GPIO_SetPinOutputType>
+ 8002590:	683b      	ldr	r3, [r7, #0]
+ 8002592:	6819      	ldr	r1, [r3, #0]
+ 8002594:	683b      	ldr	r3, [r7, #0]
+ 8002596:	68da      	ldr	r2, [r3, #12]
+ 8002598:	687b      	ldr	r3, [r7, #4]
+ 800259a:	0018      	movs	r0, r3
+ 800259c:	f7ff ff37 	bl	800240e <LL_GPIO_SetPinOutputType>
       }
 
       /* Pull-up Pull down resistor configuration*/
       LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
- 8003298:	683b      	ldr	r3, [r7, #0]
- 800329a:	691a      	ldr	r2, [r3, #16]
- 800329c:	68b9      	ldr	r1, [r7, #8]
- 800329e:	687b      	ldr	r3, [r7, #4]
- 80032a0:	0018      	movs	r0, r3
- 80032a2:	f7ff ff61 	bl	8003168 <LL_GPIO_SetPinPull>
+ 80025a0:	683b      	ldr	r3, [r7, #0]
+ 80025a2:	691a      	ldr	r2, [r3, #16]
+ 80025a4:	68b9      	ldr	r1, [r7, #8]
+ 80025a6:	687b      	ldr	r3, [r7, #4]
+ 80025a8:	0018      	movs	r0, r3
+ 80025aa:	f7ff ff61 	bl	8002470 <LL_GPIO_SetPinPull>
 
       if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
- 80032a6:	683b      	ldr	r3, [r7, #0]
- 80032a8:	685b      	ldr	r3, [r3, #4]
- 80032aa:	2b02      	cmp	r3, #2
- 80032ac:	d111      	bne.n	80032d2 <LL_GPIO_Init+0x92>
+ 80025ae:	683b      	ldr	r3, [r7, #0]
+ 80025b0:	685b      	ldr	r3, [r3, #4]
+ 80025b2:	2b02      	cmp	r3, #2
+ 80025b4:	d111      	bne.n	80025da <LL_GPIO_Init+0x92>
       {
         /* Check Alternate parameter */
         assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
 
         /* Speed mode configuration */
         if (currentpin < LL_GPIO_PIN_8)
- 80032ae:	68bb      	ldr	r3, [r7, #8]
- 80032b0:	2bff      	cmp	r3, #255	; 0xff
- 80032b2:	d807      	bhi.n	80032c4 <LL_GPIO_Init+0x84>
+ 80025b6:	68bb      	ldr	r3, [r7, #8]
+ 80025b8:	2bff      	cmp	r3, #255	; 0xff
+ 80025ba:	d807      	bhi.n	80025cc <LL_GPIO_Init+0x84>
         {
           LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
- 80032b4:	683b      	ldr	r3, [r7, #0]
- 80032b6:	695a      	ldr	r2, [r3, #20]
- 80032b8:	68b9      	ldr	r1, [r7, #8]
- 80032ba:	687b      	ldr	r3, [r7, #4]
- 80032bc:	0018      	movs	r0, r3
- 80032be:	f7ff ff6f 	bl	80031a0 <LL_GPIO_SetAFPin_0_7>
- 80032c2:	e006      	b.n	80032d2 <LL_GPIO_Init+0x92>
+ 80025bc:	683b      	ldr	r3, [r7, #0]
+ 80025be:	695a      	ldr	r2, [r3, #20]
+ 80025c0:	68b9      	ldr	r1, [r7, #8]
+ 80025c2:	687b      	ldr	r3, [r7, #4]
+ 80025c4:	0018      	movs	r0, r3
+ 80025c6:	f7ff ff6f 	bl	80024a8 <LL_GPIO_SetAFPin_0_7>
+ 80025ca:	e006      	b.n	80025da <LL_GPIO_Init+0x92>
         }
         else
         {
           LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
- 80032c4:	683b      	ldr	r3, [r7, #0]
- 80032c6:	695a      	ldr	r2, [r3, #20]
- 80032c8:	68b9      	ldr	r1, [r7, #8]
- 80032ca:	687b      	ldr	r3, [r7, #4]
- 80032cc:	0018      	movs	r0, r3
- 80032ce:	f7ff ff8a 	bl	80031e6 <LL_GPIO_SetAFPin_8_15>
+ 80025cc:	683b      	ldr	r3, [r7, #0]
+ 80025ce:	695a      	ldr	r2, [r3, #20]
+ 80025d0:	68b9      	ldr	r1, [r7, #8]
+ 80025d2:	687b      	ldr	r3, [r7, #4]
+ 80025d4:	0018      	movs	r0, r3
+ 80025d6:	f7ff ff8a 	bl	80024ee <LL_GPIO_SetAFPin_8_15>
         }
       }
 
       /* Pin Mode configuration */
       LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
- 80032d2:	683b      	ldr	r3, [r7, #0]
- 80032d4:	685a      	ldr	r2, [r3, #4]
- 80032d6:	68b9      	ldr	r1, [r7, #8]
- 80032d8:	687b      	ldr	r3, [r7, #4]
- 80032da:	0018      	movs	r0, r3
- 80032dc:	f7ff fef7 	bl	80030ce <LL_GPIO_SetPinMode>
+ 80025da:	683b      	ldr	r3, [r7, #0]
+ 80025dc:	685a      	ldr	r2, [r3, #4]
+ 80025de:	68b9      	ldr	r1, [r7, #8]
+ 80025e0:	687b      	ldr	r3, [r7, #4]
+ 80025e2:	0018      	movs	r0, r3
+ 80025e4:	f7ff fef7 	bl	80023d6 <LL_GPIO_SetPinMode>
     }
     pinpos++;
- 80032e0:	68fb      	ldr	r3, [r7, #12]
- 80032e2:	3301      	adds	r3, #1
- 80032e4:	60fb      	str	r3, [r7, #12]
+ 80025e8:	68fb      	ldr	r3, [r7, #12]
+ 80025ea:	3301      	adds	r3, #1
+ 80025ec:	60fb      	str	r3, [r7, #12]
   while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U)
- 80032e6:	683b      	ldr	r3, [r7, #0]
- 80032e8:	681a      	ldr	r2, [r3, #0]
- 80032ea:	68fb      	ldr	r3, [r7, #12]
- 80032ec:	40da      	lsrs	r2, r3
- 80032ee:	1e13      	subs	r3, r2, #0
- 80032f0:	d1b0      	bne.n	8003254 <LL_GPIO_Init+0x14>
+ 80025ee:	683b      	ldr	r3, [r7, #0]
+ 80025f0:	681a      	ldr	r2, [r3, #0]
+ 80025f2:	68fb      	ldr	r3, [r7, #12]
+ 80025f4:	40da      	lsrs	r2, r3
+ 80025f6:	1e13      	subs	r3, r2, #0
+ 80025f8:	d1b0      	bne.n	800255c <LL_GPIO_Init+0x14>
   }
 
 
   return (SUCCESS);
- 80032f2:	2300      	movs	r3, #0
+ 80025fa:	2300      	movs	r3, #0
 }
- 80032f4:	0018      	movs	r0, r3
- 80032f6:	46bd      	mov	sp, r7
- 80032f8:	b004      	add	sp, #16
- 80032fa:	bd80      	pop	{r7, pc}
+ 80025fc:	0018      	movs	r0, r3
+ 80025fe:	46bd      	mov	sp, r7
+ 8002600:	b004      	add	sp, #16
+ 8002602:	bd80      	pop	{r7, pc}
 
-080032fc <LL_I2C_Enable>:
+08002604 <LL_I2C_Enable>:
 {
- 80032fc:	b580      	push	{r7, lr}
- 80032fe:	b082      	sub	sp, #8
- 8003300:	af00      	add	r7, sp, #0
- 8003302:	6078      	str	r0, [r7, #4]
+ 8002604:	b580      	push	{r7, lr}
+ 8002606:	b082      	sub	sp, #8
+ 8002608:	af00      	add	r7, sp, #0
+ 800260a:	6078      	str	r0, [r7, #4]
   SET_BIT(I2Cx->CR1, I2C_CR1_PE);
- 8003304:	687b      	ldr	r3, [r7, #4]
- 8003306:	681b      	ldr	r3, [r3, #0]
- 8003308:	2201      	movs	r2, #1
- 800330a:	431a      	orrs	r2, r3
- 800330c:	687b      	ldr	r3, [r7, #4]
- 800330e:	601a      	str	r2, [r3, #0]
+ 800260c:	687b      	ldr	r3, [r7, #4]
+ 800260e:	681b      	ldr	r3, [r3, #0]
+ 8002610:	2201      	movs	r2, #1
+ 8002612:	431a      	orrs	r2, r3
+ 8002614:	687b      	ldr	r3, [r7, #4]
+ 8002616:	601a      	str	r2, [r3, #0]
 }
- 8003310:	46c0      	nop			; (mov r8, r8)
- 8003312:	46bd      	mov	sp, r7
- 8003314:	b002      	add	sp, #8
- 8003316:	bd80      	pop	{r7, pc}
+ 8002618:	46c0      	nop			; (mov r8, r8)
+ 800261a:	46bd      	mov	sp, r7
+ 800261c:	b002      	add	sp, #8
+ 800261e:	bd80      	pop	{r7, pc}
 
-08003318 <LL_I2C_Disable>:
+08002620 <LL_I2C_Disable>:
 {
- 8003318:	b580      	push	{r7, lr}
- 800331a:	b082      	sub	sp, #8
- 800331c:	af00      	add	r7, sp, #0
- 800331e:	6078      	str	r0, [r7, #4]
+ 8002620:	b580      	push	{r7, lr}
+ 8002622:	b082      	sub	sp, #8
+ 8002624:	af00      	add	r7, sp, #0
+ 8002626:	6078      	str	r0, [r7, #4]
   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
- 8003320:	687b      	ldr	r3, [r7, #4]
- 8003322:	681b      	ldr	r3, [r3, #0]
- 8003324:	2201      	movs	r2, #1
- 8003326:	4393      	bics	r3, r2
- 8003328:	001a      	movs	r2, r3
- 800332a:	687b      	ldr	r3, [r7, #4]
- 800332c:	601a      	str	r2, [r3, #0]
+ 8002628:	687b      	ldr	r3, [r7, #4]
+ 800262a:	681b      	ldr	r3, [r3, #0]
+ 800262c:	2201      	movs	r2, #1
+ 800262e:	4393      	bics	r3, r2
+ 8002630:	001a      	movs	r2, r3
+ 8002632:	687b      	ldr	r3, [r7, #4]
+ 8002634:	601a      	str	r2, [r3, #0]
 }
- 800332e:	46c0      	nop			; (mov r8, r8)
- 8003330:	46bd      	mov	sp, r7
- 8003332:	b002      	add	sp, #8
- 8003334:	bd80      	pop	{r7, pc}
+ 8002636:	46c0      	nop			; (mov r8, r8)
+ 8002638:	46bd      	mov	sp, r7
+ 800263a:	b002      	add	sp, #8
+ 800263c:	bd80      	pop	{r7, pc}
 	...
 
-08003338 <LL_I2C_ConfigFilters>:
+08002640 <LL_I2C_ConfigFilters>:
 {
- 8003338:	b580      	push	{r7, lr}
- 800333a:	b084      	sub	sp, #16
- 800333c:	af00      	add	r7, sp, #0
- 800333e:	60f8      	str	r0, [r7, #12]
- 8003340:	60b9      	str	r1, [r7, #8]
- 8003342:	607a      	str	r2, [r7, #4]
+ 8002640:	b580      	push	{r7, lr}
+ 8002642:	b084      	sub	sp, #16
+ 8002644:	af00      	add	r7, sp, #0
+ 8002646:	60f8      	str	r0, [r7, #12]
+ 8002648:	60b9      	str	r1, [r7, #8]
+ 800264a:	607a      	str	r2, [r7, #4]
   MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_Pos));
- 8003344:	68fb      	ldr	r3, [r7, #12]
- 8003346:	681b      	ldr	r3, [r3, #0]
- 8003348:	4a06      	ldr	r2, [pc, #24]	; (8003364 <LL_I2C_ConfigFilters+0x2c>)
- 800334a:	401a      	ands	r2, r3
- 800334c:	687b      	ldr	r3, [r7, #4]
- 800334e:	0219      	lsls	r1, r3, #8
- 8003350:	68bb      	ldr	r3, [r7, #8]
- 8003352:	430b      	orrs	r3, r1
- 8003354:	431a      	orrs	r2, r3
- 8003356:	68fb      	ldr	r3, [r7, #12]
- 8003358:	601a      	str	r2, [r3, #0]
+ 800264c:	68fb      	ldr	r3, [r7, #12]
+ 800264e:	681b      	ldr	r3, [r3, #0]
+ 8002650:	4a06      	ldr	r2, [pc, #24]	; (800266c <LL_I2C_ConfigFilters+0x2c>)
+ 8002652:	401a      	ands	r2, r3
+ 8002654:	687b      	ldr	r3, [r7, #4]
+ 8002656:	0219      	lsls	r1, r3, #8
+ 8002658:	68bb      	ldr	r3, [r7, #8]
+ 800265a:	430b      	orrs	r3, r1
+ 800265c:	431a      	orrs	r2, r3
+ 800265e:	68fb      	ldr	r3, [r7, #12]
+ 8002660:	601a      	str	r2, [r3, #0]
 }
- 800335a:	46c0      	nop			; (mov r8, r8)
- 800335c:	46bd      	mov	sp, r7
- 800335e:	b004      	add	sp, #16
- 8003360:	bd80      	pop	{r7, pc}
- 8003362:	46c0      	nop			; (mov r8, r8)
- 8003364:	ffffe0ff 	.word	0xffffe0ff
+ 8002662:	46c0      	nop			; (mov r8, r8)
+ 8002664:	46bd      	mov	sp, r7
+ 8002666:	b004      	add	sp, #16
+ 8002668:	bd80      	pop	{r7, pc}
+ 800266a:	46c0      	nop			; (mov r8, r8)
+ 800266c:	ffffe0ff 	.word	0xffffe0ff
 
-08003368 <LL_I2C_SetOwnAddress1>:
+08002670 <LL_I2C_SetOwnAddress1>:
 {
- 8003368:	b580      	push	{r7, lr}
- 800336a:	b084      	sub	sp, #16
- 800336c:	af00      	add	r7, sp, #0
- 800336e:	60f8      	str	r0, [r7, #12]
- 8003370:	60b9      	str	r1, [r7, #8]
- 8003372:	607a      	str	r2, [r7, #4]
+ 8002670:	b580      	push	{r7, lr}
+ 8002672:	b084      	sub	sp, #16
+ 8002674:	af00      	add	r7, sp, #0
+ 8002676:	60f8      	str	r0, [r7, #12]
+ 8002678:	60b9      	str	r1, [r7, #8]
+ 800267a:	607a      	str	r2, [r7, #4]
   MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize);
- 8003374:	68fb      	ldr	r3, [r7, #12]
- 8003376:	689b      	ldr	r3, [r3, #8]
- 8003378:	0adb      	lsrs	r3, r3, #11
- 800337a:	02da      	lsls	r2, r3, #11
- 800337c:	68b9      	ldr	r1, [r7, #8]
- 800337e:	687b      	ldr	r3, [r7, #4]
- 8003380:	430b      	orrs	r3, r1
- 8003382:	431a      	orrs	r2, r3
- 8003384:	68fb      	ldr	r3, [r7, #12]
- 8003386:	609a      	str	r2, [r3, #8]
+ 800267c:	68fb      	ldr	r3, [r7, #12]
+ 800267e:	689b      	ldr	r3, [r3, #8]
+ 8002680:	0adb      	lsrs	r3, r3, #11
+ 8002682:	02da      	lsls	r2, r3, #11
+ 8002684:	68b9      	ldr	r1, [r7, #8]
+ 8002686:	687b      	ldr	r3, [r7, #4]
+ 8002688:	430b      	orrs	r3, r1
+ 800268a:	431a      	orrs	r2, r3
+ 800268c:	68fb      	ldr	r3, [r7, #12]
+ 800268e:	609a      	str	r2, [r3, #8]
 }
- 8003388:	46c0      	nop			; (mov r8, r8)
- 800338a:	46bd      	mov	sp, r7
- 800338c:	b004      	add	sp, #16
- 800338e:	bd80      	pop	{r7, pc}
+ 8002690:	46c0      	nop			; (mov r8, r8)
+ 8002692:	46bd      	mov	sp, r7
+ 8002694:	b004      	add	sp, #16
+ 8002696:	bd80      	pop	{r7, pc}
 
-08003390 <LL_I2C_EnableOwnAddress1>:
+08002698 <LL_I2C_EnableOwnAddress1>:
 {
- 8003390:	b580      	push	{r7, lr}
- 8003392:	b082      	sub	sp, #8
- 8003394:	af00      	add	r7, sp, #0
- 8003396:	6078      	str	r0, [r7, #4]
+ 8002698:	b580      	push	{r7, lr}
+ 800269a:	b082      	sub	sp, #8
+ 800269c:	af00      	add	r7, sp, #0
+ 800269e:	6078      	str	r0, [r7, #4]
   SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
- 8003398:	687b      	ldr	r3, [r7, #4]
- 800339a:	689b      	ldr	r3, [r3, #8]
- 800339c:	2280      	movs	r2, #128	; 0x80
- 800339e:	0212      	lsls	r2, r2, #8
- 80033a0:	431a      	orrs	r2, r3
- 80033a2:	687b      	ldr	r3, [r7, #4]
- 80033a4:	609a      	str	r2, [r3, #8]
+ 80026a0:	687b      	ldr	r3, [r7, #4]
+ 80026a2:	689b      	ldr	r3, [r3, #8]
+ 80026a4:	2280      	movs	r2, #128	; 0x80
+ 80026a6:	0212      	lsls	r2, r2, #8
+ 80026a8:	431a      	orrs	r2, r3
+ 80026aa:	687b      	ldr	r3, [r7, #4]
+ 80026ac:	609a      	str	r2, [r3, #8]
 }
- 80033a6:	46c0      	nop			; (mov r8, r8)
- 80033a8:	46bd      	mov	sp, r7
- 80033aa:	b002      	add	sp, #8
- 80033ac:	bd80      	pop	{r7, pc}
+ 80026ae:	46c0      	nop			; (mov r8, r8)
+ 80026b0:	46bd      	mov	sp, r7
+ 80026b2:	b002      	add	sp, #8
+ 80026b4:	bd80      	pop	{r7, pc}
 	...
 
-080033b0 <LL_I2C_DisableOwnAddress1>:
+080026b8 <LL_I2C_DisableOwnAddress1>:
 {
- 80033b0:	b580      	push	{r7, lr}
- 80033b2:	b082      	sub	sp, #8
- 80033b4:	af00      	add	r7, sp, #0
- 80033b6:	6078      	str	r0, [r7, #4]
+ 80026b8:	b580      	push	{r7, lr}
+ 80026ba:	b082      	sub	sp, #8
+ 80026bc:	af00      	add	r7, sp, #0
+ 80026be:	6078      	str	r0, [r7, #4]
   CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
- 80033b8:	687b      	ldr	r3, [r7, #4]
- 80033ba:	689b      	ldr	r3, [r3, #8]
- 80033bc:	4a03      	ldr	r2, [pc, #12]	; (80033cc <LL_I2C_DisableOwnAddress1+0x1c>)
- 80033be:	401a      	ands	r2, r3
- 80033c0:	687b      	ldr	r3, [r7, #4]
- 80033c2:	609a      	str	r2, [r3, #8]
+ 80026c0:	687b      	ldr	r3, [r7, #4]
+ 80026c2:	689b      	ldr	r3, [r3, #8]
+ 80026c4:	4a03      	ldr	r2, [pc, #12]	; (80026d4 <LL_I2C_DisableOwnAddress1+0x1c>)
+ 80026c6:	401a      	ands	r2, r3
+ 80026c8:	687b      	ldr	r3, [r7, #4]
+ 80026ca:	609a      	str	r2, [r3, #8]
 }
- 80033c4:	46c0      	nop			; (mov r8, r8)
- 80033c6:	46bd      	mov	sp, r7
- 80033c8:	b002      	add	sp, #8
- 80033ca:	bd80      	pop	{r7, pc}
- 80033cc:	ffff7fff 	.word	0xffff7fff
+ 80026cc:	46c0      	nop			; (mov r8, r8)
+ 80026ce:	46bd      	mov	sp, r7
+ 80026d0:	b002      	add	sp, #8
+ 80026d2:	bd80      	pop	{r7, pc}
+ 80026d4:	ffff7fff 	.word	0xffff7fff
 
-080033d0 <LL_I2C_SetTiming>:
+080026d8 <LL_I2C_SetTiming>:
 {
- 80033d0:	b580      	push	{r7, lr}
- 80033d2:	b082      	sub	sp, #8
- 80033d4:	af00      	add	r7, sp, #0
- 80033d6:	6078      	str	r0, [r7, #4]
- 80033d8:	6039      	str	r1, [r7, #0]
+ 80026d8:	b580      	push	{r7, lr}
+ 80026da:	b082      	sub	sp, #8
+ 80026dc:	af00      	add	r7, sp, #0
+ 80026de:	6078      	str	r0, [r7, #4]
+ 80026e0:	6039      	str	r1, [r7, #0]
   WRITE_REG(I2Cx->TIMINGR, Timing);
- 80033da:	687b      	ldr	r3, [r7, #4]
- 80033dc:	683a      	ldr	r2, [r7, #0]
- 80033de:	611a      	str	r2, [r3, #16]
+ 80026e2:	687b      	ldr	r3, [r7, #4]
+ 80026e4:	683a      	ldr	r2, [r7, #0]
+ 80026e6:	611a      	str	r2, [r3, #16]
 }
- 80033e0:	46c0      	nop			; (mov r8, r8)
- 80033e2:	46bd      	mov	sp, r7
- 80033e4:	b002      	add	sp, #8
- 80033e6:	bd80      	pop	{r7, pc}
+ 80026e8:	46c0      	nop			; (mov r8, r8)
+ 80026ea:	46bd      	mov	sp, r7
+ 80026ec:	b002      	add	sp, #8
+ 80026ee:	bd80      	pop	{r7, pc}
 
-080033e8 <LL_I2C_SetMode>:
+080026f0 <LL_I2C_SetMode>:
 {
- 80033e8:	b580      	push	{r7, lr}
- 80033ea:	b082      	sub	sp, #8
- 80033ec:	af00      	add	r7, sp, #0
- 80033ee:	6078      	str	r0, [r7, #4]
- 80033f0:	6039      	str	r1, [r7, #0]
+ 80026f0:	b580      	push	{r7, lr}
+ 80026f2:	b082      	sub	sp, #8
+ 80026f4:	af00      	add	r7, sp, #0
+ 80026f6:	6078      	str	r0, [r7, #4]
+ 80026f8:	6039      	str	r1, [r7, #0]
   MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);
- 80033f2:	687b      	ldr	r3, [r7, #4]
- 80033f4:	681b      	ldr	r3, [r3, #0]
- 80033f6:	4a05      	ldr	r2, [pc, #20]	; (800340c <LL_I2C_SetMode+0x24>)
- 80033f8:	401a      	ands	r2, r3
- 80033fa:	683b      	ldr	r3, [r7, #0]
- 80033fc:	431a      	orrs	r2, r3
- 80033fe:	687b      	ldr	r3, [r7, #4]
- 8003400:	601a      	str	r2, [r3, #0]
+ 80026fa:	687b      	ldr	r3, [r7, #4]
+ 80026fc:	681b      	ldr	r3, [r3, #0]
+ 80026fe:	4a05      	ldr	r2, [pc, #20]	; (8002714 <LL_I2C_SetMode+0x24>)
+ 8002700:	401a      	ands	r2, r3
+ 8002702:	683b      	ldr	r3, [r7, #0]
+ 8002704:	431a      	orrs	r2, r3
+ 8002706:	687b      	ldr	r3, [r7, #4]
+ 8002708:	601a      	str	r2, [r3, #0]
 }
- 8003402:	46c0      	nop			; (mov r8, r8)
- 8003404:	46bd      	mov	sp, r7
- 8003406:	b002      	add	sp, #8
- 8003408:	bd80      	pop	{r7, pc}
- 800340a:	46c0      	nop			; (mov r8, r8)
- 800340c:	ffcfffff 	.word	0xffcfffff
+ 800270a:	46c0      	nop			; (mov r8, r8)
+ 800270c:	46bd      	mov	sp, r7
+ 800270e:	b002      	add	sp, #8
+ 8002710:	bd80      	pop	{r7, pc}
+ 8002712:	46c0      	nop			; (mov r8, r8)
+ 8002714:	ffcfffff 	.word	0xffcfffff
 
-08003410 <LL_I2C_AcknowledgeNextData>:
+08002718 <LL_I2C_AcknowledgeNextData>:
 {
- 8003410:	b580      	push	{r7, lr}
- 8003412:	b082      	sub	sp, #8
- 8003414:	af00      	add	r7, sp, #0
- 8003416:	6078      	str	r0, [r7, #4]
- 8003418:	6039      	str	r1, [r7, #0]
+ 8002718:	b580      	push	{r7, lr}
+ 800271a:	b082      	sub	sp, #8
+ 800271c:	af00      	add	r7, sp, #0
+ 800271e:	6078      	str	r0, [r7, #4]
+ 8002720:	6039      	str	r1, [r7, #0]
   MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
- 800341a:	687b      	ldr	r3, [r7, #4]
- 800341c:	685b      	ldr	r3, [r3, #4]
- 800341e:	4a05      	ldr	r2, [pc, #20]	; (8003434 <LL_I2C_AcknowledgeNextData+0x24>)
- 8003420:	401a      	ands	r2, r3
- 8003422:	683b      	ldr	r3, [r7, #0]
- 8003424:	431a      	orrs	r2, r3
- 8003426:	687b      	ldr	r3, [r7, #4]
- 8003428:	605a      	str	r2, [r3, #4]
+ 8002722:	687b      	ldr	r3, [r7, #4]
+ 8002724:	685b      	ldr	r3, [r3, #4]
+ 8002726:	4a05      	ldr	r2, [pc, #20]	; (800273c <LL_I2C_AcknowledgeNextData+0x24>)
+ 8002728:	401a      	ands	r2, r3
+ 800272a:	683b      	ldr	r3, [r7, #0]
+ 800272c:	431a      	orrs	r2, r3
+ 800272e:	687b      	ldr	r3, [r7, #4]
+ 8002730:	605a      	str	r2, [r3, #4]
 }
- 800342a:	46c0      	nop			; (mov r8, r8)
- 800342c:	46bd      	mov	sp, r7
- 800342e:	b002      	add	sp, #8
- 8003430:	bd80      	pop	{r7, pc}
- 8003432:	46c0      	nop			; (mov r8, r8)
- 8003434:	ffff7fff 	.word	0xffff7fff
+ 8002732:	46c0      	nop			; (mov r8, r8)
+ 8002734:	46bd      	mov	sp, r7
+ 8002736:	b002      	add	sp, #8
+ 8002738:	bd80      	pop	{r7, pc}
+ 800273a:	46c0      	nop			; (mov r8, r8)
+ 800273c:	ffff7fff 	.word	0xffff7fff
 
-08003438 <LL_I2C_Init>:
+08002740 <LL_I2C_Init>:
   * @retval An ErrorStatus enumeration value:
   *          - SUCCESS: I2C registers are initialized
   *          - ERROR: Not applicable
   */
 ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
 {
- 8003438:	b580      	push	{r7, lr}
- 800343a:	b082      	sub	sp, #8
- 800343c:	af00      	add	r7, sp, #0
- 800343e:	6078      	str	r0, [r7, #4]
- 8003440:	6039      	str	r1, [r7, #0]
+ 8002740:	b580      	push	{r7, lr}
+ 8002742:	b082      	sub	sp, #8
+ 8002744:	af00      	add	r7, sp, #0
+ 8002746:	6078      	str	r0, [r7, #4]
+ 8002748:	6039      	str	r1, [r7, #0]
   assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
   assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
   assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
 
   /* Disable the selected I2Cx Peripheral */
   LL_I2C_Disable(I2Cx);
- 8003442:	687b      	ldr	r3, [r7, #4]
- 8003444:	0018      	movs	r0, r3
- 8003446:	f7ff ff67 	bl	8003318 <LL_I2C_Disable>
+ 800274a:	687b      	ldr	r3, [r7, #4]
+ 800274c:	0018      	movs	r0, r3
+ 800274e:	f7ff ff67 	bl	8002620 <LL_I2C_Disable>
   /*---------------------------- I2Cx CR1 Configuration ------------------------
    * Configure the analog and digital noise filters with parameters :
    * - AnalogFilter: I2C_CR1_ANFOFF bit
    * - DigitalFilter: I2C_CR1_DNF[3:0] bits
    */
   LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
- 800344a:	683b      	ldr	r3, [r7, #0]
- 800344c:	6899      	ldr	r1, [r3, #8]
- 800344e:	683b      	ldr	r3, [r7, #0]
- 8003450:	68da      	ldr	r2, [r3, #12]
- 8003452:	687b      	ldr	r3, [r7, #4]
- 8003454:	0018      	movs	r0, r3
- 8003456:	f7ff ff6f 	bl	8003338 <LL_I2C_ConfigFilters>
+ 8002752:	683b      	ldr	r3, [r7, #0]
+ 8002754:	6899      	ldr	r1, [r3, #8]
+ 8002756:	683b      	ldr	r3, [r7, #0]
+ 8002758:	68da      	ldr	r2, [r3, #12]
+ 800275a:	687b      	ldr	r3, [r7, #4]
+ 800275c:	0018      	movs	r0, r3
+ 800275e:	f7ff ff6f 	bl	8002640 <LL_I2C_ConfigFilters>
   /*---------------------------- I2Cx TIMINGR Configuration --------------------
    * Configure the SDA setup, hold time and the SCL high, low period with parameter :
    * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
    *           I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
    */
   LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
- 800345a:	683b      	ldr	r3, [r7, #0]
- 800345c:	685a      	ldr	r2, [r3, #4]
- 800345e:	687b      	ldr	r3, [r7, #4]
- 8003460:	0011      	movs	r1, r2
- 8003462:	0018      	movs	r0, r3
- 8003464:	f7ff ffb4 	bl	80033d0 <LL_I2C_SetTiming>
+ 8002762:	683b      	ldr	r3, [r7, #0]
+ 8002764:	685a      	ldr	r2, [r3, #4]
+ 8002766:	687b      	ldr	r3, [r7, #4]
+ 8002768:	0011      	movs	r1, r2
+ 800276a:	0018      	movs	r0, r3
+ 800276c:	f7ff ffb4 	bl	80026d8 <LL_I2C_SetTiming>
 
   /* Enable the selected I2Cx Peripheral */
   LL_I2C_Enable(I2Cx);
- 8003468:	687b      	ldr	r3, [r7, #4]
- 800346a:	0018      	movs	r0, r3
- 800346c:	f7ff ff46 	bl	80032fc <LL_I2C_Enable>
+ 8002770:	687b      	ldr	r3, [r7, #4]
+ 8002772:	0018      	movs	r0, r3
+ 8002774:	f7ff ff46 	bl	8002604 <LL_I2C_Enable>
   /*---------------------------- I2Cx OAR1 Configuration -----------------------
    * Disable, Configure and Enable I2Cx device own address 1 with parameters :
    * - OwnAddress1:  I2C_OAR1_OA1[9:0] bits
    * - OwnAddrSize:  I2C_OAR1_OA1MODE bit
    */
   LL_I2C_DisableOwnAddress1(I2Cx);
- 8003470:	687b      	ldr	r3, [r7, #4]
- 8003472:	0018      	movs	r0, r3
- 8003474:	f7ff ff9c 	bl	80033b0 <LL_I2C_DisableOwnAddress1>
+ 8002778:	687b      	ldr	r3, [r7, #4]
+ 800277a:	0018      	movs	r0, r3
+ 800277c:	f7ff ff9c 	bl	80026b8 <LL_I2C_DisableOwnAddress1>
   LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
- 8003478:	683b      	ldr	r3, [r7, #0]
- 800347a:	6919      	ldr	r1, [r3, #16]
- 800347c:	683b      	ldr	r3, [r7, #0]
- 800347e:	699a      	ldr	r2, [r3, #24]
- 8003480:	687b      	ldr	r3, [r7, #4]
- 8003482:	0018      	movs	r0, r3
- 8003484:	f7ff ff70 	bl	8003368 <LL_I2C_SetOwnAddress1>
+ 8002780:	683b      	ldr	r3, [r7, #0]
+ 8002782:	6919      	ldr	r1, [r3, #16]
+ 8002784:	683b      	ldr	r3, [r7, #0]
+ 8002786:	699a      	ldr	r2, [r3, #24]
+ 8002788:	687b      	ldr	r3, [r7, #4]
+ 800278a:	0018      	movs	r0, r3
+ 800278c:	f7ff ff70 	bl	8002670 <LL_I2C_SetOwnAddress1>
 
   /* OwnAdress1 == 0 is reserved for General Call address */
   if (I2C_InitStruct->OwnAddress1 != 0U)
- 8003488:	683b      	ldr	r3, [r7, #0]
- 800348a:	691b      	ldr	r3, [r3, #16]
- 800348c:	2b00      	cmp	r3, #0
- 800348e:	d003      	beq.n	8003498 <LL_I2C_Init+0x60>
+ 8002790:	683b      	ldr	r3, [r7, #0]
+ 8002792:	691b      	ldr	r3, [r3, #16]
+ 8002794:	2b00      	cmp	r3, #0
+ 8002796:	d003      	beq.n	80027a0 <LL_I2C_Init+0x60>
   {
     LL_I2C_EnableOwnAddress1(I2Cx);
- 8003490:	687b      	ldr	r3, [r7, #4]
- 8003492:	0018      	movs	r0, r3
- 8003494:	f7ff ff7c 	bl	8003390 <LL_I2C_EnableOwnAddress1>
+ 8002798:	687b      	ldr	r3, [r7, #4]
+ 800279a:	0018      	movs	r0, r3
+ 800279c:	f7ff ff7c 	bl	8002698 <LL_I2C_EnableOwnAddress1>
 
   /*---------------------------- I2Cx MODE Configuration -----------------------
   * Configure I2Cx peripheral mode with parameter :
    * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
    */
   LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
- 8003498:	683b      	ldr	r3, [r7, #0]
- 800349a:	681a      	ldr	r2, [r3, #0]
- 800349c:	687b      	ldr	r3, [r7, #4]
- 800349e:	0011      	movs	r1, r2
- 80034a0:	0018      	movs	r0, r3
- 80034a2:	f7ff ffa1 	bl	80033e8 <LL_I2C_SetMode>
+ 80027a0:	683b      	ldr	r3, [r7, #0]
+ 80027a2:	681a      	ldr	r2, [r3, #0]
+ 80027a4:	687b      	ldr	r3, [r7, #4]
+ 80027a6:	0011      	movs	r1, r2
+ 80027a8:	0018      	movs	r0, r3
+ 80027aa:	f7ff ffa1 	bl	80026f0 <LL_I2C_SetMode>
   /*---------------------------- I2Cx CR2 Configuration ------------------------
    * Configure the ACKnowledge or Non ACKnowledge condition
    * after the address receive match code or next received byte with parameter :
    * - TypeAcknowledge: I2C_CR2_NACK bit
    */
   LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
- 80034a6:	683b      	ldr	r3, [r7, #0]
- 80034a8:	695a      	ldr	r2, [r3, #20]
- 80034aa:	687b      	ldr	r3, [r7, #4]
- 80034ac:	0011      	movs	r1, r2
- 80034ae:	0018      	movs	r0, r3
- 80034b0:	f7ff ffae 	bl	8003410 <LL_I2C_AcknowledgeNextData>
+ 80027ae:	683b      	ldr	r3, [r7, #0]
+ 80027b0:	695a      	ldr	r2, [r3, #20]
+ 80027b2:	687b      	ldr	r3, [r7, #4]
+ 80027b4:	0011      	movs	r1, r2
+ 80027b6:	0018      	movs	r0, r3
+ 80027b8:	f7ff ffae 	bl	8002718 <LL_I2C_AcknowledgeNextData>
 
   return SUCCESS;
- 80034b4:	2300      	movs	r3, #0
+ 80027bc:	2300      	movs	r3, #0
 }
- 80034b6:	0018      	movs	r0, r3
- 80034b8:	46bd      	mov	sp, r7
- 80034ba:	b002      	add	sp, #8
- 80034bc:	bd80      	pop	{r7, pc}
+ 80027be:	0018      	movs	r0, r3
+ 80027c0:	46bd      	mov	sp, r7
+ 80027c2:	b002      	add	sp, #8
+ 80027c4:	bd80      	pop	{r7, pc}
 	...
 
-080034c0 <LL_RCC_HSI_IsReady>:
+080027c8 <LL_RCC_HSI_IsReady>:
 {
- 80034c0:	b580      	push	{r7, lr}
- 80034c2:	af00      	add	r7, sp, #0
+ 80027c8:	b580      	push	{r7, lr}
+ 80027ca:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RCC_CR_HSIRDY) ? 1UL : 0UL);
- 80034c4:	4b05      	ldr	r3, [pc, #20]	; (80034dc <LL_RCC_HSI_IsReady+0x1c>)
- 80034c6:	681b      	ldr	r3, [r3, #0]
- 80034c8:	2204      	movs	r2, #4
- 80034ca:	4013      	ands	r3, r2
- 80034cc:	2b04      	cmp	r3, #4
- 80034ce:	d101      	bne.n	80034d4 <LL_RCC_HSI_IsReady+0x14>
- 80034d0:	2301      	movs	r3, #1
- 80034d2:	e000      	b.n	80034d6 <LL_RCC_HSI_IsReady+0x16>
- 80034d4:	2300      	movs	r3, #0
+ 80027cc:	4b05      	ldr	r3, [pc, #20]	; (80027e4 <LL_RCC_HSI_IsReady+0x1c>)
+ 80027ce:	681b      	ldr	r3, [r3, #0]
+ 80027d0:	2204      	movs	r2, #4
+ 80027d2:	4013      	ands	r3, r2
+ 80027d4:	2b04      	cmp	r3, #4
+ 80027d6:	d101      	bne.n	80027dc <LL_RCC_HSI_IsReady+0x14>
+ 80027d8:	2301      	movs	r3, #1
+ 80027da:	e000      	b.n	80027de <LL_RCC_HSI_IsReady+0x16>
+ 80027dc:	2300      	movs	r3, #0
 }
- 80034d6:	0018      	movs	r0, r3
- 80034d8:	46bd      	mov	sp, r7
- 80034da:	bd80      	pop	{r7, pc}
- 80034dc:	40021000 	.word	0x40021000
+ 80027de:	0018      	movs	r0, r3
+ 80027e0:	46bd      	mov	sp, r7
+ 80027e2:	bd80      	pop	{r7, pc}
+ 80027e4:	40021000 	.word	0x40021000
 
-080034e0 <LL_RCC_LSE_IsReady>:
+080027e8 <LL_RCC_LSE_IsReady>:
 {
- 80034e0:	b580      	push	{r7, lr}
- 80034e2:	af00      	add	r7, sp, #0
+ 80027e8:	b580      	push	{r7, lr}
+ 80027ea:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == RCC_CSR_LSERDY) ? 1UL : 0UL);
- 80034e4:	4b07      	ldr	r3, [pc, #28]	; (8003504 <LL_RCC_LSE_IsReady+0x24>)
- 80034e6:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 80034e8:	2380      	movs	r3, #128	; 0x80
- 80034ea:	009b      	lsls	r3, r3, #2
- 80034ec:	401a      	ands	r2, r3
- 80034ee:	2380      	movs	r3, #128	; 0x80
- 80034f0:	009b      	lsls	r3, r3, #2
- 80034f2:	429a      	cmp	r2, r3
- 80034f4:	d101      	bne.n	80034fa <LL_RCC_LSE_IsReady+0x1a>
- 80034f6:	2301      	movs	r3, #1
- 80034f8:	e000      	b.n	80034fc <LL_RCC_LSE_IsReady+0x1c>
- 80034fa:	2300      	movs	r3, #0
+ 80027ec:	4b07      	ldr	r3, [pc, #28]	; (800280c <LL_RCC_LSE_IsReady+0x24>)
+ 80027ee:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80027f0:	2380      	movs	r3, #128	; 0x80
+ 80027f2:	009b      	lsls	r3, r3, #2
+ 80027f4:	401a      	ands	r2, r3
+ 80027f6:	2380      	movs	r3, #128	; 0x80
+ 80027f8:	009b      	lsls	r3, r3, #2
+ 80027fa:	429a      	cmp	r2, r3
+ 80027fc:	d101      	bne.n	8002802 <LL_RCC_LSE_IsReady+0x1a>
+ 80027fe:	2301      	movs	r3, #1
+ 8002800:	e000      	b.n	8002804 <LL_RCC_LSE_IsReady+0x1c>
+ 8002802:	2300      	movs	r3, #0
 }
- 80034fc:	0018      	movs	r0, r3
- 80034fe:	46bd      	mov	sp, r7
- 8003500:	bd80      	pop	{r7, pc}
- 8003502:	46c0      	nop			; (mov r8, r8)
- 8003504:	40021000 	.word	0x40021000
+ 8002804:	0018      	movs	r0, r3
+ 8002806:	46bd      	mov	sp, r7
+ 8002808:	bd80      	pop	{r7, pc}
+ 800280a:	46c0      	nop			; (mov r8, r8)
+ 800280c:	40021000 	.word	0x40021000
 
-08003508 <LL_RCC_MSI_GetRange>:
+08002810 <LL_RCC_MSI_GetRange>:
 {
- 8003508:	b580      	push	{r7, lr}
- 800350a:	af00      	add	r7, sp, #0
+ 8002810:	b580      	push	{r7, lr}
+ 8002812:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSIRANGE));
- 800350c:	4b03      	ldr	r3, [pc, #12]	; (800351c <LL_RCC_MSI_GetRange+0x14>)
- 800350e:	685a      	ldr	r2, [r3, #4]
- 8003510:	23e0      	movs	r3, #224	; 0xe0
- 8003512:	021b      	lsls	r3, r3, #8
- 8003514:	4013      	ands	r3, r2
+ 8002814:	4b03      	ldr	r3, [pc, #12]	; (8002824 <LL_RCC_MSI_GetRange+0x14>)
+ 8002816:	685a      	ldr	r2, [r3, #4]
+ 8002818:	23e0      	movs	r3, #224	; 0xe0
+ 800281a:	021b      	lsls	r3, r3, #8
+ 800281c:	4013      	ands	r3, r2
 }
- 8003516:	0018      	movs	r0, r3
- 8003518:	46bd      	mov	sp, r7
- 800351a:	bd80      	pop	{r7, pc}
- 800351c:	40021000 	.word	0x40021000
+ 800281e:	0018      	movs	r0, r3
+ 8002820:	46bd      	mov	sp, r7
+ 8002822:	bd80      	pop	{r7, pc}
+ 8002824:	40021000 	.word	0x40021000
 
-08003520 <LL_RCC_GetSysClkSource>:
+08002828 <LL_RCC_GetSysClkSource>:
 {
- 8003520:	b580      	push	{r7, lr}
- 8003522:	af00      	add	r7, sp, #0
+ 8002828:	b580      	push	{r7, lr}
+ 800282a:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
- 8003524:	4b03      	ldr	r3, [pc, #12]	; (8003534 <LL_RCC_GetSysClkSource+0x14>)
- 8003526:	68db      	ldr	r3, [r3, #12]
- 8003528:	220c      	movs	r2, #12
- 800352a:	4013      	ands	r3, r2
+ 800282c:	4b03      	ldr	r3, [pc, #12]	; (800283c <LL_RCC_GetSysClkSource+0x14>)
+ 800282e:	68db      	ldr	r3, [r3, #12]
+ 8002830:	220c      	movs	r2, #12
+ 8002832:	4013      	ands	r3, r2
 }
- 800352c:	0018      	movs	r0, r3
- 800352e:	46bd      	mov	sp, r7
- 8003530:	bd80      	pop	{r7, pc}
- 8003532:	46c0      	nop			; (mov r8, r8)
- 8003534:	40021000 	.word	0x40021000
+ 8002834:	0018      	movs	r0, r3
+ 8002836:	46bd      	mov	sp, r7
+ 8002838:	bd80      	pop	{r7, pc}
+ 800283a:	46c0      	nop			; (mov r8, r8)
+ 800283c:	40021000 	.word	0x40021000
 
-08003538 <LL_RCC_GetAHBPrescaler>:
+08002840 <LL_RCC_GetAHBPrescaler>:
 {
- 8003538:	b580      	push	{r7, lr}
- 800353a:	af00      	add	r7, sp, #0
+ 8002840:	b580      	push	{r7, lr}
+ 8002842:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
- 800353c:	4b03      	ldr	r3, [pc, #12]	; (800354c <LL_RCC_GetAHBPrescaler+0x14>)
- 800353e:	68db      	ldr	r3, [r3, #12]
- 8003540:	22f0      	movs	r2, #240	; 0xf0
- 8003542:	4013      	ands	r3, r2
+ 8002844:	4b03      	ldr	r3, [pc, #12]	; (8002854 <LL_RCC_GetAHBPrescaler+0x14>)
+ 8002846:	68db      	ldr	r3, [r3, #12]
+ 8002848:	22f0      	movs	r2, #240	; 0xf0
+ 800284a:	4013      	ands	r3, r2
 }
- 8003544:	0018      	movs	r0, r3
- 8003546:	46bd      	mov	sp, r7
- 8003548:	bd80      	pop	{r7, pc}
- 800354a:	46c0      	nop			; (mov r8, r8)
- 800354c:	40021000 	.word	0x40021000
+ 800284c:	0018      	movs	r0, r3
+ 800284e:	46bd      	mov	sp, r7
+ 8002850:	bd80      	pop	{r7, pc}
+ 8002852:	46c0      	nop			; (mov r8, r8)
+ 8002854:	40021000 	.word	0x40021000
 
-08003550 <LL_RCC_GetAPB1Prescaler>:
+08002858 <LL_RCC_GetAPB1Prescaler>:
 {
- 8003550:	b580      	push	{r7, lr}
- 8003552:	af00      	add	r7, sp, #0
+ 8002858:	b580      	push	{r7, lr}
+ 800285a:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
- 8003554:	4b03      	ldr	r3, [pc, #12]	; (8003564 <LL_RCC_GetAPB1Prescaler+0x14>)
- 8003556:	68da      	ldr	r2, [r3, #12]
- 8003558:	23e0      	movs	r3, #224	; 0xe0
- 800355a:	00db      	lsls	r3, r3, #3
- 800355c:	4013      	ands	r3, r2
+ 800285c:	4b03      	ldr	r3, [pc, #12]	; (800286c <LL_RCC_GetAPB1Prescaler+0x14>)
+ 800285e:	68da      	ldr	r2, [r3, #12]
+ 8002860:	23e0      	movs	r3, #224	; 0xe0
+ 8002862:	00db      	lsls	r3, r3, #3
+ 8002864:	4013      	ands	r3, r2
 }
- 800355e:	0018      	movs	r0, r3
- 8003560:	46bd      	mov	sp, r7
- 8003562:	bd80      	pop	{r7, pc}
- 8003564:	40021000 	.word	0x40021000
+ 8002866:	0018      	movs	r0, r3
+ 8002868:	46bd      	mov	sp, r7
+ 800286a:	bd80      	pop	{r7, pc}
+ 800286c:	40021000 	.word	0x40021000
 
-08003568 <LL_RCC_GetUSARTClockSource>:
+08002870 <LL_RCC_GetUSARTClockSource>:
 {
- 8003568:	b580      	push	{r7, lr}
- 800356a:	b082      	sub	sp, #8
- 800356c:	af00      	add	r7, sp, #0
- 800356e:	6078      	str	r0, [r7, #4]
+ 8002870:	b580      	push	{r7, lr}
+ 8002872:	b082      	sub	sp, #8
+ 8002874:	af00      	add	r7, sp, #0
+ 8002876:	6078      	str	r0, [r7, #4]
   return (uint32_t)(READ_BIT(RCC->CCIPR, USARTx) | (USARTx << 16U));
- 8003570:	4b05      	ldr	r3, [pc, #20]	; (8003588 <LL_RCC_GetUSARTClockSource+0x20>)
- 8003572:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 8003574:	687a      	ldr	r2, [r7, #4]
- 8003576:	401a      	ands	r2, r3
- 8003578:	687b      	ldr	r3, [r7, #4]
- 800357a:	041b      	lsls	r3, r3, #16
- 800357c:	4313      	orrs	r3, r2
+ 8002878:	4b05      	ldr	r3, [pc, #20]	; (8002890 <LL_RCC_GetUSARTClockSource+0x20>)
+ 800287a:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 800287c:	687a      	ldr	r2, [r7, #4]
+ 800287e:	401a      	ands	r2, r3
+ 8002880:	687b      	ldr	r3, [r7, #4]
+ 8002882:	041b      	lsls	r3, r3, #16
+ 8002884:	4313      	orrs	r3, r2
 }
- 800357e:	0018      	movs	r0, r3
- 8003580:	46bd      	mov	sp, r7
- 8003582:	b002      	add	sp, #8
- 8003584:	bd80      	pop	{r7, pc}
- 8003586:	46c0      	nop			; (mov r8, r8)
- 8003588:	40021000 	.word	0x40021000
+ 8002886:	0018      	movs	r0, r3
+ 8002888:	46bd      	mov	sp, r7
+ 800288a:	b002      	add	sp, #8
+ 800288c:	bd80      	pop	{r7, pc}
+ 800288e:	46c0      	nop			; (mov r8, r8)
+ 8002890:	40021000 	.word	0x40021000
 
-0800358c <LL_RCC_PLL_GetMainSource>:
+08002894 <LL_RCC_PLL_GetMainSource>:
   * @retval Returned value can be one of the following values:
   *         @arg @ref LL_RCC_PLLSOURCE_HSI
   *         @arg @ref LL_RCC_PLLSOURCE_HSE
   */
 __STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
 {
- 800358c:	b580      	push	{r7, lr}
- 800358e:	af00      	add	r7, sp, #0
+ 8002894:	b580      	push	{r7, lr}
+ 8002896:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC));
- 8003590:	4b03      	ldr	r3, [pc, #12]	; (80035a0 <LL_RCC_PLL_GetMainSource+0x14>)
- 8003592:	68da      	ldr	r2, [r3, #12]
- 8003594:	2380      	movs	r3, #128	; 0x80
- 8003596:	025b      	lsls	r3, r3, #9
- 8003598:	4013      	ands	r3, r2
+ 8002898:	4b03      	ldr	r3, [pc, #12]	; (80028a8 <LL_RCC_PLL_GetMainSource+0x14>)
+ 800289a:	68da      	ldr	r2, [r3, #12]
+ 800289c:	2380      	movs	r3, #128	; 0x80
+ 800289e:	025b      	lsls	r3, r3, #9
+ 80028a0:	4013      	ands	r3, r2
 }
- 800359a:	0018      	movs	r0, r3
- 800359c:	46bd      	mov	sp, r7
- 800359e:	bd80      	pop	{r7, pc}
- 80035a0:	40021000 	.word	0x40021000
+ 80028a2:	0018      	movs	r0, r3
+ 80028a4:	46bd      	mov	sp, r7
+ 80028a6:	bd80      	pop	{r7, pc}
+ 80028a8:	40021000 	.word	0x40021000
 
-080035a4 <LL_RCC_PLL_GetMultiplicator>:
+080028ac <LL_RCC_PLL_GetMultiplicator>:
   *         @arg @ref LL_RCC_PLL_MUL_24
   *         @arg @ref LL_RCC_PLL_MUL_32
   *         @arg @ref LL_RCC_PLL_MUL_48
   */
 __STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void)
 {
- 80035a4:	b580      	push	{r7, lr}
- 80035a6:	af00      	add	r7, sp, #0
+ 80028ac:	b580      	push	{r7, lr}
+ 80028ae:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL));
- 80035a8:	4b03      	ldr	r3, [pc, #12]	; (80035b8 <LL_RCC_PLL_GetMultiplicator+0x14>)
- 80035aa:	68da      	ldr	r2, [r3, #12]
- 80035ac:	23f0      	movs	r3, #240	; 0xf0
- 80035ae:	039b      	lsls	r3, r3, #14
- 80035b0:	4013      	ands	r3, r2
+ 80028b0:	4b03      	ldr	r3, [pc, #12]	; (80028c0 <LL_RCC_PLL_GetMultiplicator+0x14>)
+ 80028b2:	68da      	ldr	r2, [r3, #12]
+ 80028b4:	23f0      	movs	r3, #240	; 0xf0
+ 80028b6:	039b      	lsls	r3, r3, #14
+ 80028b8:	4013      	ands	r3, r2
 }
- 80035b2:	0018      	movs	r0, r3
- 80035b4:	46bd      	mov	sp, r7
- 80035b6:	bd80      	pop	{r7, pc}
- 80035b8:	40021000 	.word	0x40021000
+ 80028ba:	0018      	movs	r0, r3
+ 80028bc:	46bd      	mov	sp, r7
+ 80028be:	bd80      	pop	{r7, pc}
+ 80028c0:	40021000 	.word	0x40021000
 
-080035bc <LL_RCC_PLL_GetDivider>:
+080028c4 <LL_RCC_PLL_GetDivider>:
   *         @arg @ref LL_RCC_PLL_DIV_2
   *         @arg @ref LL_RCC_PLL_DIV_3
   *         @arg @ref LL_RCC_PLL_DIV_4
   */
 __STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void)
 {
- 80035bc:	b580      	push	{r7, lr}
- 80035be:	af00      	add	r7, sp, #0
+ 80028c4:	b580      	push	{r7, lr}
+ 80028c6:	af00      	add	r7, sp, #0
   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV));
- 80035c0:	4b03      	ldr	r3, [pc, #12]	; (80035d0 <LL_RCC_PLL_GetDivider+0x14>)
- 80035c2:	68da      	ldr	r2, [r3, #12]
- 80035c4:	23c0      	movs	r3, #192	; 0xc0
- 80035c6:	041b      	lsls	r3, r3, #16
- 80035c8:	4013      	ands	r3, r2
+ 80028c8:	4b03      	ldr	r3, [pc, #12]	; (80028d8 <LL_RCC_PLL_GetDivider+0x14>)
+ 80028ca:	68da      	ldr	r2, [r3, #12]
+ 80028cc:	23c0      	movs	r3, #192	; 0xc0
+ 80028ce:	041b      	lsls	r3, r3, #16
+ 80028d0:	4013      	ands	r3, r2
 }
- 80035ca:	0018      	movs	r0, r3
- 80035cc:	46bd      	mov	sp, r7
- 80035ce:	bd80      	pop	{r7, pc}
- 80035d0:	40021000 	.word	0x40021000
+ 80028d2:	0018      	movs	r0, r3
+ 80028d4:	46bd      	mov	sp, r7
+ 80028d6:	bd80      	pop	{r7, pc}
+ 80028d8:	40021000 	.word	0x40021000
 
-080035d4 <LL_RCC_IsActiveFlag_HSIDIV>:
+080028dc <LL_RCC_IsActiveFlag_HSIDIV>:
   * @brief  Check if HSI Divider is enabled (it divides by 4)
   * @rmtoll CR        HSIDIVF        LL_RCC_IsActiveFlag_HSIDIV
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIDIV(void)
 {
- 80035d4:	b580      	push	{r7, lr}
- 80035d6:	af00      	add	r7, sp, #0
+ 80028dc:	b580      	push	{r7, lr}
+ 80028de:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CR, RCC_CR_HSIDIVF) == RCC_CR_HSIDIVF) ? 1UL : 0UL);
- 80035d8:	4b05      	ldr	r3, [pc, #20]	; (80035f0 <LL_RCC_IsActiveFlag_HSIDIV+0x1c>)
- 80035da:	681b      	ldr	r3, [r3, #0]
- 80035dc:	2210      	movs	r2, #16
- 80035de:	4013      	ands	r3, r2
- 80035e0:	2b10      	cmp	r3, #16
- 80035e2:	d101      	bne.n	80035e8 <LL_RCC_IsActiveFlag_HSIDIV+0x14>
- 80035e4:	2301      	movs	r3, #1
- 80035e6:	e000      	b.n	80035ea <LL_RCC_IsActiveFlag_HSIDIV+0x16>
- 80035e8:	2300      	movs	r3, #0
+ 80028e0:	4b05      	ldr	r3, [pc, #20]	; (80028f8 <LL_RCC_IsActiveFlag_HSIDIV+0x1c>)
+ 80028e2:	681b      	ldr	r3, [r3, #0]
+ 80028e4:	2210      	movs	r2, #16
+ 80028e6:	4013      	ands	r3, r2
+ 80028e8:	2b10      	cmp	r3, #16
+ 80028ea:	d101      	bne.n	80028f0 <LL_RCC_IsActiveFlag_HSIDIV+0x14>
+ 80028ec:	2301      	movs	r3, #1
+ 80028ee:	e000      	b.n	80028f2 <LL_RCC_IsActiveFlag_HSIDIV+0x16>
+ 80028f0:	2300      	movs	r3, #0
 }
- 80035ea:	0018      	movs	r0, r3
- 80035ec:	46bd      	mov	sp, r7
- 80035ee:	bd80      	pop	{r7, pc}
- 80035f0:	40021000 	.word	0x40021000
+ 80028f2:	0018      	movs	r0, r3
+ 80028f4:	46bd      	mov	sp, r7
+ 80028f6:	bd80      	pop	{r7, pc}
+ 80028f8:	40021000 	.word	0x40021000
 
-080035f4 <LL_RCC_GetUSARTClockFreq>:
+080028fc <LL_RCC_GetUSARTClockFreq>:
   *         (*) value not defined in all devices.
   * @retval USART clock frequency (in Hz)
   *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
   */
 uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource)
 {
- 80035f4:	b580      	push	{r7, lr}
- 80035f6:	b084      	sub	sp, #16
- 80035f8:	af00      	add	r7, sp, #0
- 80035fa:	6078      	str	r0, [r7, #4]
+ 80028fc:	b580      	push	{r7, lr}
+ 80028fe:	b084      	sub	sp, #16
+ 8002900:	af00      	add	r7, sp, #0
+ 8002902:	6078      	str	r0, [r7, #4]
   uint32_t usart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
- 80035fc:	2300      	movs	r3, #0
- 80035fe:	60fb      	str	r3, [r7, #12]
+ 8002904:	2300      	movs	r3, #0
+ 8002906:	60fb      	str	r3, [r7, #12]
     }
   }
 #endif /* RCC_CCIPR_USART1SEL  */
 
 #if defined(RCC_CCIPR_USART2SEL)
   if (USARTxSource == LL_RCC_USART2_CLKSOURCE)
- 8003600:	687b      	ldr	r3, [r7, #4]
- 8003602:	2b0c      	cmp	r3, #12
- 8003604:	d139      	bne.n	800367a <LL_RCC_GetUSARTClockFreq+0x86>
+ 8002908:	687b      	ldr	r3, [r7, #4]
+ 800290a:	2b0c      	cmp	r3, #12
+ 800290c:	d139      	bne.n	8002982 <LL_RCC_GetUSARTClockFreq+0x86>
   {
     /* USART2CLK clock frequency */
     switch (LL_RCC_GetUSARTClockSource(USARTxSource))
- 8003606:	687b      	ldr	r3, [r7, #4]
- 8003608:	0018      	movs	r0, r3
- 800360a:	f7ff ffad 	bl	8003568 <LL_RCC_GetUSARTClockSource>
- 800360e:	0003      	movs	r3, r0
- 8003610:	4a1f      	ldr	r2, [pc, #124]	; (8003690 <LL_RCC_GetUSARTClockFreq+0x9c>)
- 8003612:	4293      	cmp	r3, r2
- 8003614:	d01c      	beq.n	8003650 <LL_RCC_GetUSARTClockFreq+0x5c>
- 8003616:	4a1e      	ldr	r2, [pc, #120]	; (8003690 <LL_RCC_GetUSARTClockFreq+0x9c>)
- 8003618:	4293      	cmp	r3, r2
- 800361a:	d821      	bhi.n	8003660 <LL_RCC_GetUSARTClockFreq+0x6c>
- 800361c:	4a1d      	ldr	r2, [pc, #116]	; (8003694 <LL_RCC_GetUSARTClockFreq+0xa0>)
- 800361e:	4293      	cmp	r3, r2
- 8003620:	d003      	beq.n	800362a <LL_RCC_GetUSARTClockFreq+0x36>
- 8003622:	4a1d      	ldr	r2, [pc, #116]	; (8003698 <LL_RCC_GetUSARTClockFreq+0xa4>)
- 8003624:	4293      	cmp	r3, r2
- 8003626:	d005      	beq.n	8003634 <LL_RCC_GetUSARTClockFreq+0x40>
- 8003628:	e01a      	b.n	8003660 <LL_RCC_GetUSARTClockFreq+0x6c>
+ 800290e:	687b      	ldr	r3, [r7, #4]
+ 8002910:	0018      	movs	r0, r3
+ 8002912:	f7ff ffad 	bl	8002870 <LL_RCC_GetUSARTClockSource>
+ 8002916:	0003      	movs	r3, r0
+ 8002918:	4a1f      	ldr	r2, [pc, #124]	; (8002998 <LL_RCC_GetUSARTClockFreq+0x9c>)
+ 800291a:	4293      	cmp	r3, r2
+ 800291c:	d01c      	beq.n	8002958 <LL_RCC_GetUSARTClockFreq+0x5c>
+ 800291e:	4a1e      	ldr	r2, [pc, #120]	; (8002998 <LL_RCC_GetUSARTClockFreq+0x9c>)
+ 8002920:	4293      	cmp	r3, r2
+ 8002922:	d821      	bhi.n	8002968 <LL_RCC_GetUSARTClockFreq+0x6c>
+ 8002924:	4a1d      	ldr	r2, [pc, #116]	; (800299c <LL_RCC_GetUSARTClockFreq+0xa0>)
+ 8002926:	4293      	cmp	r3, r2
+ 8002928:	d003      	beq.n	8002932 <LL_RCC_GetUSARTClockFreq+0x36>
+ 800292a:	4a1d      	ldr	r2, [pc, #116]	; (80029a0 <LL_RCC_GetUSARTClockFreq+0xa4>)
+ 800292c:	4293      	cmp	r3, r2
+ 800292e:	d005      	beq.n	800293c <LL_RCC_GetUSARTClockFreq+0x40>
+ 8002930:	e01a      	b.n	8002968 <LL_RCC_GetUSARTClockFreq+0x6c>
     {
       case LL_RCC_USART2_CLKSOURCE_SYSCLK: /* USART2 Clock is System Clock */
         usart_frequency = RCC_GetSystemClockFreq();
- 800362a:	f000 f83b 	bl	80036a4 <RCC_GetSystemClockFreq>
- 800362e:	0003      	movs	r3, r0
- 8003630:	60fb      	str	r3, [r7, #12]
+ 8002932:	f000 f83b 	bl	80029ac <RCC_GetSystemClockFreq>
+ 8002936:	0003      	movs	r3, r0
+ 8002938:	60fb      	str	r3, [r7, #12]
         break;
- 8003632:	e027      	b.n	8003684 <LL_RCC_GetUSARTClockFreq+0x90>
+ 800293a:	e027      	b.n	800298c <LL_RCC_GetUSARTClockFreq+0x90>
 
       case LL_RCC_USART2_CLKSOURCE_HSI:    /* USART2 Clock is HSI Osc. */
         if (LL_RCC_HSI_IsReady() != 0U)
- 8003634:	f7ff ff44 	bl	80034c0 <LL_RCC_HSI_IsReady>
- 8003638:	1e03      	subs	r3, r0, #0
- 800363a:	d020      	beq.n	800367e <LL_RCC_GetUSARTClockFreq+0x8a>
+ 800293c:	f7ff ff44 	bl	80027c8 <LL_RCC_HSI_IsReady>
+ 8002940:	1e03      	subs	r3, r0, #0
+ 8002942:	d020      	beq.n	8002986 <LL_RCC_GetUSARTClockFreq+0x8a>
         {
           if (LL_RCC_IsActiveFlag_HSIDIV() != 0U)
- 800363c:	f7ff ffca 	bl	80035d4 <LL_RCC_IsActiveFlag_HSIDIV>
- 8003640:	1e03      	subs	r3, r0, #0
- 8003642:	d002      	beq.n	800364a <LL_RCC_GetUSARTClockFreq+0x56>
+ 8002944:	f7ff ffca 	bl	80028dc <LL_RCC_IsActiveFlag_HSIDIV>
+ 8002948:	1e03      	subs	r3, r0, #0
+ 800294a:	d002      	beq.n	8002952 <LL_RCC_GetUSARTClockFreq+0x56>
           {
             usart_frequency = (HSI_VALUE >> 2U);
- 8003644:	4b15      	ldr	r3, [pc, #84]	; (800369c <LL_RCC_GetUSARTClockFreq+0xa8>)
- 8003646:	60fb      	str	r3, [r7, #12]
+ 800294c:	4b15      	ldr	r3, [pc, #84]	; (80029a4 <LL_RCC_GetUSARTClockFreq+0xa8>)
+ 800294e:	60fb      	str	r3, [r7, #12]
           else
           {
             usart_frequency = HSI_VALUE;
           }
         }
         break;
- 8003648:	e019      	b.n	800367e <LL_RCC_GetUSARTClockFreq+0x8a>
+ 8002950:	e019      	b.n	8002986 <LL_RCC_GetUSARTClockFreq+0x8a>
             usart_frequency = HSI_VALUE;
- 800364a:	4b15      	ldr	r3, [pc, #84]	; (80036a0 <LL_RCC_GetUSARTClockFreq+0xac>)
- 800364c:	60fb      	str	r3, [r7, #12]
+ 8002952:	4b15      	ldr	r3, [pc, #84]	; (80029a8 <LL_RCC_GetUSARTClockFreq+0xac>)
+ 8002954:	60fb      	str	r3, [r7, #12]
         break;
- 800364e:	e016      	b.n	800367e <LL_RCC_GetUSARTClockFreq+0x8a>
+ 8002956:	e016      	b.n	8002986 <LL_RCC_GetUSARTClockFreq+0x8a>
 
       case LL_RCC_USART2_CLKSOURCE_LSE:    /* USART2 Clock is LSE Osc. */
         if (LL_RCC_LSE_IsReady() != 0U)
- 8003650:	f7ff ff46 	bl	80034e0 <LL_RCC_LSE_IsReady>
- 8003654:	1e03      	subs	r3, r0, #0
- 8003656:	d014      	beq.n	8003682 <LL_RCC_GetUSARTClockFreq+0x8e>
+ 8002958:	f7ff ff46 	bl	80027e8 <LL_RCC_LSE_IsReady>
+ 800295c:	1e03      	subs	r3, r0, #0
+ 800295e:	d014      	beq.n	800298a <LL_RCC_GetUSARTClockFreq+0x8e>
         {
           usart_frequency = LSE_VALUE;
- 8003658:	2380      	movs	r3, #128	; 0x80
- 800365a:	021b      	lsls	r3, r3, #8
- 800365c:	60fb      	str	r3, [r7, #12]
+ 8002960:	2380      	movs	r3, #128	; 0x80
+ 8002962:	021b      	lsls	r3, r3, #8
+ 8002964:	60fb      	str	r3, [r7, #12]
         }
         break;
- 800365e:	e010      	b.n	8003682 <LL_RCC_GetUSARTClockFreq+0x8e>
+ 8002966:	e010      	b.n	800298a <LL_RCC_GetUSARTClockFreq+0x8e>
 
       case LL_RCC_USART2_CLKSOURCE_PCLK1:  /* USART2 Clock is PCLK1 */
       default:
         usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
- 8003660:	f000 f820 	bl	80036a4 <RCC_GetSystemClockFreq>
- 8003664:	0003      	movs	r3, r0
- 8003666:	0018      	movs	r0, r3
- 8003668:	f000 f860 	bl	800372c <RCC_GetHCLKClockFreq>
- 800366c:	0003      	movs	r3, r0
- 800366e:	0018      	movs	r0, r3
- 8003670:	f000 f872 	bl	8003758 <RCC_GetPCLK1ClockFreq>
- 8003674:	0003      	movs	r3, r0
- 8003676:	60fb      	str	r3, [r7, #12]
+ 8002968:	f000 f820 	bl	80029ac <RCC_GetSystemClockFreq>
+ 800296c:	0003      	movs	r3, r0
+ 800296e:	0018      	movs	r0, r3
+ 8002970:	f000 f860 	bl	8002a34 <RCC_GetHCLKClockFreq>
+ 8002974:	0003      	movs	r3, r0
+ 8002976:	0018      	movs	r0, r3
+ 8002978:	f000 f872 	bl	8002a60 <RCC_GetPCLK1ClockFreq>
+ 800297c:	0003      	movs	r3, r0
+ 800297e:	60fb      	str	r3, [r7, #12]
         break;
- 8003678:	e004      	b.n	8003684 <LL_RCC_GetUSARTClockFreq+0x90>
+ 8002980:	e004      	b.n	800298c <LL_RCC_GetUSARTClockFreq+0x90>
     }
   }
- 800367a:	46c0      	nop			; (mov r8, r8)
- 800367c:	e002      	b.n	8003684 <LL_RCC_GetUSARTClockFreq+0x90>
+ 8002982:	46c0      	nop			; (mov r8, r8)
+ 8002984:	e002      	b.n	800298c <LL_RCC_GetUSARTClockFreq+0x90>
         break;
- 800367e:	46c0      	nop			; (mov r8, r8)
- 8003680:	e000      	b.n	8003684 <LL_RCC_GetUSARTClockFreq+0x90>
+ 8002986:	46c0      	nop			; (mov r8, r8)
+ 8002988:	e000      	b.n	800298c <LL_RCC_GetUSARTClockFreq+0x90>
         break;
- 8003682:	46c0      	nop			; (mov r8, r8)
+ 800298a:	46c0      	nop			; (mov r8, r8)
 #endif /* RCC_CCIPR_USART2SEL */
 
   return usart_frequency;
- 8003684:	68fb      	ldr	r3, [r7, #12]
+ 800298c:	68fb      	ldr	r3, [r7, #12]
 }
- 8003686:	0018      	movs	r0, r3
- 8003688:	46bd      	mov	sp, r7
- 800368a:	b004      	add	sp, #16
- 800368c:	bd80      	pop	{r7, pc}
- 800368e:	46c0      	nop			; (mov r8, r8)
- 8003690:	000c000c 	.word	0x000c000c
- 8003694:	000c0004 	.word	0x000c0004
- 8003698:	000c0008 	.word	0x000c0008
- 800369c:	003d0900 	.word	0x003d0900
- 80036a0:	00f42400 	.word	0x00f42400
+ 800298e:	0018      	movs	r0, r3
+ 8002990:	46bd      	mov	sp, r7
+ 8002992:	b004      	add	sp, #16
+ 8002994:	bd80      	pop	{r7, pc}
+ 8002996:	46c0      	nop			; (mov r8, r8)
+ 8002998:	000c000c 	.word	0x000c000c
+ 800299c:	000c0004 	.word	0x000c0004
+ 80029a0:	000c0008 	.word	0x000c0008
+ 80029a4:	003d0900 	.word	0x003d0900
+ 80029a8:	00f42400 	.word	0x00f42400
 
-080036a4 <RCC_GetSystemClockFreq>:
+080029ac <RCC_GetSystemClockFreq>:
 /**
   * @brief  Return SYSTEM clock frequency
   * @retval SYSTEM clock frequency (in Hz)
   */
 static uint32_t RCC_GetSystemClockFreq(void)
 {
- 80036a4:	b580      	push	{r7, lr}
- 80036a6:	b082      	sub	sp, #8
- 80036a8:	af00      	add	r7, sp, #0
+ 80029ac:	b580      	push	{r7, lr}
+ 80029ae:	b082      	sub	sp, #8
+ 80029b0:	af00      	add	r7, sp, #0
   uint32_t frequency;
 
   /* Get SYSCLK source -------------------------------------------------------*/
   switch (LL_RCC_GetSysClkSource())
- 80036aa:	f7ff ff39 	bl	8003520 <LL_RCC_GetSysClkSource>
- 80036ae:	0003      	movs	r3, r0
- 80036b0:	2b0c      	cmp	r3, #12
- 80036b2:	d020      	beq.n	80036f6 <RCC_GetSystemClockFreq+0x52>
- 80036b4:	d824      	bhi.n	8003700 <RCC_GetSystemClockFreq+0x5c>
- 80036b6:	2b08      	cmp	r3, #8
- 80036b8:	d01a      	beq.n	80036f0 <RCC_GetSystemClockFreq+0x4c>
- 80036ba:	d821      	bhi.n	8003700 <RCC_GetSystemClockFreq+0x5c>
- 80036bc:	2b00      	cmp	r3, #0
- 80036be:	d002      	beq.n	80036c6 <RCC_GetSystemClockFreq+0x22>
- 80036c0:	2b04      	cmp	r3, #4
- 80036c2:	d00b      	beq.n	80036dc <RCC_GetSystemClockFreq+0x38>
- 80036c4:	e01c      	b.n	8003700 <RCC_GetSystemClockFreq+0x5c>
+ 80029b2:	f7ff ff39 	bl	8002828 <LL_RCC_GetSysClkSource>
+ 80029b6:	0003      	movs	r3, r0
+ 80029b8:	2b0c      	cmp	r3, #12
+ 80029ba:	d020      	beq.n	80029fe <RCC_GetSystemClockFreq+0x52>
+ 80029bc:	d824      	bhi.n	8002a08 <RCC_GetSystemClockFreq+0x5c>
+ 80029be:	2b08      	cmp	r3, #8
+ 80029c0:	d01a      	beq.n	80029f8 <RCC_GetSystemClockFreq+0x4c>
+ 80029c2:	d821      	bhi.n	8002a08 <RCC_GetSystemClockFreq+0x5c>
+ 80029c4:	2b00      	cmp	r3, #0
+ 80029c6:	d002      	beq.n	80029ce <RCC_GetSystemClockFreq+0x22>
+ 80029c8:	2b04      	cmp	r3, #4
+ 80029ca:	d00b      	beq.n	80029e4 <RCC_GetSystemClockFreq+0x38>
+ 80029cc:	e01c      	b.n	8002a08 <RCC_GetSystemClockFreq+0x5c>
   {
     case LL_RCC_SYS_CLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
       frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
- 80036c6:	f7ff ff1f 	bl	8003508 <LL_RCC_MSI_GetRange>
- 80036ca:	0003      	movs	r3, r0
- 80036cc:	0b5b      	lsrs	r3, r3, #13
- 80036ce:	3301      	adds	r3, #1
- 80036d0:	2280      	movs	r2, #128	; 0x80
- 80036d2:	0212      	lsls	r2, r2, #8
- 80036d4:	409a      	lsls	r2, r3
- 80036d6:	0013      	movs	r3, r2
- 80036d8:	607b      	str	r3, [r7, #4]
+ 80029ce:	f7ff ff1f 	bl	8002810 <LL_RCC_MSI_GetRange>
+ 80029d2:	0003      	movs	r3, r0
+ 80029d4:	0b5b      	lsrs	r3, r3, #13
+ 80029d6:	3301      	adds	r3, #1
+ 80029d8:	2280      	movs	r2, #128	; 0x80
+ 80029da:	0212      	lsls	r2, r2, #8
+ 80029dc:	409a      	lsls	r2, r3
+ 80029de:	0013      	movs	r3, r2
+ 80029e0:	607b      	str	r3, [r7, #4]
       break;
- 80036da:	e01c      	b.n	8003716 <RCC_GetSystemClockFreq+0x72>
+ 80029e2:	e01c      	b.n	8002a1e <RCC_GetSystemClockFreq+0x72>
 
     case LL_RCC_SYS_CLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
       if (LL_RCC_IsActiveFlag_HSIDIV() != 0U)
- 80036dc:	f7ff ff7a 	bl	80035d4 <LL_RCC_IsActiveFlag_HSIDIV>
- 80036e0:	1e03      	subs	r3, r0, #0
- 80036e2:	d002      	beq.n	80036ea <RCC_GetSystemClockFreq+0x46>
+ 80029e4:	f7ff ff7a 	bl	80028dc <LL_RCC_IsActiveFlag_HSIDIV>
+ 80029e8:	1e03      	subs	r3, r0, #0
+ 80029ea:	d002      	beq.n	80029f2 <RCC_GetSystemClockFreq+0x46>
       {
         frequency = (HSI_VALUE >> 2U);
- 80036e4:	4b0e      	ldr	r3, [pc, #56]	; (8003720 <RCC_GetSystemClockFreq+0x7c>)
- 80036e6:	607b      	str	r3, [r7, #4]
+ 80029ec:	4b0e      	ldr	r3, [pc, #56]	; (8002a28 <RCC_GetSystemClockFreq+0x7c>)
+ 80029ee:	607b      	str	r3, [r7, #4]
       }
       else
       {
         frequency = HSI_VALUE;
       }
       break;
- 80036e8:	e015      	b.n	8003716 <RCC_GetSystemClockFreq+0x72>
+ 80029f0:	e015      	b.n	8002a1e <RCC_GetSystemClockFreq+0x72>
         frequency = HSI_VALUE;
- 80036ea:	4b0e      	ldr	r3, [pc, #56]	; (8003724 <RCC_GetSystemClockFreq+0x80>)
- 80036ec:	607b      	str	r3, [r7, #4]
+ 80029f2:	4b0e      	ldr	r3, [pc, #56]	; (8002a2c <RCC_GetSystemClockFreq+0x80>)
+ 80029f4:	607b      	str	r3, [r7, #4]
       break;
- 80036ee:	e012      	b.n	8003716 <RCC_GetSystemClockFreq+0x72>
+ 80029f6:	e012      	b.n	8002a1e <RCC_GetSystemClockFreq+0x72>
 
     case LL_RCC_SYS_CLKSOURCE_STATUS_HSE:  /* HSE used as system clock source */
       frequency = HSE_VALUE;
- 80036f0:	4b0d      	ldr	r3, [pc, #52]	; (8003728 <RCC_GetSystemClockFreq+0x84>)
- 80036f2:	607b      	str	r3, [r7, #4]
+ 80029f8:	4b0d      	ldr	r3, [pc, #52]	; (8002a30 <RCC_GetSystemClockFreq+0x84>)
+ 80029fa:	607b      	str	r3, [r7, #4]
       break;
- 80036f4:	e00f      	b.n	8003716 <RCC_GetSystemClockFreq+0x72>
+ 80029fc:	e00f      	b.n	8002a1e <RCC_GetSystemClockFreq+0x72>
 
     case LL_RCC_SYS_CLKSOURCE_STATUS_PLL:  /* PLL used as system clock  source */
       frequency = RCC_PLL_GetFreqDomain_SYS();
- 80036f6:	f000 f843 	bl	8003780 <RCC_PLL_GetFreqDomain_SYS>
- 80036fa:	0003      	movs	r3, r0
- 80036fc:	607b      	str	r3, [r7, #4]
+ 80029fe:	f000 f843 	bl	8002a88 <RCC_PLL_GetFreqDomain_SYS>
+ 8002a02:	0003      	movs	r3, r0
+ 8002a04:	607b      	str	r3, [r7, #4]
       break;
- 80036fe:	e00a      	b.n	8003716 <RCC_GetSystemClockFreq+0x72>
+ 8002a06:	e00a      	b.n	8002a1e <RCC_GetSystemClockFreq+0x72>
 
     default:
       frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
- 8003700:	f7ff ff02 	bl	8003508 <LL_RCC_MSI_GetRange>
- 8003704:	0003      	movs	r3, r0
- 8003706:	0b5b      	lsrs	r3, r3, #13
- 8003708:	3301      	adds	r3, #1
- 800370a:	2280      	movs	r2, #128	; 0x80
- 800370c:	0212      	lsls	r2, r2, #8
- 800370e:	409a      	lsls	r2, r3
- 8003710:	0013      	movs	r3, r2
- 8003712:	607b      	str	r3, [r7, #4]
+ 8002a08:	f7ff ff02 	bl	8002810 <LL_RCC_MSI_GetRange>
+ 8002a0c:	0003      	movs	r3, r0
+ 8002a0e:	0b5b      	lsrs	r3, r3, #13
+ 8002a10:	3301      	adds	r3, #1
+ 8002a12:	2280      	movs	r2, #128	; 0x80
+ 8002a14:	0212      	lsls	r2, r2, #8
+ 8002a16:	409a      	lsls	r2, r3
+ 8002a18:	0013      	movs	r3, r2
+ 8002a1a:	607b      	str	r3, [r7, #4]
       break;
- 8003714:	46c0      	nop			; (mov r8, r8)
+ 8002a1c:	46c0      	nop			; (mov r8, r8)
   }
 
   return frequency;
- 8003716:	687b      	ldr	r3, [r7, #4]
+ 8002a1e:	687b      	ldr	r3, [r7, #4]
 }
- 8003718:	0018      	movs	r0, r3
- 800371a:	46bd      	mov	sp, r7
- 800371c:	b002      	add	sp, #8
- 800371e:	bd80      	pop	{r7, pc}
- 8003720:	003d0900 	.word	0x003d0900
- 8003724:	00f42400 	.word	0x00f42400
- 8003728:	007a1200 	.word	0x007a1200
+ 8002a20:	0018      	movs	r0, r3
+ 8002a22:	46bd      	mov	sp, r7
+ 8002a24:	b002      	add	sp, #8
+ 8002a26:	bd80      	pop	{r7, pc}
+ 8002a28:	003d0900 	.word	0x003d0900
+ 8002a2c:	00f42400 	.word	0x00f42400
+ 8002a30:	007a1200 	.word	0x007a1200
 
-0800372c <RCC_GetHCLKClockFreq>:
+08002a34 <RCC_GetHCLKClockFreq>:
   * @brief  Return HCLK clock frequency
   * @param  SYSCLK_Frequency SYSCLK clock frequency
   * @retval HCLK clock frequency (in Hz)
   */
 static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
 {
- 800372c:	b580      	push	{r7, lr}
- 800372e:	b082      	sub	sp, #8
- 8003730:	af00      	add	r7, sp, #0
- 8003732:	6078      	str	r0, [r7, #4]
+ 8002a34:	b580      	push	{r7, lr}
+ 8002a36:	b082      	sub	sp, #8
+ 8002a38:	af00      	add	r7, sp, #0
+ 8002a3a:	6078      	str	r0, [r7, #4]
   /* HCLK clock frequency */
   return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
- 8003734:	f7ff ff00 	bl	8003538 <LL_RCC_GetAHBPrescaler>
- 8003738:	0003      	movs	r3, r0
- 800373a:	091b      	lsrs	r3, r3, #4
- 800373c:	220f      	movs	r2, #15
- 800373e:	4013      	ands	r3, r2
- 8003740:	4a04      	ldr	r2, [pc, #16]	; (8003754 <RCC_GetHCLKClockFreq+0x28>)
- 8003742:	5cd3      	ldrb	r3, [r2, r3]
- 8003744:	001a      	movs	r2, r3
- 8003746:	687b      	ldr	r3, [r7, #4]
- 8003748:	40d3      	lsrs	r3, r2
+ 8002a3c:	f7ff ff00 	bl	8002840 <LL_RCC_GetAHBPrescaler>
+ 8002a40:	0003      	movs	r3, r0
+ 8002a42:	091b      	lsrs	r3, r3, #4
+ 8002a44:	220f      	movs	r2, #15
+ 8002a46:	4013      	ands	r3, r2
+ 8002a48:	4a04      	ldr	r2, [pc, #16]	; (8002a5c <RCC_GetHCLKClockFreq+0x28>)
+ 8002a4a:	5cd3      	ldrb	r3, [r2, r3]
+ 8002a4c:	001a      	movs	r2, r3
+ 8002a4e:	687b      	ldr	r3, [r7, #4]
+ 8002a50:	40d3      	lsrs	r3, r2
 }
- 800374a:	0018      	movs	r0, r3
- 800374c:	46bd      	mov	sp, r7
- 800374e:	b002      	add	sp, #8
- 8003750:	bd80      	pop	{r7, pc}
- 8003752:	46c0      	nop			; (mov r8, r8)
- 8003754:	08003c98 	.word	0x08003c98
+ 8002a52:	0018      	movs	r0, r3
+ 8002a54:	46bd      	mov	sp, r7
+ 8002a56:	b002      	add	sp, #8
+ 8002a58:	bd80      	pop	{r7, pc}
+ 8002a5a:	46c0      	nop			; (mov r8, r8)
+ 8002a5c:	0800401c 	.word	0x0800401c
 
-08003758 <RCC_GetPCLK1ClockFreq>:
+08002a60 <RCC_GetPCLK1ClockFreq>:
   * @brief  Return PCLK1 clock frequency
   * @param  HCLK_Frequency HCLK clock frequency
   * @retval PCLK1 clock frequency (in Hz)
   */
 static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
 {
- 8003758:	b580      	push	{r7, lr}
- 800375a:	b082      	sub	sp, #8
- 800375c:	af00      	add	r7, sp, #0
- 800375e:	6078      	str	r0, [r7, #4]
+ 8002a60:	b580      	push	{r7, lr}
+ 8002a62:	b082      	sub	sp, #8
+ 8002a64:	af00      	add	r7, sp, #0
+ 8002a66:	6078      	str	r0, [r7, #4]
   /* PCLK1 clock frequency */
   return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
- 8003760:	f7ff fef6 	bl	8003550 <LL_RCC_GetAPB1Prescaler>
- 8003764:	0003      	movs	r3, r0
- 8003766:	0a1b      	lsrs	r3, r3, #8
- 8003768:	4a04      	ldr	r2, [pc, #16]	; (800377c <RCC_GetPCLK1ClockFreq+0x24>)
- 800376a:	5cd3      	ldrb	r3, [r2, r3]
- 800376c:	001a      	movs	r2, r3
- 800376e:	687b      	ldr	r3, [r7, #4]
- 8003770:	40d3      	lsrs	r3, r2
+ 8002a68:	f7ff fef6 	bl	8002858 <LL_RCC_GetAPB1Prescaler>
+ 8002a6c:	0003      	movs	r3, r0
+ 8002a6e:	0a1b      	lsrs	r3, r3, #8
+ 8002a70:	4a04      	ldr	r2, [pc, #16]	; (8002a84 <RCC_GetPCLK1ClockFreq+0x24>)
+ 8002a72:	5cd3      	ldrb	r3, [r2, r3]
+ 8002a74:	001a      	movs	r2, r3
+ 8002a76:	687b      	ldr	r3, [r7, #4]
+ 8002a78:	40d3      	lsrs	r3, r2
 }
- 8003772:	0018      	movs	r0, r3
- 8003774:	46bd      	mov	sp, r7
- 8003776:	b002      	add	sp, #8
- 8003778:	bd80      	pop	{r7, pc}
- 800377a:	46c0      	nop			; (mov r8, r8)
- 800377c:	08003ca8 	.word	0x08003ca8
+ 8002a7a:	0018      	movs	r0, r3
+ 8002a7c:	46bd      	mov	sp, r7
+ 8002a7e:	b002      	add	sp, #8
+ 8002a80:	bd80      	pop	{r7, pc}
+ 8002a82:	46c0      	nop			; (mov r8, r8)
+ 8002a84:	0800402c 	.word	0x0800402c
 
-08003780 <RCC_PLL_GetFreqDomain_SYS>:
+08002a88 <RCC_PLL_GetFreqDomain_SYS>:
 /**
   * @brief  Return PLL clock frequency used for system domain
   * @retval PLL clock frequency (in Hz)
   */
 static uint32_t RCC_PLL_GetFreqDomain_SYS(void)
 {
- 8003780:	b590      	push	{r4, r7, lr}
- 8003782:	b083      	sub	sp, #12
- 8003784:	af00      	add	r7, sp, #0
+ 8002a88:	b590      	push	{r4, r7, lr}
+ 8002a8a:	b083      	sub	sp, #12
+ 8002a8c:	af00      	add	r7, sp, #0
   uint32_t pllinputfreq, pllsource;
 
   /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL divider) * PLL Multiplicator */
 
   /* Get PLL source */
   pllsource = LL_RCC_PLL_GetMainSource();
- 8003786:	f7ff ff01 	bl	800358c <LL_RCC_PLL_GetMainSource>
- 800378a:	0003      	movs	r3, r0
- 800378c:	603b      	str	r3, [r7, #0]
+ 8002a8e:	f7ff ff01 	bl	8002894 <LL_RCC_PLL_GetMainSource>
+ 8002a92:	0003      	movs	r3, r0
+ 8002a94:	603b      	str	r3, [r7, #0]
 
   switch (pllsource)
- 800378e:	683b      	ldr	r3, [r7, #0]
- 8003790:	2b00      	cmp	r3, #0
- 8003792:	d109      	bne.n	80037a8 <RCC_PLL_GetFreqDomain_SYS+0x28>
+ 8002a96:	683b      	ldr	r3, [r7, #0]
+ 8002a98:	2b00      	cmp	r3, #0
+ 8002a9a:	d109      	bne.n	8002ab0 <RCC_PLL_GetFreqDomain_SYS+0x28>
   {
     case LL_RCC_PLLSOURCE_HSI:       /* HSI used as PLL clock source */
       if (LL_RCC_IsActiveFlag_HSIDIV() != 0U)
- 8003794:	f7ff ff1e 	bl	80035d4 <LL_RCC_IsActiveFlag_HSIDIV>
- 8003798:	1e03      	subs	r3, r0, #0
- 800379a:	d002      	beq.n	80037a2 <RCC_PLL_GetFreqDomain_SYS+0x22>
+ 8002a9c:	f7ff ff1e 	bl	80028dc <LL_RCC_IsActiveFlag_HSIDIV>
+ 8002aa0:	1e03      	subs	r3, r0, #0
+ 8002aa2:	d002      	beq.n	8002aaa <RCC_PLL_GetFreqDomain_SYS+0x22>
       {
         pllinputfreq = (HSI_VALUE >> 2U);
- 800379c:	4b10      	ldr	r3, [pc, #64]	; (80037e0 <RCC_PLL_GetFreqDomain_SYS+0x60>)
- 800379e:	607b      	str	r3, [r7, #4]
+ 8002aa4:	4b10      	ldr	r3, [pc, #64]	; (8002ae8 <RCC_PLL_GetFreqDomain_SYS+0x60>)
+ 8002aa6:	607b      	str	r3, [r7, #4]
       }
       else
       {
         pllinputfreq = HSI_VALUE;
       }
       break;
- 80037a0:	e005      	b.n	80037ae <RCC_PLL_GetFreqDomain_SYS+0x2e>
+ 8002aa8:	e005      	b.n	8002ab6 <RCC_PLL_GetFreqDomain_SYS+0x2e>
         pllinputfreq = HSI_VALUE;
- 80037a2:	4b10      	ldr	r3, [pc, #64]	; (80037e4 <RCC_PLL_GetFreqDomain_SYS+0x64>)
- 80037a4:	607b      	str	r3, [r7, #4]
+ 8002aaa:	4b10      	ldr	r3, [pc, #64]	; (8002aec <RCC_PLL_GetFreqDomain_SYS+0x64>)
+ 8002aac:	607b      	str	r3, [r7, #4]
       break;
- 80037a6:	e002      	b.n	80037ae <RCC_PLL_GetFreqDomain_SYS+0x2e>
+ 8002aae:	e002      	b.n	8002ab6 <RCC_PLL_GetFreqDomain_SYS+0x2e>
 
     default:       /* HSE used as PLL clock source */
       pllinputfreq = HSE_VALUE;
- 80037a8:	4b0f      	ldr	r3, [pc, #60]	; (80037e8 <RCC_PLL_GetFreqDomain_SYS+0x68>)
- 80037aa:	607b      	str	r3, [r7, #4]
+ 8002ab0:	4b0f      	ldr	r3, [pc, #60]	; (8002af0 <RCC_PLL_GetFreqDomain_SYS+0x68>)
+ 8002ab2:	607b      	str	r3, [r7, #4]
       break;
- 80037ac:	46c0      	nop			; (mov r8, r8)
+ 8002ab4:	46c0      	nop			; (mov r8, r8)
   }
   return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator(), LL_RCC_PLL_GetDivider());
- 80037ae:	f7ff fef9 	bl	80035a4 <LL_RCC_PLL_GetMultiplicator>
- 80037b2:	0003      	movs	r3, r0
- 80037b4:	0c9b      	lsrs	r3, r3, #18
- 80037b6:	4a0d      	ldr	r2, [pc, #52]	; (80037ec <RCC_PLL_GetFreqDomain_SYS+0x6c>)
- 80037b8:	5cd3      	ldrb	r3, [r2, r3]
- 80037ba:	001a      	movs	r2, r3
- 80037bc:	687b      	ldr	r3, [r7, #4]
- 80037be:	4353      	muls	r3, r2
- 80037c0:	001c      	movs	r4, r3
- 80037c2:	f7ff fefb 	bl	80035bc <LL_RCC_PLL_GetDivider>
- 80037c6:	0003      	movs	r3, r0
- 80037c8:	0d9b      	lsrs	r3, r3, #22
- 80037ca:	3301      	adds	r3, #1
- 80037cc:	0019      	movs	r1, r3
- 80037ce:	0020      	movs	r0, r4
- 80037d0:	f7fc fca2 	bl	8000118 <__udivsi3>
- 80037d4:	0003      	movs	r3, r0
+ 8002ab6:	f7ff fef9 	bl	80028ac <LL_RCC_PLL_GetMultiplicator>
+ 8002aba:	0003      	movs	r3, r0
+ 8002abc:	0c9b      	lsrs	r3, r3, #18
+ 8002abe:	4a0d      	ldr	r2, [pc, #52]	; (8002af4 <RCC_PLL_GetFreqDomain_SYS+0x6c>)
+ 8002ac0:	5cd3      	ldrb	r3, [r2, r3]
+ 8002ac2:	001a      	movs	r2, r3
+ 8002ac4:	687b      	ldr	r3, [r7, #4]
+ 8002ac6:	4353      	muls	r3, r2
+ 8002ac8:	001c      	movs	r4, r3
+ 8002aca:	f7ff fefb 	bl	80028c4 <LL_RCC_PLL_GetDivider>
+ 8002ace:	0003      	movs	r3, r0
+ 8002ad0:	0d9b      	lsrs	r3, r3, #22
+ 8002ad2:	3301      	adds	r3, #1
+ 8002ad4:	0019      	movs	r1, r3
+ 8002ad6:	0020      	movs	r0, r4
+ 8002ad8:	f7fd fb1e 	bl	8000118 <__udivsi3>
+ 8002adc:	0003      	movs	r3, r0
 }
- 80037d6:	0018      	movs	r0, r3
- 80037d8:	46bd      	mov	sp, r7
- 80037da:	b003      	add	sp, #12
- 80037dc:	bd90      	pop	{r4, r7, pc}
- 80037de:	46c0      	nop			; (mov r8, r8)
- 80037e0:	003d0900 	.word	0x003d0900
- 80037e4:	00f42400 	.word	0x00f42400
- 80037e8:	007a1200 	.word	0x007a1200
- 80037ec:	08003cb0 	.word	0x08003cb0
+ 8002ade:	0018      	movs	r0, r3
+ 8002ae0:	46bd      	mov	sp, r7
+ 8002ae2:	b003      	add	sp, #12
+ 8002ae4:	bd90      	pop	{r4, r7, pc}
+ 8002ae6:	46c0      	nop			; (mov r8, r8)
+ 8002ae8:	003d0900 	.word	0x003d0900
+ 8002aec:	00f42400 	.word	0x00f42400
+ 8002af0:	007a1200 	.word	0x007a1200
+ 8002af4:	08004034 	.word	0x08004034
 
-080037f0 <LL_TIM_SetPrescaler>:
+08002af8 <LL_TIM_SetPrescaler>:
 {
- 80037f0:	b580      	push	{r7, lr}
- 80037f2:	b082      	sub	sp, #8
- 80037f4:	af00      	add	r7, sp, #0
- 80037f6:	6078      	str	r0, [r7, #4]
- 80037f8:	6039      	str	r1, [r7, #0]
+ 8002af8:	b580      	push	{r7, lr}
+ 8002afa:	b082      	sub	sp, #8
+ 8002afc:	af00      	add	r7, sp, #0
+ 8002afe:	6078      	str	r0, [r7, #4]
+ 8002b00:	6039      	str	r1, [r7, #0]
   WRITE_REG(TIMx->PSC, Prescaler);
- 80037fa:	687b      	ldr	r3, [r7, #4]
- 80037fc:	683a      	ldr	r2, [r7, #0]
- 80037fe:	629a      	str	r2, [r3, #40]	; 0x28
+ 8002b02:	687b      	ldr	r3, [r7, #4]
+ 8002b04:	683a      	ldr	r2, [r7, #0]
+ 8002b06:	629a      	str	r2, [r3, #40]	; 0x28
 }
- 8003800:	46c0      	nop			; (mov r8, r8)
- 8003802:	46bd      	mov	sp, r7
- 8003804:	b002      	add	sp, #8
- 8003806:	bd80      	pop	{r7, pc}
+ 8002b08:	46c0      	nop			; (mov r8, r8)
+ 8002b0a:	46bd      	mov	sp, r7
+ 8002b0c:	b002      	add	sp, #8
+ 8002b0e:	bd80      	pop	{r7, pc}
 
-08003808 <LL_TIM_SetAutoReload>:
+08002b10 <LL_TIM_SetAutoReload>:
 {
- 8003808:	b580      	push	{r7, lr}
- 800380a:	b082      	sub	sp, #8
- 800380c:	af00      	add	r7, sp, #0
- 800380e:	6078      	str	r0, [r7, #4]
- 8003810:	6039      	str	r1, [r7, #0]
+ 8002b10:	b580      	push	{r7, lr}
+ 8002b12:	b082      	sub	sp, #8
+ 8002b14:	af00      	add	r7, sp, #0
+ 8002b16:	6078      	str	r0, [r7, #4]
+ 8002b18:	6039      	str	r1, [r7, #0]
   WRITE_REG(TIMx->ARR, AutoReload);
- 8003812:	687b      	ldr	r3, [r7, #4]
- 8003814:	683a      	ldr	r2, [r7, #0]
- 8003816:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8002b1a:	687b      	ldr	r3, [r7, #4]
+ 8002b1c:	683a      	ldr	r2, [r7, #0]
+ 8002b1e:	62da      	str	r2, [r3, #44]	; 0x2c
 }
- 8003818:	46c0      	nop			; (mov r8, r8)
- 800381a:	46bd      	mov	sp, r7
- 800381c:	b002      	add	sp, #8
- 800381e:	bd80      	pop	{r7, pc}
+ 8002b20:	46c0      	nop			; (mov r8, r8)
+ 8002b22:	46bd      	mov	sp, r7
+ 8002b24:	b002      	add	sp, #8
+ 8002b26:	bd80      	pop	{r7, pc}
 
-08003820 <LL_TIM_GenerateEvent_UPDATE>:
+08002b28 <LL_TIM_GenerateEvent_UPDATE>:
   * @rmtoll EGR          UG            LL_TIM_GenerateEvent_UPDATE
   * @param  TIMx Timer instance
   * @retval None
   */
 __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)
 {
- 8003820:	b580      	push	{r7, lr}
- 8003822:	b082      	sub	sp, #8
- 8003824:	af00      	add	r7, sp, #0
- 8003826:	6078      	str	r0, [r7, #4]
+ 8002b28:	b580      	push	{r7, lr}
+ 8002b2a:	b082      	sub	sp, #8
+ 8002b2c:	af00      	add	r7, sp, #0
+ 8002b2e:	6078      	str	r0, [r7, #4]
   SET_BIT(TIMx->EGR, TIM_EGR_UG);
- 8003828:	687b      	ldr	r3, [r7, #4]
- 800382a:	695b      	ldr	r3, [r3, #20]
- 800382c:	2201      	movs	r2, #1
- 800382e:	431a      	orrs	r2, r3
- 8003830:	687b      	ldr	r3, [r7, #4]
- 8003832:	615a      	str	r2, [r3, #20]
+ 8002b30:	687b      	ldr	r3, [r7, #4]
+ 8002b32:	695b      	ldr	r3, [r3, #20]
+ 8002b34:	2201      	movs	r2, #1
+ 8002b36:	431a      	orrs	r2, r3
+ 8002b38:	687b      	ldr	r3, [r7, #4]
+ 8002b3a:	615a      	str	r2, [r3, #20]
 }
- 8003834:	46c0      	nop			; (mov r8, r8)
- 8003836:	46bd      	mov	sp, r7
- 8003838:	b002      	add	sp, #8
- 800383a:	bd80      	pop	{r7, pc}
+ 8002b3c:	46c0      	nop			; (mov r8, r8)
+ 8002b3e:	46bd      	mov	sp, r7
+ 8002b40:	b002      	add	sp, #8
+ 8002b42:	bd80      	pop	{r7, pc}
 
-0800383c <LL_TIM_Init>:
+08002b44 <LL_TIM_Init>:
   * @retval An ErrorStatus enumeration value:
   *          - SUCCESS: TIMx registers are de-initialized
   *          - ERROR: not applicable
   */
 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)
 {
- 800383c:	b580      	push	{r7, lr}
- 800383e:	b084      	sub	sp, #16
- 8003840:	af00      	add	r7, sp, #0
- 8003842:	6078      	str	r0, [r7, #4]
- 8003844:	6039      	str	r1, [r7, #0]
+ 8002b44:	b580      	push	{r7, lr}
+ 8002b46:	b084      	sub	sp, #16
+ 8002b48:	af00      	add	r7, sp, #0
+ 8002b4a:	6078      	str	r0, [r7, #4]
+ 8002b4c:	6039      	str	r1, [r7, #0]
   /* Check the parameters */
   assert_param(IS_TIM_INSTANCE(TIMx));
   assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode));
   assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision));
 
   tmpcr1 = LL_TIM_ReadReg(TIMx, CR1);
- 8003846:	687b      	ldr	r3, [r7, #4]
- 8003848:	681b      	ldr	r3, [r3, #0]
- 800384a:	60fb      	str	r3, [r7, #12]
+ 8002b4e:	687b      	ldr	r3, [r7, #4]
+ 8002b50:	681b      	ldr	r3, [r3, #0]
+ 8002b52:	60fb      	str	r3, [r7, #12]
 
   if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
- 800384c:	687a      	ldr	r2, [r7, #4]
- 800384e:	2380      	movs	r3, #128	; 0x80
- 8003850:	05db      	lsls	r3, r3, #23
- 8003852:	429a      	cmp	r2, r3
- 8003854:	d007      	beq.n	8003866 <LL_TIM_Init+0x2a>
- 8003856:	687b      	ldr	r3, [r7, #4]
- 8003858:	4a1e      	ldr	r2, [pc, #120]	; (80038d4 <LL_TIM_Init+0x98>)
- 800385a:	4293      	cmp	r3, r2
- 800385c:	d003      	beq.n	8003866 <LL_TIM_Init+0x2a>
- 800385e:	687b      	ldr	r3, [r7, #4]
- 8003860:	4a1d      	ldr	r2, [pc, #116]	; (80038d8 <LL_TIM_Init+0x9c>)
- 8003862:	4293      	cmp	r3, r2
- 8003864:	d107      	bne.n	8003876 <LL_TIM_Init+0x3a>
+ 8002b54:	687a      	ldr	r2, [r7, #4]
+ 8002b56:	2380      	movs	r3, #128	; 0x80
+ 8002b58:	05db      	lsls	r3, r3, #23
+ 8002b5a:	429a      	cmp	r2, r3
+ 8002b5c:	d007      	beq.n	8002b6e <LL_TIM_Init+0x2a>
+ 8002b5e:	687b      	ldr	r3, [r7, #4]
+ 8002b60:	4a1e      	ldr	r2, [pc, #120]	; (8002bdc <LL_TIM_Init+0x98>)
+ 8002b62:	4293      	cmp	r3, r2
+ 8002b64:	d003      	beq.n	8002b6e <LL_TIM_Init+0x2a>
+ 8002b66:	687b      	ldr	r3, [r7, #4]
+ 8002b68:	4a1d      	ldr	r2, [pc, #116]	; (8002be0 <LL_TIM_Init+0x9c>)
+ 8002b6a:	4293      	cmp	r3, r2
+ 8002b6c:	d107      	bne.n	8002b7e <LL_TIM_Init+0x3a>
   {
     /* Select the Counter Mode */
     MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode);
- 8003866:	68fb      	ldr	r3, [r7, #12]
- 8003868:	2270      	movs	r2, #112	; 0x70
- 800386a:	4393      	bics	r3, r2
- 800386c:	001a      	movs	r2, r3
- 800386e:	683b      	ldr	r3, [r7, #0]
- 8003870:	685b      	ldr	r3, [r3, #4]
- 8003872:	4313      	orrs	r3, r2
- 8003874:	60fb      	str	r3, [r7, #12]
+ 8002b6e:	68fb      	ldr	r3, [r7, #12]
+ 8002b70:	2270      	movs	r2, #112	; 0x70
+ 8002b72:	4393      	bics	r3, r2
+ 8002b74:	001a      	movs	r2, r3
+ 8002b76:	683b      	ldr	r3, [r7, #0]
+ 8002b78:	685b      	ldr	r3, [r3, #4]
+ 8002b7a:	4313      	orrs	r3, r2
+ 8002b7c:	60fb      	str	r3, [r7, #12]
   }
 
   if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
- 8003876:	687a      	ldr	r2, [r7, #4]
- 8003878:	2380      	movs	r3, #128	; 0x80
- 800387a:	05db      	lsls	r3, r3, #23
- 800387c:	429a      	cmp	r2, r3
- 800387e:	d007      	beq.n	8003890 <LL_TIM_Init+0x54>
- 8003880:	687b      	ldr	r3, [r7, #4]
- 8003882:	4a14      	ldr	r2, [pc, #80]	; (80038d4 <LL_TIM_Init+0x98>)
- 8003884:	4293      	cmp	r3, r2
- 8003886:	d003      	beq.n	8003890 <LL_TIM_Init+0x54>
- 8003888:	687b      	ldr	r3, [r7, #4]
- 800388a:	4a13      	ldr	r2, [pc, #76]	; (80038d8 <LL_TIM_Init+0x9c>)
- 800388c:	4293      	cmp	r3, r2
- 800388e:	d106      	bne.n	800389e <LL_TIM_Init+0x62>
+ 8002b7e:	687a      	ldr	r2, [r7, #4]
+ 8002b80:	2380      	movs	r3, #128	; 0x80
+ 8002b82:	05db      	lsls	r3, r3, #23
+ 8002b84:	429a      	cmp	r2, r3
+ 8002b86:	d007      	beq.n	8002b98 <LL_TIM_Init+0x54>
+ 8002b88:	687b      	ldr	r3, [r7, #4]
+ 8002b8a:	4a14      	ldr	r2, [pc, #80]	; (8002bdc <LL_TIM_Init+0x98>)
+ 8002b8c:	4293      	cmp	r3, r2
+ 8002b8e:	d003      	beq.n	8002b98 <LL_TIM_Init+0x54>
+ 8002b90:	687b      	ldr	r3, [r7, #4]
+ 8002b92:	4a13      	ldr	r2, [pc, #76]	; (8002be0 <LL_TIM_Init+0x9c>)
+ 8002b94:	4293      	cmp	r3, r2
+ 8002b96:	d106      	bne.n	8002ba6 <LL_TIM_Init+0x62>
   {
     /* Set the clock division */
     MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision);
- 8003890:	68fb      	ldr	r3, [r7, #12]
- 8003892:	4a12      	ldr	r2, [pc, #72]	; (80038dc <LL_TIM_Init+0xa0>)
- 8003894:	401a      	ands	r2, r3
- 8003896:	683b      	ldr	r3, [r7, #0]
- 8003898:	68db      	ldr	r3, [r3, #12]
- 800389a:	4313      	orrs	r3, r2
- 800389c:	60fb      	str	r3, [r7, #12]
+ 8002b98:	68fb      	ldr	r3, [r7, #12]
+ 8002b9a:	4a12      	ldr	r2, [pc, #72]	; (8002be4 <LL_TIM_Init+0xa0>)
+ 8002b9c:	401a      	ands	r2, r3
+ 8002b9e:	683b      	ldr	r3, [r7, #0]
+ 8002ba0:	68db      	ldr	r3, [r3, #12]
+ 8002ba2:	4313      	orrs	r3, r2
+ 8002ba4:	60fb      	str	r3, [r7, #12]
   }
 
   /* Write to TIMx CR1 */
   LL_TIM_WriteReg(TIMx, CR1, tmpcr1);
- 800389e:	687b      	ldr	r3, [r7, #4]
- 80038a0:	68fa      	ldr	r2, [r7, #12]
- 80038a2:	601a      	str	r2, [r3, #0]
+ 8002ba6:	687b      	ldr	r3, [r7, #4]
+ 8002ba8:	68fa      	ldr	r2, [r7, #12]
+ 8002baa:	601a      	str	r2, [r3, #0]
 
   /* Set the Autoreload value */
   LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload);
- 80038a4:	683b      	ldr	r3, [r7, #0]
- 80038a6:	689a      	ldr	r2, [r3, #8]
- 80038a8:	687b      	ldr	r3, [r7, #4]
- 80038aa:	0011      	movs	r1, r2
- 80038ac:	0018      	movs	r0, r3
- 80038ae:	f7ff ffab 	bl	8003808 <LL_TIM_SetAutoReload>
+ 8002bac:	683b      	ldr	r3, [r7, #0]
+ 8002bae:	689a      	ldr	r2, [r3, #8]
+ 8002bb0:	687b      	ldr	r3, [r7, #4]
+ 8002bb2:	0011      	movs	r1, r2
+ 8002bb4:	0018      	movs	r0, r3
+ 8002bb6:	f7ff ffab 	bl	8002b10 <LL_TIM_SetAutoReload>
 
   /* Set the Prescaler value */
   LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler);
- 80038b2:	683b      	ldr	r3, [r7, #0]
- 80038b4:	881b      	ldrh	r3, [r3, #0]
- 80038b6:	001a      	movs	r2, r3
- 80038b8:	687b      	ldr	r3, [r7, #4]
- 80038ba:	0011      	movs	r1, r2
- 80038bc:	0018      	movs	r0, r3
- 80038be:	f7ff ff97 	bl	80037f0 <LL_TIM_SetPrescaler>
+ 8002bba:	683b      	ldr	r3, [r7, #0]
+ 8002bbc:	881b      	ldrh	r3, [r3, #0]
+ 8002bbe:	001a      	movs	r2, r3
+ 8002bc0:	687b      	ldr	r3, [r7, #4]
+ 8002bc2:	0011      	movs	r1, r2
+ 8002bc4:	0018      	movs	r0, r3
+ 8002bc6:	f7ff ff97 	bl	8002af8 <LL_TIM_SetPrescaler>
   /* Generate an update event to reload the Prescaler
      and the repetition counter value (if applicable) immediately */
   LL_TIM_GenerateEvent_UPDATE(TIMx);
- 80038c2:	687b      	ldr	r3, [r7, #4]
- 80038c4:	0018      	movs	r0, r3
- 80038c6:	f7ff ffab 	bl	8003820 <LL_TIM_GenerateEvent_UPDATE>
+ 8002bca:	687b      	ldr	r3, [r7, #4]
+ 8002bcc:	0018      	movs	r0, r3
+ 8002bce:	f7ff ffab 	bl	8002b28 <LL_TIM_GenerateEvent_UPDATE>
 
   return SUCCESS;
- 80038ca:	2300      	movs	r3, #0
+ 8002bd2:	2300      	movs	r3, #0
 }
- 80038cc:	0018      	movs	r0, r3
- 80038ce:	46bd      	mov	sp, r7
- 80038d0:	b004      	add	sp, #16
- 80038d2:	bd80      	pop	{r7, pc}
- 80038d4:	40010800 	.word	0x40010800
- 80038d8:	40011400 	.word	0x40011400
- 80038dc:	fffffcff 	.word	0xfffffcff
+ 8002bd4:	0018      	movs	r0, r3
+ 8002bd6:	46bd      	mov	sp, r7
+ 8002bd8:	b004      	add	sp, #16
+ 8002bda:	bd80      	pop	{r7, pc}
+ 8002bdc:	40010800 	.word	0x40010800
+ 8002be0:	40011400 	.word	0x40011400
+ 8002be4:	fffffcff 	.word	0xfffffcff
 
-080038e0 <LL_USART_IsEnabled>:
+08002be8 <LL_USART_IsEnabled>:
 {
- 80038e0:	b580      	push	{r7, lr}
- 80038e2:	b082      	sub	sp, #8
- 80038e4:	af00      	add	r7, sp, #0
- 80038e6:	6078      	str	r0, [r7, #4]
+ 8002be8:	b580      	push	{r7, lr}
+ 8002bea:	b082      	sub	sp, #8
+ 8002bec:	af00      	add	r7, sp, #0
+ 8002bee:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
- 80038e8:	687b      	ldr	r3, [r7, #4]
- 80038ea:	681b      	ldr	r3, [r3, #0]
- 80038ec:	2201      	movs	r2, #1
- 80038ee:	4013      	ands	r3, r2
- 80038f0:	2b01      	cmp	r3, #1
- 80038f2:	d101      	bne.n	80038f8 <LL_USART_IsEnabled+0x18>
- 80038f4:	2301      	movs	r3, #1
- 80038f6:	e000      	b.n	80038fa <LL_USART_IsEnabled+0x1a>
- 80038f8:	2300      	movs	r3, #0
+ 8002bf0:	687b      	ldr	r3, [r7, #4]
+ 8002bf2:	681b      	ldr	r3, [r3, #0]
+ 8002bf4:	2201      	movs	r2, #1
+ 8002bf6:	4013      	ands	r3, r2
+ 8002bf8:	2b01      	cmp	r3, #1
+ 8002bfa:	d101      	bne.n	8002c00 <LL_USART_IsEnabled+0x18>
+ 8002bfc:	2301      	movs	r3, #1
+ 8002bfe:	e000      	b.n	8002c02 <LL_USART_IsEnabled+0x1a>
+ 8002c00:	2300      	movs	r3, #0
 }
- 80038fa:	0018      	movs	r0, r3
- 80038fc:	46bd      	mov	sp, r7
- 80038fe:	b002      	add	sp, #8
- 8003900:	bd80      	pop	{r7, pc}
+ 8002c02:	0018      	movs	r0, r3
+ 8002c04:	46bd      	mov	sp, r7
+ 8002c06:	b002      	add	sp, #8
+ 8002c08:	bd80      	pop	{r7, pc}
 	...
 
-08003904 <LL_USART_SetStopBitsLength>:
+08002c0c <LL_USART_SetStopBitsLength>:
 {
- 8003904:	b580      	push	{r7, lr}
- 8003906:	b082      	sub	sp, #8
- 8003908:	af00      	add	r7, sp, #0
- 800390a:	6078      	str	r0, [r7, #4]
- 800390c:	6039      	str	r1, [r7, #0]
+ 8002c0c:	b580      	push	{r7, lr}
+ 8002c0e:	b082      	sub	sp, #8
+ 8002c10:	af00      	add	r7, sp, #0
+ 8002c12:	6078      	str	r0, [r7, #4]
+ 8002c14:	6039      	str	r1, [r7, #0]
   MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
- 800390e:	687b      	ldr	r3, [r7, #4]
- 8003910:	685b      	ldr	r3, [r3, #4]
- 8003912:	4a05      	ldr	r2, [pc, #20]	; (8003928 <LL_USART_SetStopBitsLength+0x24>)
- 8003914:	401a      	ands	r2, r3
- 8003916:	683b      	ldr	r3, [r7, #0]
- 8003918:	431a      	orrs	r2, r3
- 800391a:	687b      	ldr	r3, [r7, #4]
- 800391c:	605a      	str	r2, [r3, #4]
+ 8002c16:	687b      	ldr	r3, [r7, #4]
+ 8002c18:	685b      	ldr	r3, [r3, #4]
+ 8002c1a:	4a05      	ldr	r2, [pc, #20]	; (8002c30 <LL_USART_SetStopBitsLength+0x24>)
+ 8002c1c:	401a      	ands	r2, r3
+ 8002c1e:	683b      	ldr	r3, [r7, #0]
+ 8002c20:	431a      	orrs	r2, r3
+ 8002c22:	687b      	ldr	r3, [r7, #4]
+ 8002c24:	605a      	str	r2, [r3, #4]
 }
- 800391e:	46c0      	nop			; (mov r8, r8)
- 8003920:	46bd      	mov	sp, r7
- 8003922:	b002      	add	sp, #8
- 8003924:	bd80      	pop	{r7, pc}
- 8003926:	46c0      	nop			; (mov r8, r8)
- 8003928:	ffffcfff 	.word	0xffffcfff
+ 8002c26:	46c0      	nop			; (mov r8, r8)
+ 8002c28:	46bd      	mov	sp, r7
+ 8002c2a:	b002      	add	sp, #8
+ 8002c2c:	bd80      	pop	{r7, pc}
+ 8002c2e:	46c0      	nop			; (mov r8, r8)
+ 8002c30:	ffffcfff 	.word	0xffffcfff
 
-0800392c <LL_USART_SetHWFlowCtrl>:
+08002c34 <LL_USART_SetHWFlowCtrl>:
 {
- 800392c:	b580      	push	{r7, lr}
- 800392e:	b082      	sub	sp, #8
- 8003930:	af00      	add	r7, sp, #0
- 8003932:	6078      	str	r0, [r7, #4]
- 8003934:	6039      	str	r1, [r7, #0]
+ 8002c34:	b580      	push	{r7, lr}
+ 8002c36:	b082      	sub	sp, #8
+ 8002c38:	af00      	add	r7, sp, #0
+ 8002c3a:	6078      	str	r0, [r7, #4]
+ 8002c3c:	6039      	str	r1, [r7, #0]
   MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
- 8003936:	687b      	ldr	r3, [r7, #4]
- 8003938:	689b      	ldr	r3, [r3, #8]
- 800393a:	4a05      	ldr	r2, [pc, #20]	; (8003950 <LL_USART_SetHWFlowCtrl+0x24>)
- 800393c:	401a      	ands	r2, r3
- 800393e:	683b      	ldr	r3, [r7, #0]
- 8003940:	431a      	orrs	r2, r3
- 8003942:	687b      	ldr	r3, [r7, #4]
- 8003944:	609a      	str	r2, [r3, #8]
+ 8002c3e:	687b      	ldr	r3, [r7, #4]
+ 8002c40:	689b      	ldr	r3, [r3, #8]
+ 8002c42:	4a05      	ldr	r2, [pc, #20]	; (8002c58 <LL_USART_SetHWFlowCtrl+0x24>)
+ 8002c44:	401a      	ands	r2, r3
+ 8002c46:	683b      	ldr	r3, [r7, #0]
+ 8002c48:	431a      	orrs	r2, r3
+ 8002c4a:	687b      	ldr	r3, [r7, #4]
+ 8002c4c:	609a      	str	r2, [r3, #8]
 }
- 8003946:	46c0      	nop			; (mov r8, r8)
- 8003948:	46bd      	mov	sp, r7
- 800394a:	b002      	add	sp, #8
- 800394c:	bd80      	pop	{r7, pc}
- 800394e:	46c0      	nop			; (mov r8, r8)
- 8003950:	fffffcff 	.word	0xfffffcff
+ 8002c4e:	46c0      	nop			; (mov r8, r8)
+ 8002c50:	46bd      	mov	sp, r7
+ 8002c52:	b002      	add	sp, #8
+ 8002c54:	bd80      	pop	{r7, pc}
+ 8002c56:	46c0      	nop			; (mov r8, r8)
+ 8002c58:	fffffcff 	.word	0xfffffcff
 
-08003954 <LL_USART_SetBaudRate>:
+08002c5c <LL_USART_SetBaudRate>:
 {
- 8003954:	b580      	push	{r7, lr}
- 8003956:	b086      	sub	sp, #24
- 8003958:	af00      	add	r7, sp, #0
- 800395a:	60f8      	str	r0, [r7, #12]
- 800395c:	60b9      	str	r1, [r7, #8]
- 800395e:	607a      	str	r2, [r7, #4]
- 8003960:	603b      	str	r3, [r7, #0]
+ 8002c5c:	b580      	push	{r7, lr}
+ 8002c5e:	b086      	sub	sp, #24
+ 8002c60:	af00      	add	r7, sp, #0
+ 8002c62:	60f8      	str	r0, [r7, #12]
+ 8002c64:	60b9      	str	r1, [r7, #8]
+ 8002c66:	607a      	str	r2, [r7, #4]
+ 8002c68:	603b      	str	r3, [r7, #0]
   if (OverSampling == LL_USART_OVERSAMPLING_8)
- 8003962:	687a      	ldr	r2, [r7, #4]
- 8003964:	2380      	movs	r3, #128	; 0x80
- 8003966:	021b      	lsls	r3, r3, #8
- 8003968:	429a      	cmp	r2, r3
- 800396a:	d11c      	bne.n	80039a6 <LL_USART_SetBaudRate+0x52>
+ 8002c6a:	687a      	ldr	r2, [r7, #4]
+ 8002c6c:	2380      	movs	r3, #128	; 0x80
+ 8002c6e:	021b      	lsls	r3, r3, #8
+ 8002c70:	429a      	cmp	r2, r3
+ 8002c72:	d11c      	bne.n	8002cae <LL_USART_SetBaudRate+0x52>
     usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
- 800396c:	68bb      	ldr	r3, [r7, #8]
- 800396e:	005a      	lsls	r2, r3, #1
- 8003970:	683b      	ldr	r3, [r7, #0]
- 8003972:	085b      	lsrs	r3, r3, #1
- 8003974:	18d3      	adds	r3, r2, r3
- 8003976:	6839      	ldr	r1, [r7, #0]
- 8003978:	0018      	movs	r0, r3
- 800397a:	f7fc fbcd 	bl	8000118 <__udivsi3>
- 800397e:	0003      	movs	r3, r0
- 8003980:	b29b      	uxth	r3, r3
- 8003982:	617b      	str	r3, [r7, #20]
+ 8002c74:	68bb      	ldr	r3, [r7, #8]
+ 8002c76:	005a      	lsls	r2, r3, #1
+ 8002c78:	683b      	ldr	r3, [r7, #0]
+ 8002c7a:	085b      	lsrs	r3, r3, #1
+ 8002c7c:	18d3      	adds	r3, r2, r3
+ 8002c7e:	6839      	ldr	r1, [r7, #0]
+ 8002c80:	0018      	movs	r0, r3
+ 8002c82:	f7fd fa49 	bl	8000118 <__udivsi3>
+ 8002c86:	0003      	movs	r3, r0
+ 8002c88:	b29b      	uxth	r3, r3
+ 8002c8a:	617b      	str	r3, [r7, #20]
     brrtemp = usartdiv & 0xFFF0U;
- 8003984:	697b      	ldr	r3, [r7, #20]
- 8003986:	4a10      	ldr	r2, [pc, #64]	; (80039c8 <LL_USART_SetBaudRate+0x74>)
- 8003988:	4013      	ands	r3, r2
- 800398a:	613b      	str	r3, [r7, #16]
+ 8002c8c:	697b      	ldr	r3, [r7, #20]
+ 8002c8e:	4a10      	ldr	r2, [pc, #64]	; (8002cd0 <LL_USART_SetBaudRate+0x74>)
+ 8002c90:	4013      	ands	r3, r2
+ 8002c92:	613b      	str	r3, [r7, #16]
     brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
- 800398c:	697b      	ldr	r3, [r7, #20]
- 800398e:	085b      	lsrs	r3, r3, #1
- 8003990:	b29b      	uxth	r3, r3
- 8003992:	001a      	movs	r2, r3
- 8003994:	2307      	movs	r3, #7
- 8003996:	4013      	ands	r3, r2
- 8003998:	693a      	ldr	r2, [r7, #16]
- 800399a:	4313      	orrs	r3, r2
- 800399c:	613b      	str	r3, [r7, #16]
+ 8002c94:	697b      	ldr	r3, [r7, #20]
+ 8002c96:	085b      	lsrs	r3, r3, #1
+ 8002c98:	b29b      	uxth	r3, r3
+ 8002c9a:	001a      	movs	r2, r3
+ 8002c9c:	2307      	movs	r3, #7
+ 8002c9e:	4013      	ands	r3, r2
+ 8002ca0:	693a      	ldr	r2, [r7, #16]
+ 8002ca2:	4313      	orrs	r3, r2
+ 8002ca4:	613b      	str	r3, [r7, #16]
     USARTx->BRR = brrtemp;
- 800399e:	68fb      	ldr	r3, [r7, #12]
- 80039a0:	693a      	ldr	r2, [r7, #16]
- 80039a2:	60da      	str	r2, [r3, #12]
+ 8002ca6:	68fb      	ldr	r3, [r7, #12]
+ 8002ca8:	693a      	ldr	r2, [r7, #16]
+ 8002caa:	60da      	str	r2, [r3, #12]
 }
- 80039a4:	e00c      	b.n	80039c0 <LL_USART_SetBaudRate+0x6c>
+ 8002cac:	e00c      	b.n	8002cc8 <LL_USART_SetBaudRate+0x6c>
     USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
- 80039a6:	683b      	ldr	r3, [r7, #0]
- 80039a8:	085a      	lsrs	r2, r3, #1
- 80039aa:	68bb      	ldr	r3, [r7, #8]
- 80039ac:	18d3      	adds	r3, r2, r3
- 80039ae:	6839      	ldr	r1, [r7, #0]
- 80039b0:	0018      	movs	r0, r3
- 80039b2:	f7fc fbb1 	bl	8000118 <__udivsi3>
- 80039b6:	0003      	movs	r3, r0
- 80039b8:	b29b      	uxth	r3, r3
- 80039ba:	001a      	movs	r2, r3
- 80039bc:	68fb      	ldr	r3, [r7, #12]
- 80039be:	60da      	str	r2, [r3, #12]
+ 8002cae:	683b      	ldr	r3, [r7, #0]
+ 8002cb0:	085a      	lsrs	r2, r3, #1
+ 8002cb2:	68bb      	ldr	r3, [r7, #8]
+ 8002cb4:	18d3      	adds	r3, r2, r3
+ 8002cb6:	6839      	ldr	r1, [r7, #0]
+ 8002cb8:	0018      	movs	r0, r3
+ 8002cba:	f7fd fa2d 	bl	8000118 <__udivsi3>
+ 8002cbe:	0003      	movs	r3, r0
+ 8002cc0:	b29b      	uxth	r3, r3
+ 8002cc2:	001a      	movs	r2, r3
+ 8002cc4:	68fb      	ldr	r3, [r7, #12]
+ 8002cc6:	60da      	str	r2, [r3, #12]
 }
- 80039c0:	46c0      	nop			; (mov r8, r8)
- 80039c2:	46bd      	mov	sp, r7
- 80039c4:	b006      	add	sp, #24
- 80039c6:	bd80      	pop	{r7, pc}
- 80039c8:	0000fff0 	.word	0x0000fff0
+ 8002cc8:	46c0      	nop			; (mov r8, r8)
+ 8002cca:	46bd      	mov	sp, r7
+ 8002ccc:	b006      	add	sp, #24
+ 8002cce:	bd80      	pop	{r7, pc}
+ 8002cd0:	0000fff0 	.word	0x0000fff0
 
-080039cc <LL_USART_Init>:
+08002cd4 <LL_USART_Init>:
   * @retval An ErrorStatus enumeration value:
   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
   *          - ERROR: Problem occurred during USART Registers initialization
   */
 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
 {
- 80039cc:	b580      	push	{r7, lr}
- 80039ce:	b084      	sub	sp, #16
- 80039d0:	af00      	add	r7, sp, #0
- 80039d2:	6078      	str	r0, [r7, #4]
- 80039d4:	6039      	str	r1, [r7, #0]
+ 8002cd4:	b580      	push	{r7, lr}
+ 8002cd6:	b084      	sub	sp, #16
+ 8002cd8:	af00      	add	r7, sp, #0
+ 8002cda:	6078      	str	r0, [r7, #4]
+ 8002cdc:	6039      	str	r1, [r7, #0]
   ErrorStatus status = ERROR;
- 80039d6:	230f      	movs	r3, #15
- 80039d8:	18fb      	adds	r3, r7, r3
- 80039da:	2201      	movs	r2, #1
- 80039dc:	701a      	strb	r2, [r3, #0]
+ 8002cde:	230f      	movs	r3, #15
+ 8002ce0:	18fb      	adds	r3, r7, r3
+ 8002ce2:	2201      	movs	r2, #1
+ 8002ce4:	701a      	strb	r2, [r3, #0]
   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
- 80039de:	2300      	movs	r3, #0
- 80039e0:	60bb      	str	r3, [r7, #8]
+ 8002ce6:	2300      	movs	r3, #0
+ 8002ce8:	60bb      	str	r3, [r7, #8]
   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
 
   /* USART needs to be in disabled state, in order to be able to configure some bits in
      CRx registers */
   if (LL_USART_IsEnabled(USARTx) == 0U)
- 80039e2:	687b      	ldr	r3, [r7, #4]
- 80039e4:	0018      	movs	r0, r3
- 80039e6:	f7ff ff7b 	bl	80038e0 <LL_USART_IsEnabled>
- 80039ea:	1e03      	subs	r3, r0, #0
- 80039ec:	d13b      	bne.n	8003a66 <LL_USART_Init+0x9a>
+ 8002cea:	687b      	ldr	r3, [r7, #4]
+ 8002cec:	0018      	movs	r0, r3
+ 8002cee:	f7ff ff7b 	bl	8002be8 <LL_USART_IsEnabled>
+ 8002cf2:	1e03      	subs	r3, r0, #0
+ 8002cf4:	d13b      	bne.n	8002d6e <LL_USART_Init+0x9a>
      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
      */
     MODIFY_REG(USARTx->CR1,
- 80039ee:	687b      	ldr	r3, [r7, #4]
- 80039f0:	681b      	ldr	r3, [r3, #0]
- 80039f2:	4a20      	ldr	r2, [pc, #128]	; (8003a74 <LL_USART_Init+0xa8>)
- 80039f4:	401a      	ands	r2, r3
- 80039f6:	683b      	ldr	r3, [r7, #0]
- 80039f8:	6859      	ldr	r1, [r3, #4]
- 80039fa:	683b      	ldr	r3, [r7, #0]
- 80039fc:	68db      	ldr	r3, [r3, #12]
- 80039fe:	4319      	orrs	r1, r3
- 8003a00:	683b      	ldr	r3, [r7, #0]
- 8003a02:	691b      	ldr	r3, [r3, #16]
- 8003a04:	4319      	orrs	r1, r3
- 8003a06:	683b      	ldr	r3, [r7, #0]
- 8003a08:	699b      	ldr	r3, [r3, #24]
- 8003a0a:	430b      	orrs	r3, r1
- 8003a0c:	431a      	orrs	r2, r3
- 8003a0e:	687b      	ldr	r3, [r7, #4]
- 8003a10:	601a      	str	r2, [r3, #0]
+ 8002cf6:	687b      	ldr	r3, [r7, #4]
+ 8002cf8:	681b      	ldr	r3, [r3, #0]
+ 8002cfa:	4a20      	ldr	r2, [pc, #128]	; (8002d7c <LL_USART_Init+0xa8>)
+ 8002cfc:	401a      	ands	r2, r3
+ 8002cfe:	683b      	ldr	r3, [r7, #0]
+ 8002d00:	6859      	ldr	r1, [r3, #4]
+ 8002d02:	683b      	ldr	r3, [r7, #0]
+ 8002d04:	68db      	ldr	r3, [r3, #12]
+ 8002d06:	4319      	orrs	r1, r3
+ 8002d08:	683b      	ldr	r3, [r7, #0]
+ 8002d0a:	691b      	ldr	r3, [r3, #16]
+ 8002d0c:	4319      	orrs	r1, r3
+ 8002d0e:	683b      	ldr	r3, [r7, #0]
+ 8002d10:	699b      	ldr	r3, [r3, #24]
+ 8002d12:	430b      	orrs	r3, r1
+ 8002d14:	431a      	orrs	r2, r3
+ 8002d16:	687b      	ldr	r3, [r7, #4]
+ 8002d18:	601a      	str	r2, [r3, #0]
     /*---------------------------- USART CR2 Configuration ---------------------
      * Configure USARTx CR2 (Stop bits) with parameters:
      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
      */
     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
- 8003a12:	683b      	ldr	r3, [r7, #0]
- 8003a14:	689a      	ldr	r2, [r3, #8]
- 8003a16:	687b      	ldr	r3, [r7, #4]
- 8003a18:	0011      	movs	r1, r2
- 8003a1a:	0018      	movs	r0, r3
- 8003a1c:	f7ff ff72 	bl	8003904 <LL_USART_SetStopBitsLength>
+ 8002d1a:	683b      	ldr	r3, [r7, #0]
+ 8002d1c:	689a      	ldr	r2, [r3, #8]
+ 8002d1e:	687b      	ldr	r3, [r7, #4]
+ 8002d20:	0011      	movs	r1, r2
+ 8002d22:	0018      	movs	r0, r3
+ 8002d24:	f7ff ff72 	bl	8002c0c <LL_USART_SetStopBitsLength>
     /*---------------------------- USART CR3 Configuration ---------------------
      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
      *   USART_InitStruct->HardwareFlowControl value.
      */
     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
- 8003a20:	683b      	ldr	r3, [r7, #0]
- 8003a22:	695a      	ldr	r2, [r3, #20]
- 8003a24:	687b      	ldr	r3, [r7, #4]
- 8003a26:	0011      	movs	r1, r2
- 8003a28:	0018      	movs	r0, r3
- 8003a2a:	f7ff ff7f 	bl	800392c <LL_USART_SetHWFlowCtrl>
+ 8002d28:	683b      	ldr	r3, [r7, #0]
+ 8002d2a:	695a      	ldr	r2, [r3, #20]
+ 8002d2c:	687b      	ldr	r3, [r7, #4]
+ 8002d2e:	0011      	movs	r1, r2
+ 8002d30:	0018      	movs	r0, r3
+ 8002d32:	f7ff ff7f 	bl	8002c34 <LL_USART_SetHWFlowCtrl>
     }
 #endif /* USART1 */
 #if defined(USART1)
     else if (USARTx == USART2)
 #else
     if (USARTx == USART2)
- 8003a2e:	687b      	ldr	r3, [r7, #4]
- 8003a30:	4a11      	ldr	r2, [pc, #68]	; (8003a78 <LL_USART_Init+0xac>)
- 8003a32:	4293      	cmp	r3, r2
- 8003a34:	d104      	bne.n	8003a40 <LL_USART_Init+0x74>
+ 8002d36:	687b      	ldr	r3, [r7, #4]
+ 8002d38:	4a11      	ldr	r2, [pc, #68]	; (8002d80 <LL_USART_Init+0xac>)
+ 8002d3a:	4293      	cmp	r3, r2
+ 8002d3c:	d104      	bne.n	8002d48 <LL_USART_Init+0x74>
 #endif /* USART1 */
     {
       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
- 8003a36:	200c      	movs	r0, #12
- 8003a38:	f7ff fddc 	bl	80035f4 <LL_RCC_GetUSARTClockFreq>
- 8003a3c:	0003      	movs	r3, r0
- 8003a3e:	60bb      	str	r3, [r7, #8]
+ 8002d3e:	200c      	movs	r0, #12
+ 8002d40:	f7ff fddc 	bl	80028fc <LL_RCC_GetUSARTClockFreq>
+ 8002d44:	0003      	movs	r3, r0
+ 8002d46:	60bb      	str	r3, [r7, #8]
 
     /* Configure the USART Baud Rate :
        - valid baud rate value (different from 0) is required
        - Peripheral clock as returned by RCC service, should be valid (different from 0).
     */
     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
- 8003a40:	68bb      	ldr	r3, [r7, #8]
- 8003a42:	2b00      	cmp	r3, #0
- 8003a44:	d00f      	beq.n	8003a66 <LL_USART_Init+0x9a>
+ 8002d48:	68bb      	ldr	r3, [r7, #8]
+ 8002d4a:	2b00      	cmp	r3, #0
+ 8002d4c:	d00f      	beq.n	8002d6e <LL_USART_Init+0x9a>
         && (USART_InitStruct->BaudRate != 0U))
- 8003a46:	683b      	ldr	r3, [r7, #0]
- 8003a48:	681b      	ldr	r3, [r3, #0]
- 8003a4a:	2b00      	cmp	r3, #0
- 8003a4c:	d00b      	beq.n	8003a66 <LL_USART_Init+0x9a>
+ 8002d4e:	683b      	ldr	r3, [r7, #0]
+ 8002d50:	681b      	ldr	r3, [r3, #0]
+ 8002d52:	2b00      	cmp	r3, #0
+ 8002d54:	d00b      	beq.n	8002d6e <LL_USART_Init+0x9a>
     {
       status = SUCCESS;
- 8003a4e:	230f      	movs	r3, #15
- 8003a50:	18fb      	adds	r3, r7, r3
- 8003a52:	2200      	movs	r2, #0
- 8003a54:	701a      	strb	r2, [r3, #0]
+ 8002d56:	230f      	movs	r3, #15
+ 8002d58:	18fb      	adds	r3, r7, r3
+ 8002d5a:	2200      	movs	r2, #0
+ 8002d5c:	701a      	strb	r2, [r3, #0]
       LL_USART_SetBaudRate(USARTx,
- 8003a56:	683b      	ldr	r3, [r7, #0]
- 8003a58:	699a      	ldr	r2, [r3, #24]
- 8003a5a:	683b      	ldr	r3, [r7, #0]
- 8003a5c:	681b      	ldr	r3, [r3, #0]
- 8003a5e:	68b9      	ldr	r1, [r7, #8]
- 8003a60:	6878      	ldr	r0, [r7, #4]
- 8003a62:	f7ff ff77 	bl	8003954 <LL_USART_SetBaudRate>
+ 8002d5e:	683b      	ldr	r3, [r7, #0]
+ 8002d60:	699a      	ldr	r2, [r3, #24]
+ 8002d62:	683b      	ldr	r3, [r7, #0]
+ 8002d64:	681b      	ldr	r3, [r3, #0]
+ 8002d66:	68b9      	ldr	r1, [r7, #8]
+ 8002d68:	6878      	ldr	r0, [r7, #4]
+ 8002d6a:	f7ff ff77 	bl	8002c5c <LL_USART_SetBaudRate>
       assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
     }
   }
   /* Endif (=> USART not in Disabled state => return ERROR) */
 
   return (status);
- 8003a66:	230f      	movs	r3, #15
- 8003a68:	18fb      	adds	r3, r7, r3
- 8003a6a:	781b      	ldrb	r3, [r3, #0]
+ 8002d6e:	230f      	movs	r3, #15
+ 8002d70:	18fb      	adds	r3, r7, r3
+ 8002d72:	781b      	ldrb	r3, [r3, #0]
 }
- 8003a6c:	0018      	movs	r0, r3
- 8003a6e:	46bd      	mov	sp, r7
- 8003a70:	b004      	add	sp, #16
- 8003a72:	bd80      	pop	{r7, pc}
- 8003a74:	efff69f3 	.word	0xefff69f3
- 8003a78:	40004400 	.word	0x40004400
+ 8002d74:	0018      	movs	r0, r3
+ 8002d76:	46bd      	mov	sp, r7
+ 8002d78:	b004      	add	sp, #16
+ 8002d7a:	bd80      	pop	{r7, pc}
+ 8002d7c:	efff69f3 	.word	0xefff69f3
+ 8002d80:	40004400 	.word	0x40004400
 
-08003a7c <LL_InitTick>:
+08002d84 <LL_InitTick>:
   *         configuration by calling this function, for a delay use rather osDelay RTOS service.
   * @param  Ticks Number of ticks
   * @retval None
   */
 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
 {
- 8003a7c:	b580      	push	{r7, lr}
- 8003a7e:	b082      	sub	sp, #8
- 8003a80:	af00      	add	r7, sp, #0
- 8003a82:	6078      	str	r0, [r7, #4]
- 8003a84:	6039      	str	r1, [r7, #0]
+ 8002d84:	b580      	push	{r7, lr}
+ 8002d86:	b082      	sub	sp, #8
+ 8002d88:	af00      	add	r7, sp, #0
+ 8002d8a:	6078      	str	r0, [r7, #4]
+ 8002d8c:	6039      	str	r1, [r7, #0]
   /* Configure the SysTick to have interrupt in 1ms time base */
   SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
- 8003a86:	6839      	ldr	r1, [r7, #0]
- 8003a88:	6878      	ldr	r0, [r7, #4]
- 8003a8a:	f7fc fb45 	bl	8000118 <__udivsi3>
- 8003a8e:	0003      	movs	r3, r0
- 8003a90:	001a      	movs	r2, r3
- 8003a92:	4b06      	ldr	r3, [pc, #24]	; (8003aac <LL_InitTick+0x30>)
- 8003a94:	3a01      	subs	r2, #1
- 8003a96:	605a      	str	r2, [r3, #4]
+ 8002d8e:	6839      	ldr	r1, [r7, #0]
+ 8002d90:	6878      	ldr	r0, [r7, #4]
+ 8002d92:	f7fd f9c1 	bl	8000118 <__udivsi3>
+ 8002d96:	0003      	movs	r3, r0
+ 8002d98:	001a      	movs	r2, r3
+ 8002d9a:	4b06      	ldr	r3, [pc, #24]	; (8002db4 <LL_InitTick+0x30>)
+ 8002d9c:	3a01      	subs	r2, #1
+ 8002d9e:	605a      	str	r2, [r3, #4]
   SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
- 8003a98:	4b04      	ldr	r3, [pc, #16]	; (8003aac <LL_InitTick+0x30>)
- 8003a9a:	2200      	movs	r2, #0
- 8003a9c:	609a      	str	r2, [r3, #8]
+ 8002da0:	4b04      	ldr	r3, [pc, #16]	; (8002db4 <LL_InitTick+0x30>)
+ 8002da2:	2200      	movs	r2, #0
+ 8002da4:	609a      	str	r2, [r3, #8]
   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
- 8003a9e:	4b03      	ldr	r3, [pc, #12]	; (8003aac <LL_InitTick+0x30>)
- 8003aa0:	2205      	movs	r2, #5
- 8003aa2:	601a      	str	r2, [r3, #0]
+ 8002da6:	4b03      	ldr	r3, [pc, #12]	; (8002db4 <LL_InitTick+0x30>)
+ 8002da8:	2205      	movs	r2, #5
+ 8002daa:	601a      	str	r2, [r3, #0]
                    SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
 }
- 8003aa4:	46c0      	nop			; (mov r8, r8)
- 8003aa6:	46bd      	mov	sp, r7
- 8003aa8:	b002      	add	sp, #8
- 8003aaa:	bd80      	pop	{r7, pc}
- 8003aac:	e000e010 	.word	0xe000e010
+ 8002dac:	46c0      	nop			; (mov r8, r8)
+ 8002dae:	46bd      	mov	sp, r7
+ 8002db0:	b002      	add	sp, #8
+ 8002db2:	bd80      	pop	{r7, pc}
+ 8002db4:	e000e010 	.word	0xe000e010
 
-08003ab0 <LL_Init1msTick>:
+08002db8 <LL_Init1msTick>:
   * @param  HCLKFrequency HCLK frequency in Hz
   * @note   HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq
   * @retval None
   */
 void LL_Init1msTick(uint32_t HCLKFrequency)
 {
- 8003ab0:	b580      	push	{r7, lr}
- 8003ab2:	b082      	sub	sp, #8
- 8003ab4:	af00      	add	r7, sp, #0
- 8003ab6:	6078      	str	r0, [r7, #4]
+ 8002db8:	b580      	push	{r7, lr}
+ 8002dba:	b082      	sub	sp, #8
+ 8002dbc:	af00      	add	r7, sp, #0
+ 8002dbe:	6078      	str	r0, [r7, #4]
   /* Use frequency provided in argument */
   LL_InitTick(HCLKFrequency, 1000U);
- 8003ab8:	23fa      	movs	r3, #250	; 0xfa
- 8003aba:	009a      	lsls	r2, r3, #2
- 8003abc:	687b      	ldr	r3, [r7, #4]
- 8003abe:	0011      	movs	r1, r2
- 8003ac0:	0018      	movs	r0, r3
- 8003ac2:	f7ff ffdb 	bl	8003a7c <LL_InitTick>
+ 8002dc0:	23fa      	movs	r3, #250	; 0xfa
+ 8002dc2:	009a      	lsls	r2, r3, #2
+ 8002dc4:	687b      	ldr	r3, [r7, #4]
+ 8002dc6:	0011      	movs	r1, r2
+ 8002dc8:	0018      	movs	r0, r3
+ 8002dca:	f7ff ffdb 	bl	8002d84 <LL_InitTick>
 }
- 8003ac6:	46c0      	nop			; (mov r8, r8)
- 8003ac8:	46bd      	mov	sp, r7
- 8003aca:	b002      	add	sp, #8
- 8003acc:	bd80      	pop	{r7, pc}
+ 8002dce:	46c0      	nop			; (mov r8, r8)
+ 8002dd0:	46bd      	mov	sp, r7
+ 8002dd2:	b002      	add	sp, #8
+ 8002dd4:	bd80      	pop	{r7, pc}
 	...
 
-08003ad0 <LL_mDelay>:
+08002dd8 <LL_mDelay>:
   *         will configure Systick to 1ms
   * @param  Delay specifies the delay time length, in milliseconds.
   * @retval None
   */
 void LL_mDelay(uint32_t Delay)
 {
- 8003ad0:	b580      	push	{r7, lr}
- 8003ad2:	b084      	sub	sp, #16
- 8003ad4:	af00      	add	r7, sp, #0
- 8003ad6:	6078      	str	r0, [r7, #4]
+ 8002dd8:	b580      	push	{r7, lr}
+ 8002dda:	b084      	sub	sp, #16
+ 8002ddc:	af00      	add	r7, sp, #0
+ 8002dde:	6078      	str	r0, [r7, #4]
   __IO uint32_t  tmp = SysTick->CTRL;  /* Clear the COUNTFLAG first */
- 8003ad8:	4b0d      	ldr	r3, [pc, #52]	; (8003b10 <LL_mDelay+0x40>)
- 8003ada:	681b      	ldr	r3, [r3, #0]
- 8003adc:	60fb      	str	r3, [r7, #12]
+ 8002de0:	4b0d      	ldr	r3, [pc, #52]	; (8002e18 <LL_mDelay+0x40>)
+ 8002de2:	681b      	ldr	r3, [r3, #0]
+ 8002de4:	60fb      	str	r3, [r7, #12]
   /* Add this code to indicate that local variable is not used */
   ((void)tmp);
- 8003ade:	68fb      	ldr	r3, [r7, #12]
+ 8002de6:	68fb      	ldr	r3, [r7, #12]
 
   /* Add a period to guaranty minimum wait */
   if (Delay < LL_MAX_DELAY)
- 8003ae0:	687b      	ldr	r3, [r7, #4]
- 8003ae2:	3301      	adds	r3, #1
- 8003ae4:	d00c      	beq.n	8003b00 <LL_mDelay+0x30>
+ 8002de8:	687b      	ldr	r3, [r7, #4]
+ 8002dea:	3301      	adds	r3, #1
+ 8002dec:	d00c      	beq.n	8002e08 <LL_mDelay+0x30>
   {
     Delay++;
- 8003ae6:	687b      	ldr	r3, [r7, #4]
- 8003ae8:	3301      	adds	r3, #1
- 8003aea:	607b      	str	r3, [r7, #4]
+ 8002dee:	687b      	ldr	r3, [r7, #4]
+ 8002df0:	3301      	adds	r3, #1
+ 8002df2:	607b      	str	r3, [r7, #4]
   }
 
   while (Delay)
- 8003aec:	e008      	b.n	8003b00 <LL_mDelay+0x30>
+ 8002df4:	e008      	b.n	8002e08 <LL_mDelay+0x30>
   {
     if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U)
- 8003aee:	4b08      	ldr	r3, [pc, #32]	; (8003b10 <LL_mDelay+0x40>)
- 8003af0:	681a      	ldr	r2, [r3, #0]
- 8003af2:	2380      	movs	r3, #128	; 0x80
- 8003af4:	025b      	lsls	r3, r3, #9
- 8003af6:	4013      	ands	r3, r2
- 8003af8:	d002      	beq.n	8003b00 <LL_mDelay+0x30>
+ 8002df6:	4b08      	ldr	r3, [pc, #32]	; (8002e18 <LL_mDelay+0x40>)
+ 8002df8:	681a      	ldr	r2, [r3, #0]
+ 8002dfa:	2380      	movs	r3, #128	; 0x80
+ 8002dfc:	025b      	lsls	r3, r3, #9
+ 8002dfe:	4013      	ands	r3, r2
+ 8002e00:	d002      	beq.n	8002e08 <LL_mDelay+0x30>
     {
       Delay--;
- 8003afa:	687b      	ldr	r3, [r7, #4]
- 8003afc:	3b01      	subs	r3, #1
- 8003afe:	607b      	str	r3, [r7, #4]
+ 8002e02:	687b      	ldr	r3, [r7, #4]
+ 8002e04:	3b01      	subs	r3, #1
+ 8002e06:	607b      	str	r3, [r7, #4]
   while (Delay)
- 8003b00:	687b      	ldr	r3, [r7, #4]
- 8003b02:	2b00      	cmp	r3, #0
- 8003b04:	d1f3      	bne.n	8003aee <LL_mDelay+0x1e>
+ 8002e08:	687b      	ldr	r3, [r7, #4]
+ 8002e0a:	2b00      	cmp	r3, #0
+ 8002e0c:	d1f3      	bne.n	8002df6 <LL_mDelay+0x1e>
     }
   }
 }
- 8003b06:	46c0      	nop			; (mov r8, r8)
- 8003b08:	46c0      	nop			; (mov r8, r8)
- 8003b0a:	46bd      	mov	sp, r7
- 8003b0c:	b004      	add	sp, #16
- 8003b0e:	bd80      	pop	{r7, pc}
- 8003b10:	e000e010 	.word	0xe000e010
+ 8002e0e:	46c0      	nop			; (mov r8, r8)
+ 8002e10:	46c0      	nop			; (mov r8, r8)
+ 8002e12:	46bd      	mov	sp, r7
+ 8002e14:	b004      	add	sp, #16
+ 8002e16:	bd80      	pop	{r7, pc}
+ 8002e18:	e000e010 	.word	0xe000e010
 
-08003b14 <LL_SetSystemCoreClock>:
+08002e1c <LL_SetSystemCoreClock>:
   * @note   Variable can be calculated also through SystemCoreClockUpdate function.
   * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
   * @retval None
   */
 void LL_SetSystemCoreClock(uint32_t HCLKFrequency)
 {
- 8003b14:	b580      	push	{r7, lr}
- 8003b16:	b082      	sub	sp, #8
- 8003b18:	af00      	add	r7, sp, #0
- 8003b1a:	6078      	str	r0, [r7, #4]
+ 8002e1c:	b580      	push	{r7, lr}
+ 8002e1e:	b082      	sub	sp, #8
+ 8002e20:	af00      	add	r7, sp, #0
+ 8002e22:	6078      	str	r0, [r7, #4]
   /* HCLK clock frequency */
   SystemCoreClock = HCLKFrequency;
- 8003b1c:	4b03      	ldr	r3, [pc, #12]	; (8003b2c <LL_SetSystemCoreClock+0x18>)
- 8003b1e:	687a      	ldr	r2, [r7, #4]
- 8003b20:	601a      	str	r2, [r3, #0]
+ 8002e24:	4b03      	ldr	r3, [pc, #12]	; (8002e34 <LL_SetSystemCoreClock+0x18>)
+ 8002e26:	687a      	ldr	r2, [r7, #4]
+ 8002e28:	601a      	str	r2, [r3, #0]
 }
- 8003b22:	46c0      	nop			; (mov r8, r8)
- 8003b24:	46bd      	mov	sp, r7
- 8003b26:	b002      	add	sp, #8
- 8003b28:	bd80      	pop	{r7, pc}
- 8003b2a:	46c0      	nop			; (mov r8, r8)
- 8003b2c:	20000004 	.word	0x20000004
+ 8002e2a:	46c0      	nop			; (mov r8, r8)
+ 8002e2c:	46bd      	mov	sp, r7
+ 8002e2e:	b002      	add	sp, #8
+ 8002e30:	bd80      	pop	{r7, pc}
+ 8002e32:	46c0      	nop			; (mov r8, r8)
+ 8002e34:	20000000 	.word	0x20000000
 
-08003b30 <__libc_init_array>:
- 8003b30:	b570      	push	{r4, r5, r6, lr}
- 8003b32:	2600      	movs	r6, #0
- 8003b34:	4d0c      	ldr	r5, [pc, #48]	; (8003b68 <__libc_init_array+0x38>)
- 8003b36:	4c0d      	ldr	r4, [pc, #52]	; (8003b6c <__libc_init_array+0x3c>)
- 8003b38:	1b64      	subs	r4, r4, r5
- 8003b3a:	10a4      	asrs	r4, r4, #2
- 8003b3c:	42a6      	cmp	r6, r4
- 8003b3e:	d109      	bne.n	8003b54 <__libc_init_array+0x24>
- 8003b40:	2600      	movs	r6, #0
- 8003b42:	f000 f835 	bl	8003bb0 <_init>
- 8003b46:	4d0a      	ldr	r5, [pc, #40]	; (8003b70 <__libc_init_array+0x40>)
- 8003b48:	4c0a      	ldr	r4, [pc, #40]	; (8003b74 <__libc_init_array+0x44>)
- 8003b4a:	1b64      	subs	r4, r4, r5
- 8003b4c:	10a4      	asrs	r4, r4, #2
- 8003b4e:	42a6      	cmp	r6, r4
- 8003b50:	d105      	bne.n	8003b5e <__libc_init_array+0x2e>
- 8003b52:	bd70      	pop	{r4, r5, r6, pc}
- 8003b54:	00b3      	lsls	r3, r6, #2
- 8003b56:	58eb      	ldr	r3, [r5, r3]
- 8003b58:	4798      	blx	r3
- 8003b5a:	3601      	adds	r6, #1
- 8003b5c:	e7ee      	b.n	8003b3c <__libc_init_array+0xc>
- 8003b5e:	00b3      	lsls	r3, r6, #2
- 8003b60:	58eb      	ldr	r3, [r5, r3]
- 8003b62:	4798      	blx	r3
- 8003b64:	3601      	adds	r6, #1
- 8003b66:	e7f2      	b.n	8003b4e <__libc_init_array+0x1e>
- 8003b68:	08003cbc 	.word	0x08003cbc
- 8003b6c:	08003cbc 	.word	0x08003cbc
- 8003b70:	08003cbc 	.word	0x08003cbc
- 8003b74:	08003cc0 	.word	0x08003cc0
+08002e38 <crc8_calculate>:
+/* TODO add polynomial and init value to make this function
+ * generic */
 
-08003b78 <memset>:
- 8003b78:	0003      	movs	r3, r0
- 8003b7a:	1882      	adds	r2, r0, r2
- 8003b7c:	4293      	cmp	r3, r2
- 8003b7e:	d100      	bne.n	8003b82 <memset+0xa>
- 8003b80:	4770      	bx	lr
- 8003b82:	7019      	strb	r1, [r3, #0]
- 8003b84:	3301      	adds	r3, #1
- 8003b86:	e7f9      	b.n	8003b7c <memset+0x4>
+/* Stolen from Sensirion SCD4x datasheet, section 3.11 */
+uint8_t crc8_calculate(const uint8_t *data, uint16_t count)
+{
+ 8002e38:	b580      	push	{r7, lr}
+ 8002e3a:	b084      	sub	sp, #16
+ 8002e3c:	af00      	add	r7, sp, #0
+ 8002e3e:	6078      	str	r0, [r7, #4]
+ 8002e40:	000a      	movs	r2, r1
+ 8002e42:	1cbb      	adds	r3, r7, #2
+ 8002e44:	801a      	strh	r2, [r3, #0]
+	uint16_t current_byte;
+	uint8_t crc = CRC8_INIT;
+ 8002e46:	230d      	movs	r3, #13
+ 8002e48:	18fb      	adds	r3, r7, r3
+ 8002e4a:	22ff      	movs	r2, #255	; 0xff
+ 8002e4c:	701a      	strb	r2, [r3, #0]
+	uint8_t crc_bit;
+	/* calculates 8-Bit checksum with given polynomial */
+	for (current_byte = 0; current_byte < count; ++current_byte) {
+ 8002e4e:	230e      	movs	r3, #14
+ 8002e50:	18fb      	adds	r3, r7, r3
+ 8002e52:	2200      	movs	r2, #0
+ 8002e54:	801a      	strh	r2, [r3, #0]
+ 8002e56:	e037      	b.n	8002ec8 <crc8_calculate+0x90>
+		crc ^= (data[current_byte]);
+ 8002e58:	230e      	movs	r3, #14
+ 8002e5a:	18fb      	adds	r3, r7, r3
+ 8002e5c:	881b      	ldrh	r3, [r3, #0]
+ 8002e5e:	687a      	ldr	r2, [r7, #4]
+ 8002e60:	18d3      	adds	r3, r2, r3
+ 8002e62:	7819      	ldrb	r1, [r3, #0]
+ 8002e64:	220d      	movs	r2, #13
+ 8002e66:	18bb      	adds	r3, r7, r2
+ 8002e68:	18ba      	adds	r2, r7, r2
+ 8002e6a:	7812      	ldrb	r2, [r2, #0]
+ 8002e6c:	404a      	eors	r2, r1
+ 8002e6e:	701a      	strb	r2, [r3, #0]
+		for(crc_bit = 8; crc_bit > 0; --crc_bit) {
+ 8002e70:	230c      	movs	r3, #12
+ 8002e72:	18fb      	adds	r3, r7, r3
+ 8002e74:	2208      	movs	r2, #8
+ 8002e76:	701a      	strb	r2, [r3, #0]
+ 8002e78:	e01b      	b.n	8002eb2 <crc8_calculate+0x7a>
+			if (crc & 0x80) {
+ 8002e7a:	210d      	movs	r1, #13
+ 8002e7c:	187b      	adds	r3, r7, r1
+ 8002e7e:	781b      	ldrb	r3, [r3, #0]
+ 8002e80:	b25b      	sxtb	r3, r3
+ 8002e82:	2b00      	cmp	r3, #0
+ 8002e84:	da09      	bge.n	8002e9a <crc8_calculate+0x62>
+				crc =(crc << 1) ^ CRC8_POLYNOMIAL;
+ 8002e86:	187b      	adds	r3, r7, r1
+ 8002e88:	781b      	ldrb	r3, [r3, #0]
+ 8002e8a:	005b      	lsls	r3, r3, #1
+ 8002e8c:	b25b      	sxtb	r3, r3
+ 8002e8e:	2231      	movs	r2, #49	; 0x31
+ 8002e90:	4053      	eors	r3, r2
+ 8002e92:	b25a      	sxtb	r2, r3
+ 8002e94:	187b      	adds	r3, r7, r1
+ 8002e96:	701a      	strb	r2, [r3, #0]
+ 8002e98:	e005      	b.n	8002ea6 <crc8_calculate+0x6e>
+			} else {
+				crc = (crc << 1);
+ 8002e9a:	230d      	movs	r3, #13
+ 8002e9c:	18fa      	adds	r2, r7, r3
+ 8002e9e:	18fb      	adds	r3, r7, r3
+ 8002ea0:	781b      	ldrb	r3, [r3, #0]
+ 8002ea2:	18db      	adds	r3, r3, r3
+ 8002ea4:	7013      	strb	r3, [r2, #0]
+		for(crc_bit = 8; crc_bit > 0; --crc_bit) {
+ 8002ea6:	220c      	movs	r2, #12
+ 8002ea8:	18bb      	adds	r3, r7, r2
+ 8002eaa:	18ba      	adds	r2, r7, r2
+ 8002eac:	7812      	ldrb	r2, [r2, #0]
+ 8002eae:	3a01      	subs	r2, #1
+ 8002eb0:	701a      	strb	r2, [r3, #0]
+ 8002eb2:	230c      	movs	r3, #12
+ 8002eb4:	18fb      	adds	r3, r7, r3
+ 8002eb6:	781b      	ldrb	r3, [r3, #0]
+ 8002eb8:	2b00      	cmp	r3, #0
+ 8002eba:	d1de      	bne.n	8002e7a <crc8_calculate+0x42>
+	for (current_byte = 0; current_byte < count; ++current_byte) {
+ 8002ebc:	220e      	movs	r2, #14
+ 8002ebe:	18bb      	adds	r3, r7, r2
+ 8002ec0:	18ba      	adds	r2, r7, r2
+ 8002ec2:	8812      	ldrh	r2, [r2, #0]
+ 8002ec4:	3201      	adds	r2, #1
+ 8002ec6:	801a      	strh	r2, [r3, #0]
+ 8002ec8:	230e      	movs	r3, #14
+ 8002eca:	18fa      	adds	r2, r7, r3
+ 8002ecc:	1cbb      	adds	r3, r7, #2
+ 8002ece:	8812      	ldrh	r2, [r2, #0]
+ 8002ed0:	881b      	ldrh	r3, [r3, #0]
+ 8002ed2:	429a      	cmp	r2, r3
+ 8002ed4:	d3c0      	bcc.n	8002e58 <crc8_calculate+0x20>
+			}
+		}
+	}
+	return crc;
+ 8002ed6:	230d      	movs	r3, #13
+ 8002ed8:	18fb      	adds	r3, r7, r3
+ 8002eda:	781b      	ldrb	r3, [r3, #0]
+}
+ 8002edc:	0018      	movs	r0, r3
+ 8002ede:	46bd      	mov	sp, r7
+ 8002ee0:	b004      	add	sp, #16
+ 8002ee2:	bd80      	pop	{r7, pc}
 
-08003b88 <strncpy>:
- 8003b88:	0003      	movs	r3, r0
- 8003b8a:	b530      	push	{r4, r5, lr}
- 8003b8c:	001d      	movs	r5, r3
- 8003b8e:	2a00      	cmp	r2, #0
- 8003b90:	d006      	beq.n	8003ba0 <strncpy+0x18>
- 8003b92:	780c      	ldrb	r4, [r1, #0]
- 8003b94:	3a01      	subs	r2, #1
- 8003b96:	3301      	adds	r3, #1
- 8003b98:	702c      	strb	r4, [r5, #0]
- 8003b9a:	3101      	adds	r1, #1
- 8003b9c:	2c00      	cmp	r4, #0
- 8003b9e:	d1f5      	bne.n	8003b8c <strncpy+0x4>
- 8003ba0:	2100      	movs	r1, #0
- 8003ba2:	189a      	adds	r2, r3, r2
- 8003ba4:	4293      	cmp	r3, r2
- 8003ba6:	d100      	bne.n	8003baa <strncpy+0x22>
- 8003ba8:	bd30      	pop	{r4, r5, pc}
- 8003baa:	7019      	strb	r1, [r3, #0]
- 8003bac:	3301      	adds	r3, #1
- 8003bae:	e7f9      	b.n	8003ba4 <strncpy+0x1c>
+08002ee4 <ltr329_read_register>:
+int8_t ltr329_enable_interrupts(void) __attribute__((weak));
+/* delay function */
+void delay_ms(int delay_ms) __attribute__((weak));
 
-08003bb0 <_init>:
- 8003bb0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8003bb2:	46c0      	nop			; (mov r8, r8)
- 8003bb4:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8003bb6:	bc08      	pop	{r3}
- 8003bb8:	469e      	mov	lr, r3
- 8003bba:	4770      	bx	lr
+static int8_t ltr329_read_register (ltr329_cmd_t register_addr, uint8_t *register_data )
+{
+ 8002ee4:	b590      	push	{r4, r7, lr}
+ 8002ee6:	b087      	sub	sp, #28
+ 8002ee8:	af00      	add	r7, sp, #0
+ 8002eea:	0002      	movs	r2, r0
+ 8002eec:	6039      	str	r1, [r7, #0]
+ 8002eee:	1dfb      	adds	r3, r7, #7
+ 8002ef0:	701a      	strb	r2, [r3, #0]
+	uint8_t tx_buffer[1];
+	uint8_t rx_buffer[1];
+	int result;
 
-08003bbc <_fini>:
- 8003bbc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8003bbe:	46c0      	nop			; (mov r8, r8)
- 8003bc0:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8003bc2:	bc08      	pop	{r3}
- 8003bc4:	469e      	mov	lr, r3
- 8003bc6:	4770      	bx	lr
+	// start measurement
+	tx_buffer[0] = register_addr;
+ 8002ef2:	2410      	movs	r4, #16
+ 8002ef4:	193b      	adds	r3, r7, r4
+ 8002ef6:	1dfa      	adds	r2, r7, #7
+ 8002ef8:	7812      	ldrb	r2, [r2, #0]
+ 8002efa:	701a      	strb	r2, [r3, #0]
+	/* disable interrupts to prevent modbus/i2c conflict */
+	ltr329_disable_interrupts();
+ 8002efc:	f7fe fa7c 	bl	80013f8 <ltr329_disable_interrupts>
+	result = ltr329_i2c_transmit(LTR329_I2C_ADDRESS<<1, tx_buffer, 1);
+ 8002f00:	193b      	adds	r3, r7, r4
+ 8002f02:	2201      	movs	r2, #1
+ 8002f04:	0019      	movs	r1, r3
+ 8002f06:	2052      	movs	r0, #82	; 0x52
+ 8002f08:	f7fe fa4c 	bl	80013a4 <ltr329_i2c_transmit>
+ 8002f0c:	0003      	movs	r3, r0
+ 8002f0e:	617b      	str	r3, [r7, #20]
+	ltr329_enable_interrupts();
+ 8002f10:	f7fe fa7a 	bl	8001408 <ltr329_enable_interrupts>
+	if (result != I2C_OK) {
+ 8002f14:	697b      	ldr	r3, [r7, #20]
+ 8002f16:	2b00      	cmp	r3, #0
+ 8002f18:	d002      	beq.n	8002f20 <ltr329_read_register+0x3c>
+		return LTR329_ERROR;
+ 8002f1a:	2301      	movs	r3, #1
+ 8002f1c:	425b      	negs	r3, r3
+ 8002f1e:	e01b      	b.n	8002f58 <ltr329_read_register+0x74>
+	}
+	delay_ms(10); /* 10 ms should be enough */
+ 8002f20:	200a      	movs	r0, #10
+ 8002f22:	f7fe fa79 	bl	8001418 <delay_ms>
+	/* read out */
+	ltr329_disable_interrupts();
+ 8002f26:	f7fe fa67 	bl	80013f8 <ltr329_disable_interrupts>
+	result = ltr329_i2c_receive(LTR329_I2C_ADDRESS<<1, rx_buffer, 1);
+ 8002f2a:	230c      	movs	r3, #12
+ 8002f2c:	18fb      	adds	r3, r7, r3
+ 8002f2e:	2201      	movs	r2, #1
+ 8002f30:	0019      	movs	r1, r3
+ 8002f32:	2052      	movs	r0, #82	; 0x52
+ 8002f34:	f7fe fa4b 	bl	80013ce <ltr329_i2c_receive>
+ 8002f38:	0003      	movs	r3, r0
+ 8002f3a:	617b      	str	r3, [r7, #20]
+	ltr329_enable_interrupts();
+ 8002f3c:	f7fe fa64 	bl	8001408 <ltr329_enable_interrupts>
+	if (result != I2C_OK) {
+ 8002f40:	697b      	ldr	r3, [r7, #20]
+ 8002f42:	2b00      	cmp	r3, #0
+ 8002f44:	d002      	beq.n	8002f4c <ltr329_read_register+0x68>
+		return LTR329_ERROR;
+ 8002f46:	2301      	movs	r3, #1
+ 8002f48:	425b      	negs	r3, r3
+ 8002f4a:	e005      	b.n	8002f58 <ltr329_read_register+0x74>
+	}
+
+	*register_data = rx_buffer[0];
+ 8002f4c:	230c      	movs	r3, #12
+ 8002f4e:	18fb      	adds	r3, r7, r3
+ 8002f50:	781a      	ldrb	r2, [r3, #0]
+ 8002f52:	683b      	ldr	r3, [r7, #0]
+ 8002f54:	701a      	strb	r2, [r3, #0]
+	return LTR329_OK;
+ 8002f56:	2300      	movs	r3, #0
+}
+ 8002f58:	0018      	movs	r0, r3
+ 8002f5a:	46bd      	mov	sp, r7
+ 8002f5c:	b007      	add	sp, #28
+ 8002f5e:	bd90      	pop	{r4, r7, pc}
+
+08002f60 <ltr329_write_register>:
+
+static int8_t ltr329_write_register (ltr329_cmd_t register_addr, uint8_t register_data)
+{
+ 8002f60:	b590      	push	{r4, r7, lr}
+ 8002f62:	b085      	sub	sp, #20
+ 8002f64:	af00      	add	r7, sp, #0
+ 8002f66:	0002      	movs	r2, r0
+ 8002f68:	1dfb      	adds	r3, r7, #7
+ 8002f6a:	701a      	strb	r2, [r3, #0]
+ 8002f6c:	1dbb      	adds	r3, r7, #6
+ 8002f6e:	1c0a      	adds	r2, r1, #0
+ 8002f70:	701a      	strb	r2, [r3, #0]
+	uint8_t tx_buffer[2];
+	int result;
+
+	// start measurement
+	tx_buffer[0] = register_addr;
+ 8002f72:	2408      	movs	r4, #8
+ 8002f74:	193b      	adds	r3, r7, r4
+ 8002f76:	1dfa      	adds	r2, r7, #7
+ 8002f78:	7812      	ldrb	r2, [r2, #0]
+ 8002f7a:	701a      	strb	r2, [r3, #0]
+	tx_buffer[1] = register_data;
+ 8002f7c:	193b      	adds	r3, r7, r4
+ 8002f7e:	1dba      	adds	r2, r7, #6
+ 8002f80:	7812      	ldrb	r2, [r2, #0]
+ 8002f82:	705a      	strb	r2, [r3, #1]
+	/* disable interrupts to prevent modbus/i2c conflict */
+	ltr329_disable_interrupts();
+ 8002f84:	f7fe fa38 	bl	80013f8 <ltr329_disable_interrupts>
+	result = ltr329_i2c_transmit(LTR329_I2C_ADDRESS<<1, tx_buffer, 2);
+ 8002f88:	193b      	adds	r3, r7, r4
+ 8002f8a:	2202      	movs	r2, #2
+ 8002f8c:	0019      	movs	r1, r3
+ 8002f8e:	2052      	movs	r0, #82	; 0x52
+ 8002f90:	f7fe fa08 	bl	80013a4 <ltr329_i2c_transmit>
+ 8002f94:	0003      	movs	r3, r0
+ 8002f96:	60fb      	str	r3, [r7, #12]
+	ltr329_enable_interrupts();
+ 8002f98:	f7fe fa36 	bl	8001408 <ltr329_enable_interrupts>
+	if (result != I2C_OK) {
+ 8002f9c:	68fb      	ldr	r3, [r7, #12]
+ 8002f9e:	2b00      	cmp	r3, #0
+ 8002fa0:	d002      	beq.n	8002fa8 <ltr329_write_register+0x48>
+		return LTR329_ERROR;
+ 8002fa2:	2301      	movs	r3, #1
+ 8002fa4:	425b      	negs	r3, r3
+ 8002fa6:	e000      	b.n	8002faa <ltr329_write_register+0x4a>
+	}
+	return LTR329_OK;
+ 8002fa8:	2300      	movs	r3, #0
+}
+ 8002faa:	0018      	movs	r0, r3
+ 8002fac:	46bd      	mov	sp, r7
+ 8002fae:	b005      	add	sp, #20
+ 8002fb0:	bd90      	pop	{r4, r7, pc}
+
+08002fb2 <ltr329_write_settings>:
+
+int8_t ltr329_write_settings (ltr329_gain_t gain, ltr329_als_mode_t mode, ltr329_integration_time_t integ_time, ltr329_measurement_rate_t meas_rate)
+{
+ 8002fb2:	b5b0      	push	{r4, r5, r7, lr}
+ 8002fb4:	b084      	sub	sp, #16
+ 8002fb6:	af00      	add	r7, sp, #0
+ 8002fb8:	0005      	movs	r5, r0
+ 8002fba:	000c      	movs	r4, r1
+ 8002fbc:	0010      	movs	r0, r2
+ 8002fbe:	0019      	movs	r1, r3
+ 8002fc0:	1dfb      	adds	r3, r7, #7
+ 8002fc2:	1c2a      	adds	r2, r5, #0
+ 8002fc4:	701a      	strb	r2, [r3, #0]
+ 8002fc6:	1dbb      	adds	r3, r7, #6
+ 8002fc8:	1c22      	adds	r2, r4, #0
+ 8002fca:	701a      	strb	r2, [r3, #0]
+ 8002fcc:	1d7b      	adds	r3, r7, #5
+ 8002fce:	1c02      	adds	r2, r0, #0
+ 8002fd0:	701a      	strb	r2, [r3, #0]
+ 8002fd2:	1d3b      	adds	r3, r7, #4
+ 8002fd4:	1c0a      	adds	r2, r1, #0
+ 8002fd6:	701a      	strb	r2, [r3, #0]
+	int8_t result;
+	/* Write Gain and ALS Mode */
+	result = ltr329_write_register(LTR329_ALS_CONTR, (gain | mode));
+ 8002fd8:	1dfa      	adds	r2, r7, #7
+ 8002fda:	1dbb      	adds	r3, r7, #6
+ 8002fdc:	7812      	ldrb	r2, [r2, #0]
+ 8002fde:	781b      	ldrb	r3, [r3, #0]
+ 8002fe0:	4313      	orrs	r3, r2
+ 8002fe2:	b2db      	uxtb	r3, r3
+ 8002fe4:	250f      	movs	r5, #15
+ 8002fe6:	197c      	adds	r4, r7, r5
+ 8002fe8:	0019      	movs	r1, r3
+ 8002fea:	2080      	movs	r0, #128	; 0x80
+ 8002fec:	f7ff ffb8 	bl	8002f60 <ltr329_write_register>
+ 8002ff0:	0003      	movs	r3, r0
+ 8002ff2:	7023      	strb	r3, [r4, #0]
+	if (result != LTR329_OK)
+ 8002ff4:	197b      	adds	r3, r7, r5
+ 8002ff6:	781b      	ldrb	r3, [r3, #0]
+ 8002ff8:	b25b      	sxtb	r3, r3
+ 8002ffa:	2b00      	cmp	r3, #0
+ 8002ffc:	d002      	beq.n	8003004 <ltr329_write_settings+0x52>
+	{
+		return LTR329_ERROR;
+ 8002ffe:	2301      	movs	r3, #1
+ 8003000:	425b      	negs	r3, r3
+ 8003002:	e016      	b.n	8003032 <ltr329_write_settings+0x80>
+	}
+	/* Write Integration Time and Measurement Rate */
+
+	result = ltr329_write_register(LTR329_ALS_MEAS_RATE, (integ_time | meas_rate));
+ 8003004:	1d7a      	adds	r2, r7, #5
+ 8003006:	1d3b      	adds	r3, r7, #4
+ 8003008:	7812      	ldrb	r2, [r2, #0]
+ 800300a:	781b      	ldrb	r3, [r3, #0]
+ 800300c:	4313      	orrs	r3, r2
+ 800300e:	b2db      	uxtb	r3, r3
+ 8003010:	250f      	movs	r5, #15
+ 8003012:	197c      	adds	r4, r7, r5
+ 8003014:	0019      	movs	r1, r3
+ 8003016:	2085      	movs	r0, #133	; 0x85
+ 8003018:	f7ff ffa2 	bl	8002f60 <ltr329_write_register>
+ 800301c:	0003      	movs	r3, r0
+ 800301e:	7023      	strb	r3, [r4, #0]
+	if (result != LTR329_OK)
+ 8003020:	197b      	adds	r3, r7, r5
+ 8003022:	781b      	ldrb	r3, [r3, #0]
+ 8003024:	b25b      	sxtb	r3, r3
+ 8003026:	2b00      	cmp	r3, #0
+ 8003028:	d002      	beq.n	8003030 <ltr329_write_settings+0x7e>
+	{
+		return LTR329_ERROR;
+ 800302a:	2301      	movs	r3, #1
+ 800302c:	425b      	negs	r3, r3
+ 800302e:	e000      	b.n	8003032 <ltr329_write_settings+0x80>
+	}
+	return LTR329_OK;
+ 8003030:	2300      	movs	r3, #0
+}
+ 8003032:	0018      	movs	r0, r3
+ 8003034:	46bd      	mov	sp, r7
+ 8003036:	b004      	add	sp, #16
+ 8003038:	bdb0      	pop	{r4, r5, r7, pc}
+
+0800303a <ltr329_read_settings>:
+
+int8_t ltr329_read_settings (ltr329_gain_t *gain, ltr329_als_mode_t *mode, ltr329_integration_time_t *integ_time, ltr329_measurement_rate_t *meas_rate)
+{
+ 800303a:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 800303c:	b087      	sub	sp, #28
+ 800303e:	af00      	add	r7, sp, #0
+ 8003040:	60f8      	str	r0, [r7, #12]
+ 8003042:	60b9      	str	r1, [r7, #8]
+ 8003044:	607a      	str	r2, [r7, #4]
+ 8003046:	603b      	str	r3, [r7, #0]
+	int8_t result;
+	uint8_t control_register_data;
+	uint8_t rate_register_data;
+
+	result = ltr329_read_register(LTR329_ALS_CONTR, &control_register_data);
+ 8003048:	2517      	movs	r5, #23
+ 800304a:	197c      	adds	r4, r7, r5
+ 800304c:	2312      	movs	r3, #18
+ 800304e:	18fb      	adds	r3, r7, r3
+ 8003050:	0019      	movs	r1, r3
+ 8003052:	2080      	movs	r0, #128	; 0x80
+ 8003054:	f7ff ff46 	bl	8002ee4 <ltr329_read_register>
+ 8003058:	0003      	movs	r3, r0
+ 800305a:	7023      	strb	r3, [r4, #0]
+	if (result != LTR329_OK)
+ 800305c:	197b      	adds	r3, r7, r5
+ 800305e:	781b      	ldrb	r3, [r3, #0]
+ 8003060:	b25b      	sxtb	r3, r3
+ 8003062:	2b00      	cmp	r3, #0
+ 8003064:	d002      	beq.n	800306c <ltr329_read_settings+0x32>
+	{
+		return LTR329_ERROR;
+ 8003066:	2301      	movs	r3, #1
+ 8003068:	425b      	negs	r3, r3
+ 800306a:	e044      	b.n	80030f6 <ltr329_read_settings+0xbc>
+	}
+
+	result = ltr329_read_register(LTR329_ALS_MEAS_RATE, &rate_register_data);
+ 800306c:	2517      	movs	r5, #23
+ 800306e:	197c      	adds	r4, r7, r5
+ 8003070:	2311      	movs	r3, #17
+ 8003072:	18fb      	adds	r3, r7, r3
+ 8003074:	0019      	movs	r1, r3
+ 8003076:	2085      	movs	r0, #133	; 0x85
+ 8003078:	f7ff ff34 	bl	8002ee4 <ltr329_read_register>
+ 800307c:	0003      	movs	r3, r0
+ 800307e:	7023      	strb	r3, [r4, #0]
+	if (result != LTR329_OK)
+ 8003080:	197b      	adds	r3, r7, r5
+ 8003082:	781b      	ldrb	r3, [r3, #0]
+ 8003084:	b25b      	sxtb	r3, r3
+ 8003086:	2b00      	cmp	r3, #0
+ 8003088:	d002      	beq.n	8003090 <ltr329_read_settings+0x56>
+	{
+		return LTR329_ERROR;
+ 800308a:	2301      	movs	r3, #1
+ 800308c:	425b      	negs	r3, r3
+ 800308e:	e032      	b.n	80030f6 <ltr329_read_settings+0xbc>
+	}
+
+	uint8_t control_register_gain_mask = 0b00011100;
+ 8003090:	2116      	movs	r1, #22
+ 8003092:	187b      	adds	r3, r7, r1
+ 8003094:	221c      	movs	r2, #28
+ 8003096:	701a      	strb	r2, [r3, #0]
+	uint8_t control_register_mode_mask = 0b00000001;
+ 8003098:	2015      	movs	r0, #21
+ 800309a:	183b      	adds	r3, r7, r0
+ 800309c:	2201      	movs	r2, #1
+ 800309e:	701a      	strb	r2, [r3, #0]
+	uint8_t rate_register_int_time_mask = 0b00111000;
+ 80030a0:	2414      	movs	r4, #20
+ 80030a2:	193b      	adds	r3, r7, r4
+ 80030a4:	2238      	movs	r2, #56	; 0x38
+ 80030a6:	701a      	strb	r2, [r3, #0]
+	uint8_t rate_register_rate_mask = 0b00000111;
+ 80030a8:	2513      	movs	r5, #19
+ 80030aa:	197b      	adds	r3, r7, r5
+ 80030ac:	2207      	movs	r2, #7
+ 80030ae:	701a      	strb	r2, [r3, #0]
+
+	/* Return Registers Values */
+	/* TODO: This might not be safe */
+	*gain = control_register_data & control_register_gain_mask;
+ 80030b0:	2612      	movs	r6, #18
+ 80030b2:	19bb      	adds	r3, r7, r6
+ 80030b4:	781b      	ldrb	r3, [r3, #0]
+ 80030b6:	187a      	adds	r2, r7, r1
+ 80030b8:	7812      	ldrb	r2, [r2, #0]
+ 80030ba:	4013      	ands	r3, r2
+ 80030bc:	b2da      	uxtb	r2, r3
+ 80030be:	68fb      	ldr	r3, [r7, #12]
+ 80030c0:	701a      	strb	r2, [r3, #0]
+	*mode = control_register_data & control_register_mode_mask;
+ 80030c2:	19bb      	adds	r3, r7, r6
+ 80030c4:	781b      	ldrb	r3, [r3, #0]
+ 80030c6:	183a      	adds	r2, r7, r0
+ 80030c8:	7812      	ldrb	r2, [r2, #0]
+ 80030ca:	4013      	ands	r3, r2
+ 80030cc:	b2da      	uxtb	r2, r3
+ 80030ce:	68bb      	ldr	r3, [r7, #8]
+ 80030d0:	701a      	strb	r2, [r3, #0]
+	*integ_time = rate_register_data & rate_register_int_time_mask;
+ 80030d2:	2111      	movs	r1, #17
+ 80030d4:	187b      	adds	r3, r7, r1
+ 80030d6:	781b      	ldrb	r3, [r3, #0]
+ 80030d8:	193a      	adds	r2, r7, r4
+ 80030da:	7812      	ldrb	r2, [r2, #0]
+ 80030dc:	4013      	ands	r3, r2
+ 80030de:	b2da      	uxtb	r2, r3
+ 80030e0:	687b      	ldr	r3, [r7, #4]
+ 80030e2:	701a      	strb	r2, [r3, #0]
+	*meas_rate = rate_register_data & rate_register_rate_mask;
+ 80030e4:	187b      	adds	r3, r7, r1
+ 80030e6:	781b      	ldrb	r3, [r3, #0]
+ 80030e8:	197a      	adds	r2, r7, r5
+ 80030ea:	7812      	ldrb	r2, [r2, #0]
+ 80030ec:	4013      	ands	r3, r2
+ 80030ee:	b2da      	uxtb	r2, r3
+ 80030f0:	683b      	ldr	r3, [r7, #0]
+ 80030f2:	701a      	strb	r2, [r3, #0]
+
+	return LTR329_OK;
+ 80030f4:	2300      	movs	r3, #0
+}
+ 80030f6:	0018      	movs	r0, r3
+ 80030f8:	46bd      	mov	sp, r7
+ 80030fa:	b007      	add	sp, #28
+ 80030fc:	bdf0      	pop	{r4, r5, r6, r7, pc}
+
+080030fe <ltr329_measure>:
+	}
+	return LTR329_OK;
+}
+
+int8_t ltr329_measure (uint16_t *data_ch0, uint16_t *data_ch1)
+{
+ 80030fe:	b580      	push	{r7, lr}
+ 8003100:	b084      	sub	sp, #16
+ 8003102:	af00      	add	r7, sp, #0
+ 8003104:	6078      	str	r0, [r7, #4]
+ 8003106:	6039      	str	r1, [r7, #0]
+	uint8_t ch0_l, ch0_h, ch1_l, ch1_h;
+	int result;
+	result = ltr329_read_register(LTR329_ALS_DATA_CH0_0, &ch0_l);
+ 8003108:	230b      	movs	r3, #11
+ 800310a:	18fb      	adds	r3, r7, r3
+ 800310c:	0019      	movs	r1, r3
+ 800310e:	208a      	movs	r0, #138	; 0x8a
+ 8003110:	f7ff fee8 	bl	8002ee4 <ltr329_read_register>
+ 8003114:	0003      	movs	r3, r0
+ 8003116:	60fb      	str	r3, [r7, #12]
+	if (result != LTR329_OK)
+ 8003118:	68fb      	ldr	r3, [r7, #12]
+ 800311a:	2b00      	cmp	r3, #0
+ 800311c:	d002      	beq.n	8003124 <ltr329_measure+0x26>
+	{
+		return LTR329_ERROR;
+ 800311e:	2301      	movs	r3, #1
+ 8003120:	425b      	negs	r3, r3
+ 8003122:	e046      	b.n	80031b2 <ltr329_measure+0xb4>
+	}
+	result = ltr329_read_register(LTR329_ALS_DATA_CH0_1, &ch0_h);
+ 8003124:	230a      	movs	r3, #10
+ 8003126:	18fb      	adds	r3, r7, r3
+ 8003128:	0019      	movs	r1, r3
+ 800312a:	208b      	movs	r0, #139	; 0x8b
+ 800312c:	f7ff feda 	bl	8002ee4 <ltr329_read_register>
+ 8003130:	0003      	movs	r3, r0
+ 8003132:	60fb      	str	r3, [r7, #12]
+	if (result != LTR329_OK)
+ 8003134:	68fb      	ldr	r3, [r7, #12]
+ 8003136:	2b00      	cmp	r3, #0
+ 8003138:	d002      	beq.n	8003140 <ltr329_measure+0x42>
+	{
+		return LTR329_ERROR;
+ 800313a:	2301      	movs	r3, #1
+ 800313c:	425b      	negs	r3, r3
+ 800313e:	e038      	b.n	80031b2 <ltr329_measure+0xb4>
+	}
+	result = ltr329_read_register(LTR329_ALS_DATA_CH1_0, &ch1_l);
+ 8003140:	2309      	movs	r3, #9
+ 8003142:	18fb      	adds	r3, r7, r3
+ 8003144:	0019      	movs	r1, r3
+ 8003146:	2088      	movs	r0, #136	; 0x88
+ 8003148:	f7ff fecc 	bl	8002ee4 <ltr329_read_register>
+ 800314c:	0003      	movs	r3, r0
+ 800314e:	60fb      	str	r3, [r7, #12]
+	if (result != LTR329_OK)
+ 8003150:	68fb      	ldr	r3, [r7, #12]
+ 8003152:	2b00      	cmp	r3, #0
+ 8003154:	d002      	beq.n	800315c <ltr329_measure+0x5e>
+	{
+		return LTR329_ERROR;
+ 8003156:	2301      	movs	r3, #1
+ 8003158:	425b      	negs	r3, r3
+ 800315a:	e02a      	b.n	80031b2 <ltr329_measure+0xb4>
+	}
+	result = ltr329_read_register(LTR329_ALS_DATA_CH1_1, &ch1_h);
+ 800315c:	2308      	movs	r3, #8
+ 800315e:	18fb      	adds	r3, r7, r3
+ 8003160:	0019      	movs	r1, r3
+ 8003162:	2089      	movs	r0, #137	; 0x89
+ 8003164:	f7ff febe 	bl	8002ee4 <ltr329_read_register>
+ 8003168:	0003      	movs	r3, r0
+ 800316a:	60fb      	str	r3, [r7, #12]
+	if (result != LTR329_OK)
+ 800316c:	68fb      	ldr	r3, [r7, #12]
+ 800316e:	2b00      	cmp	r3, #0
+ 8003170:	d002      	beq.n	8003178 <ltr329_measure+0x7a>
+	{
+		return LTR329_ERROR;
+ 8003172:	2301      	movs	r3, #1
+ 8003174:	425b      	negs	r3, r3
+ 8003176:	e01c      	b.n	80031b2 <ltr329_measure+0xb4>
+	}
+
+	*data_ch0 = (ch0_h << 8) + ch0_l;
+ 8003178:	230a      	movs	r3, #10
+ 800317a:	18fb      	adds	r3, r7, r3
+ 800317c:	781b      	ldrb	r3, [r3, #0]
+ 800317e:	b29b      	uxth	r3, r3
+ 8003180:	021b      	lsls	r3, r3, #8
+ 8003182:	b29a      	uxth	r2, r3
+ 8003184:	230b      	movs	r3, #11
+ 8003186:	18fb      	adds	r3, r7, r3
+ 8003188:	781b      	ldrb	r3, [r3, #0]
+ 800318a:	b29b      	uxth	r3, r3
+ 800318c:	18d3      	adds	r3, r2, r3
+ 800318e:	b29a      	uxth	r2, r3
+ 8003190:	687b      	ldr	r3, [r7, #4]
+ 8003192:	801a      	strh	r2, [r3, #0]
+	*data_ch1 = (ch1_h << 8) + ch1_l;
+ 8003194:	2308      	movs	r3, #8
+ 8003196:	18fb      	adds	r3, r7, r3
+ 8003198:	781b      	ldrb	r3, [r3, #0]
+ 800319a:	b29b      	uxth	r3, r3
+ 800319c:	021b      	lsls	r3, r3, #8
+ 800319e:	b29a      	uxth	r2, r3
+ 80031a0:	2309      	movs	r3, #9
+ 80031a2:	18fb      	adds	r3, r7, r3
+ 80031a4:	781b      	ldrb	r3, [r3, #0]
+ 80031a6:	b29b      	uxth	r3, r3
+ 80031a8:	18d3      	adds	r3, r2, r3
+ 80031aa:	b29a      	uxth	r2, r3
+ 80031ac:	683b      	ldr	r3, [r7, #0]
+ 80031ae:	801a      	strh	r2, [r3, #0]
+	return LTR329_OK;
+ 80031b0:	2300      	movs	r3, #0
+}
+ 80031b2:	0018      	movs	r0, r3
+ 80031b4:	46bd      	mov	sp, r7
+ 80031b6:	b004      	add	sp, #16
+ 80031b8:	bd80      	pop	{r7, pc}
+
+080031ba <ltr329_read_status_register>:
+
+int8_t ltr329_read_status_register(uint8_t *data_valid, uint8_t *new_data, ltr329_gain_t *gain)
+{
+ 80031ba:	b5b0      	push	{r4, r5, r7, lr}
+ 80031bc:	b086      	sub	sp, #24
+ 80031be:	af00      	add	r7, sp, #0
+ 80031c0:	60f8      	str	r0, [r7, #12]
+ 80031c2:	60b9      	str	r1, [r7, #8]
+ 80031c4:	607a      	str	r2, [r7, #4]
+	int8_t result;
+	uint8_t status_register_data;
+	result = ltr329_read_register(LTR329_ALS_STATUS, &status_register_data);
+ 80031c6:	2517      	movs	r5, #23
+ 80031c8:	197c      	adds	r4, r7, r5
+ 80031ca:	2313      	movs	r3, #19
+ 80031cc:	18fb      	adds	r3, r7, r3
+ 80031ce:	0019      	movs	r1, r3
+ 80031d0:	208c      	movs	r0, #140	; 0x8c
+ 80031d2:	f7ff fe87 	bl	8002ee4 <ltr329_read_register>
+ 80031d6:	0003      	movs	r3, r0
+ 80031d8:	7023      	strb	r3, [r4, #0]
+	if (result != LTR329_OK)
+ 80031da:	197b      	adds	r3, r7, r5
+ 80031dc:	781b      	ldrb	r3, [r3, #0]
+ 80031de:	b25b      	sxtb	r3, r3
+ 80031e0:	2b00      	cmp	r3, #0
+ 80031e2:	d002      	beq.n	80031ea <ltr329_read_status_register+0x30>
+	{
+		return LTR329_ERROR;
+ 80031e4:	2301      	movs	r3, #1
+ 80031e6:	425b      	negs	r3, r3
+ 80031e8:	e039      	b.n	800325e <ltr329_read_status_register+0xa4>
+	}
+
+	/* Check data valid */
+	uint8_t data_invalid_mask = 0b10000000;
+ 80031ea:	2116      	movs	r1, #22
+ 80031ec:	187b      	adds	r3, r7, r1
+ 80031ee:	2280      	movs	r2, #128	; 0x80
+ 80031f0:	701a      	strb	r2, [r3, #0]
+	if ((status_register_data & data_invalid_mask) == data_invalid_mask)
+ 80031f2:	2313      	movs	r3, #19
+ 80031f4:	18fb      	adds	r3, r7, r3
+ 80031f6:	781b      	ldrb	r3, [r3, #0]
+ 80031f8:	187a      	adds	r2, r7, r1
+ 80031fa:	7812      	ldrb	r2, [r2, #0]
+ 80031fc:	4013      	ands	r3, r2
+ 80031fe:	b2db      	uxtb	r3, r3
+ 8003200:	187a      	adds	r2, r7, r1
+ 8003202:	7812      	ldrb	r2, [r2, #0]
+ 8003204:	429a      	cmp	r2, r3
+ 8003206:	d103      	bne.n	8003210 <ltr329_read_status_register+0x56>
+	{
+		*data_valid = 0;
+ 8003208:	68fb      	ldr	r3, [r7, #12]
+ 800320a:	2200      	movs	r2, #0
+ 800320c:	701a      	strb	r2, [r3, #0]
+ 800320e:	e002      	b.n	8003216 <ltr329_read_status_register+0x5c>
+	} else
+	{
+		*data_valid = 1;
+ 8003210:	68fb      	ldr	r3, [r7, #12]
+ 8003212:	2201      	movs	r2, #1
+ 8003214:	701a      	strb	r2, [r3, #0]
+	}
+
+	/* Check if there is new data */
+	uint8_t data_status_mask = 0b00000100;
+ 8003216:	2115      	movs	r1, #21
+ 8003218:	187b      	adds	r3, r7, r1
+ 800321a:	2204      	movs	r2, #4
+ 800321c:	701a      	strb	r2, [r3, #0]
+	if ((status_register_data & data_status_mask) == data_status_mask)
+ 800321e:	2313      	movs	r3, #19
+ 8003220:	18fb      	adds	r3, r7, r3
+ 8003222:	781b      	ldrb	r3, [r3, #0]
+ 8003224:	187a      	adds	r2, r7, r1
+ 8003226:	7812      	ldrb	r2, [r2, #0]
+ 8003228:	4013      	ands	r3, r2
+ 800322a:	b2db      	uxtb	r3, r3
+ 800322c:	187a      	adds	r2, r7, r1
+ 800322e:	7812      	ldrb	r2, [r2, #0]
+ 8003230:	429a      	cmp	r2, r3
+ 8003232:	d103      	bne.n	800323c <ltr329_read_status_register+0x82>
+	{
+		*new_data = 1;
+ 8003234:	68bb      	ldr	r3, [r7, #8]
+ 8003236:	2201      	movs	r2, #1
+ 8003238:	701a      	strb	r2, [r3, #0]
+ 800323a:	e002      	b.n	8003242 <ltr329_read_status_register+0x88>
+	} else
+	{
+		*new_data = 0;
+ 800323c:	68bb      	ldr	r3, [r7, #8]
+ 800323e:	2200      	movs	r2, #0
+ 8003240:	701a      	strb	r2, [r3, #0]
+	}
+
+	/* Check Gain */
+	/* TODO: This might not be safe */
+	uint8_t gain_mask = 0b01110000;
+ 8003242:	2114      	movs	r1, #20
+ 8003244:	187b      	adds	r3, r7, r1
+ 8003246:	2270      	movs	r2, #112	; 0x70
+ 8003248:	701a      	strb	r2, [r3, #0]
+	*gain = status_register_data & gain_mask;
+ 800324a:	2313      	movs	r3, #19
+ 800324c:	18fb      	adds	r3, r7, r3
+ 800324e:	781b      	ldrb	r3, [r3, #0]
+ 8003250:	187a      	adds	r2, r7, r1
+ 8003252:	7812      	ldrb	r2, [r2, #0]
+ 8003254:	4013      	ands	r3, r2
+ 8003256:	b2da      	uxtb	r2, r3
+ 8003258:	687b      	ldr	r3, [r7, #4]
+ 800325a:	701a      	strb	r2, [r3, #0]
+
+	return LTR329_OK;
+ 800325c:	2300      	movs	r3, #0
+}
+ 800325e:	0018      	movs	r0, r3
+ 8003260:	46bd      	mov	sp, r7
+ 8003262:	b006      	add	sp, #24
+ 8003264:	bdb0      	pop	{r4, r5, r7, pc}
+	...
+
+08003268 <modbus_CRC16>:
+ */
+
+/* CRC16 (without memory mapped values)
+ * taken from https://ctlsys.com/support/how_to_compute_the_modbus_rtu_message_crc/ */
+uint16_t modbus_CRC16(const uint8_t *buf, int len)
+{
+ 8003268:	b580      	push	{r7, lr}
+ 800326a:	b086      	sub	sp, #24
+ 800326c:	af00      	add	r7, sp, #0
+ 800326e:	6078      	str	r0, [r7, #4]
+ 8003270:	6039      	str	r1, [r7, #0]
+	uint16_t crc = 0xFFFF;
+ 8003272:	2316      	movs	r3, #22
+ 8003274:	18fb      	adds	r3, r7, r3
+ 8003276:	2201      	movs	r2, #1
+ 8003278:	4252      	negs	r2, r2
+ 800327a:	801a      	strh	r2, [r3, #0]
+
+	for (int pos = 0; pos < len; pos++) {
+ 800327c:	2300      	movs	r3, #0
+ 800327e:	613b      	str	r3, [r7, #16]
+ 8003280:	e02e      	b.n	80032e0 <modbus_CRC16+0x78>
+		crc ^= (uint16_t)buf[pos];          // XOR byte into least sig. byte of crc
+ 8003282:	693b      	ldr	r3, [r7, #16]
+ 8003284:	687a      	ldr	r2, [r7, #4]
+ 8003286:	18d3      	adds	r3, r2, r3
+ 8003288:	781b      	ldrb	r3, [r3, #0]
+ 800328a:	b299      	uxth	r1, r3
+ 800328c:	2216      	movs	r2, #22
+ 800328e:	18bb      	adds	r3, r7, r2
+ 8003290:	18ba      	adds	r2, r7, r2
+ 8003292:	8812      	ldrh	r2, [r2, #0]
+ 8003294:	404a      	eors	r2, r1
+ 8003296:	801a      	strh	r2, [r3, #0]
+       
+		for (int i = 8; i != 0; i--) {    // Loop over each bit
+ 8003298:	2308      	movs	r3, #8
+ 800329a:	60fb      	str	r3, [r7, #12]
+ 800329c:	e01a      	b.n	80032d4 <modbus_CRC16+0x6c>
+			if ((crc & 0x0001) != 0) {      // If the LSB is set
+ 800329e:	2116      	movs	r1, #22
+ 80032a0:	187b      	adds	r3, r7, r1
+ 80032a2:	881b      	ldrh	r3, [r3, #0]
+ 80032a4:	2201      	movs	r2, #1
+ 80032a6:	4013      	ands	r3, r2
+ 80032a8:	d00b      	beq.n	80032c2 <modbus_CRC16+0x5a>
+				crc >>= 1;                    // Shift right and XOR 0xA001
+ 80032aa:	187b      	adds	r3, r7, r1
+ 80032ac:	187a      	adds	r2, r7, r1
+ 80032ae:	8812      	ldrh	r2, [r2, #0]
+ 80032b0:	0852      	lsrs	r2, r2, #1
+ 80032b2:	801a      	strh	r2, [r3, #0]
+				crc ^= 0xA001;
+ 80032b4:	187b      	adds	r3, r7, r1
+ 80032b6:	187a      	adds	r2, r7, r1
+ 80032b8:	8812      	ldrh	r2, [r2, #0]
+ 80032ba:	490f      	ldr	r1, [pc, #60]	; (80032f8 <modbus_CRC16+0x90>)
+ 80032bc:	404a      	eors	r2, r1
+ 80032be:	801a      	strh	r2, [r3, #0]
+ 80032c0:	e005      	b.n	80032ce <modbus_CRC16+0x66>
+			} else {                            // Else LSB is not set
+				crc >>= 1;                    // Just shift right
+ 80032c2:	2216      	movs	r2, #22
+ 80032c4:	18bb      	adds	r3, r7, r2
+ 80032c6:	18ba      	adds	r2, r7, r2
+ 80032c8:	8812      	ldrh	r2, [r2, #0]
+ 80032ca:	0852      	lsrs	r2, r2, #1
+ 80032cc:	801a      	strh	r2, [r3, #0]
+		for (int i = 8; i != 0; i--) {    // Loop over each bit
+ 80032ce:	68fb      	ldr	r3, [r7, #12]
+ 80032d0:	3b01      	subs	r3, #1
+ 80032d2:	60fb      	str	r3, [r7, #12]
+ 80032d4:	68fb      	ldr	r3, [r7, #12]
+ 80032d6:	2b00      	cmp	r3, #0
+ 80032d8:	d1e1      	bne.n	800329e <modbus_CRC16+0x36>
+	for (int pos = 0; pos < len; pos++) {
+ 80032da:	693b      	ldr	r3, [r7, #16]
+ 80032dc:	3301      	adds	r3, #1
+ 80032de:	613b      	str	r3, [r7, #16]
+ 80032e0:	693a      	ldr	r2, [r7, #16]
+ 80032e2:	683b      	ldr	r3, [r7, #0]
+ 80032e4:	429a      	cmp	r2, r3
+ 80032e6:	dbcc      	blt.n	8003282 <modbus_CRC16+0x1a>
+			}
+		}
+	}
+	// Note, this number has low and high bytes swapped, so use it accordingly (or swap bytes)
+	return crc;  
+ 80032e8:	2316      	movs	r3, #22
+ 80032ea:	18fb      	adds	r3, r7, r3
+ 80032ec:	881b      	ldrh	r3, [r3, #0]
+}
+ 80032ee:	0018      	movs	r0, r3
+ 80032f0:	46bd      	mov	sp, r7
+ 80032f2:	b006      	add	sp, #24
+ 80032f4:	bd80      	pop	{r7, pc}
+ 80032f6:	46c0      	nop			; (mov r8, r8)
+ 80032f8:	ffffa001 	.word	0xffffa001
+
+080032fc <modbus_fill_device_id_objects>:
+/*
+ * Private functions
+ */
+
+static uint8_t modbus_fill_device_id_objects(uint8_t *buffer, modbus_transaction_t *transaction)
+{
+ 80032fc:	b5b0      	push	{r4, r5, r7, lr}
+ 80032fe:	b086      	sub	sp, #24
+ 8003300:	af00      	add	r7, sp, #0
+ 8003302:	6078      	str	r0, [r7, #4]
+ 8003304:	6039      	str	r1, [r7, #0]
+	/* we assume buffer is 256 - MODBUS_READ_DEVICE_ID_RESPONSE_HEADER_LEN = 252 bytes long */
+	/* find out how many objects we copy to buffer */
+	int len;
+	uint8_t object_index = transaction->object_id;
+ 8003306:	2313      	movs	r3, #19
+ 8003308:	18fb      	adds	r3, r7, r3
+ 800330a:	6839      	ldr	r1, [r7, #0]
+ 800330c:	220c      	movs	r2, #12
+ 800330e:	32ff      	adds	r2, #255	; 0xff
+ 8003310:	5c8a      	ldrb	r2, [r1, r2]
+ 8003312:	701a      	strb	r2, [r3, #0]
+	uint8_t object_count;
+	uint8_t more_follows = MODBUS_NO_MORE_FOLLOWS;
+ 8003314:	2311      	movs	r3, #17
+ 8003316:	18fb      	adds	r3, r7, r3
+ 8003318:	2200      	movs	r2, #0
+ 800331a:	701a      	strb	r2, [r3, #0]
+	uint8_t next_object_id;
+	uint8_t last_object;
+	const uint8_t max_len = 256 - MODBUS_READ_DEVICE_ID_RESPONSE_HEADER_LEN;
+ 800331c:	230e      	movs	r3, #14
+ 800331e:	18fb      	adds	r3, r7, r3
+ 8003320:	22fc      	movs	r2, #252	; 0xfc
+ 8003322:	701a      	strb	r2, [r3, #0]
+
+	/* last object index */
+	if (transaction->read_device_id_code == MODBUS_CONFORMITY_BASIC) {
+ 8003324:	683a      	ldr	r2, [r7, #0]
+ 8003326:	2385      	movs	r3, #133	; 0x85
+ 8003328:	005b      	lsls	r3, r3, #1
+ 800332a:	5cd3      	ldrb	r3, [r2, r3]
+ 800332c:	2b01      	cmp	r3, #1
+ 800332e:	d104      	bne.n	800333a <modbus_fill_device_id_objects+0x3e>
+		last_object = MODBUS_BASIC_OBJECT_COUNT;
+ 8003330:	230f      	movs	r3, #15
+ 8003332:	18fb      	adds	r3, r7, r3
+ 8003334:	2203      	movs	r2, #3
+ 8003336:	701a      	strb	r2, [r3, #0]
+ 8003338:	e00e      	b.n	8003358 <modbus_fill_device_id_objects+0x5c>
+	} else if (transaction->read_device_id_code == MODBUS_CONFORMITY_REGULAR) {
+ 800333a:	683a      	ldr	r2, [r7, #0]
+ 800333c:	2385      	movs	r3, #133	; 0x85
+ 800333e:	005b      	lsls	r3, r3, #1
+ 8003340:	5cd3      	ldrb	r3, [r2, r3]
+ 8003342:	2b02      	cmp	r3, #2
+ 8003344:	d104      	bne.n	8003350 <modbus_fill_device_id_objects+0x54>
+		last_object = MODBUS_REGULAR_OBJECT_COUNT;
+ 8003346:	230f      	movs	r3, #15
+ 8003348:	18fb      	adds	r3, r7, r3
+ 800334a:	2207      	movs	r2, #7
+ 800334c:	701a      	strb	r2, [r3, #0]
+ 800334e:	e003      	b.n	8003358 <modbus_fill_device_id_objects+0x5c>
+	/* extended not implemented */
+//	} else if (transaction->read_device_id_code == MODBUS_CONFORMITY_EXTENDED){
+//		last_object = MODBUS_EXTENDED_OBJECT_COUNT;
+	} else {
+		/* fallback: regular */
+		last_object = MODBUS_REGULAR_OBJECT_COUNT;
+ 8003350:	230f      	movs	r3, #15
+ 8003352:	18fb      	adds	r3, r7, r3
+ 8003354:	2207      	movs	r2, #7
+ 8003356:	701a      	strb	r2, [r3, #0]
+	}
+	last_object--; // we need index
+ 8003358:	210f      	movs	r1, #15
+ 800335a:	187b      	adds	r3, r7, r1
+ 800335c:	781a      	ldrb	r2, [r3, #0]
+ 800335e:	187b      	adds	r3, r7, r1
+ 8003360:	3a01      	subs	r2, #1
+ 8003362:	701a      	strb	r2, [r3, #0]
+	/* copy as many objects as possible */
+	do {
+		/* copy object */
+		int object_len = strlen(modbus_device_id->object_id[object_index]);
+ 8003364:	4b36      	ldr	r3, [pc, #216]	; (8003440 <modbus_fill_device_id_objects+0x144>)
+ 8003366:	681b      	ldr	r3, [r3, #0]
+ 8003368:	2413      	movs	r4, #19
+ 800336a:	193a      	adds	r2, r7, r4
+ 800336c:	7812      	ldrb	r2, [r2, #0]
+ 800336e:	0092      	lsls	r2, r2, #2
+ 8003370:	58d3      	ldr	r3, [r2, r3]
+ 8003372:	0018      	movs	r0, r3
+ 8003374:	f7fc fec8 	bl	8000108 <strlen>
+ 8003378:	0003      	movs	r3, r0
+ 800337a:	60bb      	str	r3, [r7, #8]
+		if (len + object_len + 2 > max_len) {
+ 800337c:	697a      	ldr	r2, [r7, #20]
+ 800337e:	68bb      	ldr	r3, [r7, #8]
+ 8003380:	18d3      	adds	r3, r2, r3
+ 8003382:	1c5a      	adds	r2, r3, #1
+ 8003384:	230e      	movs	r3, #14
+ 8003386:	18fb      	adds	r3, r7, r3
+ 8003388:	781b      	ldrb	r3, [r3, #0]
+ 800338a:	429a      	cmp	r2, r3
+ 800338c:	db09      	blt.n	80033a2 <modbus_fill_device_id_objects+0xa6>
+			more_follows = MODBUS_MORE_FOLLOWS;
+ 800338e:	2311      	movs	r3, #17
+ 8003390:	18fb      	adds	r3, r7, r3
+ 8003392:	22ff      	movs	r2, #255	; 0xff
+ 8003394:	701a      	strb	r2, [r3, #0]
+			next_object_id = object_index;
+ 8003396:	2310      	movs	r3, #16
+ 8003398:	18fb      	adds	r3, r7, r3
+ 800339a:	193a      	adds	r2, r7, r4
+ 800339c:	7812      	ldrb	r2, [r2, #0]
+ 800339e:	701a      	strb	r2, [r3, #0]
+			break;
+ 80033a0:	e035      	b.n	800340e <modbus_fill_device_id_objects+0x112>
+		}
+		/* offset is for "more follows", "next object id", "object count" */
+		buffer[MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len++] = object_index;
+ 80033a2:	697b      	ldr	r3, [r7, #20]
+ 80033a4:	1c5a      	adds	r2, r3, #1
+ 80033a6:	617a      	str	r2, [r7, #20]
+ 80033a8:	3303      	adds	r3, #3
+ 80033aa:	001a      	movs	r2, r3
+ 80033ac:	687b      	ldr	r3, [r7, #4]
+ 80033ae:	189b      	adds	r3, r3, r2
+ 80033b0:	2513      	movs	r5, #19
+ 80033b2:	197a      	adds	r2, r7, r5
+ 80033b4:	7812      	ldrb	r2, [r2, #0]
+ 80033b6:	701a      	strb	r2, [r3, #0]
+		buffer[MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len++] = object_len;
+ 80033b8:	697b      	ldr	r3, [r7, #20]
+ 80033ba:	1c5a      	adds	r2, r3, #1
+ 80033bc:	617a      	str	r2, [r7, #20]
+ 80033be:	3303      	adds	r3, #3
+ 80033c0:	001a      	movs	r2, r3
+ 80033c2:	687b      	ldr	r3, [r7, #4]
+ 80033c4:	189b      	adds	r3, r3, r2
+ 80033c6:	68ba      	ldr	r2, [r7, #8]
+ 80033c8:	b2d2      	uxtb	r2, r2
+ 80033ca:	701a      	strb	r2, [r3, #0]
+		/* note that string copied to buffer is not null-terminated */
+		strncpy((char*)(buffer + len), (char*)modbus_device_id->object_id[object_index++], object_len);
+ 80033cc:	697b      	ldr	r3, [r7, #20]
+ 80033ce:	687a      	ldr	r2, [r7, #4]
+ 80033d0:	18d0      	adds	r0, r2, r3
+ 80033d2:	4b1b      	ldr	r3, [pc, #108]	; (8003440 <modbus_fill_device_id_objects+0x144>)
+ 80033d4:	681a      	ldr	r2, [r3, #0]
+ 80033d6:	197b      	adds	r3, r7, r5
+ 80033d8:	781b      	ldrb	r3, [r3, #0]
+ 80033da:	1979      	adds	r1, r7, r5
+ 80033dc:	1c5c      	adds	r4, r3, #1
+ 80033de:	700c      	strb	r4, [r1, #0]
+ 80033e0:	009b      	lsls	r3, r3, #2
+ 80033e2:	589b      	ldr	r3, [r3, r2]
+ 80033e4:	68ba      	ldr	r2, [r7, #8]
+ 80033e6:	0019      	movs	r1, r3
+ 80033e8:	f000 fd96 	bl	8003f18 <strncpy>
+		len += object_len;
+ 80033ec:	697a      	ldr	r2, [r7, #20]
+ 80033ee:	68bb      	ldr	r3, [r7, #8]
+ 80033f0:	18d3      	adds	r3, r2, r3
+ 80033f2:	617b      	str	r3, [r7, #20]
+		object_count++;
+ 80033f4:	2112      	movs	r1, #18
+ 80033f6:	187b      	adds	r3, r7, r1
+ 80033f8:	781a      	ldrb	r2, [r3, #0]
+ 80033fa:	187b      	adds	r3, r7, r1
+ 80033fc:	3201      	adds	r2, #1
+ 80033fe:	701a      	strb	r2, [r3, #0]
+	} while (object_index < last_object);
+ 8003400:	197a      	adds	r2, r7, r5
+ 8003402:	230f      	movs	r3, #15
+ 8003404:	18fb      	adds	r3, r7, r3
+ 8003406:	7812      	ldrb	r2, [r2, #0]
+ 8003408:	781b      	ldrb	r3, [r3, #0]
+ 800340a:	429a      	cmp	r2, r3
+ 800340c:	d3aa      	bcc.n	8003364 <modbus_fill_device_id_objects+0x68>
+	buffer[0] = more_follows;
+ 800340e:	687b      	ldr	r3, [r7, #4]
+ 8003410:	2211      	movs	r2, #17
+ 8003412:	18ba      	adds	r2, r7, r2
+ 8003414:	7812      	ldrb	r2, [r2, #0]
+ 8003416:	701a      	strb	r2, [r3, #0]
+	buffer[1] = next_object_id;
+ 8003418:	687b      	ldr	r3, [r7, #4]
+ 800341a:	3301      	adds	r3, #1
+ 800341c:	2210      	movs	r2, #16
+ 800341e:	18ba      	adds	r2, r7, r2
+ 8003420:	7812      	ldrb	r2, [r2, #0]
+ 8003422:	701a      	strb	r2, [r3, #0]
+	buffer[2] = object_count;
+ 8003424:	687b      	ldr	r3, [r7, #4]
+ 8003426:	3302      	adds	r3, #2
+ 8003428:	2212      	movs	r2, #18
+ 800342a:	18ba      	adds	r2, r7, r2
+ 800342c:	7812      	ldrb	r2, [r2, #0]
+ 800342e:	701a      	strb	r2, [r3, #0]
+	return MODBUS_READ_DEVICE_ID_RESPONSE_OFFSET + len;
+ 8003430:	697b      	ldr	r3, [r7, #20]
+ 8003432:	b2db      	uxtb	r3, r3
+ 8003434:	3303      	adds	r3, #3
+ 8003436:	b2db      	uxtb	r3, r3
+}
+ 8003438:	0018      	movs	r0, r3
+ 800343a:	46bd      	mov	sp, r7
+ 800343c:	b006      	add	sp, #24
+ 800343e:	bdb0      	pop	{r4, r5, r7, pc}
+ 8003440:	20000038 	.word	0x20000038
+
+08003444 <modbus_transaction_to_buffer>:
+
+/* here we assume buffer has minimal size of MODBUS_MAX_RTU_FRAME_SIZE;
+ * this function is private, so hopefully it's going to be ok */
+static int8_t modbus_transaction_to_buffer(uint8_t *buffer, uint8_t *msg_len, modbus_transaction_t *transaction)
+{
+ 8003444:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 8003446:	b089      	sub	sp, #36	; 0x24
+ 8003448:	af00      	add	r7, sp, #0
+ 800344a:	60f8      	str	r0, [r7, #12]
+ 800344c:	60b9      	str	r1, [r7, #8]
+ 800344e:	607a      	str	r2, [r7, #4]
+	uint16_t crc16;
+	uint8_t byte_count;
+	uint8_t buffer_pos = 0;
+ 8003450:	201f      	movs	r0, #31
+ 8003452:	183b      	adds	r3, r7, r0
+ 8003454:	2200      	movs	r2, #0
+ 8003456:	701a      	strb	r2, [r3, #0]
+
+	// TODO use relative indices (increments) instead of absolute
+	buffer[buffer_pos++] = modbus_slave_address;
+ 8003458:	183b      	adds	r3, r7, r0
+ 800345a:	781b      	ldrb	r3, [r3, #0]
+ 800345c:	183a      	adds	r2, r7, r0
+ 800345e:	1c59      	adds	r1, r3, #1
+ 8003460:	7011      	strb	r1, [r2, #0]
+ 8003462:	001a      	movs	r2, r3
+ 8003464:	68fb      	ldr	r3, [r7, #12]
+ 8003466:	189b      	adds	r3, r3, r2
+ 8003468:	4aaa      	ldr	r2, [pc, #680]	; (8003714 <modbus_transaction_to_buffer+0x2d0>)
+ 800346a:	7812      	ldrb	r2, [r2, #0]
+ 800346c:	701a      	strb	r2, [r3, #0]
+	buffer[buffer_pos++] = transaction->function_code;
+ 800346e:	183b      	adds	r3, r7, r0
+ 8003470:	781b      	ldrb	r3, [r3, #0]
+ 8003472:	183a      	adds	r2, r7, r0
+ 8003474:	1c59      	adds	r1, r3, #1
+ 8003476:	7011      	strb	r1, [r2, #0]
+ 8003478:	001a      	movs	r2, r3
+ 800347a:	68fb      	ldr	r3, [r7, #12]
+ 800347c:	189b      	adds	r3, r3, r2
+ 800347e:	687a      	ldr	r2, [r7, #4]
+ 8003480:	7812      	ldrb	r2, [r2, #0]
+ 8003482:	701a      	strb	r2, [r3, #0]
+	*msg_len = 5;
+ 8003484:	68bb      	ldr	r3, [r7, #8]
+ 8003486:	2205      	movs	r2, #5
+ 8003488:	701a      	strb	r2, [r3, #0]
+
+	if (transaction->function_code & MODBUS_ERROR_FLAG) {
+ 800348a:	687b      	ldr	r3, [r7, #4]
+ 800348c:	781b      	ldrb	r3, [r3, #0]
+ 800348e:	b25b      	sxtb	r3, r3
+ 8003490:	2b00      	cmp	r3, #0
+ 8003492:	da0b      	bge.n	80034ac <modbus_transaction_to_buffer+0x68>
+		/* sending error reply */
+		buffer[buffer_pos++] = transaction->exception;
+ 8003494:	183b      	adds	r3, r7, r0
+ 8003496:	781b      	ldrb	r3, [r3, #0]
+ 8003498:	183a      	adds	r2, r7, r0
+ 800349a:	1c59      	adds	r1, r3, #1
+ 800349c:	7011      	strb	r1, [r2, #0]
+ 800349e:	001a      	movs	r2, r3
+ 80034a0:	68fb      	ldr	r3, [r7, #12]
+ 80034a2:	189b      	adds	r3, r3, r2
+ 80034a4:	687a      	ldr	r2, [r7, #4]
+ 80034a6:	79d2      	ldrb	r2, [r2, #7]
+ 80034a8:	701a      	strb	r2, [r3, #0]
+ 80034aa:	e107      	b.n	80036bc <modbus_transaction_to_buffer+0x278>
+	} else {
+		switch (transaction->function_code) {
+ 80034ac:	687b      	ldr	r3, [r7, #4]
+ 80034ae:	781b      	ldrb	r3, [r3, #0]
+ 80034b0:	2b2b      	cmp	r3, #43	; 0x2b
+ 80034b2:	d100      	bne.n	80034b6 <modbus_transaction_to_buffer+0x72>
+ 80034b4:	e0c8      	b.n	8003648 <modbus_transaction_to_buffer+0x204>
+ 80034b6:	dd00      	ble.n	80034ba <modbus_transaction_to_buffer+0x76>
+ 80034b8:	e0ff      	b.n	80036ba <modbus_transaction_to_buffer+0x276>
+ 80034ba:	2b10      	cmp	r3, #16
+ 80034bc:	d100      	bne.n	80034c0 <modbus_transaction_to_buffer+0x7c>
+ 80034be:	e08c      	b.n	80035da <modbus_transaction_to_buffer+0x196>
+ 80034c0:	dd00      	ble.n	80034c4 <modbus_transaction_to_buffer+0x80>
+ 80034c2:	e0fa      	b.n	80036ba <modbus_transaction_to_buffer+0x276>
+ 80034c4:	2b04      	cmp	r3, #4
+ 80034c6:	dc02      	bgt.n	80034ce <modbus_transaction_to_buffer+0x8a>
+ 80034c8:	2b03      	cmp	r3, #3
+ 80034ca:	da03      	bge.n	80034d4 <modbus_transaction_to_buffer+0x90>
+				/* fill buffer with as many objects as possible  */
+				*msg_len = modbus_fill_device_id_objects(buffer+buffer_pos, transaction);
+				*msg_len += 7; /* includes 2 bytes for CRC */
+				break;
+			default:
+				break;
+ 80034cc:	e0f5      	b.n	80036ba <modbus_transaction_to_buffer+0x276>
+		switch (transaction->function_code) {
+ 80034ce:	2b06      	cmp	r3, #6
+ 80034d0:	d04a      	beq.n	8003568 <modbus_transaction_to_buffer+0x124>
+				break;
+ 80034d2:	e0f2      	b.n	80036ba <modbus_transaction_to_buffer+0x276>
+				byte_count = transaction->register_count * 2;
+ 80034d4:	687b      	ldr	r3, [r7, #4]
+ 80034d6:	799b      	ldrb	r3, [r3, #6]
+ 80034d8:	2017      	movs	r0, #23
+ 80034da:	183a      	adds	r2, r7, r0
+ 80034dc:	18db      	adds	r3, r3, r3
+ 80034de:	7013      	strb	r3, [r2, #0]
+				buffer[buffer_pos++] = byte_count;
+ 80034e0:	221f      	movs	r2, #31
+ 80034e2:	18bb      	adds	r3, r7, r2
+ 80034e4:	781b      	ldrb	r3, [r3, #0]
+ 80034e6:	18ba      	adds	r2, r7, r2
+ 80034e8:	1c59      	adds	r1, r3, #1
+ 80034ea:	7011      	strb	r1, [r2, #0]
+ 80034ec:	001a      	movs	r2, r3
+ 80034ee:	68fb      	ldr	r3, [r7, #12]
+ 80034f0:	189b      	adds	r3, r3, r2
+ 80034f2:	183a      	adds	r2, r7, r0
+ 80034f4:	7812      	ldrb	r2, [r2, #0]
+ 80034f6:	701a      	strb	r2, [r3, #0]
+				*msg_len = byte_count + 5;
+ 80034f8:	183b      	adds	r3, r7, r0
+ 80034fa:	781b      	ldrb	r3, [r3, #0]
+ 80034fc:	3305      	adds	r3, #5
+ 80034fe:	b2da      	uxtb	r2, r3
+ 8003500:	68bb      	ldr	r3, [r7, #8]
+ 8003502:	701a      	strb	r2, [r3, #0]
+				for (int i = 0; i < transaction->register_count; i++) {
+ 8003504:	2300      	movs	r3, #0
+ 8003506:	61bb      	str	r3, [r7, #24]
+ 8003508:	e027      	b.n	800355a <modbus_transaction_to_buffer+0x116>
+					buffer[buffer_pos++] = transaction->buffer16b[i] >> 8;
+ 800350a:	687a      	ldr	r2, [r7, #4]
+ 800350c:	69bb      	ldr	r3, [r7, #24]
+ 800350e:	3304      	adds	r3, #4
+ 8003510:	005b      	lsls	r3, r3, #1
+ 8003512:	18d3      	adds	r3, r2, r3
+ 8003514:	3302      	adds	r3, #2
+ 8003516:	881b      	ldrh	r3, [r3, #0]
+ 8003518:	0a1b      	lsrs	r3, r3, #8
+ 800351a:	b299      	uxth	r1, r3
+ 800351c:	241f      	movs	r4, #31
+ 800351e:	193b      	adds	r3, r7, r4
+ 8003520:	781b      	ldrb	r3, [r3, #0]
+ 8003522:	193a      	adds	r2, r7, r4
+ 8003524:	1c58      	adds	r0, r3, #1
+ 8003526:	7010      	strb	r0, [r2, #0]
+ 8003528:	001a      	movs	r2, r3
+ 800352a:	68fb      	ldr	r3, [r7, #12]
+ 800352c:	189b      	adds	r3, r3, r2
+ 800352e:	b2ca      	uxtb	r2, r1
+ 8003530:	701a      	strb	r2, [r3, #0]
+					buffer[buffer_pos++] = transaction->buffer16b[i] & 0xff;
+ 8003532:	687a      	ldr	r2, [r7, #4]
+ 8003534:	69bb      	ldr	r3, [r7, #24]
+ 8003536:	3304      	adds	r3, #4
+ 8003538:	005b      	lsls	r3, r3, #1
+ 800353a:	18d3      	adds	r3, r2, r3
+ 800353c:	3302      	adds	r3, #2
+ 800353e:	8819      	ldrh	r1, [r3, #0]
+ 8003540:	193b      	adds	r3, r7, r4
+ 8003542:	781b      	ldrb	r3, [r3, #0]
+ 8003544:	193a      	adds	r2, r7, r4
+ 8003546:	1c58      	adds	r0, r3, #1
+ 8003548:	7010      	strb	r0, [r2, #0]
+ 800354a:	001a      	movs	r2, r3
+ 800354c:	68fb      	ldr	r3, [r7, #12]
+ 800354e:	189b      	adds	r3, r3, r2
+ 8003550:	b2ca      	uxtb	r2, r1
+ 8003552:	701a      	strb	r2, [r3, #0]
+				for (int i = 0; i < transaction->register_count; i++) {
+ 8003554:	69bb      	ldr	r3, [r7, #24]
+ 8003556:	3301      	adds	r3, #1
+ 8003558:	61bb      	str	r3, [r7, #24]
+ 800355a:	687b      	ldr	r3, [r7, #4]
+ 800355c:	799b      	ldrb	r3, [r3, #6]
+ 800355e:	001a      	movs	r2, r3
+ 8003560:	69bb      	ldr	r3, [r7, #24]
+ 8003562:	4293      	cmp	r3, r2
+ 8003564:	dbd1      	blt.n	800350a <modbus_transaction_to_buffer+0xc6>
+				break;
+ 8003566:	e0a9      	b.n	80036bc <modbus_transaction_to_buffer+0x278>
+				buffer[buffer_pos++] = (uint8_t) (transaction->register_address >> 8);
+ 8003568:	687b      	ldr	r3, [r7, #4]
+ 800356a:	885b      	ldrh	r3, [r3, #2]
+ 800356c:	0a1b      	lsrs	r3, r3, #8
+ 800356e:	b299      	uxth	r1, r3
+ 8003570:	241f      	movs	r4, #31
+ 8003572:	193b      	adds	r3, r7, r4
+ 8003574:	781b      	ldrb	r3, [r3, #0]
+ 8003576:	193a      	adds	r2, r7, r4
+ 8003578:	1c58      	adds	r0, r3, #1
+ 800357a:	7010      	strb	r0, [r2, #0]
+ 800357c:	001a      	movs	r2, r3
+ 800357e:	68fb      	ldr	r3, [r7, #12]
+ 8003580:	189b      	adds	r3, r3, r2
+ 8003582:	b2ca      	uxtb	r2, r1
+ 8003584:	701a      	strb	r2, [r3, #0]
+				buffer[buffer_pos++] = (uint8_t) transaction->register_address;
+ 8003586:	687b      	ldr	r3, [r7, #4]
+ 8003588:	8859      	ldrh	r1, [r3, #2]
+ 800358a:	193b      	adds	r3, r7, r4
+ 800358c:	781b      	ldrb	r3, [r3, #0]
+ 800358e:	193a      	adds	r2, r7, r4
+ 8003590:	1c58      	adds	r0, r3, #1
+ 8003592:	7010      	strb	r0, [r2, #0]
+ 8003594:	001a      	movs	r2, r3
+ 8003596:	68fb      	ldr	r3, [r7, #12]
+ 8003598:	189b      	adds	r3, r3, r2
+ 800359a:	b2ca      	uxtb	r2, r1
+ 800359c:	701a      	strb	r2, [r3, #0]
+				buffer[buffer_pos++] = (uint8_t) (transaction->holding_registers[0] >> 8);
+ 800359e:	687b      	ldr	r3, [r7, #4]
+ 80035a0:	895b      	ldrh	r3, [r3, #10]
+ 80035a2:	0a1b      	lsrs	r3, r3, #8
+ 80035a4:	b299      	uxth	r1, r3
+ 80035a6:	193b      	adds	r3, r7, r4
+ 80035a8:	781b      	ldrb	r3, [r3, #0]
+ 80035aa:	193a      	adds	r2, r7, r4
+ 80035ac:	1c58      	adds	r0, r3, #1
+ 80035ae:	7010      	strb	r0, [r2, #0]
+ 80035b0:	001a      	movs	r2, r3
+ 80035b2:	68fb      	ldr	r3, [r7, #12]
+ 80035b4:	189b      	adds	r3, r3, r2
+ 80035b6:	b2ca      	uxtb	r2, r1
+ 80035b8:	701a      	strb	r2, [r3, #0]
+				buffer[buffer_pos++] = (uint8_t) transaction->holding_registers[0];
+ 80035ba:	687b      	ldr	r3, [r7, #4]
+ 80035bc:	8959      	ldrh	r1, [r3, #10]
+ 80035be:	193b      	adds	r3, r7, r4
+ 80035c0:	781b      	ldrb	r3, [r3, #0]
+ 80035c2:	193a      	adds	r2, r7, r4
+ 80035c4:	1c58      	adds	r0, r3, #1
+ 80035c6:	7010      	strb	r0, [r2, #0]
+ 80035c8:	001a      	movs	r2, r3
+ 80035ca:	68fb      	ldr	r3, [r7, #12]
+ 80035cc:	189b      	adds	r3, r3, r2
+ 80035ce:	b2ca      	uxtb	r2, r1
+ 80035d0:	701a      	strb	r2, [r3, #0]
+				*msg_len = 8; /* includes 2 bytes for CRC */
+ 80035d2:	68bb      	ldr	r3, [r7, #8]
+ 80035d4:	2208      	movs	r2, #8
+ 80035d6:	701a      	strb	r2, [r3, #0]
+				break;
+ 80035d8:	e070      	b.n	80036bc <modbus_transaction_to_buffer+0x278>
+				buffer[buffer_pos++] = (uint8_t) (transaction->register_address >> 8);
+ 80035da:	687b      	ldr	r3, [r7, #4]
+ 80035dc:	885b      	ldrh	r3, [r3, #2]
+ 80035de:	0a1b      	lsrs	r3, r3, #8
+ 80035e0:	b299      	uxth	r1, r3
+ 80035e2:	241f      	movs	r4, #31
+ 80035e4:	193b      	adds	r3, r7, r4
+ 80035e6:	781b      	ldrb	r3, [r3, #0]
+ 80035e8:	193a      	adds	r2, r7, r4
+ 80035ea:	1c58      	adds	r0, r3, #1
+ 80035ec:	7010      	strb	r0, [r2, #0]
+ 80035ee:	001a      	movs	r2, r3
+ 80035f0:	68fb      	ldr	r3, [r7, #12]
+ 80035f2:	189b      	adds	r3, r3, r2
+ 80035f4:	b2ca      	uxtb	r2, r1
+ 80035f6:	701a      	strb	r2, [r3, #0]
+				buffer[buffer_pos++] = (uint8_t) transaction->register_address;
+ 80035f8:	687b      	ldr	r3, [r7, #4]
+ 80035fa:	8859      	ldrh	r1, [r3, #2]
+ 80035fc:	193b      	adds	r3, r7, r4
+ 80035fe:	781b      	ldrb	r3, [r3, #0]
+ 8003600:	193a      	adds	r2, r7, r4
+ 8003602:	1c58      	adds	r0, r3, #1
+ 8003604:	7010      	strb	r0, [r2, #0]
+ 8003606:	001a      	movs	r2, r3
+ 8003608:	68fb      	ldr	r3, [r7, #12]
+ 800360a:	189b      	adds	r3, r3, r2
+ 800360c:	b2ca      	uxtb	r2, r1
+ 800360e:	701a      	strb	r2, [r3, #0]
+				buffer[buffer_pos++] = (uint8_t) (transaction->register_count >> 8);
+ 8003610:	687b      	ldr	r3, [r7, #4]
+ 8003612:	799b      	ldrb	r3, [r3, #6]
+ 8003614:	1219      	asrs	r1, r3, #8
+ 8003616:	193b      	adds	r3, r7, r4
+ 8003618:	781b      	ldrb	r3, [r3, #0]
+ 800361a:	193a      	adds	r2, r7, r4
+ 800361c:	1c58      	adds	r0, r3, #1
+ 800361e:	7010      	strb	r0, [r2, #0]
+ 8003620:	001a      	movs	r2, r3
+ 8003622:	68fb      	ldr	r3, [r7, #12]
+ 8003624:	189b      	adds	r3, r3, r2
+ 8003626:	b2ca      	uxtb	r2, r1
+ 8003628:	701a      	strb	r2, [r3, #0]
+				buffer[buffer_pos++] = (uint8_t) transaction->register_count;
+ 800362a:	193b      	adds	r3, r7, r4
+ 800362c:	781b      	ldrb	r3, [r3, #0]
+ 800362e:	193a      	adds	r2, r7, r4
+ 8003630:	1c59      	adds	r1, r3, #1
+ 8003632:	7011      	strb	r1, [r2, #0]
+ 8003634:	001a      	movs	r2, r3
+ 8003636:	68fb      	ldr	r3, [r7, #12]
+ 8003638:	189b      	adds	r3, r3, r2
+ 800363a:	687a      	ldr	r2, [r7, #4]
+ 800363c:	7992      	ldrb	r2, [r2, #6]
+ 800363e:	701a      	strb	r2, [r3, #0]
+				*msg_len = 8; /* includes 2 bytes for CRC */
+ 8003640:	68bb      	ldr	r3, [r7, #8]
+ 8003642:	2208      	movs	r2, #8
+ 8003644:	701a      	strb	r2, [r3, #0]
+				break;
+ 8003646:	e039      	b.n	80036bc <modbus_transaction_to_buffer+0x278>
+				buffer[buffer_pos++] = MODBUS_MEI;
+ 8003648:	201f      	movs	r0, #31
+ 800364a:	183b      	adds	r3, r7, r0
+ 800364c:	781b      	ldrb	r3, [r3, #0]
+ 800364e:	183a      	adds	r2, r7, r0
+ 8003650:	1c59      	adds	r1, r3, #1
+ 8003652:	7011      	strb	r1, [r2, #0]
+ 8003654:	001a      	movs	r2, r3
+ 8003656:	68fb      	ldr	r3, [r7, #12]
+ 8003658:	189b      	adds	r3, r3, r2
+ 800365a:	220e      	movs	r2, #14
+ 800365c:	701a      	strb	r2, [r3, #0]
+				buffer[buffer_pos++] = transaction->read_device_id_code;
+ 800365e:	183b      	adds	r3, r7, r0
+ 8003660:	781b      	ldrb	r3, [r3, #0]
+ 8003662:	183a      	adds	r2, r7, r0
+ 8003664:	1c59      	adds	r1, r3, #1
+ 8003666:	7011      	strb	r1, [r2, #0]
+ 8003668:	001a      	movs	r2, r3
+ 800366a:	68fb      	ldr	r3, [r7, #12]
+ 800366c:	189b      	adds	r3, r3, r2
+ 800366e:	6879      	ldr	r1, [r7, #4]
+ 8003670:	2285      	movs	r2, #133	; 0x85
+ 8003672:	0052      	lsls	r2, r2, #1
+ 8003674:	5c8a      	ldrb	r2, [r1, r2]
+ 8003676:	701a      	strb	r2, [r3, #0]
+				buffer[buffer_pos++] = modbus_device_id->conformity_level;
+ 8003678:	4b27      	ldr	r3, [pc, #156]	; (8003718 <modbus_transaction_to_buffer+0x2d4>)
+ 800367a:	681a      	ldr	r2, [r3, #0]
+ 800367c:	183b      	adds	r3, r7, r0
+ 800367e:	781b      	ldrb	r3, [r3, #0]
+ 8003680:	0004      	movs	r4, r0
+ 8003682:	1839      	adds	r1, r7, r0
+ 8003684:	1c58      	adds	r0, r3, #1
+ 8003686:	7008      	strb	r0, [r1, #0]
+ 8003688:	0019      	movs	r1, r3
+ 800368a:	68fb      	ldr	r3, [r7, #12]
+ 800368c:	185b      	adds	r3, r3, r1
+ 800368e:	7f12      	ldrb	r2, [r2, #28]
+ 8003690:	701a      	strb	r2, [r3, #0]
+				*msg_len = modbus_fill_device_id_objects(buffer+buffer_pos, transaction);
+ 8003692:	193b      	adds	r3, r7, r4
+ 8003694:	781b      	ldrb	r3, [r3, #0]
+ 8003696:	68fa      	ldr	r2, [r7, #12]
+ 8003698:	18d3      	adds	r3, r2, r3
+ 800369a:	687a      	ldr	r2, [r7, #4]
+ 800369c:	0011      	movs	r1, r2
+ 800369e:	0018      	movs	r0, r3
+ 80036a0:	f7ff fe2c 	bl	80032fc <modbus_fill_device_id_objects>
+ 80036a4:	0003      	movs	r3, r0
+ 80036a6:	001a      	movs	r2, r3
+ 80036a8:	68bb      	ldr	r3, [r7, #8]
+ 80036aa:	701a      	strb	r2, [r3, #0]
+				*msg_len += 7; /* includes 2 bytes for CRC */
+ 80036ac:	68bb      	ldr	r3, [r7, #8]
+ 80036ae:	781b      	ldrb	r3, [r3, #0]
+ 80036b0:	3307      	adds	r3, #7
+ 80036b2:	b2da      	uxtb	r2, r3
+ 80036b4:	68bb      	ldr	r3, [r7, #8]
+ 80036b6:	701a      	strb	r2, [r3, #0]
+				break;
+ 80036b8:	e000      	b.n	80036bc <modbus_transaction_to_buffer+0x278>
+				break;
+ 80036ba:	46c0      	nop			; (mov r8, r8)
+		}
+	}
+	crc16 = modbus_CRC16(buffer, buffer_pos); /* last two bytes is the checksum itself */
+ 80036bc:	251f      	movs	r5, #31
+ 80036be:	197b      	adds	r3, r7, r5
+ 80036c0:	781a      	ldrb	r2, [r3, #0]
+ 80036c2:	2614      	movs	r6, #20
+ 80036c4:	19bc      	adds	r4, r7, r6
+ 80036c6:	68fb      	ldr	r3, [r7, #12]
+ 80036c8:	0011      	movs	r1, r2
+ 80036ca:	0018      	movs	r0, r3
+ 80036cc:	f7ff fdcc 	bl	8003268 <modbus_CRC16>
+ 80036d0:	0003      	movs	r3, r0
+ 80036d2:	8023      	strh	r3, [r4, #0]
+	buffer[buffer_pos++] = crc16 & 0xff;
+ 80036d4:	0028      	movs	r0, r5
+ 80036d6:	183b      	adds	r3, r7, r0
+ 80036d8:	781b      	ldrb	r3, [r3, #0]
+ 80036da:	183a      	adds	r2, r7, r0
+ 80036dc:	1c59      	adds	r1, r3, #1
+ 80036de:	7011      	strb	r1, [r2, #0]
+ 80036e0:	001a      	movs	r2, r3
+ 80036e2:	68fb      	ldr	r3, [r7, #12]
+ 80036e4:	189b      	adds	r3, r3, r2
+ 80036e6:	19ba      	adds	r2, r7, r6
+ 80036e8:	8812      	ldrh	r2, [r2, #0]
+ 80036ea:	b2d2      	uxtb	r2, r2
+ 80036ec:	701a      	strb	r2, [r3, #0]
+	buffer[buffer_pos++] = crc16 >> 8;
+ 80036ee:	19bb      	adds	r3, r7, r6
+ 80036f0:	881b      	ldrh	r3, [r3, #0]
+ 80036f2:	0a1b      	lsrs	r3, r3, #8
+ 80036f4:	b299      	uxth	r1, r3
+ 80036f6:	183b      	adds	r3, r7, r0
+ 80036f8:	781b      	ldrb	r3, [r3, #0]
+ 80036fa:	183a      	adds	r2, r7, r0
+ 80036fc:	1c58      	adds	r0, r3, #1
+ 80036fe:	7010      	strb	r0, [r2, #0]
+ 8003700:	001a      	movs	r2, r3
+ 8003702:	68fb      	ldr	r3, [r7, #12]
+ 8003704:	189b      	adds	r3, r3, r2
+ 8003706:	b2ca      	uxtb	r2, r1
+ 8003708:	701a      	strb	r2, [r3, #0]
+	return MODBUS_OK;
+ 800370a:	2300      	movs	r3, #0
+}
+ 800370c:	0018      	movs	r0, r3
+ 800370e:	46bd      	mov	sp, r7
+ 8003710:	b009      	add	sp, #36	; 0x24
+ 8003712:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 8003714:	20000004 	.word	0x20000004
+ 8003718:	20000038 	.word	0x20000038
+
+0800371c <modbus_process_device_id_request>:
+
+static int8_t modbus_process_device_id_request(const uint8_t *buffer, int len, modbus_transaction_t *transaction)
+{
+ 800371c:	b580      	push	{r7, lr}
+ 800371e:	b086      	sub	sp, #24
+ 8003720:	af00      	add	r7, sp, #0
+ 8003722:	60f8      	str	r0, [r7, #12]
+ 8003724:	60b9      	str	r1, [r7, #8]
+ 8003726:	607a      	str	r2, [r7, #4]
+	uint8_t MEI_type;
+	uint8_t read_device_id_code;
+	uint8_t object_id;
+	uint8_t buffer_pos = 0;
+ 8003728:	2317      	movs	r3, #23
+ 800372a:	18fb      	adds	r3, r7, r3
+ 800372c:	2200      	movs	r2, #0
+ 800372e:	701a      	strb	r2, [r3, #0]
+
+	if (transaction->broadcast == 1) {
+ 8003730:	687b      	ldr	r3, [r7, #4]
+ 8003732:	7a1b      	ldrb	r3, [r3, #8]
+ 8003734:	2b01      	cmp	r3, #1
+ 8003736:	d102      	bne.n	800373e <modbus_process_device_id_request+0x22>
+		/* Read device ID broadcast - invalid; ignore (master will get timeout) */
+		return MODBUS_ERROR;
+ 8003738:	2301      	movs	r3, #1
+ 800373a:	425b      	negs	r3, r3
+ 800373c:	e061      	b.n	8003802 <modbus_process_device_id_request+0xe6>
+	}
+	if (modbus_device_id == NULL) {
+ 800373e:	4b33      	ldr	r3, [pc, #204]	; (800380c <modbus_process_device_id_request+0xf0>)
+ 8003740:	681b      	ldr	r3, [r3, #0]
+ 8003742:	2b00      	cmp	r3, #0
+ 8003744:	d104      	bne.n	8003750 <modbus_process_device_id_request+0x34>
+		/* modbus_device_id not initialized; user should use modbus_slave_init_device_id() first */
+		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DEVICE_ID_CODE;
+ 8003746:	687b      	ldr	r3, [r7, #4]
+ 8003748:	2203      	movs	r2, #3
+ 800374a:	71da      	strb	r2, [r3, #7]
+		return MODBUS_OK;
+ 800374c:	2300      	movs	r3, #0
+ 800374e:	e058      	b.n	8003802 <modbus_process_device_id_request+0xe6>
+	}
+	if (len < MODBUS_READ_DEVICE_ID_REQUEST_LEN) {
+ 8003750:	68bb      	ldr	r3, [r7, #8]
+ 8003752:	2b03      	cmp	r3, #3
+ 8003754:	dc02      	bgt.n	800375c <modbus_process_device_id_request+0x40>
+		/* frame too short, ignore */
+		return MODBUS_ERROR;
+ 8003756:	2301      	movs	r3, #1
+ 8003758:	425b      	negs	r3, r3
+ 800375a:	e052      	b.n	8003802 <modbus_process_device_id_request+0xe6>
+	}
+	/* next byte should be MEI = 0x0E */
+	MEI_type = buffer[buffer_pos++];
+ 800375c:	2217      	movs	r2, #23
+ 800375e:	18bb      	adds	r3, r7, r2
+ 8003760:	781b      	ldrb	r3, [r3, #0]
+ 8003762:	18ba      	adds	r2, r7, r2
+ 8003764:	1c59      	adds	r1, r3, #1
+ 8003766:	7011      	strb	r1, [r2, #0]
+ 8003768:	001a      	movs	r2, r3
+ 800376a:	68fb      	ldr	r3, [r7, #12]
+ 800376c:	189a      	adds	r2, r3, r2
+ 800376e:	2116      	movs	r1, #22
+ 8003770:	187b      	adds	r3, r7, r1
+ 8003772:	7812      	ldrb	r2, [r2, #0]
+ 8003774:	701a      	strb	r2, [r3, #0]
+	if (MEI_type != MODBUS_MEI) {
+ 8003776:	187b      	adds	r3, r7, r1
+ 8003778:	781b      	ldrb	r3, [r3, #0]
+ 800377a:	2b0e      	cmp	r3, #14
+ 800377c:	d002      	beq.n	8003784 <modbus_process_device_id_request+0x68>
+		/* invalid MEI, ignore. I have no idea what MEI does, but it should always be 0x0E */
+		return MODBUS_ERROR;
+ 800377e:	2301      	movs	r3, #1
+ 8003780:	425b      	negs	r3, r3
+ 8003782:	e03e      	b.n	8003802 <modbus_process_device_id_request+0xe6>
+	}
+	/* next byte is read device id code */
+	read_device_id_code = buffer[buffer_pos++];
+ 8003784:	2217      	movs	r2, #23
+ 8003786:	18bb      	adds	r3, r7, r2
+ 8003788:	781b      	ldrb	r3, [r3, #0]
+ 800378a:	18ba      	adds	r2, r7, r2
+ 800378c:	1c59      	adds	r1, r3, #1
+ 800378e:	7011      	strb	r1, [r2, #0]
+ 8003790:	001a      	movs	r2, r3
+ 8003792:	68fb      	ldr	r3, [r7, #12]
+ 8003794:	189a      	adds	r2, r3, r2
+ 8003796:	2115      	movs	r1, #21
+ 8003798:	187b      	adds	r3, r7, r1
+ 800379a:	7812      	ldrb	r2, [r2, #0]
+ 800379c:	701a      	strb	r2, [r3, #0]
+	/* read device id code can only have values 1,2,3,4 */
+	if (read_device_id_code < 1 || read_device_id_code > 4) {
+ 800379e:	000a      	movs	r2, r1
+ 80037a0:	18bb      	adds	r3, r7, r2
+ 80037a2:	781b      	ldrb	r3, [r3, #0]
+ 80037a4:	2b00      	cmp	r3, #0
+ 80037a6:	d003      	beq.n	80037b0 <modbus_process_device_id_request+0x94>
+ 80037a8:	18bb      	adds	r3, r7, r2
+ 80037aa:	781b      	ldrb	r3, [r3, #0]
+ 80037ac:	2b04      	cmp	r3, #4
+ 80037ae:	d904      	bls.n	80037ba <modbus_process_device_id_request+0x9e>
+		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DEVICE_ID_CODE;
+ 80037b0:	687b      	ldr	r3, [r7, #4]
+ 80037b2:	2203      	movs	r2, #3
+ 80037b4:	71da      	strb	r2, [r3, #7]
+		return MODBUS_OK;
+ 80037b6:	2300      	movs	r3, #0
+ 80037b8:	e023      	b.n	8003802 <modbus_process_device_id_request+0xe6>
+	}
+	transaction->read_device_id_code = read_device_id_code;
+ 80037ba:	687a      	ldr	r2, [r7, #4]
+ 80037bc:	2315      	movs	r3, #21
+ 80037be:	18f9      	adds	r1, r7, r3
+ 80037c0:	2385      	movs	r3, #133	; 0x85
+ 80037c2:	005b      	lsls	r3, r3, #1
+ 80037c4:	7809      	ldrb	r1, [r1, #0]
+ 80037c6:	54d1      	strb	r1, [r2, r3]
+	/* next byte is object id */
+	object_id = buffer[buffer_pos++];
+ 80037c8:	2217      	movs	r2, #23
+ 80037ca:	18bb      	adds	r3, r7, r2
+ 80037cc:	781b      	ldrb	r3, [r3, #0]
+ 80037ce:	18ba      	adds	r2, r7, r2
+ 80037d0:	1c59      	adds	r1, r3, #1
+ 80037d2:	7011      	strb	r1, [r2, #0]
+ 80037d4:	001a      	movs	r2, r3
+ 80037d6:	68fb      	ldr	r3, [r7, #12]
+ 80037d8:	189a      	adds	r2, r3, r2
+ 80037da:	2014      	movs	r0, #20
+ 80037dc:	183b      	adds	r3, r7, r0
+ 80037de:	7812      	ldrb	r2, [r2, #0]
+ 80037e0:	701a      	strb	r2, [r3, #0]
+	transaction->object_id = object_id;
+ 80037e2:	687a      	ldr	r2, [r7, #4]
+ 80037e4:	1839      	adds	r1, r7, r0
+ 80037e6:	230c      	movs	r3, #12
+ 80037e8:	33ff      	adds	r3, #255	; 0xff
+ 80037ea:	7809      	ldrb	r1, [r1, #0]
+ 80037ec:	54d1      	strb	r1, [r2, r3]
+	if (object_id > MODBUS_DEVICE_ID_OBJECT_NUM) {
+ 80037ee:	183b      	adds	r3, r7, r0
+ 80037f0:	781b      	ldrb	r3, [r3, #0]
+ 80037f2:	2b07      	cmp	r3, #7
+ 80037f4:	d904      	bls.n	8003800 <modbus_process_device_id_request+0xe4>
+		/* illegal object ID */
+		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS;
+ 80037f6:	687b      	ldr	r3, [r7, #4]
+ 80037f8:	2202      	movs	r2, #2
+ 80037fa:	71da      	strb	r2, [r3, #7]
+		return MODBUS_OK;
+ 80037fc:	2300      	movs	r3, #0
+ 80037fe:	e000      	b.n	8003802 <modbus_process_device_id_request+0xe6>
+	}
+	/* Message processed */
+	return MODBUS_OK;
+ 8003800:	2300      	movs	r3, #0
+}
+ 8003802:	0018      	movs	r0, r3
+ 8003804:	46bd      	mov	sp, r7
+ 8003806:	b006      	add	sp, #24
+ 8003808:	bd80      	pop	{r7, pc}
+ 800380a:	46c0      	nop			; (mov r8, r8)
+ 800380c:	20000038 	.word	0x20000038
+
+08003810 <modbus_process_read_write_request>:
+
+/* returns ERROR only when no response to master is needed */
+static int8_t modbus_process_read_write_request(const uint8_t *buffer, int len, modbus_transaction_t *transaction)
+{
+ 8003810:	b5b0      	push	{r4, r5, r7, lr}
+ 8003812:	b086      	sub	sp, #24
+ 8003814:	af00      	add	r7, sp, #0
+ 8003816:	60f8      	str	r0, [r7, #12]
+ 8003818:	60b9      	str	r1, [r7, #8]
+ 800381a:	607a      	str	r2, [r7, #4]
+	uint8_t byte_count;
+	int8_t callback_result;
+	uint8_t buffer_pos = 0;
+ 800381c:	2317      	movs	r3, #23
+ 800381e:	18fb      	adds	r3, r7, r3
+ 8003820:	2200      	movs	r2, #0
+ 8003822:	701a      	strb	r2, [r3, #0]
+
+	/* set starting register number */
+	switch (transaction->function_code) {
+ 8003824:	687b      	ldr	r3, [r7, #4]
+ 8003826:	781b      	ldrb	r3, [r3, #0]
+ 8003828:	2b17      	cmp	r3, #23
+ 800382a:	d814      	bhi.n	8003856 <modbus_process_read_write_request+0x46>
+ 800382c:	009a      	lsls	r2, r3, #2
+ 800382e:	4bae      	ldr	r3, [pc, #696]	; (8003ae8 <modbus_process_read_write_request+0x2d8>)
+ 8003830:	18d3      	adds	r3, r2, r3
+ 8003832:	681b      	ldr	r3, [r3, #0]
+ 8003834:	469f      	mov	pc, r3
+	/* coils */
+	case MODBUS_READ_DO:
+	case MODBUS_WRITE_SINGLE_DO:
+	case MODBUS_WRITE_MULTIPLE_DO:
+		transaction->register_number = MODBUS_DO_START_NUMBER;
+ 8003836:	687b      	ldr	r3, [r7, #4]
+ 8003838:	2201      	movs	r2, #1
+ 800383a:	809a      	strh	r2, [r3, #4]
+		break;
+ 800383c:	e00c      	b.n	8003858 <modbus_process_read_write_request+0x48>
+	/* discrete inputs */
+	case MODBUS_READ_DI:
+		transaction->register_number = MODBUS_DI_START_NUMBER;
+ 800383e:	687b      	ldr	r3, [r7, #4]
+ 8003840:	4aaa      	ldr	r2, [pc, #680]	; (8003aec <modbus_process_read_write_request+0x2dc>)
+ 8003842:	809a      	strh	r2, [r3, #4]
+		break;
+ 8003844:	e008      	b.n	8003858 <modbus_process_read_write_request+0x48>
+	/* input registers */
+	case MODBUS_READ_AI:
+		transaction->register_number = MODBUS_AI_START_NUMBER;
+ 8003846:	687b      	ldr	r3, [r7, #4]
+ 8003848:	4aa9      	ldr	r2, [pc, #676]	; (8003af0 <modbus_process_read_write_request+0x2e0>)
+ 800384a:	809a      	strh	r2, [r3, #4]
+		break;
+ 800384c:	e004      	b.n	8003858 <modbus_process_read_write_request+0x48>
+	/* holding registers */
+	case MODBUS_READ_AO:
+	case MODBUS_WRITE_SINGLE_AO:
+	case MODBUS_WRITE_MULTIPLE_AO:
+	case MODBUS_READ_WRITE_MULTIPLE_REGISTERS:
+		transaction->register_number = MODBUS_AO_START_NUMBER;
+ 800384e:	687b      	ldr	r3, [r7, #4]
+ 8003850:	4aa8      	ldr	r2, [pc, #672]	; (8003af4 <modbus_process_read_write_request+0x2e4>)
+ 8003852:	809a      	strh	r2, [r3, #4]
+		break;
+ 8003854:	e000      	b.n	8003858 <modbus_process_read_write_request+0x48>
+	default:
+		break;
+ 8003856:	46c0      	nop			; (mov r8, r8)
+	}
+
+	#define MODBUS_FLAG_WRITE  0x01
+	#define MODBUS_FLAG_SINGLE 0x02
+	uint8_t flags = 0x00;
+ 8003858:	2316      	movs	r3, #22
+ 800385a:	18fb      	adds	r3, r7, r3
+ 800385c:	2200      	movs	r2, #0
+ 800385e:	701a      	strb	r2, [r3, #0]
+
+	/* process message */
+	switch (transaction->function_code) {
+ 8003860:	687b      	ldr	r3, [r7, #4]
+ 8003862:	781b      	ldrb	r3, [r3, #0]
+ 8003864:	2b10      	cmp	r3, #16
+ 8003866:	dd00      	ble.n	800386a <modbus_process_read_write_request+0x5a>
+ 8003868:	e0ff      	b.n	8003a6a <modbus_process_read_write_request+0x25a>
+ 800386a:	2b0f      	cmp	r3, #15
+ 800386c:	da0f      	bge.n	800388e <modbus_process_read_write_request+0x7e>
+ 800386e:	2b04      	cmp	r3, #4
+ 8003870:	dc02      	bgt.n	8003878 <modbus_process_read_write_request+0x68>
+ 8003872:	2b00      	cmp	r3, #0
+ 8003874:	dc12      	bgt.n	800389c <modbus_process_read_write_request+0x8c>
+ 8003876:	e0f8      	b.n	8003a6a <modbus_process_read_write_request+0x25a>
+ 8003878:	3b05      	subs	r3, #5
+ 800387a:	2b01      	cmp	r3, #1
+ 800387c:	d900      	bls.n	8003880 <modbus_process_read_write_request+0x70>
+ 800387e:	e0f4      	b.n	8003a6a <modbus_process_read_write_request+0x25a>
+	case MODBUS_WRITE_SINGLE_COIL:
+	case MODBUS_WRITE_SINGLE_REGISTER: /* holding register */
+		flags |= MODBUS_FLAG_SINGLE;
+ 8003880:	2216      	movs	r2, #22
+ 8003882:	18bb      	adds	r3, r7, r2
+ 8003884:	18ba      	adds	r2, r7, r2
+ 8003886:	7812      	ldrb	r2, [r2, #0]
+ 8003888:	2102      	movs	r1, #2
+ 800388a:	430a      	orrs	r2, r1
+ 800388c:	701a      	strb	r2, [r3, #0]
+	case MODBUS_WRITE_MULTIPLE_COILS:
+	case MODBUS_WRITE_MULTIPLE_REGISTERS:
+		flags |= MODBUS_FLAG_WRITE;
+ 800388e:	2216      	movs	r2, #22
+ 8003890:	18bb      	adds	r3, r7, r2
+ 8003892:	18ba      	adds	r2, r7, r2
+ 8003894:	7812      	ldrb	r2, [r2, #0]
+ 8003896:	2101      	movs	r1, #1
+ 8003898:	430a      	orrs	r2, r1
+ 800389a:	701a      	strb	r2, [r3, #0]
+	case MODBUS_READ_DISCRETE_INPUTS:
+	case MODBUS_READ_COILS:
+	case MODBUS_READ_INPUT_REGISTERS:
+	case MODBUS_READ_HOLDING_REGISTERS:
+		if (len < MODBUS_MINIMAL_READWRITE_LEN) {
+ 800389c:	68bb      	ldr	r3, [r7, #8]
+ 800389e:	2b03      	cmp	r3, #3
+ 80038a0:	dc02      	bgt.n	80038a8 <modbus_process_read_write_request+0x98>
+			/* buffer too short to contain everything we need */
+			return MODBUS_ERROR;
+ 80038a2:	2301      	movs	r3, #1
+ 80038a4:	425b      	negs	r3, r3
+ 80038a6:	e11a      	b.n	8003ade <modbus_process_read_write_request+0x2ce>
+		}
+		transaction->register_address = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
+ 80038a8:	2017      	movs	r0, #23
+ 80038aa:	183b      	adds	r3, r7, r0
+ 80038ac:	781b      	ldrb	r3, [r3, #0]
+ 80038ae:	68fa      	ldr	r2, [r7, #12]
+ 80038b0:	18d3      	adds	r3, r2, r3
+ 80038b2:	781b      	ldrb	r3, [r3, #0]
+ 80038b4:	021b      	lsls	r3, r3, #8
+ 80038b6:	b21a      	sxth	r2, r3
+ 80038b8:	183b      	adds	r3, r7, r0
+ 80038ba:	781b      	ldrb	r3, [r3, #0]
+ 80038bc:	3301      	adds	r3, #1
+ 80038be:	68f9      	ldr	r1, [r7, #12]
+ 80038c0:	18cb      	adds	r3, r1, r3
+ 80038c2:	781b      	ldrb	r3, [r3, #0]
+ 80038c4:	b21b      	sxth	r3, r3
+ 80038c6:	4313      	orrs	r3, r2
+ 80038c8:	b21b      	sxth	r3, r3
+ 80038ca:	b29a      	uxth	r2, r3
+ 80038cc:	687b      	ldr	r3, [r7, #4]
+ 80038ce:	805a      	strh	r2, [r3, #2]
+		buffer += 2;
+ 80038d0:	68fb      	ldr	r3, [r7, #12]
+ 80038d2:	3302      	adds	r3, #2
+ 80038d4:	60fb      	str	r3, [r7, #12]
+		// TODO check length!
+		if (flags & MODBUS_FLAG_WRITE) {
+ 80038d6:	2116      	movs	r1, #22
+ 80038d8:	187b      	adds	r3, r7, r1
+ 80038da:	781b      	ldrb	r3, [r3, #0]
+ 80038dc:	2201      	movs	r2, #1
+ 80038de:	4013      	ands	r3, r2
+ 80038e0:	d100      	bne.n	80038e4 <modbus_process_read_write_request+0xd4>
+ 80038e2:	e095      	b.n	8003a10 <modbus_process_read_write_request+0x200>
+			if (flags & MODBUS_FLAG_SINGLE) {
+ 80038e4:	187b      	adds	r3, r7, r1
+ 80038e6:	781b      	ldrb	r3, [r3, #0]
+ 80038e8:	2202      	movs	r2, #2
+ 80038ea:	4013      	ands	r3, r2
+ 80038ec:	d018      	beq.n	8003920 <modbus_process_read_write_request+0x110>
+				transaction->holding_registers[0] = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
+ 80038ee:	183b      	adds	r3, r7, r0
+ 80038f0:	781b      	ldrb	r3, [r3, #0]
+ 80038f2:	68fa      	ldr	r2, [r7, #12]
+ 80038f4:	18d3      	adds	r3, r2, r3
+ 80038f6:	781b      	ldrb	r3, [r3, #0]
+ 80038f8:	021b      	lsls	r3, r3, #8
+ 80038fa:	b21a      	sxth	r2, r3
+ 80038fc:	183b      	adds	r3, r7, r0
+ 80038fe:	781b      	ldrb	r3, [r3, #0]
+ 8003900:	3301      	adds	r3, #1
+ 8003902:	68f9      	ldr	r1, [r7, #12]
+ 8003904:	18cb      	adds	r3, r1, r3
+ 8003906:	781b      	ldrb	r3, [r3, #0]
+ 8003908:	b21b      	sxth	r3, r3
+ 800390a:	4313      	orrs	r3, r2
+ 800390c:	b21b      	sxth	r3, r3
+ 800390e:	b29a      	uxth	r2, r3
+ 8003910:	687b      	ldr	r3, [r7, #4]
+ 8003912:	815a      	strh	r2, [r3, #10]
+				buffer_pos += 2;
+ 8003914:	183b      	adds	r3, r7, r0
+ 8003916:	183a      	adds	r2, r7, r0
+ 8003918:	7812      	ldrb	r2, [r2, #0]
+ 800391a:	3202      	adds	r2, #2
+ 800391c:	701a      	strb	r2, [r3, #0]
+ 800391e:	e09b      	b.n	8003a58 <modbus_process_read_write_request+0x248>
+			} else {
+				/* Write multiple registers */
+				transaction->register_count = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
+ 8003920:	2017      	movs	r0, #23
+ 8003922:	183b      	adds	r3, r7, r0
+ 8003924:	781b      	ldrb	r3, [r3, #0]
+ 8003926:	68fa      	ldr	r2, [r7, #12]
+ 8003928:	18d3      	adds	r3, r2, r3
+ 800392a:	781b      	ldrb	r3, [r3, #0]
+ 800392c:	021b      	lsls	r3, r3, #8
+ 800392e:	b25a      	sxtb	r2, r3
+ 8003930:	183b      	adds	r3, r7, r0
+ 8003932:	781b      	ldrb	r3, [r3, #0]
+ 8003934:	3301      	adds	r3, #1
+ 8003936:	68f9      	ldr	r1, [r7, #12]
+ 8003938:	18cb      	adds	r3, r1, r3
+ 800393a:	781b      	ldrb	r3, [r3, #0]
+ 800393c:	b25b      	sxtb	r3, r3
+ 800393e:	4313      	orrs	r3, r2
+ 8003940:	b25b      	sxtb	r3, r3
+ 8003942:	b2da      	uxtb	r2, r3
+ 8003944:	687b      	ldr	r3, [r7, #4]
+ 8003946:	719a      	strb	r2, [r3, #6]
+				buffer_pos += 2;
+ 8003948:	183b      	adds	r3, r7, r0
+ 800394a:	183a      	adds	r2, r7, r0
+ 800394c:	7812      	ldrb	r2, [r2, #0]
+ 800394e:	3202      	adds	r2, #2
+ 8003950:	701a      	strb	r2, [r3, #0]
+				if (len < MODBUS_MINIMAL_WRITE_MULTIPLE_LEN) {
+ 8003952:	68bb      	ldr	r3, [r7, #8]
+ 8003954:	2b04      	cmp	r3, #4
+ 8003956:	dc02      	bgt.n	800395e <modbus_process_read_write_request+0x14e>
+					return MODBUS_ERROR;
+ 8003958:	2301      	movs	r3, #1
+ 800395a:	425b      	negs	r3, r3
+ 800395c:	e0bf      	b.n	8003ade <modbus_process_read_write_request+0x2ce>
+				}
+				byte_count = buffer[buffer_pos++];
+ 800395e:	2217      	movs	r2, #23
+ 8003960:	18bb      	adds	r3, r7, r2
+ 8003962:	781b      	ldrb	r3, [r3, #0]
+ 8003964:	18ba      	adds	r2, r7, r2
+ 8003966:	1c59      	adds	r1, r3, #1
+ 8003968:	7011      	strb	r1, [r2, #0]
+ 800396a:	001a      	movs	r2, r3
+ 800396c:	68fb      	ldr	r3, [r7, #12]
+ 800396e:	189a      	adds	r2, r3, r2
+ 8003970:	2114      	movs	r1, #20
+ 8003972:	187b      	adds	r3, r7, r1
+ 8003974:	7812      	ldrb	r2, [r2, #0]
+ 8003976:	701a      	strb	r2, [r3, #0]
+				if (transaction->register_count > 123 || 2*transaction->register_count != byte_count) {
+ 8003978:	687b      	ldr	r3, [r7, #4]
+ 800397a:	799b      	ldrb	r3, [r3, #6]
+ 800397c:	2b7b      	cmp	r3, #123	; 0x7b
+ 800397e:	d806      	bhi.n	800398e <modbus_process_read_write_request+0x17e>
+ 8003980:	687b      	ldr	r3, [r7, #4]
+ 8003982:	799b      	ldrb	r3, [r3, #6]
+ 8003984:	005a      	lsls	r2, r3, #1
+ 8003986:	187b      	adds	r3, r7, r1
+ 8003988:	781b      	ldrb	r3, [r3, #0]
+ 800398a:	429a      	cmp	r2, r3
+ 800398c:	d003      	beq.n	8003996 <modbus_process_read_write_request+0x186>
+					/* Max number of register is defined by Modbus_Application_Protocol_V1_1b, section 6.12 */
+					transaction->exception = MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY;
+ 800398e:	687b      	ldr	r3, [r7, #4]
+ 8003990:	2202      	movs	r2, #2
+ 8003992:	71da      	strb	r2, [r3, #7]
+ 8003994:	e060      	b.n	8003a58 <modbus_process_read_write_request+0x248>
+				} else {
+					if (len < MODBUS_MINIMAL_WRITE_MULTIPLE_LEN + byte_count) {
+ 8003996:	2314      	movs	r3, #20
+ 8003998:	18fb      	adds	r3, r7, r3
+ 800399a:	781b      	ldrb	r3, [r3, #0]
+ 800399c:	3304      	adds	r3, #4
+ 800399e:	68ba      	ldr	r2, [r7, #8]
+ 80039a0:	429a      	cmp	r2, r3
+ 80039a2:	dc02      	bgt.n	80039aa <modbus_process_read_write_request+0x19a>
+						return MODBUS_ERROR;
+ 80039a4:	2301      	movs	r3, #1
+ 80039a6:	425b      	negs	r3, r3
+ 80039a8:	e099      	b.n	8003ade <modbus_process_read_write_request+0x2ce>
+					}
+					for (uint8_t i = 0; i < transaction->register_count; i++) {
+ 80039aa:	2315      	movs	r3, #21
+ 80039ac:	18fb      	adds	r3, r7, r3
+ 80039ae:	2200      	movs	r2, #0
+ 80039b0:	701a      	strb	r2, [r3, #0]
+ 80039b2:	e025      	b.n	8003a00 <modbus_process_read_write_request+0x1f0>
+						transaction->holding_registers[i] = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
+ 80039b4:	2017      	movs	r0, #23
+ 80039b6:	183b      	adds	r3, r7, r0
+ 80039b8:	781b      	ldrb	r3, [r3, #0]
+ 80039ba:	68fa      	ldr	r2, [r7, #12]
+ 80039bc:	18d3      	adds	r3, r2, r3
+ 80039be:	781b      	ldrb	r3, [r3, #0]
+ 80039c0:	021b      	lsls	r3, r3, #8
+ 80039c2:	b21a      	sxth	r2, r3
+ 80039c4:	183b      	adds	r3, r7, r0
+ 80039c6:	781b      	ldrb	r3, [r3, #0]
+ 80039c8:	3301      	adds	r3, #1
+ 80039ca:	68f9      	ldr	r1, [r7, #12]
+ 80039cc:	18cb      	adds	r3, r1, r3
+ 80039ce:	781b      	ldrb	r3, [r3, #0]
+ 80039d0:	b21b      	sxth	r3, r3
+ 80039d2:	4313      	orrs	r3, r2
+ 80039d4:	b21a      	sxth	r2, r3
+ 80039d6:	2415      	movs	r4, #21
+ 80039d8:	193b      	adds	r3, r7, r4
+ 80039da:	781b      	ldrb	r3, [r3, #0]
+ 80039dc:	b291      	uxth	r1, r2
+ 80039de:	687a      	ldr	r2, [r7, #4]
+ 80039e0:	3304      	adds	r3, #4
+ 80039e2:	005b      	lsls	r3, r3, #1
+ 80039e4:	18d3      	adds	r3, r2, r3
+ 80039e6:	3302      	adds	r3, #2
+ 80039e8:	1c0a      	adds	r2, r1, #0
+ 80039ea:	801a      	strh	r2, [r3, #0]
+						buffer_pos += 2;
+ 80039ec:	183b      	adds	r3, r7, r0
+ 80039ee:	183a      	adds	r2, r7, r0
+ 80039f0:	7812      	ldrb	r2, [r2, #0]
+ 80039f2:	3202      	adds	r2, #2
+ 80039f4:	701a      	strb	r2, [r3, #0]
+					for (uint8_t i = 0; i < transaction->register_count; i++) {
+ 80039f6:	193b      	adds	r3, r7, r4
+ 80039f8:	781a      	ldrb	r2, [r3, #0]
+ 80039fa:	193b      	adds	r3, r7, r4
+ 80039fc:	3201      	adds	r2, #1
+ 80039fe:	701a      	strb	r2, [r3, #0]
+ 8003a00:	687b      	ldr	r3, [r7, #4]
+ 8003a02:	799b      	ldrb	r3, [r3, #6]
+ 8003a04:	2215      	movs	r2, #21
+ 8003a06:	18ba      	adds	r2, r7, r2
+ 8003a08:	7812      	ldrb	r2, [r2, #0]
+ 8003a0a:	429a      	cmp	r2, r3
+ 8003a0c:	d3d2      	bcc.n	80039b4 <modbus_process_read_write_request+0x1a4>
+ 8003a0e:	e023      	b.n	8003a58 <modbus_process_read_write_request+0x248>
+					}
+				}
+			}
+		} else {
+			transaction->register_count = (buffer[buffer_pos] << 8) | buffer[buffer_pos + 1];
+ 8003a10:	2017      	movs	r0, #23
+ 8003a12:	183b      	adds	r3, r7, r0
+ 8003a14:	781b      	ldrb	r3, [r3, #0]
+ 8003a16:	68fa      	ldr	r2, [r7, #12]
+ 8003a18:	18d3      	adds	r3, r2, r3
+ 8003a1a:	781b      	ldrb	r3, [r3, #0]
+ 8003a1c:	021b      	lsls	r3, r3, #8
+ 8003a1e:	b25a      	sxtb	r2, r3
+ 8003a20:	183b      	adds	r3, r7, r0
+ 8003a22:	781b      	ldrb	r3, [r3, #0]
+ 8003a24:	3301      	adds	r3, #1
+ 8003a26:	68f9      	ldr	r1, [r7, #12]
+ 8003a28:	18cb      	adds	r3, r1, r3
+ 8003a2a:	781b      	ldrb	r3, [r3, #0]
+ 8003a2c:	b25b      	sxtb	r3, r3
+ 8003a2e:	4313      	orrs	r3, r2
+ 8003a30:	b25b      	sxtb	r3, r3
+ 8003a32:	b2da      	uxtb	r2, r3
+ 8003a34:	687b      	ldr	r3, [r7, #4]
+ 8003a36:	719a      	strb	r2, [r3, #6]
+			buffer_pos += 2;
+ 8003a38:	183b      	adds	r3, r7, r0
+ 8003a3a:	183a      	adds	r2, r7, r0
+ 8003a3c:	7812      	ldrb	r2, [r2, #0]
+ 8003a3e:	3202      	adds	r2, #2
+ 8003a40:	701a      	strb	r2, [r3, #0]
+			if (
+					transaction->register_count < 1 ||
+ 8003a42:	687b      	ldr	r3, [r7, #4]
+ 8003a44:	799b      	ldrb	r3, [r3, #6]
+			if (
+ 8003a46:	2b00      	cmp	r3, #0
+ 8003a48:	d003      	beq.n	8003a52 <modbus_process_read_write_request+0x242>
+					transaction->register_count > MODBUS_MAX_REGISTERS
+ 8003a4a:	687b      	ldr	r3, [r7, #4]
+ 8003a4c:	799b      	ldrb	r3, [r3, #6]
+					transaction->register_count < 1 ||
+ 8003a4e:	2b7d      	cmp	r3, #125	; 0x7d
+ 8003a50:	d902      	bls.n	8003a58 <modbus_process_read_write_request+0x248>
+			   ) {
+				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE;
+ 8003a52:	687b      	ldr	r3, [r7, #4]
+ 8003a54:	2203      	movs	r2, #3
+ 8003a56:	71da      	strb	r2, [r3, #7]
+			}
+		}
+		// add offset to register number
+		transaction->register_number += transaction->register_address;
+ 8003a58:	687b      	ldr	r3, [r7, #4]
+ 8003a5a:	889a      	ldrh	r2, [r3, #4]
+ 8003a5c:	687b      	ldr	r3, [r7, #4]
+ 8003a5e:	885b      	ldrh	r3, [r3, #2]
+ 8003a60:	18d3      	adds	r3, r2, r3
+ 8003a62:	b29a      	uxth	r2, r3
+ 8003a64:	687b      	ldr	r3, [r7, #4]
+ 8003a66:	809a      	strh	r2, [r3, #4]
+		break;
+ 8003a68:	e003      	b.n	8003a72 <modbus_process_read_write_request+0x262>
+	default:
+		/* function code not known / not implemented, reply with
+		 * ExceptionCode 1 */
+		transaction->exception = MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
+ 8003a6a:	687b      	ldr	r3, [r7, #4]
+ 8003a6c:	2201      	movs	r2, #1
+ 8003a6e:	71da      	strb	r2, [r3, #7]
+		break;
+ 8003a70:	46c0      	nop			; (mov r8, r8)
+	}
+	/* data in modbus_buffer have been processed and buffer can be re-used for TX */
+	/* handle reply */
+	if (transaction->exception != 0) {
+ 8003a72:	687b      	ldr	r3, [r7, #4]
+ 8003a74:	79db      	ldrb	r3, [r3, #7]
+ 8003a76:	2b00      	cmp	r3, #0
+ 8003a78:	d008      	beq.n	8003a8c <modbus_process_read_write_request+0x27c>
+		/* indicate error */
+		transaction->function_code |= MODBUS_ERROR_FLAG;
+ 8003a7a:	687b      	ldr	r3, [r7, #4]
+ 8003a7c:	781b      	ldrb	r3, [r3, #0]
+ 8003a7e:	2280      	movs	r2, #128	; 0x80
+ 8003a80:	4252      	negs	r2, r2
+ 8003a82:	4313      	orrs	r3, r2
+ 8003a84:	b2da      	uxtb	r2, r3
+ 8003a86:	687b      	ldr	r3, [r7, #4]
+ 8003a88:	701a      	strb	r2, [r3, #0]
+ 8003a8a:	e027      	b.n	8003adc <modbus_process_read_write_request+0x2cc>
+	} else {
+		callback_result = modbus_slave_callback(transaction);
+ 8003a8c:	2513      	movs	r5, #19
+ 8003a8e:	197c      	adds	r4, r7, r5
+ 8003a90:	687b      	ldr	r3, [r7, #4]
+ 8003a92:	0018      	movs	r0, r3
+ 8003a94:	f7fe f8c4 	bl	8001c20 <modbus_slave_callback>
+ 8003a98:	0003      	movs	r3, r0
+ 8003a9a:	7023      	strb	r3, [r4, #0]
+		/* error handling */
+		if (callback_result != MODBUS_OK) {
+ 8003a9c:	0029      	movs	r1, r5
+ 8003a9e:	187b      	adds	r3, r7, r1
+ 8003aa0:	781b      	ldrb	r3, [r3, #0]
+ 8003aa2:	b25b      	sxtb	r3, r3
+ 8003aa4:	2b00      	cmp	r3, #0
+ 8003aa6:	d019      	beq.n	8003adc <modbus_process_read_write_request+0x2cc>
+			transaction->function_code |= MODBUS_ERROR_FLAG;
+ 8003aa8:	687b      	ldr	r3, [r7, #4]
+ 8003aaa:	781b      	ldrb	r3, [r3, #0]
+ 8003aac:	2280      	movs	r2, #128	; 0x80
+ 8003aae:	4252      	negs	r2, r2
+ 8003ab0:	4313      	orrs	r3, r2
+ 8003ab2:	b2da      	uxtb	r2, r3
+ 8003ab4:	687b      	ldr	r3, [r7, #4]
+ 8003ab6:	701a      	strb	r2, [r3, #0]
+			if (callback_result == MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED) {
+ 8003ab8:	187b      	adds	r3, r7, r1
+ 8003aba:	781b      	ldrb	r3, [r3, #0]
+ 8003abc:	b25b      	sxtb	r3, r3
+ 8003abe:	3305      	adds	r3, #5
+ 8003ac0:	d103      	bne.n	8003aca <modbus_process_read_write_request+0x2ba>
+				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_FUNCTION;
+ 8003ac2:	687b      	ldr	r3, [r7, #4]
+ 8003ac4:	2201      	movs	r2, #1
+ 8003ac6:	71da      	strb	r2, [r3, #7]
+ 8003ac8:	e008      	b.n	8003adc <modbus_process_read_write_request+0x2cc>
+			} else if (callback_result == MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED) {
+ 8003aca:	2313      	movs	r3, #19
+ 8003acc:	18fb      	adds	r3, r7, r3
+ 8003ace:	781b      	ldrb	r3, [r3, #0]
+ 8003ad0:	b25b      	sxtb	r3, r3
+ 8003ad2:	3306      	adds	r3, #6
+ 8003ad4:	d102      	bne.n	8003adc <modbus_process_read_write_request+0x2cc>
+				transaction->exception = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS;
+ 8003ad6:	687b      	ldr	r3, [r7, #4]
+ 8003ad8:	2202      	movs	r2, #2
+ 8003ada:	71da      	strb	r2, [r3, #7]
+			}
+		}
+	}
+	return MODBUS_OK;
+ 8003adc:	2300      	movs	r3, #0
+}
+ 8003ade:	0018      	movs	r0, r3
+ 8003ae0:	46bd      	mov	sp, r7
+ 8003ae2:	b006      	add	sp, #24
+ 8003ae4:	bdb0      	pop	{r4, r5, r7, pc}
+ 8003ae6:	46c0      	nop			; (mov r8, r8)
+ 8003ae8:	08004040 	.word	0x08004040
+ 8003aec:	00002711 	.word	0x00002711
+ 8003af0:	00007531 	.word	0x00007531
+ 8003af4:	ffff9c41 	.word	0xffff9c41
+
+08003af8 <modbus_slave_set_address>:
+/*
+ * Public function definitions
+ */
+
+int8_t modbus_slave_set_address(uint8_t address)
+{
+ 8003af8:	b580      	push	{r7, lr}
+ 8003afa:	b082      	sub	sp, #8
+ 8003afc:	af00      	add	r7, sp, #0
+ 8003afe:	0002      	movs	r2, r0
+ 8003b00:	1dfb      	adds	r3, r7, #7
+ 8003b02:	701a      	strb	r2, [r3, #0]
+	if (address == 0) {
+ 8003b04:	1dfb      	adds	r3, r7, #7
+ 8003b06:	781b      	ldrb	r3, [r3, #0]
+ 8003b08:	2b00      	cmp	r3, #0
+ 8003b0a:	d102      	bne.n	8003b12 <modbus_slave_set_address+0x1a>
+		/* address 0 is broadcast address */
+		return MODBUS_ERROR;
+ 8003b0c:	2301      	movs	r3, #1
+ 8003b0e:	425b      	negs	r3, r3
+ 8003b10:	e004      	b.n	8003b1c <modbus_slave_set_address+0x24>
+	}
+	modbus_slave_address = address;
+ 8003b12:	4b04      	ldr	r3, [pc, #16]	; (8003b24 <modbus_slave_set_address+0x2c>)
+ 8003b14:	1dfa      	adds	r2, r7, #7
+ 8003b16:	7812      	ldrb	r2, [r2, #0]
+ 8003b18:	701a      	strb	r2, [r3, #0]
+	return MODBUS_OK;
+ 8003b1a:	2300      	movs	r3, #0
+}
+ 8003b1c:	0018      	movs	r0, r3
+ 8003b1e:	46bd      	mov	sp, r7
+ 8003b20:	b002      	add	sp, #8
+ 8003b22:	bd80      	pop	{r7, pc}
+ 8003b24:	20000004 	.word	0x20000004
+
+08003b28 <modbus_slave_process_msg>:
+
+
+int8_t modbus_slave_process_msg(const uint8_t *buffer, int len)
+{
+ 8003b28:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 8003b2a:	b0c9      	sub	sp, #292	; 0x124
+ 8003b2c:	af00      	add	r7, sp, #0
+ 8003b2e:	6078      	str	r0, [r7, #4]
+ 8003b30:	6039      	str	r1, [r7, #0]
+
+
+	/* transaction holds message context and content:
+	 * it wraps all necessary buffers and variables */
+	modbus_transaction_t transaction;
+	uint8_t buffer_pos = 0;
+ 8003b32:	238f      	movs	r3, #143	; 0x8f
+ 8003b34:	005b      	lsls	r3, r3, #1
+ 8003b36:	18fb      	adds	r3, r7, r3
+ 8003b38:	2200      	movs	r2, #0
+ 8003b3a:	701a      	strb	r2, [r3, #0]
+
+	if (len < MODBUS_MINIMAL_FRAME_LEN) {
+ 8003b3c:	683b      	ldr	r3, [r7, #0]
+ 8003b3e:	2b03      	cmp	r3, #3
+ 8003b40:	dc02      	bgt.n	8003b48 <modbus_slave_process_msg+0x20>
+		/* frame too short; return error (no reply needed) */
+		return MODBUS_ERROR_FRAME_INVALID;
+ 8003b42:	2303      	movs	r3, #3
+ 8003b44:	425b      	negs	r3, r3
+ 8003b46:	e0c6      	b.n	8003cd6 <modbus_slave_process_msg+0x1ae>
+	}
+	/* check CRC first */
+	uint16_t crc_received = (buffer[len - 1] << 8) | buffer[len - 2];
+ 8003b48:	683b      	ldr	r3, [r7, #0]
+ 8003b4a:	3b01      	subs	r3, #1
+ 8003b4c:	687a      	ldr	r2, [r7, #4]
+ 8003b4e:	18d3      	adds	r3, r2, r3
+ 8003b50:	781b      	ldrb	r3, [r3, #0]
+ 8003b52:	021b      	lsls	r3, r3, #8
+ 8003b54:	b21a      	sxth	r2, r3
+ 8003b56:	683b      	ldr	r3, [r7, #0]
+ 8003b58:	3b02      	subs	r3, #2
+ 8003b5a:	6879      	ldr	r1, [r7, #4]
+ 8003b5c:	18cb      	adds	r3, r1, r3
+ 8003b5e:	781b      	ldrb	r3, [r3, #0]
+ 8003b60:	b21b      	sxth	r3, r3
+ 8003b62:	4313      	orrs	r3, r2
+ 8003b64:	b21a      	sxth	r2, r3
+ 8003b66:	258e      	movs	r5, #142	; 0x8e
+ 8003b68:	006d      	lsls	r5, r5, #1
+ 8003b6a:	197b      	adds	r3, r7, r5
+ 8003b6c:	801a      	strh	r2, [r3, #0]
+	uint16_t crc_calculated = modbus_CRC16(buffer, len - 2);
+ 8003b6e:	683b      	ldr	r3, [r7, #0]
+ 8003b70:	1e9a      	subs	r2, r3, #2
+ 8003b72:	268d      	movs	r6, #141	; 0x8d
+ 8003b74:	0076      	lsls	r6, r6, #1
+ 8003b76:	19bc      	adds	r4, r7, r6
+ 8003b78:	687b      	ldr	r3, [r7, #4]
+ 8003b7a:	0011      	movs	r1, r2
+ 8003b7c:	0018      	movs	r0, r3
+ 8003b7e:	f7ff fb73 	bl	8003268 <modbus_CRC16>
+ 8003b82:	0003      	movs	r3, r0
+ 8003b84:	8023      	strh	r3, [r4, #0]
+	if (crc_received != crc_calculated) {
+ 8003b86:	197a      	adds	r2, r7, r5
+ 8003b88:	19bb      	adds	r3, r7, r6
+ 8003b8a:	8812      	ldrh	r2, [r2, #0]
+ 8003b8c:	881b      	ldrh	r3, [r3, #0]
+ 8003b8e:	429a      	cmp	r2, r3
+ 8003b90:	d002      	beq.n	8003b98 <modbus_slave_process_msg+0x70>
+		/* CRC mismatch, return error (no reply needed) */
+		return MODBUS_ERROR_CRC;
+ 8003b92:	2302      	movs	r3, #2
+ 8003b94:	425b      	negs	r3, r3
+ 8003b96:	e09e      	b.n	8003cd6 <modbus_slave_process_msg+0x1ae>
+	}
+	/* check if address matches ours */
+	uint8_t address = buffer[buffer_pos++];
+ 8003b98:	228f      	movs	r2, #143	; 0x8f
+ 8003b9a:	0052      	lsls	r2, r2, #1
+ 8003b9c:	18bb      	adds	r3, r7, r2
+ 8003b9e:	781b      	ldrb	r3, [r3, #0]
+ 8003ba0:	18ba      	adds	r2, r7, r2
+ 8003ba2:	1c59      	adds	r1, r3, #1
+ 8003ba4:	7011      	strb	r1, [r2, #0]
+ 8003ba6:	001a      	movs	r2, r3
+ 8003ba8:	687b      	ldr	r3, [r7, #4]
+ 8003baa:	189a      	adds	r2, r3, r2
+ 8003bac:	211a      	movs	r1, #26
+ 8003bae:	31ff      	adds	r1, #255	; 0xff
+ 8003bb0:	187b      	adds	r3, r7, r1
+ 8003bb2:	7812      	ldrb	r2, [r2, #0]
+ 8003bb4:	701a      	strb	r2, [r3, #0]
+	transaction.broadcast = (address == MODBUS_BROADCAST_ADDR);
+ 8003bb6:	187b      	adds	r3, r7, r1
+ 8003bb8:	781b      	ldrb	r3, [r3, #0]
+ 8003bba:	425a      	negs	r2, r3
+ 8003bbc:	4153      	adcs	r3, r2
+ 8003bbe:	b2db      	uxtb	r3, r3
+ 8003bc0:	001a      	movs	r2, r3
+ 8003bc2:	4b47      	ldr	r3, [pc, #284]	; (8003ce0 <modbus_slave_process_msg+0x1b8>)
+ 8003bc4:	2090      	movs	r0, #144	; 0x90
+ 8003bc6:	0040      	lsls	r0, r0, #1
+ 8003bc8:	4684      	mov	ip, r0
+ 8003bca:	44bc      	add	ip, r7
+ 8003bcc:	4463      	add	r3, ip
+ 8003bce:	721a      	strb	r2, [r3, #8]
+	if (address != modbus_slave_address && transaction.broadcast != 1) {
+ 8003bd0:	4b44      	ldr	r3, [pc, #272]	; (8003ce4 <modbus_slave_process_msg+0x1bc>)
+ 8003bd2:	781b      	ldrb	r3, [r3, #0]
+ 8003bd4:	187a      	adds	r2, r7, r1
+ 8003bd6:	7812      	ldrb	r2, [r2, #0]
+ 8003bd8:	429a      	cmp	r2, r3
+ 8003bda:	d00a      	beq.n	8003bf2 <modbus_slave_process_msg+0xca>
+ 8003bdc:	4b40      	ldr	r3, [pc, #256]	; (8003ce0 <modbus_slave_process_msg+0x1b8>)
+ 8003bde:	2290      	movs	r2, #144	; 0x90
+ 8003be0:	0052      	lsls	r2, r2, #1
+ 8003be2:	4694      	mov	ip, r2
+ 8003be4:	44bc      	add	ip, r7
+ 8003be6:	4463      	add	r3, ip
+ 8003be8:	7a1b      	ldrb	r3, [r3, #8]
+ 8003bea:	2b01      	cmp	r3, #1
+ 8003bec:	d001      	beq.n	8003bf2 <modbus_slave_process_msg+0xca>
+		/* Message is not for us (no reply needed) */
+		return MODBUS_OK;
+ 8003bee:	2300      	movs	r3, #0
+ 8003bf0:	e071      	b.n	8003cd6 <modbus_slave_process_msg+0x1ae>
+	}
+	/* get function code */
+	transaction.function_code = buffer[buffer_pos++];
+ 8003bf2:	208f      	movs	r0, #143	; 0x8f
+ 8003bf4:	0040      	lsls	r0, r0, #1
+ 8003bf6:	183b      	adds	r3, r7, r0
+ 8003bf8:	781b      	ldrb	r3, [r3, #0]
+ 8003bfa:	183a      	adds	r2, r7, r0
+ 8003bfc:	1c59      	adds	r1, r3, #1
+ 8003bfe:	7011      	strb	r1, [r2, #0]
+ 8003c00:	001a      	movs	r2, r3
+ 8003c02:	687b      	ldr	r3, [r7, #4]
+ 8003c04:	189b      	adds	r3, r3, r2
+ 8003c06:	781a      	ldrb	r2, [r3, #0]
+ 8003c08:	4b35      	ldr	r3, [pc, #212]	; (8003ce0 <modbus_slave_process_msg+0x1b8>)
+ 8003c0a:	2190      	movs	r1, #144	; 0x90
+ 8003c0c:	0049      	lsls	r1, r1, #1
+ 8003c0e:	468c      	mov	ip, r1
+ 8003c10:	44bc      	add	ip, r7
+ 8003c12:	4463      	add	r3, ip
+ 8003c14:	701a      	strb	r2, [r3, #0]
+	transaction.exception = 0;
+ 8003c16:	4b32      	ldr	r3, [pc, #200]	; (8003ce0 <modbus_slave_process_msg+0x1b8>)
+ 8003c18:	2290      	movs	r2, #144	; 0x90
+ 8003c1a:	0052      	lsls	r2, r2, #1
+ 8003c1c:	4694      	mov	ip, r2
+ 8003c1e:	44bc      	add	ip, r7
+ 8003c20:	4463      	add	r3, ip
+ 8003c22:	2200      	movs	r2, #0
+ 8003c24:	71da      	strb	r2, [r3, #7]
+	uint8_t request_processing_result;
+	if (transaction.function_code == MODBUS_READ_DEVICE_IDENTIFICATION) {
+ 8003c26:	4b2e      	ldr	r3, [pc, #184]	; (8003ce0 <modbus_slave_process_msg+0x1b8>)
+ 8003c28:	2290      	movs	r2, #144	; 0x90
+ 8003c2a:	0052      	lsls	r2, r2, #1
+ 8003c2c:	4694      	mov	ip, r2
+ 8003c2e:	44bc      	add	ip, r7
+ 8003c30:	4463      	add	r3, ip
+ 8003c32:	781b      	ldrb	r3, [r3, #0]
+ 8003c34:	2b2b      	cmp	r3, #43	; 0x2b
+ 8003c36:	d114      	bne.n	8003c62 <modbus_slave_process_msg+0x13a>
+		/* Read device ID request is quite complicated, therefore it has its own processing function */
+		request_processing_result = modbus_process_device_id_request(buffer + buffer_pos, len - buffer_pos, &transaction);
+ 8003c38:	0001      	movs	r1, r0
+ 8003c3a:	187b      	adds	r3, r7, r1
+ 8003c3c:	781b      	ldrb	r3, [r3, #0]
+ 8003c3e:	687a      	ldr	r2, [r7, #4]
+ 8003c40:	18d0      	adds	r0, r2, r3
+ 8003c42:	187b      	adds	r3, r7, r1
+ 8003c44:	781b      	ldrb	r3, [r3, #0]
+ 8003c46:	683a      	ldr	r2, [r7, #0]
+ 8003c48:	1ad3      	subs	r3, r2, r3
+ 8003c4a:	220c      	movs	r2, #12
+ 8003c4c:	18ba      	adds	r2, r7, r2
+ 8003c4e:	0019      	movs	r1, r3
+ 8003c50:	f7ff fd64 	bl	800371c <modbus_process_device_id_request>
+ 8003c54:	0003      	movs	r3, r0
+ 8003c56:	001a      	movs	r2, r3
+ 8003c58:	2320      	movs	r3, #32
+ 8003c5a:	33ff      	adds	r3, #255	; 0xff
+ 8003c5c:	18fb      	adds	r3, r7, r3
+ 8003c5e:	701a      	strb	r2, [r3, #0]
+ 8003c60:	e014      	b.n	8003c8c <modbus_slave_process_msg+0x164>
+	} else {
+		/* process other requests: input register read, holding register read/write */
+		request_processing_result = modbus_process_read_write_request(buffer + buffer_pos, len - buffer_pos, &transaction);
+ 8003c62:	218f      	movs	r1, #143	; 0x8f
+ 8003c64:	0049      	lsls	r1, r1, #1
+ 8003c66:	187b      	adds	r3, r7, r1
+ 8003c68:	781b      	ldrb	r3, [r3, #0]
+ 8003c6a:	687a      	ldr	r2, [r7, #4]
+ 8003c6c:	18d0      	adds	r0, r2, r3
+ 8003c6e:	187b      	adds	r3, r7, r1
+ 8003c70:	781b      	ldrb	r3, [r3, #0]
+ 8003c72:	683a      	ldr	r2, [r7, #0]
+ 8003c74:	1ad3      	subs	r3, r2, r3
+ 8003c76:	220c      	movs	r2, #12
+ 8003c78:	18ba      	adds	r2, r7, r2
+ 8003c7a:	0019      	movs	r1, r3
+ 8003c7c:	f7ff fdc8 	bl	8003810 <modbus_process_read_write_request>
+ 8003c80:	0003      	movs	r3, r0
+ 8003c82:	001a      	movs	r2, r3
+ 8003c84:	2320      	movs	r3, #32
+ 8003c86:	33ff      	adds	r3, #255	; 0xff
+ 8003c88:	18fb      	adds	r3, r7, r3
+ 8003c8a:	701a      	strb	r2, [r3, #0]
+	}
+	uint8_t msg_len;
+	/* reply only if request was processed successfully and message was not broadcast */
+	if (request_processing_result == MODBUS_OK && transaction.broadcast == 0) {
+ 8003c8c:	2320      	movs	r3, #32
+ 8003c8e:	33ff      	adds	r3, #255	; 0xff
+ 8003c90:	18fb      	adds	r3, r7, r3
+ 8003c92:	781b      	ldrb	r3, [r3, #0]
+ 8003c94:	2b00      	cmp	r3, #0
+ 8003c96:	d11d      	bne.n	8003cd4 <modbus_slave_process_msg+0x1ac>
+ 8003c98:	4b11      	ldr	r3, [pc, #68]	; (8003ce0 <modbus_slave_process_msg+0x1b8>)
+ 8003c9a:	2290      	movs	r2, #144	; 0x90
+ 8003c9c:	0052      	lsls	r2, r2, #1
+ 8003c9e:	4694      	mov	ip, r2
+ 8003ca0:	44bc      	add	ip, r7
+ 8003ca2:	4463      	add	r3, ip
+ 8003ca4:	7a1b      	ldrb	r3, [r3, #8]
+ 8003ca6:	2b00      	cmp	r3, #0
+ 8003ca8:	d114      	bne.n	8003cd4 <modbus_slave_process_msg+0x1ac>
+		modbus_transaction_to_buffer(modbus_buffer, &msg_len, &transaction);
+ 8003caa:	230c      	movs	r3, #12
+ 8003cac:	18fa      	adds	r2, r7, r3
+ 8003cae:	230b      	movs	r3, #11
+ 8003cb0:	18f9      	adds	r1, r7, r3
+ 8003cb2:	4b0d      	ldr	r3, [pc, #52]	; (8003ce8 <modbus_slave_process_msg+0x1c0>)
+ 8003cb4:	0018      	movs	r0, r3
+ 8003cb6:	f7ff fbc5 	bl	8003444 <modbus_transaction_to_buffer>
+		/* send reply */
+		modbus_transmit_function(modbus_buffer, msg_len);
+ 8003cba:	4b0c      	ldr	r3, [pc, #48]	; (8003cec <modbus_slave_process_msg+0x1c4>)
+ 8003cbc:	2290      	movs	r2, #144	; 0x90
+ 8003cbe:	0052      	lsls	r2, r2, #1
+ 8003cc0:	4694      	mov	ip, r2
+ 8003cc2:	44bc      	add	ip, r7
+ 8003cc4:	4463      	add	r3, ip
+ 8003cc6:	781b      	ldrb	r3, [r3, #0]
+ 8003cc8:	b29a      	uxth	r2, r3
+ 8003cca:	4b07      	ldr	r3, [pc, #28]	; (8003ce8 <modbus_slave_process_msg+0x1c0>)
+ 8003ccc:	0011      	movs	r1, r2
+ 8003cce:	0018      	movs	r0, r3
+ 8003cd0:	f7fe fa4a 	bl	8002168 <modbus_transmit_function>
+	}
+	return MODBUS_OK;
+ 8003cd4:	2300      	movs	r3, #0
+}
+ 8003cd6:	0018      	movs	r0, r3
+ 8003cd8:	46bd      	mov	sp, r7
+ 8003cda:	b049      	add	sp, #292	; 0x124
+ 8003cdc:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 8003cde:	46c0      	nop			; (mov r8, r8)
+ 8003ce0:	fffffeec 	.word	0xfffffeec
+ 8003ce4:	20000004 	.word	0x20000004
+ 8003ce8:	2000007c 	.word	0x2000007c
+ 8003cec:	fffffeeb 	.word	0xfffffeeb
+
+08003cf0 <modbus_slave_init_device_id>:
+
+int8_t modbus_slave_init_device_id(modbus_device_id_t *device_id)
+{
+ 8003cf0:	b580      	push	{r7, lr}
+ 8003cf2:	b082      	sub	sp, #8
+ 8003cf4:	af00      	add	r7, sp, #0
+ 8003cf6:	6078      	str	r0, [r7, #4]
+	if (device_id == NULL) {
+ 8003cf8:	687b      	ldr	r3, [r7, #4]
+ 8003cfa:	2b00      	cmp	r3, #0
+ 8003cfc:	d102      	bne.n	8003d04 <modbus_slave_init_device_id+0x14>
+		return MODBUS_ERROR;
+ 8003cfe:	2301      	movs	r3, #1
+ 8003d00:	425b      	negs	r3, r3
+ 8003d02:	e02d      	b.n	8003d60 <modbus_slave_init_device_id+0x70>
+	}
+	/* at least basic category objects have to be implemented */
+	if (	device_id->object_name.VendorName == NULL  ||
+ 8003d04:	687b      	ldr	r3, [r7, #4]
+ 8003d06:	681b      	ldr	r3, [r3, #0]
+ 8003d08:	2b00      	cmp	r3, #0
+ 8003d0a:	d007      	beq.n	8003d1c <modbus_slave_init_device_id+0x2c>
+			device_id->object_name.ProductCode == NULL ||
+ 8003d0c:	687b      	ldr	r3, [r7, #4]
+ 8003d0e:	685b      	ldr	r3, [r3, #4]
+	if (	device_id->object_name.VendorName == NULL  ||
+ 8003d10:	2b00      	cmp	r3, #0
+ 8003d12:	d003      	beq.n	8003d1c <modbus_slave_init_device_id+0x2c>
+			device_id->object_name.MajorMinorRevision == NULL
+ 8003d14:	687b      	ldr	r3, [r7, #4]
+ 8003d16:	689b      	ldr	r3, [r3, #8]
+			device_id->object_name.ProductCode == NULL ||
+ 8003d18:	2b00      	cmp	r3, #0
+ 8003d1a:	d102      	bne.n	8003d22 <modbus_slave_init_device_id+0x32>
+	) {
+		return MODBUS_ERROR;
+ 8003d1c:	2301      	movs	r3, #1
+ 8003d1e:	425b      	negs	r3, r3
+ 8003d20:	e01e      	b.n	8003d60 <modbus_slave_init_device_id+0x70>
+	}
+	/* set conformity level: currently only "basic" and "regular" is implemented */
+	if ( 	device_id->object_id[3] != NULL &&
+ 8003d22:	687b      	ldr	r3, [r7, #4]
+ 8003d24:	68db      	ldr	r3, [r3, #12]
+ 8003d26:	2b00      	cmp	r3, #0
+ 8003d28:	d00b      	beq.n	8003d42 <modbus_slave_init_device_id+0x52>
+			device_id->object_id[4] != NULL &&
+ 8003d2a:	687b      	ldr	r3, [r7, #4]
+ 8003d2c:	691b      	ldr	r3, [r3, #16]
+	if ( 	device_id->object_id[3] != NULL &&
+ 8003d2e:	2b00      	cmp	r3, #0
+ 8003d30:	d007      	beq.n	8003d42 <modbus_slave_init_device_id+0x52>
+			device_id->object_id[5] != NULL
+ 8003d32:	687b      	ldr	r3, [r7, #4]
+ 8003d34:	695b      	ldr	r3, [r3, #20]
+			device_id->object_id[4] != NULL &&
+ 8003d36:	2b00      	cmp	r3, #0
+ 8003d38:	d003      	beq.n	8003d42 <modbus_slave_init_device_id+0x52>
+
+	) {
+		/* strings are present in regular category (optional) */
+		device_id->conformity_level = MODBUS_CONFORMITY_REGULAR;
+ 8003d3a:	687b      	ldr	r3, [r7, #4]
+ 8003d3c:	2202      	movs	r2, #2
+ 8003d3e:	771a      	strb	r2, [r3, #28]
+ 8003d40:	e002      	b.n	8003d48 <modbus_slave_init_device_id+0x58>
+	} else {
+		device_id->conformity_level = MODBUS_CONFORMITY_BASIC;
+ 8003d42:	687b      	ldr	r3, [r7, #4]
+ 8003d44:	2201      	movs	r2, #1
+ 8003d46:	771a      	strb	r2, [r3, #28]
+	}
+	/* we support both stream and individual access to objects */
+	device_id->conformity_level |= MODBUS_DEVICE_ID_INDIVIDUAL_ACCESS_FLAG;
+ 8003d48:	687b      	ldr	r3, [r7, #4]
+ 8003d4a:	7f1b      	ldrb	r3, [r3, #28]
+ 8003d4c:	2280      	movs	r2, #128	; 0x80
+ 8003d4e:	4252      	negs	r2, r2
+ 8003d50:	4313      	orrs	r3, r2
+ 8003d52:	b2da      	uxtb	r2, r3
+ 8003d54:	687b      	ldr	r3, [r7, #4]
+ 8003d56:	771a      	strb	r2, [r3, #28]
+	modbus_device_id = device_id;
+ 8003d58:	4b03      	ldr	r3, [pc, #12]	; (8003d68 <modbus_slave_init_device_id+0x78>)
+ 8003d5a:	687a      	ldr	r2, [r7, #4]
+ 8003d5c:	601a      	str	r2, [r3, #0]
+	return MODBUS_OK;
+ 8003d5e:	2300      	movs	r3, #0
+}
+ 8003d60:	0018      	movs	r0, r3
+ 8003d62:	46bd      	mov	sp, r7
+ 8003d64:	b002      	add	sp, #8
+ 8003d66:	bd80      	pop	{r7, pc}
+ 8003d68:	20000038 	.word	0x20000038
+
+08003d6c <sht4x_measure>:
+{
+	return SHT4X_OK;
+}
+
+int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity)
+{
+ 8003d6c:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 8003d6e:	b093      	sub	sp, #76	; 0x4c
+ 8003d70:	af00      	add	r7, sp, #0
+ 8003d72:	6078      	str	r0, [r7, #4]
+ 8003d74:	6039      	str	r1, [r7, #0]
+	uint8_t buffer[32];
+	int result;
+
+	/* start measurement */
+	buffer[0] = SHT4X_START_MEAS_HIGH_PRECISION;
+ 8003d76:	240c      	movs	r4, #12
+ 8003d78:	193b      	adds	r3, r7, r4
+ 8003d7a:	22fd      	movs	r2, #253	; 0xfd
+ 8003d7c:	701a      	strb	r2, [r3, #0]
+	/* disable interrupts to prevent modbus/i2c conflict */
+	sht4x_disable_interrupts();
+ 8003d7e:	f7fd fb01 	bl	8001384 <sht4x_disable_interrupts>
+	result = sht4x_i2c_transmit(SHT4X_I2C_ADDRESS<<1, buffer, 1);
+ 8003d82:	193b      	adds	r3, r7, r4
+ 8003d84:	2201      	movs	r2, #1
+ 8003d86:	0019      	movs	r1, r3
+ 8003d88:	2088      	movs	r0, #136	; 0x88
+ 8003d8a:	f7fd fabd 	bl	8001308 <sht4x_i2c_transmit>
+ 8003d8e:	0003      	movs	r3, r0
+ 8003d90:	643b      	str	r3, [r7, #64]	; 0x40
+	sht4x_enable_interrupts();
+ 8003d92:	f7fd faff 	bl	8001394 <sht4x_enable_interrupts>
+	if (result != 0) {
+ 8003d96:	6c3b      	ldr	r3, [r7, #64]	; 0x40
+ 8003d98:	2b00      	cmp	r3, #0
+ 8003d9a:	d002      	beq.n	8003da2 <sht4x_measure+0x36>
+		return SHT4X_ERROR;
+ 8003d9c:	2301      	movs	r3, #1
+ 8003d9e:	425b      	negs	r3, r3
+ 8003da0:	e086      	b.n	8003eb0 <sht4x_measure+0x144>
+	}
+	delay_ms(10); /* 10 ms should be enough */
+ 8003da2:	200a      	movs	r0, #10
+ 8003da4:	f7fd fb38 	bl	8001418 <delay_ms>
+	/* read out */
+	sht4x_disable_interrupts();
+ 8003da8:	f7fd faec 	bl	8001384 <sht4x_disable_interrupts>
+	result = sht4x_i2c_receive(SHT4X_I2C_ADDRESS<<1, buffer, 6);
+ 8003dac:	230c      	movs	r3, #12
+ 8003dae:	18fb      	adds	r3, r7, r3
+ 8003db0:	2206      	movs	r2, #6
+ 8003db2:	0019      	movs	r1, r3
+ 8003db4:	2088      	movs	r0, #136	; 0x88
+ 8003db6:	f7fd fabc 	bl	8001332 <sht4x_i2c_receive>
+ 8003dba:	0003      	movs	r3, r0
+ 8003dbc:	643b      	str	r3, [r7, #64]	; 0x40
+	sht4x_enable_interrupts();
+ 8003dbe:	f7fd fae9 	bl	8001394 <sht4x_enable_interrupts>
+	if (result != 0) {
+ 8003dc2:	6c3b      	ldr	r3, [r7, #64]	; 0x40
+ 8003dc4:	2b00      	cmp	r3, #0
+ 8003dc6:	d002      	beq.n	8003dce <sht4x_measure+0x62>
+		return SHT4X_ERROR;
+ 8003dc8:	2301      	movs	r3, #1
+ 8003dca:	425b      	negs	r3, r3
+ 8003dcc:	e070      	b.n	8003eb0 <sht4x_measure+0x144>
+	}
+	/* Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3 */
+	uint32_t t_ticks = (buffer[0] << 8) + buffer[1];
+ 8003dce:	240c      	movs	r4, #12
+ 8003dd0:	193b      	adds	r3, r7, r4
+ 8003dd2:	781b      	ldrb	r3, [r3, #0]
+ 8003dd4:	021b      	lsls	r3, r3, #8
+ 8003dd6:	193a      	adds	r2, r7, r4
+ 8003dd8:	7852      	ldrb	r2, [r2, #1]
+ 8003dda:	189b      	adds	r3, r3, r2
+ 8003ddc:	63fb      	str	r3, [r7, #60]	; 0x3c
+	uint8_t t_crc = buffer[2];
+ 8003dde:	253b      	movs	r5, #59	; 0x3b
+ 8003de0:	197b      	adds	r3, r7, r5
+ 8003de2:	193a      	adds	r2, r7, r4
+ 8003de4:	7892      	ldrb	r2, [r2, #2]
+ 8003de6:	701a      	strb	r2, [r3, #0]
+	uint32_t rh_ticks = (buffer[3] << 8) + buffer[4];
+ 8003de8:	193b      	adds	r3, r7, r4
+ 8003dea:	78db      	ldrb	r3, [r3, #3]
+ 8003dec:	021b      	lsls	r3, r3, #8
+ 8003dee:	193a      	adds	r2, r7, r4
+ 8003df0:	7912      	ldrb	r2, [r2, #4]
+ 8003df2:	189b      	adds	r3, r3, r2
+ 8003df4:	637b      	str	r3, [r7, #52]	; 0x34
+	uint8_t rh_crc = buffer[5];
+ 8003df6:	2633      	movs	r6, #51	; 0x33
+ 8003df8:	19bb      	adds	r3, r7, r6
+ 8003dfa:	193a      	adds	r2, r7, r4
+ 8003dfc:	7952      	ldrb	r2, [r2, #5]
+ 8003dfe:	701a      	strb	r2, [r3, #0]
+	/* check CRC-8 checksum */
+	uint8_t crc_correct = sensirion_crc8_calculate(buffer, 2) == t_crc;
+ 8003e00:	193b      	adds	r3, r7, r4
+ 8003e02:	2102      	movs	r1, #2
+ 8003e04:	0018      	movs	r0, r3
+ 8003e06:	f7fd faa9 	bl	800135c <sensirion_crc8_calculate>
+ 8003e0a:	0003      	movs	r3, r0
+ 8003e0c:	001a      	movs	r2, r3
+ 8003e0e:	197b      	adds	r3, r7, r5
+ 8003e10:	781b      	ldrb	r3, [r3, #0]
+ 8003e12:	1a9b      	subs	r3, r3, r2
+ 8003e14:	425a      	negs	r2, r3
+ 8003e16:	4153      	adcs	r3, r2
+ 8003e18:	b2da      	uxtb	r2, r3
+ 8003e1a:	2532      	movs	r5, #50	; 0x32
+ 8003e1c:	197b      	adds	r3, r7, r5
+ 8003e1e:	701a      	strb	r2, [r3, #0]
+	crc_correct &= sensirion_crc8_calculate(buffer + 3, 2) == rh_crc;
+ 8003e20:	193b      	adds	r3, r7, r4
+ 8003e22:	3303      	adds	r3, #3
+ 8003e24:	2102      	movs	r1, #2
+ 8003e26:	0018      	movs	r0, r3
+ 8003e28:	f7fd fa98 	bl	800135c <sensirion_crc8_calculate>
+ 8003e2c:	0003      	movs	r3, r0
+ 8003e2e:	001a      	movs	r2, r3
+ 8003e30:	19bb      	adds	r3, r7, r6
+ 8003e32:	781b      	ldrb	r3, [r3, #0]
+ 8003e34:	1a9b      	subs	r3, r3, r2
+ 8003e36:	425a      	negs	r2, r3
+ 8003e38:	4153      	adcs	r3, r2
+ 8003e3a:	b2db      	uxtb	r3, r3
+ 8003e3c:	b25b      	sxtb	r3, r3
+ 8003e3e:	197a      	adds	r2, r7, r5
+ 8003e40:	7812      	ldrb	r2, [r2, #0]
+ 8003e42:	b252      	sxtb	r2, r2
+ 8003e44:	4013      	ands	r3, r2
+ 8003e46:	b25a      	sxtb	r2, r3
+ 8003e48:	197b      	adds	r3, r7, r5
+ 8003e4a:	701a      	strb	r2, [r3, #0]
+	if (!crc_correct) {
+ 8003e4c:	197b      	adds	r3, r7, r5
+ 8003e4e:	781b      	ldrb	r3, [r3, #0]
+ 8003e50:	2b00      	cmp	r3, #0
+ 8003e52:	d102      	bne.n	8003e5a <sht4x_measure+0xee>
+		return SHT4X_CRC8_ERROR;
+ 8003e54:	2302      	movs	r3, #2
+ 8003e56:	425b      	negs	r3, r3
+ 8003e58:	e02a      	b.n	8003eb0 <sht4x_measure+0x144>
+	}
+	/* copy data to output variables */
+	int t_degC = -450 + 10 * 175 * t_ticks / 65535; /* temperature * 10 */
+ 8003e5a:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 8003e5c:	4a16      	ldr	r2, [pc, #88]	; (8003eb8 <sht4x_measure+0x14c>)
+ 8003e5e:	4353      	muls	r3, r2
+ 8003e60:	4916      	ldr	r1, [pc, #88]	; (8003ebc <sht4x_measure+0x150>)
+ 8003e62:	0018      	movs	r0, r3
+ 8003e64:	f7fc f958 	bl	8000118 <__udivsi3>
+ 8003e68:	0003      	movs	r3, r0
+ 8003e6a:	3bc3      	subs	r3, #195	; 0xc3
+ 8003e6c:	3bff      	subs	r3, #255	; 0xff
+ 8003e6e:	62fb      	str	r3, [r7, #44]	; 0x2c
+	int rh_pRH = -6 + 125 * rh_ticks / 65535;
+ 8003e70:	6b7a      	ldr	r2, [r7, #52]	; 0x34
+ 8003e72:	0013      	movs	r3, r2
+ 8003e74:	015b      	lsls	r3, r3, #5
+ 8003e76:	1a9b      	subs	r3, r3, r2
+ 8003e78:	009b      	lsls	r3, r3, #2
+ 8003e7a:	189b      	adds	r3, r3, r2
+ 8003e7c:	490f      	ldr	r1, [pc, #60]	; (8003ebc <sht4x_measure+0x150>)
+ 8003e7e:	0018      	movs	r0, r3
+ 8003e80:	f7fc f94a 	bl	8000118 <__udivsi3>
+ 8003e84:	0003      	movs	r3, r0
+ 8003e86:	3b06      	subs	r3, #6
+ 8003e88:	647b      	str	r3, [r7, #68]	; 0x44
+	if (rh_pRH > 100) {
+ 8003e8a:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8003e8c:	2b64      	cmp	r3, #100	; 0x64
+ 8003e8e:	dd01      	ble.n	8003e94 <sht4x_measure+0x128>
+			rh_pRH = 100;
+ 8003e90:	2364      	movs	r3, #100	; 0x64
+ 8003e92:	647b      	str	r3, [r7, #68]	; 0x44
+	}
+	if (rh_pRH < 0) {
+ 8003e94:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8003e96:	2b00      	cmp	r3, #0
+ 8003e98:	da01      	bge.n	8003e9e <sht4x_measure+0x132>
+		rh_pRH = 0;
+ 8003e9a:	2300      	movs	r3, #0
+ 8003e9c:	647b      	str	r3, [r7, #68]	; 0x44
+	}
+	*temperature = t_degC;
+ 8003e9e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8003ea0:	b21a      	sxth	r2, r3
+ 8003ea2:	687b      	ldr	r3, [r7, #4]
+ 8003ea4:	801a      	strh	r2, [r3, #0]
+	*relative_humidity = rh_pRH;
+ 8003ea6:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8003ea8:	b29a      	uxth	r2, r3
+ 8003eaa:	683b      	ldr	r3, [r7, #0]
+ 8003eac:	801a      	strh	r2, [r3, #0]
+
+	return SHT4X_OK;
+ 8003eae:	2300      	movs	r3, #0
+}
+ 8003eb0:	0018      	movs	r0, r3
+ 8003eb2:	46bd      	mov	sp, r7
+ 8003eb4:	b013      	add	sp, #76	; 0x4c
+ 8003eb6:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 8003eb8:	000006d6 	.word	0x000006d6
+ 8003ebc:	0000ffff 	.word	0x0000ffff
+
+08003ec0 <__libc_init_array>:
+ 8003ec0:	b570      	push	{r4, r5, r6, lr}
+ 8003ec2:	2600      	movs	r6, #0
+ 8003ec4:	4d0c      	ldr	r5, [pc, #48]	; (8003ef8 <__libc_init_array+0x38>)
+ 8003ec6:	4c0d      	ldr	r4, [pc, #52]	; (8003efc <__libc_init_array+0x3c>)
+ 8003ec8:	1b64      	subs	r4, r4, r5
+ 8003eca:	10a4      	asrs	r4, r4, #2
+ 8003ecc:	42a6      	cmp	r6, r4
+ 8003ece:	d109      	bne.n	8003ee4 <__libc_init_array+0x24>
+ 8003ed0:	2600      	movs	r6, #0
+ 8003ed2:	f000 f835 	bl	8003f40 <_init>
+ 8003ed6:	4d0a      	ldr	r5, [pc, #40]	; (8003f00 <__libc_init_array+0x40>)
+ 8003ed8:	4c0a      	ldr	r4, [pc, #40]	; (8003f04 <__libc_init_array+0x44>)
+ 8003eda:	1b64      	subs	r4, r4, r5
+ 8003edc:	10a4      	asrs	r4, r4, #2
+ 8003ede:	42a6      	cmp	r6, r4
+ 8003ee0:	d105      	bne.n	8003eee <__libc_init_array+0x2e>
+ 8003ee2:	bd70      	pop	{r4, r5, r6, pc}
+ 8003ee4:	00b3      	lsls	r3, r6, #2
+ 8003ee6:	58eb      	ldr	r3, [r5, r3]
+ 8003ee8:	4798      	blx	r3
+ 8003eea:	3601      	adds	r6, #1
+ 8003eec:	e7ee      	b.n	8003ecc <__libc_init_array+0xc>
+ 8003eee:	00b3      	lsls	r3, r6, #2
+ 8003ef0:	58eb      	ldr	r3, [r5, r3]
+ 8003ef2:	4798      	blx	r3
+ 8003ef4:	3601      	adds	r6, #1
+ 8003ef6:	e7f2      	b.n	8003ede <__libc_init_array+0x1e>
+ 8003ef8:	080040a0 	.word	0x080040a0
+ 8003efc:	080040a0 	.word	0x080040a0
+ 8003f00:	080040a0 	.word	0x080040a0
+ 8003f04:	080040a4 	.word	0x080040a4
+
+08003f08 <memset>:
+ 8003f08:	0003      	movs	r3, r0
+ 8003f0a:	1882      	adds	r2, r0, r2
+ 8003f0c:	4293      	cmp	r3, r2
+ 8003f0e:	d100      	bne.n	8003f12 <memset+0xa>
+ 8003f10:	4770      	bx	lr
+ 8003f12:	7019      	strb	r1, [r3, #0]
+ 8003f14:	3301      	adds	r3, #1
+ 8003f16:	e7f9      	b.n	8003f0c <memset+0x4>
+
+08003f18 <strncpy>:
+ 8003f18:	0003      	movs	r3, r0
+ 8003f1a:	b530      	push	{r4, r5, lr}
+ 8003f1c:	001d      	movs	r5, r3
+ 8003f1e:	2a00      	cmp	r2, #0
+ 8003f20:	d006      	beq.n	8003f30 <strncpy+0x18>
+ 8003f22:	780c      	ldrb	r4, [r1, #0]
+ 8003f24:	3a01      	subs	r2, #1
+ 8003f26:	3301      	adds	r3, #1
+ 8003f28:	702c      	strb	r4, [r5, #0]
+ 8003f2a:	3101      	adds	r1, #1
+ 8003f2c:	2c00      	cmp	r4, #0
+ 8003f2e:	d1f5      	bne.n	8003f1c <strncpy+0x4>
+ 8003f30:	2100      	movs	r1, #0
+ 8003f32:	189a      	adds	r2, r3, r2
+ 8003f34:	4293      	cmp	r3, r2
+ 8003f36:	d100      	bne.n	8003f3a <strncpy+0x22>
+ 8003f38:	bd30      	pop	{r4, r5, pc}
+ 8003f3a:	7019      	strb	r1, [r3, #0]
+ 8003f3c:	3301      	adds	r3, #1
+ 8003f3e:	e7f9      	b.n	8003f34 <strncpy+0x1c>
+
+08003f40 <_init>:
+ 8003f40:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8003f42:	46c0      	nop			; (mov r8, r8)
+ 8003f44:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8003f46:	bc08      	pop	{r3}
+ 8003f48:	469e      	mov	lr, r3
+ 8003f4a:	4770      	bx	lr
+
+08003f4c <_fini>:
+ 8003f4c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8003f4e:	46c0      	nop			; (mov r8, r8)
+ 8003f50:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8003f52:	bc08      	pop	{r3}
+ 8003f54:	469e      	mov	lr, r3
+ 8003f56:	4770      	bx	lr
diff --git a/fw/Debug/rht_wired_sensor.map b/fw/Debug/rht_wired_sensor.map
index 23f18c5..17d49d6 100644
--- a/fw/Debug/rht_wired_sensor.map
+++ b/fw/Debug/rht_wired_sensor.map
@@ -11,9 +11,9 @@ Archive member included to satisfy reference by file (symbol)
 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o)
                               /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o (memset)
 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-strlen.o)
-                              ./Core/Src/modbus.o (strlen)
+                              ./Libs/modbus/modbus.o (strlen)
 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-strncpy.o)
-                              ./Core/Src/modbus.o (strncpy)
+                              ./Libs/modbus/modbus.o (strncpy)
 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o)
                               ./Core/Src/main.o (__aeabi_uidiv)
 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o)
@@ -26,15 +26,13 @@ Common symbol       size              file
 
 T_SHT4x             0x2               ./Core/Src/main.o
 light_ch1           0x2               ./Core/Src/main.o
-modbus_buffer       0x100             ./Core/Src/modbus.o
+modbus_buffer       0x100             ./Libs/modbus/modbus.o
 data_registers_numbers
                     0x2               ./Core/Src/main.o
 device_id           0x20              ./Core/Src/main.o
-identification_registers_numbers
-                    0x2               ./Core/Src/main.o
 config_registers_numbers
                     0x2               ./Core/Src/main.o
-sensor_config       0x14              ./Core/Src/main.o
+sensor_config       0xc               ./Core/Src/main.o
 TF_SHT4x            0x2               ./Core/Src/main.o
 light_ch0           0x2               ./Core/Src/main.o
 RH_SHT4x            0x2               ./Core/Src/main.o
@@ -68,29 +66,17 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./Core/Src/config.o
  .group         0x0000000000000000        0xc ./Core/Src/config.o
  .group         0x0000000000000000        0xc ./Core/Src/config.o
+ .group         0x0000000000000000        0xc ./Core/Src/config.o
+ .group         0x0000000000000000        0xc ./Core/Src/config.o
+ .group         0x0000000000000000        0xc ./Core/Src/config.o
+ .group         0x0000000000000000        0xc ./Core/Src/config.o
  .text          0x0000000000000000        0x0 ./Core/Src/config.o
  .data          0x0000000000000000        0x0 ./Core/Src/config.o
  .bss           0x0000000000000000        0x0 ./Core/Src/config.o
+ .text.eeprom_program_byte
+                0x0000000000000000       0x50 ./Core/Src/config.o
  .text.eeprom_program_word
                 0x0000000000000000       0x48 ./Core/Src/config.o
- .group         0x0000000000000000        0xc ./Core/Src/crc8.o
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- .group         0x0000000000000000        0xc ./Core/Src/crc8.o
- .group         0x0000000000000000        0xc ./Core/Src/crc8.o
- .group         0x0000000000000000        0xc ./Core/Src/crc8.o
- .group         0x0000000000000000        0xc ./Core/Src/crc8.o
- .group         0x0000000000000000        0xc ./Core/Src/crc8.o
- .group         0x0000000000000000        0xc ./Core/Src/crc8.o
- .text          0x0000000000000000        0x0 ./Core/Src/crc8.o
- .data          0x0000000000000000        0x0 ./Core/Src/crc8.o
- .bss           0x0000000000000000        0x0 ./Core/Src/crc8.o
- .debug_macro   0x0000000000000000      0xac0 ./Core/Src/crc8.o
- .debug_macro   0x0000000000000000       0x22 ./Core/Src/crc8.o
- .debug_macro   0x0000000000000000       0x8e ./Core/Src/crc8.o
- .debug_macro   0x0000000000000000       0x51 ./Core/Src/crc8.o
- .debug_macro   0x0000000000000000      0x103 ./Core/Src/crc8.o
- .debug_macro   0x0000000000000000       0x6a ./Core/Src/crc8.o
- .debug_macro   0x0000000000000000      0x1df ./Core/Src/crc8.o
  .group         0x0000000000000000        0xc ./Core/Src/i2c.o
  .group         0x0000000000000000        0xc ./Core/Src/i2c.o
  .group         0x0000000000000000        0xc ./Core/Src/i2c.o
@@ -127,95 +113,6 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x3ad ./Core/Src/i2c.o
  .debug_macro   0x0000000000000000     0x7f00 ./Core/Src/i2c.o
  .debug_macro   0x0000000000000000       0x66 ./Core/Src/i2c.o
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- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
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- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
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- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
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- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
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- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
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- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/ltr329.o
- .text          0x0000000000000000        0x0 ./Core/Src/ltr329.o
- .data          0x0000000000000000        0x0 ./Core/Src/ltr329.o
- .bss           0x0000000000000000        0x0 ./Core/Src/ltr329.o
- .rodata.CHANNEL_OFFSET_TAB
-                0x0000000000000000        0x7 ./Core/Src/ltr329.o
- .rodata.OFFSET_TAB_CCMRx
-                0x0000000000000000        0x7 ./Core/Src/ltr329.o
- .rodata.SHIFT_TAB_OCxx
-                0x0000000000000000        0x7 ./Core/Src/ltr329.o
- .rodata.SHIFT_TAB_ICxx
-                0x0000000000000000        0x7 ./Core/Src/ltr329.o
- .rodata.SHIFT_TAB_CCxP
-                0x0000000000000000        0x7 ./Core/Src/ltr329.o
- .text.ltr329_read_settings
-                0x0000000000000000       0xc4 ./Core/Src/ltr329.o
- .text.ltr329_sw_reset
-                0x0000000000000000       0x2e ./Core/Src/ltr329.o
- .text.ltr329_read_device_info
-                0x0000000000000000       0x58 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000      0xac0 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x22 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x8e ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x51 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000      0x103 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x6a ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000      0x1df ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x2e ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x28 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x22 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0xb5 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000      0x3ad ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000     0x7f00 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000       0x66 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000      0x248 ./Core/Src/ltr329.o
- .debug_macro   0x0000000000000000      0x2f7 ./Core/Src/ltr329.o
- .group         0x0000000000000000        0xc ./Core/Src/main.o
  .group         0x0000000000000000        0xc ./Core/Src/main.o
  .group         0x0000000000000000        0xc ./Core/Src/main.o
  .group         0x0000000000000000        0xc ./Core/Src/main.o
@@ -304,215 +201,10 @@ Discarded input sections
  .debug_macro   0x0000000000000000     0x7f00 ./Core/Src/main.o
  .debug_macro   0x0000000000000000       0x66 ./Core/Src/main.o
  .debug_macro   0x0000000000000000      0x248 ./Core/Src/main.o
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  .debug_macro   0x0000000000000000       0x16 ./Core/Src/main.o
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- .debug_macro   0x0000000000000000       0xcf ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000      0x303 ./Core/Src/sht4x.o
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- .debug_macro   0x0000000000000000      0x174 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x52 ./Core/Src/sht4x.o
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- .debug_macro   0x0000000000000000       0x3c ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x34 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x16 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x43 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x34 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x10 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x58 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x71 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000      0x12a ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000      0x333 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x10 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x35 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x20 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0xa7 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000      0x130 ./Core/Src/sht4x.o
- .debug_macro   0x0000000000000000       0x40 ./Core/Src/sht4x.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32l0xx_it.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32l0xx_it.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32l0xx_it.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32l0xx_it.o
@@ -606,9 +298,8 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x2f7 ./Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000      0x12d ./Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000       0x2e ./Core/Src/stm32l0xx_it.o
+ .debug_macro   0x0000000000000000       0x22 ./Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32l0xx_it.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32l0xx_it.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000      0x174 ./Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000       0x52 ./Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000       0x18 ./Core/Src/stm32l0xx_it.o
@@ -1462,6 +1153,144 @@ Discarded input sections
  .debug_macro   0x0000000000000000       0x2a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
  .debug_macro   0x0000000000000000      0x14b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
  .debug_macro   0x0000000000000000       0xcf ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+ .group         0x0000000000000000        0xc ./Libs/crc8/crc8.o
+ .group         0x0000000000000000        0xc ./Libs/crc8/crc8.o
+ .group         0x0000000000000000        0xc ./Libs/crc8/crc8.o
+ .group         0x0000000000000000        0xc ./Libs/crc8/crc8.o
+ .group         0x0000000000000000        0xc ./Libs/crc8/crc8.o
+ .group         0x0000000000000000        0xc ./Libs/crc8/crc8.o
+ .group         0x0000000000000000        0xc ./Libs/crc8/crc8.o
+ .group         0x0000000000000000        0xc ./Libs/crc8/crc8.o
+ .text          0x0000000000000000        0x0 ./Libs/crc8/crc8.o
+ .data          0x0000000000000000        0x0 ./Libs/crc8/crc8.o
+ .bss           0x0000000000000000        0x0 ./Libs/crc8/crc8.o
+ .debug_macro   0x0000000000000000      0xac0 ./Libs/crc8/crc8.o
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+ .debug_macro   0x0000000000000000       0x8e ./Libs/crc8/crc8.o
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+ .debug_macro   0x0000000000000000       0x6a ./Libs/crc8/crc8.o
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+ .data          0x0000000000000000        0x0 ./Libs/ltr329/ltr329.o
+ .bss           0x0000000000000000        0x0 ./Libs/ltr329/ltr329.o
+ .text.ltr329_sw_reset
+                0x0000000000000000       0x2e ./Libs/ltr329/ltr329.o
+ .text.ltr329_read_device_info
+                0x0000000000000000       0x58 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000      0xac0 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0x22 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0x8e ./Libs/ltr329/ltr329.o
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+ .debug_macro   0x0000000000000000      0x103 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0x6a ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000      0x1df ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0x2e ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0x28 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0x1c ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0x22 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0xb5 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000      0x3ad ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000     0x7f00 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000       0x66 ./Libs/ltr329/ltr329.o
+ .debug_macro   0x0000000000000000      0x248 ./Libs/ltr329/ltr329.o
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+ .group         0x0000000000000000        0xc ./Libs/modbus/modbus.o
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+ .group         0x0000000000000000        0xc ./Libs/modbus/modbus.o
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+ .data          0x0000000000000000        0x0 ./Libs/modbus/modbus.o
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+ .debug_macro   0x0000000000000000      0xac0 ./Libs/modbus/modbus.o
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+ .debug_macro   0x0000000000000000      0x1df ./Libs/modbus/modbus.o
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+ .debug_macro   0x0000000000000000       0x18 ./Libs/modbus/modbus.o
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+ .debug_macro   0x0000000000000000       0x34 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x16 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x43 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x34 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x10 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x58 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x71 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x1c ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000      0x12a ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000      0x339 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x10 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x35 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0x20 ./Libs/modbus/modbus.o
+ .debug_macro   0x0000000000000000       0xa7 ./Libs/modbus/modbus.o
+ .group         0x0000000000000000        0xc ./Libs/sht4x/sht4x.o
+ .group         0x0000000000000000        0xc ./Libs/sht4x/sht4x.o
+ .group         0x0000000000000000        0xc ./Libs/sht4x/sht4x.o
+ .group         0x0000000000000000        0xc ./Libs/sht4x/sht4x.o
+ .group         0x0000000000000000        0xc ./Libs/sht4x/sht4x.o
+ .group         0x0000000000000000        0xc ./Libs/sht4x/sht4x.o
+ .group         0x0000000000000000        0xc ./Libs/sht4x/sht4x.o
+ .group         0x0000000000000000        0xc ./Libs/sht4x/sht4x.o
+ .text          0x0000000000000000        0x0 ./Libs/sht4x/sht4x.o
+ .data          0x0000000000000000        0x0 ./Libs/sht4x/sht4x.o
+ .bss           0x0000000000000000        0x0 ./Libs/sht4x/sht4x.o
+ .text.sht4x_send_cmd
+                0x0000000000000000       0x16 ./Libs/sht4x/sht4x.o
+ .text.sht4x_read_data
+                0x0000000000000000       0x14 ./Libs/sht4x/sht4x.o
+ .debug_macro   0x0000000000000000      0xac0 ./Libs/sht4x/sht4x.o
+ .debug_macro   0x0000000000000000       0x22 ./Libs/sht4x/sht4x.o
+ .debug_macro   0x0000000000000000       0x8e ./Libs/sht4x/sht4x.o
+ .debug_macro   0x0000000000000000       0x51 ./Libs/sht4x/sht4x.o
+ .debug_macro   0x0000000000000000      0x103 ./Libs/sht4x/sht4x.o
+ .debug_macro   0x0000000000000000       0x6a ./Libs/sht4x/sht4x.o
+ .debug_macro   0x0000000000000000      0x1df ./Libs/sht4x/sht4x.o
  .text          0x0000000000000000        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-errno.o)
  .data          0x0000000000000000        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-errno.o)
  .bss           0x0000000000000000        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-errno.o)
@@ -1527,12 +1356,8 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
 LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
 LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/crt0.o
 LOAD ./Core/Src/config.o
-LOAD ./Core/Src/crc8.o
 LOAD ./Core/Src/i2c.o
-LOAD ./Core/Src/ltr329.o
 LOAD ./Core/Src/main.o
-LOAD ./Core/Src/modbus.o
-LOAD ./Core/Src/sht4x.o
 LOAD ./Core/Src/stm32l0xx_it.o
 LOAD ./Core/Src/syscalls.o
 LOAD ./Core/Src/sysmem.o
@@ -1547,6 +1372,10 @@ LOAD ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
 LOAD ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
 LOAD ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
 LOAD ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+LOAD ./Libs/crc8/crc8.o
+LOAD ./Libs/ltr329/ltr329.o
+LOAD ./Libs/modbus/modbus.o
+LOAD ./Libs/sht4x/sht4x.o
 START GROUP
 LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a
 LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libm.a
@@ -1578,7 +1407,7 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
                 0x0000000008000000                g_pfnVectors
                 0x00000000080000c0                . = ALIGN (0x4)
 
-.text           0x00000000080000c0     0x3b08
+.text           0x00000000080000c0     0x3e98
                 0x00000000080000c0                . = ALIGN (0x4)
  *(.text)
  .text          0x00000000080000c0       0x48 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
@@ -1598,530 +1427,563 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
                 0x0000000008000400                __aeabi_idiv0
  *(.text*)
  .text.config_read
-                0x0000000008000404       0xa0 ./Core/Src/config.o
+                0x0000000008000404       0x3c ./Core/Src/config.o
                 0x0000000008000404                config_read
  .text.config_write
-                0x00000000080004a4      0x128 ./Core/Src/config.o
-                0x00000000080004a4                config_write
+                0x0000000008000440       0x7c ./Core/Src/config.o
+                0x0000000008000440                config_write
  .text.eeprom_lock
-                0x00000000080005cc       0x7c ./Core/Src/config.o
+                0x00000000080004bc       0x7c ./Core/Src/config.o
  .text.eeprom_unlock
-                0x0000000008000648       0x8c ./Core/Src/config.o
- .text.eeprom_program_byte
-                0x00000000080006d4       0x50 ./Core/Src/config.o
+                0x0000000008000538       0x8c ./Core/Src/config.o
  .text.eeprom_program_halfword
-                0x0000000008000724       0x50 ./Core/Src/config.o
- .text.crc8_calculate
-                0x0000000008000774       0xac ./Core/Src/crc8.o
-                0x0000000008000774                crc8_calculate
+                0x00000000080005c4       0x50 ./Core/Src/config.o
  .text.LL_I2C_IsActiveFlag_TXE
-                0x0000000008000820       0x22 ./Core/Src/i2c.o
+                0x0000000008000614       0x22 ./Core/Src/i2c.o
  .text.LL_I2C_IsActiveFlag_RXNE
-                0x0000000008000842       0x22 ./Core/Src/i2c.o
+                0x0000000008000636       0x22 ./Core/Src/i2c.o
  .text.LL_I2C_IsActiveFlag_STOP
-                0x0000000008000864       0x22 ./Core/Src/i2c.o
+                0x0000000008000658       0x22 ./Core/Src/i2c.o
  .text.LL_I2C_ClearFlag_STOP
-                0x0000000008000886       0x1c ./Core/Src/i2c.o
+                0x000000000800067a       0x1c ./Core/Src/i2c.o
  .text.LL_I2C_ClearFlag_TXE
-                0x00000000080008a2       0x16 ./Core/Src/i2c.o
+                0x0000000008000696       0x16 ./Core/Src/i2c.o
  .text.LL_I2C_HandleTransfer
-                0x00000000080008b8       0x4c ./Core/Src/i2c.o
+                0x00000000080006ac       0x4c ./Core/Src/i2c.o
  .text.LL_I2C_ReceiveData8
-                0x0000000008000904       0x16 ./Core/Src/i2c.o
+                0x00000000080006f8       0x16 ./Core/Src/i2c.o
  .text.LL_I2C_TransmitData8
-                0x000000000800091a       0x1e ./Core/Src/i2c.o
+                0x000000000800070e       0x1e ./Core/Src/i2c.o
  .text.i2c_init
-                0x0000000008000938       0x28 ./Core/Src/i2c.o
-                0x0000000008000938                i2c_init
+                0x000000000800072c       0x28 ./Core/Src/i2c.o
+                0x000000000800072c                i2c_init
  .text.i2c_transmit
-                0x0000000008000960       0xb0 ./Core/Src/i2c.o
-                0x0000000008000960                i2c_transmit
+                0x0000000008000754       0xb0 ./Core/Src/i2c.o
+                0x0000000008000754                i2c_transmit
  .text.i2c_receive
-                0x0000000008000a10       0xb4 ./Core/Src/i2c.o
-                0x0000000008000a10                i2c_receive
- .text.ltr329_read_register
-                0x0000000008000ac4       0x7c ./Core/Src/ltr329.o
- .text.ltr329_write_register
-                0x0000000008000b40       0x52 ./Core/Src/ltr329.o
- .text.ltr329_write_settings
-                0x0000000008000b92       0x88 ./Core/Src/ltr329.o
-                0x0000000008000b92                ltr329_write_settings
- .text.ltr329_measure
-                0x0000000008000c1a       0xbc ./Core/Src/ltr329.o
-                0x0000000008000c1a                ltr329_measure
- .text.ltr329_read_status_register
-                0x0000000008000cd6       0xac ./Core/Src/ltr329.o
-                0x0000000008000cd6                ltr329_read_status_register
- *fill*         0x0000000008000d82        0x2 
+                0x0000000008000804       0xb4 ./Core/Src/i2c.o
+                0x0000000008000804                i2c_receive
  .text.__NVIC_EnableIRQ
-                0x0000000008000d84       0x34 ./Core/Src/main.o
+                0x00000000080008b8       0x34 ./Core/Src/main.o
  .text.__NVIC_SetPriority
-                0x0000000008000db8       0xdc ./Core/Src/main.o
+                0x00000000080008ec       0xdc ./Core/Src/main.o
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  .text.LL_IWDG_ReloadCounter
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  .text.LL_IWDG_EnableWriteAccess
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-                0x0000000008000fd4       0x1c ./Core/Src/main.o
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-                0x0000000008000ff0       0x1c ./Core/Src/main.o
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-                0x000000000800102c       0x1c ./Core/Src/main.o
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-                0x0000000008001048       0x20 ./Core/Src/main.o
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-                0x0000000008001068       0x2c ./Core/Src/main.o
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  .text.LL_RCC_GetSysClkSource
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  .text.LL_RCC_SetAHBPrescaler
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  .text.LL_RCC_SetAPB1Prescaler
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  .text.LL_RCC_SetAPB2Prescaler
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  .text.LL_RCC_SetUSARTClockSource
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  .text.LL_RCC_SetI2CClockSource
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  .text.LL_RCC_PLL_Enable
-                0x00000000080011f8       0x1c ./Core/Src/main.o
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  .text.LL_RCC_PLL_IsReady
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  .text.LL_RCC_PLL_ConfigDomain_SYS
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  .text.LL_APB1_GRP1_EnableClock
-                0x0000000008001274       0x2c ./Core/Src/main.o
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  .text.LL_APB2_GRP1_EnableClock
-                0x00000000080012a0       0x2c ./Core/Src/main.o
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  .text.LL_IOP_GRP1_EnableClock
-                0x00000000080012cc       0x2c ./Core/Src/main.o
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-                0x00000000080012f8       0x28 ./Core/Src/main.o
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  .text.LL_FLASH_GetLatency
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  .text.LL_PWR_SetRegulVoltageScaling
-                0x0000000008001338       0x2c ./Core/Src/main.o
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  .text.LL_TIM_EnableCounter
-                0x0000000008001364       0x1c ./Core/Src/main.o
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  .text.LL_TIM_EnableARRPreload
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  .text.LL_TIM_SetClockSource
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  .text.LL_TIM_SetTriggerOutput
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  .text.LL_TIM_DisableMasterSlaveMode
-                0x00000000080013e8       0x1e ./Core/Src/main.o
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-                0x0000000008001406       0x1c ./Core/Src/main.o
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-                0x0000000008001422       0x1c ./Core/Src/main.o
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  .text.LL_USART_SetBaudRate
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  .text.LL_USART_SetDEDeassertionTime
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  .text.LL_USART_SetDEAssertionTime
-                0x00000000080015f4       0x28 ./Core/Src/main.o
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  .text.LL_USART_EnableDEMode
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  .text.LL_USART_SetDESignalPolarity
-                0x000000000800163c       0x28 ./Core/Src/main.o
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  .text.LL_USART_ConfigAsyncMode
-                0x0000000008001664       0x30 ./Core/Src/main.o
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  .text.LL_USART_IsActiveFlag_TXE
-                0x0000000008001694       0x22 ./Core/Src/main.o
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  .text.LL_USART_EnableIT_IDLE
-                0x00000000080016b6       0x3e ./Core/Src/main.o
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  .text.LL_USART_EnableIT_RXNE
-                0x00000000080016f4       0x3e ./Core/Src/main.o
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-                0x0000000008001732       0x40 ./Core/Src/main.o
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  .text.LL_USART_DisableIT_RXNE
-                0x0000000008001772       0x40 ./Core/Src/main.o
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  .text.LL_USART_TransmitData9
-                0x00000000080017b2       0x22 ./Core/Src/main.o
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-                0x00000000080017d4                main
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+                0x0000000008001308       0x2a ./Core/Src/main.o
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+ .text.sht4x_i2c_receive
+                0x0000000008001332       0x2a ./Core/Src/main.o
+                0x0000000008001332                sht4x_i2c_receive
+ .text.sensirion_crc8_calculate
+                0x000000000800135c       0x28 ./Core/Src/main.o
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+ .text.sht4x_disable_interrupts
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+ .text.sht4x_enable_interrupts
+                0x0000000008001394       0x10 ./Core/Src/main.o
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+ .text.ltr329_i2c_transmit
+                0x00000000080013a4       0x2a ./Core/Src/main.o
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+ .text.ltr329_i2c_receive
+                0x00000000080013ce       0x2a ./Core/Src/main.o
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+ .text.ltr329_disable_interrupts
+                0x00000000080013f8       0x10 ./Core/Src/main.o
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+ .text.ltr329_enable_interrupts
+                0x0000000008001408       0x10 ./Core/Src/main.o
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+ .text.delay_ms
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  .text.SystemClock_Config
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  .text.MX_I2C1_Init
-                0x0000000008001b50      0x110 ./Core/Src/main.o
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  .text.MX_IWDG_Init
-                0x0000000008001c60       0x50 ./Core/Src/main.o
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  .text.MX_TIM21_Init
-                0x0000000008001cb0       0x88 ./Core/Src/main.o
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  .text.MX_USART2_UART_Init
-                0x0000000008001d38      0x190 ./Core/Src/main.o
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  .text.MX_GPIO_Init
-                0x0000000008001ec8       0x10 ./Core/Src/main.o
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  .text.USART2_TX_Buffer
-                0x0000000008001ed8       0x6c ./Core/Src/main.o
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  .text.uart_disable_interrupts
-                0x0000000008001f44       0x28 ./Core/Src/main.o
-                0x0000000008001f44                uart_disable_interrupts
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  .text.uart_enable_interrupts
-                0x0000000008001f6c       0x28 ./Core/Src/main.o
-                0x0000000008001f6c                uart_enable_interrupts
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  .text.modbus_slave_callback
-                0x0000000008001f94      0x278 ./Core/Src/main.o
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  .text.modbus_transmit_function
-                0x000000000800220c       0x26 ./Core/Src/main.o
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-                0x0000000008002234       0x94 ./Core/Src/modbus.o
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-                0x00000000080022c8      0x148 ./Core/Src/modbus.o
- .text.modbus_transaction_to_buffer
-                0x0000000008002410      0x2d8 ./Core/Src/modbus.o
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-                0x00000000080026e8       0xf4 ./Core/Src/modbus.o
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-                0x00000000080027dc      0x2e4 ./Core/Src/modbus.o
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-                0x0000000008002af0      0x1c8 ./Core/Src/modbus.o
-                0x0000000008002af0                modbus_slave_process_msg
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-                0x0000000008002cb8       0x7c ./Core/Src/modbus.o
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- .text.sht4x_measure
-                0x0000000008002d34      0x154 ./Core/Src/sht4x.o
-                0x0000000008002d34                sht4x_measure
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  .text.LL_TIM_ClearFlag_UPDATE
-                0x0000000008002e88       0x18 ./Core/Src/stm32l0xx_it.o
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  .text.LL_USART_IsActiveFlag_IDLE
-                0x0000000008002ea0       0x22 ./Core/Src/stm32l0xx_it.o
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  .text.LL_USART_IsActiveFlag_RXNE
-                0x0000000008002ec2       0x22 ./Core/Src/stm32l0xx_it.o
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  .text.LL_USART_ClearFlag_IDLE
-                0x0000000008002ee4       0x16 ./Core/Src/stm32l0xx_it.o
+                0x00000000080021ea       0x16 ./Core/Src/stm32l0xx_it.o
  .text.LL_USART_IsEnabledIT_IDLE
-                0x0000000008002efa       0x22 ./Core/Src/stm32l0xx_it.o
+                0x0000000008002200       0x22 ./Core/Src/stm32l0xx_it.o
  .text.LL_USART_IsEnabledIT_RXNE
-                0x0000000008002f1c       0x22 ./Core/Src/stm32l0xx_it.o
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  .text.LL_USART_ReceiveData9
-                0x0000000008002f3e       0x1c ./Core/Src/stm32l0xx_it.o
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  .text.NMI_Handler
-                0x0000000008002f5a        0x6 ./Core/Src/stm32l0xx_it.o
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  .text.HardFault_Handler
-                0x0000000008002f60        0x6 ./Core/Src/stm32l0xx_it.o
-                0x0000000008002f60                HardFault_Handler
+                0x0000000008002266        0x6 ./Core/Src/stm32l0xx_it.o
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  .text.SVC_Handler
-                0x0000000008002f66        0xa ./Core/Src/stm32l0xx_it.o
-                0x0000000008002f66                SVC_Handler
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  .text.PendSV_Handler
-                0x0000000008002f70        0xa ./Core/Src/stm32l0xx_it.o
-                0x0000000008002f70                PendSV_Handler
+                0x0000000008002276        0xa ./Core/Src/stm32l0xx_it.o
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  .text.SysTick_Handler
-                0x0000000008002f7a        0xa ./Core/Src/stm32l0xx_it.o
-                0x0000000008002f7a                SysTick_Handler
+                0x0000000008002280        0xa ./Core/Src/stm32l0xx_it.o
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  .text.TIM21_IRQHandler
-                0x0000000008002f84       0x20 ./Core/Src/stm32l0xx_it.o
-                0x0000000008002f84                TIM21_IRQHandler
+                0x000000000800228c       0x20 ./Core/Src/stm32l0xx_it.o
+                0x000000000800228c                TIM21_IRQHandler
  .text.USART2_IRQHandler
-                0x0000000008002fa4       0x80 ./Core/Src/stm32l0xx_it.o
-                0x0000000008002fa4                USART2_IRQHandler
+                0x00000000080022ac       0x80 ./Core/Src/stm32l0xx_it.o
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  .text.USART2_CharReception_Callback
-                0x0000000008003024       0x4c ./Core/Src/stm32l0xx_it.o
-                0x0000000008003024                USART2_CharReception_Callback
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  .text.SystemInit
-                0x0000000008003070        0xa ./Core/Src/system_stm32l0xx.o
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  .text.Reset_Handler
-                0x000000000800307c       0x50 ./Core/Startup/startup_stm32l031g6ux.o
-                0x000000000800307c                Reset_Handler
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  .text.Default_Handler
-                0x00000000080030cc        0x2 ./Core/Startup/startup_stm32l031g6ux.o
-                0x00000000080030cc                ADC1_COMP_IRQHandler
-                0x00000000080030cc                PVD_IRQHandler
-                0x00000000080030cc                I2C1_IRQHandler
-                0x00000000080030cc                SPI1_IRQHandler
-                0x00000000080030cc                EXTI2_3_IRQHandler
-                0x00000000080030cc                RTC_IRQHandler
-                0x00000000080030cc                DMA1_Channel4_5_6_7_IRQHandler
-                0x00000000080030cc                EXTI4_15_IRQHandler
-                0x00000000080030cc                RCC_IRQHandler
-                0x00000000080030cc                DMA1_Channel1_IRQHandler
-                0x00000000080030cc                Default_Handler
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-                0x00000000080030cc                EXTI0_1_IRQHandler
-                0x00000000080030cc                WWDG_IRQHandler
-                0x00000000080030cc                LPUART1_IRQHandler
-                0x00000000080030cc                TIM2_IRQHandler
-                0x00000000080030cc                DMA1_Channel2_3_IRQHandler
-                0x00000000080030cc                FLASH_IRQHandler
-                0x00000000080030cc                LPTIM1_IRQHandler
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+                0x00000000080023d4                ADC1_COMP_IRQHandler
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+                0x00000000080023d4                I2C1_IRQHandler
+                0x00000000080023d4                SPI1_IRQHandler
+                0x00000000080023d4                EXTI2_3_IRQHandler
+                0x00000000080023d4                RTC_IRQHandler
+                0x00000000080023d4                DMA1_Channel4_5_6_7_IRQHandler
+                0x00000000080023d4                EXTI4_15_IRQHandler
+                0x00000000080023d4                RCC_IRQHandler
+                0x00000000080023d4                DMA1_Channel1_IRQHandler
+                0x00000000080023d4                Default_Handler
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+                0x00000000080023d4                EXTI0_1_IRQHandler
+                0x00000000080023d4                WWDG_IRQHandler
+                0x00000000080023d4                LPUART1_IRQHandler
+                0x00000000080023d4                TIM2_IRQHandler
+                0x00000000080023d4                DMA1_Channel2_3_IRQHandler
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  .text.LL_GPIO_SetPinMode
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  .text.LL_GPIO_SetPinOutputType
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  .text.LL_GPIO_SetPinSpeed
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  .text.LL_GPIO_SetPinPull
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  .text.LL_GPIO_SetAFPin_0_7
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  .text.LL_GPIO_SetAFPin_8_15
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  .text.LL_GPIO_Init
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  .text.LL_I2C_Enable
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  .text.LL_I2C_ConfigFilters
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  .text.LL_I2C_SetOwnAddress1
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  .text.LL_I2C_SetTiming
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  .text.LL_I2C_Init
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  .text.LL_RCC_HSI_IsReady
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  .text.LL_RCC_MSI_GetRange
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  .text.LL_RCC_GetSysClkSource
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  .text.LL_RCC_GetAHBPrescaler
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  .text.LL_RCC_GetAPB1Prescaler
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  .text.LL_RCC_GetUSARTClockSource
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  .text.LL_RCC_PLL_GetMainSource
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  .text.LL_RCC_PLL_GetDivider
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  .text.LL_RCC_IsActiveFlag_HSIDIV
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  .text.LL_RCC_GetUSARTClockFreq
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  .text.RCC_GetSystemClockFreq
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  .text.RCC_GetHCLKClockFreq
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  .text.RCC_GetPCLK1ClockFreq
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  .text.RCC_PLL_GetFreqDomain_SYS
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  .text.LL_TIM_SetPrescaler
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  .text.LL_TIM_SetAutoReload
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  .text.LL_TIM_GenerateEvent_UPDATE
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  .text.LL_TIM_Init
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  .text.LL_USART_IsEnabled
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  .text.LL_USART_SetStopBitsLength
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  .text.LL_USART_SetHWFlowCtrl
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  .text.LL_USART_SetBaudRate
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  .text.LL_USART_Init
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  .text.LL_InitTick
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  .text.LL_Init1msTick
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  .text.LL_mDelay
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  .text.LL_SetSystemCoreClock
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-                0x0000000008003bbc                _fini
- .fini          0x0000000008003bc0        0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o
-                0x0000000008003bc8                . = ALIGN (0x4)
-                0x0000000008003bc8                _etext = .
+ .fini          0x0000000008003f4c        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crti.o
+                0x0000000008003f4c                _fini
+ .fini          0x0000000008003f50        0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o
+                0x0000000008003f58                . = ALIGN (0x4)
+                0x0000000008003f58                _etext = .
 
-.vfp11_veneer   0x0000000008003bc8        0x0
- .vfp11_veneer  0x0000000008003bc8        0x0 linker stubs
+.vfp11_veneer   0x0000000008003f58        0x0
+ .vfp11_veneer  0x0000000008003f58        0x0 linker stubs
 
-.v4_bx          0x0000000008003bc8        0x0
- .v4_bx         0x0000000008003bc8        0x0 linker stubs
+.v4_bx          0x0000000008003f58        0x0
+ .v4_bx         0x0000000008003f58        0x0 linker stubs
 
-.iplt           0x0000000008003bc8        0x0
- .iplt          0x0000000008003bc8        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
+.iplt           0x0000000008003f58        0x0
+ .iplt          0x0000000008003f58        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
 
-.rodata         0x0000000008003bc8       0xf4
-                0x0000000008003bc8                . = ALIGN (0x4)
+.rodata         0x0000000008003f58      0x148
+                0x0000000008003f58                . = ALIGN (0x4)
  *(.rodata)
- .rodata        0x0000000008003bc8       0x41 ./Core/Src/main.o
+ .rodata        0x0000000008003f58       0x41 ./Core/Src/main.o
  *(.rodata*)
- *fill*         0x0000000008003c09        0x3 
+ *fill*         0x0000000008003f99        0x3 
  .rodata.config_baudrates
-                0x0000000008003c0c       0x28 ./Core/Src/config.o
-                0x0000000008003c0c                config_baudrates
+                0x0000000008003f9c       0x28 ./Core/Src/config.o
+                0x0000000008003f9c                config_baudrates
  .rodata.config_baudrates_length
-                0x0000000008003c34        0x1 ./Core/Src/config.o
-                0x0000000008003c34                config_baudrates_length
- *fill*         0x0000000008003c35        0x3 
- .rodata.modbus_process_read_write_request
-                0x0000000008003c38       0x60 ./Core/Src/modbus.o
+                0x0000000008003fc4        0x1 ./Core/Src/config.o
+                0x0000000008003fc4                config_baudrates_length
+ *fill*         0x0000000008003fc5        0x3 
+ .rodata.modbus_slave_callback
+                0x0000000008003fc8       0x54 ./Core/Src/main.o
  .rodata.AHBPrescTable
-                0x0000000008003c98       0x10 ./Core/Src/system_stm32l0xx.o
-                0x0000000008003c98                AHBPrescTable
+                0x000000000800401c       0x10 ./Core/Src/system_stm32l0xx.o
+                0x000000000800401c                AHBPrescTable
  .rodata.APBPrescTable
-                0x0000000008003ca8        0x8 ./Core/Src/system_stm32l0xx.o
-                0x0000000008003ca8                APBPrescTable
+                0x000000000800402c        0x8 ./Core/Src/system_stm32l0xx.o
+                0x000000000800402c                APBPrescTable
  .rodata.PLLMulTable
-                0x0000000008003cb0        0x9 ./Core/Src/system_stm32l0xx.o
-                0x0000000008003cb0                PLLMulTable
-                0x0000000008003cbc                . = ALIGN (0x4)
- *fill*         0x0000000008003cb9        0x3 
+                0x0000000008004034        0x9 ./Core/Src/system_stm32l0xx.o
+                0x0000000008004034                PLLMulTable
+ *fill*         0x000000000800403d        0x3 
+ .rodata.modbus_process_read_write_request
+                0x0000000008004040       0x60 ./Libs/modbus/modbus.o
+                0x00000000080040a0                . = ALIGN (0x4)
 
-.rel.dyn        0x0000000008003cbc        0x0
- .rel.iplt      0x0000000008003cbc        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
+.rel.dyn        0x00000000080040a0        0x0
+ .rel.iplt      0x00000000080040a0        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
 
-.ARM.extab      0x0000000008003cbc        0x0
-                0x0000000008003cbc                . = ALIGN (0x4)
+.ARM.extab      0x00000000080040a0        0x0
+                0x00000000080040a0                . = ALIGN (0x4)
  *(.ARM.extab* .gnu.linkonce.armextab.*)
-                0x0000000008003cbc                . = ALIGN (0x4)
+                0x00000000080040a0                . = ALIGN (0x4)
 
-.ARM            0x0000000008003cbc        0x0
-                0x0000000008003cbc                . = ALIGN (0x4)
-                0x0000000008003cbc                __exidx_start = .
+.ARM            0x00000000080040a0        0x0
+                0x00000000080040a0                . = ALIGN (0x4)
+                0x00000000080040a0                __exidx_start = .
  *(.ARM.exidx*)
-                0x0000000008003cbc                __exidx_end = .
-                0x0000000008003cbc                . = ALIGN (0x4)
+                0x00000000080040a0                __exidx_end = .
+                0x00000000080040a0                . = ALIGN (0x4)
 
-.preinit_array  0x0000000008003cbc        0x0
-                0x0000000008003cbc                . = ALIGN (0x4)
-                0x0000000008003cbc                PROVIDE (__preinit_array_start = .)
+.preinit_array  0x00000000080040a0        0x0
+                0x00000000080040a0                . = ALIGN (0x4)
+                0x00000000080040a0                PROVIDE (__preinit_array_start = .)
  *(.preinit_array*)
-                0x0000000008003cbc                PROVIDE (__preinit_array_end = .)
-                0x0000000008003cbc                . = ALIGN (0x4)
+                0x00000000080040a0                PROVIDE (__preinit_array_end = .)
+                0x00000000080040a0                . = ALIGN (0x4)
 
-.init_array     0x0000000008003cbc        0x4
-                0x0000000008003cbc                . = ALIGN (0x4)
-                0x0000000008003cbc                PROVIDE (__init_array_start = .)
+.init_array     0x00000000080040a0        0x4
+                0x00000000080040a0                . = ALIGN (0x4)
+                0x00000000080040a0                PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x0000000008003cbc        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
-                0x0000000008003cc0                PROVIDE (__init_array_end = .)
-                0x0000000008003cc0                . = ALIGN (0x4)
+ .init_array    0x00000000080040a0        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
+                0x00000000080040a4                PROVIDE (__init_array_end = .)
+                0x00000000080040a4                . = ALIGN (0x4)
 
-.fini_array     0x0000000008003cc0        0x4
-                0x0000000008003cc0                . = ALIGN (0x4)
+.fini_array     0x00000000080040a4        0x4
+                0x00000000080040a4                . = ALIGN (0x4)
                 [!provide]                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x0000000008003cc0        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
+ .fini_array    0x00000000080040a4        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x0000000008003cc4                . = ALIGN (0x4)
-                0x0000000008003cc4                _sidata = LOADADDR (.data)
+                0x00000000080040a8                . = ALIGN (0x4)
+                0x00000000080040a8                _sidata = LOADADDR (.data)
 
-.data           0x0000000020000000        0x8 load address 0x0000000008003cc4
+.data           0x0000000020000000        0x8 load address 0x00000000080040a8
                 0x0000000020000000                . = ALIGN (0x4)
                 0x0000000020000000                _sdata = .
  *(.data)
  *(.data*)
- .data.modbus_slave_address
-                0x0000000020000000        0x1 ./Core/Src/modbus.o
-                0x0000000020000000                modbus_slave_address
- *fill*         0x0000000020000001        0x3 
  .data.SystemCoreClock
-                0x0000000020000004        0x4 ./Core/Src/system_stm32l0xx.o
-                0x0000000020000004                SystemCoreClock
+                0x0000000020000000        0x4 ./Core/Src/system_stm32l0xx.o
+                0x0000000020000000                SystemCoreClock
+ .data.modbus_slave_address
+                0x0000000020000004        0x1 ./Libs/modbus/modbus.o
+                0x0000000020000004                modbus_slave_address
  *(.RamFunc)
  *(.RamFunc*)
                 0x0000000020000008                . = ALIGN (0x4)
+ *fill*         0x0000000020000005        0x3 
                 0x0000000020000008                _edata = .
 
-.igot.plt       0x0000000020000008        0x0 load address 0x0000000008003ccc
+.igot.plt       0x0000000020000008        0x0 load address 0x00000000080040b0
  .igot.plt      0x0000000020000008        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
                 0x0000000020000008                . = ALIGN (0x4)
 
-.bss            0x0000000020000008      0x17c load address 0x0000000008003ccc
+.bss            0x0000000020000008      0x174 load address 0x00000000080040b0
                 0x0000000020000008                _sbss = .
                 0x0000000020000008                __bss_start__ = _sbss
  *(.bss)
@@ -2135,61 +1997,62 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
  .bss.baudrate_changed
                 0x0000000020000029        0x1 ./Core/Src/main.o
                 0x0000000020000029                baudrate_changed
- .bss.modbus_address_changed
+ .bss.ltr329_config_changed
                 0x000000002000002a        0x1 ./Core/Src/main.o
-                0x000000002000002a                modbus_address_changed
- *fill*         0x000000002000002b        0x1 
- .bss.new_baud.8624
+                0x000000002000002a                ltr329_config_changed
+ .bss.modbus_address_changed
+                0x000000002000002b        0x1 ./Core/Src/main.o
+                0x000000002000002b                modbus_address_changed
+ .bss.new_baud.8665
                 0x000000002000002c        0x4 ./Core/Src/main.o
- .bss.modbus_device_id
-                0x0000000020000030        0x4 ./Core/Src/modbus.o
-                0x0000000020000030                modbus_device_id
  .bss.usart2_rx_message_index
-                0x0000000020000034        0x2 ./Core/Src/stm32l0xx_it.o
-                0x0000000020000034                usart2_rx_message_index
+                0x0000000020000030        0x2 ./Core/Src/stm32l0xx_it.o
+                0x0000000020000030                usart2_rx_message_index
  .bss.usart2_rx_message_len
-                0x0000000020000036        0x2 ./Core/Src/stm32l0xx_it.o
-                0x0000000020000036                usart2_rx_message_len
+                0x0000000020000032        0x2 ./Core/Src/stm32l0xx_it.o
+                0x0000000020000032                usart2_rx_message_len
  .bss.usart2_rx_done
-                0x0000000020000038        0x1 ./Core/Src/stm32l0xx_it.o
-                0x0000000020000038                usart2_rx_done
+                0x0000000020000034        0x1 ./Core/Src/stm32l0xx_it.o
+                0x0000000020000034                usart2_rx_done
  .bss.usart2_rx_message_too_long
-                0x0000000020000039        0x1 ./Core/Src/stm32l0xx_it.o
-                0x0000000020000039                usart2_rx_message_too_long
+                0x0000000020000035        0x1 ./Core/Src/stm32l0xx_it.o
+                0x0000000020000035                usart2_rx_message_too_long
  .bss.tim21_elapsed_period
-                0x000000002000003a        0x1 ./Core/Src/stm32l0xx_it.o
-                0x000000002000003a                tim21_elapsed_period
+                0x0000000020000036        0x1 ./Core/Src/stm32l0xx_it.o
+                0x0000000020000036                tim21_elapsed_period
+ *fill*         0x0000000020000037        0x1 
+ .bss.modbus_device_id
+                0x0000000020000038        0x4 ./Libs/modbus/modbus.o
+                0x0000000020000038                modbus_device_id
  *(COMMON)
- *fill*         0x000000002000003b        0x1 
- COMMON         0x000000002000003c       0x46 ./Core/Src/main.o
+ COMMON         0x000000002000003c       0x3e ./Core/Src/main.o
                 0x000000002000003c                T_SHT4x
                 0x000000002000003e                light_ch1
                 0x0000000020000040                data_registers_numbers
                 0x0000000020000044                device_id
-                0x0000000020000064                identification_registers_numbers
-                0x0000000020000066                config_registers_numbers
+                0x0000000020000064                config_registers_numbers
                 0x0000000020000068                sensor_config
-                0x000000002000007c                TF_SHT4x
-                0x000000002000007e                light_ch0
-                0x0000000020000080                RH_SHT4x
- *fill*         0x0000000020000082        0x2 
- COMMON         0x0000000020000084      0x100 ./Core/Src/modbus.o
-                0x0000000020000084                modbus_buffer
-                0x0000000020000184                . = ALIGN (0x4)
-                0x0000000020000184                _ebss = .
-                0x0000000020000184                __bss_end__ = _ebss
+                0x0000000020000074                TF_SHT4x
+                0x0000000020000076                light_ch0
+                0x0000000020000078                RH_SHT4x
+ *fill*         0x000000002000007a        0x2 
+ COMMON         0x000000002000007c      0x100 ./Libs/modbus/modbus.o
+                0x000000002000007c                modbus_buffer
+                0x000000002000017c                . = ALIGN (0x4)
+                0x000000002000017c                _ebss = .
+                0x000000002000017c                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x0000000020000184      0x604 load address 0x0000000008003ccc
-                0x0000000020000188                . = ALIGN (0x8)
- *fill*         0x0000000020000184        0x4 
+                0x000000002000017c      0x604 load address 0x00000000080040b0
+                0x0000000020000180                . = ALIGN (0x8)
+ *fill*         0x000000002000017c        0x4 
                 [!provide]                        PROVIDE (end = .)
-                0x0000000020000188                PROVIDE (_end = .)
-                0x0000000020000388                . = (. + _Min_Heap_Size)
- *fill*         0x0000000020000188      0x200 
-                0x0000000020000788                . = (. + _Min_Stack_Size)
- *fill*         0x0000000020000388      0x400 
-                0x0000000020000788                . = ALIGN (0x8)
+                0x0000000020000180                PROVIDE (_end = .)
+                0x0000000020000380                . = (. + _Min_Heap_Size)
+ *fill*         0x0000000020000180      0x200 
+                0x0000000020000780                . = (. + _Min_Stack_Size)
+ *fill*         0x0000000020000380      0x400 
+                0x0000000020000780                . = ALIGN (0x8)
 
 /DISCARD/
  libc.a(*)
@@ -2206,35 +2069,35 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
  .ARM.attributes
                 0x000000000000004a       0x2c ./Core/Src/config.o
  .ARM.attributes
-                0x0000000000000076       0x2c ./Core/Src/crc8.o
+                0x0000000000000076       0x2c ./Core/Src/i2c.o
  .ARM.attributes
-                0x00000000000000a2       0x2c ./Core/Src/i2c.o
+                0x00000000000000a2       0x2c ./Core/Src/main.o
  .ARM.attributes
-                0x00000000000000ce       0x2c ./Core/Src/ltr329.o
+                0x00000000000000ce       0x2c ./Core/Src/stm32l0xx_it.o
  .ARM.attributes
-                0x00000000000000fa       0x2c ./Core/Src/main.o
+                0x00000000000000fa       0x2c ./Core/Src/system_stm32l0xx.o
  .ARM.attributes
-                0x0000000000000126       0x2c ./Core/Src/modbus.o
+                0x0000000000000126       0x22 ./Core/Startup/startup_stm32l031g6ux.o
  .ARM.attributes
-                0x0000000000000152       0x2c ./Core/Src/sht4x.o
+                0x0000000000000148       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
  .ARM.attributes
-                0x000000000000017e       0x2c ./Core/Src/stm32l0xx_it.o
+                0x0000000000000174       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
  .ARM.attributes
-                0x00000000000001aa       0x2c ./Core/Src/system_stm32l0xx.o
+                0x00000000000001a0       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
  .ARM.attributes
-                0x00000000000001d6       0x22 ./Core/Startup/startup_stm32l031g6ux.o
+                0x00000000000001cc       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
  .ARM.attributes
-                0x00000000000001f8       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+                0x00000000000001f8       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
  .ARM.attributes
-                0x0000000000000224       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+                0x0000000000000224       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
  .ARM.attributes
-                0x0000000000000250       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+                0x0000000000000250       0x2c ./Libs/crc8/crc8.o
  .ARM.attributes
-                0x000000000000027c       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
+                0x000000000000027c       0x2c ./Libs/ltr329/ltr329.o
  .ARM.attributes
-                0x00000000000002a8       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
+                0x00000000000002a8       0x2c ./Libs/modbus/modbus.o
  .ARM.attributes
-                0x00000000000002d4       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+                0x00000000000002d4       0x2c ./Libs/sht4x/sht4x.o
  .ARM.attributes
                 0x0000000000000300       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o)
  .ARM.attributes
@@ -2257,233 +2120,228 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
 LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libm.a
 LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a
 
-.debug_info     0x0000000000000000     0xa894
- .debug_info    0x0000000000000000      0x4ac ./Core/Src/config.o
- .debug_info    0x00000000000004ac      0x111 ./Core/Src/crc8.o
- .debug_info    0x00000000000005bd      0x4aa ./Core/Src/i2c.o
- .debug_info    0x0000000000000a67     0x10b3 ./Core/Src/ltr329.o
- .debug_info    0x0000000000001b1a     0x2b31 ./Core/Src/main.o
- .debug_info    0x000000000000464b     0x1136 ./Core/Src/modbus.o
- .debug_info    0x0000000000005781      0xd73 ./Core/Src/sht4x.o
- .debug_info    0x00000000000064f4      0xfb7 ./Core/Src/stm32l0xx_it.o
- .debug_info    0x00000000000074ab      0x302 ./Core/Src/system_stm32l0xx.o
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+ .debug_macro   0x000000000000b56e       0x34 ./Core/Src/main.o
+ .debug_macro   0x000000000000b5a2       0x10 ./Core/Src/main.o
+ .debug_macro   0x000000000000b5b2       0x58 ./Core/Src/main.o
+ .debug_macro   0x000000000000b60a       0x71 ./Core/Src/main.o
+ .debug_macro   0x000000000000b67b       0x1c ./Core/Src/main.o
+ .debug_macro   0x000000000000b697      0x12a ./Core/Src/main.o
+ .debug_macro   0x000000000000b7c1      0x333 ./Core/Src/main.o
+ .debug_macro   0x000000000000baf4       0x10 ./Core/Src/main.o
+ .debug_macro   0x000000000000bb04       0x35 ./Core/Src/main.o
+ .debug_macro   0x000000000000bb39       0x20 ./Core/Src/main.o
+ .debug_macro   0x000000000000bb59       0xa7 ./Core/Src/main.o
+ .debug_macro   0x000000000000bc00      0x130 ./Core/Src/main.o
+ .debug_macro   0x000000000000bd30       0x40 ./Core/Src/main.o
+ .debug_macro   0x000000000000bd70      0x26c ./Core/Src/stm32l0xx_it.o
+ .debug_macro   0x000000000000bfdc       0xba ./Core/Src/system_stm32l0xx.o
+ .debug_macro   0x000000000000c096       0xfc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_macro   0x000000000000c192      0x127 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_macro   0x000000000000c2b9       0xfc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_macro   0x000000000000c3b5       0xe7 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_macro   0x000000000000c49c      0x3ae ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_macro   0x000000000000c84a      0x11a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
+ .debug_macro   0x000000000000c964      0x577 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
+ .debug_macro   0x000000000000cedb      0x129 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
+ .debug_macro   0x000000000000d004      0x2f1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
+ .debug_macro   0x000000000000d2f5      0x162 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+ .debug_macro   0x000000000000d457       0x72 ./Libs/crc8/crc8.o
+ .debug_macro   0x000000000000d4c9       0x10 ./Libs/crc8/crc8.o
+ .debug_macro   0x000000000000d4d9       0xea ./Libs/ltr329/ltr329.o
+ .debug_macro   0x000000000000d5c3      0x157 ./Libs/modbus/modbus.o
+ .debug_macro   0x000000000000d71a       0x72 ./Libs/sht4x/sht4x.o
+ .debug_macro   0x000000000000d78c       0x1c ./Libs/sht4x/sht4x.o
 
-.debug_line     0x0000000000000000     0x7bf1
- .debug_line    0x0000000000000000      0x65a ./Core/Src/config.o
- .debug_line    0x000000000000065a      0x39a ./Core/Src/crc8.o
- .debug_line    0x00000000000009f4      0x62c ./Core/Src/i2c.o
- .debug_line    0x0000000000001020      0x8e4 ./Core/Src/ltr329.o
- .debug_line    0x0000000000001904     0x145d ./Core/Src/main.o
- .debug_line    0x0000000000002d61      0xa27 ./Core/Src/modbus.o
- .debug_line    0x0000000000003788      0x7dd ./Core/Src/sht4x.o
- .debug_line    0x0000000000003f65      0x937 ./Core/Src/stm32l0xx_it.o
- .debug_line    0x000000000000489c      0x4ce ./Core/Src/system_stm32l0xx.o
- .debug_line    0x0000000000004d6a       0x89 ./Core/Startup/startup_stm32l031g6ux.o
- .debug_line    0x0000000000004df3      0x5f5 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_line    0x00000000000053e8      0x5e8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_line    0x00000000000059d0      0xa0e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_line    0x00000000000063de      0x8d9 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
- .debug_line    0x0000000000006cb7      0x649 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
- .debug_line    0x0000000000007300      0x8f1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+.debug_line     0x0000000000000000     0x79e5
+ .debug_line    0x0000000000000000      0x69d ./Core/Src/config.o
+ .debug_line    0x000000000000069d      0x62c ./Core/Src/i2c.o
+ .debug_line    0x0000000000000cc9     0x178d ./Core/Src/main.o
+ .debug_line    0x0000000000002456      0xa28 ./Core/Src/stm32l0xx_it.o
+ .debug_line    0x0000000000002e7e      0x4ce ./Core/Src/system_stm32l0xx.o
+ .debug_line    0x000000000000334c       0x89 ./Core/Startup/startup_stm32l031g6ux.o
+ .debug_line    0x00000000000033d5      0x5f5 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_line    0x00000000000039ca      0x5e8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_line    0x0000000000003fb2      0xa0e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_line    0x00000000000049c0      0x8d9 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
+ .debug_line    0x0000000000005299      0x649 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
+ .debug_line    0x00000000000058e2      0x8f1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+ .debug_line    0x00000000000061d3      0x38f ./Libs/crc8/crc8.o
+ .debug_line    0x0000000000006562      0x644 ./Libs/ltr329/ltr329.o
+ .debug_line    0x0000000000006ba6      0xa30 ./Libs/modbus/modbus.o
+ .debug_line    0x00000000000075d6      0x40f ./Libs/sht4x/sht4x.o
 
-.debug_str      0x0000000000000000    0x44c4f
- .debug_str     0x0000000000000000    0x32338 ./Core/Src/config.o
-                                      0x32554 (size before relaxing)
- .debug_str     0x0000000000032338       0x7e ./Core/Src/crc8.o
-                                       0x3d6a (size before relaxing)
- .debug_str     0x00000000000323b6     0x2280 ./Core/Src/i2c.o
+.debug_str      0x0000000000000000    0x44d2a
+ .debug_str     0x0000000000000000    0x33679 ./Core/Src/config.o
+                                      0x33894 (size before relaxing)
+ .debug_str     0x0000000000033679     0x124c ./Core/Src/i2c.o
                                       0x33e09 (size before relaxing)
- .debug_str     0x0000000000034636     0xbb73 ./Core/Src/ltr329.o
-                                      0x401cf (size before relaxing)
- .debug_str     0x00000000000401a9     0x12cf ./Core/Src/main.o
-                                      0x413d0 (size before relaxing)
- .debug_str     0x0000000000041478      0x30e ./Core/Src/modbus.o
-                                       0x7ef1 (size before relaxing)
- .debug_str     0x0000000000041786      0x1b8 ./Core/Src/sht4x.o
-                                      0x3fe54 (size before relaxing)
- .debug_str     0x000000000004193e      0x175 ./Core/Src/stm32l0xx_it.o
-                                      0x3fe5b (size before relaxing)
- .debug_str     0x0000000000041ab3       0x61 ./Core/Src/system_stm32l0xx.o
+ .debug_str     0x00000000000348c5     0xc96b ./Core/Src/main.o
+                                      0x414fd (size before relaxing)
+ .debug_str     0x0000000000041230      0x175 ./Core/Src/stm32l0xx_it.o
+                                      0x3fe14 (size before relaxing)
+ .debug_str     0x00000000000413a5       0x61 ./Core/Src/system_stm32l0xx.o
                                       0x31c42 (size before relaxing)
- .debug_str     0x0000000000041b14       0x36 ./Core/Startup/startup_stm32l031g6ux.o
+ .debug_str     0x0000000000041406       0x36 ./Core/Startup/startup_stm32l031g6ux.o
                                          0x84 (size before relaxing)
- .debug_str     0x0000000000041b4a      0x586 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_str     0x000000000004143c      0x586 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
                                       0x32dbc (size before relaxing)
- .debug_str     0x00000000000420d0      0x3ed ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_str     0x00000000000419c2      0x3ed ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
                                       0x33507 (size before relaxing)
- .debug_str     0x00000000000424bd      0x511 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_str     0x0000000000041daf      0x511 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
                                       0x33a57 (size before relaxing)
- .debug_str     0x00000000000429ce      0xdf1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
+ .debug_str     0x00000000000422c0      0xdf1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
                                       0x35bfb (size before relaxing)
- .debug_str     0x00000000000437bf      0x7dd ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
+ .debug_str     0x00000000000430b1      0x7dd ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
                                       0x35310 (size before relaxing)
- .debug_str     0x0000000000043f9c      0xcb3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+ .debug_str     0x000000000004388e      0xcb3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
                                       0x35184 (size before relaxing)
+ .debug_str     0x0000000000044541       0x70 ./Libs/crc8/crc8.o
+                                       0x3d6b (size before relaxing)
+ .debug_str     0x00000000000445b1      0x2ae ./Libs/ltr329/ltr329.o
+                                      0x331de (size before relaxing)
+ .debug_str     0x000000000004485f      0x311 ./Libs/modbus/modbus.o
+                                       0x7ef4 (size before relaxing)
+ .debug_str     0x0000000000044b70      0x1ba ./Libs/sht4x/sht4x.o
+                                       0x3f32 (size before relaxing)
 
 .comment        0x0000000000000000       0x53
  .comment       0x0000000000000000       0x53 ./Core/Src/config.o
                                          0x54 (size before relaxing)
- .comment       0x0000000000000053       0x54 ./Core/Src/crc8.o
  .comment       0x0000000000000053       0x54 ./Core/Src/i2c.o
- .comment       0x0000000000000053       0x54 ./Core/Src/ltr329.o
  .comment       0x0000000000000053       0x54 ./Core/Src/main.o
- .comment       0x0000000000000053       0x54 ./Core/Src/modbus.o
- .comment       0x0000000000000053       0x54 ./Core/Src/sht4x.o
  .comment       0x0000000000000053       0x54 ./Core/Src/stm32l0xx_it.o
  .comment       0x0000000000000053       0x54 ./Core/Src/system_stm32l0xx.o
  .comment       0x0000000000000053       0x54 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
@@ -2492,25 +2350,29 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
  .comment       0x0000000000000053       0x54 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
  .comment       0x0000000000000053       0x54 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
  .comment       0x0000000000000053       0x54 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+ .comment       0x0000000000000053       0x54 ./Libs/crc8/crc8.o
+ .comment       0x0000000000000053       0x54 ./Libs/ltr329/ltr329.o
+ .comment       0x0000000000000053       0x54 ./Libs/modbus/modbus.o
+ .comment       0x0000000000000053       0x54 ./Libs/sht4x/sht4x.o
 
-.debug_frame    0x0000000000000000     0x20e4
+.debug_frame    0x0000000000000000     0x2214
  .debug_frame   0x0000000000000000       0xf0 ./Core/Src/config.o
- .debug_frame   0x00000000000000f0       0x30 ./Core/Src/crc8.o
- .debug_frame   0x0000000000000120      0x170 ./Core/Src/i2c.o
- .debug_frame   0x0000000000000290      0x120 ./Core/Src/ltr329.o
- .debug_frame   0x00000000000003b0      0x8d8 ./Core/Src/main.o
- .debug_frame   0x0000000000000c88      0x120 ./Core/Src/modbus.o
- .debug_frame   0x0000000000000da8       0x74 ./Core/Src/sht4x.o
- .debug_frame   0x0000000000000e1c      0x1d4 ./Core/Src/stm32l0xx_it.o
- .debug_frame   0x0000000000000ff0       0x4c ./Core/Src/system_stm32l0xx.o
- .debug_frame   0x000000000000103c      0x170 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_frame   0x00000000000011ac      0x1d0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_frame   0x000000000000137c      0x42c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_frame   0x00000000000017a8      0x3b0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
- .debug_frame   0x0000000000001b58      0x190 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
- .debug_frame   0x0000000000001ce8      0x344 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
- .debug_frame   0x000000000000202c       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o)
- .debug_frame   0x0000000000002058       0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o)
- .debug_frame   0x0000000000002078       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-strncpy.o)
- .debug_frame   0x00000000000020a4       0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o)
- .debug_frame   0x00000000000020c4       0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o)
+ .debug_frame   0x00000000000000f0      0x170 ./Core/Src/i2c.o
+ .debug_frame   0x0000000000000260      0xa08 ./Core/Src/main.o
+ .debug_frame   0x0000000000000c68      0x1d4 ./Core/Src/stm32l0xx_it.o
+ .debug_frame   0x0000000000000e3c       0x4c ./Core/Src/system_stm32l0xx.o
+ .debug_frame   0x0000000000000e88      0x170 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_frame   0x0000000000000ff8      0x1d0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_frame   0x00000000000011c8      0x42c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_frame   0x00000000000015f4      0x3b0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o
+ .debug_frame   0x00000000000019a4      0x190 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.o
+ .debug_frame   0x0000000000001b34      0x344 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+ .debug_frame   0x0000000000001e78       0x30 ./Libs/crc8/crc8.o
+ .debug_frame   0x0000000000001ea8      0x120 ./Libs/ltr329/ltr329.o
+ .debug_frame   0x0000000000001fc8      0x120 ./Libs/modbus/modbus.o
+ .debug_frame   0x00000000000020e8       0x74 ./Libs/sht4x/sht4x.o
+ .debug_frame   0x000000000000215c       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o)
+ .debug_frame   0x0000000000002188       0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o)
+ .debug_frame   0x00000000000021a8       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-strncpy.o)
+ .debug_frame   0x00000000000021d4       0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o)
+ .debug_frame   0x00000000000021f4       0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o)
diff --git a/fw/Debug/sources.mk b/fw/Debug/sources.mk
index a511ac3..c5499f9 100644
--- a/fw/Debug/sources.mk
+++ b/fw/Debug/sources.mk
@@ -23,4 +23,8 @@ SUBDIRS := \
 Core/Src \
 Core/Startup \
 Drivers/STM32L0xx_HAL_Driver/Src \
+Libs/crc8 \
+Libs/ltr329 \
+Libs/modbus \
+Libs/sht4x \
 
diff --git a/fw/rht_wired_sensor Debug (1).launch b/fw/rht_wired_sensor Debug (1).launch
index c78824d..53a5afd 100644
--- a/fw/rht_wired_sensor Debug (1).launch	
+++ b/fw/rht_wired_sensor Debug (1).launch	
@@ -28,7 +28,7 @@
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_shared_stlink" value="false"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader" value=""/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader_init" value="false"/>
-    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="0"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="21000"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.halt_all_on_reset" value="false"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="/home/david/VelesLabs/Smart Household/wired_sensors/RHT_Wired_Sensor/fw/Debug/st-link_gdbserver_log.txt"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="enable"/>