diff --git a/fw_old/Core/Src/main.c b/fw_old/Core/Src/main.c index 23f6270..99cd483 100644 --- a/fw_old/Core/Src/main.c +++ b/fw_old/Core/Src/main.c @@ -659,6 +659,8 @@ int8_t uart_disable_interrupts(void) int8_t uart_enable_interrupts(void) { LL_LPUART_Enable(LPUART1); + LL_LPUART_ClearFlag_IDLE(LPUART1); + LL_LPUART_ClearFlag_NE(LPUART1); LL_LPUART_EnableIT_IDLE(LPUART1); LL_LPUART_EnableIT_RXNE(LPUART1); diff --git a/fw_old/Core/Src/scd4x.c b/fw_old/Core/Src/scd4x.c index a38a4f9..57ea366 100644 --- a/fw_old/Core/Src/scd4x.c +++ b/fw_old/Core/Src/scd4x.c @@ -66,6 +66,8 @@ int8_t scd4x_read_measurement(uint16_t * co2, int16_t *temperature, uint16_t *re }*/ + // disable interrupts to prevent MODBUS/I2C conflict + uart_disable_interrupts(); // start measurement buffer[0] = SCD4X_READ_MEASUREMENT >> 8; buffer[1] = SCD4X_READ_MEASUREMENT & 0x00ff; @@ -80,6 +82,7 @@ int8_t scd4x_read_measurement(uint16_t * co2, int16_t *temperature, uint16_t *re uart_disable_interrupts(); // read out result = i2c_receive(SCD4X_I2C_ADDRESS<<1, buffer, 9); + uart_enable_interrupts(); if (result != I2C_OK) { return SCD4X_ERROR; diff --git a/fw_old/Core/Src/sht4x.c b/fw_old/Core/Src/sht4x.c index 53a27ff..70ce26f 100644 --- a/fw_old/Core/Src/sht4x.c +++ b/fw_old/Core/Src/sht4x.c @@ -23,6 +23,8 @@ int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity) uint8_t buffer[32]; int result; + // disable interrupts + uart_disable_interrupts(); // start measurement buffer[0] = SHT4X_START_MEAS_HIGH_PRECISION; result = i2c_transmit(SHT4X_I2C_ADDRESS<<1, buffer, 1); @@ -31,11 +33,14 @@ int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity) if (result != I2C_OK) { return SHT4X_ERROR; }*/ + // enable interrupts while waiting uart_enable_interrupts(); LL_mDelay(10); // 10 ms should be enough uart_disable_interrupts(); // read out result = i2c_receive(SHT4X_I2C_ADDRESS<<1, buffer, 6); + // enable interrupts again + uart_enable_interrupts(); if (result != I2C_OK) { return SHT4X_ERROR; } diff --git a/fw_old/Debug/Core/Src/main.o b/fw_old/Debug/Core/Src/main.o index ff7a973..8366dd1 100644 Binary files a/fw_old/Debug/Core/Src/main.o and b/fw_old/Debug/Core/Src/main.o differ diff --git a/fw_old/Debug/Core/Src/main.su b/fw_old/Debug/Core/Src/main.su index a096d40..b35863e 100644 --- a/fw_old/Debug/Core/Src/main.su +++ b/fw_old/Debug/Core/Src/main.su @@ -17,6 +17,8 @@ stm32l0xx_ll_lpuart.h:1233:22:LL_LPUART_SetDEAssertionTime 16 static stm32l0xx_ll_lpuart.h:1255:22:LL_LPUART_EnableDEMode 16 static stm32l0xx_ll_lpuart.h:1291:22:LL_LPUART_SetDESignalPolarity 16 static stm32l0xx_ll_lpuart.h:1400:26:LL_LPUART_IsActiveFlag_TXE 16 static +stm32l0xx_ll_lpuart.h:1533:22:LL_LPUART_ClearFlag_NE 16 static +stm32l0xx_ll_lpuart.h:1555:22:LL_LPUART_ClearFlag_IDLE 16 static stm32l0xx_ll_lpuart.h:1619:22:LL_LPUART_EnableIT_IDLE 16 static stm32l0xx_ll_lpuart.h:1631:22:LL_LPUART_EnableIT_RXNE 16 static stm32l0xx_ll_lpuart.h:1726:22:LL_LPUART_DisableIT_IDLE 16 static @@ -58,6 +60,6 @@ main.c:596:13:MX_GPIO_Init 32 static main.c:639:6:LPUART1_TX_Buffer 24 static,ignoring_inline_asm main.c:650:8:uart_disable_interrupts 8 static main.c:659:8:uart_enable_interrupts 8 static -main.c:668:8:modbus_slave_callback 32 static -main.c:787:8:modbus_transmit_function 16 static -main.c:799:6:Error_Handler 8 static,ignoring_inline_asm +main.c:670:8:modbus_slave_callback 32 static +main.c:789:8:modbus_transmit_function 16 static +main.c:801:6:Error_Handler 8 static,ignoring_inline_asm diff --git a/fw_old/Debug/Core/Src/scd4x.o b/fw_old/Debug/Core/Src/scd4x.o index 3dbe5dd..109eac2 100644 Binary files a/fw_old/Debug/Core/Src/scd4x.o and b/fw_old/Debug/Core/Src/scd4x.o differ diff --git a/fw_old/Debug/Core/Src/sht4x.o b/fw_old/Debug/Core/Src/sht4x.o index 558c6a3..d7afdd3 100644 Binary files a/fw_old/Debug/Core/Src/sht4x.o and b/fw_old/Debug/Core/Src/sht4x.o differ diff --git a/fw_old/Debug/iaq_wired_sensor.bin b/fw_old/Debug/iaq_wired_sensor.bin index 1d637bb..6dbc3de 100755 Binary files a/fw_old/Debug/iaq_wired_sensor.bin and b/fw_old/Debug/iaq_wired_sensor.bin differ diff --git a/fw_old/Debug/iaq_wired_sensor.elf b/fw_old/Debug/iaq_wired_sensor.elf index cfaabc5..ff5fbb5 100755 Binary files a/fw_old/Debug/iaq_wired_sensor.elf and b/fw_old/Debug/iaq_wired_sensor.elf differ diff --git a/fw_old/Debug/iaq_wired_sensor.list b/fw_old/Debug/iaq_wired_sensor.list index bf7a5a4..3b4e800 100644 --- a/fw_old/Debug/iaq_wired_sensor.list +++ b/fw_old/Debug/iaq_wired_sensor.list @@ -5,45 +5,45 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000c0 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00003578 080000c0 080000c0 000100c0 2**2 + 1 .text 000035c4 080000c0 080000c0 000100c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 0000010c 08003638 08003638 00013638 2**2 + 2 .rodata 0000010c 08003684 08003684 00013684 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08003744 08003744 00020008 2**0 + 3 .ARM.extab 00000000 08003790 08003790 00020008 2**0 CONTENTS - 4 .ARM 00000008 08003744 08003744 00013744 2**2 + 4 .ARM 00000008 08003790 08003790 00013790 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 0800374c 0800374c 00020008 2**0 + 5 .preinit_array 00000000 08003798 08003798 00020008 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 0800374c 0800374c 0001374c 2**2 + 6 .init_array 00000004 08003798 08003798 00013798 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 08003750 08003750 00013750 2**2 + 7 .fini_array 00000004 0800379c 0800379c 0001379c 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 00000008 20000000 08003754 00020000 2**2 + 8 .data 00000008 20000000 080037a0 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000174 20000008 0800375c 00020008 2**2 + 9 .bss 00000174 20000008 080037a8 00020008 2**2 ALLOC - 10 ._user_heap_stack 00000604 2000017c 0800375c 0002017c 2**0 + 10 ._user_heap_stack 00000604 2000017c 080037a8 0002017c 2**0 ALLOC 11 .ARM.attributes 00000028 00000000 00000000 00020008 2**0 CONTENTS, READONLY - 12 .debug_info 00007101 00000000 00000000 00020030 2**0 + 12 .debug_info 00007151 00000000 00000000 00020030 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00001a58 00000000 00000000 00027131 2**0 + 13 .debug_abbrev 00001a58 00000000 00000000 00027181 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00000948 00000000 00000000 00028b90 2**3 + 14 .debug_aranges 00000958 00000000 00000000 00028be0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_ranges 00000850 00000000 00000000 000294d8 2**3 + 15 .debug_ranges 00000860 00000000 00000000 00029538 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0000c631 00000000 00000000 00029d28 2**0 + 16 .debug_macro 0000c631 00000000 00000000 00029d98 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 000072e4 00000000 00000000 00036359 2**0 + 17 .debug_line 00007326 00000000 00000000 000363c9 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 0003eada 00000000 00000000 0003d63d 2**0 + 18 .debug_str 0003eaf1 00000000 00000000 0003d6ef 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000053 00000000 00000000 0007c117 2**0 + 19 .comment 00000053 00000000 00000000 0007c1e0 2**0 CONTENTS, READONLY - 20 .debug_frame 00001fbc 00000000 00000000 0007c16c 2**2 + 20 .debug_frame 00001ffc 00000000 00000000 0007c234 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -65,7 +65,7 @@ Disassembly of section .text: 80000da: bd10 pop {r4, pc} 80000dc: 20000008 .word 0x20000008 80000e0: 00000000 .word 0x00000000 - 80000e4: 08003620 .word 0x08003620 + 80000e4: 0800366c .word 0x0800366c 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc ) @@ -80,7 +80,7 @@ Disassembly of section .text: 80000fa: 46c0 nop ; (mov r8, r8) 80000fc: 00000000 .word 0x00000000 8000100: 2000000c .word 0x2000000c - 8000104: 08003620 .word 0x08003620 + 8000104: 0800366c .word 0x0800366c 08000108 <__udivsi3>: 8000108: 2200 movs r2, #0 @@ -2256,336 +2256,348 @@ __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx) 8000e2a: b002 add sp, #8 8000e2c: bd80 pop {r7, pc} -08000e2e : +08000e2e : + * @rmtoll ICR NCF LL_LPUART_ClearFlag_NE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx) +{ + 8000e2e: b580 push {r7, lr} + 8000e30: b082 sub sp, #8 + 8000e32: af00 add r7, sp, #0 + 8000e34: 6078 str r0, [r7, #4] + WRITE_REG(LPUARTx->ICR, USART_ICR_NCF); + 8000e36: 687b ldr r3, [r7, #4] + 8000e38: 2204 movs r2, #4 + 8000e3a: 621a str r2, [r3, #32] +} + 8000e3c: 46c0 nop ; (mov r8, r8) + 8000e3e: 46bd mov sp, r7 + 8000e40: b002 add sp, #8 + 8000e42: bd80 pop {r7, pc} + +08000e44 : + * @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE + * @param LPUARTx LPUART Instance + * @retval None + */ +__STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx) +{ + 8000e44: b580 push {r7, lr} + 8000e46: b082 sub sp, #8 + 8000e48: af00 add r7, sp, #0 + 8000e4a: 6078 str r0, [r7, #4] + WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF); + 8000e4c: 687b ldr r3, [r7, #4] + 8000e4e: 2210 movs r2, #16 + 8000e50: 621a str r2, [r3, #32] +} + 8000e52: 46c0 nop ; (mov r8, r8) + 8000e54: 46bd mov sp, r7 + 8000e56: b002 add sp, #8 + 8000e58: bd80 pop {r7, pc} + +08000e5a : * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE * @param LPUARTx LPUART Instance * @retval None */ __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx) { - 8000e2e: b580 push {r7, lr} - 8000e30: b082 sub sp, #8 - 8000e32: af00 add r7, sp, #0 - 8000e34: 6078 str r0, [r7, #4] + 8000e5a: b580 push {r7, lr} + 8000e5c: b082 sub sp, #8 + 8000e5e: af00 add r7, sp, #0 + 8000e60: 6078 str r0, [r7, #4] SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); - 8000e36: 687b ldr r3, [r7, #4] - 8000e38: 681b ldr r3, [r3, #0] - 8000e3a: 2210 movs r2, #16 - 8000e3c: 431a orrs r2, r3 - 8000e3e: 687b ldr r3, [r7, #4] - 8000e40: 601a str r2, [r3, #0] + 8000e62: 687b ldr r3, [r7, #4] + 8000e64: 681b ldr r3, [r3, #0] + 8000e66: 2210 movs r2, #16 + 8000e68: 431a orrs r2, r3 + 8000e6a: 687b ldr r3, [r7, #4] + 8000e6c: 601a str r2, [r3, #0] } - 8000e42: 46c0 nop ; (mov r8, r8) - 8000e44: 46bd mov sp, r7 - 8000e46: b002 add sp, #8 - 8000e48: bd80 pop {r7, pc} + 8000e6e: 46c0 nop ; (mov r8, r8) + 8000e70: 46bd mov sp, r7 + 8000e72: b002 add sp, #8 + 8000e74: bd80 pop {r7, pc} -08000e4a : +08000e76 : * @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE * @param LPUARTx LPUART Instance * @retval None */ __STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx) { - 8000e4a: b580 push {r7, lr} - 8000e4c: b082 sub sp, #8 - 8000e4e: af00 add r7, sp, #0 - 8000e50: 6078 str r0, [r7, #4] + 8000e76: b580 push {r7, lr} + 8000e78: b082 sub sp, #8 + 8000e7a: af00 add r7, sp, #0 + 8000e7c: 6078 str r0, [r7, #4] SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE); - 8000e52: 687b ldr r3, [r7, #4] - 8000e54: 681b ldr r3, [r3, #0] - 8000e56: 2220 movs r2, #32 - 8000e58: 431a orrs r2, r3 - 8000e5a: 687b ldr r3, [r7, #4] - 8000e5c: 601a str r2, [r3, #0] + 8000e7e: 687b ldr r3, [r7, #4] + 8000e80: 681b ldr r3, [r3, #0] + 8000e82: 2220 movs r2, #32 + 8000e84: 431a orrs r2, r3 + 8000e86: 687b ldr r3, [r7, #4] + 8000e88: 601a str r2, [r3, #0] } - 8000e5e: 46c0 nop ; (mov r8, r8) - 8000e60: 46bd mov sp, r7 - 8000e62: b002 add sp, #8 - 8000e64: bd80 pop {r7, pc} + 8000e8a: 46c0 nop ; (mov r8, r8) + 8000e8c: 46bd mov sp, r7 + 8000e8e: b002 add sp, #8 + 8000e90: bd80 pop {r7, pc} -08000e66 : +08000e92 : * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE * @param LPUARTx LPUART Instance * @retval None */ __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx) { - 8000e66: b580 push {r7, lr} - 8000e68: b082 sub sp, #8 - 8000e6a: af00 add r7, sp, #0 - 8000e6c: 6078 str r0, [r7, #4] + 8000e92: b580 push {r7, lr} + 8000e94: b082 sub sp, #8 + 8000e96: af00 add r7, sp, #0 + 8000e98: 6078 str r0, [r7, #4] CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); - 8000e6e: 687b ldr r3, [r7, #4] - 8000e70: 681b ldr r3, [r3, #0] - 8000e72: 2210 movs r2, #16 - 8000e74: 4393 bics r3, r2 - 8000e76: 001a movs r2, r3 - 8000e78: 687b ldr r3, [r7, #4] - 8000e7a: 601a str r2, [r3, #0] + 8000e9a: 687b ldr r3, [r7, #4] + 8000e9c: 681b ldr r3, [r3, #0] + 8000e9e: 2210 movs r2, #16 + 8000ea0: 4393 bics r3, r2 + 8000ea2: 001a movs r2, r3 + 8000ea4: 687b ldr r3, [r7, #4] + 8000ea6: 601a str r2, [r3, #0] } - 8000e7c: 46c0 nop ; (mov r8, r8) - 8000e7e: 46bd mov sp, r7 - 8000e80: b002 add sp, #8 - 8000e82: bd80 pop {r7, pc} + 8000ea8: 46c0 nop ; (mov r8, r8) + 8000eaa: 46bd mov sp, r7 + 8000eac: b002 add sp, #8 + 8000eae: bd80 pop {r7, pc} -08000e84 : +08000eb0 : * @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE * @param LPUARTx LPUART Instance * @retval None */ __STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx) { - 8000e84: b580 push {r7, lr} - 8000e86: b082 sub sp, #8 - 8000e88: af00 add r7, sp, #0 - 8000e8a: 6078 str r0, [r7, #4] + 8000eb0: b580 push {r7, lr} + 8000eb2: b082 sub sp, #8 + 8000eb4: af00 add r7, sp, #0 + 8000eb6: 6078 str r0, [r7, #4] CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE); - 8000e8c: 687b ldr r3, [r7, #4] - 8000e8e: 681b ldr r3, [r3, #0] - 8000e90: 2220 movs r2, #32 - 8000e92: 4393 bics r3, r2 - 8000e94: 001a movs r2, r3 - 8000e96: 687b ldr r3, [r7, #4] - 8000e98: 601a str r2, [r3, #0] + 8000eb8: 687b ldr r3, [r7, #4] + 8000eba: 681b ldr r3, [r3, #0] + 8000ebc: 2220 movs r2, #32 + 8000ebe: 4393 bics r3, r2 + 8000ec0: 001a movs r2, r3 + 8000ec2: 687b ldr r3, [r7, #4] + 8000ec4: 601a str r2, [r3, #0] } - 8000e9a: 46c0 nop ; (mov r8, r8) - 8000e9c: 46bd mov sp, r7 - 8000e9e: b002 add sp, #8 - 8000ea0: bd80 pop {r7, pc} + 8000ec6: 46c0 nop ; (mov r8, r8) + 8000ec8: 46bd mov sp, r7 + 8000eca: b002 add sp, #8 + 8000ecc: bd80 pop {r7, pc} -08000ea2 : +08000ece : * @param LPUARTx LPUART Instance * @param Value between Min_Data=0x00 and Max_Data=0x1FF * @retval None */ __STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value) { - 8000ea2: b580 push {r7, lr} - 8000ea4: b082 sub sp, #8 - 8000ea6: af00 add r7, sp, #0 - 8000ea8: 6078 str r0, [r7, #4] - 8000eaa: 000a movs r2, r1 - 8000eac: 1cbb adds r3, r7, #2 - 8000eae: 801a strh r2, [r3, #0] + 8000ece: b580 push {r7, lr} + 8000ed0: b082 sub sp, #8 + 8000ed2: af00 add r7, sp, #0 + 8000ed4: 6078 str r0, [r7, #4] + 8000ed6: 000a movs r2, r1 + 8000ed8: 1cbb adds r3, r7, #2 + 8000eda: 801a strh r2, [r3, #0] LPUARTx->TDR = Value & 0x1FFUL; - 8000eb0: 1cbb adds r3, r7, #2 - 8000eb2: 881b ldrh r3, [r3, #0] - 8000eb4: 05db lsls r3, r3, #23 - 8000eb6: 0dda lsrs r2, r3, #23 - 8000eb8: 687b ldr r3, [r7, #4] - 8000eba: 629a str r2, [r3, #40] ; 0x28 + 8000edc: 1cbb adds r3, r7, #2 + 8000ede: 881b ldrh r3, [r3, #0] + 8000ee0: 05db lsls r3, r3, #23 + 8000ee2: 0dda lsrs r2, r3, #23 + 8000ee4: 687b ldr r3, [r7, #4] + 8000ee6: 629a str r2, [r3, #40] ; 0x28 } - 8000ebc: 46c0 nop ; (mov r8, r8) - 8000ebe: 46bd mov sp, r7 - 8000ec0: b002 add sp, #8 - 8000ec2: bd80 pop {r7, pc} + 8000ee8: 46c0 nop ; (mov r8, r8) + 8000eea: 46bd mov sp, r7 + 8000eec: b002 add sp, #8 + 8000eee: bd80 pop {r7, pc} -08000ec4 : +08000ef0 : * @brief Enable HSI oscillator * @rmtoll CR HSION LL_RCC_HSI_Enable * @retval None */ __STATIC_INLINE void LL_RCC_HSI_Enable(void) { - 8000ec4: b580 push {r7, lr} - 8000ec6: af00 add r7, sp, #0 + 8000ef0: b580 push {r7, lr} + 8000ef2: af00 add r7, sp, #0 SET_BIT(RCC->CR, RCC_CR_HSION); - 8000ec8: 4b04 ldr r3, [pc, #16] ; (8000edc ) - 8000eca: 681a ldr r2, [r3, #0] - 8000ecc: 4b03 ldr r3, [pc, #12] ; (8000edc ) - 8000ece: 2101 movs r1, #1 - 8000ed0: 430a orrs r2, r1 - 8000ed2: 601a str r2, [r3, #0] + 8000ef4: 4b04 ldr r3, [pc, #16] ; (8000f08 ) + 8000ef6: 681a ldr r2, [r3, #0] + 8000ef8: 4b03 ldr r3, [pc, #12] ; (8000f08 ) + 8000efa: 2101 movs r1, #1 + 8000efc: 430a orrs r2, r1 + 8000efe: 601a str r2, [r3, #0] } - 8000ed4: 46c0 nop ; (mov r8, r8) - 8000ed6: 46bd mov sp, r7 - 8000ed8: bd80 pop {r7, pc} - 8000eda: 46c0 nop ; (mov r8, r8) - 8000edc: 40021000 .word 0x40021000 + 8000f00: 46c0 nop ; (mov r8, r8) + 8000f02: 46bd mov sp, r7 + 8000f04: bd80 pop {r7, pc} + 8000f06: 46c0 nop ; (mov r8, r8) + 8000f08: 40021000 .word 0x40021000 -08000ee0 : +08000f0c : * @brief Check if HSI clock is ready * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady * @retval State of bit (1 or 0). */ __STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void) { - 8000ee0: b580 push {r7, lr} - 8000ee2: af00 add r7, sp, #0 + 8000f0c: b580 push {r7, lr} + 8000f0e: af00 add r7, sp, #0 return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RCC_CR_HSIRDY) ? 1UL : 0UL); - 8000ee4: 4b05 ldr r3, [pc, #20] ; (8000efc ) - 8000ee6: 681b ldr r3, [r3, #0] - 8000ee8: 2204 movs r2, #4 - 8000eea: 4013 ands r3, r2 - 8000eec: 2b04 cmp r3, #4 - 8000eee: d101 bne.n 8000ef4 - 8000ef0: 2301 movs r3, #1 - 8000ef2: e000 b.n 8000ef6 - 8000ef4: 2300 movs r3, #0 + 8000f10: 4b05 ldr r3, [pc, #20] ; (8000f28 ) + 8000f12: 681b ldr r3, [r3, #0] + 8000f14: 2204 movs r2, #4 + 8000f16: 4013 ands r3, r2 + 8000f18: 2b04 cmp r3, #4 + 8000f1a: d101 bne.n 8000f20 + 8000f1c: 2301 movs r3, #1 + 8000f1e: e000 b.n 8000f22 + 8000f20: 2300 movs r3, #0 } - 8000ef6: 0018 movs r0, r3 - 8000ef8: 46bd mov sp, r7 - 8000efa: bd80 pop {r7, pc} - 8000efc: 40021000 .word 0x40021000 + 8000f22: 0018 movs r0, r3 + 8000f24: 46bd mov sp, r7 + 8000f26: bd80 pop {r7, pc} + 8000f28: 40021000 .word 0x40021000 -08000f00 : +08000f2c : * @rmtoll ICSCR HSITRIM LL_RCC_HSI_SetCalibTrimming * @param Value between Min_Data = 0x00 and Max_Data = 0x1F * @retval None */ __STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value) { - 8000f00: b580 push {r7, lr} - 8000f02: b082 sub sp, #8 - 8000f04: af00 add r7, sp, #0 - 8000f06: 6078 str r0, [r7, #4] + 8000f2c: b580 push {r7, lr} + 8000f2e: b082 sub sp, #8 + 8000f30: af00 add r7, sp, #0 + 8000f32: 6078 str r0, [r7, #4] MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, Value << RCC_ICSCR_HSITRIM_Pos); - 8000f08: 4b06 ldr r3, [pc, #24] ; (8000f24 ) - 8000f0a: 685b ldr r3, [r3, #4] - 8000f0c: 4a06 ldr r2, [pc, #24] ; (8000f28 ) - 8000f0e: 4013 ands r3, r2 - 8000f10: 0019 movs r1, r3 - 8000f12: 687b ldr r3, [r7, #4] - 8000f14: 021a lsls r2, r3, #8 - 8000f16: 4b03 ldr r3, [pc, #12] ; (8000f24 ) - 8000f18: 430a orrs r2, r1 - 8000f1a: 605a str r2, [r3, #4] + 8000f34: 4b06 ldr r3, [pc, #24] ; (8000f50 ) + 8000f36: 685b ldr r3, [r3, #4] + 8000f38: 4a06 ldr r2, [pc, #24] ; (8000f54 ) + 8000f3a: 4013 ands r3, r2 + 8000f3c: 0019 movs r1, r3 + 8000f3e: 687b ldr r3, [r7, #4] + 8000f40: 021a lsls r2, r3, #8 + 8000f42: 4b03 ldr r3, [pc, #12] ; (8000f50 ) + 8000f44: 430a orrs r2, r1 + 8000f46: 605a str r2, [r3, #4] } - 8000f1c: 46c0 nop ; (mov r8, r8) - 8000f1e: 46bd mov sp, r7 - 8000f20: b002 add sp, #8 - 8000f22: bd80 pop {r7, pc} - 8000f24: 40021000 .word 0x40021000 - 8000f28: ffffe0ff .word 0xffffe0ff + 8000f48: 46c0 nop ; (mov r8, r8) + 8000f4a: 46bd mov sp, r7 + 8000f4c: b002 add sp, #8 + 8000f4e: bd80 pop {r7, pc} + 8000f50: 40021000 .word 0x40021000 + 8000f54: ffffe0ff .word 0xffffe0ff -08000f2c : +08000f58 : * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL * @retval None */ __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source) { - 8000f2c: b580 push {r7, lr} - 8000f2e: b082 sub sp, #8 - 8000f30: af00 add r7, sp, #0 - 8000f32: 6078 str r0, [r7, #4] + 8000f58: b580 push {r7, lr} + 8000f5a: b082 sub sp, #8 + 8000f5c: af00 add r7, sp, #0 + 8000f5e: 6078 str r0, [r7, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source); - 8000f34: 4b06 ldr r3, [pc, #24] ; (8000f50 ) - 8000f36: 68db ldr r3, [r3, #12] - 8000f38: 2203 movs r2, #3 - 8000f3a: 4393 bics r3, r2 - 8000f3c: 0019 movs r1, r3 - 8000f3e: 4b04 ldr r3, [pc, #16] ; (8000f50 ) - 8000f40: 687a ldr r2, [r7, #4] - 8000f42: 430a orrs r2, r1 - 8000f44: 60da str r2, [r3, #12] + 8000f60: 4b06 ldr r3, [pc, #24] ; (8000f7c ) + 8000f62: 68db ldr r3, [r3, #12] + 8000f64: 2203 movs r2, #3 + 8000f66: 4393 bics r3, r2 + 8000f68: 0019 movs r1, r3 + 8000f6a: 4b04 ldr r3, [pc, #16] ; (8000f7c ) + 8000f6c: 687a ldr r2, [r7, #4] + 8000f6e: 430a orrs r2, r1 + 8000f70: 60da str r2, [r3, #12] } - 8000f46: 46c0 nop ; (mov r8, r8) - 8000f48: 46bd mov sp, r7 - 8000f4a: b002 add sp, #8 - 8000f4c: bd80 pop {r7, pc} - 8000f4e: 46c0 nop ; (mov r8, r8) - 8000f50: 40021000 .word 0x40021000 + 8000f72: 46c0 nop ; (mov r8, r8) + 8000f74: 46bd mov sp, r7 + 8000f76: b002 add sp, #8 + 8000f78: bd80 pop {r7, pc} + 8000f7a: 46c0 nop ; (mov r8, r8) + 8000f7c: 40021000 .word 0x40021000 -08000f54 : +08000f80 : * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL */ __STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void) { - 8000f54: b580 push {r7, lr} - 8000f56: af00 add r7, sp, #0 + 8000f80: b580 push {r7, lr} + 8000f82: af00 add r7, sp, #0 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); - 8000f58: 4b03 ldr r3, [pc, #12] ; (8000f68 ) - 8000f5a: 68db ldr r3, [r3, #12] - 8000f5c: 220c movs r2, #12 - 8000f5e: 4013 ands r3, r2 + 8000f84: 4b03 ldr r3, [pc, #12] ; (8000f94 ) + 8000f86: 68db ldr r3, [r3, #12] + 8000f88: 220c movs r2, #12 + 8000f8a: 4013 ands r3, r2 } - 8000f60: 0018 movs r0, r3 - 8000f62: 46bd mov sp, r7 - 8000f64: bd80 pop {r7, pc} - 8000f66: 46c0 nop ; (mov r8, r8) - 8000f68: 40021000 .word 0x40021000 + 8000f8c: 0018 movs r0, r3 + 8000f8e: 46bd mov sp, r7 + 8000f90: bd80 pop {r7, pc} + 8000f92: 46c0 nop ; (mov r8, r8) + 8000f94: 40021000 .word 0x40021000 -08000f6c : +08000f98 : * @arg @ref LL_RCC_SYSCLK_DIV_256 * @arg @ref LL_RCC_SYSCLK_DIV_512 * @retval None */ __STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler) { - 8000f6c: b580 push {r7, lr} - 8000f6e: b082 sub sp, #8 - 8000f70: af00 add r7, sp, #0 - 8000f72: 6078 str r0, [r7, #4] + 8000f98: b580 push {r7, lr} + 8000f9a: b082 sub sp, #8 + 8000f9c: af00 add r7, sp, #0 + 8000f9e: 6078 str r0, [r7, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); - 8000f74: 4b06 ldr r3, [pc, #24] ; (8000f90 ) - 8000f76: 68db ldr r3, [r3, #12] - 8000f78: 22f0 movs r2, #240 ; 0xf0 - 8000f7a: 4393 bics r3, r2 - 8000f7c: 0019 movs r1, r3 - 8000f7e: 4b04 ldr r3, [pc, #16] ; (8000f90 ) - 8000f80: 687a ldr r2, [r7, #4] - 8000f82: 430a orrs r2, r1 - 8000f84: 60da str r2, [r3, #12] + 8000fa0: 4b06 ldr r3, [pc, #24] ; (8000fbc ) + 8000fa2: 68db ldr r3, [r3, #12] + 8000fa4: 22f0 movs r2, #240 ; 0xf0 + 8000fa6: 4393 bics r3, r2 + 8000fa8: 0019 movs r1, r3 + 8000faa: 4b04 ldr r3, [pc, #16] ; (8000fbc ) + 8000fac: 687a ldr r2, [r7, #4] + 8000fae: 430a orrs r2, r1 + 8000fb0: 60da str r2, [r3, #12] } - 8000f86: 46c0 nop ; (mov r8, r8) - 8000f88: 46bd mov sp, r7 - 8000f8a: b002 add sp, #8 - 8000f8c: bd80 pop {r7, pc} - 8000f8e: 46c0 nop ; (mov r8, r8) - 8000f90: 40021000 .word 0x40021000 + 8000fb2: 46c0 nop ; (mov r8, r8) + 8000fb4: 46bd mov sp, r7 + 8000fb6: b002 add sp, #8 + 8000fb8: bd80 pop {r7, pc} + 8000fba: 46c0 nop ; (mov r8, r8) + 8000fbc: 40021000 .word 0x40021000 -08000f94 : +08000fc0 : * @arg @ref LL_RCC_APB1_DIV_8 * @arg @ref LL_RCC_APB1_DIV_16 * @retval None */ __STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler) -{ - 8000f94: b580 push {r7, lr} - 8000f96: b082 sub sp, #8 - 8000f98: af00 add r7, sp, #0 - 8000f9a: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); - 8000f9c: 4b06 ldr r3, [pc, #24] ; (8000fb8 ) - 8000f9e: 68db ldr r3, [r3, #12] - 8000fa0: 4a06 ldr r2, [pc, #24] ; (8000fbc ) - 8000fa2: 4013 ands r3, r2 - 8000fa4: 0019 movs r1, r3 - 8000fa6: 4b04 ldr r3, [pc, #16] ; (8000fb8 ) - 8000fa8: 687a ldr r2, [r7, #4] - 8000faa: 430a orrs r2, r1 - 8000fac: 60da str r2, [r3, #12] -} - 8000fae: 46c0 nop ; (mov r8, r8) - 8000fb0: 46bd mov sp, r7 - 8000fb2: b002 add sp, #8 - 8000fb4: bd80 pop {r7, pc} - 8000fb6: 46c0 nop ; (mov r8, r8) - 8000fb8: 40021000 .word 0x40021000 - 8000fbc: fffff8ff .word 0xfffff8ff - -08000fc0 : - * @arg @ref LL_RCC_APB2_DIV_8 - * @arg @ref LL_RCC_APB2_DIV_16 - * @retval None - */ -__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler) { 8000fc0: b580 push {r7, lr} 8000fc2: b082 sub sp, #8 8000fc4: af00 add r7, sp, #0 8000fc6: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler); - 8000fc8: 4b06 ldr r3, [pc, #24] ; (8000fe4 ) + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); + 8000fc8: 4b06 ldr r3, [pc, #24] ; (8000fe4 ) 8000fca: 68db ldr r3, [r3, #12] - 8000fcc: 4a06 ldr r2, [pc, #24] ; (8000fe8 ) + 8000fcc: 4a06 ldr r2, [pc, #24] ; (8000fe8 ) 8000fce: 4013 ands r3, r2 8000fd0: 0019 movs r1, r3 - 8000fd2: 4b04 ldr r3, [pc, #16] ; (8000fe4 ) + 8000fd2: 4b04 ldr r3, [pc, #16] ; (8000fe4 ) 8000fd4: 687a ldr r2, [r7, #4] 8000fd6: 430a orrs r2, r1 8000fd8: 60da str r2, [r3, #12] @@ -2596,29 +2608,29 @@ __STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler) 8000fe0: bd80 pop {r7, pc} 8000fe2: 46c0 nop ; (mov r8, r8) 8000fe4: 40021000 .word 0x40021000 - 8000fe8: ffffc7ff .word 0xffffc7ff + 8000fe8: fffff8ff .word 0xfffff8ff -08000fec : - * @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI - * @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE +08000fec : + * @arg @ref LL_RCC_APB2_DIV_8 + * @arg @ref LL_RCC_APB2_DIV_16 * @retval None */ -__STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource) +__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler) { 8000fec: b580 push {r7, lr} 8000fee: b082 sub sp, #8 8000ff0: af00 add r7, sp, #0 8000ff2: 6078 str r0, [r7, #4] - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource); - 8000ff4: 4b06 ldr r3, [pc, #24] ; (8001010 ) - 8000ff6: 6cdb ldr r3, [r3, #76] ; 0x4c - 8000ff8: 4a06 ldr r2, [pc, #24] ; (8001014 ) + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler); + 8000ff4: 4b06 ldr r3, [pc, #24] ; (8001010 ) + 8000ff6: 68db ldr r3, [r3, #12] + 8000ff8: 4a06 ldr r2, [pc, #24] ; (8001014 ) 8000ffa: 4013 ands r3, r2 8000ffc: 0019 movs r1, r3 - 8000ffe: 4b04 ldr r3, [pc, #16] ; (8001010 ) + 8000ffe: 4b04 ldr r3, [pc, #16] ; (8001010 ) 8001000: 687a ldr r2, [r7, #4] 8001002: 430a orrs r2, r1 - 8001004: 64da str r2, [r3, #76] ; 0x4c + 8001004: 60da str r2, [r3, #12] } 8001006: 46c0 nop ; (mov r8, r8) 8001008: 46bd mov sp, r7 @@ -2626,191 +2638,186 @@ __STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource) 800100c: bd80 pop {r7, pc} 800100e: 46c0 nop ; (mov r8, r8) 8001010: 40021000 .word 0x40021000 - 8001014: fffff3ff .word 0xfffff3ff + 8001014: ffffc7ff .word 0xffffc7ff -08001018 : +08001018 : + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI + * @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE + * @retval None + */ +__STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource) +{ + 8001018: b580 push {r7, lr} + 800101a: b082 sub sp, #8 + 800101c: af00 add r7, sp, #0 + 800101e: 6078 str r0, [r7, #4] + MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource); + 8001020: 4b06 ldr r3, [pc, #24] ; (800103c ) + 8001022: 6cdb ldr r3, [r3, #76] ; 0x4c + 8001024: 4a06 ldr r2, [pc, #24] ; (8001040 ) + 8001026: 4013 ands r3, r2 + 8001028: 0019 movs r1, r3 + 800102a: 4b04 ldr r3, [pc, #16] ; (800103c ) + 800102c: 687a ldr r2, [r7, #4] + 800102e: 430a orrs r2, r1 + 8001030: 64da str r2, [r3, #76] ; 0x4c +} + 8001032: 46c0 nop ; (mov r8, r8) + 8001034: 46bd mov sp, r7 + 8001036: b002 add sp, #8 + 8001038: bd80 pop {r7, pc} + 800103a: 46c0 nop ; (mov r8, r8) + 800103c: 40021000 .word 0x40021000 + 8001040: fffff3ff .word 0xfffff3ff + +08001044 : * * (*) value not defined in all devices. * @retval None */ __STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource) { - 8001018: b580 push {r7, lr} - 800101a: b082 sub sp, #8 - 800101c: af00 add r7, sp, #0 - 800101e: 6078 str r0, [r7, #4] + 8001044: b580 push {r7, lr} + 8001046: b082 sub sp, #8 + 8001048: af00 add r7, sp, #0 + 800104a: 6078 str r0, [r7, #4] MODIFY_REG(RCC->CCIPR, ((I2CxSource >> 4U) & 0x000FF000U), ((I2CxSource << 4U) & 0x000FF000U)); - 8001020: 4b0a ldr r3, [pc, #40] ; (800104c ) - 8001022: 6cdb ldr r3, [r3, #76] ; 0x4c - 8001024: 687a ldr r2, [r7, #4] - 8001026: 0911 lsrs r1, r2, #4 - 8001028: 22ff movs r2, #255 ; 0xff - 800102a: 0312 lsls r2, r2, #12 - 800102c: 400a ands r2, r1 - 800102e: 43d2 mvns r2, r2 - 8001030: 401a ands r2, r3 - 8001032: 0011 movs r1, r2 - 8001034: 687b ldr r3, [r7, #4] - 8001036: 011a lsls r2, r3, #4 - 8001038: 23ff movs r3, #255 ; 0xff - 800103a: 031b lsls r3, r3, #12 - 800103c: 401a ands r2, r3 - 800103e: 4b03 ldr r3, [pc, #12] ; (800104c ) - 8001040: 430a orrs r2, r1 - 8001042: 64da str r2, [r3, #76] ; 0x4c + 800104c: 4b0a ldr r3, [pc, #40] ; (8001078 ) + 800104e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8001050: 687a ldr r2, [r7, #4] + 8001052: 0911 lsrs r1, r2, #4 + 8001054: 22ff movs r2, #255 ; 0xff + 8001056: 0312 lsls r2, r2, #12 + 8001058: 400a ands r2, r1 + 800105a: 43d2 mvns r2, r2 + 800105c: 401a ands r2, r3 + 800105e: 0011 movs r1, r2 + 8001060: 687b ldr r3, [r7, #4] + 8001062: 011a lsls r2, r3, #4 + 8001064: 23ff movs r3, #255 ; 0xff + 8001066: 031b lsls r3, r3, #12 + 8001068: 401a ands r2, r3 + 800106a: 4b03 ldr r3, [pc, #12] ; (8001078 ) + 800106c: 430a orrs r2, r1 + 800106e: 64da str r2, [r3, #76] ; 0x4c } - 8001044: 46c0 nop ; (mov r8, r8) - 8001046: 46bd mov sp, r7 - 8001048: b002 add sp, #8 - 800104a: bd80 pop {r7, pc} - 800104c: 40021000 .word 0x40021000 + 8001070: 46c0 nop ; (mov r8, r8) + 8001072: 46bd mov sp, r7 + 8001074: b002 add sp, #8 + 8001076: bd80 pop {r7, pc} + 8001078: 40021000 .word 0x40021000 -08001050 : +0800107c : * @brief Enable PLL * @rmtoll CR PLLON LL_RCC_PLL_Enable * @retval None */ __STATIC_INLINE void LL_RCC_PLL_Enable(void) { - 8001050: b580 push {r7, lr} - 8001052: af00 add r7, sp, #0 + 800107c: b580 push {r7, lr} + 800107e: af00 add r7, sp, #0 SET_BIT(RCC->CR, RCC_CR_PLLON); - 8001054: 4b04 ldr r3, [pc, #16] ; (8001068 ) - 8001056: 681a ldr r2, [r3, #0] - 8001058: 4b03 ldr r3, [pc, #12] ; (8001068 ) - 800105a: 2180 movs r1, #128 ; 0x80 - 800105c: 0449 lsls r1, r1, #17 - 800105e: 430a orrs r2, r1 - 8001060: 601a str r2, [r3, #0] + 8001080: 4b04 ldr r3, [pc, #16] ; (8001094 ) + 8001082: 681a ldr r2, [r3, #0] + 8001084: 4b03 ldr r3, [pc, #12] ; (8001094 ) + 8001086: 2180 movs r1, #128 ; 0x80 + 8001088: 0449 lsls r1, r1, #17 + 800108a: 430a orrs r2, r1 + 800108c: 601a str r2, [r3, #0] } - 8001062: 46c0 nop ; (mov r8, r8) - 8001064: 46bd mov sp, r7 - 8001066: bd80 pop {r7, pc} - 8001068: 40021000 .word 0x40021000 + 800108e: 46c0 nop ; (mov r8, r8) + 8001090: 46bd mov sp, r7 + 8001092: bd80 pop {r7, pc} + 8001094: 40021000 .word 0x40021000 -0800106c : +08001098 : * @brief Check if PLL Ready * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady * @retval State of bit (1 or 0). */ __STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void) { - 800106c: b580 push {r7, lr} - 800106e: af00 add r7, sp, #0 + 8001098: b580 push {r7, lr} + 800109a: af00 add r7, sp, #0 return ((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RCC_CR_PLLRDY) ? 1UL : 0UL); - 8001070: 4b07 ldr r3, [pc, #28] ; (8001090 ) - 8001072: 681a ldr r2, [r3, #0] - 8001074: 2380 movs r3, #128 ; 0x80 - 8001076: 049b lsls r3, r3, #18 - 8001078: 401a ands r2, r3 - 800107a: 2380 movs r3, #128 ; 0x80 - 800107c: 049b lsls r3, r3, #18 - 800107e: 429a cmp r2, r3 - 8001080: d101 bne.n 8001086 - 8001082: 2301 movs r3, #1 - 8001084: e000 b.n 8001088 - 8001086: 2300 movs r3, #0 + 800109c: 4b07 ldr r3, [pc, #28] ; (80010bc ) + 800109e: 681a ldr r2, [r3, #0] + 80010a0: 2380 movs r3, #128 ; 0x80 + 80010a2: 049b lsls r3, r3, #18 + 80010a4: 401a ands r2, r3 + 80010a6: 2380 movs r3, #128 ; 0x80 + 80010a8: 049b lsls r3, r3, #18 + 80010aa: 429a cmp r2, r3 + 80010ac: d101 bne.n 80010b2 + 80010ae: 2301 movs r3, #1 + 80010b0: e000 b.n 80010b4 + 80010b2: 2300 movs r3, #0 } - 8001088: 0018 movs r0, r3 - 800108a: 46bd mov sp, r7 - 800108c: bd80 pop {r7, pc} - 800108e: 46c0 nop ; (mov r8, r8) - 8001090: 40021000 .word 0x40021000 + 80010b4: 0018 movs r0, r3 + 80010b6: 46bd mov sp, r7 + 80010b8: bd80 pop {r7, pc} + 80010ba: 46c0 nop ; (mov r8, r8) + 80010bc: 40021000 .word 0x40021000 -08001094 : +080010c0 : * @arg @ref LL_RCC_PLL_DIV_3 * @arg @ref LL_RCC_PLL_DIV_4 * @retval None */ __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLMul, uint32_t PLLDiv) { - 8001094: b580 push {r7, lr} - 8001096: b084 sub sp, #16 - 8001098: af00 add r7, sp, #0 - 800109a: 60f8 str r0, [r7, #12] - 800109c: 60b9 str r1, [r7, #8] - 800109e: 607a str r2, [r7, #4] + 80010c0: b580 push {r7, lr} + 80010c2: b084 sub sp, #16 + 80010c4: af00 add r7, sp, #0 + 80010c6: 60f8 str r0, [r7, #12] + 80010c8: 60b9 str r1, [r7, #8] + 80010ca: 607a str r2, [r7, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV, Source | PLLMul | PLLDiv); - 80010a0: 4b08 ldr r3, [pc, #32] ; (80010c4 ) - 80010a2: 68db ldr r3, [r3, #12] - 80010a4: 4a08 ldr r2, [pc, #32] ; (80010c8 ) - 80010a6: 4013 ands r3, r2 - 80010a8: 0019 movs r1, r3 - 80010aa: 68fa ldr r2, [r7, #12] - 80010ac: 68bb ldr r3, [r7, #8] - 80010ae: 431a orrs r2, r3 - 80010b0: 687b ldr r3, [r7, #4] - 80010b2: 431a orrs r2, r3 - 80010b4: 4b03 ldr r3, [pc, #12] ; (80010c4 ) - 80010b6: 430a orrs r2, r1 - 80010b8: 60da str r2, [r3, #12] + 80010cc: 4b08 ldr r3, [pc, #32] ; (80010f0 ) + 80010ce: 68db ldr r3, [r3, #12] + 80010d0: 4a08 ldr r2, [pc, #32] ; (80010f4 ) + 80010d2: 4013 ands r3, r2 + 80010d4: 0019 movs r1, r3 + 80010d6: 68fa ldr r2, [r7, #12] + 80010d8: 68bb ldr r3, [r7, #8] + 80010da: 431a orrs r2, r3 + 80010dc: 687b ldr r3, [r7, #4] + 80010de: 431a orrs r2, r3 + 80010e0: 4b03 ldr r3, [pc, #12] ; (80010f0 ) + 80010e2: 430a orrs r2, r1 + 80010e4: 60da str r2, [r3, #12] } - 80010ba: 46c0 nop ; (mov r8, r8) - 80010bc: 46bd mov sp, r7 - 80010be: b004 add sp, #16 - 80010c0: bd80 pop {r7, pc} - 80010c2: 46c0 nop ; (mov r8, r8) - 80010c4: 40021000 .word 0x40021000 - 80010c8: ff02ffff .word 0xff02ffff + 80010e6: 46c0 nop ; (mov r8, r8) + 80010e8: 46bd mov sp, r7 + 80010ea: b004 add sp, #16 + 80010ec: bd80 pop {r7, pc} + 80010ee: 46c0 nop ; (mov r8, r8) + 80010f0: 40021000 .word 0x40021000 + 80010f4: ff02ffff .word 0xff02ffff -080010cc : +080010f8 : * * (*) value not defined in all devices. * @retval None */ __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) -{ - 80010cc: b580 push {r7, lr} - 80010ce: b084 sub sp, #16 - 80010d0: af00 add r7, sp, #0 - 80010d2: 6078 str r0, [r7, #4] - __IO uint32_t tmpreg; - SET_BIT(RCC->APB1ENR, Periphs); - 80010d4: 4b07 ldr r3, [pc, #28] ; (80010f4 ) - 80010d6: 6b99 ldr r1, [r3, #56] ; 0x38 - 80010d8: 4b06 ldr r3, [pc, #24] ; (80010f4 ) - 80010da: 687a ldr r2, [r7, #4] - 80010dc: 430a orrs r2, r1 - 80010de: 639a str r2, [r3, #56] ; 0x38 - /* Delay after an RCC peripheral clock enabling */ - tmpreg = READ_BIT(RCC->APB1ENR, Periphs); - 80010e0: 4b04 ldr r3, [pc, #16] ; (80010f4 ) - 80010e2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80010e4: 687a ldr r2, [r7, #4] - 80010e6: 4013 ands r3, r2 - 80010e8: 60fb str r3, [r7, #12] - (void)tmpreg; - 80010ea: 68fb ldr r3, [r7, #12] -} - 80010ec: 46c0 nop ; (mov r8, r8) - 80010ee: 46bd mov sp, r7 - 80010f0: b004 add sp, #16 - 80010f2: bd80 pop {r7, pc} - 80010f4: 40021000 .word 0x40021000 - -080010f8 : - * - * (*) value not defined in all devices. - * @retval None -*/ -__STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) { 80010f8: b580 push {r7, lr} 80010fa: b084 sub sp, #16 80010fc: af00 add r7, sp, #0 80010fe: 6078 str r0, [r7, #4] __IO uint32_t tmpreg; - SET_BIT(RCC->APB2ENR, Periphs); - 8001100: 4b07 ldr r3, [pc, #28] ; (8001120 ) - 8001102: 6b59 ldr r1, [r3, #52] ; 0x34 - 8001104: 4b06 ldr r3, [pc, #24] ; (8001120 ) + SET_BIT(RCC->APB1ENR, Periphs); + 8001100: 4b07 ldr r3, [pc, #28] ; (8001120 ) + 8001102: 6b99 ldr r1, [r3, #56] ; 0x38 + 8001104: 4b06 ldr r3, [pc, #24] ; (8001120 ) 8001106: 687a ldr r2, [r7, #4] 8001108: 430a orrs r2, r1 - 800110a: 635a str r2, [r3, #52] ; 0x34 + 800110a: 639a str r2, [r3, #56] ; 0x38 /* Delay after an RCC peripheral clock enabling */ - tmpreg = READ_BIT(RCC->APB2ENR, Periphs); - 800110c: 4b04 ldr r3, [pc, #16] ; (8001120 ) - 800110e: 6b5b ldr r3, [r3, #52] ; 0x34 + tmpreg = READ_BIT(RCC->APB1ENR, Periphs); + 800110c: 4b04 ldr r3, [pc, #16] ; (8001120 ) + 800110e: 6b9b ldr r3, [r3, #56] ; 0x38 8001110: 687a ldr r2, [r7, #4] 8001112: 4013 ands r3, r2 8001114: 60fb str r3, [r7, #12] @@ -2823,29 +2830,29 @@ __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) 800111e: bd80 pop {r7, pc} 8001120: 40021000 .word 0x40021000 -08001124 : +08001124 : * * (*) value not defined in all devices. * @retval None */ -__STATIC_INLINE void LL_IOP_GRP1_EnableClock(uint32_t Periphs) +__STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) { 8001124: b580 push {r7, lr} 8001126: b084 sub sp, #16 8001128: af00 add r7, sp, #0 800112a: 6078 str r0, [r7, #4] __IO uint32_t tmpreg; - SET_BIT(RCC->IOPENR, Periphs); - 800112c: 4b07 ldr r3, [pc, #28] ; (800114c ) - 800112e: 6ad9 ldr r1, [r3, #44] ; 0x2c - 8001130: 4b06 ldr r3, [pc, #24] ; (800114c ) + SET_BIT(RCC->APB2ENR, Periphs); + 800112c: 4b07 ldr r3, [pc, #28] ; (800114c ) + 800112e: 6b59 ldr r1, [r3, #52] ; 0x34 + 8001130: 4b06 ldr r3, [pc, #24] ; (800114c ) 8001132: 687a ldr r2, [r7, #4] 8001134: 430a orrs r2, r1 - 8001136: 62da str r2, [r3, #44] ; 0x2c + 8001136: 635a str r2, [r3, #52] ; 0x34 /* Delay after an RCC peripheral clock enabling */ - tmpreg = READ_BIT(RCC->IOPENR, Periphs); - 8001138: 4b04 ldr r3, [pc, #16] ; (800114c ) - 800113a: 6adb ldr r3, [r3, #44] ; 0x2c + tmpreg = READ_BIT(RCC->APB2ENR, Periphs); + 8001138: 4b04 ldr r3, [pc, #16] ; (800114c ) + 800113a: 6b5b ldr r3, [r3, #52] ; 0x34 800113c: 687a ldr r2, [r7, #4] 800113e: 4013 ands r3, r2 8001140: 60fb str r3, [r7, #12] @@ -2858,1570 +2865,1576 @@ __STATIC_INLINE void LL_IOP_GRP1_EnableClock(uint32_t Periphs) 800114a: bd80 pop {r7, pc} 800114c: 40021000 .word 0x40021000 -08001150 : +08001150 : + * + * (*) value not defined in all devices. + * @retval None +*/ +__STATIC_INLINE void LL_IOP_GRP1_EnableClock(uint32_t Periphs) +{ + 8001150: b580 push {r7, lr} + 8001152: b084 sub sp, #16 + 8001154: af00 add r7, sp, #0 + 8001156: 6078 str r0, [r7, #4] + __IO uint32_t tmpreg; + SET_BIT(RCC->IOPENR, Periphs); + 8001158: 4b07 ldr r3, [pc, #28] ; (8001178 ) + 800115a: 6ad9 ldr r1, [r3, #44] ; 0x2c + 800115c: 4b06 ldr r3, [pc, #24] ; (8001178 ) + 800115e: 687a ldr r2, [r7, #4] + 8001160: 430a orrs r2, r1 + 8001162: 62da str r2, [r3, #44] ; 0x2c + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->IOPENR, Periphs); + 8001164: 4b04 ldr r3, [pc, #16] ; (8001178 ) + 8001166: 6adb ldr r3, [r3, #44] ; 0x2c + 8001168: 687a ldr r2, [r7, #4] + 800116a: 4013 ands r3, r2 + 800116c: 60fb str r3, [r7, #12] + (void)tmpreg; + 800116e: 68fb ldr r3, [r7, #12] +} + 8001170: 46c0 nop ; (mov r8, r8) + 8001172: 46bd mov sp, r7 + 8001174: b004 add sp, #16 + 8001176: bd80 pop {r7, pc} + 8001178: 40021000 .word 0x40021000 + +0800117c : * @arg @ref LL_FLASH_LATENCY_0 * @arg @ref LL_FLASH_LATENCY_1 * @retval None */ __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency) { - 8001150: b580 push {r7, lr} - 8001152: b082 sub sp, #8 - 8001154: af00 add r7, sp, #0 - 8001156: 6078 str r0, [r7, #4] + 800117c: b580 push {r7, lr} + 800117e: b082 sub sp, #8 + 8001180: af00 add r7, sp, #0 + 8001182: 6078 str r0, [r7, #4] MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency); - 8001158: 4b06 ldr r3, [pc, #24] ; (8001174 ) - 800115a: 681b ldr r3, [r3, #0] - 800115c: 2201 movs r2, #1 - 800115e: 4393 bics r3, r2 - 8001160: 0019 movs r1, r3 - 8001162: 4b04 ldr r3, [pc, #16] ; (8001174 ) - 8001164: 687a ldr r2, [r7, #4] - 8001166: 430a orrs r2, r1 - 8001168: 601a str r2, [r3, #0] + 8001184: 4b06 ldr r3, [pc, #24] ; (80011a0 ) + 8001186: 681b ldr r3, [r3, #0] + 8001188: 2201 movs r2, #1 + 800118a: 4393 bics r3, r2 + 800118c: 0019 movs r1, r3 + 800118e: 4b04 ldr r3, [pc, #16] ; (80011a0 ) + 8001190: 687a ldr r2, [r7, #4] + 8001192: 430a orrs r2, r1 + 8001194: 601a str r2, [r3, #0] } - 800116a: 46c0 nop ; (mov r8, r8) - 800116c: 46bd mov sp, r7 - 800116e: b002 add sp, #8 - 8001170: bd80 pop {r7, pc} - 8001172: 46c0 nop ; (mov r8, r8) - 8001174: 40022000 .word 0x40022000 + 8001196: 46c0 nop ; (mov r8, r8) + 8001198: 46bd mov sp, r7 + 800119a: b002 add sp, #8 + 800119c: bd80 pop {r7, pc} + 800119e: 46c0 nop ; (mov r8, r8) + 80011a0: 40022000 .word 0x40022000 -08001178 : +080011a4 : * @retval Returned value can be one of the following values: * @arg @ref LL_FLASH_LATENCY_0 * @arg @ref LL_FLASH_LATENCY_1 */ __STATIC_INLINE uint32_t LL_FLASH_GetLatency(void) { - 8001178: b580 push {r7, lr} - 800117a: af00 add r7, sp, #0 + 80011a4: b580 push {r7, lr} + 80011a6: af00 add r7, sp, #0 return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)); - 800117c: 4b03 ldr r3, [pc, #12] ; (800118c ) - 800117e: 681b ldr r3, [r3, #0] - 8001180: 2201 movs r2, #1 - 8001182: 4013 ands r3, r2 + 80011a8: 4b03 ldr r3, [pc, #12] ; (80011b8 ) + 80011aa: 681b ldr r3, [r3, #0] + 80011ac: 2201 movs r2, #1 + 80011ae: 4013 ands r3, r2 } - 8001184: 0018 movs r0, r3 - 8001186: 46bd mov sp, r7 - 8001188: bd80 pop {r7, pc} - 800118a: 46c0 nop ; (mov r8, r8) - 800118c: 40022000 .word 0x40022000 + 80011b0: 0018 movs r0, r3 + 80011b2: 46bd mov sp, r7 + 80011b4: bd80 pop {r7, pc} + 80011b6: 46c0 nop ; (mov r8, r8) + 80011b8: 40022000 .word 0x40022000 -08001190 : +080011bc : * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 * @retval None */ __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) { - 8001190: b580 push {r7, lr} - 8001192: b082 sub sp, #8 - 8001194: af00 add r7, sp, #0 - 8001196: 6078 str r0, [r7, #4] + 80011bc: b580 push {r7, lr} + 80011be: b082 sub sp, #8 + 80011c0: af00 add r7, sp, #0 + 80011c2: 6078 str r0, [r7, #4] MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); - 8001198: 4b06 ldr r3, [pc, #24] ; (80011b4 ) - 800119a: 681b ldr r3, [r3, #0] - 800119c: 4a06 ldr r2, [pc, #24] ; (80011b8 ) - 800119e: 4013 ands r3, r2 - 80011a0: 0019 movs r1, r3 - 80011a2: 4b04 ldr r3, [pc, #16] ; (80011b4 ) - 80011a4: 687a ldr r2, [r7, #4] - 80011a6: 430a orrs r2, r1 - 80011a8: 601a str r2, [r3, #0] + 80011c4: 4b06 ldr r3, [pc, #24] ; (80011e0 ) + 80011c6: 681b ldr r3, [r3, #0] + 80011c8: 4a06 ldr r2, [pc, #24] ; (80011e4 ) + 80011ca: 4013 ands r3, r2 + 80011cc: 0019 movs r1, r3 + 80011ce: 4b04 ldr r3, [pc, #16] ; (80011e0 ) + 80011d0: 687a ldr r2, [r7, #4] + 80011d2: 430a orrs r2, r1 + 80011d4: 601a str r2, [r3, #0] } - 80011aa: 46c0 nop ; (mov r8, r8) - 80011ac: 46bd mov sp, r7 - 80011ae: b002 add sp, #8 - 80011b0: bd80 pop {r7, pc} - 80011b2: 46c0 nop ; (mov r8, r8) - 80011b4: 40007000 .word 0x40007000 - 80011b8: ffffe7ff .word 0xffffe7ff + 80011d6: 46c0 nop ; (mov r8, r8) + 80011d8: 46bd mov sp, r7 + 80011da: b002 add sp, #8 + 80011dc: bd80 pop {r7, pc} + 80011de: 46c0 nop ; (mov r8, r8) + 80011e0: 40007000 .word 0x40007000 + 80011e4: ffffe7ff .word 0xffffe7ff -080011bc : +080011e8 : * @rmtoll CR1 CEN LL_TIM_EnableCounter * @param TIMx Timer instance * @retval None */ __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) { - 80011bc: b580 push {r7, lr} - 80011be: b082 sub sp, #8 - 80011c0: af00 add r7, sp, #0 - 80011c2: 6078 str r0, [r7, #4] + 80011e8: b580 push {r7, lr} + 80011ea: b082 sub sp, #8 + 80011ec: af00 add r7, sp, #0 + 80011ee: 6078 str r0, [r7, #4] SET_BIT(TIMx->CR1, TIM_CR1_CEN); - 80011c4: 687b ldr r3, [r7, #4] - 80011c6: 681b ldr r3, [r3, #0] - 80011c8: 2201 movs r2, #1 - 80011ca: 431a orrs r2, r3 - 80011cc: 687b ldr r3, [r7, #4] - 80011ce: 601a str r2, [r3, #0] + 80011f0: 687b ldr r3, [r7, #4] + 80011f2: 681b ldr r3, [r3, #0] + 80011f4: 2201 movs r2, #1 + 80011f6: 431a orrs r2, r3 + 80011f8: 687b ldr r3, [r7, #4] + 80011fa: 601a str r2, [r3, #0] } - 80011d0: 46c0 nop ; (mov r8, r8) - 80011d2: 46bd mov sp, r7 - 80011d4: b002 add sp, #8 - 80011d6: bd80 pop {r7, pc} + 80011fc: 46c0 nop ; (mov r8, r8) + 80011fe: 46bd mov sp, r7 + 8001200: b002 add sp, #8 + 8001202: bd80 pop {r7, pc} -080011d8 : +08001204 : * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload * @param TIMx Timer instance * @retval None */ __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) { - 80011d8: b580 push {r7, lr} - 80011da: b082 sub sp, #8 - 80011dc: af00 add r7, sp, #0 - 80011de: 6078 str r0, [r7, #4] + 8001204: b580 push {r7, lr} + 8001206: b082 sub sp, #8 + 8001208: af00 add r7, sp, #0 + 800120a: 6078 str r0, [r7, #4] SET_BIT(TIMx->CR1, TIM_CR1_ARPE); - 80011e0: 687b ldr r3, [r7, #4] - 80011e2: 681b ldr r3, [r3, #0] - 80011e4: 2280 movs r2, #128 ; 0x80 - 80011e6: 431a orrs r2, r3 - 80011e8: 687b ldr r3, [r7, #4] - 80011ea: 601a str r2, [r3, #0] + 800120c: 687b ldr r3, [r7, #4] + 800120e: 681b ldr r3, [r3, #0] + 8001210: 2280 movs r2, #128 ; 0x80 + 8001212: 431a orrs r2, r3 + 8001214: 687b ldr r3, [r7, #4] + 8001216: 601a str r2, [r3, #0] } - 80011ec: 46c0 nop ; (mov r8, r8) - 80011ee: 46bd mov sp, r7 - 80011f0: b002 add sp, #8 - 80011f2: bd80 pop {r7, pc} + 8001218: 46c0 nop ; (mov r8, r8) + 800121a: 46bd mov sp, r7 + 800121c: b002 add sp, #8 + 800121e: bd80 pop {r7, pc} -080011f4 : +08001220 : * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1 * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2 * @retval None */ __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) { - 80011f4: b580 push {r7, lr} - 80011f6: b082 sub sp, #8 - 80011f8: af00 add r7, sp, #0 - 80011fa: 6078 str r0, [r7, #4] - 80011fc: 6039 str r1, [r7, #0] + 8001220: b580 push {r7, lr} + 8001222: b082 sub sp, #8 + 8001224: af00 add r7, sp, #0 + 8001226: 6078 str r0, [r7, #4] + 8001228: 6039 str r1, [r7, #0] MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); - 80011fe: 687b ldr r3, [r7, #4] - 8001200: 689b ldr r3, [r3, #8] - 8001202: 4a05 ldr r2, [pc, #20] ; (8001218 ) - 8001204: 401a ands r2, r3 - 8001206: 683b ldr r3, [r7, #0] - 8001208: 431a orrs r2, r3 - 800120a: 687b ldr r3, [r7, #4] - 800120c: 609a str r2, [r3, #8] + 800122a: 687b ldr r3, [r7, #4] + 800122c: 689b ldr r3, [r3, #8] + 800122e: 4a05 ldr r2, [pc, #20] ; (8001244 ) + 8001230: 401a ands r2, r3 + 8001232: 683b ldr r3, [r7, #0] + 8001234: 431a orrs r2, r3 + 8001236: 687b ldr r3, [r7, #4] + 8001238: 609a str r2, [r3, #8] } - 800120e: 46c0 nop ; (mov r8, r8) - 8001210: 46bd mov sp, r7 - 8001212: b002 add sp, #8 - 8001214: bd80 pop {r7, pc} - 8001216: 46c0 nop ; (mov r8, r8) - 8001218: ffffbff8 .word 0xffffbff8 + 800123a: 46c0 nop ; (mov r8, r8) + 800123c: 46bd mov sp, r7 + 800123e: b002 add sp, #8 + 8001240: bd80 pop {r7, pc} + 8001242: 46c0 nop ; (mov r8, r8) + 8001244: ffffbff8 .word 0xffffbff8 -0800121c : +08001248 : * @arg @ref LL_TIM_TRGO_OC3REF * @arg @ref LL_TIM_TRGO_OC4REF * @retval None */ __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) { - 800121c: b580 push {r7, lr} - 800121e: b082 sub sp, #8 - 8001220: af00 add r7, sp, #0 - 8001222: 6078 str r0, [r7, #4] - 8001224: 6039 str r1, [r7, #0] + 8001248: b580 push {r7, lr} + 800124a: b082 sub sp, #8 + 800124c: af00 add r7, sp, #0 + 800124e: 6078 str r0, [r7, #4] + 8001250: 6039 str r1, [r7, #0] MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); - 8001226: 687b ldr r3, [r7, #4] - 8001228: 685b ldr r3, [r3, #4] - 800122a: 2270 movs r2, #112 ; 0x70 - 800122c: 4393 bics r3, r2 - 800122e: 001a movs r2, r3 - 8001230: 683b ldr r3, [r7, #0] - 8001232: 431a orrs r2, r3 - 8001234: 687b ldr r3, [r7, #4] - 8001236: 605a str r2, [r3, #4] + 8001252: 687b ldr r3, [r7, #4] + 8001254: 685b ldr r3, [r3, #4] + 8001256: 2270 movs r2, #112 ; 0x70 + 8001258: 4393 bics r3, r2 + 800125a: 001a movs r2, r3 + 800125c: 683b ldr r3, [r7, #0] + 800125e: 431a orrs r2, r3 + 8001260: 687b ldr r3, [r7, #4] + 8001262: 605a str r2, [r3, #4] } - 8001238: 46c0 nop ; (mov r8, r8) - 800123a: 46bd mov sp, r7 - 800123c: b002 add sp, #8 - 800123e: bd80 pop {r7, pc} + 8001264: 46c0 nop ; (mov r8, r8) + 8001266: 46bd mov sp, r7 + 8001268: b002 add sp, #8 + 800126a: bd80 pop {r7, pc} -08001240 : +0800126c : * @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode * @param TIMx Timer instance * @retval None */ __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) { - 8001240: b580 push {r7, lr} - 8001242: b082 sub sp, #8 - 8001244: af00 add r7, sp, #0 - 8001246: 6078 str r0, [r7, #4] + 800126c: b580 push {r7, lr} + 800126e: b082 sub sp, #8 + 8001270: af00 add r7, sp, #0 + 8001272: 6078 str r0, [r7, #4] CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); - 8001248: 687b ldr r3, [r7, #4] - 800124a: 689b ldr r3, [r3, #8] - 800124c: 2280 movs r2, #128 ; 0x80 - 800124e: 4393 bics r3, r2 - 8001250: 001a movs r2, r3 - 8001252: 687b ldr r3, [r7, #4] - 8001254: 609a str r2, [r3, #8] + 8001274: 687b ldr r3, [r7, #4] + 8001276: 689b ldr r3, [r3, #8] + 8001278: 2280 movs r2, #128 ; 0x80 + 800127a: 4393 bics r3, r2 + 800127c: 001a movs r2, r3 + 800127e: 687b ldr r3, [r7, #4] + 8001280: 609a str r2, [r3, #8] } - 8001256: 46c0 nop ; (mov r8, r8) - 8001258: 46bd mov sp, r7 - 800125a: b002 add sp, #8 - 800125c: bd80 pop {r7, pc} + 8001282: 46c0 nop ; (mov r8, r8) + 8001284: 46bd mov sp, r7 + 8001286: b002 add sp, #8 + 8001288: bd80 pop {r7, pc} -0800125e : +0800128a : * @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE * @param TIMx Timer instance * @retval None */ __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) { - 800125e: b580 push {r7, lr} - 8001260: b082 sub sp, #8 - 8001262: af00 add r7, sp, #0 - 8001264: 6078 str r0, [r7, #4] + 800128a: b580 push {r7, lr} + 800128c: b082 sub sp, #8 + 800128e: af00 add r7, sp, #0 + 8001290: 6078 str r0, [r7, #4] SET_BIT(TIMx->DIER, TIM_DIER_UIE); - 8001266: 687b ldr r3, [r7, #4] - 8001268: 68db ldr r3, [r3, #12] - 800126a: 2201 movs r2, #1 - 800126c: 431a orrs r2, r3 - 800126e: 687b ldr r3, [r7, #4] - 8001270: 60da str r2, [r3, #12] + 8001292: 687b ldr r3, [r7, #4] + 8001294: 68db ldr r3, [r3, #12] + 8001296: 2201 movs r2, #1 + 8001298: 431a orrs r2, r3 + 800129a: 687b ldr r3, [r7, #4] + 800129c: 60da str r2, [r3, #12] } - 8001272: 46c0 nop ; (mov r8, r8) - 8001274: 46bd mov sp, r7 - 8001276: b002 add sp, #8 - 8001278: bd80 pop {r7, pc} + 800129e: 46c0 nop ; (mov r8, r8) + 80012a0: 46bd mov sp, r7 + 80012a2: b002 add sp, #8 + 80012a4: bd80 pop {r7, pc} -0800127a : +080012a6 : * @arg @ref LL_GPIO_PIN_15 * @arg @ref LL_GPIO_PIN_ALL * @retval None */ __STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) { - 800127a: b580 push {r7, lr} - 800127c: b082 sub sp, #8 - 800127e: af00 add r7, sp, #0 - 8001280: 6078 str r0, [r7, #4] - 8001282: 6039 str r1, [r7, #0] + 80012a6: b580 push {r7, lr} + 80012a8: b082 sub sp, #8 + 80012aa: af00 add r7, sp, #0 + 80012ac: 6078 str r0, [r7, #4] + 80012ae: 6039 str r1, [r7, #0] WRITE_REG(GPIOx->BSRR, PinMask); - 8001284: 687b ldr r3, [r7, #4] - 8001286: 683a ldr r2, [r7, #0] - 8001288: 619a str r2, [r3, #24] + 80012b0: 687b ldr r3, [r7, #4] + 80012b2: 683a ldr r2, [r7, #0] + 80012b4: 619a str r2, [r3, #24] } - 800128a: 46c0 nop ; (mov r8, r8) - 800128c: 46bd mov sp, r7 - 800128e: b002 add sp, #8 - 8001290: bd80 pop {r7, pc} + 80012b6: 46c0 nop ; (mov r8, r8) + 80012b8: 46bd mov sp, r7 + 80012ba: b002 add sp, #8 + 80012bc: bd80 pop {r7, pc} -08001292 : +080012be : * @arg @ref LL_GPIO_PIN_15 * @arg @ref LL_GPIO_PIN_ALL * @retval None */ __STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask) { - 8001292: b580 push {r7, lr} - 8001294: b082 sub sp, #8 - 8001296: af00 add r7, sp, #0 - 8001298: 6078 str r0, [r7, #4] - 800129a: 6039 str r1, [r7, #0] + 80012be: b580 push {r7, lr} + 80012c0: b082 sub sp, #8 + 80012c2: af00 add r7, sp, #0 + 80012c4: 6078 str r0, [r7, #4] + 80012c6: 6039 str r1, [r7, #0] WRITE_REG(GPIOx->BRR, PinMask); - 800129c: 687b ldr r3, [r7, #4] - 800129e: 683a ldr r2, [r7, #0] - 80012a0: 629a str r2, [r3, #40] ; 0x28 + 80012c8: 687b ldr r3, [r7, #4] + 80012ca: 683a ldr r2, [r7, #0] + 80012cc: 629a str r2, [r3, #40] ; 0x28 } - 80012a2: 46c0 nop ; (mov r8, r8) - 80012a4: 46bd mov sp, r7 - 80012a6: b002 add sp, #8 - 80012a8: bd80 pop {r7, pc} + 80012ce: 46c0 nop ; (mov r8, r8) + 80012d0: 46bd mov sp, r7 + 80012d2: b002 add sp, #8 + 80012d4: bd80 pop {r7, pc} ... -080012ac
: +080012d8
: /** * @brief The application entry point. * @retval int */ int main(void) { - 80012ac: b590 push {r4, r7, lr} - 80012ae: b083 sub sp, #12 - 80012b0: af00 add r7, sp, #0 + 80012d8: b590 push {r4, r7, lr} + 80012da: b083 sub sp, #12 + 80012dc: af00 add r7, sp, #0 /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG); - 80012b2: 2001 movs r0, #1 - 80012b4: f7ff ff20 bl 80010f8 + 80012de: 2001 movs r0, #1 + 80012e0: f7ff ff20 bl 8001124 LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); - 80012b8: 2380 movs r3, #128 ; 0x80 - 80012ba: 055b lsls r3, r3, #21 - 80012bc: 0018 movs r0, r3 - 80012be: f7ff ff05 bl 80010cc + 80012e4: 2380 movs r3, #128 ; 0x80 + 80012e6: 055b lsls r3, r3, #21 + 80012e8: 0018 movs r0, r3 + 80012ea: f7ff ff05 bl 80010f8 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 80012c2: f000 f9ad bl 8001620 + 80012ee: f000 f9ad bl 800164c /* USER CODE BEGIN SysInit */ /* Read config from EEPROM - if unsuccessful, set the default values*/ int8_t config_read_status = config_read(&sensor_config); - 80012c6: 1dfc adds r4, r7, #7 - 80012c8: 4bbd ldr r3, [pc, #756] ; (80015c0 ) - 80012ca: 0018 movs r0, r3 - 80012cc: f7ff f8be bl 800044c - 80012d0: 0003 movs r3, r0 - 80012d2: 7023 strb r3, [r4, #0] + 80012f2: 1dfc adds r4, r7, #7 + 80012f4: 4bbd ldr r3, [pc, #756] ; (80015ec ) + 80012f6: 0018 movs r0, r3 + 80012f8: f7ff f8a8 bl 800044c + 80012fc: 0003 movs r3, r0 + 80012fe: 7023 strb r3, [r4, #0] if (config_read_status != CONFIG_OK) - 80012d4: 1dfb adds r3, r7, #7 - 80012d6: 781b ldrb r3, [r3, #0] - 80012d8: b25b sxtb r3, r3 - 80012da: 2b00 cmp r3, #0 - 80012dc: d017 beq.n 800130e + 8001300: 1dfb adds r3, r7, #7 + 8001302: 781b ldrb r3, [r3, #0] + 8001304: b25b sxtb r3, r3 + 8001306: 2b00 cmp r3, #0 + 8001308: d017 beq.n 800133a { sensor_config.modbus_addr = MODBUS_DEFAULT_SLAVE_ADDRESS; - 80012de: 4bb8 ldr r3, [pc, #736] ; (80015c0 ) - 80012e0: 22fe movs r2, #254 ; 0xfe - 80012e2: 819a strh r2, [r3, #12] + 800130a: 4bb8 ldr r3, [pc, #736] ; (80015ec ) + 800130c: 22fe movs r2, #254 ; 0xfe + 800130e: 819a strh r2, [r3, #12] sensor_config.led_co2_alert_limit1 = CONFIG_DEFAULT_LED_ALERT1_LIMIT; - 80012e4: 4bb6 ldr r3, [pc, #728] ; (80015c0 ) - 80012e6: 4ab7 ldr r2, [pc, #732] ; (80015c4 ) - 80012e8: 80da strh r2, [r3, #6] + 8001310: 4bb6 ldr r3, [pc, #728] ; (80015ec ) + 8001312: 4ab7 ldr r2, [pc, #732] ; (80015f0 ) + 8001314: 80da strh r2, [r3, #6] sensor_config.led_co2_alert_limit2 = CONFIG_DEFAULT_LED_ALERT2_LIMIT; - 80012ea: 4bb5 ldr r3, [pc, #724] ; (80015c0 ) - 80012ec: 4ab6 ldr r2, [pc, #728] ; (80015c8 ) - 80012ee: 811a strh r2, [r3, #8] + 8001316: 4bb5 ldr r3, [pc, #724] ; (80015ec ) + 8001318: 4ab6 ldr r2, [pc, #728] ; (80015f4 ) + 800131a: 811a strh r2, [r3, #8] sensor_config.led_on = CONFIG_DEFAULT_LED_ON; - 80012f0: 4bb3 ldr r3, [pc, #716] ; (80015c0 ) - 80012f2: 2201 movs r2, #1 - 80012f4: 701a strb r2, [r3, #0] + 800131c: 4bb3 ldr r3, [pc, #716] ; (80015ec ) + 800131e: 2201 movs r2, #1 + 8001320: 701a strb r2, [r3, #0] sensor_config.led_brightness = CONFIG_DEFAULT_LED_BRIGHTNESS; - 80012f6: 4bb2 ldr r3, [pc, #712] ; (80015c0 ) - 80012f8: 2264 movs r2, #100 ; 0x64 - 80012fa: 805a strh r2, [r3, #2] + 8001322: 4bb2 ldr r3, [pc, #712] ; (80015ec ) + 8001324: 2264 movs r2, #100 ; 0x64 + 8001326: 805a strh r2, [r3, #2] sensor_config.led_smooth = CONFIG_DEFAULT_LED_SMOOTH; - 80012fc: 4bb0 ldr r3, [pc, #704] ; (80015c0 ) - 80012fe: 2200 movs r2, #0 - 8001300: 711a strb r2, [r3, #4] + 8001328: 4bb0 ldr r3, [pc, #704] ; (80015ec ) + 800132a: 2200 movs r2, #0 + 800132c: 711a strb r2, [r3, #4] sensor_config.scd4x_t_offset = CONFIG_DEFAULT_SCD4x_T_OFFSET; - 8001302: 4baf ldr r3, [pc, #700] ; (80015c0 ) - 8001304: 2200 movs r2, #0 - 8001306: 815a strh r2, [r3, #10] + 800132e: 4baf ldr r3, [pc, #700] ; (80015ec ) + 8001330: 2200 movs r2, #0 + 8001332: 815a strh r2, [r3, #10] sensor_config.baudrate_index = CONFIG_DEFAULT_BAUDRATE_INDEX; - 8001308: 4bad ldr r3, [pc, #692] ; (80015c0 ) - 800130a: 2200 movs r2, #0 - 800130c: 611a str r2, [r3, #16] + 8001334: 4bad ldr r3, [pc, #692] ; (80015ec ) + 8001336: 2200 movs r2, #0 + 8001338: 611a str r2, [r3, #16] } /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 800130e: f000 fb63 bl 80019d8 + 800133a: f000 fb63 bl 8001a04 MX_I2C1_Init(); - 8001312: f000 f9d5 bl 80016c0 + 800133e: f000 f9d5 bl 80016ec MX_LPUART1_UART_Init(); - 8001316: f000 fa5b bl 80017d0 + 8001342: f000 fa5b bl 80017fc MX_TIM21_Init(); - 800131a: f000 fb19 bl 8001950 + 8001346: f000 fb19 bl 800197c /* USER CODE BEGIN 2 */ /* Turn on MAGENTA LED to signal startup state */ LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); - 800131e: 23a0 movs r3, #160 ; 0xa0 - 8001320: 05db lsls r3, r3, #23 - 8001322: 2180 movs r1, #128 ; 0x80 - 8001324: 0018 movs r0, r3 - 8001326: f7ff ffb4 bl 8001292 + 800134a: 23a0 movs r3, #160 ; 0xa0 + 800134c: 05db lsls r3, r3, #23 + 800134e: 2180 movs r1, #128 ; 0x80 + 8001350: 0018 movs r0, r3 + 8001352: f7ff ffb4 bl 80012be LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin); - 800132a: 23a0 movs r3, #160 ; 0xa0 - 800132c: 05db lsls r3, r3, #23 - 800132e: 2140 movs r1, #64 ; 0x40 - 8001330: 0018 movs r0, r3 - 8001332: f7ff ffae bl 8001292 + 8001356: 23a0 movs r3, #160 ; 0xa0 + 8001358: 05db lsls r3, r3, #23 + 800135a: 2140 movs r1, #64 ; 0x40 + 800135c: 0018 movs r0, r3 + 800135e: f7ff ffae bl 80012be LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin); - 8001336: 23a0 movs r3, #160 ; 0xa0 - 8001338: 05db lsls r3, r3, #23 - 800133a: 2120 movs r1, #32 - 800133c: 0018 movs r0, r3 - 800133e: f7ff ffa8 bl 8001292 + 8001362: 23a0 movs r3, #160 ; 0xa0 + 8001364: 05db lsls r3, r3, #23 + 8001366: 2120 movs r1, #32 + 8001368: 0018 movs r0, r3 + 800136a: f7ff ffa8 bl 80012be /* Enable I2C for sensors */ LL_I2C_Enable(I2C1); - 8001342: 4ba2 ldr r3, [pc, #648] ; (80015cc ) - 8001344: 0018 movs r0, r3 - 8001346: f7ff fc19 bl 8000b7c + 800136e: 4ba2 ldr r3, [pc, #648] ; (80015f8 ) + 8001370: 0018 movs r0, r3 + 8001372: f7ff fc03 bl 8000b7c /* Set the modbus address */ modbus_slave_set_address(sensor_config.modbus_addr); - 800134a: 4b9d ldr r3, [pc, #628] ; (80015c0 ) - 800134c: 899b ldrh r3, [r3, #12] - 800134e: b2db uxtb r3, r3 - 8001350: 0018 movs r0, r3 - 8001352: f000 feb3 bl 80020bc + 8001376: 4b9d ldr r3, [pc, #628] ; (80015ec ) + 8001378: 899b ldrh r3, [r3, #12] + 800137a: b2db uxtb r3, r3 + 800137c: 0018 movs r0, r3 + 800137e: f000 febb bl 80020f8 /* Enable UART for RS485 */ LL_LPUART_Enable(LPUART1); - 8001356: 4b9e ldr r3, [pc, #632] ; (80015d0 ) - 8001358: 0018 movs r0, r3 - 800135a: f7ff fc72 bl 8000c42 + 8001382: 4b9e ldr r3, [pc, #632] ; (80015fc ) + 8001384: 0018 movs r0, r3 + 8001386: f7ff fc5c bl 8000c42 /* Start the timer for measurement triggering */ LL_TIM_EnableCounter(TIM21); - 800135e: 4b9d ldr r3, [pc, #628] ; (80015d4 ) - 8001360: 0018 movs r0, r3 - 8001362: f7ff ff2b bl 80011bc + 800138a: 4b9d ldr r3, [pc, #628] ; (8001600 ) + 800138c: 0018 movs r0, r3 + 800138e: f7ff ff2b bl 80011e8 LL_TIM_EnableIT_UPDATE(TIM21); - 8001366: 4b9b ldr r3, [pc, #620] ; (80015d4 ) - 8001368: 0018 movs r0, r3 - 800136a: f7ff ff78 bl 800125e + 8001392: 4b9b ldr r3, [pc, #620] ; (8001600 ) + 8001394: 0018 movs r0, r3 + 8001396: f7ff ff78 bl 800128a /* I2C context init (for SHT4x and SCD4x) */ i2c_context_t i2c_context; i2c_context.i2c = I2C1; - 800136e: 4b97 ldr r3, [pc, #604] ; (80015cc ) - 8001370: 603b str r3, [r7, #0] + 800139a: 4b97 ldr r3, [pc, #604] ; (80015f8 ) + 800139c: 603b str r3, [r7, #0] i2c_init(&i2c_context); - 8001372: 003b movs r3, r7 - 8001374: 0018 movs r0, r3 - 8001376: f7ff fab3 bl 80008e0 + 800139e: 003b movs r3, r7 + 80013a0: 0018 movs r0, r3 + 80013a2: f7ff fa9d bl 80008e0 scd4x_start_periodic_measurement(); - 800137a: f001 f983 bl 8002684 + 80013a6: f001 f98b bl 80026c0 uint8_t scd4x_is_connected = 1; - 800137e: 1dbb adds r3, r7, #6 - 8001380: 2201 movs r2, #1 - 8001382: 701a strb r2, [r3, #0] + 80013aa: 1dbb adds r3, r7, #6 + 80013ac: 2201 movs r2, #1 + 80013ae: 701a strb r2, [r3, #0] uint8_t sps30_is_connected = 0; - 8001384: 1d7b adds r3, r7, #5 - 8001386: 2200 movs r2, #0 - 8001388: 701a strb r2, [r3, #0] + 80013b0: 1d7b adds r3, r7, #5 + 80013b2: 2200 movs r2, #0 + 80013b4: 701a strb r2, [r3, #0] /* Wait 1000ms for sensors initialization */ /* SHT4x Init Time: max 1 ms (datasheet pg. 8) */ /* SCD4x Init Time: max 1000 ms (datasheet pg. 6) */ /* SPS30 Init Time: max 30000 ms (datasheet pg. 2) */ LL_mDelay(1000); - 800138a: 23fa movs r3, #250 ; 0xfa - 800138c: 009b lsls r3, r3, #2 - 800138e: 0018 movs r0, r3 - 8001390: f002 f8ea bl 8003568 + 80013b6: 23fa movs r3, #250 ; 0xfa + 80013b8: 009b lsls r3, r3, #2 + 80013ba: 0018 movs r0, r3 + 80013bc: f002 f8fa bl 80035b4 static uint32_t new_baud; /* Enter the main loop */ while (1) { if (lpuart1_rx_done == 1) - 8001394: 4b90 ldr r3, [pc, #576] ; (80015d8 ) - 8001396: 781b ldrb r3, [r3, #0] - 8001398: 2b01 cmp r3, #1 - 800139a: d11d bne.n 80013d8 + 80013c0: 4b90 ldr r3, [pc, #576] ; (8001604 ) + 80013c2: 781b ldrb r3, [r3, #0] + 80013c4: 2b01 cmp r3, #1 + 80013c6: d11d bne.n 8001404 { /* Process the message */ if (lpuart1_rx_message_too_long) - 800139c: 4b8f ldr r3, [pc, #572] ; (80015dc ) - 800139e: 781b ldrb r3, [r3, #0] - 80013a0: 2b00 cmp r3, #0 - 80013a2: d003 beq.n 80013ac + 80013c8: 4b8f ldr r3, [pc, #572] ; (8001608 ) + 80013ca: 781b ldrb r3, [r3, #0] + 80013cc: 2b00 cmp r3, #0 + 80013ce: d003 beq.n 80013d8 { /* Do nothing, just delete the buffer and set the flag back to zero*/ lpuart1_rx_message_too_long = 0; - 80013a4: 4b8d ldr r3, [pc, #564] ; (80015dc ) - 80013a6: 2200 movs r2, #0 - 80013a8: 701a strb r2, [r3, #0] - 80013aa: e012 b.n 80013d2 + 80013d0: 4b8d ldr r3, [pc, #564] ; (8001608 ) + 80013d2: 2200 movs r2, #0 + 80013d4: 701a strb r2, [r3, #0] + 80013d6: e012 b.n 80013fe { /* Process the message: * message is stored in modbus_buffer[], no copying necessary; * but we need to make sure that modbus_buffer[] will not be used while * processing the message: this can be done by disabling RX interrupt */ LL_LPUART_DisableIT_RXNE(LPUART1); - 80013ac: 4b88 ldr r3, [pc, #544] ; (80015d0 ) - 80013ae: 0018 movs r0, r3 - 80013b0: f7ff fd68 bl 8000e84 + 80013d8: 4b88 ldr r3, [pc, #544] ; (80015fc ) + 80013da: 0018 movs r0, r3 + 80013dc: f7ff fd68 bl 8000eb0 modbus_slave_process_msg(modbus_buffer, lpuart1_rx_message_len); - 80013b4: 4b8a ldr r3, [pc, #552] ; (80015e0 ) - 80013b6: 881b ldrh r3, [r3, #0] - 80013b8: 001a movs r2, r3 - 80013ba: 4b8a ldr r3, [pc, #552] ; (80015e4 ) - 80013bc: 0011 movs r1, r2 - 80013be: 0018 movs r0, r3 - 80013c0: f000 fe94 bl 80020ec + 80013e0: 4b8a ldr r3, [pc, #552] ; (800160c ) + 80013e2: 881b ldrh r3, [r3, #0] + 80013e4: 001a movs r2, r3 + 80013e6: 4b8a ldr r3, [pc, #552] ; (8001610 ) + 80013e8: 0011 movs r1, r2 + 80013ea: 0018 movs r0, r3 + 80013ec: f000 fe9c bl 8002128 /* Reset the RX DONE flag */ lpuart1_rx_done = 0; - 80013c4: 4b84 ldr r3, [pc, #528] ; (80015d8 ) - 80013c6: 2200 movs r2, #0 - 80013c8: 701a strb r2, [r3, #0] + 80013f0: 4b84 ldr r3, [pc, #528] ; (8001604 ) + 80013f2: 2200 movs r2, #0 + 80013f4: 701a strb r2, [r3, #0] LL_LPUART_EnableIT_RXNE(LPUART1); - 80013ca: 4b81 ldr r3, [pc, #516] ; (80015d0 ) - 80013cc: 0018 movs r0, r3 - 80013ce: f7ff fd3c bl 8000e4a + 80013f6: 4b81 ldr r3, [pc, #516] ; (80015fc ) + 80013f8: 0018 movs r0, r3 + 80013fa: f7ff fd3c bl 8000e76 } /* Reset the RX DONE flag */ lpuart1_rx_done = 0; - 80013d2: 4b81 ldr r3, [pc, #516] ; (80015d8 ) - 80013d4: 2200 movs r2, #0 - 80013d6: 701a strb r2, [r3, #0] + 80013fe: 4b81 ldr r3, [pc, #516] ; (8001604 ) + 8001400: 2200 movs r2, #0 + 8001402: 701a strb r2, [r3, #0] } /* if config changed (MODBUS write), reflect changes to EEPROM */ if (sensor_config_pending_write) { - 80013d8: 4b83 ldr r3, [pc, #524] ; (80015e8 ) - 80013da: 781b ldrb r3, [r3, #0] - 80013dc: 2b00 cmp r3, #0 - 80013de: d006 beq.n 80013ee + 8001404: 4b83 ldr r3, [pc, #524] ; (8001614 ) + 8001406: 781b ldrb r3, [r3, #0] + 8001408: 2b00 cmp r3, #0 + 800140a: d006 beq.n 800141a config_write(&sensor_config); - 80013e0: 4b77 ldr r3, [pc, #476] ; (80015c0 ) - 80013e2: 0018 movs r0, r3 - 80013e4: f7ff f882 bl 80004ec + 800140c: 4b77 ldr r3, [pc, #476] ; (80015ec ) + 800140e: 0018 movs r0, r3 + 8001410: f7ff f86c bl 80004ec sensor_config_pending_write = 0; - 80013e8: 4b7f ldr r3, [pc, #508] ; (80015e8 ) - 80013ea: 2200 movs r2, #0 - 80013ec: 701a strb r2, [r3, #0] + 8001414: 4b7f ldr r3, [pc, #508] ; (8001614 ) + 8001416: 2200 movs r2, #0 + 8001418: 701a strb r2, [r3, #0] } if (modbus_address_changed) - 80013ee: 4b7f ldr r3, [pc, #508] ; (80015ec ) - 80013f0: 781b ldrb r3, [r3, #0] - 80013f2: 2b00 cmp r3, #0 - 80013f4: d008 beq.n 8001408 + 800141a: 4b7f ldr r3, [pc, #508] ; (8001618 ) + 800141c: 781b ldrb r3, [r3, #0] + 800141e: 2b00 cmp r3, #0 + 8001420: d008 beq.n 8001434 { modbus_slave_set_address(sensor_config.modbus_addr); - 80013f6: 4b72 ldr r3, [pc, #456] ; (80015c0 ) - 80013f8: 899b ldrh r3, [r3, #12] - 80013fa: b2db uxtb r3, r3 - 80013fc: 0018 movs r0, r3 - 80013fe: f000 fe5d bl 80020bc + 8001422: 4b72 ldr r3, [pc, #456] ; (80015ec ) + 8001424: 899b ldrh r3, [r3, #12] + 8001426: b2db uxtb r3, r3 + 8001428: 0018 movs r0, r3 + 800142a: f000 fe65 bl 80020f8 modbus_address_changed = 0; - 8001402: 4b7a ldr r3, [pc, #488] ; (80015ec ) - 8001404: 2200 movs r2, #0 - 8001406: 701a strb r2, [r3, #0] + 800142e: 4b7a ldr r3, [pc, #488] ; (8001618 ) + 8001430: 2200 movs r2, #0 + 8001432: 701a strb r2, [r3, #0] } if (baudrate_changed) - 8001408: 4b79 ldr r3, [pc, #484] ; (80015f0 ) - 800140a: 781b ldrb r3, [r3, #0] - 800140c: 2b00 cmp r3, #0 - 800140e: d028 beq.n 8001462 + 8001434: 4b79 ldr r3, [pc, #484] ; (800161c ) + 8001436: 781b ldrb r3, [r3, #0] + 8001438: 2b00 cmp r3, #0 + 800143a: d028 beq.n 800148e { while (!LL_LPUART_IsActiveFlag_TXE(LPUART1)); - 8001410: 46c0 nop ; (mov r8, r8) - 8001412: 4b6f ldr r3, [pc, #444] ; (80015d0 ) - 8001414: 0018 movs r0, r3 - 8001416: f7ff fcf9 bl 8000e0c - 800141a: 1e03 subs r3, r0, #0 - 800141c: d0f9 beq.n 8001412 + 800143c: 46c0 nop ; (mov r8, r8) + 800143e: 4b6f ldr r3, [pc, #444] ; (80015fc ) + 8001440: 0018 movs r0, r3 + 8001442: f7ff fce3 bl 8000e0c + 8001446: 1e03 subs r3, r0, #0 + 8001448: d0f9 beq.n 800143e uart_disable_interrupts(); - 800141e: f000 fb77 bl 8001b10 + 800144a: f000 fb77 bl 8001b3c // LL_LPUART_Disable(LPUART1); // LL_LPUART_DisableIT_IDLE(LPUART1); // LL_LPUART_EnableIT_RXNE(LPUART1); LL_LPUART_SetBaudRate(LPUART1, SYSTICK_FREQ_HZ, config_baudrates[sensor_config.baudrate_index]); - 8001422: 4b67 ldr r3, [pc, #412] ; (80015c0 ) - 8001424: 691a ldr r2, [r3, #16] - 8001426: 4b73 ldr r3, [pc, #460] ; (80015f4 ) - 8001428: 0092 lsls r2, r2, #2 - 800142a: 58d3 ldr r3, [r2, r3] - 800142c: 4972 ldr r1, [pc, #456] ; (80015f8 ) - 800142e: 4868 ldr r0, [pc, #416] ; (80015d0 ) - 8001430: 001a movs r2, r3 - 8001432: f7ff fc3f bl 8000cb4 + 800144e: 4b67 ldr r3, [pc, #412] ; (80015ec ) + 8001450: 691a ldr r2, [r3, #16] + 8001452: 4b73 ldr r3, [pc, #460] ; (8001620 ) + 8001454: 0092 lsls r2, r2, #2 + 8001456: 58d3 ldr r3, [r2, r3] + 8001458: 4972 ldr r1, [pc, #456] ; (8001624 ) + 800145a: 4868 ldr r0, [pc, #416] ; (80015fc ) + 800145c: 001a movs r2, r3 + 800145e: f7ff fc29 bl 8000cb4 // LL_LPUART_Enable(LPUART1); // LL_LPUART_EnableIT_IDLE(LPUART1); // LL_LPUART_EnableIT_RXNE(LPUART1); uart_enable_interrupts(); - 8001436: f000 fb7f bl 8001b38 + 8001462: f000 fb7f bl 8001b64 LL_LPUART_EnableDirectionRx(LPUART1); - 800143a: 4b65 ldr r3, [pc, #404] ; (80015d0 ) - 800143c: 0018 movs r0, r3 - 800143e: f7ff fc1d bl 8000c7c + 8001466: 4b65 ldr r3, [pc, #404] ; (80015fc ) + 8001468: 0018 movs r0, r3 + 800146a: f7ff fc07 bl 8000c7c LL_LPUART_EnableDirectionTx(LPUART1); - 8001442: 4b63 ldr r3, [pc, #396] ; (80015d0 ) - 8001444: 0018 movs r0, r3 - 8001446: f7ff fc27 bl 8000c98 + 800146e: 4b63 ldr r3, [pc, #396] ; (80015fc ) + 8001470: 0018 movs r0, r3 + 8001472: f7ff fc11 bl 8000c98 baudrate_changed = 0; - 800144a: 4b69 ldr r3, [pc, #420] ; (80015f0 ) - 800144c: 2200 movs r2, #0 - 800144e: 701a strb r2, [r3, #0] + 8001476: 4b69 ldr r3, [pc, #420] ; (800161c ) + 8001478: 2200 movs r2, #0 + 800147a: 701a strb r2, [r3, #0] new_baud = LL_LPUART_GetBaudRate(LPUART1, SYSTICK_FREQ_HZ); - 8001450: 4a69 ldr r2, [pc, #420] ; (80015f8 ) - 8001452: 4b5f ldr r3, [pc, #380] ; (80015d0 ) - 8001454: 0011 movs r1, r2 - 8001456: 0018 movs r0, r3 - 8001458: f7ff fc5e bl 8000d18 - 800145c: 0002 movs r2, r0 - 800145e: 4b67 ldr r3, [pc, #412] ; (80015fc ) - 8001460: 601a str r2, [r3, #0] + 800147c: 4a69 ldr r2, [pc, #420] ; (8001624 ) + 800147e: 4b5f ldr r3, [pc, #380] ; (80015fc ) + 8001480: 0011 movs r1, r2 + 8001482: 0018 movs r0, r3 + 8001484: f7ff fc48 bl 8000d18 + 8001488: 0002 movs r2, r0 + 800148a: 4b67 ldr r3, [pc, #412] ; (8001628 ) + 800148c: 601a str r2, [r3, #0] } /* It is time for measurement */ if (tim21_elapsed_period == 1) - 8001462: 4b67 ldr r3, [pc, #412] ; (8001600 ) - 8001464: 781b ldrb r3, [r3, #0] - 8001466: 2b01 cmp r3, #1 - 8001468: d126 bne.n 80014b8 + 800148e: 4b67 ldr r3, [pc, #412] ; (800162c ) + 8001490: 781b ldrb r3, [r3, #0] + 8001492: 2b01 cmp r3, #1 + 8001494: d126 bne.n 80014e4 { /* TODO: Check the data */ /* Read SHT4x data (always connected) */ sht4x_measure(&T_SHT4x, &RH_SHT4x); - 800146a: 4a66 ldr r2, [pc, #408] ; (8001604 ) - 800146c: 4b66 ldr r3, [pc, #408] ; (8001608 ) - 800146e: 0011 movs r1, r2 - 8001470: 0018 movs r0, r3 - 8001472: f001 f987 bl 8002784 + 8001496: 4a66 ldr r2, [pc, #408] ; (8001630 ) + 8001498: 4b66 ldr r3, [pc, #408] ; (8001634 ) + 800149a: 0011 movs r1, r2 + 800149c: 0018 movs r0, r3 + 800149e: f001 f993 bl 80027c8 /* Read SCD4x data (if connected) */ if (scd4x_is_connected == 1) - 8001476: 1dbb adds r3, r7, #6 - 8001478: 781b ldrb r3, [r3, #0] - 800147a: 2b01 cmp r3, #1 - 800147c: d110 bne.n 80014a0 + 80014a2: 1dbb adds r3, r7, #6 + 80014a4: 781b ldrb r3, [r3, #0] + 80014a6: 2b01 cmp r3, #1 + 80014a8: d110 bne.n 80014cc { scd4x_read_measurement(&CO2, - 800147e: 4a63 ldr r2, [pc, #396] ; (800160c ) - 8001480: 4963 ldr r1, [pc, #396] ; (8001610 ) - 8001482: 4b64 ldr r3, [pc, #400] ; (8001614 ) - 8001484: 0018 movs r0, r3 - 8001486: f001 f909 bl 800269c + 80014aa: 4a63 ldr r2, [pc, #396] ; (8001638 ) + 80014ac: 4963 ldr r1, [pc, #396] ; (800163c ) + 80014ae: 4b64 ldr r3, [pc, #400] ; (8001640 ) + 80014b0: 0018 movs r0, r3 + 80014b2: f001 f911 bl 80026d8 &T_SCD4x, &RH_SCD4x); if (CO2 > 0) { - 800148a: 4b62 ldr r3, [pc, #392] ; (8001614 ) - 800148c: 681b ldr r3, [r3, #0] - 800148e: 2b00 cmp r3, #0 - 8001490: dd03 ble.n 800149a + 80014b6: 4b62 ldr r3, [pc, #392] ; (8001640 ) + 80014b8: 681b ldr r3, [r3, #0] + 80014ba: 2b00 cmp r3, #0 + 80014bc: dd03 ble.n 80014c6 co2_valid = 1; - 8001492: 4b61 ldr r3, [pc, #388] ; (8001618 ) - 8001494: 2201 movs r2, #1 - 8001496: 701a strb r2, [r3, #0] - 8001498: e002 b.n 80014a0 + 80014be: 4b61 ldr r3, [pc, #388] ; (8001644 ) + 80014c0: 2201 movs r2, #1 + 80014c2: 701a strb r2, [r3, #0] + 80014c4: e002 b.n 80014cc } else { co2_valid = 0; - 800149a: 4b5f ldr r3, [pc, #380] ; (8001618 ) - 800149c: 2200 movs r2, #0 - 800149e: 701a strb r2, [r3, #0] + 80014c6: 4b5f ldr r3, [pc, #380] ; (8001644 ) + 80014c8: 2200 movs r2, #0 + 80014ca: 701a strb r2, [r3, #0] } } /* Read SPS30 data (if connected) */ if (sps30_is_connected == 1) - 80014a0: 1d7b adds r3, r7, #5 - 80014a2: 781b ldrb r3, [r3, #0] - 80014a4: 2b01 cmp r3, #1 - 80014a6: d104 bne.n 80014b2 + 80014cc: 1d7b adds r3, r7, #5 + 80014ce: 781b ldrb r3, [r3, #0] + 80014d0: 2b01 cmp r3, #1 + 80014d2: d104 bne.n 80014de { sps30_read_measured_values(sps30_measured_data, 10); - 80014a8: 4b5c ldr r3, [pc, #368] ; (800161c ) - 80014aa: 210a movs r1, #10 - 80014ac: 0018 movs r0, r3 - 80014ae: f001 f9d3 bl 8002858 + 80014d4: 4b5c ldr r3, [pc, #368] ; (8001648 ) + 80014d6: 210a movs r1, #10 + 80014d8: 0018 movs r0, r3 + 80014da: f001 f9e3 bl 80028a4 } /* TODO: Process data and light a desired color of LED */ /* TODO: Add hystheresis */ /* Reset the TIM21 Elapsed Period Flag */ tim21_elapsed_period = 0; - 80014b2: 4b53 ldr r3, [pc, #332] ; (8001600 ) - 80014b4: 2200 movs r2, #0 - 80014b6: 701a strb r2, [r3, #0] + 80014de: 4b53 ldr r3, [pc, #332] ; (800162c ) + 80014e0: 2200 movs r2, #0 + 80014e2: 701a strb r2, [r3, #0] } /* TEST END */ if (sensor_config.led_on) { - 80014b8: 4b41 ldr r3, [pc, #260] ; (80015c0 ) - 80014ba: 781b ldrb r3, [r3, #0] - 80014bc: 2b00 cmp r3, #0 - 80014be: d06c beq.n 800159a + 80014e4: 4b41 ldr r3, [pc, #260] ; (80015ec ) + 80014e6: 781b ldrb r3, [r3, #0] + 80014e8: 2b00 cmp r3, #0 + 80014ea: d06c beq.n 80015c6 if (co2_valid == 1) { - 80014c0: 4b55 ldr r3, [pc, #340] ; (8001618 ) - 80014c2: 781b ldrb r3, [r3, #0] - 80014c4: 2b01 cmp r3, #1 - 80014c6: d155 bne.n 8001574 + 80014ec: 4b55 ldr r3, [pc, #340] ; (8001644 ) + 80014ee: 781b ldrb r3, [r3, #0] + 80014f0: 2b01 cmp r3, #1 + 80014f2: d155 bne.n 80015a0 if (CO2 <= sensor_config.led_co2_alert_limit1) { - 80014c8: 4b3d ldr r3, [pc, #244] ; (80015c0 ) - 80014ca: 88db ldrh r3, [r3, #6] - 80014cc: 001a movs r2, r3 - 80014ce: 4b51 ldr r3, [pc, #324] ; (8001614 ) - 80014d0: 681b ldr r3, [r3, #0] - 80014d2: 429a cmp r2, r3 - 80014d4: db12 blt.n 80014fc + 80014f4: 4b3d ldr r3, [pc, #244] ; (80015ec ) + 80014f6: 88db ldrh r3, [r3, #6] + 80014f8: 001a movs r2, r3 + 80014fa: 4b51 ldr r3, [pc, #324] ; (8001640 ) + 80014fc: 681b ldr r3, [r3, #0] + 80014fe: 429a cmp r2, r3 + 8001500: db12 blt.n 8001528 /* CO2 is OK -> GREEN */ LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin); - 80014d6: 23a0 movs r3, #160 ; 0xa0 - 80014d8: 05db lsls r3, r3, #23 - 80014da: 2180 movs r1, #128 ; 0x80 - 80014dc: 0018 movs r0, r3 - 80014de: f7ff fecc bl 800127a + 8001502: 23a0 movs r3, #160 ; 0xa0 + 8001504: 05db lsls r3, r3, #23 + 8001506: 2180 movs r1, #128 ; 0x80 + 8001508: 0018 movs r0, r3 + 800150a: f7ff fecc bl 80012a6 LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin); - 80014e2: 23a0 movs r3, #160 ; 0xa0 - 80014e4: 05db lsls r3, r3, #23 - 80014e6: 2140 movs r1, #64 ; 0x40 - 80014e8: 0018 movs r0, r3 - 80014ea: f7ff fed2 bl 8001292 + 800150e: 23a0 movs r3, #160 ; 0xa0 + 8001510: 05db lsls r3, r3, #23 + 8001512: 2140 movs r1, #64 ; 0x40 + 8001514: 0018 movs r0, r3 + 8001516: f7ff fed2 bl 80012be LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); - 80014ee: 23a0 movs r3, #160 ; 0xa0 - 80014f0: 05db lsls r3, r3, #23 - 80014f2: 2120 movs r1, #32 - 80014f4: 0018 movs r0, r3 - 80014f6: f7ff fec0 bl 800127a - 80014fa: e74b b.n 8001394 + 800151a: 23a0 movs r3, #160 ; 0xa0 + 800151c: 05db lsls r3, r3, #23 + 800151e: 2120 movs r1, #32 + 8001520: 0018 movs r0, r3 + 8001522: f7ff fec0 bl 80012a6 + 8001526: e74b b.n 80013c0 } else if ((sensor_config.led_co2_alert_limit1 < CO2) && (CO2 <= sensor_config.led_co2_alert_limit2)) { - 80014fc: 4b30 ldr r3, [pc, #192] ; (80015c0 ) - 80014fe: 88db ldrh r3, [r3, #6] - 8001500: 001a movs r2, r3 - 8001502: 4b44 ldr r3, [pc, #272] ; (8001614 ) - 8001504: 681b ldr r3, [r3, #0] - 8001506: 429a cmp r2, r3 - 8001508: da19 bge.n 800153e - 800150a: 4b2d ldr r3, [pc, #180] ; (80015c0 ) - 800150c: 891b ldrh r3, [r3, #8] - 800150e: 001a movs r2, r3 - 8001510: 4b40 ldr r3, [pc, #256] ; (8001614 ) - 8001512: 681b ldr r3, [r3, #0] - 8001514: 429a cmp r2, r3 - 8001516: db12 blt.n 800153e + 8001528: 4b30 ldr r3, [pc, #192] ; (80015ec ) + 800152a: 88db ldrh r3, [r3, #6] + 800152c: 001a movs r2, r3 + 800152e: 4b44 ldr r3, [pc, #272] ; (8001640 ) + 8001530: 681b ldr r3, [r3, #0] + 8001532: 429a cmp r2, r3 + 8001534: da19 bge.n 800156a + 8001536: 4b2d ldr r3, [pc, #180] ; (80015ec ) + 8001538: 891b ldrh r3, [r3, #8] + 800153a: 001a movs r2, r3 + 800153c: 4b40 ldr r3, [pc, #256] ; (8001640 ) + 800153e: 681b ldr r3, [r3, #0] + 8001540: 429a cmp r2, r3 + 8001542: db12 blt.n 800156a /* CO2 is NOT OK -> YELLOW */ LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); - 8001518: 23a0 movs r3, #160 ; 0xa0 - 800151a: 05db lsls r3, r3, #23 - 800151c: 2180 movs r1, #128 ; 0x80 - 800151e: 0018 movs r0, r3 - 8001520: f7ff feb7 bl 8001292 + 8001544: 23a0 movs r3, #160 ; 0xa0 + 8001546: 05db lsls r3, r3, #23 + 8001548: 2180 movs r1, #128 ; 0x80 + 800154a: 0018 movs r0, r3 + 800154c: f7ff feb7 bl 80012be LL_GPIO_ResetOutputPin(LED_G_GPIO_Port, LED_G_Pin); - 8001524: 23a0 movs r3, #160 ; 0xa0 - 8001526: 05db lsls r3, r3, #23 - 8001528: 2140 movs r1, #64 ; 0x40 - 800152a: 0018 movs r0, r3 - 800152c: f7ff feb1 bl 8001292 + 8001550: 23a0 movs r3, #160 ; 0xa0 + 8001552: 05db lsls r3, r3, #23 + 8001554: 2140 movs r1, #64 ; 0x40 + 8001556: 0018 movs r0, r3 + 8001558: f7ff feb1 bl 80012be LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); - 8001530: 23a0 movs r3, #160 ; 0xa0 - 8001532: 05db lsls r3, r3, #23 - 8001534: 2120 movs r1, #32 - 8001536: 0018 movs r0, r3 - 8001538: f7ff fe9f bl 800127a - 800153c: e03f b.n 80015be + 800155c: 23a0 movs r3, #160 ; 0xa0 + 800155e: 05db lsls r3, r3, #23 + 8001560: 2120 movs r1, #32 + 8001562: 0018 movs r0, r3 + 8001564: f7ff fe9f bl 80012a6 + 8001568: e03f b.n 80015ea } else if (sensor_config.led_co2_alert_limit2 < CO2) { - 800153e: 4b20 ldr r3, [pc, #128] ; (80015c0 ) - 8001540: 891b ldrh r3, [r3, #8] - 8001542: 001a movs r2, r3 - 8001544: 4b33 ldr r3, [pc, #204] ; (8001614 ) - 8001546: 681b ldr r3, [r3, #0] - 8001548: 429a cmp r2, r3 - 800154a: db00 blt.n 800154e - 800154c: e722 b.n 8001394 + 800156a: 4b20 ldr r3, [pc, #128] ; (80015ec ) + 800156c: 891b ldrh r3, [r3, #8] + 800156e: 001a movs r2, r3 + 8001570: 4b33 ldr r3, [pc, #204] ; (8001640 ) + 8001572: 681b ldr r3, [r3, #0] + 8001574: 429a cmp r2, r3 + 8001576: db00 blt.n 800157a + 8001578: e722 b.n 80013c0 /* CO2 is CRITICAL -> RED */ LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); - 800154e: 23a0 movs r3, #160 ; 0xa0 - 8001550: 05db lsls r3, r3, #23 - 8001552: 2180 movs r1, #128 ; 0x80 - 8001554: 0018 movs r0, r3 - 8001556: f7ff fe9c bl 8001292 + 800157a: 23a0 movs r3, #160 ; 0xa0 + 800157c: 05db lsls r3, r3, #23 + 800157e: 2180 movs r1, #128 ; 0x80 + 8001580: 0018 movs r0, r3 + 8001582: f7ff fe9c bl 80012be LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); - 800155a: 23a0 movs r3, #160 ; 0xa0 - 800155c: 05db lsls r3, r3, #23 - 800155e: 2140 movs r1, #64 ; 0x40 - 8001560: 0018 movs r0, r3 - 8001562: f7ff fe8a bl 800127a + 8001586: 23a0 movs r3, #160 ; 0xa0 + 8001588: 05db lsls r3, r3, #23 + 800158a: 2140 movs r1, #64 ; 0x40 + 800158c: 0018 movs r0, r3 + 800158e: f7ff fe8a bl 80012a6 LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); - 8001566: 23a0 movs r3, #160 ; 0xa0 - 8001568: 05db lsls r3, r3, #23 - 800156a: 2120 movs r1, #32 - 800156c: 0018 movs r0, r3 - 800156e: f7ff fe84 bl 800127a - 8001572: e70f b.n 8001394 + 8001592: 23a0 movs r3, #160 ; 0xa0 + 8001594: 05db lsls r3, r3, #23 + 8001596: 2120 movs r1, #32 + 8001598: 0018 movs r0, r3 + 800159a: f7ff fe84 bl 80012a6 + 800159e: e70f b.n 80013c0 } } else { LL_GPIO_ResetOutputPin(LED_R_GPIO_Port, LED_R_Pin); - 8001574: 23a0 movs r3, #160 ; 0xa0 - 8001576: 05db lsls r3, r3, #23 - 8001578: 2180 movs r1, #128 ; 0x80 - 800157a: 0018 movs r0, r3 - 800157c: f7ff fe89 bl 8001292 + 80015a0: 23a0 movs r3, #160 ; 0xa0 + 80015a2: 05db lsls r3, r3, #23 + 80015a4: 2180 movs r1, #128 ; 0x80 + 80015a6: 0018 movs r0, r3 + 80015a8: f7ff fe89 bl 80012be LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); - 8001580: 23a0 movs r3, #160 ; 0xa0 - 8001582: 05db lsls r3, r3, #23 - 8001584: 2140 movs r1, #64 ; 0x40 - 8001586: 0018 movs r0, r3 - 8001588: f7ff fe77 bl 800127a + 80015ac: 23a0 movs r3, #160 ; 0xa0 + 80015ae: 05db lsls r3, r3, #23 + 80015b0: 2140 movs r1, #64 ; 0x40 + 80015b2: 0018 movs r0, r3 + 80015b4: f7ff fe77 bl 80012a6 LL_GPIO_ResetOutputPin(LED_B_GPIO_Port, LED_B_Pin); - 800158c: 23a0 movs r3, #160 ; 0xa0 - 800158e: 05db lsls r3, r3, #23 - 8001590: 2120 movs r1, #32 - 8001592: 0018 movs r0, r3 - 8001594: f7ff fe7d bl 8001292 - 8001598: e6fc b.n 8001394 + 80015b8: 23a0 movs r3, #160 ; 0xa0 + 80015ba: 05db lsls r3, r3, #23 + 80015bc: 2120 movs r1, #32 + 80015be: 0018 movs r0, r3 + 80015c0: f7ff fe7d bl 80012be + 80015c4: e6fc b.n 80013c0 } } else { LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin); - 800159a: 23a0 movs r3, #160 ; 0xa0 - 800159c: 05db lsls r3, r3, #23 - 800159e: 2180 movs r1, #128 ; 0x80 - 80015a0: 0018 movs r0, r3 - 80015a2: f7ff fe6a bl 800127a + 80015c6: 23a0 movs r3, #160 ; 0xa0 + 80015c8: 05db lsls r3, r3, #23 + 80015ca: 2180 movs r1, #128 ; 0x80 + 80015cc: 0018 movs r0, r3 + 80015ce: f7ff fe6a bl 80012a6 LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); - 80015a6: 23a0 movs r3, #160 ; 0xa0 - 80015a8: 05db lsls r3, r3, #23 - 80015aa: 2140 movs r1, #64 ; 0x40 - 80015ac: 0018 movs r0, r3 - 80015ae: f7ff fe64 bl 800127a + 80015d2: 23a0 movs r3, #160 ; 0xa0 + 80015d4: 05db lsls r3, r3, #23 + 80015d6: 2140 movs r1, #64 ; 0x40 + 80015d8: 0018 movs r0, r3 + 80015da: f7ff fe64 bl 80012a6 LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); - 80015b2: 23a0 movs r3, #160 ; 0xa0 - 80015b4: 05db lsls r3, r3, #23 - 80015b6: 2120 movs r1, #32 - 80015b8: 0018 movs r0, r3 - 80015ba: f7ff fe5e bl 800127a + 80015de: 23a0 movs r3, #160 ; 0xa0 + 80015e0: 05db lsls r3, r3, #23 + 80015e2: 2120 movs r1, #32 + 80015e4: 0018 movs r0, r3 + 80015e6: f7ff fe5e bl 80012a6 if (lpuart1_rx_done == 1) - 80015be: e6e9 b.n 8001394 - 80015c0: 2000004c .word 0x2000004c - 80015c4: 000005dc .word 0x000005dc - 80015c8: 00000bb8 .word 0x00000bb8 - 80015cc: 40005400 .word 0x40005400 - 80015d0: 40004800 .word 0x40004800 - 80015d4: 40010800 .word 0x40010800 - 80015d8: 20000030 .word 0x20000030 - 80015dc: 20000031 .word 0x20000031 - 80015e0: 2000002e .word 0x2000002e - 80015e4: 2000007c .word 0x2000007c - 80015e8: 20000024 .word 0x20000024 - 80015ec: 20000026 .word 0x20000026 - 80015f0: 20000025 .word 0x20000025 - 80015f4: 08003638 .word 0x08003638 - 80015f8: 00b71b00 .word 0x00b71b00 - 80015fc: 20000028 .word 0x20000028 - 8001600: 20000032 .word 0x20000032 - 8001604: 20000078 .word 0x20000078 - 8001608: 20000038 .word 0x20000038 - 800160c: 20000044 .word 0x20000044 - 8001610: 20000040 .word 0x20000040 - 8001614: 20000074 .word 0x20000074 - 8001618: 20000027 .word 0x20000027 - 800161c: 20000060 .word 0x20000060 + 80015ea: e6e9 b.n 80013c0 + 80015ec: 2000004c .word 0x2000004c + 80015f0: 000005dc .word 0x000005dc + 80015f4: 00000bb8 .word 0x00000bb8 + 80015f8: 40005400 .word 0x40005400 + 80015fc: 40004800 .word 0x40004800 + 8001600: 40010800 .word 0x40010800 + 8001604: 20000030 .word 0x20000030 + 8001608: 20000031 .word 0x20000031 + 800160c: 2000002e .word 0x2000002e + 8001610: 2000007c .word 0x2000007c + 8001614: 20000024 .word 0x20000024 + 8001618: 20000026 .word 0x20000026 + 800161c: 20000025 .word 0x20000025 + 8001620: 08003684 .word 0x08003684 + 8001624: 00b71b00 .word 0x00b71b00 + 8001628: 20000028 .word 0x20000028 + 800162c: 20000032 .word 0x20000032 + 8001630: 20000078 .word 0x20000078 + 8001634: 20000038 .word 0x20000038 + 8001638: 20000044 .word 0x20000044 + 800163c: 20000040 .word 0x20000040 + 8001640: 20000074 .word 0x20000074 + 8001644: 20000027 .word 0x20000027 + 8001648: 20000060 .word 0x20000060 -08001620 : +0800164c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8001620: b580 push {r7, lr} - 8001622: af00 add r7, sp, #0 + 800164c: b580 push {r7, lr} + 800164e: af00 add r7, sp, #0 LL_FLASH_SetLatency(LL_FLASH_LATENCY_0); - 8001624: 2000 movs r0, #0 - 8001626: f7ff fd93 bl 8001150 + 8001650: 2000 movs r0, #0 + 8001652: f7ff fd93 bl 800117c while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_0) - 800162a: 46c0 nop ; (mov r8, r8) - 800162c: f7ff fda4 bl 8001178 - 8001630: 1e03 subs r3, r0, #0 - 8001632: d1fb bne.n 800162c + 8001656: 46c0 nop ; (mov r8, r8) + 8001658: f7ff fda4 bl 80011a4 + 800165c: 1e03 subs r3, r0, #0 + 800165e: d1fb bne.n 8001658 { } LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - 8001634: 2380 movs r3, #128 ; 0x80 - 8001636: 011b lsls r3, r3, #4 - 8001638: 0018 movs r0, r3 - 800163a: f7ff fda9 bl 8001190 + 8001660: 2380 movs r3, #128 ; 0x80 + 8001662: 011b lsls r3, r3, #4 + 8001664: 0018 movs r0, r3 + 8001666: f7ff fda9 bl 80011bc LL_RCC_HSI_Enable(); - 800163e: f7ff fc41 bl 8000ec4 + 800166a: f7ff fc41 bl 8000ef0 /* Wait till HSI is ready */ while(LL_RCC_HSI_IsReady() != 1) - 8001642: 46c0 nop ; (mov r8, r8) - 8001644: f7ff fc4c bl 8000ee0 - 8001648: 0003 movs r3, r0 - 800164a: 2b01 cmp r3, #1 - 800164c: d1fa bne.n 8001644 + 800166e: 46c0 nop ; (mov r8, r8) + 8001670: f7ff fc4c bl 8000f0c + 8001674: 0003 movs r3, r0 + 8001676: 2b01 cmp r3, #1 + 8001678: d1fa bne.n 8001670 { } LL_RCC_HSI_SetCalibTrimming(16); - 800164e: 2010 movs r0, #16 - 8001650: f7ff fc56 bl 8000f00 + 800167a: 2010 movs r0, #16 + 800167c: f7ff fc56 bl 8000f2c LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLL_MUL_3, LL_RCC_PLL_DIV_4); - 8001654: 23c0 movs r3, #192 ; 0xc0 - 8001656: 041b lsls r3, r3, #16 - 8001658: 001a movs r2, r3 - 800165a: 2100 movs r1, #0 - 800165c: 2000 movs r0, #0 - 800165e: f7ff fd19 bl 8001094 + 8001680: 23c0 movs r3, #192 ; 0xc0 + 8001682: 041b lsls r3, r3, #16 + 8001684: 001a movs r2, r3 + 8001686: 2100 movs r1, #0 + 8001688: 2000 movs r0, #0 + 800168a: f7ff fd19 bl 80010c0 LL_RCC_PLL_Enable(); - 8001662: f7ff fcf5 bl 8001050 + 800168e: f7ff fcf5 bl 800107c /* Wait till PLL is ready */ while(LL_RCC_PLL_IsReady() != 1) - 8001666: 46c0 nop ; (mov r8, r8) - 8001668: f7ff fd00 bl 800106c - 800166c: 0003 movs r3, r0 - 800166e: 2b01 cmp r3, #1 - 8001670: d1fa bne.n 8001668 + 8001692: 46c0 nop ; (mov r8, r8) + 8001694: f7ff fd00 bl 8001098 + 8001698: 0003 movs r3, r0 + 800169a: 2b01 cmp r3, #1 + 800169c: d1fa bne.n 8001694 { } LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); - 8001672: 2000 movs r0, #0 - 8001674: f7ff fc7a bl 8000f6c + 800169e: 2000 movs r0, #0 + 80016a0: f7ff fc7a bl 8000f98 LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); - 8001678: 2000 movs r0, #0 - 800167a: f7ff fc8b bl 8000f94 + 80016a4: 2000 movs r0, #0 + 80016a6: f7ff fc8b bl 8000fc0 LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - 800167e: 2000 movs r0, #0 - 8001680: f7ff fc9e bl 8000fc0 + 80016aa: 2000 movs r0, #0 + 80016ac: f7ff fc9e bl 8000fec LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - 8001684: 2003 movs r0, #3 - 8001686: f7ff fc51 bl 8000f2c + 80016b0: 2003 movs r0, #3 + 80016b2: f7ff fc51 bl 8000f58 /* Wait till System clock is ready */ while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - 800168a: 46c0 nop ; (mov r8, r8) - 800168c: f7ff fc62 bl 8000f54 - 8001690: 0003 movs r3, r0 - 8001692: 2b0c cmp r3, #12 - 8001694: d1fa bne.n 800168c + 80016b6: 46c0 nop ; (mov r8, r8) + 80016b8: f7ff fc62 bl 8000f80 + 80016bc: 0003 movs r3, r0 + 80016be: 2b0c cmp r3, #12 + 80016c0: d1fa bne.n 80016b8 { } LL_Init1msTick(12000000); - 8001696: 4b09 ldr r3, [pc, #36] ; (80016bc ) - 8001698: 0018 movs r0, r3 - 800169a: f001 ff55 bl 8003548 + 80016c2: 4b09 ldr r3, [pc, #36] ; (80016e8 ) + 80016c4: 0018 movs r0, r3 + 80016c6: f001 ff65 bl 8003594 LL_SetSystemCoreClock(12000000); - 800169e: 4b07 ldr r3, [pc, #28] ; (80016bc ) - 80016a0: 0018 movs r0, r3 - 80016a2: f001 ff83 bl 80035ac + 80016ca: 4b07 ldr r3, [pc, #28] ; (80016e8 ) + 80016cc: 0018 movs r0, r3 + 80016ce: f001 ff93 bl 80035f8 LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1); - 80016a6: 2000 movs r0, #0 - 80016a8: f7ff fca0 bl 8000fec + 80016d2: 2000 movs r0, #0 + 80016d4: f7ff fca0 bl 8001018 LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1); - 80016ac: 23c0 movs r3, #192 ; 0xc0 - 80016ae: 029b lsls r3, r3, #10 - 80016b0: 0018 movs r0, r3 - 80016b2: f7ff fcb1 bl 8001018 + 80016d8: 23c0 movs r3, #192 ; 0xc0 + 80016da: 029b lsls r3, r3, #10 + 80016dc: 0018 movs r0, r3 + 80016de: f7ff fcb1 bl 8001044 } - 80016b6: 46c0 nop ; (mov r8, r8) - 80016b8: 46bd mov sp, r7 - 80016ba: bd80 pop {r7, pc} - 80016bc: 00b71b00 .word 0x00b71b00 + 80016e2: 46c0 nop ; (mov r8, r8) + 80016e4: 46bd mov sp, r7 + 80016e6: bd80 pop {r7, pc} + 80016e8: 00b71b00 .word 0x00b71b00 -080016c0 : +080016ec : * @brief I2C1 Initialization Function * @param None * @retval None */ static void MX_I2C1_Init(void) { - 80016c0: b590 push {r4, r7, lr} - 80016c2: b08f sub sp, #60 ; 0x3c - 80016c4: af00 add r7, sp, #0 + 80016ec: b590 push {r4, r7, lr} + 80016ee: b08f sub sp, #60 ; 0x3c + 80016f0: af00 add r7, sp, #0 /* USER CODE BEGIN I2C1_Init 0 */ /* USER CODE END I2C1_Init 0 */ LL_I2C_InitTypeDef I2C_InitStruct = {0}; - 80016c6: 241c movs r4, #28 - 80016c8: 193b adds r3, r7, r4 - 80016ca: 0018 movs r0, r3 - 80016cc: 231c movs r3, #28 - 80016ce: 001a movs r2, r3 - 80016d0: 2100 movs r1, #0 - 80016d2: f001 ff9d bl 8003610 + 80016f2: 241c movs r4, #28 + 80016f4: 193b adds r3, r7, r4 + 80016f6: 0018 movs r0, r3 + 80016f8: 231c movs r3, #28 + 80016fa: 001a movs r2, r3 + 80016fc: 2100 movs r1, #0 + 80016fe: f001 ffad bl 800365c LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80016d6: 1d3b adds r3, r7, #4 - 80016d8: 0018 movs r0, r3 - 80016da: 2318 movs r3, #24 - 80016dc: 001a movs r2, r3 - 80016de: 2100 movs r1, #0 - 80016e0: f001 ff96 bl 8003610 + 8001702: 1d3b adds r3, r7, #4 + 8001704: 0018 movs r0, r3 + 8001706: 2318 movs r3, #24 + 8001708: 001a movs r2, r3 + 800170a: 2100 movs r1, #0 + 800170c: f001 ffa6 bl 800365c LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); - 80016e4: 2001 movs r0, #1 - 80016e6: f7ff fd1d bl 8001124 + 8001710: 2001 movs r0, #1 + 8001712: f7ff fd1d bl 8001150 /**I2C1 GPIO Configuration PA9 ------> I2C1_SCL PA10 ------> I2C1_SDA */ GPIO_InitStruct.Pin = LL_GPIO_PIN_9; - 80016ea: 1d3b adds r3, r7, #4 - 80016ec: 2280 movs r2, #128 ; 0x80 - 80016ee: 0092 lsls r2, r2, #2 - 80016f0: 601a str r2, [r3, #0] + 8001716: 1d3b adds r3, r7, #4 + 8001718: 2280 movs r2, #128 ; 0x80 + 800171a: 0092 lsls r2, r2, #2 + 800171c: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 80016f2: 1d3b adds r3, r7, #4 - 80016f4: 2202 movs r2, #2 - 80016f6: 605a str r2, [r3, #4] + 800171e: 1d3b adds r3, r7, #4 + 8001720: 2202 movs r2, #2 + 8001722: 605a str r2, [r3, #4] GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 80016f8: 1d3b adds r3, r7, #4 - 80016fa: 2203 movs r2, #3 - 80016fc: 609a str r2, [r3, #8] + 8001724: 1d3b adds r3, r7, #4 + 8001726: 2203 movs r2, #3 + 8001728: 609a str r2, [r3, #8] GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; - 80016fe: 1d3b adds r3, r7, #4 - 8001700: 2201 movs r2, #1 - 8001702: 60da str r2, [r3, #12] + 800172a: 1d3b adds r3, r7, #4 + 800172c: 2201 movs r2, #1 + 800172e: 60da str r2, [r3, #12] GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; - 8001704: 1d3b adds r3, r7, #4 - 8001706: 2201 movs r2, #1 - 8001708: 611a str r2, [r3, #16] + 8001730: 1d3b adds r3, r7, #4 + 8001732: 2201 movs r2, #1 + 8001734: 611a str r2, [r3, #16] GPIO_InitStruct.Alternate = LL_GPIO_AF_1; - 800170a: 1d3b adds r3, r7, #4 - 800170c: 2201 movs r2, #1 - 800170e: 615a str r2, [r3, #20] + 8001736: 1d3b adds r3, r7, #4 + 8001738: 2201 movs r2, #1 + 800173a: 615a str r2, [r3, #20] LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001710: 1d3a adds r2, r7, #4 - 8001712: 23a0 movs r3, #160 ; 0xa0 - 8001714: 05db lsls r3, r3, #23 - 8001716: 0011 movs r1, r2 - 8001718: 0018 movs r0, r3 - 800171a: f001 fb09 bl 8002d30 + 800173c: 1d3a adds r2, r7, #4 + 800173e: 23a0 movs r3, #160 ; 0xa0 + 8001740: 05db lsls r3, r3, #23 + 8001742: 0011 movs r1, r2 + 8001744: 0018 movs r0, r3 + 8001746: f001 fb19 bl 8002d7c GPIO_InitStruct.Pin = LL_GPIO_PIN_10; - 800171e: 1d3b adds r3, r7, #4 - 8001720: 2280 movs r2, #128 ; 0x80 - 8001722: 00d2 lsls r2, r2, #3 - 8001724: 601a str r2, [r3, #0] + 800174a: 1d3b adds r3, r7, #4 + 800174c: 2280 movs r2, #128 ; 0x80 + 800174e: 00d2 lsls r2, r2, #3 + 8001750: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 8001726: 1d3b adds r3, r7, #4 - 8001728: 2202 movs r2, #2 - 800172a: 605a str r2, [r3, #4] + 8001752: 1d3b adds r3, r7, #4 + 8001754: 2202 movs r2, #2 + 8001756: 605a str r2, [r3, #4] GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 800172c: 1d3b adds r3, r7, #4 - 800172e: 2203 movs r2, #3 - 8001730: 609a str r2, [r3, #8] + 8001758: 1d3b adds r3, r7, #4 + 800175a: 2203 movs r2, #3 + 800175c: 609a str r2, [r3, #8] GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; - 8001732: 1d3b adds r3, r7, #4 - 8001734: 2201 movs r2, #1 - 8001736: 60da str r2, [r3, #12] + 800175e: 1d3b adds r3, r7, #4 + 8001760: 2201 movs r2, #1 + 8001762: 60da str r2, [r3, #12] GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; - 8001738: 1d3b adds r3, r7, #4 - 800173a: 2201 movs r2, #1 - 800173c: 611a str r2, [r3, #16] + 8001764: 1d3b adds r3, r7, #4 + 8001766: 2201 movs r2, #1 + 8001768: 611a str r2, [r3, #16] GPIO_InitStruct.Alternate = LL_GPIO_AF_1; - 800173e: 1d3b adds r3, r7, #4 - 8001740: 2201 movs r2, #1 - 8001742: 615a str r2, [r3, #20] + 800176a: 1d3b adds r3, r7, #4 + 800176c: 2201 movs r2, #1 + 800176e: 615a str r2, [r3, #20] LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001744: 1d3a adds r2, r7, #4 - 8001746: 23a0 movs r3, #160 ; 0xa0 - 8001748: 05db lsls r3, r3, #23 - 800174a: 0011 movs r1, r2 - 800174c: 0018 movs r0, r3 - 800174e: f001 faef bl 8002d30 + 8001770: 1d3a adds r2, r7, #4 + 8001772: 23a0 movs r3, #160 ; 0xa0 + 8001774: 05db lsls r3, r3, #23 + 8001776: 0011 movs r1, r2 + 8001778: 0018 movs r0, r3 + 800177a: f001 faff bl 8002d7c /* Peripheral clock enable */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1); - 8001752: 2380 movs r3, #128 ; 0x80 - 8001754: 039b lsls r3, r3, #14 - 8001756: 0018 movs r0, r3 - 8001758: f7ff fcb8 bl 80010cc + 800177e: 2380 movs r3, #128 ; 0x80 + 8001780: 039b lsls r3, r3, #14 + 8001782: 0018 movs r0, r3 + 8001784: f7ff fcb8 bl 80010f8 /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ /** I2C Initialization */ LL_I2C_EnableAutoEndMode(I2C1); - 800175c: 4b1a ldr r3, [pc, #104] ; (80017c8 ) - 800175e: 0018 movs r0, r3 - 8001760: f7ff fa60 bl 8000c24 + 8001788: 4b1a ldr r3, [pc, #104] ; (80017f4 ) + 800178a: 0018 movs r0, r3 + 800178c: f7ff fa4a bl 8000c24 LL_I2C_DisableOwnAddress2(I2C1); - 8001764: 4b18 ldr r3, [pc, #96] ; (80017c8 ) - 8001766: 0018 movs r0, r3 - 8001768: f7ff fa4c bl 8000c04 + 8001790: 4b18 ldr r3, [pc, #96] ; (80017f4 ) + 8001792: 0018 movs r0, r3 + 8001794: f7ff fa36 bl 8000c04 LL_I2C_DisableGeneralCall(I2C1); - 800176c: 4b16 ldr r3, [pc, #88] ; (80017c8 ) - 800176e: 0018 movs r0, r3 - 8001770: f7ff fa22 bl 8000bb8 + 8001798: 4b16 ldr r3, [pc, #88] ; (80017f4 ) + 800179a: 0018 movs r0, r3 + 800179c: f7ff fa0c bl 8000bb8 LL_I2C_EnableClockStretching(I2C1); - 8001774: 4b14 ldr r3, [pc, #80] ; (80017c8 ) - 8001776: 0018 movs r0, r3 - 8001778: f7ff fa0e bl 8000b98 + 80017a0: 4b14 ldr r3, [pc, #80] ; (80017f4 ) + 80017a2: 0018 movs r0, r3 + 80017a4: f7ff f9f8 bl 8000b98 I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C; - 800177c: 0021 movs r1, r4 - 800177e: 187b adds r3, r7, r1 - 8001780: 2200 movs r2, #0 - 8001782: 601a str r2, [r3, #0] + 80017a8: 0021 movs r1, r4 + 80017aa: 187b adds r3, r7, r1 + 80017ac: 2200 movs r2, #0 + 80017ae: 601a str r2, [r3, #0] I2C_InitStruct.Timing = 0x40000A0B; - 8001784: 187b adds r3, r7, r1 - 8001786: 4a11 ldr r2, [pc, #68] ; (80017cc ) - 8001788: 605a str r2, [r3, #4] + 80017b0: 187b adds r3, r7, r1 + 80017b2: 4a11 ldr r2, [pc, #68] ; (80017f8 ) + 80017b4: 605a str r2, [r3, #4] I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; - 800178a: 187b adds r3, r7, r1 - 800178c: 2200 movs r2, #0 - 800178e: 609a str r2, [r3, #8] + 80017b6: 187b adds r3, r7, r1 + 80017b8: 2200 movs r2, #0 + 80017ba: 609a str r2, [r3, #8] I2C_InitStruct.DigitalFilter = 0; - 8001790: 187b adds r3, r7, r1 - 8001792: 2200 movs r2, #0 - 8001794: 60da str r2, [r3, #12] + 80017bc: 187b adds r3, r7, r1 + 80017be: 2200 movs r2, #0 + 80017c0: 60da str r2, [r3, #12] I2C_InitStruct.OwnAddress1 = 0; - 8001796: 187b adds r3, r7, r1 - 8001798: 2200 movs r2, #0 - 800179a: 611a str r2, [r3, #16] + 80017c2: 187b adds r3, r7, r1 + 80017c4: 2200 movs r2, #0 + 80017c6: 611a str r2, [r3, #16] I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK; - 800179c: 187b adds r3, r7, r1 - 800179e: 2200 movs r2, #0 - 80017a0: 615a str r2, [r3, #20] + 80017c8: 187b adds r3, r7, r1 + 80017ca: 2200 movs r2, #0 + 80017cc: 615a str r2, [r3, #20] I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; - 80017a2: 187b adds r3, r7, r1 - 80017a4: 2200 movs r2, #0 - 80017a6: 619a str r2, [r3, #24] + 80017ce: 187b adds r3, r7, r1 + 80017d0: 2200 movs r2, #0 + 80017d2: 619a str r2, [r3, #24] LL_I2C_Init(I2C1, &I2C_InitStruct); - 80017a8: 187b adds r3, r7, r1 - 80017aa: 4a07 ldr r2, [pc, #28] ; (80017c8 ) - 80017ac: 0019 movs r1, r3 - 80017ae: 0010 movs r0, r2 - 80017b0: f001 fbba bl 8002f28 + 80017d4: 187b adds r3, r7, r1 + 80017d6: 4a07 ldr r2, [pc, #28] ; (80017f4 ) + 80017d8: 0019 movs r1, r3 + 80017da: 0010 movs r0, r2 + 80017dc: f001 fbca bl 8002f74 LL_I2C_SetOwnAddress2(I2C1, 0, LL_I2C_OWNADDRESS2_NOMASK); - 80017b4: 4b04 ldr r3, [pc, #16] ; (80017c8 ) - 80017b6: 2200 movs r2, #0 - 80017b8: 2100 movs r1, #0 - 80017ba: 0018 movs r0, r3 - 80017bc: f7ff fa0c bl 8000bd8 + 80017e0: 4b04 ldr r3, [pc, #16] ; (80017f4 ) + 80017e2: 2200 movs r2, #0 + 80017e4: 2100 movs r1, #0 + 80017e6: 0018 movs r0, r3 + 80017e8: f7ff f9f6 bl 8000bd8 /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } - 80017c0: 46c0 nop ; (mov r8, r8) - 80017c2: 46bd mov sp, r7 - 80017c4: b00f add sp, #60 ; 0x3c - 80017c6: bd90 pop {r4, r7, pc} - 80017c8: 40005400 .word 0x40005400 - 80017cc: 40000a0b .word 0x40000a0b + 80017ec: 46c0 nop ; (mov r8, r8) + 80017ee: 46bd mov sp, r7 + 80017f0: b00f add sp, #60 ; 0x3c + 80017f2: bd90 pop {r4, r7, pc} + 80017f4: 40005400 .word 0x40005400 + 80017f8: 40000a0b .word 0x40000a0b -080017d0 : +080017fc : * @brief LPUART1 Initialization Function * @param None * @retval None */ static void MX_LPUART1_UART_Init(void) { - 80017d0: b590 push {r4, r7, lr} - 80017d2: b08d sub sp, #52 ; 0x34 - 80017d4: af00 add r7, sp, #0 + 80017fc: b590 push {r4, r7, lr} + 80017fe: b08d sub sp, #52 ; 0x34 + 8001800: af00 add r7, sp, #0 /* USER CODE BEGIN LPUART1_Init 0 */ /* USER CODE END LPUART1_Init 0 */ LL_LPUART_InitTypeDef LPUART_InitStruct = {0}; - 80017d6: 2418 movs r4, #24 - 80017d8: 193b adds r3, r7, r4 - 80017da: 0018 movs r0, r3 - 80017dc: 2318 movs r3, #24 - 80017de: 001a movs r2, r3 - 80017e0: 2100 movs r1, #0 - 80017e2: f001 ff15 bl 8003610 + 8001802: 2418 movs r4, #24 + 8001804: 193b adds r3, r7, r4 + 8001806: 0018 movs r0, r3 + 8001808: 2318 movs r3, #24 + 800180a: 001a movs r2, r3 + 800180c: 2100 movs r1, #0 + 800180e: f001 ff25 bl 800365c LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80017e6: 003b movs r3, r7 - 80017e8: 0018 movs r0, r3 - 80017ea: 2318 movs r3, #24 - 80017ec: 001a movs r2, r3 - 80017ee: 2100 movs r1, #0 - 80017f0: f001 ff0e bl 8003610 + 8001812: 003b movs r3, r7 + 8001814: 0018 movs r0, r3 + 8001816: 2318 movs r3, #24 + 8001818: 001a movs r2, r3 + 800181a: 2100 movs r1, #0 + 800181c: f001 ff1e bl 800365c /* Peripheral clock enable */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1); - 80017f4: 2380 movs r3, #128 ; 0x80 - 80017f6: 02db lsls r3, r3, #11 - 80017f8: 0018 movs r0, r3 - 80017fa: f7ff fc67 bl 80010cc + 8001820: 2380 movs r3, #128 ; 0x80 + 8001822: 02db lsls r3, r3, #11 + 8001824: 0018 movs r0, r3 + 8001826: f7ff fc67 bl 80010f8 LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); - 80017fe: 2001 movs r0, #1 - 8001800: f7ff fc90 bl 8001124 + 800182a: 2001 movs r0, #1 + 800182c: f7ff fc90 bl 8001150 LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB); - 8001804: 2002 movs r0, #2 - 8001806: f7ff fc8d bl 8001124 + 8001830: 2002 movs r0, #2 + 8001832: f7ff fc8d bl 8001150 /**LPUART1 GPIO Configuration PA0-CK_IN ------> LPUART1_RX PA1 ------> LPUART1_TX PB1 ------> LPUART1_DE */ GPIO_InitStruct.Pin = LL_GPIO_PIN_0; - 800180a: 003b movs r3, r7 - 800180c: 2201 movs r2, #1 - 800180e: 601a str r2, [r3, #0] + 8001836: 003b movs r3, r7 + 8001838: 2201 movs r2, #1 + 800183a: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 8001810: 003b movs r3, r7 - 8001812: 2202 movs r2, #2 - 8001814: 605a str r2, [r3, #4] - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 8001816: 003b movs r3, r7 - 8001818: 2203 movs r2, #3 - 800181a: 609a str r2, [r3, #8] - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 800181c: 003b movs r3, r7 - 800181e: 2200 movs r2, #0 - 8001820: 60da str r2, [r3, #12] - GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; - 8001822: 003b movs r3, r7 - 8001824: 2201 movs r2, #1 - 8001826: 611a str r2, [r3, #16] - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; - 8001828: 003b movs r3, r7 - 800182a: 2206 movs r2, #6 - 800182c: 615a str r2, [r3, #20] - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800182e: 003a movs r2, r7 - 8001830: 23a0 movs r3, #160 ; 0xa0 - 8001832: 05db lsls r3, r3, #23 - 8001834: 0011 movs r1, r2 - 8001836: 0018 movs r0, r3 - 8001838: f001 fa7a bl 8002d30 - - GPIO_InitStruct.Pin = LL_GPIO_PIN_1; 800183c: 003b movs r3, r7 800183e: 2202 movs r2, #2 - 8001840: 601a str r2, [r3, #0] - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 8001842: 003b movs r3, r7 - 8001844: 2202 movs r2, #2 - 8001846: 605a str r2, [r3, #4] + 8001840: 605a str r2, [r3, #4] GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 8001848: 003b movs r3, r7 - 800184a: 2203 movs r2, #3 - 800184c: 609a str r2, [r3, #8] + 8001842: 003b movs r3, r7 + 8001844: 2203 movs r2, #3 + 8001846: 609a str r2, [r3, #8] GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 800184e: 003b movs r3, r7 - 8001850: 2200 movs r2, #0 - 8001852: 60da str r2, [r3, #12] + 8001848: 003b movs r3, r7 + 800184a: 2200 movs r2, #0 + 800184c: 60da str r2, [r3, #12] GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; - 8001854: 003b movs r3, r7 - 8001856: 2201 movs r2, #1 - 8001858: 611a str r2, [r3, #16] + 800184e: 003b movs r3, r7 + 8001850: 2201 movs r2, #1 + 8001852: 611a str r2, [r3, #16] GPIO_InitStruct.Alternate = LL_GPIO_AF_6; - 800185a: 003b movs r3, r7 - 800185c: 2206 movs r2, #6 - 800185e: 615a str r2, [r3, #20] + 8001854: 003b movs r3, r7 + 8001856: 2206 movs r2, #6 + 8001858: 615a str r2, [r3, #20] LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001860: 003a movs r2, r7 - 8001862: 23a0 movs r3, #160 ; 0xa0 - 8001864: 05db lsls r3, r3, #23 - 8001866: 0011 movs r1, r2 - 8001868: 0018 movs r0, r3 - 800186a: f001 fa61 bl 8002d30 + 800185a: 003a movs r2, r7 + 800185c: 23a0 movs r3, #160 ; 0xa0 + 800185e: 05db lsls r3, r3, #23 + 8001860: 0011 movs r1, r2 + 8001862: 0018 movs r0, r3 + 8001864: f001 fa8a bl 8002d7c GPIO_InitStruct.Pin = LL_GPIO_PIN_1; + 8001868: 003b movs r3, r7 + 800186a: 2202 movs r2, #2 + 800186c: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; 800186e: 003b movs r3, r7 8001870: 2202 movs r2, #2 - 8001872: 601a str r2, [r3, #0] - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 8001874: 003b movs r3, r7 - 8001876: 2202 movs r2, #2 - 8001878: 605a str r2, [r3, #4] + 8001872: 605a str r2, [r3, #4] GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 800187a: 003b movs r3, r7 - 800187c: 2203 movs r2, #3 - 800187e: 609a str r2, [r3, #8] + 8001874: 003b movs r3, r7 + 8001876: 2203 movs r2, #3 + 8001878: 609a str r2, [r3, #8] GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 800187a: 003b movs r3, r7 + 800187c: 2200 movs r2, #0 + 800187e: 60da str r2, [r3, #12] + GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; 8001880: 003b movs r3, r7 - 8001882: 2200 movs r2, #0 - 8001884: 60da str r2, [r3, #12] - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 8001882: 2201 movs r2, #1 + 8001884: 611a str r2, [r3, #16] + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; 8001886: 003b movs r3, r7 - 8001888: 2200 movs r2, #0 - 800188a: 611a str r2, [r3, #16] + 8001888: 2206 movs r2, #6 + 800188a: 615a str r2, [r3, #20] + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 800188c: 003a movs r2, r7 + 800188e: 23a0 movs r3, #160 ; 0xa0 + 8001890: 05db lsls r3, r3, #23 + 8001892: 0011 movs r1, r2 + 8001894: 0018 movs r0, r3 + 8001896: f001 fa71 bl 8002d7c + + GPIO_InitStruct.Pin = LL_GPIO_PIN_1; + 800189a: 003b movs r3, r7 + 800189c: 2202 movs r2, #2 + 800189e: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 80018a0: 003b movs r3, r7 + 80018a2: 2202 movs r2, #2 + 80018a4: 605a str r2, [r3, #4] + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 80018a6: 003b movs r3, r7 + 80018a8: 2203 movs r2, #3 + 80018aa: 609a str r2, [r3, #8] + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 80018ac: 003b movs r3, r7 + 80018ae: 2200 movs r2, #0 + 80018b0: 60da str r2, [r3, #12] + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 80018b2: 003b movs r3, r7 + 80018b4: 2200 movs r2, #0 + 80018b6: 611a str r2, [r3, #16] GPIO_InitStruct.Alternate = LL_GPIO_AF_4; - 800188c: 003b movs r3, r7 - 800188e: 2204 movs r2, #4 - 8001890: 615a str r2, [r3, #20] + 80018b8: 003b movs r3, r7 + 80018ba: 2204 movs r2, #4 + 80018bc: 615a str r2, [r3, #20] LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001892: 003b movs r3, r7 - 8001894: 4a2a ldr r2, [pc, #168] ; (8001940 ) - 8001896: 0019 movs r1, r3 - 8001898: 0010 movs r0, r2 - 800189a: f001 fa49 bl 8002d30 + 80018be: 003b movs r3, r7 + 80018c0: 4a2a ldr r2, [pc, #168] ; (800196c ) + 80018c2: 0019 movs r1, r3 + 80018c4: 0010 movs r0, r2 + 80018c6: f001 fa59 bl 8002d7c /* LPUART1 interrupt Init */ NVIC_SetPriority(LPUART1_IRQn, 0); - 800189e: 2100 movs r1, #0 - 80018a0: 201d movs r0, #29 - 80018a2: f7ff f8fd bl 8000aa0 <__NVIC_SetPriority> + 80018ca: 2100 movs r1, #0 + 80018cc: 201d movs r0, #29 + 80018ce: f7ff f8e7 bl 8000aa0 <__NVIC_SetPriority> NVIC_EnableIRQ(LPUART1_IRQn); - 80018a6: 201d movs r0, #29 - 80018a8: f7ff f8e0 bl 8000a6c <__NVIC_EnableIRQ> + 80018d2: 201d movs r0, #29 + 80018d4: f7ff f8ca bl 8000a6c <__NVIC_EnableIRQ> /* USER CODE BEGIN LPUART1_Init 1 */ /* USER CODE END LPUART1_Init 1 */ LPUART_InitStruct.BaudRate = config_baudrates[sensor_config.baudrate_index]; - 80018ac: 4b25 ldr r3, [pc, #148] ; (8001944 ) - 80018ae: 691a ldr r2, [r3, #16] - 80018b0: 4b25 ldr r3, [pc, #148] ; (8001948 ) - 80018b2: 0092 lsls r2, r2, #2 - 80018b4: 58d2 ldr r2, [r2, r3] - 80018b6: 0021 movs r1, r4 - 80018b8: 187b adds r3, r7, r1 - 80018ba: 601a str r2, [r3, #0] + 80018d8: 4b25 ldr r3, [pc, #148] ; (8001970 ) + 80018da: 691a ldr r2, [r3, #16] + 80018dc: 4b25 ldr r3, [pc, #148] ; (8001974 ) + 80018de: 0092 lsls r2, r2, #2 + 80018e0: 58d2 ldr r2, [r2, r3] + 80018e2: 0021 movs r1, r4 + 80018e4: 187b adds r3, r7, r1 + 80018e6: 601a str r2, [r3, #0] LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_9B; - 80018bc: 187b adds r3, r7, r1 - 80018be: 2280 movs r2, #128 ; 0x80 - 80018c0: 0152 lsls r2, r2, #5 - 80018c2: 605a str r2, [r3, #4] + 80018e8: 187b adds r3, r7, r1 + 80018ea: 2280 movs r2, #128 ; 0x80 + 80018ec: 0152 lsls r2, r2, #5 + 80018ee: 605a str r2, [r3, #4] LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1; - 80018c4: 187b adds r3, r7, r1 - 80018c6: 2200 movs r2, #0 - 80018c8: 609a str r2, [r3, #8] + 80018f0: 187b adds r3, r7, r1 + 80018f2: 2200 movs r2, #0 + 80018f4: 609a str r2, [r3, #8] LPUART_InitStruct.Parity = LL_LPUART_PARITY_EVEN; - 80018ca: 187b adds r3, r7, r1 - 80018cc: 2280 movs r2, #128 ; 0x80 - 80018ce: 00d2 lsls r2, r2, #3 - 80018d0: 60da str r2, [r3, #12] + 80018f6: 187b adds r3, r7, r1 + 80018f8: 2280 movs r2, #128 ; 0x80 + 80018fa: 00d2 lsls r2, r2, #3 + 80018fc: 60da str r2, [r3, #12] LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX; - 80018d2: 187b adds r3, r7, r1 - 80018d4: 220c movs r2, #12 - 80018d6: 611a str r2, [r3, #16] + 80018fe: 187b adds r3, r7, r1 + 8001900: 220c movs r2, #12 + 8001902: 611a str r2, [r3, #16] LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE; - 80018d8: 187b adds r3, r7, r1 - 80018da: 2200 movs r2, #0 - 80018dc: 615a str r2, [r3, #20] + 8001904: 187b adds r3, r7, r1 + 8001906: 2200 movs r2, #0 + 8001908: 615a str r2, [r3, #20] LL_LPUART_Init(LPUART1, &LPUART_InitStruct); - 80018de: 187b adds r3, r7, r1 - 80018e0: 4a1a ldr r2, [pc, #104] ; (800194c ) - 80018e2: 0019 movs r1, r3 - 80018e4: 0010 movs r0, r2 - 80018e6: f001 fbcd bl 8003084 + 800190a: 187b adds r3, r7, r1 + 800190c: 4a1a ldr r2, [pc, #104] ; (8001978 ) + 800190e: 0019 movs r1, r3 + 8001910: 0010 movs r0, r2 + 8001912: f001 fbdd bl 80030d0 LL_LPUART_EnableDEMode(LPUART1); - 80018ea: 4b18 ldr r3, [pc, #96] ; (800194c ) - 80018ec: 0018 movs r0, r3 - 80018ee: f7ff fa69 bl 8000dc4 + 8001916: 4b18 ldr r3, [pc, #96] ; (8001978 ) + 8001918: 0018 movs r0, r3 + 800191a: f7ff fa53 bl 8000dc4 LL_LPUART_SetDESignalPolarity(LPUART1, LL_LPUART_DE_POLARITY_HIGH); - 80018f2: 4b16 ldr r3, [pc, #88] ; (800194c ) - 80018f4: 2100 movs r1, #0 - 80018f6: 0018 movs r0, r3 - 80018f8: f7ff fa74 bl 8000de4 + 800191e: 4b16 ldr r3, [pc, #88] ; (8001978 ) + 8001920: 2100 movs r1, #0 + 8001922: 0018 movs r0, r3 + 8001924: f7ff fa5e bl 8000de4 LL_LPUART_SetDEAssertionTime(LPUART1, 0); - 80018fc: 4b13 ldr r3, [pc, #76] ; (800194c ) - 80018fe: 2100 movs r1, #0 - 8001900: 0018 movs r0, r3 - 8001902: f7ff fa4b bl 8000d9c + 8001928: 4b13 ldr r3, [pc, #76] ; (8001978 ) + 800192a: 2100 movs r1, #0 + 800192c: 0018 movs r0, r3 + 800192e: f7ff fa35 bl 8000d9c LL_LPUART_SetDEDeassertionTime(LPUART1, 0); - 8001906: 4b11 ldr r3, [pc, #68] ; (800194c ) - 8001908: 2100 movs r1, #0 - 800190a: 0018 movs r0, r3 - 800190c: f7ff fa32 bl 8000d74 + 8001932: 4b11 ldr r3, [pc, #68] ; (8001978 ) + 8001934: 2100 movs r1, #0 + 8001936: 0018 movs r0, r3 + 8001938: f7ff fa1c bl 8000d74 /* USER CODE BEGIN LPUART1_Init 2 */ /* Enable IDLE Interrupt */ LL_LPUART_EnableIT_IDLE(LPUART1); - 8001910: 4b0e ldr r3, [pc, #56] ; (800194c ) - 8001912: 0018 movs r0, r3 - 8001914: f7ff fa8b bl 8000e2e + 800193c: 4b0e ldr r3, [pc, #56] ; (8001978 ) + 800193e: 0018 movs r0, r3 + 8001940: f7ff fa8b bl 8000e5a /* Enable RX Not Empty Interrupt */ LL_LPUART_EnableIT_RXNE(LPUART1); - 8001918: 4b0c ldr r3, [pc, #48] ; (800194c ) - 800191a: 0018 movs r0, r3 - 800191c: f7ff fa95 bl 8000e4a + 8001944: 4b0c ldr r3, [pc, #48] ; (8001978 ) + 8001946: 0018 movs r0, r3 + 8001948: f7ff fa95 bl 8000e76 LL_LPUART_EnableDirectionRx(LPUART1); - 8001920: 4b0a ldr r3, [pc, #40] ; (800194c ) - 8001922: 0018 movs r0, r3 - 8001924: f7ff f9aa bl 8000c7c + 800194c: 4b0a ldr r3, [pc, #40] ; (8001978 ) + 800194e: 0018 movs r0, r3 + 8001950: f7ff f994 bl 8000c7c LL_LPUART_EnableDirectionTx(LPUART1); - 8001928: 4b08 ldr r3, [pc, #32] ; (800194c ) - 800192a: 0018 movs r0, r3 - 800192c: f7ff f9b4 bl 8000c98 + 8001954: 4b08 ldr r3, [pc, #32] ; (8001978 ) + 8001956: 0018 movs r0, r3 + 8001958: f7ff f99e bl 8000c98 LL_LPUART_Enable(LPUART1); - 8001930: 4b06 ldr r3, [pc, #24] ; (800194c ) - 8001932: 0018 movs r0, r3 - 8001934: f7ff f985 bl 8000c42 + 800195c: 4b06 ldr r3, [pc, #24] ; (8001978 ) + 800195e: 0018 movs r0, r3 + 8001960: f7ff f96f bl 8000c42 /* USER CODE END LPUART1_Init 2 */ } - 8001938: 46c0 nop ; (mov r8, r8) - 800193a: 46bd mov sp, r7 - 800193c: b00d add sp, #52 ; 0x34 - 800193e: bd90 pop {r4, r7, pc} - 8001940: 50000400 .word 0x50000400 - 8001944: 2000004c .word 0x2000004c - 8001948: 08003638 .word 0x08003638 - 800194c: 40004800 .word 0x40004800 + 8001964: 46c0 nop ; (mov r8, r8) + 8001966: 46bd mov sp, r7 + 8001968: b00d add sp, #52 ; 0x34 + 800196a: bd90 pop {r4, r7, pc} + 800196c: 50000400 .word 0x50000400 + 8001970: 2000004c .word 0x2000004c + 8001974: 08003684 .word 0x08003684 + 8001978: 40004800 .word 0x40004800 -08001950 : +0800197c : * @brief TIM21 Initialization Function * @param None * @retval None */ static void MX_TIM21_Init(void) { - 8001950: b580 push {r7, lr} - 8001952: b084 sub sp, #16 - 8001954: af00 add r7, sp, #0 + 800197c: b580 push {r7, lr} + 800197e: b084 sub sp, #16 + 8001980: af00 add r7, sp, #0 /* USER CODE BEGIN TIM21_Init 0 */ /* USER CODE END TIM21_Init 0 */ LL_TIM_InitTypeDef TIM_InitStruct = {0}; - 8001956: 003b movs r3, r7 - 8001958: 0018 movs r0, r3 - 800195a: 2310 movs r3, #16 - 800195c: 001a movs r2, r3 - 800195e: 2100 movs r1, #0 - 8001960: f001 fe56 bl 8003610 + 8001982: 003b movs r3, r7 + 8001984: 0018 movs r0, r3 + 8001986: 2310 movs r3, #16 + 8001988: 001a movs r2, r3 + 800198a: 2100 movs r1, #0 + 800198c: f001 fe66 bl 800365c /* Peripheral clock enable */ LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM21); - 8001964: 2004 movs r0, #4 - 8001966: f7ff fbc7 bl 80010f8 + 8001990: 2004 movs r0, #4 + 8001992: f7ff fbc7 bl 8001124 /* TIM21 interrupt Init */ NVIC_SetPriority(TIM21_IRQn, 0); - 800196a: 2100 movs r1, #0 - 800196c: 2014 movs r0, #20 - 800196e: f7ff f897 bl 8000aa0 <__NVIC_SetPriority> + 8001996: 2100 movs r1, #0 + 8001998: 2014 movs r0, #20 + 800199a: f7ff f881 bl 8000aa0 <__NVIC_SetPriority> NVIC_EnableIRQ(TIM21_IRQn); - 8001972: 2014 movs r0, #20 - 8001974: f7ff f87a bl 8000a6c <__NVIC_EnableIRQ> + 800199e: 2014 movs r0, #20 + 80019a0: f7ff f864 bl 8000a6c <__NVIC_EnableIRQ> /* USER CODE BEGIN TIM21_Init 1 */ /* USER CODE END TIM21_Init 1 */ TIM_InitStruct.Prescaler = tim21_prescaler; - 8001978: 4a14 ldr r2, [pc, #80] ; (80019cc ) - 800197a: 003b movs r3, r7 - 800197c: 801a strh r2, [r3, #0] + 80019a4: 4a14 ldr r2, [pc, #80] ; (80019f8 ) + 80019a6: 003b movs r3, r7 + 80019a8: 801a strh r2, [r3, #0] TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 800197e: 003b movs r3, r7 - 8001980: 2200 movs r2, #0 - 8001982: 605a str r2, [r3, #4] + 80019aa: 003b movs r3, r7 + 80019ac: 2200 movs r2, #0 + 80019ae: 605a str r2, [r3, #4] TIM_InitStruct.Autoreload = tim21_period; - 8001984: 4b12 ldr r3, [pc, #72] ; (80019d0 ) - 8001986: 001a movs r2, r3 - 8001988: 003b movs r3, r7 - 800198a: 609a str r2, [r3, #8] + 80019b0: 4b12 ldr r3, [pc, #72] ; (80019fc ) + 80019b2: 001a movs r2, r3 + 80019b4: 003b movs r3, r7 + 80019b6: 609a str r2, [r3, #8] TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 800198c: 003b movs r3, r7 - 800198e: 2200 movs r2, #0 - 8001990: 60da str r2, [r3, #12] + 80019b8: 003b movs r3, r7 + 80019ba: 2200 movs r2, #0 + 80019bc: 60da str r2, [r3, #12] LL_TIM_Init(TIM21, &TIM_InitStruct); - 8001992: 003b movs r3, r7 - 8001994: 4a0f ldr r2, [pc, #60] ; (80019d4 ) - 8001996: 0019 movs r1, r3 - 8001998: 0010 movs r0, r2 - 800199a: f001 fd73 bl 8003484 + 80019be: 003b movs r3, r7 + 80019c0: 4a0f ldr r2, [pc, #60] ; (8001a00 ) + 80019c2: 0019 movs r1, r3 + 80019c4: 0010 movs r0, r2 + 80019c6: f001 fd83 bl 80034d0 LL_TIM_EnableARRPreload(TIM21); - 800199e: 4b0d ldr r3, [pc, #52] ; (80019d4 ) - 80019a0: 0018 movs r0, r3 - 80019a2: f7ff fc19 bl 80011d8 + 80019ca: 4b0d ldr r3, [pc, #52] ; (8001a00 ) + 80019cc: 0018 movs r0, r3 + 80019ce: f7ff fc19 bl 8001204 LL_TIM_SetClockSource(TIM21, LL_TIM_CLOCKSOURCE_INTERNAL); - 80019a6: 4b0b ldr r3, [pc, #44] ; (80019d4 ) - 80019a8: 2100 movs r1, #0 - 80019aa: 0018 movs r0, r3 - 80019ac: f7ff fc22 bl 80011f4 + 80019d2: 4b0b ldr r3, [pc, #44] ; (8001a00 ) + 80019d4: 2100 movs r1, #0 + 80019d6: 0018 movs r0, r3 + 80019d8: f7ff fc22 bl 8001220 LL_TIM_SetTriggerOutput(TIM21, LL_TIM_TRGO_RESET); - 80019b0: 4b08 ldr r3, [pc, #32] ; (80019d4 ) - 80019b2: 2100 movs r1, #0 - 80019b4: 0018 movs r0, r3 - 80019b6: f7ff fc31 bl 800121c + 80019dc: 4b08 ldr r3, [pc, #32] ; (8001a00 ) + 80019de: 2100 movs r1, #0 + 80019e0: 0018 movs r0, r3 + 80019e2: f7ff fc31 bl 8001248 LL_TIM_DisableMasterSlaveMode(TIM21); - 80019ba: 4b06 ldr r3, [pc, #24] ; (80019d4 ) - 80019bc: 0018 movs r0, r3 - 80019be: f7ff fc3f bl 8001240 + 80019e6: 4b06 ldr r3, [pc, #24] ; (8001a00 ) + 80019e8: 0018 movs r0, r3 + 80019ea: f7ff fc3f bl 800126c /* USER CODE BEGIN TIM21_Init 2 */ /* USER CODE END TIM21_Init 2 */ } - 80019c2: 46c0 nop ; (mov r8, r8) - 80019c4: 46bd mov sp, r7 - 80019c6: b004 add sp, #16 - 80019c8: bd80 pop {r7, pc} - 80019ca: 46c0 nop ; (mov r8, r8) - 80019cc: 0000ea5f .word 0x0000ea5f - 80019d0: 000004af .word 0x000004af - 80019d4: 40010800 .word 0x40010800 + 80019ee: 46c0 nop ; (mov r8, r8) + 80019f0: 46bd mov sp, r7 + 80019f2: b004 add sp, #16 + 80019f4: bd80 pop {r7, pc} + 80019f6: 46c0 nop ; (mov r8, r8) + 80019f8: 0000ea5f .word 0x0000ea5f + 80019fc: 000004af .word 0x000004af + 8001a00: 40010800 .word 0x40010800 -080019d8 : +08001a04 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 80019d8: b580 push {r7, lr} - 80019da: b086 sub sp, #24 - 80019dc: af00 add r7, sp, #0 + 8001a04: b580 push {r7, lr} + 8001a06: b086 sub sp, #24 + 8001a08: af00 add r7, sp, #0 LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80019de: 003b movs r3, r7 - 80019e0: 0018 movs r0, r3 - 80019e2: 2318 movs r3, #24 - 80019e4: 001a movs r2, r3 - 80019e6: 2100 movs r1, #0 - 80019e8: f001 fe12 bl 8003610 + 8001a0a: 003b movs r3, r7 + 8001a0c: 0018 movs r0, r3 + 8001a0e: 2318 movs r3, #24 + 8001a10: 001a movs r2, r3 + 8001a12: 2100 movs r1, #0 + 8001a14: f001 fe22 bl 800365c /* GPIO Ports Clock Enable */ LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); - 80019ec: 2001 movs r0, #1 - 80019ee: f7ff fb99 bl 8001124 + 8001a18: 2001 movs r0, #1 + 8001a1a: f7ff fb99 bl 8001150 /**/ LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin); - 80019f2: 23a0 movs r3, #160 ; 0xa0 - 80019f4: 05db lsls r3, r3, #23 - 80019f6: 2120 movs r1, #32 - 80019f8: 0018 movs r0, r3 - 80019fa: f7ff fc3e bl 800127a + 8001a1e: 23a0 movs r3, #160 ; 0xa0 + 8001a20: 05db lsls r3, r3, #23 + 8001a22: 2120 movs r1, #32 + 8001a24: 0018 movs r0, r3 + 8001a26: f7ff fc3e bl 80012a6 /**/ LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin); - 80019fe: 23a0 movs r3, #160 ; 0xa0 - 8001a00: 05db lsls r3, r3, #23 - 8001a02: 2140 movs r1, #64 ; 0x40 - 8001a04: 0018 movs r0, r3 - 8001a06: f7ff fc38 bl 800127a + 8001a2a: 23a0 movs r3, #160 ; 0xa0 + 8001a2c: 05db lsls r3, r3, #23 + 8001a2e: 2140 movs r1, #64 ; 0x40 + 8001a30: 0018 movs r0, r3 + 8001a32: f7ff fc38 bl 80012a6 /**/ LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin); - 8001a0a: 23a0 movs r3, #160 ; 0xa0 - 8001a0c: 05db lsls r3, r3, #23 - 8001a0e: 2180 movs r1, #128 ; 0x80 - 8001a10: 0018 movs r0, r3 - 8001a12: f7ff fc32 bl 800127a + 8001a36: 23a0 movs r3, #160 ; 0xa0 + 8001a38: 05db lsls r3, r3, #23 + 8001a3a: 2180 movs r1, #128 ; 0x80 + 8001a3c: 0018 movs r0, r3 + 8001a3e: f7ff fc32 bl 80012a6 /**/ GPIO_InitStruct.Pin = LED_B_Pin; - 8001a16: 003b movs r3, r7 - 8001a18: 2220 movs r2, #32 - 8001a1a: 601a str r2, [r3, #0] - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - 8001a1c: 003b movs r3, r7 - 8001a1e: 2201 movs r2, #1 - 8001a20: 605a str r2, [r3, #4] - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - 8001a22: 003b movs r3, r7 - 8001a24: 2200 movs r2, #0 - 8001a26: 609a str r2, [r3, #8] - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 8001a28: 003b movs r3, r7 - 8001a2a: 2200 movs r2, #0 - 8001a2c: 60da str r2, [r3, #12] - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 8001a2e: 003b movs r3, r7 - 8001a30: 2200 movs r2, #0 - 8001a32: 611a str r2, [r3, #16] - LL_GPIO_Init(LED_B_GPIO_Port, &GPIO_InitStruct); - 8001a34: 003a movs r2, r7 - 8001a36: 23a0 movs r3, #160 ; 0xa0 - 8001a38: 05db lsls r3, r3, #23 - 8001a3a: 0011 movs r1, r2 - 8001a3c: 0018 movs r0, r3 - 8001a3e: f001 f977 bl 8002d30 - - /**/ - GPIO_InitStruct.Pin = LED_G_Pin; 8001a42: 003b movs r3, r7 - 8001a44: 2240 movs r2, #64 ; 0x40 + 8001a44: 2220 movs r2, #32 8001a46: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; 8001a48: 003b movs r3, r7 @@ -4439,18 +4452,18 @@ static void MX_GPIO_Init(void) 8001a5a: 003b movs r3, r7 8001a5c: 2200 movs r2, #0 8001a5e: 611a str r2, [r3, #16] - LL_GPIO_Init(LED_G_GPIO_Port, &GPIO_InitStruct); + LL_GPIO_Init(LED_B_GPIO_Port, &GPIO_InitStruct); 8001a60: 003a movs r2, r7 8001a62: 23a0 movs r3, #160 ; 0xa0 8001a64: 05db lsls r3, r3, #23 8001a66: 0011 movs r1, r2 8001a68: 0018 movs r0, r3 - 8001a6a: f001 f961 bl 8002d30 + 8001a6a: f001 f987 bl 8002d7c /**/ - GPIO_InitStruct.Pin = LED_R_Pin; + GPIO_InitStruct.Pin = LED_G_Pin; 8001a6e: 003b movs r3, r7 - 8001a70: 2280 movs r2, #128 ; 0x80 + 8001a70: 2240 movs r2, #64 ; 0x40 8001a72: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; 8001a74: 003b movs r3, r7 @@ -4468,4083 +4481,4071 @@ static void MX_GPIO_Init(void) 8001a86: 003b movs r3, r7 8001a88: 2200 movs r2, #0 8001a8a: 611a str r2, [r3, #16] - LL_GPIO_Init(LED_R_GPIO_Port, &GPIO_InitStruct); + LL_GPIO_Init(LED_G_GPIO_Port, &GPIO_InitStruct); 8001a8c: 003a movs r2, r7 8001a8e: 23a0 movs r3, #160 ; 0xa0 8001a90: 05db lsls r3, r3, #23 8001a92: 0011 movs r1, r2 8001a94: 0018 movs r0, r3 - 8001a96: f001 f94b bl 8002d30 + 8001a96: f001 f971 bl 8002d7c + + /**/ + GPIO_InitStruct.Pin = LED_R_Pin; + 8001a9a: 003b movs r3, r7 + 8001a9c: 2280 movs r2, #128 ; 0x80 + 8001a9e: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + 8001aa0: 003b movs r3, r7 + 8001aa2: 2201 movs r2, #1 + 8001aa4: 605a str r2, [r3, #4] + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + 8001aa6: 003b movs r3, r7 + 8001aa8: 2200 movs r2, #0 + 8001aaa: 609a str r2, [r3, #8] + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 8001aac: 003b movs r3, r7 + 8001aae: 2200 movs r2, #0 + 8001ab0: 60da str r2, [r3, #12] + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 8001ab2: 003b movs r3, r7 + 8001ab4: 2200 movs r2, #0 + 8001ab6: 611a str r2, [r3, #16] + LL_GPIO_Init(LED_R_GPIO_Port, &GPIO_InitStruct); + 8001ab8: 003a movs r2, r7 + 8001aba: 23a0 movs r3, #160 ; 0xa0 + 8001abc: 05db lsls r3, r3, #23 + 8001abe: 0011 movs r1, r2 + 8001ac0: 0018 movs r0, r3 + 8001ac2: f001 f95b bl 8002d7c } - 8001a9a: 46c0 nop ; (mov r8, r8) - 8001a9c: 46bd mov sp, r7 - 8001a9e: b006 add sp, #24 - 8001aa0: bd80 pop {r7, pc} + 8001ac6: 46c0 nop ; (mov r8, r8) + 8001ac8: 46bd mov sp, r7 + 8001aca: b006 add sp, #24 + 8001acc: bd80 pop {r7, pc} ... -08001aa4 : +08001ad0 : /* USER CODE BEGIN 4 */ void LPUART1_TX_Buffer(uint8_t* buffer_tx, uint16_t buffer_tx_len) { - 8001aa4: b580 push {r7, lr} - 8001aa6: b084 sub sp, #16 - 8001aa8: af00 add r7, sp, #0 - 8001aaa: 6078 str r0, [r7, #4] - 8001aac: 000a movs r2, r1 - 8001aae: 1cbb adds r3, r7, #2 - 8001ab0: 801a strh r2, [r3, #0] + 8001ad0: b580 push {r7, lr} + 8001ad2: b084 sub sp, #16 + 8001ad4: af00 add r7, sp, #0 + 8001ad6: 6078 str r0, [r7, #4] + 8001ad8: 000a movs r2, r1 + 8001ada: 1cbb adds r3, r7, #2 + 8001adc: 801a strh r2, [r3, #0] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8001ab2: b672 cpsid i + 8001ade: b672 cpsid i } - 8001ab4: 46c0 nop ; (mov r8, r8) + 8001ae0: 46c0 nop ; (mov r8, r8) __disable_irq(); for (uint16_t i = 0; i < buffer_tx_len; i++) - 8001ab6: 230e movs r3, #14 - 8001ab8: 18fb adds r3, r7, r3 - 8001aba: 2200 movs r2, #0 - 8001abc: 801a strh r2, [r3, #0] - 8001abe: e018 b.n 8001af2 + 8001ae2: 230e movs r3, #14 + 8001ae4: 18fb adds r3, r7, r3 + 8001ae6: 2200 movs r2, #0 + 8001ae8: 801a strh r2, [r3, #0] + 8001aea: e018 b.n 8001b1e { LL_LPUART_TransmitData9(LPUART1, buffer_tx[i]); - 8001ac0: 230e movs r3, #14 - 8001ac2: 18fb adds r3, r7, r3 - 8001ac4: 881b ldrh r3, [r3, #0] - 8001ac6: 687a ldr r2, [r7, #4] - 8001ac8: 18d3 adds r3, r2, r3 - 8001aca: 781b ldrb r3, [r3, #0] - 8001acc: b29b uxth r3, r3 - 8001ace: 4a0f ldr r2, [pc, #60] ; (8001b0c ) - 8001ad0: 0019 movs r1, r3 - 8001ad2: 0010 movs r0, r2 - 8001ad4: f7ff f9e5 bl 8000ea2 + 8001aec: 230e movs r3, #14 + 8001aee: 18fb adds r3, r7, r3 + 8001af0: 881b ldrh r3, [r3, #0] + 8001af2: 687a ldr r2, [r7, #4] + 8001af4: 18d3 adds r3, r2, r3 + 8001af6: 781b ldrb r3, [r3, #0] + 8001af8: b29b uxth r3, r3 + 8001afa: 4a0f ldr r2, [pc, #60] ; (8001b38 ) + 8001afc: 0019 movs r1, r3 + 8001afe: 0010 movs r0, r2 + 8001b00: f7ff f9e5 bl 8000ece while (!LL_LPUART_IsActiveFlag_TXE(LPUART1)); - 8001ad8: 46c0 nop ; (mov r8, r8) - 8001ada: 4b0c ldr r3, [pc, #48] ; (8001b0c ) - 8001adc: 0018 movs r0, r3 - 8001ade: f7ff f995 bl 8000e0c - 8001ae2: 1e03 subs r3, r0, #0 - 8001ae4: d0f9 beq.n 8001ada + 8001b04: 46c0 nop ; (mov r8, r8) + 8001b06: 4b0c ldr r3, [pc, #48] ; (8001b38 ) + 8001b08: 0018 movs r0, r3 + 8001b0a: f7ff f97f bl 8000e0c + 8001b0e: 1e03 subs r3, r0, #0 + 8001b10: d0f9 beq.n 8001b06 for (uint16_t i = 0; i < buffer_tx_len; i++) - 8001ae6: 210e movs r1, #14 - 8001ae8: 187b adds r3, r7, r1 - 8001aea: 881a ldrh r2, [r3, #0] - 8001aec: 187b adds r3, r7, r1 - 8001aee: 3201 adds r2, #1 - 8001af0: 801a strh r2, [r3, #0] - 8001af2: 230e movs r3, #14 - 8001af4: 18fa adds r2, r7, r3 - 8001af6: 1cbb adds r3, r7, #2 - 8001af8: 8812 ldrh r2, [r2, #0] - 8001afa: 881b ldrh r3, [r3, #0] - 8001afc: 429a cmp r2, r3 - 8001afe: d3df bcc.n 8001ac0 + 8001b12: 210e movs r1, #14 + 8001b14: 187b adds r3, r7, r1 + 8001b16: 881a ldrh r2, [r3, #0] + 8001b18: 187b adds r3, r7, r1 + 8001b1a: 3201 adds r2, #1 + 8001b1c: 801a strh r2, [r3, #0] + 8001b1e: 230e movs r3, #14 + 8001b20: 18fa adds r2, r7, r3 + 8001b22: 1cbb adds r3, r7, #2 + 8001b24: 8812 ldrh r2, [r2, #0] + 8001b26: 881b ldrh r3, [r3, #0] + 8001b28: 429a cmp r2, r3 + 8001b2a: d3df bcc.n 8001aec __ASM volatile ("cpsie i" : : : "memory"); - 8001b00: b662 cpsie i + 8001b2c: b662 cpsie i } - 8001b02: 46c0 nop ; (mov r8, r8) + 8001b2e: 46c0 nop ; (mov r8, r8) } __enable_irq(); } - 8001b04: 46c0 nop ; (mov r8, r8) - 8001b06: 46bd mov sp, r7 - 8001b08: b004 add sp, #16 - 8001b0a: bd80 pop {r7, pc} - 8001b0c: 40004800 .word 0x40004800 + 8001b30: 46c0 nop ; (mov r8, r8) + 8001b32: 46bd mov sp, r7 + 8001b34: b004 add sp, #16 + 8001b36: bd80 pop {r7, pc} + 8001b38: 40004800 .word 0x40004800 -08001b10 : +08001b3c : int8_t uart_disable_interrupts(void) { - 8001b10: b580 push {r7, lr} - 8001b12: af00 add r7, sp, #0 + 8001b3c: b580 push {r7, lr} + 8001b3e: af00 add r7, sp, #0 LL_LPUART_Disable(LPUART1); - 8001b14: 4b07 ldr r3, [pc, #28] ; (8001b34 ) - 8001b16: 0018 movs r0, r3 - 8001b18: f7ff f8a1 bl 8000c5e + 8001b40: 4b07 ldr r3, [pc, #28] ; (8001b60 ) + 8001b42: 0018 movs r0, r3 + 8001b44: f7ff f88b bl 8000c5e LL_LPUART_DisableIT_IDLE(LPUART1); - 8001b1c: 4b05 ldr r3, [pc, #20] ; (8001b34 ) - 8001b1e: 0018 movs r0, r3 - 8001b20: f7ff f9a1 bl 8000e66 + 8001b48: 4b05 ldr r3, [pc, #20] ; (8001b60 ) + 8001b4a: 0018 movs r0, r3 + 8001b4c: f7ff f9a1 bl 8000e92 LL_LPUART_EnableIT_RXNE(LPUART1); - 8001b24: 4b03 ldr r3, [pc, #12] ; (8001b34 ) - 8001b26: 0018 movs r0, r3 - 8001b28: f7ff f98f bl 8000e4a + 8001b50: 4b03 ldr r3, [pc, #12] ; (8001b60 ) + 8001b52: 0018 movs r0, r3 + 8001b54: f7ff f98f bl 8000e76 return 0; - 8001b2c: 2300 movs r3, #0 + 8001b58: 2300 movs r3, #0 } - 8001b2e: 0018 movs r0, r3 - 8001b30: 46bd mov sp, r7 - 8001b32: bd80 pop {r7, pc} - 8001b34: 40004800 .word 0x40004800 + 8001b5a: 0018 movs r0, r3 + 8001b5c: 46bd mov sp, r7 + 8001b5e: bd80 pop {r7, pc} + 8001b60: 40004800 .word 0x40004800 -08001b38 : +08001b64 : int8_t uart_enable_interrupts(void) { - 8001b38: b580 push {r7, lr} - 8001b3a: af00 add r7, sp, #0 + 8001b64: b580 push {r7, lr} + 8001b66: af00 add r7, sp, #0 LL_LPUART_Enable(LPUART1); - 8001b3c: 4b07 ldr r3, [pc, #28] ; (8001b5c ) - 8001b3e: 0018 movs r0, r3 - 8001b40: f7ff f87f bl 8000c42 + 8001b68: 4b0b ldr r3, [pc, #44] ; (8001b98 ) + 8001b6a: 0018 movs r0, r3 + 8001b6c: f7ff f869 bl 8000c42 + LL_LPUART_ClearFlag_IDLE(LPUART1); + 8001b70: 4b09 ldr r3, [pc, #36] ; (8001b98 ) + 8001b72: 0018 movs r0, r3 + 8001b74: f7ff f966 bl 8000e44 + LL_LPUART_ClearFlag_NE(LPUART1); + 8001b78: 4b07 ldr r3, [pc, #28] ; (8001b98 ) + 8001b7a: 0018 movs r0, r3 + 8001b7c: f7ff f957 bl 8000e2e LL_LPUART_EnableIT_IDLE(LPUART1); - 8001b44: 4b05 ldr r3, [pc, #20] ; (8001b5c ) - 8001b46: 0018 movs r0, r3 - 8001b48: f7ff f971 bl 8000e2e + 8001b80: 4b05 ldr r3, [pc, #20] ; (8001b98 ) + 8001b82: 0018 movs r0, r3 + 8001b84: f7ff f969 bl 8000e5a LL_LPUART_EnableIT_RXNE(LPUART1); - 8001b4c: 4b03 ldr r3, [pc, #12] ; (8001b5c ) - 8001b4e: 0018 movs r0, r3 - 8001b50: f7ff f97b bl 8000e4a + 8001b88: 4b03 ldr r3, [pc, #12] ; (8001b98 ) + 8001b8a: 0018 movs r0, r3 + 8001b8c: f7ff f973 bl 8000e76 return 0; - 8001b54: 2300 movs r3, #0 + 8001b90: 2300 movs r3, #0 } - 8001b56: 0018 movs r0, r3 - 8001b58: 46bd mov sp, r7 - 8001b5a: bd80 pop {r7, pc} - 8001b5c: 40004800 .word 0x40004800 + 8001b92: 0018 movs r0, r3 + 8001b94: 46bd mov sp, r7 + 8001b96: bd80 pop {r7, pc} + 8001b98: 40004800 .word 0x40004800 -08001b60 : +08001b9c : int8_t modbus_slave_callback(modbus_transaction_t *transaction) { - 8001b60: b580 push {r7, lr} - 8001b62: b086 sub sp, #24 - 8001b64: af00 add r7, sp, #0 - 8001b66: 6078 str r0, [r7, #4] + 8001b9c: b580 push {r7, lr} + 8001b9e: b086 sub sp, #24 + 8001ba0: af00 add r7, sp, #0 + 8001ba2: 6078 str r0, [r7, #4] uint16_t register_number = transaction->register_number; - 8001b68: 2316 movs r3, #22 - 8001b6a: 18fb adds r3, r7, r3 - 8001b6c: 687a ldr r2, [r7, #4] - 8001b6e: 8892 ldrh r2, [r2, #4] - 8001b70: 801a strh r2, [r3, #0] + 8001ba4: 2316 movs r3, #22 + 8001ba6: 18fb adds r3, r7, r3 + 8001ba8: 687a ldr r2, [r7, #4] + 8001baa: 8892 ldrh r2, [r2, #4] + 8001bac: 801a strh r2, [r3, #0] switch (transaction->function_code) - 8001b72: 687b ldr r3, [r7, #4] - 8001b74: 781b ldrb r3, [r3, #0] - 8001b76: 2b10 cmp r3, #16 - 8001b78: d100 bne.n 8001b7c - 8001b7a: e0da b.n 8001d32 - 8001b7c: dd00 ble.n 8001b80 - 8001b7e: e151 b.n 8001e24 - 8001b80: 2b06 cmp r3, #6 - 8001b82: d100 bne.n 8001b86 - 8001b84: e0d2 b.n 8001d2c - 8001b86: dd00 ble.n 8001b8a - 8001b88: e14c b.n 8001e24 - 8001b8a: 2b03 cmp r3, #3 - 8001b8c: d065 beq.n 8001c5a - 8001b8e: 2b04 cmp r3, #4 - 8001b90: d000 beq.n 8001b94 - 8001b92: e147 b.n 8001e24 + 8001bae: 687b ldr r3, [r7, #4] + 8001bb0: 781b ldrb r3, [r3, #0] + 8001bb2: 2b10 cmp r3, #16 + 8001bb4: d100 bne.n 8001bb8 + 8001bb6: e0da b.n 8001d6e + 8001bb8: dd00 ble.n 8001bbc + 8001bba: e151 b.n 8001e60 + 8001bbc: 2b06 cmp r3, #6 + 8001bbe: d100 bne.n 8001bc2 + 8001bc0: e0d2 b.n 8001d68 + 8001bc2: dd00 ble.n 8001bc6 + 8001bc4: e14c b.n 8001e60 + 8001bc6: 2b03 cmp r3, #3 + 8001bc8: d065 beq.n 8001c96 + 8001bca: 2b04 cmp r3, #4 + 8001bcc: d000 beq.n 8001bd0 + 8001bce: e147 b.n 8001e60 { case MODBUS_READ_INPUT_REGISTERS: for (int i = 0; i < transaction->register_count; i++, register_number++) - 8001b94: 2300 movs r3, #0 - 8001b96: 613b str r3, [r7, #16] - 8001b98: e057 b.n 8001c4a + 8001bd0: 2300 movs r3, #0 + 8001bd2: 613b str r3, [r7, #16] + 8001bd4: e057 b.n 8001c86 { switch (register_number) - 8001b9a: 2316 movs r3, #22 - 8001b9c: 18fb adds r3, r7, r3 - 8001b9e: 881b ldrh r3, [r3, #0] - 8001ba0: 4aa3 ldr r2, [pc, #652] ; (8001e30 ) - 8001ba2: 4694 mov ip, r2 - 8001ba4: 4463 add r3, ip - 8001ba6: 2b06 cmp r3, #6 - 8001ba8: d843 bhi.n 8001c32 - 8001baa: 009a lsls r2, r3, #2 - 8001bac: 4ba1 ldr r3, [pc, #644] ; (8001e34 ) - 8001bae: 18d3 adds r3, r2, r3 - 8001bb0: 681b ldr r3, [r3, #0] - 8001bb2: 469f mov pc, r3 + 8001bd6: 2316 movs r3, #22 + 8001bd8: 18fb adds r3, r7, r3 + 8001bda: 881b ldrh r3, [r3, #0] + 8001bdc: 4aa3 ldr r2, [pc, #652] ; (8001e6c ) + 8001bde: 4694 mov ip, r2 + 8001be0: 4463 add r3, ip + 8001be2: 2b06 cmp r3, #6 + 8001be4: d843 bhi.n 8001c6e + 8001be6: 009a lsls r2, r3, #2 + 8001be8: 4ba1 ldr r3, [pc, #644] ; (8001e70 ) + 8001bea: 18d3 adds r3, r2, r3 + 8001bec: 681b ldr r3, [r3, #0] + 8001bee: 469f mov pc, r3 { case REGISTER_NUM_CO2: transaction->input_registers[i] = (uint16_t)CO2; - 8001bb4: 4ba0 ldr r3, [pc, #640] ; (8001e38 ) - 8001bb6: 681b ldr r3, [r3, #0] - 8001bb8: b299 uxth r1, r3 - 8001bba: 687b ldr r3, [r7, #4] - 8001bbc: 693a ldr r2, [r7, #16] - 8001bbe: 3204 adds r2, #4 - 8001bc0: 0052 lsls r2, r2, #1 - 8001bc2: 52d1 strh r1, [r2, r3] + 8001bf0: 4ba0 ldr r3, [pc, #640] ; (8001e74 ) + 8001bf2: 681b ldr r3, [r3, #0] + 8001bf4: b299 uxth r1, r3 + 8001bf6: 687b ldr r3, [r7, #4] + 8001bf8: 693a ldr r2, [r7, #16] + 8001bfa: 3204 adds r2, #4 + 8001bfc: 0052 lsls r2, r2, #1 + 8001bfe: 52d1 strh r1, [r2, r3] break; - 8001bc4: e038 b.n 8001c38 + 8001c00: e038 b.n 8001c74 case REGISTER_NUM_T_SHT4x: transaction->input_registers[i] = (uint16_t)T_SHT4x; - 8001bc6: 4b9d ldr r3, [pc, #628] ; (8001e3c ) - 8001bc8: 681b ldr r3, [r3, #0] - 8001bca: b299 uxth r1, r3 - 8001bcc: 687b ldr r3, [r7, #4] - 8001bce: 693a ldr r2, [r7, #16] - 8001bd0: 3204 adds r2, #4 - 8001bd2: 0052 lsls r2, r2, #1 - 8001bd4: 52d1 strh r1, [r2, r3] + 8001c02: 4b9d ldr r3, [pc, #628] ; (8001e78 ) + 8001c04: 681b ldr r3, [r3, #0] + 8001c06: b299 uxth r1, r3 + 8001c08: 687b ldr r3, [r7, #4] + 8001c0a: 693a ldr r2, [r7, #16] + 8001c0c: 3204 adds r2, #4 + 8001c0e: 0052 lsls r2, r2, #1 + 8001c10: 52d1 strh r1, [r2, r3] break; - 8001bd6: e02f b.n 8001c38 + 8001c12: e02f b.n 8001c74 case REGISTER_NUM_RH_SHT4x: transaction->input_registers[i] = (uint16_t)RH_SHT4x; - 8001bd8: 4b99 ldr r3, [pc, #612] ; (8001e40 ) - 8001bda: 681b ldr r3, [r3, #0] - 8001bdc: b299 uxth r1, r3 - 8001bde: 687b ldr r3, [r7, #4] - 8001be0: 693a ldr r2, [r7, #16] - 8001be2: 3204 adds r2, #4 - 8001be4: 0052 lsls r2, r2, #1 - 8001be6: 52d1 strh r1, [r2, r3] + 8001c14: 4b99 ldr r3, [pc, #612] ; (8001e7c ) + 8001c16: 681b ldr r3, [r3, #0] + 8001c18: b299 uxth r1, r3 + 8001c1a: 687b ldr r3, [r7, #4] + 8001c1c: 693a ldr r2, [r7, #16] + 8001c1e: 3204 adds r2, #4 + 8001c20: 0052 lsls r2, r2, #1 + 8001c22: 52d1 strh r1, [r2, r3] break; - 8001be8: e026 b.n 8001c38 + 8001c24: e026 b.n 8001c74 case REGISTER_NUM_T_SCD4x: transaction->input_registers[i] = (uint16_t)T_SCD4x; - 8001bea: 4b96 ldr r3, [pc, #600] ; (8001e44 ) - 8001bec: 681b ldr r3, [r3, #0] - 8001bee: b299 uxth r1, r3 - 8001bf0: 687b ldr r3, [r7, #4] - 8001bf2: 693a ldr r2, [r7, #16] - 8001bf4: 3204 adds r2, #4 - 8001bf6: 0052 lsls r2, r2, #1 - 8001bf8: 52d1 strh r1, [r2, r3] + 8001c26: 4b96 ldr r3, [pc, #600] ; (8001e80 ) + 8001c28: 681b ldr r3, [r3, #0] + 8001c2a: b299 uxth r1, r3 + 8001c2c: 687b ldr r3, [r7, #4] + 8001c2e: 693a ldr r2, [r7, #16] + 8001c30: 3204 adds r2, #4 + 8001c32: 0052 lsls r2, r2, #1 + 8001c34: 52d1 strh r1, [r2, r3] break; - 8001bfa: e01d b.n 8001c38 + 8001c36: e01d b.n 8001c74 case REGISTER_NUM_RH_SCD4x: transaction->input_registers[i] = (uint16_t)RH_SCD4x; - 8001bfc: 4b92 ldr r3, [pc, #584] ; (8001e48 ) - 8001bfe: 681b ldr r3, [r3, #0] - 8001c00: b299 uxth r1, r3 - 8001c02: 687b ldr r3, [r7, #4] - 8001c04: 693a ldr r2, [r7, #16] - 8001c06: 3204 adds r2, #4 - 8001c08: 0052 lsls r2, r2, #1 - 8001c0a: 52d1 strh r1, [r2, r3] + 8001c38: 4b92 ldr r3, [pc, #584] ; (8001e84 ) + 8001c3a: 681b ldr r3, [r3, #0] + 8001c3c: b299 uxth r1, r3 + 8001c3e: 687b ldr r3, [r7, #4] + 8001c40: 693a ldr r2, [r7, #16] + 8001c42: 3204 adds r2, #4 + 8001c44: 0052 lsls r2, r2, #1 + 8001c46: 52d1 strh r1, [r2, r3] break; - 8001c0c: e014 b.n 8001c38 + 8001c48: e014 b.n 8001c74 case REGISTER_NUM_T_SHT4x_SIGNED: transaction->input_registers_signed[i] = (int16_t)T_SHT4x; - 8001c0e: 4b8b ldr r3, [pc, #556] ; (8001e3c ) - 8001c10: 681b ldr r3, [r3, #0] - 8001c12: b219 sxth r1, r3 - 8001c14: 687b ldr r3, [r7, #4] - 8001c16: 693a ldr r2, [r7, #16] - 8001c18: 3204 adds r2, #4 - 8001c1a: 0052 lsls r2, r2, #1 - 8001c1c: 52d1 strh r1, [r2, r3] + 8001c4a: 4b8b ldr r3, [pc, #556] ; (8001e78 ) + 8001c4c: 681b ldr r3, [r3, #0] + 8001c4e: b219 sxth r1, r3 + 8001c50: 687b ldr r3, [r7, #4] + 8001c52: 693a ldr r2, [r7, #16] + 8001c54: 3204 adds r2, #4 + 8001c56: 0052 lsls r2, r2, #1 + 8001c58: 52d1 strh r1, [r2, r3] break; - 8001c1e: e00b b.n 8001c38 + 8001c5a: e00b b.n 8001c74 case REGISTER_NUM_T_SCD4x_SIGNED: transaction->input_registers_signed[i] = (int16_t)T_SCD4x; - 8001c20: 4b88 ldr r3, [pc, #544] ; (8001e44 ) - 8001c22: 681b ldr r3, [r3, #0] - 8001c24: b219 sxth r1, r3 - 8001c26: 687b ldr r3, [r7, #4] - 8001c28: 693a ldr r2, [r7, #16] - 8001c2a: 3204 adds r2, #4 - 8001c2c: 0052 lsls r2, r2, #1 - 8001c2e: 52d1 strh r1, [r2, r3] + 8001c5c: 4b88 ldr r3, [pc, #544] ; (8001e80 ) + 8001c5e: 681b ldr r3, [r3, #0] + 8001c60: b219 sxth r1, r3 + 8001c62: 687b ldr r3, [r7, #4] + 8001c64: 693a ldr r2, [r7, #16] + 8001c66: 3204 adds r2, #4 + 8001c68: 0052 lsls r2, r2, #1 + 8001c6a: 52d1 strh r1, [r2, r3] break; - 8001c30: e002 b.n 8001c38 + 8001c6c: e002 b.n 8001c74 default: return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; - 8001c32: 2305 movs r3, #5 - 8001c34: 425b negs r3, r3 - 8001c36: e0f7 b.n 8001e28 + 8001c6e: 2305 movs r3, #5 + 8001c70: 425b negs r3, r3 + 8001c72: e0f7 b.n 8001e64 for (int i = 0; i < transaction->register_count; i++, register_number++) - 8001c38: 693b ldr r3, [r7, #16] - 8001c3a: 3301 adds r3, #1 - 8001c3c: 613b str r3, [r7, #16] - 8001c3e: 2116 movs r1, #22 - 8001c40: 187b adds r3, r7, r1 - 8001c42: 881a ldrh r2, [r3, #0] - 8001c44: 187b adds r3, r7, r1 - 8001c46: 3201 adds r2, #1 - 8001c48: 801a strh r2, [r3, #0] - 8001c4a: 687b ldr r3, [r7, #4] - 8001c4c: 799b ldrb r3, [r3, #6] - 8001c4e: 001a movs r2, r3 - 8001c50: 693b ldr r3, [r7, #16] - 8001c52: 4293 cmp r3, r2 - 8001c54: dba1 blt.n 8001b9a + 8001c74: 693b ldr r3, [r7, #16] + 8001c76: 3301 adds r3, #1 + 8001c78: 613b str r3, [r7, #16] + 8001c7a: 2116 movs r1, #22 + 8001c7c: 187b adds r3, r7, r1 + 8001c7e: 881a ldrh r2, [r3, #0] + 8001c80: 187b adds r3, r7, r1 + 8001c82: 3201 adds r2, #1 + 8001c84: 801a strh r2, [r3, #0] + 8001c86: 687b ldr r3, [r7, #4] + 8001c88: 799b ldrb r3, [r3, #6] + 8001c8a: 001a movs r2, r3 + 8001c8c: 693b ldr r3, [r7, #16] + 8001c8e: 4293 cmp r3, r2 + 8001c90: dba1 blt.n 8001bd6 } } return MODBUS_OK; - 8001c56: 2300 movs r3, #0 - 8001c58: e0e6 b.n 8001e28 + 8001c92: 2300 movs r3, #0 + 8001c94: e0e6 b.n 8001e64 case MODBUS_READ_HOLDING_REGISTERS: for (int i = 0; i < transaction->register_count; i++, register_number++) - 8001c5a: 2300 movs r3, #0 - 8001c5c: 60fb str r3, [r7, #12] - 8001c5e: e05d b.n 8001d1c + 8001c96: 2300 movs r3, #0 + 8001c98: 60fb str r3, [r7, #12] + 8001c9a: e05d b.n 8001d58 { switch (register_number) - 8001c60: 2316 movs r3, #22 - 8001c62: 18fb adds r3, r7, r3 - 8001c64: 881b ldrh r3, [r3, #0] - 8001c66: 4a79 ldr r2, [pc, #484] ; (8001e4c ) - 8001c68: 4694 mov ip, r2 - 8001c6a: 4463 add r3, ip - 8001c6c: 2b07 cmp r3, #7 - 8001c6e: d849 bhi.n 8001d04 - 8001c70: 009a lsls r2, r3, #2 - 8001c72: 4b77 ldr r3, [pc, #476] ; (8001e50 ) - 8001c74: 18d3 adds r3, r2, r3 - 8001c76: 681b ldr r3, [r3, #0] - 8001c78: 469f mov pc, r3 + 8001c9c: 2316 movs r3, #22 + 8001c9e: 18fb adds r3, r7, r3 + 8001ca0: 881b ldrh r3, [r3, #0] + 8001ca2: 4a79 ldr r2, [pc, #484] ; (8001e88 ) + 8001ca4: 4694 mov ip, r2 + 8001ca6: 4463 add r3, ip + 8001ca8: 2b07 cmp r3, #7 + 8001caa: d849 bhi.n 8001d40 + 8001cac: 009a lsls r2, r3, #2 + 8001cae: 4b77 ldr r3, [pc, #476] ; (8001e8c ) + 8001cb0: 18d3 adds r3, r2, r3 + 8001cb2: 681b ldr r3, [r3, #0] + 8001cb4: 469f mov pc, r3 { case REGISTER_NUM_LED_ON: transaction->holding_registers[i] = (uint16_t)(sensor_config.led_on); - 8001c7a: 4b76 ldr r3, [pc, #472] ; (8001e54 ) - 8001c7c: 781b ldrb r3, [r3, #0] - 8001c7e: b299 uxth r1, r3 - 8001c80: 687b ldr r3, [r7, #4] - 8001c82: 68fa ldr r2, [r7, #12] - 8001c84: 3204 adds r2, #4 - 8001c86: 0052 lsls r2, r2, #1 - 8001c88: 52d1 strh r1, [r2, r3] + 8001cb6: 4b76 ldr r3, [pc, #472] ; (8001e90 ) + 8001cb8: 781b ldrb r3, [r3, #0] + 8001cba: b299 uxth r1, r3 + 8001cbc: 687b ldr r3, [r7, #4] + 8001cbe: 68fa ldr r2, [r7, #12] + 8001cc0: 3204 adds r2, #4 + 8001cc2: 0052 lsls r2, r2, #1 + 8001cc4: 52d1 strh r1, [r2, r3] break; - 8001c8a: e03e b.n 8001d0a + 8001cc6: e03e b.n 8001d46 case REGISTER_NUM_LED_BRIGHTNESS: transaction->holding_registers[i] = (uint16_t)(sensor_config.led_brightness); - 8001c8c: 4b71 ldr r3, [pc, #452] ; (8001e54 ) - 8001c8e: 8859 ldrh r1, [r3, #2] - 8001c90: 687b ldr r3, [r7, #4] - 8001c92: 68fa ldr r2, [r7, #12] - 8001c94: 3204 adds r2, #4 - 8001c96: 0052 lsls r2, r2, #1 - 8001c98: 52d1 strh r1, [r2, r3] + 8001cc8: 4b71 ldr r3, [pc, #452] ; (8001e90 ) + 8001cca: 8859 ldrh r1, [r3, #2] + 8001ccc: 687b ldr r3, [r7, #4] + 8001cce: 68fa ldr r2, [r7, #12] + 8001cd0: 3204 adds r2, #4 + 8001cd2: 0052 lsls r2, r2, #1 + 8001cd4: 52d1 strh r1, [r2, r3] break; - 8001c9a: e036 b.n 8001d0a + 8001cd6: e036 b.n 8001d46 case REGISTER_NUM_LED_SMOOTH: transaction->holding_registers[i] = (uint16_t)(sensor_config.led_smooth); - 8001c9c: 4b6d ldr r3, [pc, #436] ; (8001e54 ) - 8001c9e: 791b ldrb r3, [r3, #4] - 8001ca0: b299 uxth r1, r3 - 8001ca2: 687b ldr r3, [r7, #4] - 8001ca4: 68fa ldr r2, [r7, #12] - 8001ca6: 3204 adds r2, #4 - 8001ca8: 0052 lsls r2, r2, #1 - 8001caa: 52d1 strh r1, [r2, r3] + 8001cd8: 4b6d ldr r3, [pc, #436] ; (8001e90 ) + 8001cda: 791b ldrb r3, [r3, #4] + 8001cdc: b299 uxth r1, r3 + 8001cde: 687b ldr r3, [r7, #4] + 8001ce0: 68fa ldr r2, [r7, #12] + 8001ce2: 3204 adds r2, #4 + 8001ce4: 0052 lsls r2, r2, #1 + 8001ce6: 52d1 strh r1, [r2, r3] break; - 8001cac: e02d b.n 8001d0a + 8001ce8: e02d b.n 8001d46 case REGISTER_NUM_CO2_ALERT_LIMIT1: transaction->holding_registers[i] = (uint16_t)(sensor_config.led_co2_alert_limit1); - 8001cae: 4b69 ldr r3, [pc, #420] ; (8001e54 ) - 8001cb0: 88d9 ldrh r1, [r3, #6] - 8001cb2: 687b ldr r3, [r7, #4] - 8001cb4: 68fa ldr r2, [r7, #12] - 8001cb6: 3204 adds r2, #4 - 8001cb8: 0052 lsls r2, r2, #1 - 8001cba: 52d1 strh r1, [r2, r3] + 8001cea: 4b69 ldr r3, [pc, #420] ; (8001e90 ) + 8001cec: 88d9 ldrh r1, [r3, #6] + 8001cee: 687b ldr r3, [r7, #4] + 8001cf0: 68fa ldr r2, [r7, #12] + 8001cf2: 3204 adds r2, #4 + 8001cf4: 0052 lsls r2, r2, #1 + 8001cf6: 52d1 strh r1, [r2, r3] break; - 8001cbc: e025 b.n 8001d0a + 8001cf8: e025 b.n 8001d46 case REGISTER_NUM_CO2_ALERT_LIMIT2: transaction->holding_registers[i] = (uint16_t)(sensor_config.led_co2_alert_limit2); - 8001cbe: 4b65 ldr r3, [pc, #404] ; (8001e54 ) - 8001cc0: 8919 ldrh r1, [r3, #8] - 8001cc2: 687b ldr r3, [r7, #4] - 8001cc4: 68fa ldr r2, [r7, #12] - 8001cc6: 3204 adds r2, #4 - 8001cc8: 0052 lsls r2, r2, #1 - 8001cca: 52d1 strh r1, [r2, r3] + 8001cfa: 4b65 ldr r3, [pc, #404] ; (8001e90 ) + 8001cfc: 8919 ldrh r1, [r3, #8] + 8001cfe: 687b ldr r3, [r7, #4] + 8001d00: 68fa ldr r2, [r7, #12] + 8001d02: 3204 adds r2, #4 + 8001d04: 0052 lsls r2, r2, #1 + 8001d06: 52d1 strh r1, [r2, r3] break; - 8001ccc: e01d b.n 8001d0a + 8001d08: e01d b.n 8001d46 case REGISTER_NUM_SCD4x_T_OFFSET: transaction->holding_registers[i] = (uint16_t)(sensor_config.scd4x_t_offset); - 8001cce: 4b61 ldr r3, [pc, #388] ; (8001e54 ) - 8001cd0: 220a movs r2, #10 - 8001cd2: 5e9b ldrsh r3, [r3, r2] - 8001cd4: b299 uxth r1, r3 - 8001cd6: 687b ldr r3, [r7, #4] - 8001cd8: 68fa ldr r2, [r7, #12] - 8001cda: 3204 adds r2, #4 - 8001cdc: 0052 lsls r2, r2, #1 - 8001cde: 52d1 strh r1, [r2, r3] + 8001d0a: 4b61 ldr r3, [pc, #388] ; (8001e90 ) + 8001d0c: 220a movs r2, #10 + 8001d0e: 5e9b ldrsh r3, [r3, r2] + 8001d10: b299 uxth r1, r3 + 8001d12: 687b ldr r3, [r7, #4] + 8001d14: 68fa ldr r2, [r7, #12] + 8001d16: 3204 adds r2, #4 + 8001d18: 0052 lsls r2, r2, #1 + 8001d1a: 52d1 strh r1, [r2, r3] break; - 8001ce0: e013 b.n 8001d0a + 8001d1c: e013 b.n 8001d46 case REGISTER_NUM_MODBUS_ADDR: transaction->holding_registers[i] = (uint16_t)(sensor_config.modbus_addr); - 8001ce2: 4b5c ldr r3, [pc, #368] ; (8001e54 ) - 8001ce4: 8999 ldrh r1, [r3, #12] - 8001ce6: 687b ldr r3, [r7, #4] - 8001ce8: 68fa ldr r2, [r7, #12] - 8001cea: 3204 adds r2, #4 - 8001cec: 0052 lsls r2, r2, #1 - 8001cee: 52d1 strh r1, [r2, r3] + 8001d1e: 4b5c ldr r3, [pc, #368] ; (8001e90 ) + 8001d20: 8999 ldrh r1, [r3, #12] + 8001d22: 687b ldr r3, [r7, #4] + 8001d24: 68fa ldr r2, [r7, #12] + 8001d26: 3204 adds r2, #4 + 8001d28: 0052 lsls r2, r2, #1 + 8001d2a: 52d1 strh r1, [r2, r3] break; - 8001cf0: e00b b.n 8001d0a + 8001d2c: e00b b.n 8001d46 case REGISTER_NUM_BAUDRATE: transaction->holding_registers[i] = (uint16_t)(sensor_config.baudrate_index); - 8001cf2: 4b58 ldr r3, [pc, #352] ; (8001e54 ) - 8001cf4: 691b ldr r3, [r3, #16] - 8001cf6: b299 uxth r1, r3 - 8001cf8: 687b ldr r3, [r7, #4] - 8001cfa: 68fa ldr r2, [r7, #12] - 8001cfc: 3204 adds r2, #4 - 8001cfe: 0052 lsls r2, r2, #1 - 8001d00: 52d1 strh r1, [r2, r3] + 8001d2e: 4b58 ldr r3, [pc, #352] ; (8001e90 ) + 8001d30: 691b ldr r3, [r3, #16] + 8001d32: b299 uxth r1, r3 + 8001d34: 687b ldr r3, [r7, #4] + 8001d36: 68fa ldr r2, [r7, #12] + 8001d38: 3204 adds r2, #4 + 8001d3a: 0052 lsls r2, r2, #1 + 8001d3c: 52d1 strh r1, [r2, r3] break; - 8001d02: e002 b.n 8001d0a + 8001d3e: e002 b.n 8001d46 default: return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; - 8001d04: 2305 movs r3, #5 - 8001d06: 425b negs r3, r3 - 8001d08: e08e b.n 8001e28 + 8001d40: 2305 movs r3, #5 + 8001d42: 425b negs r3, r3 + 8001d44: e08e b.n 8001e64 for (int i = 0; i < transaction->register_count; i++, register_number++) - 8001d0a: 68fb ldr r3, [r7, #12] - 8001d0c: 3301 adds r3, #1 - 8001d0e: 60fb str r3, [r7, #12] - 8001d10: 2116 movs r1, #22 - 8001d12: 187b adds r3, r7, r1 - 8001d14: 881a ldrh r2, [r3, #0] - 8001d16: 187b adds r3, r7, r1 - 8001d18: 3201 adds r2, #1 - 8001d1a: 801a strh r2, [r3, #0] - 8001d1c: 687b ldr r3, [r7, #4] - 8001d1e: 799b ldrb r3, [r3, #6] - 8001d20: 001a movs r2, r3 - 8001d22: 68fb ldr r3, [r7, #12] - 8001d24: 4293 cmp r3, r2 - 8001d26: db9b blt.n 8001c60 + 8001d46: 68fb ldr r3, [r7, #12] + 8001d48: 3301 adds r3, #1 + 8001d4a: 60fb str r3, [r7, #12] + 8001d4c: 2116 movs r1, #22 + 8001d4e: 187b adds r3, r7, r1 + 8001d50: 881a ldrh r2, [r3, #0] + 8001d52: 187b adds r3, r7, r1 + 8001d54: 3201 adds r2, #1 + 8001d56: 801a strh r2, [r3, #0] + 8001d58: 687b ldr r3, [r7, #4] + 8001d5a: 799b ldrb r3, [r3, #6] + 8001d5c: 001a movs r2, r3 + 8001d5e: 68fb ldr r3, [r7, #12] + 8001d60: 4293 cmp r3, r2 + 8001d62: db9b blt.n 8001c9c } } return MODBUS_OK; - 8001d28: 2300 movs r3, #0 - 8001d2a: e07d b.n 8001e28 + 8001d64: 2300 movs r3, #0 + 8001d66: e07d b.n 8001e64 case MODBUS_WRITE_SINGLE_REGISTER: transaction->register_count = 1; - 8001d2c: 687b ldr r3, [r7, #4] - 8001d2e: 2201 movs r2, #1 - 8001d30: 719a strb r2, [r3, #6] + 8001d68: 687b ldr r3, [r7, #4] + 8001d6a: 2201 movs r2, #1 + 8001d6c: 719a strb r2, [r3, #6] case MODBUS_WRITE_MULTIPLE_REGISTERS: for (int i = 0; i < transaction->register_count; i++, register_number++) - 8001d32: 2300 movs r3, #0 - 8001d34: 60bb str r3, [r7, #8] - 8001d36: e06a b.n 8001e0e + 8001d6e: 2300 movs r3, #0 + 8001d70: 60bb str r3, [r7, #8] + 8001d72: e06a b.n 8001e4a { switch (register_number) - 8001d38: 2316 movs r3, #22 - 8001d3a: 18fb adds r3, r7, r3 - 8001d3c: 881b ldrh r3, [r3, #0] - 8001d3e: 4a43 ldr r2, [pc, #268] ; (8001e4c ) - 8001d40: 4694 mov ip, r2 - 8001d42: 4463 add r3, ip - 8001d44: 2b07 cmp r3, #7 - 8001d46: d855 bhi.n 8001df4 - 8001d48: 009a lsls r2, r3, #2 - 8001d4a: 4b43 ldr r3, [pc, #268] ; (8001e58 ) - 8001d4c: 18d3 adds r3, r2, r3 - 8001d4e: 681b ldr r3, [r3, #0] - 8001d50: 469f mov pc, r3 + 8001d74: 2316 movs r3, #22 + 8001d76: 18fb adds r3, r7, r3 + 8001d78: 881b ldrh r3, [r3, #0] + 8001d7a: 4a43 ldr r2, [pc, #268] ; (8001e88 ) + 8001d7c: 4694 mov ip, r2 + 8001d7e: 4463 add r3, ip + 8001d80: 2b07 cmp r3, #7 + 8001d82: d855 bhi.n 8001e30 + 8001d84: 009a lsls r2, r3, #2 + 8001d86: 4b43 ldr r3, [pc, #268] ; (8001e94 ) + 8001d88: 18d3 adds r3, r2, r3 + 8001d8a: 681b ldr r3, [r3, #0] + 8001d8c: 469f mov pc, r3 { case REGISTER_NUM_LED_ON: sensor_config.led_on = (uint8_t) transaction->holding_registers[i]; - 8001d52: 687b ldr r3, [r7, #4] - 8001d54: 68ba ldr r2, [r7, #8] - 8001d56: 3204 adds r2, #4 - 8001d58: 0052 lsls r2, r2, #1 - 8001d5a: 5ad3 ldrh r3, [r2, r3] - 8001d5c: b2da uxtb r2, r3 - 8001d5e: 4b3d ldr r3, [pc, #244] ; (8001e54 ) - 8001d60: 701a strb r2, [r3, #0] + 8001d8e: 687b ldr r3, [r7, #4] + 8001d90: 68ba ldr r2, [r7, #8] + 8001d92: 3204 adds r2, #4 + 8001d94: 0052 lsls r2, r2, #1 + 8001d96: 5ad3 ldrh r3, [r2, r3] + 8001d98: b2da uxtb r2, r3 + 8001d9a: 4b3d ldr r3, [pc, #244] ; (8001e90 ) + 8001d9c: 701a strb r2, [r3, #0] break; - 8001d62: e04b b.n 8001dfc + 8001d9e: e04b b.n 8001e38 case REGISTER_NUM_LED_BRIGHTNESS: sensor_config.led_brightness = (uint16_t) transaction->holding_registers[i]; - 8001d64: 687b ldr r3, [r7, #4] - 8001d66: 68ba ldr r2, [r7, #8] - 8001d68: 3204 adds r2, #4 - 8001d6a: 0052 lsls r2, r2, #1 - 8001d6c: 5ad2 ldrh r2, [r2, r3] - 8001d6e: 4b39 ldr r3, [pc, #228] ; (8001e54 ) - 8001d70: 805a strh r2, [r3, #2] + 8001da0: 687b ldr r3, [r7, #4] + 8001da2: 68ba ldr r2, [r7, #8] + 8001da4: 3204 adds r2, #4 + 8001da6: 0052 lsls r2, r2, #1 + 8001da8: 5ad2 ldrh r2, [r2, r3] + 8001daa: 4b39 ldr r3, [pc, #228] ; (8001e90 ) + 8001dac: 805a strh r2, [r3, #2] break; - 8001d72: e043 b.n 8001dfc + 8001dae: e043 b.n 8001e38 case REGISTER_NUM_LED_SMOOTH: sensor_config.led_smooth = (uint16_t) transaction->holding_registers[i]; - 8001d74: 687b ldr r3, [r7, #4] - 8001d76: 68ba ldr r2, [r7, #8] - 8001d78: 3204 adds r2, #4 - 8001d7a: 0052 lsls r2, r2, #1 - 8001d7c: 5ad3 ldrh r3, [r2, r3] - 8001d7e: b2da uxtb r2, r3 - 8001d80: 4b34 ldr r3, [pc, #208] ; (8001e54 ) - 8001d82: 711a strb r2, [r3, #4] + 8001db0: 687b ldr r3, [r7, #4] + 8001db2: 68ba ldr r2, [r7, #8] + 8001db4: 3204 adds r2, #4 + 8001db6: 0052 lsls r2, r2, #1 + 8001db8: 5ad3 ldrh r3, [r2, r3] + 8001dba: b2da uxtb r2, r3 + 8001dbc: 4b34 ldr r3, [pc, #208] ; (8001e90 ) + 8001dbe: 711a strb r2, [r3, #4] break; - 8001d84: e03a b.n 8001dfc + 8001dc0: e03a b.n 8001e38 case REGISTER_NUM_CO2_ALERT_LIMIT1: sensor_config.led_co2_alert_limit1 = (uint16_t) transaction->holding_registers[i]; - 8001d86: 687b ldr r3, [r7, #4] - 8001d88: 68ba ldr r2, [r7, #8] - 8001d8a: 3204 adds r2, #4 - 8001d8c: 0052 lsls r2, r2, #1 - 8001d8e: 5ad2 ldrh r2, [r2, r3] - 8001d90: 4b30 ldr r3, [pc, #192] ; (8001e54 ) - 8001d92: 80da strh r2, [r3, #6] + 8001dc2: 687b ldr r3, [r7, #4] + 8001dc4: 68ba ldr r2, [r7, #8] + 8001dc6: 3204 adds r2, #4 + 8001dc8: 0052 lsls r2, r2, #1 + 8001dca: 5ad2 ldrh r2, [r2, r3] + 8001dcc: 4b30 ldr r3, [pc, #192] ; (8001e90 ) + 8001dce: 80da strh r2, [r3, #6] break; - 8001d94: e032 b.n 8001dfc + 8001dd0: e032 b.n 8001e38 case REGISTER_NUM_CO2_ALERT_LIMIT2: sensor_config.led_co2_alert_limit2 = (uint16_t) transaction->holding_registers[i]; - 8001d96: 687b ldr r3, [r7, #4] - 8001d98: 68ba ldr r2, [r7, #8] - 8001d9a: 3204 adds r2, #4 - 8001d9c: 0052 lsls r2, r2, #1 - 8001d9e: 5ad2 ldrh r2, [r2, r3] - 8001da0: 4b2c ldr r3, [pc, #176] ; (8001e54 ) - 8001da2: 811a strh r2, [r3, #8] + 8001dd2: 687b ldr r3, [r7, #4] + 8001dd4: 68ba ldr r2, [r7, #8] + 8001dd6: 3204 adds r2, #4 + 8001dd8: 0052 lsls r2, r2, #1 + 8001dda: 5ad2 ldrh r2, [r2, r3] + 8001ddc: 4b2c ldr r3, [pc, #176] ; (8001e90 ) + 8001dde: 811a strh r2, [r3, #8] break; - 8001da4: e02a b.n 8001dfc + 8001de0: e02a b.n 8001e38 case REGISTER_NUM_SCD4x_T_OFFSET: sensor_config.scd4x_t_offset = (int16_t) transaction->holding_registers[i]; - 8001da6: 687b ldr r3, [r7, #4] - 8001da8: 68ba ldr r2, [r7, #8] - 8001daa: 3204 adds r2, #4 - 8001dac: 0052 lsls r2, r2, #1 - 8001dae: 5ad3 ldrh r3, [r2, r3] - 8001db0: b21a sxth r2, r3 - 8001db2: 4b28 ldr r3, [pc, #160] ; (8001e54 ) - 8001db4: 815a strh r2, [r3, #10] + 8001de2: 687b ldr r3, [r7, #4] + 8001de4: 68ba ldr r2, [r7, #8] + 8001de6: 3204 adds r2, #4 + 8001de8: 0052 lsls r2, r2, #1 + 8001dea: 5ad3 ldrh r3, [r2, r3] + 8001dec: b21a sxth r2, r3 + 8001dee: 4b28 ldr r3, [pc, #160] ; (8001e90 ) + 8001df0: 815a strh r2, [r3, #10] break; - 8001db6: e021 b.n 8001dfc + 8001df2: e021 b.n 8001e38 case REGISTER_NUM_MODBUS_ADDR: sensor_config.modbus_addr = (uint16_t) transaction->holding_registers[i]; - 8001db8: 687b ldr r3, [r7, #4] - 8001dba: 68ba ldr r2, [r7, #8] - 8001dbc: 3204 adds r2, #4 - 8001dbe: 0052 lsls r2, r2, #1 - 8001dc0: 5ad2 ldrh r2, [r2, r3] - 8001dc2: 4b24 ldr r3, [pc, #144] ; (8001e54 ) - 8001dc4: 819a strh r2, [r3, #12] + 8001df4: 687b ldr r3, [r7, #4] + 8001df6: 68ba ldr r2, [r7, #8] + 8001df8: 3204 adds r2, #4 + 8001dfa: 0052 lsls r2, r2, #1 + 8001dfc: 5ad2 ldrh r2, [r2, r3] + 8001dfe: 4b24 ldr r3, [pc, #144] ; (8001e90 ) + 8001e00: 819a strh r2, [r3, #12] modbus_address_changed = 1; - 8001dc6: 4b25 ldr r3, [pc, #148] ; (8001e5c ) - 8001dc8: 2201 movs r2, #1 - 8001dca: 701a strb r2, [r3, #0] + 8001e02: 4b25 ldr r3, [pc, #148] ; (8001e98 ) + 8001e04: 2201 movs r2, #1 + 8001e06: 701a strb r2, [r3, #0] break; - 8001dcc: e016 b.n 8001dfc + 8001e08: e016 b.n 8001e38 case REGISTER_NUM_BAUDRATE: if (transaction->holding_registers[0] < config_baudrates_length) - 8001dce: 687b ldr r3, [r7, #4] - 8001dd0: 891a ldrh r2, [r3, #8] - 8001dd2: 4b23 ldr r3, [pc, #140] ; (8001e60 ) - 8001dd4: 781b ldrb r3, [r3, #0] - 8001dd6: b29b uxth r3, r3 - 8001dd8: 429a cmp r2, r3 - 8001dda: d20e bcs.n 8001dfa + 8001e0a: 687b ldr r3, [r7, #4] + 8001e0c: 891a ldrh r2, [r3, #8] + 8001e0e: 4b23 ldr r3, [pc, #140] ; (8001e9c ) + 8001e10: 781b ldrb r3, [r3, #0] + 8001e12: b29b uxth r3, r3 + 8001e14: 429a cmp r2, r3 + 8001e16: d20e bcs.n 8001e36 { sensor_config.baudrate_index = (uint16_t) (transaction->holding_registers[i]); - 8001ddc: 687b ldr r3, [r7, #4] - 8001dde: 68ba ldr r2, [r7, #8] - 8001de0: 3204 adds r2, #4 - 8001de2: 0052 lsls r2, r2, #1 - 8001de4: 5ad3 ldrh r3, [r2, r3] - 8001de6: 001a movs r2, r3 - 8001de8: 4b1a ldr r3, [pc, #104] ; (8001e54 ) - 8001dea: 611a str r2, [r3, #16] + 8001e18: 687b ldr r3, [r7, #4] + 8001e1a: 68ba ldr r2, [r7, #8] + 8001e1c: 3204 adds r2, #4 + 8001e1e: 0052 lsls r2, r2, #1 + 8001e20: 5ad3 ldrh r3, [r2, r3] + 8001e22: 001a movs r2, r3 + 8001e24: 4b1a ldr r3, [pc, #104] ; (8001e90 ) + 8001e26: 611a str r2, [r3, #16] baudrate_changed = 1; - 8001dec: 4b1d ldr r3, [pc, #116] ; (8001e64 ) - 8001dee: 2201 movs r2, #1 - 8001df0: 701a strb r2, [r3, #0] + 8001e28: 4b1d ldr r3, [pc, #116] ; (8001ea0 ) + 8001e2a: 2201 movs r2, #1 + 8001e2c: 701a strb r2, [r3, #0] } break; - 8001df2: e002 b.n 8001dfa + 8001e2e: e002 b.n 8001e36 default: return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; - 8001df4: 2305 movs r3, #5 - 8001df6: 425b negs r3, r3 - 8001df8: e016 b.n 8001e28 + 8001e30: 2305 movs r3, #5 + 8001e32: 425b negs r3, r3 + 8001e34: e016 b.n 8001e64 break; - 8001dfa: 46c0 nop ; (mov r8, r8) + 8001e36: 46c0 nop ; (mov r8, r8) for (int i = 0; i < transaction->register_count; i++, register_number++) - 8001dfc: 68bb ldr r3, [r7, #8] - 8001dfe: 3301 adds r3, #1 - 8001e00: 60bb str r3, [r7, #8] - 8001e02: 2116 movs r1, #22 - 8001e04: 187b adds r3, r7, r1 - 8001e06: 881a ldrh r2, [r3, #0] - 8001e08: 187b adds r3, r7, r1 - 8001e0a: 3201 adds r2, #1 - 8001e0c: 801a strh r2, [r3, #0] - 8001e0e: 687b ldr r3, [r7, #4] - 8001e10: 799b ldrb r3, [r3, #6] - 8001e12: 001a movs r2, r3 - 8001e14: 68bb ldr r3, [r7, #8] - 8001e16: 4293 cmp r3, r2 - 8001e18: db8e blt.n 8001d38 + 8001e38: 68bb ldr r3, [r7, #8] + 8001e3a: 3301 adds r3, #1 + 8001e3c: 60bb str r3, [r7, #8] + 8001e3e: 2116 movs r1, #22 + 8001e40: 187b adds r3, r7, r1 + 8001e42: 881a ldrh r2, [r3, #0] + 8001e44: 187b adds r3, r7, r1 + 8001e46: 3201 adds r2, #1 + 8001e48: 801a strh r2, [r3, #0] + 8001e4a: 687b ldr r3, [r7, #4] + 8001e4c: 799b ldrb r3, [r3, #6] + 8001e4e: 001a movs r2, r3 + 8001e50: 68bb ldr r3, [r7, #8] + 8001e52: 4293 cmp r3, r2 + 8001e54: db8e blt.n 8001d74 } } sensor_config_pending_write = 1; - 8001e1a: 4b13 ldr r3, [pc, #76] ; (8001e68 ) - 8001e1c: 2201 movs r2, #1 - 8001e1e: 701a strb r2, [r3, #0] + 8001e56: 4b13 ldr r3, [pc, #76] ; (8001ea4 ) + 8001e58: 2201 movs r2, #1 + 8001e5a: 701a strb r2, [r3, #0] return MODBUS_OK; - 8001e20: 2300 movs r3, #0 - 8001e22: e001 b.n 8001e28 + 8001e5c: 2300 movs r3, #0 + 8001e5e: e001 b.n 8001e64 default: return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; - 8001e24: 2305 movs r3, #5 - 8001e26: 425b negs r3, r3 + 8001e60: 2305 movs r3, #5 + 8001e62: 425b negs r3, r3 } /* Catch-all error */ return MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED; /* nothing implemented yet! TODO */ } - 8001e28: 0018 movs r0, r3 - 8001e2a: 46bd mov sp, r7 - 8001e2c: b006 add sp, #24 - 8001e2e: bd80 pop {r7, pc} - 8001e30: ffff8ac6 .word 0xffff8ac6 - 8001e34: 08003664 .word 0x08003664 - 8001e38: 20000074 .word 0x20000074 - 8001e3c: 20000038 .word 0x20000038 - 8001e40: 20000078 .word 0x20000078 - 8001e44: 20000040 .word 0x20000040 - 8001e48: 20000044 .word 0x20000044 - 8001e4c: ffff63bf .word 0xffff63bf - 8001e50: 08003680 .word 0x08003680 - 8001e54: 2000004c .word 0x2000004c - 8001e58: 080036a0 .word 0x080036a0 - 8001e5c: 20000026 .word 0x20000026 - 8001e60: 08003660 .word 0x08003660 - 8001e64: 20000025 .word 0x20000025 - 8001e68: 20000024 .word 0x20000024 + 8001e64: 0018 movs r0, r3 + 8001e66: 46bd mov sp, r7 + 8001e68: b006 add sp, #24 + 8001e6a: bd80 pop {r7, pc} + 8001e6c: ffff8ac6 .word 0xffff8ac6 + 8001e70: 080036b0 .word 0x080036b0 + 8001e74: 20000074 .word 0x20000074 + 8001e78: 20000038 .word 0x20000038 + 8001e7c: 20000078 .word 0x20000078 + 8001e80: 20000040 .word 0x20000040 + 8001e84: 20000044 .word 0x20000044 + 8001e88: ffff63bf .word 0xffff63bf + 8001e8c: 080036cc .word 0x080036cc + 8001e90: 2000004c .word 0x2000004c + 8001e94: 080036ec .word 0x080036ec + 8001e98: 20000026 .word 0x20000026 + 8001e9c: 080036ac .word 0x080036ac + 8001ea0: 20000025 .word 0x20000025 + 8001ea4: 20000024 .word 0x20000024 -08001e6c : +08001ea8 : int8_t modbus_transmit_function(uint8_t *buffer, uint16_t data_len) { - 8001e6c: b580 push {r7, lr} - 8001e6e: b082 sub sp, #8 - 8001e70: af00 add r7, sp, #0 - 8001e72: 6078 str r0, [r7, #4] - 8001e74: 000a movs r2, r1 - 8001e76: 1cbb adds r3, r7, #2 - 8001e78: 801a strh r2, [r3, #0] + 8001ea8: b580 push {r7, lr} + 8001eaa: b082 sub sp, #8 + 8001eac: af00 add r7, sp, #0 + 8001eae: 6078 str r0, [r7, #4] + 8001eb0: 000a movs r2, r1 + 8001eb2: 1cbb adds r3, r7, #2 + 8001eb4: 801a strh r2, [r3, #0] /* TODO */ LPUART1_TX_Buffer(buffer, data_len); - 8001e7a: 1cbb adds r3, r7, #2 - 8001e7c: 881a ldrh r2, [r3, #0] - 8001e7e: 687b ldr r3, [r7, #4] - 8001e80: 0011 movs r1, r2 - 8001e82: 0018 movs r0, r3 - 8001e84: f7ff fe0e bl 8001aa4 + 8001eb6: 1cbb adds r3, r7, #2 + 8001eb8: 881a ldrh r2, [r3, #0] + 8001eba: 687b ldr r3, [r7, #4] + 8001ebc: 0011 movs r1, r2 + 8001ebe: 0018 movs r0, r3 + 8001ec0: f7ff fe06 bl 8001ad0 return MODBUS_OK; - 8001e88: 2300 movs r3, #0 + 8001ec4: 2300 movs r3, #0 } - 8001e8a: 0018 movs r0, r3 - 8001e8c: 46bd mov sp, r7 - 8001e8e: b002 add sp, #8 - 8001e90: bd80 pop {r7, pc} + 8001ec6: 0018 movs r0, r3 + 8001ec8: 46bd mov sp, r7 + 8001eca: b002 add sp, #8 + 8001ecc: bd80 pop {r7, pc} ... -08001e94 : +08001ed0 : */ /* CRC16 (without memory mapped values) * taken from https://ctlsys.com/support/how_to_compute_the_modbus_rtu_message_crc/ */ uint16_t modbus_CRC16(const uint8_t *buf, int len) { - 8001e94: b580 push {r7, lr} - 8001e96: b086 sub sp, #24 - 8001e98: af00 add r7, sp, #0 - 8001e9a: 6078 str r0, [r7, #4] - 8001e9c: 6039 str r1, [r7, #0] + 8001ed0: b580 push {r7, lr} + 8001ed2: b086 sub sp, #24 + 8001ed4: af00 add r7, sp, #0 + 8001ed6: 6078 str r0, [r7, #4] + 8001ed8: 6039 str r1, [r7, #0] uint16_t crc = 0xFFFF; - 8001e9e: 2316 movs r3, #22 - 8001ea0: 18fb adds r3, r7, r3 - 8001ea2: 2201 movs r2, #1 - 8001ea4: 4252 negs r2, r2 - 8001ea6: 801a strh r2, [r3, #0] + 8001eda: 2316 movs r3, #22 + 8001edc: 18fb adds r3, r7, r3 + 8001ede: 2201 movs r2, #1 + 8001ee0: 4252 negs r2, r2 + 8001ee2: 801a strh r2, [r3, #0] for (int pos = 0; pos < len; pos++) { - 8001ea8: 2300 movs r3, #0 - 8001eaa: 613b str r3, [r7, #16] - 8001eac: e02e b.n 8001f0c + 8001ee4: 2300 movs r3, #0 + 8001ee6: 613b str r3, [r7, #16] + 8001ee8: e02e b.n 8001f48 crc ^= (uint16_t)buf[pos]; // XOR byte into least sig. byte of crc - 8001eae: 693b ldr r3, [r7, #16] - 8001eb0: 687a ldr r2, [r7, #4] - 8001eb2: 18d3 adds r3, r2, r3 - 8001eb4: 781b ldrb r3, [r3, #0] - 8001eb6: b299 uxth r1, r3 - 8001eb8: 2216 movs r2, #22 - 8001eba: 18bb adds r3, r7, r2 - 8001ebc: 18ba adds r2, r7, r2 - 8001ebe: 8812 ldrh r2, [r2, #0] - 8001ec0: 404a eors r2, r1 - 8001ec2: 801a strh r2, [r3, #0] + 8001eea: 693b ldr r3, [r7, #16] + 8001eec: 687a ldr r2, [r7, #4] + 8001eee: 18d3 adds r3, r2, r3 + 8001ef0: 781b ldrb r3, [r3, #0] + 8001ef2: b299 uxth r1, r3 + 8001ef4: 2216 movs r2, #22 + 8001ef6: 18bb adds r3, r7, r2 + 8001ef8: 18ba adds r2, r7, r2 + 8001efa: 8812 ldrh r2, [r2, #0] + 8001efc: 404a eors r2, r1 + 8001efe: 801a strh r2, [r3, #0] for (int i = 8; i != 0; i--) { // Loop over each bit - 8001ec4: 2308 movs r3, #8 - 8001ec6: 60fb str r3, [r7, #12] - 8001ec8: e01a b.n 8001f00 + 8001f00: 2308 movs r3, #8 + 8001f02: 60fb str r3, [r7, #12] + 8001f04: e01a b.n 8001f3c if ((crc & 0x0001) != 0) { // If the LSB is set - 8001eca: 2116 movs r1, #22 - 8001ecc: 187b adds r3, r7, r1 - 8001ece: 881b ldrh r3, [r3, #0] - 8001ed0: 2201 movs r2, #1 - 8001ed2: 4013 ands r3, r2 - 8001ed4: d00b beq.n 8001eee + 8001f06: 2116 movs r1, #22 + 8001f08: 187b adds r3, r7, r1 + 8001f0a: 881b ldrh r3, [r3, #0] + 8001f0c: 2201 movs r2, #1 + 8001f0e: 4013 ands r3, r2 + 8001f10: d00b beq.n 8001f2a crc >>= 1; // Shift right and XOR 0xA001 - 8001ed6: 187b adds r3, r7, r1 - 8001ed8: 187a adds r2, r7, r1 - 8001eda: 8812 ldrh r2, [r2, #0] - 8001edc: 0852 lsrs r2, r2, #1 - 8001ede: 801a strh r2, [r3, #0] + 8001f12: 187b adds r3, r7, r1 + 8001f14: 187a adds r2, r7, r1 + 8001f16: 8812 ldrh r2, [r2, #0] + 8001f18: 0852 lsrs r2, r2, #1 + 8001f1a: 801a strh r2, [r3, #0] crc ^= 0xA001; - 8001ee0: 187b adds r3, r7, r1 - 8001ee2: 187a adds r2, r7, r1 - 8001ee4: 8812 ldrh r2, [r2, #0] - 8001ee6: 490f ldr r1, [pc, #60] ; (8001f24 ) - 8001ee8: 404a eors r2, r1 - 8001eea: 801a strh r2, [r3, #0] - 8001eec: e005 b.n 8001efa + 8001f1c: 187b adds r3, r7, r1 + 8001f1e: 187a adds r2, r7, r1 + 8001f20: 8812 ldrh r2, [r2, #0] + 8001f22: 490f ldr r1, [pc, #60] ; (8001f60 ) + 8001f24: 404a eors r2, r1 + 8001f26: 801a strh r2, [r3, #0] + 8001f28: e005 b.n 8001f36 } else { // Else LSB is not set crc >>= 1; // Just shift right - 8001eee: 2216 movs r2, #22 - 8001ef0: 18bb adds r3, r7, r2 - 8001ef2: 18ba adds r2, r7, r2 - 8001ef4: 8812 ldrh r2, [r2, #0] - 8001ef6: 0852 lsrs r2, r2, #1 - 8001ef8: 801a strh r2, [r3, #0] + 8001f2a: 2216 movs r2, #22 + 8001f2c: 18bb adds r3, r7, r2 + 8001f2e: 18ba adds r2, r7, r2 + 8001f30: 8812 ldrh r2, [r2, #0] + 8001f32: 0852 lsrs r2, r2, #1 + 8001f34: 801a strh r2, [r3, #0] for (int i = 8; i != 0; i--) { // Loop over each bit - 8001efa: 68fb ldr r3, [r7, #12] - 8001efc: 3b01 subs r3, #1 - 8001efe: 60fb str r3, [r7, #12] - 8001f00: 68fb ldr r3, [r7, #12] - 8001f02: 2b00 cmp r3, #0 - 8001f04: d1e1 bne.n 8001eca + 8001f36: 68fb ldr r3, [r7, #12] + 8001f38: 3b01 subs r3, #1 + 8001f3a: 60fb str r3, [r7, #12] + 8001f3c: 68fb ldr r3, [r7, #12] + 8001f3e: 2b00 cmp r3, #0 + 8001f40: d1e1 bne.n 8001f06 for (int pos = 0; pos < len; pos++) { - 8001f06: 693b ldr r3, [r7, #16] - 8001f08: 3301 adds r3, #1 - 8001f0a: 613b str r3, [r7, #16] - 8001f0c: 693a ldr r2, [r7, #16] - 8001f0e: 683b ldr r3, [r7, #0] - 8001f10: 429a cmp r2, r3 - 8001f12: dbcc blt.n 8001eae + 8001f42: 693b ldr r3, [r7, #16] + 8001f44: 3301 adds r3, #1 + 8001f46: 613b str r3, [r7, #16] + 8001f48: 693a ldr r2, [r7, #16] + 8001f4a: 683b ldr r3, [r7, #0] + 8001f4c: 429a cmp r2, r3 + 8001f4e: dbcc blt.n 8001eea } } } // Note, this number has low and high bytes swapped, so use it accordingly (or swap bytes) return crc; - 8001f14: 2316 movs r3, #22 - 8001f16: 18fb adds r3, r7, r3 - 8001f18: 881b ldrh r3, [r3, #0] + 8001f50: 2316 movs r3, #22 + 8001f52: 18fb adds r3, r7, r3 + 8001f54: 881b ldrh r3, [r3, #0] } - 8001f1a: 0018 movs r0, r3 - 8001f1c: 46bd mov sp, r7 - 8001f1e: b006 add sp, #24 - 8001f20: bd80 pop {r7, pc} - 8001f22: 46c0 nop ; (mov r8, r8) - 8001f24: ffffa001 .word 0xffffa001 + 8001f56: 0018 movs r0, r3 + 8001f58: 46bd mov sp, r7 + 8001f5a: b006 add sp, #24 + 8001f5c: bd80 pop {r7, pc} + 8001f5e: 46c0 nop ; (mov r8, r8) + 8001f60: ffffa001 .word 0xffffa001 -08001f28 : +08001f64 : */ /* here we assume buffer has minimal size of MODBUS_MAX_RTU_FRAME_SIZE; * this function is private, so hopefully it's going to be ok */ int8_t modbus_copy_reply_to_buffer(uint8_t *buffer, uint8_t *msg_len, modbus_transaction_t *transaction) { - 8001f28: b5b0 push {r4, r5, r7, lr} - 8001f2a: b086 sub sp, #24 - 8001f2c: af00 add r7, sp, #0 - 8001f2e: 60f8 str r0, [r7, #12] - 8001f30: 60b9 str r1, [r7, #8] - 8001f32: 607a str r2, [r7, #4] + 8001f64: b5b0 push {r4, r5, r7, lr} + 8001f66: b086 sub sp, #24 + 8001f68: af00 add r7, sp, #0 + 8001f6a: 60f8 str r0, [r7, #12] + 8001f6c: 60b9 str r1, [r7, #8] + 8001f6e: 607a str r2, [r7, #4] uint16_t crc16; uint8_t byte_count; // TODO use relative indices (increments) instead of absolute buffer[0] = modbus_slave_address; - 8001f34: 4b60 ldr r3, [pc, #384] ; (80020b8 ) - 8001f36: 781a ldrb r2, [r3, #0] - 8001f38: 68fb ldr r3, [r7, #12] - 8001f3a: 701a strb r2, [r3, #0] + 8001f70: 4b60 ldr r3, [pc, #384] ; (80020f4 ) + 8001f72: 781a ldrb r2, [r3, #0] + 8001f74: 68fb ldr r3, [r7, #12] + 8001f76: 701a strb r2, [r3, #0] buffer[1] = transaction->function_code; - 8001f3c: 68fb ldr r3, [r7, #12] - 8001f3e: 3301 adds r3, #1 - 8001f40: 687a ldr r2, [r7, #4] - 8001f42: 7812 ldrb r2, [r2, #0] - 8001f44: 701a strb r2, [r3, #0] + 8001f78: 68fb ldr r3, [r7, #12] + 8001f7a: 3301 adds r3, #1 + 8001f7c: 687a ldr r2, [r7, #4] + 8001f7e: 7812 ldrb r2, [r2, #0] + 8001f80: 701a strb r2, [r3, #0] *msg_len = 5; - 8001f46: 68bb ldr r3, [r7, #8] - 8001f48: 2205 movs r2, #5 - 8001f4a: 701a strb r2, [r3, #0] + 8001f82: 68bb ldr r3, [r7, #8] + 8001f84: 2205 movs r2, #5 + 8001f86: 701a strb r2, [r3, #0] if (transaction->function_code & MODBUS_ERROR_FLAG) { - 8001f4c: 687b ldr r3, [r7, #4] - 8001f4e: 781b ldrb r3, [r3, #0] - 8001f50: b25b sxtb r3, r3 - 8001f52: 2b00 cmp r3, #0 - 8001f54: da05 bge.n 8001f62 + 8001f88: 687b ldr r3, [r7, #4] + 8001f8a: 781b ldrb r3, [r3, #0] + 8001f8c: b25b sxtb r3, r3 + 8001f8e: 2b00 cmp r3, #0 + 8001f90: da05 bge.n 8001f9e /* sending error reply */ buffer[2] = transaction->exception.exception_code; - 8001f56: 68fb ldr r3, [r7, #12] - 8001f58: 3302 adds r3, #2 - 8001f5a: 687a ldr r2, [r7, #4] - 8001f5c: 79d2 ldrb r2, [r2, #7] - 8001f5e: 701a strb r2, [r3, #0] - 8001f60: e085 b.n 800206e + 8001f92: 68fb ldr r3, [r7, #12] + 8001f94: 3302 adds r3, #2 + 8001f96: 687a ldr r2, [r7, #4] + 8001f98: 79d2 ldrb r2, [r2, #7] + 8001f9a: 701a strb r2, [r3, #0] + 8001f9c: e085 b.n 80020aa } else { switch (transaction->function_code) { - 8001f62: 687b ldr r3, [r7, #4] - 8001f64: 781b ldrb r3, [r3, #0] - 8001f66: 2b10 cmp r3, #16 - 8001f68: d063 beq.n 8002032 - 8001f6a: dd00 ble.n 8001f6e - 8001f6c: e07f b.n 800206e - 8001f6e: 2b04 cmp r3, #4 - 8001f70: dc02 bgt.n 8001f78 - 8001f72: 2b03 cmp r3, #3 - 8001f74: da03 bge.n 8001f7e - 8001f76: e07a b.n 800206e - 8001f78: 2b06 cmp r3, #6 - 8001f7a: d03a beq.n 8001ff2 - 8001f7c: e077 b.n 800206e + 8001f9e: 687b ldr r3, [r7, #4] + 8001fa0: 781b ldrb r3, [r3, #0] + 8001fa2: 2b10 cmp r3, #16 + 8001fa4: d063 beq.n 800206e + 8001fa6: dd00 ble.n 8001faa + 8001fa8: e07f b.n 80020aa + 8001faa: 2b04 cmp r3, #4 + 8001fac: dc02 bgt.n 8001fb4 + 8001fae: 2b03 cmp r3, #3 + 8001fb0: da03 bge.n 8001fba + 8001fb2: e07a b.n 80020aa + 8001fb4: 2b06 cmp r3, #6 + 8001fb6: d03a beq.n 800202e + 8001fb8: e077 b.n 80020aa case MODBUS_READ_HOLDING_REGISTERS: case MODBUS_READ_INPUT_REGISTERS: byte_count = transaction->register_count * 2; - 8001f7e: 687b ldr r3, [r7, #4] - 8001f80: 799b ldrb r3, [r3, #6] - 8001f82: 2113 movs r1, #19 - 8001f84: 187a adds r2, r7, r1 - 8001f86: 18db adds r3, r3, r3 - 8001f88: 7013 strb r3, [r2, #0] + 8001fba: 687b ldr r3, [r7, #4] + 8001fbc: 799b ldrb r3, [r3, #6] + 8001fbe: 2113 movs r1, #19 + 8001fc0: 187a adds r2, r7, r1 + 8001fc2: 18db adds r3, r3, r3 + 8001fc4: 7013 strb r3, [r2, #0] buffer[2] = byte_count; - 8001f8a: 68fb ldr r3, [r7, #12] - 8001f8c: 3302 adds r3, #2 - 8001f8e: 187a adds r2, r7, r1 - 8001f90: 7812 ldrb r2, [r2, #0] - 8001f92: 701a strb r2, [r3, #0] + 8001fc6: 68fb ldr r3, [r7, #12] + 8001fc8: 3302 adds r3, #2 + 8001fca: 187a adds r2, r7, r1 + 8001fcc: 7812 ldrb r2, [r2, #0] + 8001fce: 701a strb r2, [r3, #0] *msg_len = byte_count + 5; - 8001f94: 187b adds r3, r7, r1 - 8001f96: 781b ldrb r3, [r3, #0] - 8001f98: 3305 adds r3, #5 - 8001f9a: b2da uxtb r2, r3 - 8001f9c: 68bb ldr r3, [r7, #8] - 8001f9e: 701a strb r2, [r3, #0] + 8001fd0: 187b adds r3, r7, r1 + 8001fd2: 781b ldrb r3, [r3, #0] + 8001fd4: 3305 adds r3, #5 + 8001fd6: b2da uxtb r2, r3 + 8001fd8: 68bb ldr r3, [r7, #8] + 8001fda: 701a strb r2, [r3, #0] for (int i = 0; i < transaction->register_count; i++) { - 8001fa0: 2300 movs r3, #0 - 8001fa2: 617b str r3, [r7, #20] - 8001fa4: e01e b.n 8001fe4 + 8001fdc: 2300 movs r3, #0 + 8001fde: 617b str r3, [r7, #20] + 8001fe0: e01e b.n 8002020 // TODO endianness handling /* buffer16b is alias for both holding and input register buffers */ buffer[3 + 2*i] = transaction->buffer16b[i] >> 8; - 8001fa6: 687b ldr r3, [r7, #4] - 8001fa8: 697a ldr r2, [r7, #20] - 8001faa: 3204 adds r2, #4 - 8001fac: 0052 lsls r2, r2, #1 - 8001fae: 5ad3 ldrh r3, [r2, r3] - 8001fb0: 0a1b lsrs r3, r3, #8 - 8001fb2: b29a uxth r2, r3 - 8001fb4: 697b ldr r3, [r7, #20] - 8001fb6: 005b lsls r3, r3, #1 - 8001fb8: 3303 adds r3, #3 - 8001fba: 0019 movs r1, r3 - 8001fbc: 68fb ldr r3, [r7, #12] - 8001fbe: 185b adds r3, r3, r1 - 8001fc0: b2d2 uxtb r2, r2 - 8001fc2: 701a strb r2, [r3, #0] + 8001fe2: 687b ldr r3, [r7, #4] + 8001fe4: 697a ldr r2, [r7, #20] + 8001fe6: 3204 adds r2, #4 + 8001fe8: 0052 lsls r2, r2, #1 + 8001fea: 5ad3 ldrh r3, [r2, r3] + 8001fec: 0a1b lsrs r3, r3, #8 + 8001fee: b29a uxth r2, r3 + 8001ff0: 697b ldr r3, [r7, #20] + 8001ff2: 005b lsls r3, r3, #1 + 8001ff4: 3303 adds r3, #3 + 8001ff6: 0019 movs r1, r3 + 8001ff8: 68fb ldr r3, [r7, #12] + 8001ffa: 185b adds r3, r3, r1 + 8001ffc: b2d2 uxtb r2, r2 + 8001ffe: 701a strb r2, [r3, #0] buffer[4 + 2*i] = transaction->buffer16b[i] & 0xff; - 8001fc4: 687b ldr r3, [r7, #4] - 8001fc6: 697a ldr r2, [r7, #20] - 8001fc8: 3204 adds r2, #4 - 8001fca: 0052 lsls r2, r2, #1 - 8001fcc: 5ad2 ldrh r2, [r2, r3] - 8001fce: 697b ldr r3, [r7, #20] - 8001fd0: 3302 adds r3, #2 - 8001fd2: 005b lsls r3, r3, #1 - 8001fd4: 0019 movs r1, r3 - 8001fd6: 68fb ldr r3, [r7, #12] - 8001fd8: 185b adds r3, r3, r1 - 8001fda: b2d2 uxtb r2, r2 - 8001fdc: 701a strb r2, [r3, #0] + 8002000: 687b ldr r3, [r7, #4] + 8002002: 697a ldr r2, [r7, #20] + 8002004: 3204 adds r2, #4 + 8002006: 0052 lsls r2, r2, #1 + 8002008: 5ad2 ldrh r2, [r2, r3] + 800200a: 697b ldr r3, [r7, #20] + 800200c: 3302 adds r3, #2 + 800200e: 005b lsls r3, r3, #1 + 8002010: 0019 movs r1, r3 + 8002012: 68fb ldr r3, [r7, #12] + 8002014: 185b adds r3, r3, r1 + 8002016: b2d2 uxtb r2, r2 + 8002018: 701a strb r2, [r3, #0] for (int i = 0; i < transaction->register_count; i++) { - 8001fde: 697b ldr r3, [r7, #20] - 8001fe0: 3301 adds r3, #1 - 8001fe2: 617b str r3, [r7, #20] - 8001fe4: 687b ldr r3, [r7, #4] - 8001fe6: 799b ldrb r3, [r3, #6] - 8001fe8: 001a movs r2, r3 - 8001fea: 697b ldr r3, [r7, #20] - 8001fec: 4293 cmp r3, r2 - 8001fee: dbda blt.n 8001fa6 + 800201a: 697b ldr r3, [r7, #20] + 800201c: 3301 adds r3, #1 + 800201e: 617b str r3, [r7, #20] + 8002020: 687b ldr r3, [r7, #4] + 8002022: 799b ldrb r3, [r3, #6] + 8002024: 001a movs r2, r3 + 8002026: 697b ldr r3, [r7, #20] + 8002028: 4293 cmp r3, r2 + 800202a: dbda blt.n 8001fe2 } break; - 8001ff0: e03d b.n 800206e + 800202c: e03d b.n 80020aa case MODBUS_WRITE_SINGLE_REGISTER: buffer[2] = (uint8_t) (transaction->register_address >> 8); - 8001ff2: 687b ldr r3, [r7, #4] - 8001ff4: 885b ldrh r3, [r3, #2] - 8001ff6: 0a1b lsrs r3, r3, #8 - 8001ff8: b29a uxth r2, r3 - 8001ffa: 68fb ldr r3, [r7, #12] - 8001ffc: 3302 adds r3, #2 - 8001ffe: b2d2 uxtb r2, r2 - 8002000: 701a strb r2, [r3, #0] + 800202e: 687b ldr r3, [r7, #4] + 8002030: 885b ldrh r3, [r3, #2] + 8002032: 0a1b lsrs r3, r3, #8 + 8002034: b29a uxth r2, r3 + 8002036: 68fb ldr r3, [r7, #12] + 8002038: 3302 adds r3, #2 + 800203a: b2d2 uxtb r2, r2 + 800203c: 701a strb r2, [r3, #0] buffer[3] = (uint8_t) transaction->register_address; - 8002002: 687b ldr r3, [r7, #4] - 8002004: 885a ldrh r2, [r3, #2] - 8002006: 68fb ldr r3, [r7, #12] - 8002008: 3303 adds r3, #3 - 800200a: b2d2 uxtb r2, r2 - 800200c: 701a strb r2, [r3, #0] + 800203e: 687b ldr r3, [r7, #4] + 8002040: 885a ldrh r2, [r3, #2] + 8002042: 68fb ldr r3, [r7, #12] + 8002044: 3303 adds r3, #3 + 8002046: b2d2 uxtb r2, r2 + 8002048: 701a strb r2, [r3, #0] buffer[4] = (uint8_t) (transaction->holding_registers[0] >> 8); - 800200e: 687b ldr r3, [r7, #4] - 8002010: 891b ldrh r3, [r3, #8] - 8002012: 0a1b lsrs r3, r3, #8 - 8002014: b29a uxth r2, r3 - 8002016: 68fb ldr r3, [r7, #12] - 8002018: 3304 adds r3, #4 - 800201a: b2d2 uxtb r2, r2 - 800201c: 701a strb r2, [r3, #0] + 800204a: 687b ldr r3, [r7, #4] + 800204c: 891b ldrh r3, [r3, #8] + 800204e: 0a1b lsrs r3, r3, #8 + 8002050: b29a uxth r2, r3 + 8002052: 68fb ldr r3, [r7, #12] + 8002054: 3304 adds r3, #4 + 8002056: b2d2 uxtb r2, r2 + 8002058: 701a strb r2, [r3, #0] buffer[5] = (uint8_t) transaction->holding_registers[0]; - 800201e: 687b ldr r3, [r7, #4] - 8002020: 891a ldrh r2, [r3, #8] - 8002022: 68fb ldr r3, [r7, #12] - 8002024: 3305 adds r3, #5 - 8002026: b2d2 uxtb r2, r2 - 8002028: 701a strb r2, [r3, #0] - *msg_len = 8; - 800202a: 68bb ldr r3, [r7, #8] - 800202c: 2208 movs r2, #8 - 800202e: 701a strb r2, [r3, #0] - break; - 8002030: e01d b.n 800206e - case MODBUS_WRITE_MULTIPLE_REGISTERS: - buffer[2] = (uint8_t) (transaction->register_address >> 8); - 8002032: 687b ldr r3, [r7, #4] - 8002034: 885b ldrh r3, [r3, #2] - 8002036: 0a1b lsrs r3, r3, #8 - 8002038: b29a uxth r2, r3 - 800203a: 68fb ldr r3, [r7, #12] - 800203c: 3302 adds r3, #2 - 800203e: b2d2 uxtb r2, r2 - 8002040: 701a strb r2, [r3, #0] - buffer[3] = (uint8_t) transaction->register_address; - 8002042: 687b ldr r3, [r7, #4] - 8002044: 885a ldrh r2, [r3, #2] - 8002046: 68fb ldr r3, [r7, #12] - 8002048: 3303 adds r3, #3 - 800204a: b2d2 uxtb r2, r2 - 800204c: 701a strb r2, [r3, #0] - buffer[4] = (uint8_t) (transaction->register_count >> 8); - 800204e: 687b ldr r3, [r7, #4] - 8002050: 799b ldrb r3, [r3, #6] - 8002052: 121a asrs r2, r3, #8 - 8002054: 68fb ldr r3, [r7, #12] - 8002056: 3304 adds r3, #4 - 8002058: b2d2 uxtb r2, r2 - 800205a: 701a strb r2, [r3, #0] - buffer[5] = (uint8_t) transaction->register_count; - 800205c: 68fb ldr r3, [r7, #12] - 800205e: 3305 adds r3, #5 - 8002060: 687a ldr r2, [r7, #4] - 8002062: 7992 ldrb r2, [r2, #6] + 800205a: 687b ldr r3, [r7, #4] + 800205c: 891a ldrh r2, [r3, #8] + 800205e: 68fb ldr r3, [r7, #12] + 8002060: 3305 adds r3, #5 + 8002062: b2d2 uxtb r2, r2 8002064: 701a strb r2, [r3, #0] *msg_len = 8; 8002066: 68bb ldr r3, [r7, #8] 8002068: 2208 movs r2, #8 800206a: 701a strb r2, [r3, #0] break; - 800206c: 46c0 nop ; (mov r8, r8) + 800206c: e01d b.n 80020aa + case MODBUS_WRITE_MULTIPLE_REGISTERS: + buffer[2] = (uint8_t) (transaction->register_address >> 8); + 800206e: 687b ldr r3, [r7, #4] + 8002070: 885b ldrh r3, [r3, #2] + 8002072: 0a1b lsrs r3, r3, #8 + 8002074: b29a uxth r2, r3 + 8002076: 68fb ldr r3, [r7, #12] + 8002078: 3302 adds r3, #2 + 800207a: b2d2 uxtb r2, r2 + 800207c: 701a strb r2, [r3, #0] + buffer[3] = (uint8_t) transaction->register_address; + 800207e: 687b ldr r3, [r7, #4] + 8002080: 885a ldrh r2, [r3, #2] + 8002082: 68fb ldr r3, [r7, #12] + 8002084: 3303 adds r3, #3 + 8002086: b2d2 uxtb r2, r2 + 8002088: 701a strb r2, [r3, #0] + buffer[4] = (uint8_t) (transaction->register_count >> 8); + 800208a: 687b ldr r3, [r7, #4] + 800208c: 799b ldrb r3, [r3, #6] + 800208e: 121a asrs r2, r3, #8 + 8002090: 68fb ldr r3, [r7, #12] + 8002092: 3304 adds r3, #4 + 8002094: b2d2 uxtb r2, r2 + 8002096: 701a strb r2, [r3, #0] + buffer[5] = (uint8_t) transaction->register_count; + 8002098: 68fb ldr r3, [r7, #12] + 800209a: 3305 adds r3, #5 + 800209c: 687a ldr r2, [r7, #4] + 800209e: 7992 ldrb r2, [r2, #6] + 80020a0: 701a strb r2, [r3, #0] + *msg_len = 8; + 80020a2: 68bb ldr r3, [r7, #8] + 80020a4: 2208 movs r2, #8 + 80020a6: 701a strb r2, [r3, #0] + break; + 80020a8: 46c0 nop ; (mov r8, r8) } } crc16 = modbus_CRC16(buffer, *msg_len - 2); /* last two bytes is the checksum itself */ - 800206e: 68bb ldr r3, [r7, #8] - 8002070: 781b ldrb r3, [r3, #0] - 8002072: 1e9a subs r2, r3, #2 - 8002074: 2510 movs r5, #16 - 8002076: 197c adds r4, r7, r5 - 8002078: 68fb ldr r3, [r7, #12] - 800207a: 0011 movs r1, r2 - 800207c: 0018 movs r0, r3 - 800207e: f7ff ff09 bl 8001e94 - 8002082: 0003 movs r3, r0 - 8002084: 8023 strh r3, [r4, #0] + 80020aa: 68bb ldr r3, [r7, #8] + 80020ac: 781b ldrb r3, [r3, #0] + 80020ae: 1e9a subs r2, r3, #2 + 80020b0: 2510 movs r5, #16 + 80020b2: 197c adds r4, r7, r5 + 80020b4: 68fb ldr r3, [r7, #12] + 80020b6: 0011 movs r1, r2 + 80020b8: 0018 movs r0, r3 + 80020ba: f7ff ff09 bl 8001ed0 + 80020be: 0003 movs r3, r0 + 80020c0: 8023 strh r3, [r4, #0] buffer[*msg_len - 2] = crc16 & 0xff; - 8002086: 68bb ldr r3, [r7, #8] - 8002088: 781b ldrb r3, [r3, #0] - 800208a: 3b02 subs r3, #2 - 800208c: 68fa ldr r2, [r7, #12] - 800208e: 18d3 adds r3, r2, r3 - 8002090: 197a adds r2, r7, r5 - 8002092: 8812 ldrh r2, [r2, #0] - 8002094: b2d2 uxtb r2, r2 - 8002096: 701a strb r2, [r3, #0] + 80020c2: 68bb ldr r3, [r7, #8] + 80020c4: 781b ldrb r3, [r3, #0] + 80020c6: 3b02 subs r3, #2 + 80020c8: 68fa ldr r2, [r7, #12] + 80020ca: 18d3 adds r3, r2, r3 + 80020cc: 197a adds r2, r7, r5 + 80020ce: 8812 ldrh r2, [r2, #0] + 80020d0: b2d2 uxtb r2, r2 + 80020d2: 701a strb r2, [r3, #0] buffer[*msg_len - 1] = crc16 >> 8; - 8002098: 197b adds r3, r7, r5 - 800209a: 881b ldrh r3, [r3, #0] - 800209c: 0a1b lsrs r3, r3, #8 - 800209e: b299 uxth r1, r3 - 80020a0: 68bb ldr r3, [r7, #8] - 80020a2: 781b ldrb r3, [r3, #0] - 80020a4: 3b01 subs r3, #1 - 80020a6: 68fa ldr r2, [r7, #12] - 80020a8: 18d3 adds r3, r2, r3 - 80020aa: b2ca uxtb r2, r1 - 80020ac: 701a strb r2, [r3, #0] + 80020d4: 197b adds r3, r7, r5 + 80020d6: 881b ldrh r3, [r3, #0] + 80020d8: 0a1b lsrs r3, r3, #8 + 80020da: b299 uxth r1, r3 + 80020dc: 68bb ldr r3, [r7, #8] + 80020de: 781b ldrb r3, [r3, #0] + 80020e0: 3b01 subs r3, #1 + 80020e2: 68fa ldr r2, [r7, #12] + 80020e4: 18d3 adds r3, r2, r3 + 80020e6: b2ca uxtb r2, r1 + 80020e8: 701a strb r2, [r3, #0] } - 80020ae: 46c0 nop ; (mov r8, r8) - 80020b0: 0018 movs r0, r3 - 80020b2: 46bd mov sp, r7 - 80020b4: b006 add sp, #24 - 80020b6: bdb0 pop {r4, r5, r7, pc} - 80020b8: 20000000 .word 0x20000000 + 80020ea: 46c0 nop ; (mov r8, r8) + 80020ec: 0018 movs r0, r3 + 80020ee: 46bd mov sp, r7 + 80020f0: b006 add sp, #24 + 80020f2: bdb0 pop {r4, r5, r7, pc} + 80020f4: 20000000 .word 0x20000000 -080020bc : +080020f8 : /* * Public function definitions */ int8_t modbus_slave_set_address(uint8_t address) { - 80020bc: b580 push {r7, lr} - 80020be: b082 sub sp, #8 - 80020c0: af00 add r7, sp, #0 - 80020c2: 0002 movs r2, r0 - 80020c4: 1dfb adds r3, r7, #7 - 80020c6: 701a strb r2, [r3, #0] + 80020f8: b580 push {r7, lr} + 80020fa: b082 sub sp, #8 + 80020fc: af00 add r7, sp, #0 + 80020fe: 0002 movs r2, r0 + 8002100: 1dfb adds r3, r7, #7 + 8002102: 701a strb r2, [r3, #0] if (address == 0) { - 80020c8: 1dfb adds r3, r7, #7 - 80020ca: 781b ldrb r3, [r3, #0] - 80020cc: 2b00 cmp r3, #0 - 80020ce: d102 bne.n 80020d6 + 8002104: 1dfb adds r3, r7, #7 + 8002106: 781b ldrb r3, [r3, #0] + 8002108: 2b00 cmp r3, #0 + 800210a: d102 bne.n 8002112 /* address 0 is broadcast address */ return MODBUS_ERROR; - 80020d0: 2301 movs r3, #1 - 80020d2: 425b negs r3, r3 - 80020d4: e004 b.n 80020e0 + 800210c: 2301 movs r3, #1 + 800210e: 425b negs r3, r3 + 8002110: e004 b.n 800211c } modbus_slave_address = address; - 80020d6: 4b04 ldr r3, [pc, #16] ; (80020e8 ) - 80020d8: 1dfa adds r2, r7, #7 - 80020da: 7812 ldrb r2, [r2, #0] - 80020dc: 701a strb r2, [r3, #0] + 8002112: 4b04 ldr r3, [pc, #16] ; (8002124 ) + 8002114: 1dfa adds r2, r7, #7 + 8002116: 7812 ldrb r2, [r2, #0] + 8002118: 701a strb r2, [r3, #0] return MODBUS_OK; - 80020de: 2300 movs r3, #0 + 800211a: 2300 movs r3, #0 } - 80020e0: 0018 movs r0, r3 - 80020e2: 46bd mov sp, r7 - 80020e4: b002 add sp, #8 - 80020e6: bd80 pop {r7, pc} - 80020e8: 20000000 .word 0x20000000 + 800211c: 0018 movs r0, r3 + 800211e: 46bd mov sp, r7 + 8002120: b002 add sp, #8 + 8002122: bd80 pop {r7, pc} + 8002124: 20000000 .word 0x20000000 -080020ec : +08002128 : int8_t modbus_slave_process_msg(const uint8_t *buffer, int len) { - 80020ec: b5f0 push {r4, r5, r6, r7, lr} - 80020ee: b0c9 sub sp, #292 ; 0x124 - 80020f0: af00 add r7, sp, #0 - 80020f2: 6078 str r0, [r7, #4] - 80020f4: 6039 str r1, [r7, #0] + 8002128: b5f0 push {r4, r5, r6, r7, lr} + 800212a: b0c9 sub sp, #292 ; 0x124 + 800212c: af00 add r7, sp, #0 + 800212e: 6078 str r0, [r7, #4] + 8002130: 6039 str r1, [r7, #0] */ /* transaction holds message context and content: * it wraps all necessary buffers and variables */ modbus_transaction_t transaction; int8_t callback_result; uint8_t buffer_pos = 0; - 80020f6: 2320 movs r3, #32 - 80020f8: 33ff adds r3, #255 ; 0xff - 80020fa: 18fb adds r3, r7, r3 - 80020fc: 2200 movs r2, #0 - 80020fe: 701a strb r2, [r3, #0] + 8002132: 2320 movs r3, #32 + 8002134: 33ff adds r3, #255 ; 0xff + 8002136: 18fb adds r3, r7, r3 + 8002138: 2200 movs r2, #0 + 800213a: 701a strb r2, [r3, #0] uint8_t byte_count; if (len < MODBUS_MINIMAL_FRAME_LEN) { - 8002100: 683b ldr r3, [r7, #0] - 8002102: 2b03 cmp r3, #3 - 8002104: dc02 bgt.n 800210c + 800213c: 683b ldr r3, [r7, #0] + 800213e: 2b03 cmp r3, #3 + 8002140: dc02 bgt.n 8002148 /* frame too short; return error */ return MODBUS_ERROR_FRAME_INVALID; - 8002106: 2303 movs r3, #3 - 8002108: 425b negs r3, r3 - 800210a: e28a b.n 8002622 + 8002142: 2303 movs r3, #3 + 8002144: 425b negs r3, r3 + 8002146: e28a b.n 800265e } /* check CRC first */ uint16_t crc_received = (buffer[len - 1] << 8) | buffer[len - 2]; - 800210c: 683b ldr r3, [r7, #0] - 800210e: 3b01 subs r3, #1 - 8002110: 687a ldr r2, [r7, #4] - 8002112: 18d3 adds r3, r2, r3 - 8002114: 781b ldrb r3, [r3, #0] - 8002116: 021b lsls r3, r3, #8 - 8002118: b21a sxth r2, r3 - 800211a: 683b ldr r3, [r7, #0] - 800211c: 3b02 subs r3, #2 - 800211e: 6879 ldr r1, [r7, #4] - 8002120: 18cb adds r3, r1, r3 - 8002122: 781b ldrb r3, [r3, #0] - 8002124: b21b sxth r3, r3 - 8002126: 4313 orrs r3, r2 - 8002128: b21a sxth r2, r3 - 800212a: 258d movs r5, #141 ; 0x8d - 800212c: 006d lsls r5, r5, #1 - 800212e: 197b adds r3, r7, r5 - 8002130: 801a strh r2, [r3, #0] + 8002148: 683b ldr r3, [r7, #0] + 800214a: 3b01 subs r3, #1 + 800214c: 687a ldr r2, [r7, #4] + 800214e: 18d3 adds r3, r2, r3 + 8002150: 781b ldrb r3, [r3, #0] + 8002152: 021b lsls r3, r3, #8 + 8002154: b21a sxth r2, r3 + 8002156: 683b ldr r3, [r7, #0] + 8002158: 3b02 subs r3, #2 + 800215a: 6879 ldr r1, [r7, #4] + 800215c: 18cb adds r3, r1, r3 + 800215e: 781b ldrb r3, [r3, #0] + 8002160: b21b sxth r3, r3 + 8002162: 4313 orrs r3, r2 + 8002164: b21a sxth r2, r3 + 8002166: 258d movs r5, #141 ; 0x8d + 8002168: 006d lsls r5, r5, #1 + 800216a: 197b adds r3, r7, r5 + 800216c: 801a strh r2, [r3, #0] uint16_t crc_calculated = modbus_CRC16(buffer, len - 2); - 8002132: 683b ldr r3, [r7, #0] - 8002134: 1e9a subs r2, r3, #2 - 8002136: 268c movs r6, #140 ; 0x8c - 8002138: 0076 lsls r6, r6, #1 - 800213a: 19bc adds r4, r7, r6 - 800213c: 687b ldr r3, [r7, #4] - 800213e: 0011 movs r1, r2 - 8002140: 0018 movs r0, r3 - 8002142: f7ff fea7 bl 8001e94 - 8002146: 0003 movs r3, r0 - 8002148: 8023 strh r3, [r4, #0] + 800216e: 683b ldr r3, [r7, #0] + 8002170: 1e9a subs r2, r3, #2 + 8002172: 268c movs r6, #140 ; 0x8c + 8002174: 0076 lsls r6, r6, #1 + 8002176: 19bc adds r4, r7, r6 + 8002178: 687b ldr r3, [r7, #4] + 800217a: 0011 movs r1, r2 + 800217c: 0018 movs r0, r3 + 800217e: f7ff fea7 bl 8001ed0 + 8002182: 0003 movs r3, r0 + 8002184: 8023 strh r3, [r4, #0] if (crc_received != crc_calculated) { - 800214a: 197a adds r2, r7, r5 - 800214c: 19bb adds r3, r7, r6 - 800214e: 8812 ldrh r2, [r2, #0] - 8002150: 881b ldrh r3, [r3, #0] - 8002152: 429a cmp r2, r3 - 8002154: d002 beq.n 800215c + 8002186: 197a adds r2, r7, r5 + 8002188: 19bb adds r3, r7, r6 + 800218a: 8812 ldrh r2, [r2, #0] + 800218c: 881b ldrh r3, [r3, #0] + 800218e: 429a cmp r2, r3 + 8002190: d002 beq.n 8002198 /* CRC mismatch, return error */ //printf("crc mismatch: received 0x%x, calculated 0x%x\n", crc_received, crc_calculated); return MODBUS_ERROR_CRC; - 8002156: 2302 movs r3, #2 - 8002158: 425b negs r3, r3 - 800215a: e262 b.n 8002622 + 8002192: 2302 movs r3, #2 + 8002194: 425b negs r3, r3 + 8002196: e262 b.n 800265e } /* check if address matches ours */ uint8_t address = buffer[buffer_pos++]; - 800215c: 2220 movs r2, #32 - 800215e: 32ff adds r2, #255 ; 0xff - 8002160: 18bb adds r3, r7, r2 - 8002162: 781b ldrb r3, [r3, #0] - 8002164: 18ba adds r2, r7, r2 - 8002166: 1c59 adds r1, r3, #1 - 8002168: 7011 strb r1, [r2, #0] - 800216a: 001a movs r2, r3 - 800216c: 687b ldr r3, [r7, #4] - 800216e: 189a adds r2, r3, r2 - 8002170: 2118 movs r1, #24 - 8002172: 31ff adds r1, #255 ; 0xff - 8002174: 187b adds r3, r7, r1 - 8002176: 7812 ldrb r2, [r2, #0] - 8002178: 701a strb r2, [r3, #0] + 8002198: 2220 movs r2, #32 + 800219a: 32ff adds r2, #255 ; 0xff + 800219c: 18bb adds r3, r7, r2 + 800219e: 781b ldrb r3, [r3, #0] + 80021a0: 18ba adds r2, r7, r2 + 80021a2: 1c59 adds r1, r3, #1 + 80021a4: 7011 strb r1, [r2, #0] + 80021a6: 001a movs r2, r3 + 80021a8: 687b ldr r3, [r7, #4] + 80021aa: 189a adds r2, r3, r2 + 80021ac: 2118 movs r1, #24 + 80021ae: 31ff adds r1, #255 ; 0xff + 80021b0: 187b adds r3, r7, r1 + 80021b2: 7812 ldrb r2, [r2, #0] + 80021b4: 701a strb r2, [r3, #0] if (address != modbus_slave_address && address != MODBUS_BROADCAST_ADDR) { - 800217a: 4bdf ldr r3, [pc, #892] ; (80024f8 ) - 800217c: 781b ldrb r3, [r3, #0] - 800217e: 187a adds r2, r7, r1 - 8002180: 7812 ldrb r2, [r2, #0] - 8002182: 429a cmp r2, r3 - 8002184: d005 beq.n 8002192 - 8002186: 187b adds r3, r7, r1 - 8002188: 781b ldrb r3, [r3, #0] - 800218a: 2b00 cmp r3, #0 - 800218c: d001 beq.n 8002192 + 80021b6: 4bdf ldr r3, [pc, #892] ; (8002534 ) + 80021b8: 781b ldrb r3, [r3, #0] + 80021ba: 187a adds r2, r7, r1 + 80021bc: 7812 ldrb r2, [r2, #0] + 80021be: 429a cmp r2, r3 + 80021c0: d005 beq.n 80021ce + 80021c2: 187b adds r3, r7, r1 + 80021c4: 781b ldrb r3, [r3, #0] + 80021c6: 2b00 cmp r3, #0 + 80021c8: d001 beq.n 80021ce /* Message is not for us */ return MODBUS_OK; - 800218e: 2300 movs r3, #0 - 8002190: e247 b.n 8002622 + 80021ca: 2300 movs r3, #0 + 80021cc: e247 b.n 800265e } /* get function code */ transaction.function_code = buffer[buffer_pos++]; - 8002192: 2220 movs r2, #32 - 8002194: 32ff adds r2, #255 ; 0xff - 8002196: 18bb adds r3, r7, r2 - 8002198: 781b ldrb r3, [r3, #0] - 800219a: 18ba adds r2, r7, r2 - 800219c: 1c59 adds r1, r3, #1 - 800219e: 7011 strb r1, [r2, #0] - 80021a0: 001a movs r2, r3 - 80021a2: 687b ldr r3, [r7, #4] - 80021a4: 189b adds r3, r3, r2 - 80021a6: 781a ldrb r2, [r3, #0] - 80021a8: 4bd4 ldr r3, [pc, #848] ; (80024fc ) - 80021aa: 2190 movs r1, #144 ; 0x90 - 80021ac: 0049 lsls r1, r1, #1 - 80021ae: 468c mov ip, r1 - 80021b0: 44bc add ip, r7 - 80021b2: 4463 add r3, ip - 80021b4: 701a strb r2, [r3, #0] + 80021ce: 2220 movs r2, #32 + 80021d0: 32ff adds r2, #255 ; 0xff + 80021d2: 18bb adds r3, r7, r2 + 80021d4: 781b ldrb r3, [r3, #0] + 80021d6: 18ba adds r2, r7, r2 + 80021d8: 1c59 adds r1, r3, #1 + 80021da: 7011 strb r1, [r2, #0] + 80021dc: 001a movs r2, r3 + 80021de: 687b ldr r3, [r7, #4] + 80021e0: 189b adds r3, r3, r2 + 80021e2: 781a ldrb r2, [r3, #0] + 80021e4: 4bd4 ldr r3, [pc, #848] ; (8002538 ) + 80021e6: 2190 movs r1, #144 ; 0x90 + 80021e8: 0049 lsls r1, r1, #1 + 80021ea: 468c mov ip, r1 + 80021ec: 44bc add ip, r7 + 80021ee: 4463 add r3, ip + 80021f0: 701a strb r2, [r3, #0] transaction.exception.exception_code = 0; - 80021b6: 4bd1 ldr r3, [pc, #836] ; (80024fc ) - 80021b8: 2290 movs r2, #144 ; 0x90 - 80021ba: 0052 lsls r2, r2, #1 - 80021bc: 4694 mov ip, r2 - 80021be: 44bc add ip, r7 - 80021c0: 4463 add r3, ip - 80021c2: 2200 movs r2, #0 - 80021c4: 71da strb r2, [r3, #7] + 80021f2: 4bd1 ldr r3, [pc, #836] ; (8002538 ) + 80021f4: 2290 movs r2, #144 ; 0x90 + 80021f6: 0052 lsls r2, r2, #1 + 80021f8: 4694 mov ip, r2 + 80021fa: 44bc add ip, r7 + 80021fc: 4463 add r3, ip + 80021fe: 2200 movs r2, #0 + 8002200: 71da strb r2, [r3, #7] if (transaction.function_code == MODBUS_READ_DEVICE_IDENTIFICATION) { - 80021c6: 4bcd ldr r3, [pc, #820] ; (80024fc ) - 80021c8: 2290 movs r2, #144 ; 0x90 - 80021ca: 0052 lsls r2, r2, #1 - 80021cc: 4694 mov ip, r2 - 80021ce: 44bc add ip, r7 - 80021d0: 4463 add r3, ip - 80021d2: 781b ldrb r3, [r3, #0] - 80021d4: 2b2b cmp r3, #43 ; 0x2b - 80021d6: d100 bne.n 80021da - 80021d8: e207 b.n 80025ea + 8002202: 4bcd ldr r3, [pc, #820] ; (8002538 ) + 8002204: 2290 movs r2, #144 ; 0x90 + 8002206: 0052 lsls r2, r2, #1 + 8002208: 4694 mov ip, r2 + 800220a: 44bc add ip, r7 + 800220c: 4463 add r3, ip + 800220e: 781b ldrb r3, [r3, #0] + 8002210: 2b2b cmp r3, #43 ; 0x2b + 8002212: d100 bne.n 8002216 + 8002214: e207 b.n 8002626 // TODO goto modbus_send; } /* set starting register number */ switch (transaction.function_code) { - 80021da: 4bc8 ldr r3, [pc, #800] ; (80024fc ) - 80021dc: 2290 movs r2, #144 ; 0x90 - 80021de: 0052 lsls r2, r2, #1 - 80021e0: 4694 mov ip, r2 - 80021e2: 44bc add ip, r7 - 80021e4: 4463 add r3, ip - 80021e6: 781b ldrb r3, [r3, #0] - 80021e8: 2b17 cmp r3, #23 - 80021ea: d828 bhi.n 800223e - 80021ec: 009a lsls r2, r3, #2 - 80021ee: 4bc4 ldr r3, [pc, #784] ; (8002500 ) - 80021f0: 18d3 adds r3, r2, r3 - 80021f2: 681b ldr r3, [r3, #0] - 80021f4: 469f mov pc, r3 + 8002216: 4bc8 ldr r3, [pc, #800] ; (8002538 ) + 8002218: 2290 movs r2, #144 ; 0x90 + 800221a: 0052 lsls r2, r2, #1 + 800221c: 4694 mov ip, r2 + 800221e: 44bc add ip, r7 + 8002220: 4463 add r3, ip + 8002222: 781b ldrb r3, [r3, #0] + 8002224: 2b17 cmp r3, #23 + 8002226: d828 bhi.n 800227a + 8002228: 009a lsls r2, r3, #2 + 800222a: 4bc4 ldr r3, [pc, #784] ; (800253c ) + 800222c: 18d3 adds r3, r2, r3 + 800222e: 681b ldr r3, [r3, #0] + 8002230: 469f mov pc, r3 /* coils */ case MODBUS_READ_DO: case MODBUS_WRITE_SINGLE_DO: case MODBUS_WRITE_MULTIPLE_DO: transaction.register_number = MODBUS_DO_START_NUMBER; - 80021f6: 4bc1 ldr r3, [pc, #772] ; (80024fc ) - 80021f8: 2290 movs r2, #144 ; 0x90 - 80021fa: 0052 lsls r2, r2, #1 - 80021fc: 4694 mov ip, r2 - 80021fe: 44bc add ip, r7 - 8002200: 4463 add r3, ip - 8002202: 2201 movs r2, #1 - 8002204: 809a strh r2, [r3, #4] + 8002232: 4bc1 ldr r3, [pc, #772] ; (8002538 ) + 8002234: 2290 movs r2, #144 ; 0x90 + 8002236: 0052 lsls r2, r2, #1 + 8002238: 4694 mov ip, r2 + 800223a: 44bc add ip, r7 + 800223c: 4463 add r3, ip + 800223e: 2201 movs r2, #1 + 8002240: 809a strh r2, [r3, #4] break; - 8002206: e01a b.n 800223e + 8002242: e01a b.n 800227a /* discrete inputs */ case MODBUS_READ_DI: transaction.register_number = MODBUS_DI_START_NUMBER; - 8002208: 4bbc ldr r3, [pc, #752] ; (80024fc ) - 800220a: 2290 movs r2, #144 ; 0x90 - 800220c: 0052 lsls r2, r2, #1 - 800220e: 4694 mov ip, r2 - 8002210: 44bc add ip, r7 - 8002212: 4463 add r3, ip - 8002214: 4abb ldr r2, [pc, #748] ; (8002504 ) - 8002216: 809a strh r2, [r3, #4] + 8002244: 4bbc ldr r3, [pc, #752] ; (8002538 ) + 8002246: 2290 movs r2, #144 ; 0x90 + 8002248: 0052 lsls r2, r2, #1 + 800224a: 4694 mov ip, r2 + 800224c: 44bc add ip, r7 + 800224e: 4463 add r3, ip + 8002250: 4abb ldr r2, [pc, #748] ; (8002540 ) + 8002252: 809a strh r2, [r3, #4] break; - 8002218: e011 b.n 800223e + 8002254: e011 b.n 800227a /* input registers */ case MODBUS_READ_AI: transaction.register_number = MODBUS_AI_START_NUMBER; - 800221a: 4bb8 ldr r3, [pc, #736] ; (80024fc ) - 800221c: 2290 movs r2, #144 ; 0x90 - 800221e: 0052 lsls r2, r2, #1 - 8002220: 4694 mov ip, r2 - 8002222: 44bc add ip, r7 - 8002224: 4463 add r3, ip - 8002226: 4ab8 ldr r2, [pc, #736] ; (8002508 ) - 8002228: 809a strh r2, [r3, #4] + 8002256: 4bb8 ldr r3, [pc, #736] ; (8002538 ) + 8002258: 2290 movs r2, #144 ; 0x90 + 800225a: 0052 lsls r2, r2, #1 + 800225c: 4694 mov ip, r2 + 800225e: 44bc add ip, r7 + 8002260: 4463 add r3, ip + 8002262: 4ab8 ldr r2, [pc, #736] ; (8002544 ) + 8002264: 809a strh r2, [r3, #4] break; - 800222a: e008 b.n 800223e + 8002266: e008 b.n 800227a /* holding registers */ case MODBUS_READ_AO: case MODBUS_WRITE_SINGLE_AO: case MODBUS_WRITE_MULTIPLE_AO: case MODBUS_READ_WRITE_MULTIPLE_REGISTERS: transaction.register_number = MODBUS_AO_START_NUMBER; - 800222c: 4bb3 ldr r3, [pc, #716] ; (80024fc ) - 800222e: 2290 movs r2, #144 ; 0x90 - 8002230: 0052 lsls r2, r2, #1 - 8002232: 4694 mov ip, r2 - 8002234: 44bc add ip, r7 - 8002236: 4463 add r3, ip - 8002238: 4ab4 ldr r2, [pc, #720] ; (800250c ) - 800223a: 809a strh r2, [r3, #4] + 8002268: 4bb3 ldr r3, [pc, #716] ; (8002538 ) + 800226a: 2290 movs r2, #144 ; 0x90 + 800226c: 0052 lsls r2, r2, #1 + 800226e: 4694 mov ip, r2 + 8002270: 44bc add ip, r7 + 8002272: 4463 add r3, ip + 8002274: 4ab4 ldr r2, [pc, #720] ; (8002548 ) + 8002276: 809a strh r2, [r3, #4] break; - 800223c: 46c0 nop ; (mov r8, r8) + 8002278: 46c0 nop ; (mov r8, r8) } #define MODBUS_FLAG_WRITE 0x01 #define MODBUS_FLAG_SINGLE 0x02 uint8_t flags = 0x00; - 800223e: 238f movs r3, #143 ; 0x8f - 8002240: 005b lsls r3, r3, #1 - 8002242: 18fb adds r3, r7, r3 - 8002244: 2200 movs r2, #0 - 8002246: 701a strb r2, [r3, #0] + 800227a: 238f movs r3, #143 ; 0x8f + 800227c: 005b lsls r3, r3, #1 + 800227e: 18fb adds r3, r7, r3 + 8002280: 2200 movs r2, #0 + 8002282: 701a strb r2, [r3, #0] /* process message */ switch (transaction.function_code) { - 8002248: 4bac ldr r3, [pc, #688] ; (80024fc ) - 800224a: 2290 movs r2, #144 ; 0x90 - 800224c: 0052 lsls r2, r2, #1 - 800224e: 4694 mov ip, r2 - 8002250: 44bc add ip, r7 - 8002252: 4463 add r3, ip - 8002254: 781b ldrb r3, [r3, #0] - 8002256: 2b10 cmp r3, #16 - 8002258: dd00 ble.n 800225c - 800225a: e159 b.n 8002510 - 800225c: 2b0f cmp r3, #15 - 800225e: da10 bge.n 8002282 - 8002260: 2b04 cmp r3, #4 - 8002262: dc02 bgt.n 800226a - 8002264: 2b00 cmp r3, #0 - 8002266: dc14 bgt.n 8002292 - 8002268: e152 b.n 8002510 - 800226a: 3b05 subs r3, #5 - 800226c: 2b01 cmp r3, #1 - 800226e: d900 bls.n 8002272 - 8002270: e14e b.n 8002510 + 8002284: 4bac ldr r3, [pc, #688] ; (8002538 ) + 8002286: 2290 movs r2, #144 ; 0x90 + 8002288: 0052 lsls r2, r2, #1 + 800228a: 4694 mov ip, r2 + 800228c: 44bc add ip, r7 + 800228e: 4463 add r3, ip + 8002290: 781b ldrb r3, [r3, #0] + 8002292: 2b10 cmp r3, #16 + 8002294: dd00 ble.n 8002298 + 8002296: e159 b.n 800254c + 8002298: 2b0f cmp r3, #15 + 800229a: da10 bge.n 80022be + 800229c: 2b04 cmp r3, #4 + 800229e: dc02 bgt.n 80022a6 + 80022a0: 2b00 cmp r3, #0 + 80022a2: dc14 bgt.n 80022ce + 80022a4: e152 b.n 800254c + 80022a6: 3b05 subs r3, #5 + 80022a8: 2b01 cmp r3, #1 + 80022aa: d900 bls.n 80022ae + 80022ac: e14e b.n 800254c case MODBUS_WRITE_SINGLE_COIL: case MODBUS_WRITE_SINGLE_REGISTER: /* holding register */ flags |= MODBUS_FLAG_SINGLE; - 8002272: 228f movs r2, #143 ; 0x8f - 8002274: 0052 lsls r2, r2, #1 - 8002276: 18bb adds r3, r7, r2 - 8002278: 18ba adds r2, r7, r2 - 800227a: 7812 ldrb r2, [r2, #0] - 800227c: 2102 movs r1, #2 - 800227e: 430a orrs r2, r1 - 8002280: 701a strb r2, [r3, #0] + 80022ae: 228f movs r2, #143 ; 0x8f + 80022b0: 0052 lsls r2, r2, #1 + 80022b2: 18bb adds r3, r7, r2 + 80022b4: 18ba adds r2, r7, r2 + 80022b6: 7812 ldrb r2, [r2, #0] + 80022b8: 2102 movs r1, #2 + 80022ba: 430a orrs r2, r1 + 80022bc: 701a strb r2, [r3, #0] case MODBUS_WRITE_MULTIPLE_COILS: case MODBUS_WRITE_MULTIPLE_REGISTERS: flags |= MODBUS_FLAG_WRITE; - 8002282: 228f movs r2, #143 ; 0x8f - 8002284: 0052 lsls r2, r2, #1 - 8002286: 18bb adds r3, r7, r2 - 8002288: 18ba adds r2, r7, r2 - 800228a: 7812 ldrb r2, [r2, #0] - 800228c: 2101 movs r1, #1 - 800228e: 430a orrs r2, r1 - 8002290: 701a strb r2, [r3, #0] + 80022be: 228f movs r2, #143 ; 0x8f + 80022c0: 0052 lsls r2, r2, #1 + 80022c2: 18bb adds r3, r7, r2 + 80022c4: 18ba adds r2, r7, r2 + 80022c6: 7812 ldrb r2, [r2, #0] + 80022c8: 2101 movs r1, #1 + 80022ca: 430a orrs r2, r1 + 80022cc: 701a strb r2, [r3, #0] case MODBUS_READ_DISCRETE_INPUTS: case MODBUS_READ_COILS: case MODBUS_READ_INPUT_REGISTERS: case MODBUS_READ_HOLDING_REGISTERS: if (len < (MODBUS_MINIMAL_FRAME_LEN + 4)) { - 8002292: 683b ldr r3, [r7, #0] - 8002294: 2b07 cmp r3, #7 - 8002296: dc02 bgt.n 800229e + 80022ce: 683b ldr r3, [r7, #0] + 80022d0: 2b07 cmp r3, #7 + 80022d2: dc02 bgt.n 80022da /* buffer too short to contain everything we need */ return MODBUS_ERROR; - 8002298: 2301 movs r3, #1 - 800229a: 425b negs r3, r3 - 800229c: e1c1 b.n 8002622 + 80022d4: 2301 movs r3, #1 + 80022d6: 425b negs r3, r3 + 80022d8: e1c1 b.n 800265e } transaction.register_address = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; - 800229e: 2420 movs r4, #32 - 80022a0: 34ff adds r4, #255 ; 0xff - 80022a2: 193b adds r3, r7, r4 - 80022a4: 781b ldrb r3, [r3, #0] - 80022a6: 193a adds r2, r7, r4 - 80022a8: 1c59 adds r1, r3, #1 - 80022aa: 7011 strb r1, [r2, #0] - 80022ac: 001a movs r2, r3 - 80022ae: 687b ldr r3, [r7, #4] - 80022b0: 189b adds r3, r3, r2 - 80022b2: 781b ldrb r3, [r3, #0] - 80022b4: 021b lsls r3, r3, #8 - 80022b6: b21a sxth r2, r3 - 80022b8: 193b adds r3, r7, r4 - 80022ba: 781b ldrb r3, [r3, #0] - 80022bc: 1939 adds r1, r7, r4 - 80022be: 1c58 adds r0, r3, #1 - 80022c0: 7008 strb r0, [r1, #0] - 80022c2: 0019 movs r1, r3 - 80022c4: 687b ldr r3, [r7, #4] - 80022c6: 185b adds r3, r3, r1 - 80022c8: 781b ldrb r3, [r3, #0] - 80022ca: b21b sxth r3, r3 - 80022cc: 4313 orrs r3, r2 - 80022ce: b21b sxth r3, r3 - 80022d0: b29a uxth r2, r3 - 80022d2: 4b8a ldr r3, [pc, #552] ; (80024fc ) - 80022d4: 2190 movs r1, #144 ; 0x90 - 80022d6: 0049 lsls r1, r1, #1 - 80022d8: 468c mov ip, r1 - 80022da: 44bc add ip, r7 - 80022dc: 4463 add r3, ip - 80022de: 805a strh r2, [r3, #2] + 80022da: 2420 movs r4, #32 + 80022dc: 34ff adds r4, #255 ; 0xff + 80022de: 193b adds r3, r7, r4 + 80022e0: 781b ldrb r3, [r3, #0] + 80022e2: 193a adds r2, r7, r4 + 80022e4: 1c59 adds r1, r3, #1 + 80022e6: 7011 strb r1, [r2, #0] + 80022e8: 001a movs r2, r3 + 80022ea: 687b ldr r3, [r7, #4] + 80022ec: 189b adds r3, r3, r2 + 80022ee: 781b ldrb r3, [r3, #0] + 80022f0: 021b lsls r3, r3, #8 + 80022f2: b21a sxth r2, r3 + 80022f4: 193b adds r3, r7, r4 + 80022f6: 781b ldrb r3, [r3, #0] + 80022f8: 1939 adds r1, r7, r4 + 80022fa: 1c58 adds r0, r3, #1 + 80022fc: 7008 strb r0, [r1, #0] + 80022fe: 0019 movs r1, r3 + 8002300: 687b ldr r3, [r7, #4] + 8002302: 185b adds r3, r3, r1 + 8002304: 781b ldrb r3, [r3, #0] + 8002306: b21b sxth r3, r3 + 8002308: 4313 orrs r3, r2 + 800230a: b21b sxth r3, r3 + 800230c: b29a uxth r2, r3 + 800230e: 4b8a ldr r3, [pc, #552] ; (8002538 ) + 8002310: 2190 movs r1, #144 ; 0x90 + 8002312: 0049 lsls r1, r1, #1 + 8002314: 468c mov ip, r1 + 8002316: 44bc add ip, r7 + 8002318: 4463 add r3, ip + 800231a: 805a strh r2, [r3, #2] // TODO check length! if (flags & MODBUS_FLAG_WRITE) { - 80022e0: 218f movs r1, #143 ; 0x8f - 80022e2: 0049 lsls r1, r1, #1 - 80022e4: 187b adds r3, r7, r1 - 80022e6: 781b ldrb r3, [r3, #0] - 80022e8: 2201 movs r2, #1 - 80022ea: 4013 ands r3, r2 - 80022ec: d100 bne.n 80022f0 - 80022ee: e0b0 b.n 8002452 + 800231c: 218f movs r1, #143 ; 0x8f + 800231e: 0049 lsls r1, r1, #1 + 8002320: 187b adds r3, r7, r1 + 8002322: 781b ldrb r3, [r3, #0] + 8002324: 2201 movs r2, #1 + 8002326: 4013 ands r3, r2 + 8002328: d100 bne.n 800232c + 800232a: e0b0 b.n 800248e if (flags & MODBUS_FLAG_SINGLE) { - 80022f0: 187b adds r3, r7, r1 - 80022f2: 781b ldrb r3, [r3, #0] - 80022f4: 2202 movs r2, #2 - 80022f6: 4013 ands r3, r2 - 80022f8: d01f beq.n 800233a + 800232c: 187b adds r3, r7, r1 + 800232e: 781b ldrb r3, [r3, #0] + 8002330: 2202 movs r2, #2 + 8002332: 4013 ands r3, r2 + 8002334: d01f beq.n 8002376 transaction.holding_registers[0] = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; - 80022fa: 193b adds r3, r7, r4 - 80022fc: 781b ldrb r3, [r3, #0] - 80022fe: 193a adds r2, r7, r4 - 8002300: 1c59 adds r1, r3, #1 - 8002302: 7011 strb r1, [r2, #0] - 8002304: 001a movs r2, r3 - 8002306: 687b ldr r3, [r7, #4] - 8002308: 189b adds r3, r3, r2 - 800230a: 781b ldrb r3, [r3, #0] - 800230c: 021b lsls r3, r3, #8 - 800230e: b21a sxth r2, r3 - 8002310: 193b adds r3, r7, r4 - 8002312: 781b ldrb r3, [r3, #0] - 8002314: 1939 adds r1, r7, r4 - 8002316: 1c58 adds r0, r3, #1 - 8002318: 7008 strb r0, [r1, #0] - 800231a: 0019 movs r1, r3 - 800231c: 687b ldr r3, [r7, #4] - 800231e: 185b adds r3, r3, r1 - 8002320: 781b ldrb r3, [r3, #0] - 8002322: b21b sxth r3, r3 - 8002324: 4313 orrs r3, r2 - 8002326: b21b sxth r3, r3 - 8002328: b29a uxth r2, r3 - 800232a: 4b74 ldr r3, [pc, #464] ; (80024fc ) - 800232c: 2190 movs r1, #144 ; 0x90 - 800232e: 0049 lsls r1, r1, #1 - 8002330: 468c mov ip, r1 - 8002332: 44bc add ip, r7 - 8002334: 4463 add r3, ip - 8002336: 811a strh r2, [r3, #8] - 8002338: e0c6 b.n 80024c8 + 8002336: 193b adds r3, r7, r4 + 8002338: 781b ldrb r3, [r3, #0] + 800233a: 193a adds r2, r7, r4 + 800233c: 1c59 adds r1, r3, #1 + 800233e: 7011 strb r1, [r2, #0] + 8002340: 001a movs r2, r3 + 8002342: 687b ldr r3, [r7, #4] + 8002344: 189b adds r3, r3, r2 + 8002346: 781b ldrb r3, [r3, #0] + 8002348: 021b lsls r3, r3, #8 + 800234a: b21a sxth r2, r3 + 800234c: 193b adds r3, r7, r4 + 800234e: 781b ldrb r3, [r3, #0] + 8002350: 1939 adds r1, r7, r4 + 8002352: 1c58 adds r0, r3, #1 + 8002354: 7008 strb r0, [r1, #0] + 8002356: 0019 movs r1, r3 + 8002358: 687b ldr r3, [r7, #4] + 800235a: 185b adds r3, r3, r1 + 800235c: 781b ldrb r3, [r3, #0] + 800235e: b21b sxth r3, r3 + 8002360: 4313 orrs r3, r2 + 8002362: b21b sxth r3, r3 + 8002364: b29a uxth r2, r3 + 8002366: 4b74 ldr r3, [pc, #464] ; (8002538 ) + 8002368: 2190 movs r1, #144 ; 0x90 + 800236a: 0049 lsls r1, r1, #1 + 800236c: 468c mov ip, r1 + 800236e: 44bc add ip, r7 + 8002370: 4463 add r3, ip + 8002372: 811a strh r2, [r3, #8] + 8002374: e0c6 b.n 8002504 } else { /* Write multiple registers */ transaction.register_count = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; - 800233a: 2420 movs r4, #32 - 800233c: 34ff adds r4, #255 ; 0xff - 800233e: 193b adds r3, r7, r4 - 8002340: 781b ldrb r3, [r3, #0] - 8002342: 193a adds r2, r7, r4 - 8002344: 1c59 adds r1, r3, #1 - 8002346: 7011 strb r1, [r2, #0] - 8002348: 001a movs r2, r3 - 800234a: 687b ldr r3, [r7, #4] - 800234c: 189b adds r3, r3, r2 - 800234e: 781b ldrb r3, [r3, #0] - 8002350: 021b lsls r3, r3, #8 - 8002352: b25a sxtb r2, r3 - 8002354: 193b adds r3, r7, r4 - 8002356: 781b ldrb r3, [r3, #0] - 8002358: 1939 adds r1, r7, r4 - 800235a: 1c58 adds r0, r3, #1 - 800235c: 7008 strb r0, [r1, #0] - 800235e: 0019 movs r1, r3 - 8002360: 687b ldr r3, [r7, #4] - 8002362: 185b adds r3, r3, r1 - 8002364: 781b ldrb r3, [r3, #0] - 8002366: b25b sxtb r3, r3 - 8002368: 4313 orrs r3, r2 - 800236a: b25b sxtb r3, r3 - 800236c: b2da uxtb r2, r3 - 800236e: 4b63 ldr r3, [pc, #396] ; (80024fc ) - 8002370: 2190 movs r1, #144 ; 0x90 - 8002372: 0049 lsls r1, r1, #1 - 8002374: 468c mov ip, r1 - 8002376: 44bc add ip, r7 - 8002378: 4463 add r3, ip - 800237a: 719a strb r2, [r3, #6] + 8002376: 2420 movs r4, #32 + 8002378: 34ff adds r4, #255 ; 0xff + 800237a: 193b adds r3, r7, r4 + 800237c: 781b ldrb r3, [r3, #0] + 800237e: 193a adds r2, r7, r4 + 8002380: 1c59 adds r1, r3, #1 + 8002382: 7011 strb r1, [r2, #0] + 8002384: 001a movs r2, r3 + 8002386: 687b ldr r3, [r7, #4] + 8002388: 189b adds r3, r3, r2 + 800238a: 781b ldrb r3, [r3, #0] + 800238c: 021b lsls r3, r3, #8 + 800238e: b25a sxtb r2, r3 + 8002390: 193b adds r3, r7, r4 + 8002392: 781b ldrb r3, [r3, #0] + 8002394: 1939 adds r1, r7, r4 + 8002396: 1c58 adds r0, r3, #1 + 8002398: 7008 strb r0, [r1, #0] + 800239a: 0019 movs r1, r3 + 800239c: 687b ldr r3, [r7, #4] + 800239e: 185b adds r3, r3, r1 + 80023a0: 781b ldrb r3, [r3, #0] + 80023a2: b25b sxtb r3, r3 + 80023a4: 4313 orrs r3, r2 + 80023a6: b25b sxtb r3, r3 + 80023a8: b2da uxtb r2, r3 + 80023aa: 4b63 ldr r3, [pc, #396] ; (8002538 ) + 80023ac: 2190 movs r1, #144 ; 0x90 + 80023ae: 0049 lsls r1, r1, #1 + 80023b0: 468c mov ip, r1 + 80023b2: 44bc add ip, r7 + 80023b4: 4463 add r3, ip + 80023b6: 719a strb r2, [r3, #6] byte_count = buffer[buffer_pos++]; - 800237c: 193b adds r3, r7, r4 - 800237e: 781b ldrb r3, [r3, #0] - 8002380: 193a adds r2, r7, r4 - 8002382: 1c59 adds r1, r3, #1 - 8002384: 7011 strb r1, [r2, #0] - 8002386: 001a movs r2, r3 - 8002388: 687b ldr r3, [r7, #4] - 800238a: 189a adds r2, r3, r2 - 800238c: 218b movs r1, #139 ; 0x8b - 800238e: 0049 lsls r1, r1, #1 - 8002390: 187b adds r3, r7, r1 - 8002392: 7812 ldrb r2, [r2, #0] - 8002394: 701a strb r2, [r3, #0] - if (transaction.register_count > 123 || 2*transaction.register_count != byte_count) { - 8002396: 4b59 ldr r3, [pc, #356] ; (80024fc ) - 8002398: 2290 movs r2, #144 ; 0x90 - 800239a: 0052 lsls r2, r2, #1 - 800239c: 4694 mov ip, r2 - 800239e: 44bc add ip, r7 - 80023a0: 4463 add r3, ip - 80023a2: 799b ldrb r3, [r3, #6] - 80023a4: 2b7b cmp r3, #123 ; 0x7b - 80023a6: d80b bhi.n 80023c0 - 80023a8: 4b54 ldr r3, [pc, #336] ; (80024fc ) - 80023aa: 2290 movs r2, #144 ; 0x90 - 80023ac: 0052 lsls r2, r2, #1 - 80023ae: 4694 mov ip, r2 - 80023b0: 44bc add ip, r7 - 80023b2: 4463 add r3, ip - 80023b4: 799b ldrb r3, [r3, #6] - 80023b6: 005a lsls r2, r3, #1 - 80023b8: 187b adds r3, r7, r1 + 80023b8: 193b adds r3, r7, r4 80023ba: 781b ldrb r3, [r3, #0] - 80023bc: 429a cmp r2, r3 - 80023be: d008 beq.n 80023d2 + 80023bc: 193a adds r2, r7, r4 + 80023be: 1c59 adds r1, r3, #1 + 80023c0: 7011 strb r1, [r2, #0] + 80023c2: 001a movs r2, r3 + 80023c4: 687b ldr r3, [r7, #4] + 80023c6: 189a adds r2, r3, r2 + 80023c8: 218b movs r1, #139 ; 0x8b + 80023ca: 0049 lsls r1, r1, #1 + 80023cc: 187b adds r3, r7, r1 + 80023ce: 7812 ldrb r2, [r2, #0] + 80023d0: 701a strb r2, [r3, #0] + if (transaction.register_count > 123 || 2*transaction.register_count != byte_count) { + 80023d2: 4b59 ldr r3, [pc, #356] ; (8002538 ) + 80023d4: 2290 movs r2, #144 ; 0x90 + 80023d6: 0052 lsls r2, r2, #1 + 80023d8: 4694 mov ip, r2 + 80023da: 44bc add ip, r7 + 80023dc: 4463 add r3, ip + 80023de: 799b ldrb r3, [r3, #6] + 80023e0: 2b7b cmp r3, #123 ; 0x7b + 80023e2: d80b bhi.n 80023fc + 80023e4: 4b54 ldr r3, [pc, #336] ; (8002538 ) + 80023e6: 2290 movs r2, #144 ; 0x90 + 80023e8: 0052 lsls r2, r2, #1 + 80023ea: 4694 mov ip, r2 + 80023ec: 44bc add ip, r7 + 80023ee: 4463 add r3, ip + 80023f0: 799b ldrb r3, [r3, #6] + 80023f2: 005a lsls r2, r3, #1 + 80023f4: 187b adds r3, r7, r1 + 80023f6: 781b ldrb r3, [r3, #0] + 80023f8: 429a cmp r2, r3 + 80023fa: d008 beq.n 800240e /* Max number of register is defined by Modbus_Application_Protocol_V1_1b, section 6.12 */ transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_REGISTER_QUANTITY; - 80023c0: 4b4e ldr r3, [pc, #312] ; (80024fc ) - 80023c2: 2290 movs r2, #144 ; 0x90 - 80023c4: 0052 lsls r2, r2, #1 - 80023c6: 4694 mov ip, r2 - 80023c8: 44bc add ip, r7 - 80023ca: 4463 add r3, ip - 80023cc: 2202 movs r2, #2 - 80023ce: 71da strb r2, [r3, #7] - 80023d0: e07a b.n 80024c8 + 80023fc: 4b4e ldr r3, [pc, #312] ; (8002538 ) + 80023fe: 2290 movs r2, #144 ; 0x90 + 8002400: 0052 lsls r2, r2, #1 + 8002402: 4694 mov ip, r2 + 8002404: 44bc add ip, r7 + 8002406: 4463 add r3, ip + 8002408: 2202 movs r2, #2 + 800240a: 71da strb r2, [r3, #7] + 800240c: e07a b.n 8002504 } else { for (uint8_t i = 0; i < transaction.register_count; i++) { - 80023d2: 231e movs r3, #30 - 80023d4: 33ff adds r3, #255 ; 0xff - 80023d6: 18fb adds r3, r7, r3 - 80023d8: 2200 movs r2, #0 - 80023da: 701a strb r2, [r3, #0] - 80023dc: e02b b.n 8002436 + 800240e: 231e movs r3, #30 + 8002410: 33ff adds r3, #255 ; 0xff + 8002412: 18fb adds r3, r7, r3 + 8002414: 2200 movs r2, #0 + 8002416: 701a strb r2, [r3, #0] + 8002418: e02b b.n 8002472 transaction.holding_registers[i] = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; - 80023de: 2020 movs r0, #32 - 80023e0: 30ff adds r0, #255 ; 0xff - 80023e2: 183b adds r3, r7, r0 - 80023e4: 781b ldrb r3, [r3, #0] - 80023e6: 183a adds r2, r7, r0 - 80023e8: 1c59 adds r1, r3, #1 - 80023ea: 7011 strb r1, [r2, #0] - 80023ec: 001a movs r2, r3 - 80023ee: 687b ldr r3, [r7, #4] - 80023f0: 189b adds r3, r3, r2 - 80023f2: 781b ldrb r3, [r3, #0] - 80023f4: 021b lsls r3, r3, #8 - 80023f6: b21a sxth r2, r3 - 80023f8: 183b adds r3, r7, r0 - 80023fa: 781b ldrb r3, [r3, #0] - 80023fc: 1839 adds r1, r7, r0 - 80023fe: 1c58 adds r0, r3, #1 - 8002400: 7008 strb r0, [r1, #0] - 8002402: 0019 movs r1, r3 - 8002404: 687b ldr r3, [r7, #4] - 8002406: 185b adds r3, r3, r1 - 8002408: 781b ldrb r3, [r3, #0] - 800240a: b21b sxth r3, r3 - 800240c: 4313 orrs r3, r2 - 800240e: b219 sxth r1, r3 - 8002410: 201e movs r0, #30 - 8002412: 30ff adds r0, #255 ; 0xff - 8002414: 183b adds r3, r7, r0 - 8002416: 781a ldrb r2, [r3, #0] - 8002418: b289 uxth r1, r1 - 800241a: 4b38 ldr r3, [pc, #224] ; (80024fc ) - 800241c: 2490 movs r4, #144 ; 0x90 - 800241e: 0064 lsls r4, r4, #1 - 8002420: 46a4 mov ip, r4 - 8002422: 44bc add ip, r7 - 8002424: 4463 add r3, ip - 8002426: 3204 adds r2, #4 - 8002428: 0052 lsls r2, r2, #1 - 800242a: 52d1 strh r1, [r2, r3] + 800241a: 2020 movs r0, #32 + 800241c: 30ff adds r0, #255 ; 0xff + 800241e: 183b adds r3, r7, r0 + 8002420: 781b ldrb r3, [r3, #0] + 8002422: 183a adds r2, r7, r0 + 8002424: 1c59 adds r1, r3, #1 + 8002426: 7011 strb r1, [r2, #0] + 8002428: 001a movs r2, r3 + 800242a: 687b ldr r3, [r7, #4] + 800242c: 189b adds r3, r3, r2 + 800242e: 781b ldrb r3, [r3, #0] + 8002430: 021b lsls r3, r3, #8 + 8002432: b21a sxth r2, r3 + 8002434: 183b adds r3, r7, r0 + 8002436: 781b ldrb r3, [r3, #0] + 8002438: 1839 adds r1, r7, r0 + 800243a: 1c58 adds r0, r3, #1 + 800243c: 7008 strb r0, [r1, #0] + 800243e: 0019 movs r1, r3 + 8002440: 687b ldr r3, [r7, #4] + 8002442: 185b adds r3, r3, r1 + 8002444: 781b ldrb r3, [r3, #0] + 8002446: b21b sxth r3, r3 + 8002448: 4313 orrs r3, r2 + 800244a: b219 sxth r1, r3 + 800244c: 201e movs r0, #30 + 800244e: 30ff adds r0, #255 ; 0xff + 8002450: 183b adds r3, r7, r0 + 8002452: 781a ldrb r2, [r3, #0] + 8002454: b289 uxth r1, r1 + 8002456: 4b38 ldr r3, [pc, #224] ; (8002538 ) + 8002458: 2490 movs r4, #144 ; 0x90 + 800245a: 0064 lsls r4, r4, #1 + 800245c: 46a4 mov ip, r4 + 800245e: 44bc add ip, r7 + 8002460: 4463 add r3, ip + 8002462: 3204 adds r2, #4 + 8002464: 0052 lsls r2, r2, #1 + 8002466: 52d1 strh r1, [r2, r3] for (uint8_t i = 0; i < transaction.register_count; i++) { - 800242c: 183b adds r3, r7, r0 - 800242e: 781a ldrb r2, [r3, #0] - 8002430: 183b adds r3, r7, r0 - 8002432: 3201 adds r2, #1 - 8002434: 701a strb r2, [r3, #0] - 8002436: 4b31 ldr r3, [pc, #196] ; (80024fc ) - 8002438: 2290 movs r2, #144 ; 0x90 - 800243a: 0052 lsls r2, r2, #1 - 800243c: 4694 mov ip, r2 - 800243e: 44bc add ip, r7 - 8002440: 4463 add r3, ip - 8002442: 799b ldrb r3, [r3, #6] - 8002444: 221e movs r2, #30 - 8002446: 32ff adds r2, #255 ; 0xff - 8002448: 18ba adds r2, r7, r2 - 800244a: 7812 ldrb r2, [r2, #0] - 800244c: 429a cmp r2, r3 - 800244e: d3c6 bcc.n 80023de - 8002450: e03a b.n 80024c8 + 8002468: 183b adds r3, r7, r0 + 800246a: 781a ldrb r2, [r3, #0] + 800246c: 183b adds r3, r7, r0 + 800246e: 3201 adds r2, #1 + 8002470: 701a strb r2, [r3, #0] + 8002472: 4b31 ldr r3, [pc, #196] ; (8002538 ) + 8002474: 2290 movs r2, #144 ; 0x90 + 8002476: 0052 lsls r2, r2, #1 + 8002478: 4694 mov ip, r2 + 800247a: 44bc add ip, r7 + 800247c: 4463 add r3, ip + 800247e: 799b ldrb r3, [r3, #6] + 8002480: 221e movs r2, #30 + 8002482: 32ff adds r2, #255 ; 0xff + 8002484: 18ba adds r2, r7, r2 + 8002486: 7812 ldrb r2, [r2, #0] + 8002488: 429a cmp r2, r3 + 800248a: d3c6 bcc.n 800241a + 800248c: e03a b.n 8002504 } } } } else { transaction.register_count = (buffer[buffer_pos++] << 8) | buffer[buffer_pos++]; - 8002452: 2020 movs r0, #32 - 8002454: 30ff adds r0, #255 ; 0xff - 8002456: 183b adds r3, r7, r0 - 8002458: 781b ldrb r3, [r3, #0] - 800245a: 183a adds r2, r7, r0 - 800245c: 1c59 adds r1, r3, #1 - 800245e: 7011 strb r1, [r2, #0] - 8002460: 001a movs r2, r3 - 8002462: 687b ldr r3, [r7, #4] - 8002464: 189b adds r3, r3, r2 - 8002466: 781b ldrb r3, [r3, #0] - 8002468: 021b lsls r3, r3, #8 - 800246a: b25a sxtb r2, r3 - 800246c: 183b adds r3, r7, r0 - 800246e: 781b ldrb r3, [r3, #0] - 8002470: 1839 adds r1, r7, r0 - 8002472: 1c58 adds r0, r3, #1 - 8002474: 7008 strb r0, [r1, #0] - 8002476: 0019 movs r1, r3 - 8002478: 687b ldr r3, [r7, #4] - 800247a: 185b adds r3, r3, r1 - 800247c: 781b ldrb r3, [r3, #0] - 800247e: b25b sxtb r3, r3 - 8002480: 4313 orrs r3, r2 - 8002482: b25b sxtb r3, r3 - 8002484: b2da uxtb r2, r3 - 8002486: 4b1d ldr r3, [pc, #116] ; (80024fc ) - 8002488: 2190 movs r1, #144 ; 0x90 - 800248a: 0049 lsls r1, r1, #1 - 800248c: 468c mov ip, r1 - 800248e: 44bc add ip, r7 - 8002490: 4463 add r3, ip - 8002492: 719a strb r2, [r3, #6] + 800248e: 2020 movs r0, #32 + 8002490: 30ff adds r0, #255 ; 0xff + 8002492: 183b adds r3, r7, r0 + 8002494: 781b ldrb r3, [r3, #0] + 8002496: 183a adds r2, r7, r0 + 8002498: 1c59 adds r1, r3, #1 + 800249a: 7011 strb r1, [r2, #0] + 800249c: 001a movs r2, r3 + 800249e: 687b ldr r3, [r7, #4] + 80024a0: 189b adds r3, r3, r2 + 80024a2: 781b ldrb r3, [r3, #0] + 80024a4: 021b lsls r3, r3, #8 + 80024a6: b25a sxtb r2, r3 + 80024a8: 183b adds r3, r7, r0 + 80024aa: 781b ldrb r3, [r3, #0] + 80024ac: 1839 adds r1, r7, r0 + 80024ae: 1c58 adds r0, r3, #1 + 80024b0: 7008 strb r0, [r1, #0] + 80024b2: 0019 movs r1, r3 + 80024b4: 687b ldr r3, [r7, #4] + 80024b6: 185b adds r3, r3, r1 + 80024b8: 781b ldrb r3, [r3, #0] + 80024ba: b25b sxtb r3, r3 + 80024bc: 4313 orrs r3, r2 + 80024be: b25b sxtb r3, r3 + 80024c0: b2da uxtb r2, r3 + 80024c2: 4b1d ldr r3, [pc, #116] ; (8002538 ) + 80024c4: 2190 movs r1, #144 ; 0x90 + 80024c6: 0049 lsls r1, r1, #1 + 80024c8: 468c mov ip, r1 + 80024ca: 44bc add ip, r7 + 80024cc: 4463 add r3, ip + 80024ce: 719a strb r2, [r3, #6] if ( transaction.register_count < 1 || - 8002494: 4b19 ldr r3, [pc, #100] ; (80024fc ) - 8002496: 2290 movs r2, #144 ; 0x90 - 8002498: 0052 lsls r2, r2, #1 - 800249a: 4694 mov ip, r2 - 800249c: 44bc add ip, r7 - 800249e: 4463 add r3, ip - 80024a0: 799b ldrb r3, [r3, #6] + 80024d0: 4b19 ldr r3, [pc, #100] ; (8002538 ) + 80024d2: 2290 movs r2, #144 ; 0x90 + 80024d4: 0052 lsls r2, r2, #1 + 80024d6: 4694 mov ip, r2 + 80024d8: 44bc add ip, r7 + 80024da: 4463 add r3, ip + 80024dc: 799b ldrb r3, [r3, #6] if ( - 80024a2: 2b00 cmp r3, #0 - 80024a4: d008 beq.n 80024b8 + 80024de: 2b00 cmp r3, #0 + 80024e0: d008 beq.n 80024f4 transaction.register_count > MODBUS_MAX_REGISTERS - 80024a6: 4b15 ldr r3, [pc, #84] ; (80024fc ) - 80024a8: 2290 movs r2, #144 ; 0x90 - 80024aa: 0052 lsls r2, r2, #1 - 80024ac: 4694 mov ip, r2 - 80024ae: 44bc add ip, r7 - 80024b0: 4463 add r3, ip - 80024b2: 799b ldrb r3, [r3, #6] + 80024e2: 4b15 ldr r3, [pc, #84] ; (8002538 ) + 80024e4: 2290 movs r2, #144 ; 0x90 + 80024e6: 0052 lsls r2, r2, #1 + 80024e8: 4694 mov ip, r2 + 80024ea: 44bc add ip, r7 + 80024ec: 4463 add r3, ip + 80024ee: 799b ldrb r3, [r3, #6] transaction.register_count < 1 || - 80024b4: 2b7d cmp r3, #125 ; 0x7d - 80024b6: d907 bls.n 80024c8 + 80024f0: 2b7d cmp r3, #125 ; 0x7d + 80024f2: d907 bls.n 8002504 ) { transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_DATA_VALUE; - 80024b8: 4b10 ldr r3, [pc, #64] ; (80024fc ) - 80024ba: 2290 movs r2, #144 ; 0x90 - 80024bc: 0052 lsls r2, r2, #1 - 80024be: 4694 mov ip, r2 - 80024c0: 44bc add ip, r7 - 80024c2: 4463 add r3, ip - 80024c4: 2203 movs r2, #3 - 80024c6: 71da strb r2, [r3, #7] + 80024f4: 4b10 ldr r3, [pc, #64] ; (8002538 ) + 80024f6: 2290 movs r2, #144 ; 0x90 + 80024f8: 0052 lsls r2, r2, #1 + 80024fa: 4694 mov ip, r2 + 80024fc: 44bc add ip, r7 + 80024fe: 4463 add r3, ip + 8002500: 2203 movs r2, #3 + 8002502: 71da strb r2, [r3, #7] } } // add offset to register number transaction.register_number += transaction.register_address; - 80024c8: 4b0c ldr r3, [pc, #48] ; (80024fc ) - 80024ca: 2290 movs r2, #144 ; 0x90 - 80024cc: 0052 lsls r2, r2, #1 - 80024ce: 4694 mov ip, r2 - 80024d0: 44bc add ip, r7 - 80024d2: 4463 add r3, ip - 80024d4: 889a ldrh r2, [r3, #4] - 80024d6: 4b09 ldr r3, [pc, #36] ; (80024fc ) - 80024d8: 2190 movs r1, #144 ; 0x90 - 80024da: 0049 lsls r1, r1, #1 - 80024dc: 468c mov ip, r1 - 80024de: 44bc add ip, r7 - 80024e0: 4463 add r3, ip - 80024e2: 885b ldrh r3, [r3, #2] - 80024e4: 18d3 adds r3, r2, r3 - 80024e6: b29a uxth r2, r3 - 80024e8: 4b04 ldr r3, [pc, #16] ; (80024fc ) - 80024ea: 2190 movs r1, #144 ; 0x90 - 80024ec: 0049 lsls r1, r1, #1 - 80024ee: 468c mov ip, r1 - 80024f0: 44bc add ip, r7 - 80024f2: 4463 add r3, ip - 80024f4: 809a strh r2, [r3, #4] + 8002504: 4b0c ldr r3, [pc, #48] ; (8002538 ) + 8002506: 2290 movs r2, #144 ; 0x90 + 8002508: 0052 lsls r2, r2, #1 + 800250a: 4694 mov ip, r2 + 800250c: 44bc add ip, r7 + 800250e: 4463 add r3, ip + 8002510: 889a ldrh r2, [r3, #4] + 8002512: 4b09 ldr r3, [pc, #36] ; (8002538 ) + 8002514: 2190 movs r1, #144 ; 0x90 + 8002516: 0049 lsls r1, r1, #1 + 8002518: 468c mov ip, r1 + 800251a: 44bc add ip, r7 + 800251c: 4463 add r3, ip + 800251e: 885b ldrh r3, [r3, #2] + 8002520: 18d3 adds r3, r2, r3 + 8002522: b29a uxth r2, r3 + 8002524: 4b04 ldr r3, [pc, #16] ; (8002538 ) + 8002526: 2190 movs r1, #144 ; 0x90 + 8002528: 0049 lsls r1, r1, #1 + 800252a: 468c mov ip, r1 + 800252c: 44bc add ip, r7 + 800252e: 4463 add r3, ip + 8002530: 809a strh r2, [r3, #4] break; - 80024f6: e014 b.n 8002522 - 80024f8: 20000000 .word 0x20000000 - 80024fc: fffffeec .word 0xfffffeec - 8002500: 080036c0 .word 0x080036c0 - 8002504: 00002711 .word 0x00002711 - 8002508: 00007531 .word 0x00007531 - 800250c: ffff9c41 .word 0xffff9c41 + 8002532: e014 b.n 800255e + 8002534: 20000000 .word 0x20000000 + 8002538: fffffeec .word 0xfffffeec + 800253c: 0800370c .word 0x0800370c + 8002540: 00002711 .word 0x00002711 + 8002544: 00007531 .word 0x00007531 + 8002548: ffff9c41 .word 0xffff9c41 default: /* function code not known / not implemented, reply with * ExceptionCode 1 */ transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_FUNCTION; - 8002510: 4b46 ldr r3, [pc, #280] ; (800262c ) - 8002512: 2290 movs r2, #144 ; 0x90 - 8002514: 0052 lsls r2, r2, #1 - 8002516: 4694 mov ip, r2 - 8002518: 44bc add ip, r7 - 800251a: 4463 add r3, ip - 800251c: 2201 movs r2, #1 - 800251e: 71da strb r2, [r3, #7] + 800254c: 4b46 ldr r3, [pc, #280] ; (8002668 ) + 800254e: 2290 movs r2, #144 ; 0x90 + 8002550: 0052 lsls r2, r2, #1 + 8002552: 4694 mov ip, r2 + 8002554: 44bc add ip, r7 + 8002556: 4463 add r3, ip + 8002558: 2201 movs r2, #1 + 800255a: 71da strb r2, [r3, #7] break; - 8002520: 46c0 nop ; (mov r8, r8) + 800255c: 46c0 nop ; (mov r8, r8) } /* data in modbus_buffer have been processed and buffer can be re-used for TX */ /* handle reply */ if (transaction.exception.exception_code != 0) { - 8002522: 4b42 ldr r3, [pc, #264] ; (800262c ) - 8002524: 2290 movs r2, #144 ; 0x90 - 8002526: 0052 lsls r2, r2, #1 - 8002528: 4694 mov ip, r2 - 800252a: 44bc add ip, r7 - 800252c: 4463 add r3, ip - 800252e: 79db ldrb r3, [r3, #7] - 8002530: 2b00 cmp r3, #0 - 8002532: d012 beq.n 800255a + 800255e: 4b42 ldr r3, [pc, #264] ; (8002668 ) + 8002560: 2290 movs r2, #144 ; 0x90 + 8002562: 0052 lsls r2, r2, #1 + 8002564: 4694 mov ip, r2 + 8002566: 44bc add ip, r7 + 8002568: 4463 add r3, ip + 800256a: 79db ldrb r3, [r3, #7] + 800256c: 2b00 cmp r3, #0 + 800256e: d012 beq.n 8002596 /* indicate error */ transaction.function_code |= MODBUS_ERROR_FLAG; - 8002534: 4b3d ldr r3, [pc, #244] ; (800262c ) - 8002536: 2290 movs r2, #144 ; 0x90 - 8002538: 0052 lsls r2, r2, #1 - 800253a: 4694 mov ip, r2 - 800253c: 44bc add ip, r7 - 800253e: 4463 add r3, ip - 8002540: 781b ldrb r3, [r3, #0] - 8002542: 2280 movs r2, #128 ; 0x80 - 8002544: 4252 negs r2, r2 - 8002546: 4313 orrs r3, r2 - 8002548: b2da uxtb r2, r3 - 800254a: 4b38 ldr r3, [pc, #224] ; (800262c ) - 800254c: 2190 movs r1, #144 ; 0x90 - 800254e: 0049 lsls r1, r1, #1 - 8002550: 468c mov ip, r1 - 8002552: 44bc add ip, r7 - 8002554: 4463 add r3, ip - 8002556: 701a strb r2, [r3, #0] - 8002558: e03e b.n 80025d8 + 8002570: 4b3d ldr r3, [pc, #244] ; (8002668 ) + 8002572: 2290 movs r2, #144 ; 0x90 + 8002574: 0052 lsls r2, r2, #1 + 8002576: 4694 mov ip, r2 + 8002578: 44bc add ip, r7 + 800257a: 4463 add r3, ip + 800257c: 781b ldrb r3, [r3, #0] + 800257e: 2280 movs r2, #128 ; 0x80 + 8002580: 4252 negs r2, r2 + 8002582: 4313 orrs r3, r2 + 8002584: b2da uxtb r2, r3 + 8002586: 4b38 ldr r3, [pc, #224] ; (8002668 ) + 8002588: 2190 movs r1, #144 ; 0x90 + 800258a: 0049 lsls r1, r1, #1 + 800258c: 468c mov ip, r1 + 800258e: 44bc add ip, r7 + 8002590: 4463 add r3, ip + 8002592: 701a strb r2, [r3, #0] + 8002594: e03e b.n 8002614 } else { callback_result = modbus_slave_callback(&transaction); - 800255a: 2516 movs r5, #22 - 800255c: 35ff adds r5, #255 ; 0xff - 800255e: 197c adds r4, r7, r5 - 8002560: 230c movs r3, #12 - 8002562: 18fb adds r3, r7, r3 - 8002564: 0018 movs r0, r3 - 8002566: f7ff fafb bl 8001b60 - 800256a: 0003 movs r3, r0 - 800256c: 7023 strb r3, [r4, #0] + 8002596: 2516 movs r5, #22 + 8002598: 35ff adds r5, #255 ; 0xff + 800259a: 197c adds r4, r7, r5 + 800259c: 230c movs r3, #12 + 800259e: 18fb adds r3, r7, r3 + 80025a0: 0018 movs r0, r3 + 80025a2: f7ff fafb bl 8001b9c + 80025a6: 0003 movs r3, r0 + 80025a8: 7023 strb r3, [r4, #0] /* error handling */ if (callback_result != MODBUS_OK) { - 800256e: 0029 movs r1, r5 - 8002570: 187b adds r3, r7, r1 - 8002572: 781b ldrb r3, [r3, #0] - 8002574: b25b sxtb r3, r3 - 8002576: 2b00 cmp r3, #0 - 8002578: d02e beq.n 80025d8 + 80025aa: 0029 movs r1, r5 + 80025ac: 187b adds r3, r7, r1 + 80025ae: 781b ldrb r3, [r3, #0] + 80025b0: b25b sxtb r3, r3 + 80025b2: 2b00 cmp r3, #0 + 80025b4: d02e beq.n 8002614 transaction.function_code |= MODBUS_ERROR_FLAG; - 800257a: 4b2c ldr r3, [pc, #176] ; (800262c ) - 800257c: 2290 movs r2, #144 ; 0x90 - 800257e: 0052 lsls r2, r2, #1 - 8002580: 4694 mov ip, r2 - 8002582: 44bc add ip, r7 - 8002584: 4463 add r3, ip - 8002586: 781b ldrb r3, [r3, #0] - 8002588: 2280 movs r2, #128 ; 0x80 - 800258a: 4252 negs r2, r2 - 800258c: 4313 orrs r3, r2 - 800258e: b2da uxtb r2, r3 - 8002590: 4b26 ldr r3, [pc, #152] ; (800262c ) - 8002592: 2090 movs r0, #144 ; 0x90 - 8002594: 0040 lsls r0, r0, #1 - 8002596: 4684 mov ip, r0 - 8002598: 44bc add ip, r7 - 800259a: 4463 add r3, ip - 800259c: 701a strb r2, [r3, #0] + 80025b6: 4b2c ldr r3, [pc, #176] ; (8002668 ) + 80025b8: 2290 movs r2, #144 ; 0x90 + 80025ba: 0052 lsls r2, r2, #1 + 80025bc: 4694 mov ip, r2 + 80025be: 44bc add ip, r7 + 80025c0: 4463 add r3, ip + 80025c2: 781b ldrb r3, [r3, #0] + 80025c4: 2280 movs r2, #128 ; 0x80 + 80025c6: 4252 negs r2, r2 + 80025c8: 4313 orrs r3, r2 + 80025ca: b2da uxtb r2, r3 + 80025cc: 4b26 ldr r3, [pc, #152] ; (8002668 ) + 80025ce: 2090 movs r0, #144 ; 0x90 + 80025d0: 0040 lsls r0, r0, #1 + 80025d2: 4684 mov ip, r0 + 80025d4: 44bc add ip, r7 + 80025d6: 4463 add r3, ip + 80025d8: 701a strb r2, [r3, #0] if (callback_result == MODBUS_ERROR_FUNCTION_NOT_IMPLEMENTED) { - 800259e: 187b adds r3, r7, r1 - 80025a0: 781b ldrb r3, [r3, #0] - 80025a2: b25b sxtb r3, r3 - 80025a4: 3305 adds r3, #5 - 80025a6: d108 bne.n 80025ba + 80025da: 187b adds r3, r7, r1 + 80025dc: 781b ldrb r3, [r3, #0] + 80025de: b25b sxtb r3, r3 + 80025e0: 3305 adds r3, #5 + 80025e2: d108 bne.n 80025f6 transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_FUNCTION; - 80025a8: 4b20 ldr r3, [pc, #128] ; (800262c ) - 80025aa: 2290 movs r2, #144 ; 0x90 - 80025ac: 0052 lsls r2, r2, #1 - 80025ae: 4694 mov ip, r2 - 80025b0: 44bc add ip, r7 - 80025b2: 4463 add r3, ip - 80025b4: 2201 movs r2, #1 - 80025b6: 71da strb r2, [r3, #7] - 80025b8: e00e b.n 80025d8 + 80025e4: 4b20 ldr r3, [pc, #128] ; (8002668 ) + 80025e6: 2290 movs r2, #144 ; 0x90 + 80025e8: 0052 lsls r2, r2, #1 + 80025ea: 4694 mov ip, r2 + 80025ec: 44bc add ip, r7 + 80025ee: 4463 add r3, ip + 80025f0: 2201 movs r2, #1 + 80025f2: 71da strb r2, [r3, #7] + 80025f4: e00e b.n 8002614 } else if (callback_result == MODBUS_ERROR_REGISTER_NOT_IMPLEMENTED) { - 80025ba: 2316 movs r3, #22 - 80025bc: 33ff adds r3, #255 ; 0xff - 80025be: 18fb adds r3, r7, r3 - 80025c0: 781b ldrb r3, [r3, #0] - 80025c2: b25b sxtb r3, r3 - 80025c4: 3306 adds r3, #6 - 80025c6: d107 bne.n 80025d8 + 80025f6: 2316 movs r3, #22 + 80025f8: 33ff adds r3, #255 ; 0xff + 80025fa: 18fb adds r3, r7, r3 + 80025fc: 781b ldrb r3, [r3, #0] + 80025fe: b25b sxtb r3, r3 + 8002600: 3306 adds r3, #6 + 8002602: d107 bne.n 8002614 transaction.exception.exception_code = MODBUS_EXCEPTION_ILLEGAL_DATA_ADDRESS; - 80025c8: 4b18 ldr r3, [pc, #96] ; (800262c ) - 80025ca: 2290 movs r2, #144 ; 0x90 - 80025cc: 0052 lsls r2, r2, #1 - 80025ce: 4694 mov ip, r2 - 80025d0: 44bc add ip, r7 - 80025d2: 4463 add r3, ip - 80025d4: 2202 movs r2, #2 - 80025d6: 71da strb r2, [r3, #7] + 8002604: 4b18 ldr r3, [pc, #96] ; (8002668 ) + 8002606: 2290 movs r2, #144 ; 0x90 + 8002608: 0052 lsls r2, r2, #1 + 800260a: 4694 mov ip, r2 + 800260c: 44bc add ip, r7 + 800260e: 4463 add r3, ip + 8002610: 2202 movs r2, #2 + 8002612: 71da strb r2, [r3, #7] } } } uint8_t msg_len = 0; - 80025d8: 4b15 ldr r3, [pc, #84] ; (8002630 ) - 80025da: 2290 movs r2, #144 ; 0x90 - 80025dc: 0052 lsls r2, r2, #1 - 80025de: 4694 mov ip, r2 - 80025e0: 44bc add ip, r7 - 80025e2: 4463 add r3, ip - 80025e4: 2200 movs r2, #0 - 80025e6: 701a strb r2, [r3, #0] - 80025e8: e000 b.n 80025ec + 8002614: 4b15 ldr r3, [pc, #84] ; (800266c ) + 8002616: 2290 movs r2, #144 ; 0x90 + 8002618: 0052 lsls r2, r2, #1 + 800261a: 4694 mov ip, r2 + 800261c: 44bc add ip, r7 + 800261e: 4463 add r3, ip + 8002620: 2200 movs r2, #0 + 8002622: 701a strb r2, [r3, #0] + 8002624: e000 b.n 8002628 goto modbus_send; - 80025ea: 46c0 nop ; (mov r8, r8) + 8002626: 46c0 nop ; (mov r8, r8) modbus_send: if (address != MODBUS_BROADCAST_ADDR) { - 80025ec: 2318 movs r3, #24 - 80025ee: 33ff adds r3, #255 ; 0xff - 80025f0: 18fb adds r3, r7, r3 - 80025f2: 781b ldrb r3, [r3, #0] - 80025f4: 2b00 cmp r3, #0 - 80025f6: d014 beq.n 8002622 + 8002628: 2318 movs r3, #24 + 800262a: 33ff adds r3, #255 ; 0xff + 800262c: 18fb adds r3, r7, r3 + 800262e: 781b ldrb r3, [r3, #0] + 8002630: 2b00 cmp r3, #0 + 8002632: d014 beq.n 800265e /* send only if master request was not broadcast */ modbus_copy_reply_to_buffer(modbus_buffer, &msg_len, &transaction); - 80025f8: 230c movs r3, #12 - 80025fa: 18fa adds r2, r7, r3 - 80025fc: 230b movs r3, #11 - 80025fe: 18f9 adds r1, r7, r3 - 8002600: 4b0c ldr r3, [pc, #48] ; (8002634 ) - 8002602: 0018 movs r0, r3 - 8002604: f7ff fc90 bl 8001f28 + 8002634: 230c movs r3, #12 + 8002636: 18fa adds r2, r7, r3 + 8002638: 230b movs r3, #11 + 800263a: 18f9 adds r1, r7, r3 + 800263c: 4b0c ldr r3, [pc, #48] ; (8002670 ) + 800263e: 0018 movs r0, r3 + 8002640: f7ff fc90 bl 8001f64 modbus_transmit_function(modbus_buffer, msg_len); - 8002608: 4b09 ldr r3, [pc, #36] ; (8002630 ) - 800260a: 2290 movs r2, #144 ; 0x90 - 800260c: 0052 lsls r2, r2, #1 - 800260e: 4694 mov ip, r2 - 8002610: 44bc add ip, r7 - 8002612: 4463 add r3, ip - 8002614: 781b ldrb r3, [r3, #0] - 8002616: b29a uxth r2, r3 - 8002618: 4b06 ldr r3, [pc, #24] ; (8002634 ) - 800261a: 0011 movs r1, r2 - 800261c: 0018 movs r0, r3 - 800261e: f7ff fc25 bl 8001e6c + 8002644: 4b09 ldr r3, [pc, #36] ; (800266c ) + 8002646: 2290 movs r2, #144 ; 0x90 + 8002648: 0052 lsls r2, r2, #1 + 800264a: 4694 mov ip, r2 + 800264c: 44bc add ip, r7 + 800264e: 4463 add r3, ip + 8002650: 781b ldrb r3, [r3, #0] + 8002652: b29a uxth r2, r3 + 8002654: 4b06 ldr r3, [pc, #24] ; (8002670 ) + 8002656: 0011 movs r1, r2 + 8002658: 0018 movs r0, r3 + 800265a: f7ff fc25 bl 8001ea8 } } - 8002622: 0018 movs r0, r3 - 8002624: 46bd mov sp, r7 - 8002626: b049 add sp, #292 ; 0x124 - 8002628: bdf0 pop {r4, r5, r6, r7, pc} - 800262a: 46c0 nop ; (mov r8, r8) - 800262c: fffffeec .word 0xfffffeec - 8002630: fffffeeb .word 0xfffffeeb - 8002634: 2000007c .word 0x2000007c + 800265e: 0018 movs r0, r3 + 8002660: 46bd mov sp, r7 + 8002662: b049 add sp, #292 ; 0x124 + 8002664: bdf0 pop {r4, r5, r6, r7, pc} + 8002666: 46c0 nop ; (mov r8, r8) + 8002668: fffffeec .word 0xfffffeec + 800266c: fffffeeb .word 0xfffffeeb + 8002670: 2000007c .word 0x2000007c -08002638 : +08002674 : #include "scd4x.h" #include "main.h" /* for uart_disable_interrupts() */ int8_t scd4x_send_cmd(scd4x_cmd_t cmd) { - 8002638: b580 push {r7, lr} - 800263a: b08c sub sp, #48 ; 0x30 - 800263c: af00 add r7, sp, #0 - 800263e: 0002 movs r2, r0 - 8002640: 1dbb adds r3, r7, #6 - 8002642: 801a strh r2, [r3, #0] + 8002674: b580 push {r7, lr} + 8002676: b08c sub sp, #48 ; 0x30 + 8002678: af00 add r7, sp, #0 + 800267a: 0002 movs r2, r0 + 800267c: 1dbb adds r3, r7, #6 + 800267e: 801a strh r2, [r3, #0] uint8_t buffer[32]; int result; // start measurement buffer[0] = cmd >> 8; - 8002644: 1dbb adds r3, r7, #6 - 8002646: 881b ldrh r3, [r3, #0] - 8002648: 0a1b lsrs r3, r3, #8 - 800264a: b29b uxth r3, r3 - 800264c: b2da uxtb r2, r3 - 800264e: 210c movs r1, #12 - 8002650: 187b adds r3, r7, r1 - 8002652: 701a strb r2, [r3, #0] + 8002680: 1dbb adds r3, r7, #6 + 8002682: 881b ldrh r3, [r3, #0] + 8002684: 0a1b lsrs r3, r3, #8 + 8002686: b29b uxth r3, r3 + 8002688: b2da uxtb r2, r3 + 800268a: 210c movs r1, #12 + 800268c: 187b adds r3, r7, r1 + 800268e: 701a strb r2, [r3, #0] buffer[1] = cmd & 0x00ff; - 8002654: 1dbb adds r3, r7, #6 - 8002656: 881b ldrh r3, [r3, #0] - 8002658: b2da uxtb r2, r3 - 800265a: 187b adds r3, r7, r1 - 800265c: 705a strb r2, [r3, #1] + 8002690: 1dbb adds r3, r7, #6 + 8002692: 881b ldrh r3, [r3, #0] + 8002694: b2da uxtb r2, r3 + 8002696: 187b adds r3, r7, r1 + 8002698: 705a strb r2, [r3, #1] result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2); - 800265e: 187b adds r3, r7, r1 - 8002660: 2202 movs r2, #2 - 8002662: 0019 movs r1, r3 - 8002664: 20c4 movs r0, #196 ; 0xc4 - 8002666: f7fe f94f bl 8000908 - 800266a: 0003 movs r3, r0 - 800266c: 62fb str r3, [r7, #44] ; 0x2c + 800269a: 187b adds r3, r7, r1 + 800269c: 2202 movs r2, #2 + 800269e: 0019 movs r1, r3 + 80026a0: 20c4 movs r0, #196 ; 0xc4 + 80026a2: f7fe f931 bl 8000908 + 80026a6: 0003 movs r3, r0 + 80026a8: 62fb str r3, [r7, #44] ; 0x2c if (result != I2C_OK) { - 800266e: 6afb ldr r3, [r7, #44] ; 0x2c - 8002670: 2b00 cmp r3, #0 - 8002672: d002 beq.n 800267a + 80026aa: 6afb ldr r3, [r7, #44] ; 0x2c + 80026ac: 2b00 cmp r3, #0 + 80026ae: d002 beq.n 80026b6 return SCD4X_ERROR; - 8002674: 2301 movs r3, #1 - 8002676: 425b negs r3, r3 - 8002678: e000 b.n 800267c + 80026b0: 2301 movs r3, #1 + 80026b2: 425b negs r3, r3 + 80026b4: e000 b.n 80026b8 } return SCD4X_OK; - 800267a: 2300 movs r3, #0 + 80026b6: 2300 movs r3, #0 } - 800267c: 0018 movs r0, r3 - 800267e: 46bd mov sp, r7 - 8002680: b00c add sp, #48 ; 0x30 - 8002682: bd80 pop {r7, pc} + 80026b8: 0018 movs r0, r3 + 80026ba: 46bd mov sp, r7 + 80026bc: b00c add sp, #48 ; 0x30 + 80026be: bd80 pop {r7, pc} -08002684 : +080026c0 : { return SCD4X_OK; } int8_t scd4x_start_periodic_measurement( void ) { - 8002684: b580 push {r7, lr} - 8002686: af00 add r7, sp, #0 + 80026c0: b580 push {r7, lr} + 80026c2: af00 add r7, sp, #0 return scd4x_send_cmd(SCD4X_START_PERIODIC_MEASUREMENT); - 8002688: 4b03 ldr r3, [pc, #12] ; (8002698 ) - 800268a: 0018 movs r0, r3 - 800268c: f7ff ffd4 bl 8002638 - 8002690: 0003 movs r3, r0 + 80026c4: 4b03 ldr r3, [pc, #12] ; (80026d4 ) + 80026c6: 0018 movs r0, r3 + 80026c8: f7ff ffd4 bl 8002674 + 80026cc: 0003 movs r3, r0 } - 8002692: 0018 movs r0, r3 - 8002694: 46bd mov sp, r7 - 8002696: bd80 pop {r7, pc} - 8002698: 000021b1 .word 0x000021b1 + 80026ce: 0018 movs r0, r3 + 80026d0: 46bd mov sp, r7 + 80026d2: bd80 pop {r7, pc} + 80026d4: 000021b1 .word 0x000021b1 -0800269c : +080026d8 : { return scd4x_send_cmd(SCD4X_PERFORM_FACTORY_RESET); } int8_t scd4x_read_measurement(uint16_t * co2, int16_t *temperature, uint16_t *relative_humidity) { - 800269c: b590 push {r4, r7, lr} - 800269e: b093 sub sp, #76 ; 0x4c - 80026a0: af00 add r7, sp, #0 - 80026a2: 60f8 str r0, [r7, #12] - 80026a4: 60b9 str r1, [r7, #8] - 80026a6: 607a str r2, [r7, #4] + 80026d8: b590 push {r4, r7, lr} + 80026da: b093 sub sp, #76 ; 0x4c + 80026dc: af00 add r7, sp, #0 + 80026de: 60f8 str r0, [r7, #12] + 80026e0: 60b9 str r1, [r7, #8] + 80026e2: 607a str r2, [r7, #4] return SCD4X_ERROR; }*/ + // disable interrupts to prevent MODBUS/I2C conflict + uart_disable_interrupts(); + 80026e4: f7ff fa2a bl 8001b3c // start measurement buffer[0] = SCD4X_READ_MEASUREMENT >> 8; - 80026a8: 2410 movs r4, #16 - 80026aa: 193b adds r3, r7, r4 - 80026ac: 22ec movs r2, #236 ; 0xec - 80026ae: 701a strb r2, [r3, #0] + 80026e8: 2410 movs r4, #16 + 80026ea: 193b adds r3, r7, r4 + 80026ec: 22ec movs r2, #236 ; 0xec + 80026ee: 701a strb r2, [r3, #0] buffer[1] = SCD4X_READ_MEASUREMENT & 0x00ff; - 80026b0: 193b adds r3, r7, r4 - 80026b2: 2205 movs r2, #5 - 80026b4: 705a strb r2, [r3, #1] + 80026f0: 193b adds r3, r7, r4 + 80026f2: 2205 movs r2, #5 + 80026f4: 705a strb r2, [r3, #1] result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2); - 80026b6: 193b adds r3, r7, r4 - 80026b8: 2202 movs r2, #2 - 80026ba: 0019 movs r1, r3 - 80026bc: 20c4 movs r0, #196 ; 0xc4 - 80026be: f7fe f923 bl 8000908 - 80026c2: 0003 movs r3, r0 - 80026c4: 643b str r3, [r7, #64] ; 0x40 + 80026f6: 193b adds r3, r7, r4 + 80026f8: 2202 movs r2, #2 + 80026fa: 0019 movs r1, r3 + 80026fc: 20c4 movs r0, #196 ; 0xc4 + 80026fe: f7fe f903 bl 8000908 + 8002702: 0003 movs r3, r0 + 8002704: 643b str r3, [r7, #64] ; 0x40 // TODO: Proc to vraci NACK? Vyresit. /*if (result != I2C_OK) { return SCD4X_ERROR; }*/ uart_enable_interrupts(); - 80026c6: f7ff fa37 bl 8001b38 + 8002706: f7ff fa2d bl 8001b64 LL_mDelay(1); // 10 ms should be enough - 80026ca: 2001 movs r0, #1 - 80026cc: f000 ff4c bl 8003568 + 800270a: 2001 movs r0, #1 + 800270c: f000 ff52 bl 80035b4 uart_disable_interrupts(); - 80026d0: f7ff fa1e bl 8001b10 + 8002710: f7ff fa14 bl 8001b3c // read out result = i2c_receive(SCD4X_I2C_ADDRESS<<1, buffer, 9); - 80026d4: 193b adds r3, r7, r4 - 80026d6: 2209 movs r2, #9 - 80026d8: 0019 movs r1, r3 - 80026da: 20c4 movs r0, #196 ; 0xc4 - 80026dc: f7fe f972 bl 80009c4 - 80026e0: 0003 movs r3, r0 - 80026e2: 643b str r3, [r7, #64] ; 0x40 + 8002714: 193b adds r3, r7, r4 + 8002716: 2209 movs r2, #9 + 8002718: 0019 movs r1, r3 + 800271a: 20c4 movs r0, #196 ; 0xc4 + 800271c: f7fe f952 bl 80009c4 + 8002720: 0003 movs r3, r0 + 8002722: 643b str r3, [r7, #64] ; 0x40 + uart_enable_interrupts(); + 8002724: f7ff fa1e bl 8001b64 if (result != I2C_OK) - 80026e4: 6c3b ldr r3, [r7, #64] ; 0x40 - 80026e6: 2b00 cmp r3, #0 - 80026e8: d002 beq.n 80026f0 + 8002728: 6c3b ldr r3, [r7, #64] ; 0x40 + 800272a: 2b00 cmp r3, #0 + 800272c: d002 beq.n 8002734 { return SCD4X_ERROR; - 80026ea: 2301 movs r3, #1 - 80026ec: 425b negs r3, r3 - 80026ee: e041 b.n 8002774 + 800272e: 2301 movs r3, #1 + 8002730: 425b negs r3, r3 + 8002732: e041 b.n 80027b8 } // TODO checksum // Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3 uint32_t co2_ticks = (buffer[0] << 8) + buffer[1]; - 80026f0: 2110 movs r1, #16 - 80026f2: 187b adds r3, r7, r1 - 80026f4: 781b ldrb r3, [r3, #0] - 80026f6: 021b lsls r3, r3, #8 - 80026f8: 187a adds r2, r7, r1 - 80026fa: 7852 ldrb r2, [r2, #1] - 80026fc: 189b adds r3, r3, r2 - 80026fe: 63fb str r3, [r7, #60] ; 0x3c + 8002734: 2110 movs r1, #16 + 8002736: 187b adds r3, r7, r1 + 8002738: 781b ldrb r3, [r3, #0] + 800273a: 021b lsls r3, r3, #8 + 800273c: 187a adds r2, r7, r1 + 800273e: 7852 ldrb r2, [r2, #1] + 8002740: 189b adds r3, r3, r2 + 8002742: 63fb str r3, [r7, #60] ; 0x3c uint32_t t_ticks = (buffer[3] << 8) + buffer[4]; - 8002700: 187b adds r3, r7, r1 - 8002702: 78db ldrb r3, [r3, #3] - 8002704: 021b lsls r3, r3, #8 - 8002706: 187a adds r2, r7, r1 - 8002708: 7912 ldrb r2, [r2, #4] - 800270a: 189b adds r3, r3, r2 - 800270c: 63bb str r3, [r7, #56] ; 0x38 + 8002744: 187b adds r3, r7, r1 + 8002746: 78db ldrb r3, [r3, #3] + 8002748: 021b lsls r3, r3, #8 + 800274a: 187a adds r2, r7, r1 + 800274c: 7912 ldrb r2, [r2, #4] + 800274e: 189b adds r3, r3, r2 + 8002750: 63bb str r3, [r7, #56] ; 0x38 uint32_t rh_ticks = (buffer[6] << 8) + buffer[7]; - 800270e: 000a movs r2, r1 - 8002710: 18bb adds r3, r7, r2 - 8002712: 799b ldrb r3, [r3, #6] - 8002714: 021b lsls r3, r3, #8 - 8002716: 18ba adds r2, r7, r2 - 8002718: 79d2 ldrb r2, [r2, #7] - 800271a: 189b adds r3, r3, r2 - 800271c: 637b str r3, [r7, #52] ; 0x34 + 8002752: 000a movs r2, r1 + 8002754: 18bb adds r3, r7, r2 + 8002756: 799b ldrb r3, [r3, #6] + 8002758: 021b lsls r3, r3, #8 + 800275a: 18ba adds r2, r7, r2 + 800275c: 79d2 ldrb r2, [r2, #7] + 800275e: 189b adds r3, r3, r2 + 8002760: 637b str r3, [r7, #52] ; 0x34 int t_degC = -450 + 10 * 175 * t_ticks / 65535; - 800271e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8002720: 4a16 ldr r2, [pc, #88] ; (800277c ) - 8002722: 4353 muls r3, r2 - 8002724: 4916 ldr r1, [pc, #88] ; (8002780 ) - 8002726: 0018 movs r0, r3 - 8002728: f7fd fcee bl 8000108 <__udivsi3> - 800272c: 0003 movs r3, r0 - 800272e: 3bc3 subs r3, #195 ; 0xc3 - 8002730: 3bff subs r3, #255 ; 0xff - 8002732: 633b str r3, [r7, #48] ; 0x30 + 8002762: 6bbb ldr r3, [r7, #56] ; 0x38 + 8002764: 4a16 ldr r2, [pc, #88] ; (80027c0 ) + 8002766: 4353 muls r3, r2 + 8002768: 4916 ldr r1, [pc, #88] ; (80027c4 ) + 800276a: 0018 movs r0, r3 + 800276c: f7fd fccc bl 8000108 <__udivsi3> + 8002770: 0003 movs r3, r0 + 8002772: 3bc3 subs r3, #195 ; 0xc3 + 8002774: 3bff subs r3, #255 ; 0xff + 8002776: 633b str r3, [r7, #48] ; 0x30 int rh_pRH = 100 * rh_ticks / 65535; - 8002734: 6b7b ldr r3, [r7, #52] ; 0x34 - 8002736: 2264 movs r2, #100 ; 0x64 - 8002738: 4353 muls r3, r2 - 800273a: 4911 ldr r1, [pc, #68] ; (8002780 ) - 800273c: 0018 movs r0, r3 - 800273e: f7fd fce3 bl 8000108 <__udivsi3> - 8002742: 0003 movs r3, r0 - 8002744: 647b str r3, [r7, #68] ; 0x44 + 8002778: 6b7b ldr r3, [r7, #52] ; 0x34 + 800277a: 2264 movs r2, #100 ; 0x64 + 800277c: 4353 muls r3, r2 + 800277e: 4911 ldr r1, [pc, #68] ; (80027c4 ) + 8002780: 0018 movs r0, r3 + 8002782: f7fd fcc1 bl 8000108 <__udivsi3> + 8002786: 0003 movs r3, r0 + 8002788: 647b str r3, [r7, #68] ; 0x44 if (rh_pRH > 100) { - 8002746: 6c7b ldr r3, [r7, #68] ; 0x44 - 8002748: 2b64 cmp r3, #100 ; 0x64 - 800274a: dd01 ble.n 8002750 + 800278a: 6c7b ldr r3, [r7, #68] ; 0x44 + 800278c: 2b64 cmp r3, #100 ; 0x64 + 800278e: dd01 ble.n 8002794 rh_pRH = 100; - 800274c: 2364 movs r3, #100 ; 0x64 - 800274e: 647b str r3, [r7, #68] ; 0x44 + 8002790: 2364 movs r3, #100 ; 0x64 + 8002792: 647b str r3, [r7, #68] ; 0x44 } if (rh_pRH < 0) { - 8002750: 6c7b ldr r3, [r7, #68] ; 0x44 - 8002752: 2b00 cmp r3, #0 - 8002754: da01 bge.n 800275a + 8002794: 6c7b ldr r3, [r7, #68] ; 0x44 + 8002796: 2b00 cmp r3, #0 + 8002798: da01 bge.n 800279e rh_pRH = 0; - 8002756: 2300 movs r3, #0 - 8002758: 647b str r3, [r7, #68] ; 0x44 + 800279a: 2300 movs r3, #0 + 800279c: 647b str r3, [r7, #68] ; 0x44 } *co2 = co2_ticks; - 800275a: 6bfb ldr r3, [r7, #60] ; 0x3c - 800275c: b29a uxth r2, r3 - 800275e: 68fb ldr r3, [r7, #12] - 8002760: 801a strh r2, [r3, #0] + 800279e: 6bfb ldr r3, [r7, #60] ; 0x3c + 80027a0: b29a uxth r2, r3 + 80027a2: 68fb ldr r3, [r7, #12] + 80027a4: 801a strh r2, [r3, #0] *temperature = t_degC; - 8002762: 6b3b ldr r3, [r7, #48] ; 0x30 - 8002764: b21a sxth r2, r3 - 8002766: 68bb ldr r3, [r7, #8] - 8002768: 801a strh r2, [r3, #0] + 80027a6: 6b3b ldr r3, [r7, #48] ; 0x30 + 80027a8: b21a sxth r2, r3 + 80027aa: 68bb ldr r3, [r7, #8] + 80027ac: 801a strh r2, [r3, #0] *relative_humidity = rh_pRH; - 800276a: 6c7b ldr r3, [r7, #68] ; 0x44 - 800276c: b29a uxth r2, r3 - 800276e: 687b ldr r3, [r7, #4] - 8002770: 801a strh r2, [r3, #0] + 80027ae: 6c7b ldr r3, [r7, #68] ; 0x44 + 80027b0: b29a uxth r2, r3 + 80027b2: 687b ldr r3, [r7, #4] + 80027b4: 801a strh r2, [r3, #0] return SCD4X_OK; - 8002772: 2300 movs r3, #0 + 80027b6: 2300 movs r3, #0 } - 8002774: 0018 movs r0, r3 - 8002776: 46bd mov sp, r7 - 8002778: b013 add sp, #76 ; 0x4c - 800277a: bd90 pop {r4, r7, pc} - 800277c: 000006d6 .word 0x000006d6 - 8002780: 0000ffff .word 0x0000ffff + 80027b8: 0018 movs r0, r3 + 80027ba: 46bd mov sp, r7 + 80027bc: b013 add sp, #76 ; 0x4c + 80027be: bd90 pop {r4, r7, pc} + 80027c0: 000006d6 .word 0x000006d6 + 80027c4: 0000ffff .word 0x0000ffff -08002784 : +080027c8 : { return SHT4X_OK; } int8_t sht4x_measure(int16_t *temperature, uint16_t *relative_humidity) { - 8002784: b590 push {r4, r7, lr} - 8002786: b091 sub sp, #68 ; 0x44 - 8002788: af00 add r7, sp, #0 - 800278a: 6078 str r0, [r7, #4] - 800278c: 6039 str r1, [r7, #0] + 80027c8: b590 push {r4, r7, lr} + 80027ca: b091 sub sp, #68 ; 0x44 + 80027cc: af00 add r7, sp, #0 + 80027ce: 6078 str r0, [r7, #4] + 80027d0: 6039 str r1, [r7, #0] uint8_t buffer[32]; int result; + // disable interrupts + uart_disable_interrupts(); + 80027d2: f7ff f9b3 bl 8001b3c // start measurement buffer[0] = SHT4X_START_MEAS_HIGH_PRECISION; - 800278e: 240c movs r4, #12 - 8002790: 193b adds r3, r7, r4 - 8002792: 22fd movs r2, #253 ; 0xfd - 8002794: 701a strb r2, [r3, #0] + 80027d6: 240c movs r4, #12 + 80027d8: 193b adds r3, r7, r4 + 80027da: 22fd movs r2, #253 ; 0xfd + 80027dc: 701a strb r2, [r3, #0] result = i2c_transmit(SHT4X_I2C_ADDRESS<<1, buffer, 1); - 8002796: 193b adds r3, r7, r4 - 8002798: 2201 movs r2, #1 - 800279a: 0019 movs r1, r3 - 800279c: 2088 movs r0, #136 ; 0x88 - 800279e: f7fe f8b3 bl 8000908 - 80027a2: 0003 movs r3, r0 - 80027a4: 63bb str r3, [r7, #56] ; 0x38 - // TODO: Proc to vraci NACK? Vyresit. + 80027de: 193b adds r3, r7, r4 + 80027e0: 2201 movs r2, #1 + 80027e2: 0019 movs r1, r3 + 80027e4: 2088 movs r0, #136 ; 0x88 + 80027e6: f7fe f88f bl 8000908 + 80027ea: 0003 movs r3, r0 + 80027ec: 63bb str r3, [r7, #56] ; 0x38 /* if (result != I2C_OK) { return SHT4X_ERROR; }*/ + // enable interrupts while waiting uart_enable_interrupts(); - 80027a6: f7ff f9c7 bl 8001b38 + 80027ee: f7ff f9b9 bl 8001b64 LL_mDelay(10); // 10 ms should be enough - 80027aa: 200a movs r0, #10 - 80027ac: f000 fedc bl 8003568 + 80027f2: 200a movs r0, #10 + 80027f4: f000 fede bl 80035b4 uart_disable_interrupts(); - 80027b0: f7ff f9ae bl 8001b10 + 80027f8: f7ff f9a0 bl 8001b3c // read out result = i2c_receive(SHT4X_I2C_ADDRESS<<1, buffer, 6); - 80027b4: 193b adds r3, r7, r4 - 80027b6: 2206 movs r2, #6 - 80027b8: 0019 movs r1, r3 - 80027ba: 2088 movs r0, #136 ; 0x88 - 80027bc: f7fe f902 bl 80009c4 - 80027c0: 0003 movs r3, r0 - 80027c2: 63bb str r3, [r7, #56] ; 0x38 + 80027fc: 193b adds r3, r7, r4 + 80027fe: 2206 movs r2, #6 + 8002800: 0019 movs r1, r3 + 8002802: 2088 movs r0, #136 ; 0x88 + 8002804: f7fe f8de bl 80009c4 + 8002808: 0003 movs r3, r0 + 800280a: 63bb str r3, [r7, #56] ; 0x38 + // enable interrupts again + uart_enable_interrupts(); + 800280c: f7ff f9aa bl 8001b64 if (result != I2C_OK) { - 80027c4: 6bbb ldr r3, [r7, #56] ; 0x38 - 80027c6: 2b00 cmp r3, #0 - 80027c8: d002 beq.n 80027d0 + 8002810: 6bbb ldr r3, [r7, #56] ; 0x38 + 8002812: 2b00 cmp r3, #0 + 8002814: d002 beq.n 800281c return SHT4X_ERROR; - 80027ca: 2301 movs r3, #1 - 80027cc: 425b negs r3, r3 - 80027ce: e03a b.n 8002846 + 8002816: 2301 movs r3, #1 + 8002818: 425b negs r3, r3 + 800281a: e03a b.n 8002892 } // TODO checksum // Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3 uint32_t t_ticks = (buffer[0] << 8) + buffer[1]; - 80027d0: 210c movs r1, #12 - 80027d2: 187b adds r3, r7, r1 - 80027d4: 781b ldrb r3, [r3, #0] - 80027d6: 021b lsls r3, r3, #8 - 80027d8: 187a adds r2, r7, r1 - 80027da: 7852 ldrb r2, [r2, #1] - 80027dc: 189b adds r3, r3, r2 - 80027de: 637b str r3, [r7, #52] ; 0x34 + 800281c: 210c movs r1, #12 + 800281e: 187b adds r3, r7, r1 + 8002820: 781b ldrb r3, [r3, #0] + 8002822: 021b lsls r3, r3, #8 + 8002824: 187a adds r2, r7, r1 + 8002826: 7852 ldrb r2, [r2, #1] + 8002828: 189b adds r3, r3, r2 + 800282a: 637b str r3, [r7, #52] ; 0x34 uint32_t rh_ticks = (buffer[3] << 8) + buffer[4]; - 80027e0: 000a movs r2, r1 - 80027e2: 18bb adds r3, r7, r2 - 80027e4: 78db ldrb r3, [r3, #3] - 80027e6: 021b lsls r3, r3, #8 - 80027e8: 18ba adds r2, r7, r2 - 80027ea: 7912 ldrb r2, [r2, #4] - 80027ec: 189b adds r3, r3, r2 - 80027ee: 633b str r3, [r7, #48] ; 0x30 + 800282c: 000a movs r2, r1 + 800282e: 18bb adds r3, r7, r2 + 8002830: 78db ldrb r3, [r3, #3] + 8002832: 021b lsls r3, r3, #8 + 8002834: 18ba adds r2, r7, r2 + 8002836: 7912 ldrb r2, [r2, #4] + 8002838: 189b adds r3, r3, r2 + 800283a: 633b str r3, [r7, #48] ; 0x30 int t_degC = -450 + 10 * 175 * t_ticks / 65535; /* temperature * 10 */ - 80027f0: 6b7b ldr r3, [r7, #52] ; 0x34 - 80027f2: 4a17 ldr r2, [pc, #92] ; (8002850 ) - 80027f4: 4353 muls r3, r2 - 80027f6: 4917 ldr r1, [pc, #92] ; (8002854 ) - 80027f8: 0018 movs r0, r3 - 80027fa: f7fd fc85 bl 8000108 <__udivsi3> - 80027fe: 0003 movs r3, r0 - 8002800: 3bc3 subs r3, #195 ; 0xc3 - 8002802: 3bff subs r3, #255 ; 0xff - 8002804: 62fb str r3, [r7, #44] ; 0x2c + 800283c: 6b7b ldr r3, [r7, #52] ; 0x34 + 800283e: 4a17 ldr r2, [pc, #92] ; (800289c ) + 8002840: 4353 muls r3, r2 + 8002842: 4917 ldr r1, [pc, #92] ; (80028a0 ) + 8002844: 0018 movs r0, r3 + 8002846: f7fd fc5f bl 8000108 <__udivsi3> + 800284a: 0003 movs r3, r0 + 800284c: 3bc3 subs r3, #195 ; 0xc3 + 800284e: 3bff subs r3, #255 ; 0xff + 8002850: 62fb str r3, [r7, #44] ; 0x2c int rh_pRH = -6 + 125 * rh_ticks / 65535; - 8002806: 6b3a ldr r2, [r7, #48] ; 0x30 - 8002808: 0013 movs r3, r2 - 800280a: 015b lsls r3, r3, #5 - 800280c: 1a9b subs r3, r3, r2 - 800280e: 009b lsls r3, r3, #2 - 8002810: 189b adds r3, r3, r2 - 8002812: 4910 ldr r1, [pc, #64] ; (8002854 ) - 8002814: 0018 movs r0, r3 - 8002816: f7fd fc77 bl 8000108 <__udivsi3> - 800281a: 0003 movs r3, r0 - 800281c: 3b06 subs r3, #6 - 800281e: 63fb str r3, [r7, #60] ; 0x3c + 8002852: 6b3a ldr r2, [r7, #48] ; 0x30 + 8002854: 0013 movs r3, r2 + 8002856: 015b lsls r3, r3, #5 + 8002858: 1a9b subs r3, r3, r2 + 800285a: 009b lsls r3, r3, #2 + 800285c: 189b adds r3, r3, r2 + 800285e: 4910 ldr r1, [pc, #64] ; (80028a0 ) + 8002860: 0018 movs r0, r3 + 8002862: f7fd fc51 bl 8000108 <__udivsi3> + 8002866: 0003 movs r3, r0 + 8002868: 3b06 subs r3, #6 + 800286a: 63fb str r3, [r7, #60] ; 0x3c if (rh_pRH > 100) { - 8002820: 6bfb ldr r3, [r7, #60] ; 0x3c - 8002822: 2b64 cmp r3, #100 ; 0x64 - 8002824: dd01 ble.n 800282a + 800286c: 6bfb ldr r3, [r7, #60] ; 0x3c + 800286e: 2b64 cmp r3, #100 ; 0x64 + 8002870: dd01 ble.n 8002876 rh_pRH = 100; - 8002826: 2364 movs r3, #100 ; 0x64 - 8002828: 63fb str r3, [r7, #60] ; 0x3c + 8002872: 2364 movs r3, #100 ; 0x64 + 8002874: 63fb str r3, [r7, #60] ; 0x3c } if (rh_pRH < 0) { - 800282a: 6bfb ldr r3, [r7, #60] ; 0x3c - 800282c: 2b00 cmp r3, #0 - 800282e: da01 bge.n 8002834 + 8002876: 6bfb ldr r3, [r7, #60] ; 0x3c + 8002878: 2b00 cmp r3, #0 + 800287a: da01 bge.n 8002880 rh_pRH = 0; - 8002830: 2300 movs r3, #0 - 8002832: 63fb str r3, [r7, #60] ; 0x3c + 800287c: 2300 movs r3, #0 + 800287e: 63fb str r3, [r7, #60] ; 0x3c } *temperature = t_degC; - 8002834: 6afb ldr r3, [r7, #44] ; 0x2c - 8002836: b21a sxth r2, r3 - 8002838: 687b ldr r3, [r7, #4] - 800283a: 801a strh r2, [r3, #0] + 8002880: 6afb ldr r3, [r7, #44] ; 0x2c + 8002882: b21a sxth r2, r3 + 8002884: 687b ldr r3, [r7, #4] + 8002886: 801a strh r2, [r3, #0] *relative_humidity = rh_pRH; - 800283c: 6bfb ldr r3, [r7, #60] ; 0x3c - 800283e: b29a uxth r2, r3 - 8002840: 683b ldr r3, [r7, #0] - 8002842: 801a strh r2, [r3, #0] + 8002888: 6bfb ldr r3, [r7, #60] ; 0x3c + 800288a: b29a uxth r2, r3 + 800288c: 683b ldr r3, [r7, #0] + 800288e: 801a strh r2, [r3, #0] return SHT4X_OK; - 8002844: 2300 movs r3, #0 + 8002890: 2300 movs r3, #0 } - 8002846: 0018 movs r0, r3 - 8002848: 46bd mov sp, r7 - 800284a: b011 add sp, #68 ; 0x44 - 800284c: bd90 pop {r4, r7, pc} - 800284e: 46c0 nop ; (mov r8, r8) - 8002850: 000006d6 .word 0x000006d6 - 8002854: 0000ffff .word 0x0000ffff + 8002892: 0018 movs r0, r3 + 8002894: 46bd mov sp, r7 + 8002896: b011 add sp, #68 ; 0x44 + 8002898: bd90 pop {r4, r7, pc} + 800289a: 46c0 nop ; (mov r8, r8) + 800289c: 000006d6 .word 0x000006d6 + 80028a0: 0000ffff .word 0x0000ffff -08002858 : +080028a4 : { return sps30_send_cmd(SPS30_STOP_MEASUREMENT); } int8_t sps30_read_measured_values(uint16_t *measured_values, uint8_t measured_values_len) { - 8002858: b5f0 push {r4, r5, r6, r7, lr} - 800285a: b091 sub sp, #68 ; 0x44 - 800285c: af00 add r7, sp, #0 - 800285e: 6078 str r0, [r7, #4] - 8002860: 000a movs r2, r1 - 8002862: 1cfb adds r3, r7, #3 - 8002864: 701a strb r2, [r3, #0] + 80028a4: b5f0 push {r4, r5, r6, r7, lr} + 80028a6: b091 sub sp, #68 ; 0x44 + 80028a8: af00 add r7, sp, #0 + 80028aa: 6078 str r0, [r7, #4] + 80028ac: 000a movs r2, r1 + 80028ae: 1cfb adds r3, r7, #3 + 80028b0: 701a strb r2, [r3, #0] if (measured_values_len != 10) - 8002866: 1cfb adds r3, r7, #3 - 8002868: 781b ldrb r3, [r3, #0] - 800286a: 2b0a cmp r3, #10 - 800286c: d002 beq.n 8002874 + 80028b2: 1cfb adds r3, r7, #3 + 80028b4: 781b ldrb r3, [r3, #0] + 80028b6: 2b0a cmp r3, #10 + 80028b8: d002 beq.n 80028c0 { return -5; - 800286e: 2305 movs r3, #5 - 8002870: 425b negs r3, r3 - 8002872: e064 b.n 800293e + 80028ba: 2305 movs r3, #5 + 80028bc: 425b negs r3, r3 + 80028be: e064 b.n 800298a uint8_t i2c_rx_buffer[30]; uint8_t result; // start measurement i2c_tx_buffer[0] = SPS30_READ_MEASURED_VALUES >> 8; - 8002874: 2138 movs r1, #56 ; 0x38 - 8002876: 187b adds r3, r7, r1 - 8002878: 2203 movs r2, #3 - 800287a: 701a strb r2, [r3, #0] + 80028c0: 2138 movs r1, #56 ; 0x38 + 80028c2: 187b adds r3, r7, r1 + 80028c4: 2203 movs r2, #3 + 80028c6: 701a strb r2, [r3, #0] i2c_tx_buffer[1] = SPS30_READ_MEASURED_VALUES & 0x00ff; - 800287c: 187b adds r3, r7, r1 - 800287e: 2200 movs r2, #0 - 8002880: 705a strb r2, [r3, #1] + 80028c8: 187b adds r3, r7, r1 + 80028ca: 2200 movs r2, #0 + 80028cc: 705a strb r2, [r3, #1] result = i2c_transmit(SPS30_I2C_ADDRESS<<1, i2c_tx_buffer, 2); - 8002882: 187b adds r3, r7, r1 - 8002884: 2202 movs r2, #2 - 8002886: 0019 movs r1, r3 - 8002888: 20d2 movs r0, #210 ; 0xd2 - 800288a: f7fe f83d bl 8000908 - 800288e: 0002 movs r2, r0 - 8002890: 243d movs r4, #61 ; 0x3d - 8002892: 193b adds r3, r7, r4 - 8002894: 701a strb r2, [r3, #0] + 80028ce: 187b adds r3, r7, r1 + 80028d0: 2202 movs r2, #2 + 80028d2: 0019 movs r1, r3 + 80028d4: 20d2 movs r0, #210 ; 0xd2 + 80028d6: f7fe f817 bl 8000908 + 80028da: 0002 movs r2, r0 + 80028dc: 243d movs r4, #61 ; 0x3d + 80028de: 193b adds r3, r7, r4 + 80028e0: 701a strb r2, [r3, #0] /*if (result != I2C_OK) { return SPS30_ERROR; } return SPS30_OK;*/ LL_mDelay(1); // 10 ms should be enough - 8002896: 2001 movs r0, #1 - 8002898: f000 fe66 bl 8003568 + 80028e2: 2001 movs r0, #1 + 80028e4: f000 fe66 bl 80035b4 // read out result = i2c_receive(SPS30_I2C_ADDRESS<<1, i2c_rx_buffer, 30); - 800289c: 2318 movs r3, #24 - 800289e: 18fb adds r3, r7, r3 - 80028a0: 221e movs r2, #30 - 80028a2: 0019 movs r1, r3 - 80028a4: 20d2 movs r0, #210 ; 0xd2 - 80028a6: f7fe f88d bl 80009c4 - 80028aa: 0002 movs r2, r0 - 80028ac: 193b adds r3, r7, r4 - 80028ae: 701a strb r2, [r3, #0] + 80028e8: 2318 movs r3, #24 + 80028ea: 18fb adds r3, r7, r3 + 80028ec: 221e movs r2, #30 + 80028ee: 0019 movs r1, r3 + 80028f0: 20d2 movs r0, #210 ; 0xd2 + 80028f2: f7fe f867 bl 80009c4 + 80028f6: 0002 movs r2, r0 + 80028f8: 193b adds r3, r7, r4 + 80028fa: 701a strb r2, [r3, #0] if (result != I2C_OK) - 80028b0: 193b adds r3, r7, r4 - 80028b2: 781b ldrb r3, [r3, #0] - 80028b4: 2b00 cmp r3, #0 - 80028b6: d002 beq.n 80028be + 80028fc: 193b adds r3, r7, r4 + 80028fe: 781b ldrb r3, [r3, #0] + 8002900: 2b00 cmp r3, #0 + 8002902: d002 beq.n 800290a { return SPS30_ERROR; - 80028b8: 2301 movs r3, #1 - 80028ba: 425b negs r3, r3 - 80028bc: e03f b.n 800293e + 8002904: 2301 movs r3, #1 + 8002906: 425b negs r3, r3 + 8002908: e03f b.n 800298a } uint8_t checksums[10]; uint8_t j = 0; - 80028be: 233f movs r3, #63 ; 0x3f - 80028c0: 18fb adds r3, r7, r3 - 80028c2: 2200 movs r2, #0 - 80028c4: 701a strb r2, [r3, #0] + 800290a: 233f movs r3, #63 ; 0x3f + 800290c: 18fb adds r3, r7, r3 + 800290e: 2200 movs r2, #0 + 8002910: 701a strb r2, [r3, #0] for (uint8_t i = 0; i < 10; i++) - 80028c6: 233e movs r3, #62 ; 0x3e - 80028c8: 18fb adds r3, r7, r3 - 80028ca: 2200 movs r2, #0 - 80028cc: 701a strb r2, [r3, #0] - 80028ce: e030 b.n 8002932 + 8002912: 233e movs r3, #62 ; 0x3e + 8002914: 18fb adds r3, r7, r3 + 8002916: 2200 movs r2, #0 + 8002918: 701a strb r2, [r3, #0] + 800291a: e030 b.n 800297e { measured_values[i] = (i2c_rx_buffer[j++] << 8) + i2c_rx_buffer[j++]; - 80028d0: 243f movs r4, #63 ; 0x3f - 80028d2: 193b adds r3, r7, r4 - 80028d4: 781b ldrb r3, [r3, #0] - 80028d6: 193a adds r2, r7, r4 - 80028d8: 1c59 adds r1, r3, #1 - 80028da: 7011 strb r1, [r2, #0] - 80028dc: 001a movs r2, r3 - 80028de: 2618 movs r6, #24 - 80028e0: 19bb adds r3, r7, r6 - 80028e2: 5c9b ldrb r3, [r3, r2] - 80028e4: b29b uxth r3, r3 - 80028e6: 021b lsls r3, r3, #8 - 80028e8: b299 uxth r1, r3 - 80028ea: 193b adds r3, r7, r4 - 80028ec: 781b ldrb r3, [r3, #0] - 80028ee: 193a adds r2, r7, r4 - 80028f0: 1c58 adds r0, r3, #1 - 80028f2: 7010 strb r0, [r2, #0] - 80028f4: 001a movs r2, r3 - 80028f6: 19bb adds r3, r7, r6 - 80028f8: 5c9b ldrb r3, [r3, r2] - 80028fa: b29a uxth r2, r3 - 80028fc: 253e movs r5, #62 ; 0x3e - 80028fe: 197b adds r3, r7, r5 - 8002900: 781b ldrb r3, [r3, #0] - 8002902: 005b lsls r3, r3, #1 - 8002904: 6878 ldr r0, [r7, #4] - 8002906: 18c3 adds r3, r0, r3 - 8002908: 188a adds r2, r1, r2 - 800290a: b292 uxth r2, r2 - 800290c: 801a strh r2, [r3, #0] + 800291c: 243f movs r4, #63 ; 0x3f + 800291e: 193b adds r3, r7, r4 + 8002920: 781b ldrb r3, [r3, #0] + 8002922: 193a adds r2, r7, r4 + 8002924: 1c59 adds r1, r3, #1 + 8002926: 7011 strb r1, [r2, #0] + 8002928: 001a movs r2, r3 + 800292a: 2618 movs r6, #24 + 800292c: 19bb adds r3, r7, r6 + 800292e: 5c9b ldrb r3, [r3, r2] + 8002930: b29b uxth r3, r3 + 8002932: 021b lsls r3, r3, #8 + 8002934: b299 uxth r1, r3 + 8002936: 193b adds r3, r7, r4 + 8002938: 781b ldrb r3, [r3, #0] + 800293a: 193a adds r2, r7, r4 + 800293c: 1c58 adds r0, r3, #1 + 800293e: 7010 strb r0, [r2, #0] + 8002940: 001a movs r2, r3 + 8002942: 19bb adds r3, r7, r6 + 8002944: 5c9b ldrb r3, [r3, r2] + 8002946: b29a uxth r2, r3 + 8002948: 253e movs r5, #62 ; 0x3e + 800294a: 197b adds r3, r7, r5 + 800294c: 781b ldrb r3, [r3, #0] + 800294e: 005b lsls r3, r3, #1 + 8002950: 6878 ldr r0, [r7, #4] + 8002952: 18c3 adds r3, r0, r3 + 8002954: 188a adds r2, r1, r2 + 8002956: b292 uxth r2, r2 + 8002958: 801a strh r2, [r3, #0] checksums[i] = i2c_rx_buffer[j++]; - 800290e: 193b adds r3, r7, r4 - 8002910: 781b ldrb r3, [r3, #0] - 8002912: 193a adds r2, r7, r4 - 8002914: 1c59 adds r1, r3, #1 - 8002916: 7011 strb r1, [r2, #0] - 8002918: 0019 movs r1, r3 - 800291a: 197b adds r3, r7, r5 - 800291c: 781b ldrb r3, [r3, #0] - 800291e: 19ba adds r2, r7, r6 - 8002920: 5c51 ldrb r1, [r2, r1] - 8002922: 220c movs r2, #12 - 8002924: 18ba adds r2, r7, r2 - 8002926: 54d1 strb r1, [r2, r3] + 800295a: 193b adds r3, r7, r4 + 800295c: 781b ldrb r3, [r3, #0] + 800295e: 193a adds r2, r7, r4 + 8002960: 1c59 adds r1, r3, #1 + 8002962: 7011 strb r1, [r2, #0] + 8002964: 0019 movs r1, r3 + 8002966: 197b adds r3, r7, r5 + 8002968: 781b ldrb r3, [r3, #0] + 800296a: 19ba adds r2, r7, r6 + 800296c: 5c51 ldrb r1, [r2, r1] + 800296e: 220c movs r2, #12 + 8002970: 18ba adds r2, r7, r2 + 8002972: 54d1 strb r1, [r2, r3] for (uint8_t i = 0; i < 10; i++) - 8002928: 197b adds r3, r7, r5 - 800292a: 781a ldrb r2, [r3, #0] - 800292c: 197b adds r3, r7, r5 - 800292e: 3201 adds r2, #1 - 8002930: 701a strb r2, [r3, #0] - 8002932: 233e movs r3, #62 ; 0x3e - 8002934: 18fb adds r3, r7, r3 - 8002936: 781b ldrb r3, [r3, #0] - 8002938: 2b09 cmp r3, #9 - 800293a: d9c9 bls.n 80028d0 + 8002974: 197b adds r3, r7, r5 + 8002976: 781a ldrb r2, [r3, #0] + 8002978: 197b adds r3, r7, r5 + 800297a: 3201 adds r2, #1 + 800297c: 701a strb r2, [r3, #0] + 800297e: 233e movs r3, #62 ; 0x3e + 8002980: 18fb adds r3, r7, r3 + 8002982: 781b ldrb r3, [r3, #0] + 8002984: 2b09 cmp r3, #9 + 8002986: d9c9 bls.n 800291c } return SPS30_OK; - 800293c: 2300 movs r3, #0 + 8002988: 2300 movs r3, #0 } - 800293e: 0018 movs r0, r3 - 8002940: 46bd mov sp, r7 - 8002942: b011 add sp, #68 ; 0x44 - 8002944: bdf0 pop {r4, r5, r6, r7, pc} + 800298a: 0018 movs r0, r3 + 800298c: 46bd mov sp, r7 + 800298e: b011 add sp, #68 ; 0x44 + 8002990: bdf0 pop {r4, r5, r6, r7, pc} -08002946 : +08002992 : { - 8002946: b580 push {r7, lr} - 8002948: b082 sub sp, #8 - 800294a: af00 add r7, sp, #0 - 800294c: 6078 str r0, [r7, #4] + 8002992: b580 push {r7, lr} + 8002994: b082 sub sp, #8 + 8002996: af00 add r7, sp, #0 + 8002998: 6078 str r0, [r7, #4] return ((READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL); - 800294e: 687b ldr r3, [r7, #4] - 8002950: 69db ldr r3, [r3, #28] - 8002952: 2210 movs r2, #16 - 8002954: 4013 ands r3, r2 - 8002956: 2b10 cmp r3, #16 - 8002958: d101 bne.n 800295e - 800295a: 2301 movs r3, #1 - 800295c: e000 b.n 8002960 - 800295e: 2300 movs r3, #0 + 800299a: 687b ldr r3, [r7, #4] + 800299c: 69db ldr r3, [r3, #28] + 800299e: 2210 movs r2, #16 + 80029a0: 4013 ands r3, r2 + 80029a2: 2b10 cmp r3, #16 + 80029a4: d101 bne.n 80029aa + 80029a6: 2301 movs r3, #1 + 80029a8: e000 b.n 80029ac + 80029aa: 2300 movs r3, #0 } - 8002960: 0018 movs r0, r3 - 8002962: 46bd mov sp, r7 - 8002964: b002 add sp, #8 - 8002966: bd80 pop {r7, pc} + 80029ac: 0018 movs r0, r3 + 80029ae: 46bd mov sp, r7 + 80029b0: b002 add sp, #8 + 80029b2: bd80 pop {r7, pc} -08002968 : +080029b4 : { - 8002968: b580 push {r7, lr} - 800296a: b082 sub sp, #8 - 800296c: af00 add r7, sp, #0 - 800296e: 6078 str r0, [r7, #4] + 80029b4: b580 push {r7, lr} + 80029b6: b082 sub sp, #8 + 80029b8: af00 add r7, sp, #0 + 80029ba: 6078 str r0, [r7, #4] return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL); - 8002970: 687b ldr r3, [r7, #4] - 8002972: 69db ldr r3, [r3, #28] - 8002974: 2220 movs r2, #32 - 8002976: 4013 ands r3, r2 - 8002978: 2b20 cmp r3, #32 - 800297a: d101 bne.n 8002980 - 800297c: 2301 movs r3, #1 - 800297e: e000 b.n 8002982 - 8002980: 2300 movs r3, #0 + 80029bc: 687b ldr r3, [r7, #4] + 80029be: 69db ldr r3, [r3, #28] + 80029c0: 2220 movs r2, #32 + 80029c2: 4013 ands r3, r2 + 80029c4: 2b20 cmp r3, #32 + 80029c6: d101 bne.n 80029cc + 80029c8: 2301 movs r3, #1 + 80029ca: e000 b.n 80029ce + 80029cc: 2300 movs r3, #0 } - 8002982: 0018 movs r0, r3 - 8002984: 46bd mov sp, r7 - 8002986: b002 add sp, #8 - 8002988: bd80 pop {r7, pc} + 80029ce: 0018 movs r0, r3 + 80029d0: 46bd mov sp, r7 + 80029d2: b002 add sp, #8 + 80029d4: bd80 pop {r7, pc} -0800298a : +080029d6 : { - 800298a: b580 push {r7, lr} - 800298c: b082 sub sp, #8 - 800298e: af00 add r7, sp, #0 - 8002990: 6078 str r0, [r7, #4] + 80029d6: b580 push {r7, lr} + 80029d8: b082 sub sp, #8 + 80029da: af00 add r7, sp, #0 + 80029dc: 6078 str r0, [r7, #4] WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF); - 8002992: 687b ldr r3, [r7, #4] - 8002994: 2210 movs r2, #16 - 8002996: 621a str r2, [r3, #32] + 80029de: 687b ldr r3, [r7, #4] + 80029e0: 2210 movs r2, #16 + 80029e2: 621a str r2, [r3, #32] } - 8002998: 46c0 nop ; (mov r8, r8) - 800299a: 46bd mov sp, r7 - 800299c: b002 add sp, #8 - 800299e: bd80 pop {r7, pc} + 80029e4: 46c0 nop ; (mov r8, r8) + 80029e6: 46bd mov sp, r7 + 80029e8: b002 add sp, #8 + 80029ea: bd80 pop {r7, pc} -080029a0 : +080029ec : { - 80029a0: b580 push {r7, lr} - 80029a2: b082 sub sp, #8 - 80029a4: af00 add r7, sp, #0 - 80029a6: 6078 str r0, [r7, #4] + 80029ec: b580 push {r7, lr} + 80029ee: b082 sub sp, #8 + 80029f0: af00 add r7, sp, #0 + 80029f2: 6078 str r0, [r7, #4] return ((READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL); - 80029a8: 687b ldr r3, [r7, #4] - 80029aa: 681b ldr r3, [r3, #0] - 80029ac: 2210 movs r2, #16 - 80029ae: 4013 ands r3, r2 - 80029b0: 2b10 cmp r3, #16 - 80029b2: d101 bne.n 80029b8 - 80029b4: 2301 movs r3, #1 - 80029b6: e000 b.n 80029ba - 80029b8: 2300 movs r3, #0 + 80029f4: 687b ldr r3, [r7, #4] + 80029f6: 681b ldr r3, [r3, #0] + 80029f8: 2210 movs r2, #16 + 80029fa: 4013 ands r3, r2 + 80029fc: 2b10 cmp r3, #16 + 80029fe: d101 bne.n 8002a04 + 8002a00: 2301 movs r3, #1 + 8002a02: e000 b.n 8002a06 + 8002a04: 2300 movs r3, #0 } - 80029ba: 0018 movs r0, r3 - 80029bc: 46bd mov sp, r7 - 80029be: b002 add sp, #8 - 80029c0: bd80 pop {r7, pc} + 8002a06: 0018 movs r0, r3 + 8002a08: 46bd mov sp, r7 + 8002a0a: b002 add sp, #8 + 8002a0c: bd80 pop {r7, pc} -080029c2 : +08002a0e : { - 80029c2: b580 push {r7, lr} - 80029c4: b082 sub sp, #8 - 80029c6: af00 add r7, sp, #0 - 80029c8: 6078 str r0, [r7, #4] + 8002a0e: b580 push {r7, lr} + 8002a10: b082 sub sp, #8 + 8002a12: af00 add r7, sp, #0 + 8002a14: 6078 str r0, [r7, #4] return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1UL : 0UL); - 80029ca: 687b ldr r3, [r7, #4] - 80029cc: 681b ldr r3, [r3, #0] - 80029ce: 2220 movs r2, #32 - 80029d0: 4013 ands r3, r2 - 80029d2: 2b20 cmp r3, #32 - 80029d4: d101 bne.n 80029da - 80029d6: 2301 movs r3, #1 - 80029d8: e000 b.n 80029dc - 80029da: 2300 movs r3, #0 + 8002a16: 687b ldr r3, [r7, #4] + 8002a18: 681b ldr r3, [r3, #0] + 8002a1a: 2220 movs r2, #32 + 8002a1c: 4013 ands r3, r2 + 8002a1e: 2b20 cmp r3, #32 + 8002a20: d101 bne.n 8002a26 + 8002a22: 2301 movs r3, #1 + 8002a24: e000 b.n 8002a28 + 8002a26: 2300 movs r3, #0 } - 80029dc: 0018 movs r0, r3 - 80029de: 46bd mov sp, r7 - 80029e0: b002 add sp, #8 - 80029e2: bd80 pop {r7, pc} + 8002a28: 0018 movs r0, r3 + 8002a2a: 46bd mov sp, r7 + 8002a2c: b002 add sp, #8 + 8002a2e: bd80 pop {r7, pc} -080029e4 : +08002a30 : { - 80029e4: b580 push {r7, lr} - 80029e6: b082 sub sp, #8 - 80029e8: af00 add r7, sp, #0 - 80029ea: 6078 str r0, [r7, #4] + 8002a30: b580 push {r7, lr} + 8002a32: b082 sub sp, #8 + 8002a34: af00 add r7, sp, #0 + 8002a36: 6078 str r0, [r7, #4] return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR)); - 80029ec: 687b ldr r3, [r7, #4] - 80029ee: 6a5b ldr r3, [r3, #36] ; 0x24 - 80029f0: b29b uxth r3, r3 - 80029f2: 05db lsls r3, r3, #23 - 80029f4: 0ddb lsrs r3, r3, #23 - 80029f6: b29b uxth r3, r3 + 8002a38: 687b ldr r3, [r7, #4] + 8002a3a: 6a5b ldr r3, [r3, #36] ; 0x24 + 8002a3c: b29b uxth r3, r3 + 8002a3e: 05db lsls r3, r3, #23 + 8002a40: 0ddb lsrs r3, r3, #23 + 8002a42: b29b uxth r3, r3 } - 80029f8: 0018 movs r0, r3 - 80029fa: 46bd mov sp, r7 - 80029fc: b002 add sp, #8 - 80029fe: bd80 pop {r7, pc} + 8002a44: 0018 movs r0, r3 + 8002a46: 46bd mov sp, r7 + 8002a48: b002 add sp, #8 + 8002a4a: bd80 pop {r7, pc} -08002a00 : +08002a4c : { - 8002a00: b580 push {r7, lr} - 8002a02: b082 sub sp, #8 - 8002a04: af00 add r7, sp, #0 - 8002a06: 6078 str r0, [r7, #4] + 8002a4c: b580 push {r7, lr} + 8002a4e: b082 sub sp, #8 + 8002a50: af00 add r7, sp, #0 + 8002a52: 6078 str r0, [r7, #4] WRITE_REG(TIMx->SR, ~(TIM_SR_UIF)); - 8002a08: 687b ldr r3, [r7, #4] - 8002a0a: 2202 movs r2, #2 - 8002a0c: 4252 negs r2, r2 - 8002a0e: 611a str r2, [r3, #16] + 8002a54: 687b ldr r3, [r7, #4] + 8002a56: 2202 movs r2, #2 + 8002a58: 4252 negs r2, r2 + 8002a5a: 611a str r2, [r3, #16] } - 8002a10: 46c0 nop ; (mov r8, r8) - 8002a12: 46bd mov sp, r7 - 8002a14: b002 add sp, #8 - 8002a16: bd80 pop {r7, pc} + 8002a5c: 46c0 nop ; (mov r8, r8) + 8002a5e: 46bd mov sp, r7 + 8002a60: b002 add sp, #8 + 8002a62: bd80 pop {r7, pc} -08002a18 : +08002a64 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8002a18: b580 push {r7, lr} - 8002a1a: af00 add r7, sp, #0 + 8002a64: b580 push {r7, lr} + 8002a66: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8002a1c: e7fe b.n 8002a1c + 8002a68: e7fe b.n 8002a68 -08002a1e : +08002a6a : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8002a1e: b580 push {r7, lr} - 8002a20: af00 add r7, sp, #0 + 8002a6a: b580 push {r7, lr} + 8002a6c: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8002a22: e7fe b.n 8002a22 + 8002a6e: e7fe b.n 8002a6e -08002a24 : +08002a70 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8002a24: b580 push {r7, lr} - 8002a26: af00 add r7, sp, #0 + 8002a70: b580 push {r7, lr} + 8002a72: af00 add r7, sp, #0 /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } - 8002a28: 46c0 nop ; (mov r8, r8) - 8002a2a: 46bd mov sp, r7 - 8002a2c: bd80 pop {r7, pc} + 8002a74: 46c0 nop ; (mov r8, r8) + 8002a76: 46bd mov sp, r7 + 8002a78: bd80 pop {r7, pc} -08002a2e : +08002a7a : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8002a2e: b580 push {r7, lr} - 8002a30: af00 add r7, sp, #0 + 8002a7a: b580 push {r7, lr} + 8002a7c: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8002a32: 46c0 nop ; (mov r8, r8) - 8002a34: 46bd mov sp, r7 - 8002a36: bd80 pop {r7, pc} + 8002a7e: 46c0 nop ; (mov r8, r8) + 8002a80: 46bd mov sp, r7 + 8002a82: bd80 pop {r7, pc} -08002a38 : +08002a84 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8002a38: b580 push {r7, lr} - 8002a3a: af00 add r7, sp, #0 + 8002a84: b580 push {r7, lr} + 8002a86: af00 add r7, sp, #0 /* USER CODE END SysTick_IRQn 0 */ /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8002a3c: 46c0 nop ; (mov r8, r8) - 8002a3e: 46bd mov sp, r7 - 8002a40: bd80 pop {r7, pc} + 8002a88: 46c0 nop ; (mov r8, r8) + 8002a8a: 46bd mov sp, r7 + 8002a8c: bd80 pop {r7, pc} ... -08002a44 : +08002a90 : /** * @brief This function handles TIM21 global interrupt. */ void TIM21_IRQHandler(void) { - 8002a44: b580 push {r7, lr} - 8002a46: af00 add r7, sp, #0 + 8002a90: b580 push {r7, lr} + 8002a92: af00 add r7, sp, #0 /* USER CODE BEGIN TIM21_IRQn 0 */ LL_TIM_ClearFlag_UPDATE(TIM21); - 8002a48: 4b04 ldr r3, [pc, #16] ; (8002a5c ) - 8002a4a: 0018 movs r0, r3 - 8002a4c: f7ff ffd8 bl 8002a00 + 8002a94: 4b04 ldr r3, [pc, #16] ; (8002aa8 ) + 8002a96: 0018 movs r0, r3 + 8002a98: f7ff ffd8 bl 8002a4c tim21_elapsed_period = 1; - 8002a50: 4b03 ldr r3, [pc, #12] ; (8002a60 ) - 8002a52: 2201 movs r2, #1 - 8002a54: 701a strb r2, [r3, #0] + 8002a9c: 4b03 ldr r3, [pc, #12] ; (8002aac ) + 8002a9e: 2201 movs r2, #1 + 8002aa0: 701a strb r2, [r3, #0] /* USER CODE END TIM21_IRQn 0 */ /* USER CODE BEGIN TIM21_IRQn 1 */ /* USER CODE END TIM21_IRQn 1 */ } - 8002a56: 46c0 nop ; (mov r8, r8) - 8002a58: 46bd mov sp, r7 - 8002a5a: bd80 pop {r7, pc} - 8002a5c: 40010800 .word 0x40010800 - 8002a60: 20000032 .word 0x20000032 + 8002aa2: 46c0 nop ; (mov r8, r8) + 8002aa4: 46bd mov sp, r7 + 8002aa6: bd80 pop {r7, pc} + 8002aa8: 40010800 .word 0x40010800 + 8002aac: 20000032 .word 0x20000032 -08002a64 : +08002ab0 : /** * @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28. */ void LPUART1_IRQHandler(void) { - 8002a64: b580 push {r7, lr} - 8002a66: af00 add r7, sp, #0 + 8002ab0: b580 push {r7, lr} + 8002ab2: af00 add r7, sp, #0 /* USER CODE BEGIN LPUART1_IRQn 0 */ /* Check RXNE flag value in SR register */ if(LL_LPUART_IsActiveFlag_RXNE(LPUART1) && LL_LPUART_IsEnabledIT_RXNE(LPUART1)) - 8002a68: 4b19 ldr r3, [pc, #100] ; (8002ad0 ) - 8002a6a: 0018 movs r0, r3 - 8002a6c: f7ff ff7c bl 8002968 - 8002a70: 1e03 subs r3, r0, #0 - 8002a72: d007 beq.n 8002a84 - 8002a74: 4b16 ldr r3, [pc, #88] ; (8002ad0 ) - 8002a76: 0018 movs r0, r3 - 8002a78: f7ff ffa3 bl 80029c2 - 8002a7c: 1e03 subs r3, r0, #0 - 8002a7e: d001 beq.n 8002a84 + 8002ab4: 4b19 ldr r3, [pc, #100] ; (8002b1c ) + 8002ab6: 0018 movs r0, r3 + 8002ab8: f7ff ff7c bl 80029b4 + 8002abc: 1e03 subs r3, r0, #0 + 8002abe: d007 beq.n 8002ad0 + 8002ac0: 4b16 ldr r3, [pc, #88] ; (8002b1c ) + 8002ac2: 0018 movs r0, r3 + 8002ac4: f7ff ffa3 bl 8002a0e + 8002ac8: 1e03 subs r3, r0, #0 + 8002aca: d001 beq.n 8002ad0 { /* RXNE flag will be cleared by reading of DR register (done in call) */ /* Call function in charge of handling Character reception */ LPUART1_CharReception_Callback(); - 8002a80: f000 f830 bl 8002ae4 + 8002acc: f000 f830 bl 8002b30 } /* USER CODE END LPUART1_IRQn 0 */ /* USER CODE BEGIN LPUART1_IRQn 1 */ /* If the IDLE flag is active */ if (LL_LPUART_IsActiveFlag_IDLE(LPUART1) && LL_LPUART_IsEnabledIT_IDLE(LPUART1)) - 8002a84: 4b12 ldr r3, [pc, #72] ; (8002ad0 ) - 8002a86: 0018 movs r0, r3 - 8002a88: f7ff ff5d bl 8002946 - 8002a8c: 1e03 subs r3, r0, #0 - 8002a8e: d01c beq.n 8002aca - 8002a90: 4b0f ldr r3, [pc, #60] ; (8002ad0 ) - 8002a92: 0018 movs r0, r3 - 8002a94: f7ff ff84 bl 80029a0 - 8002a98: 1e03 subs r3, r0, #0 - 8002a9a: d016 beq.n 8002aca + 8002ad0: 4b12 ldr r3, [pc, #72] ; (8002b1c ) + 8002ad2: 0018 movs r0, r3 + 8002ad4: f7ff ff5d bl 8002992 + 8002ad8: 1e03 subs r3, r0, #0 + 8002ada: d01c beq.n 8002b16 + 8002adc: 4b0f ldr r3, [pc, #60] ; (8002b1c ) + 8002ade: 0018 movs r0, r3 + 8002ae0: f7ff ff84 bl 80029ec + 8002ae4: 1e03 subs r3, r0, #0 + 8002ae6: d016 beq.n 8002b16 { /* Clear the IDLE flag */ LL_LPUART_ClearFlag_IDLE(LPUART1); - 8002a9c: 4b0c ldr r3, [pc, #48] ; (8002ad0 ) - 8002a9e: 0018 movs r0, r3 - 8002aa0: f7ff ff73 bl 800298a + 8002ae8: 4b0c ldr r3, [pc, #48] ; (8002b1c ) + 8002aea: 0018 movs r0, r3 + 8002aec: f7ff ff73 bl 80029d6 /* Reset the buffer index */ lpuart1_rx_message_len = lpuart1_rx_message_index; - 8002aa4: 4b0b ldr r3, [pc, #44] ; (8002ad4 ) - 8002aa6: 881a ldrh r2, [r3, #0] - 8002aa8: 4b0b ldr r3, [pc, #44] ; (8002ad8 ) - 8002aaa: 801a strh r2, [r3, #0] + 8002af0: 4b0b ldr r3, [pc, #44] ; (8002b20 ) + 8002af2: 881a ldrh r2, [r3, #0] + 8002af4: 4b0b ldr r3, [pc, #44] ; (8002b24 ) + 8002af6: 801a strh r2, [r3, #0] lpuart1_rx_message_index = 0; - 8002aac: 4b09 ldr r3, [pc, #36] ; (8002ad4 ) - 8002aae: 2200 movs r2, #0 - 8002ab0: 801a strh r2, [r3, #0] + 8002af8: 4b09 ldr r3, [pc, #36] ; (8002b20 ) + 8002afa: 2200 movs r2, #0 + 8002afc: 801a strh r2, [r3, #0] lpuart1_rx_done = 1; - 8002ab2: 4b0a ldr r3, [pc, #40] ; (8002adc ) - 8002ab4: 2201 movs r2, #1 - 8002ab6: 701a strb r2, [r3, #0] + 8002afe: 4b0a ldr r3, [pc, #40] ; (8002b28 ) + 8002b00: 2201 movs r2, #1 + 8002b02: 701a strb r2, [r3, #0] if (lpuart1_rx_message_len > MODBUS_MAX_RTU_FRAME_SIZE) - 8002ab8: 4b07 ldr r3, [pc, #28] ; (8002ad8 ) - 8002aba: 881a ldrh r2, [r3, #0] - 8002abc: 2380 movs r3, #128 ; 0x80 - 8002abe: 005b lsls r3, r3, #1 - 8002ac0: 429a cmp r2, r3 - 8002ac2: d902 bls.n 8002aca + 8002b04: 4b07 ldr r3, [pc, #28] ; (8002b24 ) + 8002b06: 881a ldrh r2, [r3, #0] + 8002b08: 2380 movs r3, #128 ; 0x80 + 8002b0a: 005b lsls r3, r3, #1 + 8002b0c: 429a cmp r2, r3 + 8002b0e: d902 bls.n 8002b16 { lpuart1_rx_message_too_long = 1; - 8002ac4: 4b06 ldr r3, [pc, #24] ; (8002ae0 ) - 8002ac6: 2201 movs r2, #1 - 8002ac8: 701a strb r2, [r3, #0] + 8002b10: 4b06 ldr r3, [pc, #24] ; (8002b2c ) + 8002b12: 2201 movs r2, #1 + 8002b14: 701a strb r2, [r3, #0] } } /* USER CODE END LPUART1_IRQn 1 */ } - 8002aca: 46c0 nop ; (mov r8, r8) - 8002acc: 46bd mov sp, r7 - 8002ace: bd80 pop {r7, pc} - 8002ad0: 40004800 .word 0x40004800 - 8002ad4: 2000002c .word 0x2000002c - 8002ad8: 2000002e .word 0x2000002e - 8002adc: 20000030 .word 0x20000030 - 8002ae0: 20000031 .word 0x20000031 + 8002b16: 46c0 nop ; (mov r8, r8) + 8002b18: 46bd mov sp, r7 + 8002b1a: bd80 pop {r7, pc} + 8002b1c: 40004800 .word 0x40004800 + 8002b20: 2000002c .word 0x2000002c + 8002b24: 2000002e .word 0x2000002e + 8002b28: 20000030 .word 0x20000030 + 8002b2c: 20000031 .word 0x20000031 -08002ae4 : +08002b30 : /* USER CODE BEGIN 1 */ void LPUART1_CharReception_Callback( void ) { - 8002ae4: b590 push {r4, r7, lr} - 8002ae6: b083 sub sp, #12 - 8002ae8: af00 add r7, sp, #0 + 8002b30: b590 push {r4, r7, lr} + 8002b32: b083 sub sp, #12 + 8002b34: af00 add r7, sp, #0 uint16_t lpuart1_rx_bit = LL_LPUART_ReceiveData9(LPUART1); - 8002aea: 1dbc adds r4, r7, #6 - 8002aec: 4b0d ldr r3, [pc, #52] ; (8002b24 ) - 8002aee: 0018 movs r0, r3 - 8002af0: f7ff ff78 bl 80029e4 - 8002af4: 0003 movs r3, r0 - 8002af6: 8023 strh r3, [r4, #0] + 8002b36: 1dbc adds r4, r7, #6 + 8002b38: 4b0d ldr r3, [pc, #52] ; (8002b70 ) + 8002b3a: 0018 movs r0, r3 + 8002b3c: f7ff ff78 bl 8002a30 + 8002b40: 0003 movs r3, r0 + 8002b42: 8023 strh r3, [r4, #0] if (lpuart1_rx_message_index < MODBUS_MAX_RTU_FRAME_SIZE) - 8002af8: 4b0b ldr r3, [pc, #44] ; (8002b28 ) - 8002afa: 881b ldrh r3, [r3, #0] - 8002afc: 2bff cmp r3, #255 ; 0xff - 8002afe: d807 bhi.n 8002b10 + 8002b44: 4b0b ldr r3, [pc, #44] ; (8002b74 ) + 8002b46: 881b ldrh r3, [r3, #0] + 8002b48: 2bff cmp r3, #255 ; 0xff + 8002b4a: d807 bhi.n 8002b5c { modbus_buffer[lpuart1_rx_message_index] = (uint8_t)lpuart1_rx_bit; - 8002b00: 4b09 ldr r3, [pc, #36] ; (8002b28 ) - 8002b02: 881b ldrh r3, [r3, #0] - 8002b04: 001a movs r2, r3 - 8002b06: 1dbb adds r3, r7, #6 - 8002b08: 881b ldrh r3, [r3, #0] - 8002b0a: b2d9 uxtb r1, r3 - 8002b0c: 4b07 ldr r3, [pc, #28] ; (8002b2c ) - 8002b0e: 5499 strb r1, [r3, r2] + 8002b4c: 4b09 ldr r3, [pc, #36] ; (8002b74 ) + 8002b4e: 881b ldrh r3, [r3, #0] + 8002b50: 001a movs r2, r3 + 8002b52: 1dbb adds r3, r7, #6 + 8002b54: 881b ldrh r3, [r3, #0] + 8002b56: b2d9 uxtb r1, r3 + 8002b58: 4b07 ldr r3, [pc, #28] ; (8002b78 ) + 8002b5a: 5499 strb r1, [r3, r2] } lpuart1_rx_message_index++; - 8002b10: 4b05 ldr r3, [pc, #20] ; (8002b28 ) - 8002b12: 881b ldrh r3, [r3, #0] - 8002b14: 3301 adds r3, #1 - 8002b16: b29a uxth r2, r3 - 8002b18: 4b03 ldr r3, [pc, #12] ; (8002b28 ) - 8002b1a: 801a strh r2, [r3, #0] + 8002b5c: 4b05 ldr r3, [pc, #20] ; (8002b74 ) + 8002b5e: 881b ldrh r3, [r3, #0] + 8002b60: 3301 adds r3, #1 + 8002b62: b29a uxth r2, r3 + 8002b64: 4b03 ldr r3, [pc, #12] ; (8002b74 ) + 8002b66: 801a strh r2, [r3, #0] } - 8002b1c: 46c0 nop ; (mov r8, r8) - 8002b1e: 46bd mov sp, r7 - 8002b20: b003 add sp, #12 - 8002b22: bd90 pop {r4, r7, pc} - 8002b24: 40004800 .word 0x40004800 - 8002b28: 2000002c .word 0x2000002c - 8002b2c: 2000007c .word 0x2000007c + 8002b68: 46c0 nop ; (mov r8, r8) + 8002b6a: 46bd mov sp, r7 + 8002b6c: b003 add sp, #12 + 8002b6e: bd90 pop {r4, r7, pc} + 8002b70: 40004800 .word 0x40004800 + 8002b74: 2000002c .word 0x2000002c + 8002b78: 2000007c .word 0x2000007c -08002b30 : +08002b7c : * @brief Setup the microcontroller system. * @param None * @retval None */ void SystemInit (void) { - 8002b30: b580 push {r7, lr} - 8002b32: af00 add r7, sp, #0 + 8002b7c: b580 push {r7, lr} + 8002b7e: af00 add r7, sp, #0 /* Configure the Vector Table location add offset address ------------------*/ #if defined (USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8002b34: 46c0 nop ; (mov r8, r8) - 8002b36: 46bd mov sp, r7 - 8002b38: bd80 pop {r7, pc} + 8002b80: 46c0 nop ; (mov r8, r8) + 8002b82: 46bd mov sp, r7 + 8002b84: bd80 pop {r7, pc} ... -08002b3c : +08002b88 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack - 8002b3c: 4813 ldr r0, [pc, #76] ; (8002b8c ) + 8002b88: 4813 ldr r0, [pc, #76] ; (8002bd8 ) mov sp, r0 /* set stack pointer */ - 8002b3e: 4685 mov sp, r0 + 8002b8a: 4685 mov sp, r0 /*Check if boot space corresponds to system memory*/ LDR R0,=0x00000004 - 8002b40: 4813 ldr r0, [pc, #76] ; (8002b90 ) + 8002b8c: 4813 ldr r0, [pc, #76] ; (8002bdc ) LDR R1, [R0] - 8002b42: 6801 ldr r1, [r0, #0] + 8002b8e: 6801 ldr r1, [r0, #0] LSRS R1, R1, #24 - 8002b44: 0e09 lsrs r1, r1, #24 + 8002b90: 0e09 lsrs r1, r1, #24 LDR R2,=0x1F - 8002b46: 4a13 ldr r2, [pc, #76] ; (8002b94 ) + 8002b92: 4a13 ldr r2, [pc, #76] ; (8002be0 ) CMP R1, R2 - 8002b48: 4291 cmp r1, r2 + 8002b94: 4291 cmp r1, r2 BNE ApplicationStart - 8002b4a: d105 bne.n 8002b58 + 8002b96: d105 bne.n 8002ba4 /*SYSCFG clock enable*/ LDR R0,=0x40021034 - 8002b4c: 4812 ldr r0, [pc, #72] ; (8002b98 ) + 8002b98: 4812 ldr r0, [pc, #72] ; (8002be4 ) LDR R1,=0x00000001 - 8002b4e: 4913 ldr r1, [pc, #76] ; (8002b9c ) + 8002b9a: 4913 ldr r1, [pc, #76] ; (8002be8 ) STR R1, [R0] - 8002b50: 6001 str r1, [r0, #0] + 8002b9c: 6001 str r1, [r0, #0] /*Set CFGR1 register with flash memory remap at address 0*/ LDR R0,=0x40010000 - 8002b52: 4813 ldr r0, [pc, #76] ; (8002ba0 ) + 8002b9e: 4813 ldr r0, [pc, #76] ; (8002bec ) LDR R1,=0x00000000 - 8002b54: 4913 ldr r1, [pc, #76] ; (8002ba4 ) + 8002ba0: 4913 ldr r1, [pc, #76] ; (8002bf0 ) STR R1, [R0] - 8002b56: 6001 str r1, [r0, #0] + 8002ba2: 6001 str r1, [r0, #0] -08002b58 : +08002ba4 : ApplicationStart: /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8002b58: 4813 ldr r0, [pc, #76] ; (8002ba8 ) + 8002ba4: 4813 ldr r0, [pc, #76] ; (8002bf4 ) ldr r1, =_edata - 8002b5a: 4914 ldr r1, [pc, #80] ; (8002bac ) + 8002ba6: 4914 ldr r1, [pc, #80] ; (8002bf8 ) ldr r2, =_sidata - 8002b5c: 4a14 ldr r2, [pc, #80] ; (8002bb0 ) + 8002ba8: 4a14 ldr r2, [pc, #80] ; (8002bfc ) movs r3, #0 - 8002b5e: 2300 movs r3, #0 + 8002baa: 2300 movs r3, #0 b LoopCopyDataInit - 8002b60: e002 b.n 8002b68 + 8002bac: e002 b.n 8002bb4 -08002b62 : +08002bae : CopyDataInit: ldr r4, [r2, r3] - 8002b62: 58d4 ldr r4, [r2, r3] + 8002bae: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8002b64: 50c4 str r4, [r0, r3] + 8002bb0: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8002b66: 3304 adds r3, #4 + 8002bb2: 3304 adds r3, #4 -08002b68 : +08002bb4 : LoopCopyDataInit: adds r4, r0, r3 - 8002b68: 18c4 adds r4, r0, r3 + 8002bb4: 18c4 adds r4, r0, r3 cmp r4, r1 - 8002b6a: 428c cmp r4, r1 + 8002bb6: 428c cmp r4, r1 bcc CopyDataInit - 8002b6c: d3f9 bcc.n 8002b62 + 8002bb8: d3f9 bcc.n 8002bae /* Zero fill the bss segment. */ ldr r2, =_sbss - 8002b6e: 4a11 ldr r2, [pc, #68] ; (8002bb4 ) + 8002bba: 4a11 ldr r2, [pc, #68] ; (8002c00 ) ldr r4, =_ebss - 8002b70: 4c11 ldr r4, [pc, #68] ; (8002bb8 ) + 8002bbc: 4c11 ldr r4, [pc, #68] ; (8002c04 ) movs r3, #0 - 8002b72: 2300 movs r3, #0 + 8002bbe: 2300 movs r3, #0 b LoopFillZerobss - 8002b74: e001 b.n 8002b7a + 8002bc0: e001 b.n 8002bc6 -08002b76 : +08002bc2 : FillZerobss: str r3, [r2] - 8002b76: 6013 str r3, [r2, #0] + 8002bc2: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8002b78: 3204 adds r2, #4 + 8002bc4: 3204 adds r2, #4 -08002b7a : +08002bc6 : LoopFillZerobss: cmp r2, r4 - 8002b7a: 42a2 cmp r2, r4 + 8002bc6: 42a2 cmp r2, r4 bcc FillZerobss - 8002b7c: d3fb bcc.n 8002b76 + 8002bc8: d3fb bcc.n 8002bc2 /* Call the clock system intitialization function.*/ bl SystemInit - 8002b7e: f7ff ffd7 bl 8002b30 + 8002bca: f7ff ffd7 bl 8002b7c /* Call static constructors */ bl __libc_init_array - 8002b82: f000 fd21 bl 80035c8 <__libc_init_array> + 8002bce: f000 fd21 bl 8003614 <__libc_init_array> /* Call the application's entry point.*/ bl main - 8002b86: f7fe fb91 bl 80012ac
+ 8002bd2: f7fe fb81 bl 80012d8
-08002b8a : +08002bd6 : LoopForever: b LoopForever - 8002b8a: e7fe b.n 8002b8a + 8002bd6: e7fe b.n 8002bd6 ldr r0, =_estack - 8002b8c: 20000800 .word 0x20000800 + 8002bd8: 20000800 .word 0x20000800 LDR R0,=0x00000004 - 8002b90: 00000004 .word 0x00000004 + 8002bdc: 00000004 .word 0x00000004 LDR R2,=0x1F - 8002b94: 0000001f .word 0x0000001f + 8002be0: 0000001f .word 0x0000001f LDR R0,=0x40021034 - 8002b98: 40021034 .word 0x40021034 + 8002be4: 40021034 .word 0x40021034 LDR R1,=0x00000001 - 8002b9c: 00000001 .word 0x00000001 + 8002be8: 00000001 .word 0x00000001 LDR R0,=0x40010000 - 8002ba0: 40010000 .word 0x40010000 + 8002bec: 40010000 .word 0x40010000 LDR R1,=0x00000000 - 8002ba4: 00000000 .word 0x00000000 + 8002bf0: 00000000 .word 0x00000000 ldr r0, =_sdata - 8002ba8: 20000000 .word 0x20000000 + 8002bf4: 20000000 .word 0x20000000 ldr r1, =_edata - 8002bac: 20000008 .word 0x20000008 + 8002bf8: 20000008 .word 0x20000008 ldr r2, =_sidata - 8002bb0: 08003754 .word 0x08003754 + 8002bfc: 080037a0 .word 0x080037a0 ldr r2, =_sbss - 8002bb4: 20000008 .word 0x20000008 + 8002c00: 20000008 .word 0x20000008 ldr r4, =_ebss - 8002bb8: 2000017c .word 0x2000017c + 8002c04: 2000017c .word 0x2000017c -08002bbc : +08002c08 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8002bbc: e7fe b.n 8002bbc + 8002c08: e7fe b.n 8002c08 -08002bbe : +08002c0a : { - 8002bbe: b580 push {r7, lr} - 8002bc0: b084 sub sp, #16 - 8002bc2: af00 add r7, sp, #0 - 8002bc4: 60f8 str r0, [r7, #12] - 8002bc6: 60b9 str r1, [r7, #8] - 8002bc8: 607a str r2, [r7, #4] + 8002c0a: b580 push {r7, lr} + 8002c0c: b084 sub sp, #16 + 8002c0e: af00 add r7, sp, #0 + 8002c10: 60f8 str r0, [r7, #12] + 8002c12: 60b9 str r1, [r7, #8] + 8002c14: 607a str r2, [r7, #4] MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODE0), ((Pin * Pin) * Mode)); - 8002bca: 68fb ldr r3, [r7, #12] - 8002bcc: 6819 ldr r1, [r3, #0] - 8002bce: 68bb ldr r3, [r7, #8] - 8002bd0: 435b muls r3, r3 - 8002bd2: 001a movs r2, r3 - 8002bd4: 0013 movs r3, r2 - 8002bd6: 005b lsls r3, r3, #1 - 8002bd8: 189b adds r3, r3, r2 - 8002bda: 43db mvns r3, r3 - 8002bdc: 400b ands r3, r1 - 8002bde: 001a movs r2, r3 - 8002be0: 68bb ldr r3, [r7, #8] - 8002be2: 435b muls r3, r3 - 8002be4: 6879 ldr r1, [r7, #4] - 8002be6: 434b muls r3, r1 - 8002be8: 431a orrs r2, r3 - 8002bea: 68fb ldr r3, [r7, #12] - 8002bec: 601a str r2, [r3, #0] + 8002c16: 68fb ldr r3, [r7, #12] + 8002c18: 6819 ldr r1, [r3, #0] + 8002c1a: 68bb ldr r3, [r7, #8] + 8002c1c: 435b muls r3, r3 + 8002c1e: 001a movs r2, r3 + 8002c20: 0013 movs r3, r2 + 8002c22: 005b lsls r3, r3, #1 + 8002c24: 189b adds r3, r3, r2 + 8002c26: 43db mvns r3, r3 + 8002c28: 400b ands r3, r1 + 8002c2a: 001a movs r2, r3 + 8002c2c: 68bb ldr r3, [r7, #8] + 8002c2e: 435b muls r3, r3 + 8002c30: 6879 ldr r1, [r7, #4] + 8002c32: 434b muls r3, r1 + 8002c34: 431a orrs r2, r3 + 8002c36: 68fb ldr r3, [r7, #12] + 8002c38: 601a str r2, [r3, #0] } - 8002bee: 46c0 nop ; (mov r8, r8) - 8002bf0: 46bd mov sp, r7 - 8002bf2: b004 add sp, #16 - 8002bf4: bd80 pop {r7, pc} + 8002c3a: 46c0 nop ; (mov r8, r8) + 8002c3c: 46bd mov sp, r7 + 8002c3e: b004 add sp, #16 + 8002c40: bd80 pop {r7, pc} -08002bf6 : +08002c42 : { - 8002bf6: b580 push {r7, lr} - 8002bf8: b084 sub sp, #16 - 8002bfa: af00 add r7, sp, #0 - 8002bfc: 60f8 str r0, [r7, #12] - 8002bfe: 60b9 str r1, [r7, #8] - 8002c00: 607a str r2, [r7, #4] + 8002c42: b580 push {r7, lr} + 8002c44: b084 sub sp, #16 + 8002c46: af00 add r7, sp, #0 + 8002c48: 60f8 str r0, [r7, #12] + 8002c4a: 60b9 str r1, [r7, #8] + 8002c4c: 607a str r2, [r7, #4] MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType)); - 8002c02: 68fb ldr r3, [r7, #12] - 8002c04: 685b ldr r3, [r3, #4] - 8002c06: 68ba ldr r2, [r7, #8] - 8002c08: 43d2 mvns r2, r2 - 8002c0a: 401a ands r2, r3 - 8002c0c: 68bb ldr r3, [r7, #8] - 8002c0e: 6879 ldr r1, [r7, #4] - 8002c10: 434b muls r3, r1 - 8002c12: 431a orrs r2, r3 - 8002c14: 68fb ldr r3, [r7, #12] - 8002c16: 605a str r2, [r3, #4] + 8002c4e: 68fb ldr r3, [r7, #12] + 8002c50: 685b ldr r3, [r3, #4] + 8002c52: 68ba ldr r2, [r7, #8] + 8002c54: 43d2 mvns r2, r2 + 8002c56: 401a ands r2, r3 + 8002c58: 68bb ldr r3, [r7, #8] + 8002c5a: 6879 ldr r1, [r7, #4] + 8002c5c: 434b muls r3, r1 + 8002c5e: 431a orrs r2, r3 + 8002c60: 68fb ldr r3, [r7, #12] + 8002c62: 605a str r2, [r3, #4] } - 8002c18: 46c0 nop ; (mov r8, r8) - 8002c1a: 46bd mov sp, r7 - 8002c1c: b004 add sp, #16 - 8002c1e: bd80 pop {r7, pc} + 8002c64: 46c0 nop ; (mov r8, r8) + 8002c66: 46bd mov sp, r7 + 8002c68: b004 add sp, #16 + 8002c6a: bd80 pop {r7, pc} -08002c20 : +08002c6c : { - 8002c20: b580 push {r7, lr} - 8002c22: b084 sub sp, #16 - 8002c24: af00 add r7, sp, #0 - 8002c26: 60f8 str r0, [r7, #12] - 8002c28: 60b9 str r1, [r7, #8] - 8002c2a: 607a str r2, [r7, #4] + 8002c6c: b580 push {r7, lr} + 8002c6e: b084 sub sp, #16 + 8002c70: af00 add r7, sp, #0 + 8002c72: 60f8 str r0, [r7, #12] + 8002c74: 60b9 str r1, [r7, #8] + 8002c76: 607a str r2, [r7, #4] MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDER_OSPEED0), ((Pin * Pin) * Speed)); - 8002c2c: 68fb ldr r3, [r7, #12] - 8002c2e: 6899 ldr r1, [r3, #8] - 8002c30: 68bb ldr r3, [r7, #8] - 8002c32: 435b muls r3, r3 - 8002c34: 001a movs r2, r3 - 8002c36: 0013 movs r3, r2 - 8002c38: 005b lsls r3, r3, #1 - 8002c3a: 189b adds r3, r3, r2 - 8002c3c: 43db mvns r3, r3 - 8002c3e: 400b ands r3, r1 - 8002c40: 001a movs r2, r3 - 8002c42: 68bb ldr r3, [r7, #8] - 8002c44: 435b muls r3, r3 - 8002c46: 6879 ldr r1, [r7, #4] - 8002c48: 434b muls r3, r1 - 8002c4a: 431a orrs r2, r3 - 8002c4c: 68fb ldr r3, [r7, #12] - 8002c4e: 609a str r2, [r3, #8] + 8002c78: 68fb ldr r3, [r7, #12] + 8002c7a: 6899 ldr r1, [r3, #8] + 8002c7c: 68bb ldr r3, [r7, #8] + 8002c7e: 435b muls r3, r3 + 8002c80: 001a movs r2, r3 + 8002c82: 0013 movs r3, r2 + 8002c84: 005b lsls r3, r3, #1 + 8002c86: 189b adds r3, r3, r2 + 8002c88: 43db mvns r3, r3 + 8002c8a: 400b ands r3, r1 + 8002c8c: 001a movs r2, r3 + 8002c8e: 68bb ldr r3, [r7, #8] + 8002c90: 435b muls r3, r3 + 8002c92: 6879 ldr r1, [r7, #4] + 8002c94: 434b muls r3, r1 + 8002c96: 431a orrs r2, r3 + 8002c98: 68fb ldr r3, [r7, #12] + 8002c9a: 609a str r2, [r3, #8] } - 8002c50: 46c0 nop ; (mov r8, r8) - 8002c52: 46bd mov sp, r7 - 8002c54: b004 add sp, #16 - 8002c56: bd80 pop {r7, pc} + 8002c9c: 46c0 nop ; (mov r8, r8) + 8002c9e: 46bd mov sp, r7 + 8002ca0: b004 add sp, #16 + 8002ca2: bd80 pop {r7, pc} -08002c58 : +08002ca4 : { - 8002c58: b580 push {r7, lr} - 8002c5a: b084 sub sp, #16 - 8002c5c: af00 add r7, sp, #0 - 8002c5e: 60f8 str r0, [r7, #12] - 8002c60: 60b9 str r1, [r7, #8] - 8002c62: 607a str r2, [r7, #4] + 8002ca4: b580 push {r7, lr} + 8002ca6: b084 sub sp, #16 + 8002ca8: af00 add r7, sp, #0 + 8002caa: 60f8 str r0, [r7, #12] + 8002cac: 60b9 str r1, [r7, #8] + 8002cae: 607a str r2, [r7, #4] MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPD0), ((Pin * Pin) * Pull)); - 8002c64: 68fb ldr r3, [r7, #12] - 8002c66: 68d9 ldr r1, [r3, #12] - 8002c68: 68bb ldr r3, [r7, #8] - 8002c6a: 435b muls r3, r3 - 8002c6c: 001a movs r2, r3 - 8002c6e: 0013 movs r3, r2 - 8002c70: 005b lsls r3, r3, #1 - 8002c72: 189b adds r3, r3, r2 - 8002c74: 43db mvns r3, r3 - 8002c76: 400b ands r3, r1 - 8002c78: 001a movs r2, r3 - 8002c7a: 68bb ldr r3, [r7, #8] - 8002c7c: 435b muls r3, r3 - 8002c7e: 6879 ldr r1, [r7, #4] - 8002c80: 434b muls r3, r1 - 8002c82: 431a orrs r2, r3 - 8002c84: 68fb ldr r3, [r7, #12] - 8002c86: 60da str r2, [r3, #12] + 8002cb0: 68fb ldr r3, [r7, #12] + 8002cb2: 68d9 ldr r1, [r3, #12] + 8002cb4: 68bb ldr r3, [r7, #8] + 8002cb6: 435b muls r3, r3 + 8002cb8: 001a movs r2, r3 + 8002cba: 0013 movs r3, r2 + 8002cbc: 005b lsls r3, r3, #1 + 8002cbe: 189b adds r3, r3, r2 + 8002cc0: 43db mvns r3, r3 + 8002cc2: 400b ands r3, r1 + 8002cc4: 001a movs r2, r3 + 8002cc6: 68bb ldr r3, [r7, #8] + 8002cc8: 435b muls r3, r3 + 8002cca: 6879 ldr r1, [r7, #4] + 8002ccc: 434b muls r3, r1 + 8002cce: 431a orrs r2, r3 + 8002cd0: 68fb ldr r3, [r7, #12] + 8002cd2: 60da str r2, [r3, #12] } - 8002c88: 46c0 nop ; (mov r8, r8) - 8002c8a: 46bd mov sp, r7 - 8002c8c: b004 add sp, #16 - 8002c8e: bd80 pop {r7, pc} + 8002cd4: 46c0 nop ; (mov r8, r8) + 8002cd6: 46bd mov sp, r7 + 8002cd8: b004 add sp, #16 + 8002cda: bd80 pop {r7, pc} -08002c90 : +08002cdc : { - 8002c90: b580 push {r7, lr} - 8002c92: b084 sub sp, #16 - 8002c94: af00 add r7, sp, #0 - 8002c96: 60f8 str r0, [r7, #12] - 8002c98: 60b9 str r1, [r7, #8] - 8002c9a: 607a str r2, [r7, #4] + 8002cdc: b580 push {r7, lr} + 8002cde: b084 sub sp, #16 + 8002ce0: af00 add r7, sp, #0 + 8002ce2: 60f8 str r0, [r7, #12] + 8002ce4: 60b9 str r1, [r7, #8] + 8002ce6: 607a str r2, [r7, #4] MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0), - 8002c9c: 68fb ldr r3, [r7, #12] - 8002c9e: 6a19 ldr r1, [r3, #32] - 8002ca0: 68bb ldr r3, [r7, #8] - 8002ca2: 435b muls r3, r3 - 8002ca4: 68ba ldr r2, [r7, #8] - 8002ca6: 4353 muls r3, r2 - 8002ca8: 68ba ldr r2, [r7, #8] - 8002caa: 435a muls r2, r3 - 8002cac: 0013 movs r3, r2 - 8002cae: 011b lsls r3, r3, #4 - 8002cb0: 1a9b subs r3, r3, r2 - 8002cb2: 43db mvns r3, r3 - 8002cb4: 400b ands r3, r1 - 8002cb6: 001a movs r2, r3 - 8002cb8: 68bb ldr r3, [r7, #8] - 8002cba: 435b muls r3, r3 - 8002cbc: 68b9 ldr r1, [r7, #8] - 8002cbe: 434b muls r3, r1 - 8002cc0: 68b9 ldr r1, [r7, #8] - 8002cc2: 434b muls r3, r1 - 8002cc4: 6879 ldr r1, [r7, #4] - 8002cc6: 434b muls r3, r1 - 8002cc8: 431a orrs r2, r3 - 8002cca: 68fb ldr r3, [r7, #12] - 8002ccc: 621a str r2, [r3, #32] -} - 8002cce: 46c0 nop ; (mov r8, r8) - 8002cd0: 46bd mov sp, r7 - 8002cd2: b004 add sp, #16 - 8002cd4: bd80 pop {r7, pc} - -08002cd6 : -{ - 8002cd6: b580 push {r7, lr} - 8002cd8: b084 sub sp, #16 - 8002cda: af00 add r7, sp, #0 - 8002cdc: 60f8 str r0, [r7, #12] - 8002cde: 60b9 str r1, [r7, #8] - 8002ce0: 607a str r2, [r7, #4] - MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8), - 8002ce2: 68fb ldr r3, [r7, #12] - 8002ce4: 6a59 ldr r1, [r3, #36] ; 0x24 - 8002ce6: 68bb ldr r3, [r7, #8] - 8002ce8: 0a1b lsrs r3, r3, #8 - 8002cea: 68ba ldr r2, [r7, #8] - 8002cec: 0a12 lsrs r2, r2, #8 - 8002cee: 4353 muls r3, r2 + 8002ce8: 68fb ldr r3, [r7, #12] + 8002cea: 6a19 ldr r1, [r3, #32] + 8002cec: 68bb ldr r3, [r7, #8] + 8002cee: 435b muls r3, r3 8002cf0: 68ba ldr r2, [r7, #8] - 8002cf2: 0a12 lsrs r2, r2, #8 - 8002cf4: 4353 muls r3, r2 - 8002cf6: 68ba ldr r2, [r7, #8] - 8002cf8: 0a12 lsrs r2, r2, #8 - 8002cfa: 435a muls r2, r3 - 8002cfc: 0013 movs r3, r2 - 8002cfe: 011b lsls r3, r3, #4 - 8002d00: 1a9b subs r3, r3, r2 - 8002d02: 43db mvns r3, r3 - 8002d04: 400b ands r3, r1 - 8002d06: 001a movs r2, r3 - 8002d08: 68bb ldr r3, [r7, #8] - 8002d0a: 0a1b lsrs r3, r3, #8 + 8002cf2: 4353 muls r3, r2 + 8002cf4: 68ba ldr r2, [r7, #8] + 8002cf6: 435a muls r2, r3 + 8002cf8: 0013 movs r3, r2 + 8002cfa: 011b lsls r3, r3, #4 + 8002cfc: 1a9b subs r3, r3, r2 + 8002cfe: 43db mvns r3, r3 + 8002d00: 400b ands r3, r1 + 8002d02: 001a movs r2, r3 + 8002d04: 68bb ldr r3, [r7, #8] + 8002d06: 435b muls r3, r3 + 8002d08: 68b9 ldr r1, [r7, #8] + 8002d0a: 434b muls r3, r1 8002d0c: 68b9 ldr r1, [r7, #8] - 8002d0e: 0a09 lsrs r1, r1, #8 - 8002d10: 434b muls r3, r1 - 8002d12: 68b9 ldr r1, [r7, #8] - 8002d14: 0a09 lsrs r1, r1, #8 - 8002d16: 434b muls r3, r1 - 8002d18: 68b9 ldr r1, [r7, #8] - 8002d1a: 0a09 lsrs r1, r1, #8 - 8002d1c: 434b muls r3, r1 - 8002d1e: 6879 ldr r1, [r7, #4] - 8002d20: 434b muls r3, r1 - 8002d22: 431a orrs r2, r3 - 8002d24: 68fb ldr r3, [r7, #12] - 8002d26: 625a str r2, [r3, #36] ; 0x24 + 8002d0e: 434b muls r3, r1 + 8002d10: 6879 ldr r1, [r7, #4] + 8002d12: 434b muls r3, r1 + 8002d14: 431a orrs r2, r3 + 8002d16: 68fb ldr r3, [r7, #12] + 8002d18: 621a str r2, [r3, #32] } - 8002d28: 46c0 nop ; (mov r8, r8) - 8002d2a: 46bd mov sp, r7 - 8002d2c: b004 add sp, #16 - 8002d2e: bd80 pop {r7, pc} + 8002d1a: 46c0 nop ; (mov r8, r8) + 8002d1c: 46bd mov sp, r7 + 8002d1e: b004 add sp, #16 + 8002d20: bd80 pop {r7, pc} -08002d30 : +08002d22 : +{ + 8002d22: b580 push {r7, lr} + 8002d24: b084 sub sp, #16 + 8002d26: af00 add r7, sp, #0 + 8002d28: 60f8 str r0, [r7, #12] + 8002d2a: 60b9 str r1, [r7, #8] + 8002d2c: 607a str r2, [r7, #4] + MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8), + 8002d2e: 68fb ldr r3, [r7, #12] + 8002d30: 6a59 ldr r1, [r3, #36] ; 0x24 + 8002d32: 68bb ldr r3, [r7, #8] + 8002d34: 0a1b lsrs r3, r3, #8 + 8002d36: 68ba ldr r2, [r7, #8] + 8002d38: 0a12 lsrs r2, r2, #8 + 8002d3a: 4353 muls r3, r2 + 8002d3c: 68ba ldr r2, [r7, #8] + 8002d3e: 0a12 lsrs r2, r2, #8 + 8002d40: 4353 muls r3, r2 + 8002d42: 68ba ldr r2, [r7, #8] + 8002d44: 0a12 lsrs r2, r2, #8 + 8002d46: 435a muls r2, r3 + 8002d48: 0013 movs r3, r2 + 8002d4a: 011b lsls r3, r3, #4 + 8002d4c: 1a9b subs r3, r3, r2 + 8002d4e: 43db mvns r3, r3 + 8002d50: 400b ands r3, r1 + 8002d52: 001a movs r2, r3 + 8002d54: 68bb ldr r3, [r7, #8] + 8002d56: 0a1b lsrs r3, r3, #8 + 8002d58: 68b9 ldr r1, [r7, #8] + 8002d5a: 0a09 lsrs r1, r1, #8 + 8002d5c: 434b muls r3, r1 + 8002d5e: 68b9 ldr r1, [r7, #8] + 8002d60: 0a09 lsrs r1, r1, #8 + 8002d62: 434b muls r3, r1 + 8002d64: 68b9 ldr r1, [r7, #8] + 8002d66: 0a09 lsrs r1, r1, #8 + 8002d68: 434b muls r3, r1 + 8002d6a: 6879 ldr r1, [r7, #4] + 8002d6c: 434b muls r3, r1 + 8002d6e: 431a orrs r2, r3 + 8002d70: 68fb ldr r3, [r7, #12] + 8002d72: 625a str r2, [r3, #36] ; 0x24 +} + 8002d74: 46c0 nop ; (mov r8, r8) + 8002d76: 46bd mov sp, r7 + 8002d78: b004 add sp, #16 + 8002d7a: bd80 pop {r7, pc} + +08002d7c : * @retval An ErrorStatus enumeration value: * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content * - ERROR: Not applicable */ ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) { - 8002d30: b580 push {r7, lr} - 8002d32: b084 sub sp, #16 - 8002d34: af00 add r7, sp, #0 - 8002d36: 6078 str r0, [r7, #4] - 8002d38: 6039 str r1, [r7, #0] + 8002d7c: b580 push {r7, lr} + 8002d7e: b084 sub sp, #16 + 8002d80: af00 add r7, sp, #0 + 8002d82: 6078 str r0, [r7, #4] + 8002d84: 6039 str r1, [r7, #0] uint32_t pinpos = 0x00000000U; - 8002d3a: 2300 movs r3, #0 - 8002d3c: 60fb str r3, [r7, #12] + 8002d86: 2300 movs r3, #0 + 8002d88: 60fb str r3, [r7, #12] uint32_t currentpin = 0x00000000U; - 8002d3e: 2300 movs r3, #0 - 8002d40: 60bb str r3, [r7, #8] + 8002d8a: 2300 movs r3, #0 + 8002d8c: 60bb str r3, [r7, #8] /* ------------------------- Configure the port pins ---------------- */ /* Initialize pinpos on first pin set */ /* pinpos = 0; useless as already done in default initialization */ /* Configure the port pins */ while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U) - 8002d42: e048 b.n 8002dd6 + 8002d8e: e048 b.n 8002e22 { /* Get current io position */ currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos); - 8002d44: 683b ldr r3, [r7, #0] - 8002d46: 681b ldr r3, [r3, #0] - 8002d48: 2101 movs r1, #1 - 8002d4a: 68fa ldr r2, [r7, #12] - 8002d4c: 4091 lsls r1, r2 - 8002d4e: 000a movs r2, r1 - 8002d50: 4013 ands r3, r2 - 8002d52: 60bb str r3, [r7, #8] + 8002d90: 683b ldr r3, [r7, #0] + 8002d92: 681b ldr r3, [r3, #0] + 8002d94: 2101 movs r1, #1 + 8002d96: 68fa ldr r2, [r7, #12] + 8002d98: 4091 lsls r1, r2 + 8002d9a: 000a movs r2, r1 + 8002d9c: 4013 ands r3, r2 + 8002d9e: 60bb str r3, [r7, #8] if (currentpin) - 8002d54: 68bb ldr r3, [r7, #8] - 8002d56: 2b00 cmp r3, #0 - 8002d58: d03a beq.n 8002dd0 + 8002da0: 68bb ldr r3, [r7, #8] + 8002da2: 2b00 cmp r3, #0 + 8002da4: d03a beq.n 8002e1c { if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) - 8002d5a: 683b ldr r3, [r7, #0] - 8002d5c: 685b ldr r3, [r3, #4] - 8002d5e: 2b01 cmp r3, #1 - 8002d60: d003 beq.n 8002d6a - 8002d62: 683b ldr r3, [r7, #0] - 8002d64: 685b ldr r3, [r3, #4] - 8002d66: 2b02 cmp r3, #2 - 8002d68: d10e bne.n 8002d88 + 8002da6: 683b ldr r3, [r7, #0] + 8002da8: 685b ldr r3, [r3, #4] + 8002daa: 2b01 cmp r3, #1 + 8002dac: d003 beq.n 8002db6 + 8002dae: 683b ldr r3, [r7, #0] + 8002db0: 685b ldr r3, [r3, #4] + 8002db2: 2b02 cmp r3, #2 + 8002db4: d10e bne.n 8002dd4 { /* Check Speed mode parameters */ assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); /* Speed mode configuration */ LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); - 8002d6a: 683b ldr r3, [r7, #0] - 8002d6c: 689a ldr r2, [r3, #8] - 8002d6e: 68b9 ldr r1, [r7, #8] - 8002d70: 687b ldr r3, [r7, #4] - 8002d72: 0018 movs r0, r3 - 8002d74: f7ff ff54 bl 8002c20 + 8002db6: 683b ldr r3, [r7, #0] + 8002db8: 689a ldr r2, [r3, #8] + 8002dba: 68b9 ldr r1, [r7, #8] + 8002dbc: 687b ldr r3, [r7, #4] + 8002dbe: 0018 movs r0, r3 + 8002dc0: f7ff ff54 bl 8002c6c /* Check Output mode parameters */ assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); /* Output mode configuration*/ LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); - 8002d78: 683b ldr r3, [r7, #0] - 8002d7a: 6819 ldr r1, [r3, #0] - 8002d7c: 683b ldr r3, [r7, #0] - 8002d7e: 68da ldr r2, [r3, #12] - 8002d80: 687b ldr r3, [r7, #4] - 8002d82: 0018 movs r0, r3 - 8002d84: f7ff ff37 bl 8002bf6 + 8002dc4: 683b ldr r3, [r7, #0] + 8002dc6: 6819 ldr r1, [r3, #0] + 8002dc8: 683b ldr r3, [r7, #0] + 8002dca: 68da ldr r2, [r3, #12] + 8002dcc: 687b ldr r3, [r7, #4] + 8002dce: 0018 movs r0, r3 + 8002dd0: f7ff ff37 bl 8002c42 } /* Pull-up Pull down resistor configuration*/ LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); - 8002d88: 683b ldr r3, [r7, #0] - 8002d8a: 691a ldr r2, [r3, #16] - 8002d8c: 68b9 ldr r1, [r7, #8] - 8002d8e: 687b ldr r3, [r7, #4] - 8002d90: 0018 movs r0, r3 - 8002d92: f7ff ff61 bl 8002c58 + 8002dd4: 683b ldr r3, [r7, #0] + 8002dd6: 691a ldr r2, [r3, #16] + 8002dd8: 68b9 ldr r1, [r7, #8] + 8002dda: 687b ldr r3, [r7, #4] + 8002ddc: 0018 movs r0, r3 + 8002dde: f7ff ff61 bl 8002ca4 if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE) - 8002d96: 683b ldr r3, [r7, #0] - 8002d98: 685b ldr r3, [r3, #4] - 8002d9a: 2b02 cmp r3, #2 - 8002d9c: d111 bne.n 8002dc2 + 8002de2: 683b ldr r3, [r7, #0] + 8002de4: 685b ldr r3, [r3, #4] + 8002de6: 2b02 cmp r3, #2 + 8002de8: d111 bne.n 8002e0e { /* Check Alternate parameter */ assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate)); /* Speed mode configuration */ if (currentpin < LL_GPIO_PIN_8) - 8002d9e: 68bb ldr r3, [r7, #8] - 8002da0: 2bff cmp r3, #255 ; 0xff - 8002da2: d807 bhi.n 8002db4 + 8002dea: 68bb ldr r3, [r7, #8] + 8002dec: 2bff cmp r3, #255 ; 0xff + 8002dee: d807 bhi.n 8002e00 { LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate); - 8002da4: 683b ldr r3, [r7, #0] - 8002da6: 695a ldr r2, [r3, #20] - 8002da8: 68b9 ldr r1, [r7, #8] - 8002daa: 687b ldr r3, [r7, #4] - 8002dac: 0018 movs r0, r3 - 8002dae: f7ff ff6f bl 8002c90 - 8002db2: e006 b.n 8002dc2 + 8002df0: 683b ldr r3, [r7, #0] + 8002df2: 695a ldr r2, [r3, #20] + 8002df4: 68b9 ldr r1, [r7, #8] + 8002df6: 687b ldr r3, [r7, #4] + 8002df8: 0018 movs r0, r3 + 8002dfa: f7ff ff6f bl 8002cdc + 8002dfe: e006 b.n 8002e0e } else { LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); - 8002db4: 683b ldr r3, [r7, #0] - 8002db6: 695a ldr r2, [r3, #20] - 8002db8: 68b9 ldr r1, [r7, #8] - 8002dba: 687b ldr r3, [r7, #4] - 8002dbc: 0018 movs r0, r3 - 8002dbe: f7ff ff8a bl 8002cd6 + 8002e00: 683b ldr r3, [r7, #0] + 8002e02: 695a ldr r2, [r3, #20] + 8002e04: 68b9 ldr r1, [r7, #8] + 8002e06: 687b ldr r3, [r7, #4] + 8002e08: 0018 movs r0, r3 + 8002e0a: f7ff ff8a bl 8002d22 } } /* Pin Mode configuration */ LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); - 8002dc2: 683b ldr r3, [r7, #0] - 8002dc4: 685a ldr r2, [r3, #4] - 8002dc6: 68b9 ldr r1, [r7, #8] - 8002dc8: 687b ldr r3, [r7, #4] - 8002dca: 0018 movs r0, r3 - 8002dcc: f7ff fef7 bl 8002bbe + 8002e0e: 683b ldr r3, [r7, #0] + 8002e10: 685a ldr r2, [r3, #4] + 8002e12: 68b9 ldr r1, [r7, #8] + 8002e14: 687b ldr r3, [r7, #4] + 8002e16: 0018 movs r0, r3 + 8002e18: f7ff fef7 bl 8002c0a } pinpos++; - 8002dd0: 68fb ldr r3, [r7, #12] - 8002dd2: 3301 adds r3, #1 - 8002dd4: 60fb str r3, [r7, #12] + 8002e1c: 68fb ldr r3, [r7, #12] + 8002e1e: 3301 adds r3, #1 + 8002e20: 60fb str r3, [r7, #12] while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U) - 8002dd6: 683b ldr r3, [r7, #0] - 8002dd8: 681a ldr r2, [r3, #0] - 8002dda: 68fb ldr r3, [r7, #12] - 8002ddc: 40da lsrs r2, r3 - 8002dde: 1e13 subs r3, r2, #0 - 8002de0: d1b0 bne.n 8002d44 + 8002e22: 683b ldr r3, [r7, #0] + 8002e24: 681a ldr r2, [r3, #0] + 8002e26: 68fb ldr r3, [r7, #12] + 8002e28: 40da lsrs r2, r3 + 8002e2a: 1e13 subs r3, r2, #0 + 8002e2c: d1b0 bne.n 8002d90 } return (SUCCESS); - 8002de2: 2300 movs r3, #0 + 8002e2e: 2300 movs r3, #0 } - 8002de4: 0018 movs r0, r3 - 8002de6: 46bd mov sp, r7 - 8002de8: b004 add sp, #16 - 8002dea: bd80 pop {r7, pc} + 8002e30: 0018 movs r0, r3 + 8002e32: 46bd mov sp, r7 + 8002e34: b004 add sp, #16 + 8002e36: bd80 pop {r7, pc} -08002dec : +08002e38 : { - 8002dec: b580 push {r7, lr} - 8002dee: b082 sub sp, #8 - 8002df0: af00 add r7, sp, #0 - 8002df2: 6078 str r0, [r7, #4] + 8002e38: b580 push {r7, lr} + 8002e3a: b082 sub sp, #8 + 8002e3c: af00 add r7, sp, #0 + 8002e3e: 6078 str r0, [r7, #4] SET_BIT(I2Cx->CR1, I2C_CR1_PE); - 8002df4: 687b ldr r3, [r7, #4] - 8002df6: 681b ldr r3, [r3, #0] - 8002df8: 2201 movs r2, #1 - 8002dfa: 431a orrs r2, r3 - 8002dfc: 687b ldr r3, [r7, #4] - 8002dfe: 601a str r2, [r3, #0] + 8002e40: 687b ldr r3, [r7, #4] + 8002e42: 681b ldr r3, [r3, #0] + 8002e44: 2201 movs r2, #1 + 8002e46: 431a orrs r2, r3 + 8002e48: 687b ldr r3, [r7, #4] + 8002e4a: 601a str r2, [r3, #0] } - 8002e00: 46c0 nop ; (mov r8, r8) - 8002e02: 46bd mov sp, r7 - 8002e04: b002 add sp, #8 - 8002e06: bd80 pop {r7, pc} + 8002e4c: 46c0 nop ; (mov r8, r8) + 8002e4e: 46bd mov sp, r7 + 8002e50: b002 add sp, #8 + 8002e52: bd80 pop {r7, pc} -08002e08 : +08002e54 : { - 8002e08: b580 push {r7, lr} - 8002e0a: b082 sub sp, #8 - 8002e0c: af00 add r7, sp, #0 - 8002e0e: 6078 str r0, [r7, #4] + 8002e54: b580 push {r7, lr} + 8002e56: b082 sub sp, #8 + 8002e58: af00 add r7, sp, #0 + 8002e5a: 6078 str r0, [r7, #4] CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE); - 8002e10: 687b ldr r3, [r7, #4] - 8002e12: 681b ldr r3, [r3, #0] - 8002e14: 2201 movs r2, #1 - 8002e16: 4393 bics r3, r2 - 8002e18: 001a movs r2, r3 - 8002e1a: 687b ldr r3, [r7, #4] - 8002e1c: 601a str r2, [r3, #0] + 8002e5c: 687b ldr r3, [r7, #4] + 8002e5e: 681b ldr r3, [r3, #0] + 8002e60: 2201 movs r2, #1 + 8002e62: 4393 bics r3, r2 + 8002e64: 001a movs r2, r3 + 8002e66: 687b ldr r3, [r7, #4] + 8002e68: 601a str r2, [r3, #0] } - 8002e1e: 46c0 nop ; (mov r8, r8) - 8002e20: 46bd mov sp, r7 - 8002e22: b002 add sp, #8 - 8002e24: bd80 pop {r7, pc} + 8002e6a: 46c0 nop ; (mov r8, r8) + 8002e6c: 46bd mov sp, r7 + 8002e6e: b002 add sp, #8 + 8002e70: bd80 pop {r7, pc} ... -08002e28 : +08002e74 : { - 8002e28: b580 push {r7, lr} - 8002e2a: b084 sub sp, #16 - 8002e2c: af00 add r7, sp, #0 - 8002e2e: 60f8 str r0, [r7, #12] - 8002e30: 60b9 str r1, [r7, #8] - 8002e32: 607a str r2, [r7, #4] + 8002e74: b580 push {r7, lr} + 8002e76: b084 sub sp, #16 + 8002e78: af00 add r7, sp, #0 + 8002e7a: 60f8 str r0, [r7, #12] + 8002e7c: 60b9 str r1, [r7, #8] + 8002e7e: 607a str r2, [r7, #4] MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_Pos)); - 8002e34: 68fb ldr r3, [r7, #12] - 8002e36: 681b ldr r3, [r3, #0] - 8002e38: 4a06 ldr r2, [pc, #24] ; (8002e54 ) - 8002e3a: 401a ands r2, r3 - 8002e3c: 687b ldr r3, [r7, #4] - 8002e3e: 0219 lsls r1, r3, #8 - 8002e40: 68bb ldr r3, [r7, #8] - 8002e42: 430b orrs r3, r1 - 8002e44: 431a orrs r2, r3 - 8002e46: 68fb ldr r3, [r7, #12] - 8002e48: 601a str r2, [r3, #0] -} - 8002e4a: 46c0 nop ; (mov r8, r8) - 8002e4c: 46bd mov sp, r7 - 8002e4e: b004 add sp, #16 - 8002e50: bd80 pop {r7, pc} - 8002e52: 46c0 nop ; (mov r8, r8) - 8002e54: ffffe0ff .word 0xffffe0ff - -08002e58 : -{ - 8002e58: b580 push {r7, lr} - 8002e5a: b084 sub sp, #16 - 8002e5c: af00 add r7, sp, #0 - 8002e5e: 60f8 str r0, [r7, #12] - 8002e60: 60b9 str r1, [r7, #8] - 8002e62: 607a str r2, [r7, #4] - MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize); - 8002e64: 68fb ldr r3, [r7, #12] - 8002e66: 689b ldr r3, [r3, #8] - 8002e68: 0adb lsrs r3, r3, #11 - 8002e6a: 02da lsls r2, r3, #11 - 8002e6c: 68b9 ldr r1, [r7, #8] - 8002e6e: 687b ldr r3, [r7, #4] - 8002e70: 430b orrs r3, r1 - 8002e72: 431a orrs r2, r3 - 8002e74: 68fb ldr r3, [r7, #12] - 8002e76: 609a str r2, [r3, #8] -} - 8002e78: 46c0 nop ; (mov r8, r8) - 8002e7a: 46bd mov sp, r7 - 8002e7c: b004 add sp, #16 - 8002e7e: bd80 pop {r7, pc} - -08002e80 : -{ - 8002e80: b580 push {r7, lr} - 8002e82: b082 sub sp, #8 - 8002e84: af00 add r7, sp, #0 - 8002e86: 6078 str r0, [r7, #4] - SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN); + 8002e80: 68fb ldr r3, [r7, #12] + 8002e82: 681b ldr r3, [r3, #0] + 8002e84: 4a06 ldr r2, [pc, #24] ; (8002ea0 ) + 8002e86: 401a ands r2, r3 8002e88: 687b ldr r3, [r7, #4] - 8002e8a: 689b ldr r3, [r3, #8] - 8002e8c: 2280 movs r2, #128 ; 0x80 - 8002e8e: 0212 lsls r2, r2, #8 + 8002e8a: 0219 lsls r1, r3, #8 + 8002e8c: 68bb ldr r3, [r7, #8] + 8002e8e: 430b orrs r3, r1 8002e90: 431a orrs r2, r3 - 8002e92: 687b ldr r3, [r7, #4] - 8002e94: 609a str r2, [r3, #8] + 8002e92: 68fb ldr r3, [r7, #12] + 8002e94: 601a str r2, [r3, #0] } 8002e96: 46c0 nop ; (mov r8, r8) 8002e98: 46bd mov sp, r7 - 8002e9a: b002 add sp, #8 + 8002e9a: b004 add sp, #16 8002e9c: bd80 pop {r7, pc} + 8002e9e: 46c0 nop ; (mov r8, r8) + 8002ea0: ffffe0ff .word 0xffffe0ff + +08002ea4 : +{ + 8002ea4: b580 push {r7, lr} + 8002ea6: b084 sub sp, #16 + 8002ea8: af00 add r7, sp, #0 + 8002eaa: 60f8 str r0, [r7, #12] + 8002eac: 60b9 str r1, [r7, #8] + 8002eae: 607a str r2, [r7, #4] + MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize); + 8002eb0: 68fb ldr r3, [r7, #12] + 8002eb2: 689b ldr r3, [r3, #8] + 8002eb4: 0adb lsrs r3, r3, #11 + 8002eb6: 02da lsls r2, r3, #11 + 8002eb8: 68b9 ldr r1, [r7, #8] + 8002eba: 687b ldr r3, [r7, #4] + 8002ebc: 430b orrs r3, r1 + 8002ebe: 431a orrs r2, r3 + 8002ec0: 68fb ldr r3, [r7, #12] + 8002ec2: 609a str r2, [r3, #8] +} + 8002ec4: 46c0 nop ; (mov r8, r8) + 8002ec6: 46bd mov sp, r7 + 8002ec8: b004 add sp, #16 + 8002eca: bd80 pop {r7, pc} + +08002ecc : +{ + 8002ecc: b580 push {r7, lr} + 8002ece: b082 sub sp, #8 + 8002ed0: af00 add r7, sp, #0 + 8002ed2: 6078 str r0, [r7, #4] + SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN); + 8002ed4: 687b ldr r3, [r7, #4] + 8002ed6: 689b ldr r3, [r3, #8] + 8002ed8: 2280 movs r2, #128 ; 0x80 + 8002eda: 0212 lsls r2, r2, #8 + 8002edc: 431a orrs r2, r3 + 8002ede: 687b ldr r3, [r7, #4] + 8002ee0: 609a str r2, [r3, #8] +} + 8002ee2: 46c0 nop ; (mov r8, r8) + 8002ee4: 46bd mov sp, r7 + 8002ee6: b002 add sp, #8 + 8002ee8: bd80 pop {r7, pc} ... -08002ea0 : +08002eec : { - 8002ea0: b580 push {r7, lr} - 8002ea2: b082 sub sp, #8 - 8002ea4: af00 add r7, sp, #0 - 8002ea6: 6078 str r0, [r7, #4] + 8002eec: b580 push {r7, lr} + 8002eee: b082 sub sp, #8 + 8002ef0: af00 add r7, sp, #0 + 8002ef2: 6078 str r0, [r7, #4] CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN); - 8002ea8: 687b ldr r3, [r7, #4] - 8002eaa: 689b ldr r3, [r3, #8] - 8002eac: 4a03 ldr r2, [pc, #12] ; (8002ebc ) - 8002eae: 401a ands r2, r3 - 8002eb0: 687b ldr r3, [r7, #4] - 8002eb2: 609a str r2, [r3, #8] + 8002ef4: 687b ldr r3, [r7, #4] + 8002ef6: 689b ldr r3, [r3, #8] + 8002ef8: 4a03 ldr r2, [pc, #12] ; (8002f08 ) + 8002efa: 401a ands r2, r3 + 8002efc: 687b ldr r3, [r7, #4] + 8002efe: 609a str r2, [r3, #8] } - 8002eb4: 46c0 nop ; (mov r8, r8) - 8002eb6: 46bd mov sp, r7 - 8002eb8: b002 add sp, #8 - 8002eba: bd80 pop {r7, pc} - 8002ebc: ffff7fff .word 0xffff7fff + 8002f00: 46c0 nop ; (mov r8, r8) + 8002f02: 46bd mov sp, r7 + 8002f04: b002 add sp, #8 + 8002f06: bd80 pop {r7, pc} + 8002f08: ffff7fff .word 0xffff7fff -08002ec0 : +08002f0c : { - 8002ec0: b580 push {r7, lr} - 8002ec2: b082 sub sp, #8 - 8002ec4: af00 add r7, sp, #0 - 8002ec6: 6078 str r0, [r7, #4] - 8002ec8: 6039 str r1, [r7, #0] + 8002f0c: b580 push {r7, lr} + 8002f0e: b082 sub sp, #8 + 8002f10: af00 add r7, sp, #0 + 8002f12: 6078 str r0, [r7, #4] + 8002f14: 6039 str r1, [r7, #0] WRITE_REG(I2Cx->TIMINGR, Timing); - 8002eca: 687b ldr r3, [r7, #4] - 8002ecc: 683a ldr r2, [r7, #0] - 8002ece: 611a str r2, [r3, #16] -} - 8002ed0: 46c0 nop ; (mov r8, r8) - 8002ed2: 46bd mov sp, r7 - 8002ed4: b002 add sp, #8 - 8002ed6: bd80 pop {r7, pc} - -08002ed8 : -{ - 8002ed8: b580 push {r7, lr} - 8002eda: b082 sub sp, #8 - 8002edc: af00 add r7, sp, #0 - 8002ede: 6078 str r0, [r7, #4] - 8002ee0: 6039 str r1, [r7, #0] - MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode); - 8002ee2: 687b ldr r3, [r7, #4] - 8002ee4: 681b ldr r3, [r3, #0] - 8002ee6: 4a05 ldr r2, [pc, #20] ; (8002efc ) - 8002ee8: 401a ands r2, r3 - 8002eea: 683b ldr r3, [r7, #0] - 8002eec: 431a orrs r2, r3 - 8002eee: 687b ldr r3, [r7, #4] - 8002ef0: 601a str r2, [r3, #0] -} - 8002ef2: 46c0 nop ; (mov r8, r8) - 8002ef4: 46bd mov sp, r7 - 8002ef6: b002 add sp, #8 - 8002ef8: bd80 pop {r7, pc} - 8002efa: 46c0 nop ; (mov r8, r8) - 8002efc: ffcfffff .word 0xffcfffff - -08002f00 : -{ - 8002f00: b580 push {r7, lr} - 8002f02: b082 sub sp, #8 - 8002f04: af00 add r7, sp, #0 - 8002f06: 6078 str r0, [r7, #4] - 8002f08: 6039 str r1, [r7, #0] - MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge); - 8002f0a: 687b ldr r3, [r7, #4] - 8002f0c: 685b ldr r3, [r3, #4] - 8002f0e: 4a05 ldr r2, [pc, #20] ; (8002f24 ) - 8002f10: 401a ands r2, r3 - 8002f12: 683b ldr r3, [r7, #0] - 8002f14: 431a orrs r2, r3 8002f16: 687b ldr r3, [r7, #4] - 8002f18: 605a str r2, [r3, #4] + 8002f18: 683a ldr r2, [r7, #0] + 8002f1a: 611a str r2, [r3, #16] } - 8002f1a: 46c0 nop ; (mov r8, r8) - 8002f1c: 46bd mov sp, r7 - 8002f1e: b002 add sp, #8 - 8002f20: bd80 pop {r7, pc} - 8002f22: 46c0 nop ; (mov r8, r8) - 8002f24: ffff7fff .word 0xffff7fff + 8002f1c: 46c0 nop ; (mov r8, r8) + 8002f1e: 46bd mov sp, r7 + 8002f20: b002 add sp, #8 + 8002f22: bd80 pop {r7, pc} -08002f28 : +08002f24 : +{ + 8002f24: b580 push {r7, lr} + 8002f26: b082 sub sp, #8 + 8002f28: af00 add r7, sp, #0 + 8002f2a: 6078 str r0, [r7, #4] + 8002f2c: 6039 str r1, [r7, #0] + MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode); + 8002f2e: 687b ldr r3, [r7, #4] + 8002f30: 681b ldr r3, [r3, #0] + 8002f32: 4a05 ldr r2, [pc, #20] ; (8002f48 ) + 8002f34: 401a ands r2, r3 + 8002f36: 683b ldr r3, [r7, #0] + 8002f38: 431a orrs r2, r3 + 8002f3a: 687b ldr r3, [r7, #4] + 8002f3c: 601a str r2, [r3, #0] +} + 8002f3e: 46c0 nop ; (mov r8, r8) + 8002f40: 46bd mov sp, r7 + 8002f42: b002 add sp, #8 + 8002f44: bd80 pop {r7, pc} + 8002f46: 46c0 nop ; (mov r8, r8) + 8002f48: ffcfffff .word 0xffcfffff + +08002f4c : +{ + 8002f4c: b580 push {r7, lr} + 8002f4e: b082 sub sp, #8 + 8002f50: af00 add r7, sp, #0 + 8002f52: 6078 str r0, [r7, #4] + 8002f54: 6039 str r1, [r7, #0] + MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge); + 8002f56: 687b ldr r3, [r7, #4] + 8002f58: 685b ldr r3, [r3, #4] + 8002f5a: 4a05 ldr r2, [pc, #20] ; (8002f70 ) + 8002f5c: 401a ands r2, r3 + 8002f5e: 683b ldr r3, [r7, #0] + 8002f60: 431a orrs r2, r3 + 8002f62: 687b ldr r3, [r7, #4] + 8002f64: 605a str r2, [r3, #4] +} + 8002f66: 46c0 nop ; (mov r8, r8) + 8002f68: 46bd mov sp, r7 + 8002f6a: b002 add sp, #8 + 8002f6c: bd80 pop {r7, pc} + 8002f6e: 46c0 nop ; (mov r8, r8) + 8002f70: ffff7fff .word 0xffff7fff + +08002f74 : * @retval An ErrorStatus enumeration value: * - SUCCESS: I2C registers are initialized * - ERROR: Not applicable */ ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct) { - 8002f28: b580 push {r7, lr} - 8002f2a: b082 sub sp, #8 - 8002f2c: af00 add r7, sp, #0 - 8002f2e: 6078 str r0, [r7, #4] - 8002f30: 6039 str r1, [r7, #0] + 8002f74: b580 push {r7, lr} + 8002f76: b082 sub sp, #8 + 8002f78: af00 add r7, sp, #0 + 8002f7a: 6078 str r0, [r7, #4] + 8002f7c: 6039 str r1, [r7, #0] assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); /* Disable the selected I2Cx Peripheral */ LL_I2C_Disable(I2Cx); - 8002f32: 687b ldr r3, [r7, #4] - 8002f34: 0018 movs r0, r3 - 8002f36: f7ff ff67 bl 8002e08 + 8002f7e: 687b ldr r3, [r7, #4] + 8002f80: 0018 movs r0, r3 + 8002f82: f7ff ff67 bl 8002e54 /*---------------------------- I2Cx CR1 Configuration ------------------------ * Configure the analog and digital noise filters with parameters : * - AnalogFilter: I2C_CR1_ANFOFF bit * - DigitalFilter: I2C_CR1_DNF[3:0] bits */ LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter); - 8002f3a: 683b ldr r3, [r7, #0] - 8002f3c: 6899 ldr r1, [r3, #8] - 8002f3e: 683b ldr r3, [r7, #0] - 8002f40: 68da ldr r2, [r3, #12] - 8002f42: 687b ldr r3, [r7, #4] - 8002f44: 0018 movs r0, r3 - 8002f46: f7ff ff6f bl 8002e28 + 8002f86: 683b ldr r3, [r7, #0] + 8002f88: 6899 ldr r1, [r3, #8] + 8002f8a: 683b ldr r3, [r7, #0] + 8002f8c: 68da ldr r2, [r3, #12] + 8002f8e: 687b ldr r3, [r7, #4] + 8002f90: 0018 movs r0, r3 + 8002f92: f7ff ff6f bl 8002e74 /*---------------------------- I2Cx TIMINGR Configuration -------------------- * Configure the SDA setup, hold time and the SCL high, low period with parameter : * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0], * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits */ LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing); - 8002f4a: 683b ldr r3, [r7, #0] - 8002f4c: 685a ldr r2, [r3, #4] - 8002f4e: 687b ldr r3, [r7, #4] - 8002f50: 0011 movs r1, r2 - 8002f52: 0018 movs r0, r3 - 8002f54: f7ff ffb4 bl 8002ec0 + 8002f96: 683b ldr r3, [r7, #0] + 8002f98: 685a ldr r2, [r3, #4] + 8002f9a: 687b ldr r3, [r7, #4] + 8002f9c: 0011 movs r1, r2 + 8002f9e: 0018 movs r0, r3 + 8002fa0: f7ff ffb4 bl 8002f0c /* Enable the selected I2Cx Peripheral */ LL_I2C_Enable(I2Cx); - 8002f58: 687b ldr r3, [r7, #4] - 8002f5a: 0018 movs r0, r3 - 8002f5c: f7ff ff46 bl 8002dec + 8002fa4: 687b ldr r3, [r7, #4] + 8002fa6: 0018 movs r0, r3 + 8002fa8: f7ff ff46 bl 8002e38 /*---------------------------- I2Cx OAR1 Configuration ----------------------- * Disable, Configure and Enable I2Cx device own address 1 with parameters : * - OwnAddress1: I2C_OAR1_OA1[9:0] bits * - OwnAddrSize: I2C_OAR1_OA1MODE bit */ LL_I2C_DisableOwnAddress1(I2Cx); - 8002f60: 687b ldr r3, [r7, #4] - 8002f62: 0018 movs r0, r3 - 8002f64: f7ff ff9c bl 8002ea0 + 8002fac: 687b ldr r3, [r7, #4] + 8002fae: 0018 movs r0, r3 + 8002fb0: f7ff ff9c bl 8002eec LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); - 8002f68: 683b ldr r3, [r7, #0] - 8002f6a: 6919 ldr r1, [r3, #16] - 8002f6c: 683b ldr r3, [r7, #0] - 8002f6e: 699a ldr r2, [r3, #24] - 8002f70: 687b ldr r3, [r7, #4] - 8002f72: 0018 movs r0, r3 - 8002f74: f7ff ff70 bl 8002e58 + 8002fb4: 683b ldr r3, [r7, #0] + 8002fb6: 6919 ldr r1, [r3, #16] + 8002fb8: 683b ldr r3, [r7, #0] + 8002fba: 699a ldr r2, [r3, #24] + 8002fbc: 687b ldr r3, [r7, #4] + 8002fbe: 0018 movs r0, r3 + 8002fc0: f7ff ff70 bl 8002ea4 /* OwnAdress1 == 0 is reserved for General Call address */ if (I2C_InitStruct->OwnAddress1 != 0U) - 8002f78: 683b ldr r3, [r7, #0] - 8002f7a: 691b ldr r3, [r3, #16] - 8002f7c: 2b00 cmp r3, #0 - 8002f7e: d003 beq.n 8002f88 + 8002fc4: 683b ldr r3, [r7, #0] + 8002fc6: 691b ldr r3, [r3, #16] + 8002fc8: 2b00 cmp r3, #0 + 8002fca: d003 beq.n 8002fd4 { LL_I2C_EnableOwnAddress1(I2Cx); - 8002f80: 687b ldr r3, [r7, #4] - 8002f82: 0018 movs r0, r3 - 8002f84: f7ff ff7c bl 8002e80 + 8002fcc: 687b ldr r3, [r7, #4] + 8002fce: 0018 movs r0, r3 + 8002fd0: f7ff ff7c bl 8002ecc /*---------------------------- I2Cx MODE Configuration ----------------------- * Configure I2Cx peripheral mode with parameter : * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits */ LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); - 8002f88: 683b ldr r3, [r7, #0] - 8002f8a: 681a ldr r2, [r3, #0] - 8002f8c: 687b ldr r3, [r7, #4] - 8002f8e: 0011 movs r1, r2 - 8002f90: 0018 movs r0, r3 - 8002f92: f7ff ffa1 bl 8002ed8 + 8002fd4: 683b ldr r3, [r7, #0] + 8002fd6: 681a ldr r2, [r3, #0] + 8002fd8: 687b ldr r3, [r7, #4] + 8002fda: 0011 movs r1, r2 + 8002fdc: 0018 movs r0, r3 + 8002fde: f7ff ffa1 bl 8002f24 /*---------------------------- I2Cx CR2 Configuration ------------------------ * Configure the ACKnowledge or Non ACKnowledge condition * after the address receive match code or next received byte with parameter : * - TypeAcknowledge: I2C_CR2_NACK bit */ LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); - 8002f96: 683b ldr r3, [r7, #0] - 8002f98: 695a ldr r2, [r3, #20] - 8002f9a: 687b ldr r3, [r7, #4] - 8002f9c: 0011 movs r1, r2 - 8002f9e: 0018 movs r0, r3 - 8002fa0: f7ff ffae bl 8002f00 + 8002fe2: 683b ldr r3, [r7, #0] + 8002fe4: 695a ldr r2, [r3, #20] + 8002fe6: 687b ldr r3, [r7, #4] + 8002fe8: 0011 movs r1, r2 + 8002fea: 0018 movs r0, r3 + 8002fec: f7ff ffae bl 8002f4c return SUCCESS; - 8002fa4: 2300 movs r3, #0 + 8002ff0: 2300 movs r3, #0 } - 8002fa6: 0018 movs r0, r3 - 8002fa8: 46bd mov sp, r7 - 8002faa: b002 add sp, #8 - 8002fac: bd80 pop {r7, pc} + 8002ff2: 0018 movs r0, r3 + 8002ff4: 46bd mov sp, r7 + 8002ff6: b002 add sp, #8 + 8002ff8: bd80 pop {r7, pc} -08002fae : +08002ffa : { - 8002fae: b580 push {r7, lr} - 8002fb0: b082 sub sp, #8 - 8002fb2: af00 add r7, sp, #0 - 8002fb4: 6078 str r0, [r7, #4] + 8002ffa: b580 push {r7, lr} + 8002ffc: b082 sub sp, #8 + 8002ffe: af00 add r7, sp, #0 + 8003000: 6078 str r0, [r7, #4] return ((READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL); - 8002fb6: 687b ldr r3, [r7, #4] - 8002fb8: 681b ldr r3, [r3, #0] - 8002fba: 2201 movs r2, #1 - 8002fbc: 4013 ands r3, r2 - 8002fbe: 2b01 cmp r3, #1 - 8002fc0: d101 bne.n 8002fc6 - 8002fc2: 2301 movs r3, #1 - 8002fc4: e000 b.n 8002fc8 - 8002fc6: 2300 movs r3, #0 -} - 8002fc8: 0018 movs r0, r3 - 8002fca: 46bd mov sp, r7 - 8002fcc: b002 add sp, #8 - 8002fce: bd80 pop {r7, pc} - -08002fd0 : -{ - 8002fd0: b580 push {r7, lr} - 8002fd2: b082 sub sp, #8 - 8002fd4: af00 add r7, sp, #0 - 8002fd6: 6078 str r0, [r7, #4] - 8002fd8: 6039 str r1, [r7, #0] - MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); - 8002fda: 687b ldr r3, [r7, #4] - 8002fdc: 685b ldr r3, [r3, #4] - 8002fde: 4a05 ldr r2, [pc, #20] ; (8002ff4 ) - 8002fe0: 401a ands r2, r3 - 8002fe2: 683b ldr r3, [r7, #0] - 8002fe4: 431a orrs r2, r3 - 8002fe6: 687b ldr r3, [r7, #4] - 8002fe8: 605a str r2, [r3, #4] -} - 8002fea: 46c0 nop ; (mov r8, r8) - 8002fec: 46bd mov sp, r7 - 8002fee: b002 add sp, #8 - 8002ff0: bd80 pop {r7, pc} - 8002ff2: 46c0 nop ; (mov r8, r8) - 8002ff4: ffffcfff .word 0xffffcfff - -08002ff8 : -{ - 8002ff8: b580 push {r7, lr} - 8002ffa: b082 sub sp, #8 - 8002ffc: af00 add r7, sp, #0 - 8002ffe: 6078 str r0, [r7, #4] - 8003000: 6039 str r1, [r7, #0] - MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); 8003002: 687b ldr r3, [r7, #4] - 8003004: 689b ldr r3, [r3, #8] - 8003006: 4a05 ldr r2, [pc, #20] ; (800301c ) - 8003008: 401a ands r2, r3 - 800300a: 683b ldr r3, [r7, #0] - 800300c: 431a orrs r2, r3 - 800300e: 687b ldr r3, [r7, #4] - 8003010: 609a str r2, [r3, #8] + 8003004: 681b ldr r3, [r3, #0] + 8003006: 2201 movs r2, #1 + 8003008: 4013 ands r3, r2 + 800300a: 2b01 cmp r3, #1 + 800300c: d101 bne.n 8003012 + 800300e: 2301 movs r3, #1 + 8003010: e000 b.n 8003014 + 8003012: 2300 movs r3, #0 } - 8003012: 46c0 nop ; (mov r8, r8) - 8003014: 46bd mov sp, r7 - 8003016: b002 add sp, #8 - 8003018: bd80 pop {r7, pc} - 800301a: 46c0 nop ; (mov r8, r8) - 800301c: fffffcff .word 0xfffffcff + 8003014: 0018 movs r0, r3 + 8003016: 46bd mov sp, r7 + 8003018: b002 add sp, #8 + 800301a: bd80 pop {r7, pc} -08003020 : +0800301c : { - 8003020: b5b0 push {r4, r5, r7, lr} - 8003022: b08a sub sp, #40 ; 0x28 - 8003024: af00 add r7, sp, #0 - 8003026: 6278 str r0, [r7, #36] ; 0x24 - 8003028: 6239 str r1, [r7, #32] - 800302a: 61fa str r2, [r7, #28] - if (BaudRate != 0U) - 800302c: 69fb ldr r3, [r7, #28] - 800302e: 2b00 cmp r3, #0 - 8003030: d024 beq.n 800307c - LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate); - 8003032: 6a3b ldr r3, [r7, #32] - 8003034: 613b str r3, [r7, #16] - 8003036: 2300 movs r3, #0 - 8003038: 617b str r3, [r7, #20] - 800303a: 6939 ldr r1, [r7, #16] - 800303c: 697a ldr r2, [r7, #20] - 800303e: 000b movs r3, r1 - 8003040: 0e1b lsrs r3, r3, #24 - 8003042: 0010 movs r0, r2 - 8003044: 0205 lsls r5, r0, #8 - 8003046: 431d orrs r5, r3 - 8003048: 000b movs r3, r1 - 800304a: 021c lsls r4, r3, #8 - 800304c: 69fb ldr r3, [r7, #28] - 800304e: 085b lsrs r3, r3, #1 - 8003050: 60bb str r3, [r7, #8] - 8003052: 2300 movs r3, #0 - 8003054: 60fb str r3, [r7, #12] - 8003056: 68b8 ldr r0, [r7, #8] - 8003058: 68f9 ldr r1, [r7, #12] - 800305a: 1900 adds r0, r0, r4 - 800305c: 4169 adcs r1, r5 - 800305e: 69fb ldr r3, [r7, #28] - 8003060: 603b str r3, [r7, #0] - 8003062: 2300 movs r3, #0 - 8003064: 607b str r3, [r7, #4] - 8003066: 683a ldr r2, [r7, #0] - 8003068: 687b ldr r3, [r7, #4] - 800306a: f7fd f8d9 bl 8000220 <__aeabi_uldivmod> - 800306e: 0002 movs r2, r0 - 8003070: 000b movs r3, r1 - 8003072: 0013 movs r3, r2 - 8003074: 031b lsls r3, r3, #12 - 8003076: 0b1a lsrs r2, r3, #12 - 8003078: 6a7b ldr r3, [r7, #36] ; 0x24 - 800307a: 60da str r2, [r3, #12] + 800301c: b580 push {r7, lr} + 800301e: b082 sub sp, #8 + 8003020: af00 add r7, sp, #0 + 8003022: 6078 str r0, [r7, #4] + 8003024: 6039 str r1, [r7, #0] + MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); + 8003026: 687b ldr r3, [r7, #4] + 8003028: 685b ldr r3, [r3, #4] + 800302a: 4a05 ldr r2, [pc, #20] ; (8003040 ) + 800302c: 401a ands r2, r3 + 800302e: 683b ldr r3, [r7, #0] + 8003030: 431a orrs r2, r3 + 8003032: 687b ldr r3, [r7, #4] + 8003034: 605a str r2, [r3, #4] } - 800307c: 46c0 nop ; (mov r8, r8) - 800307e: 46bd mov sp, r7 - 8003080: b00a add sp, #40 ; 0x28 - 8003082: bdb0 pop {r4, r5, r7, pc} + 8003036: 46c0 nop ; (mov r8, r8) + 8003038: 46bd mov sp, r7 + 800303a: b002 add sp, #8 + 800303c: bd80 pop {r7, pc} + 800303e: 46c0 nop ; (mov r8, r8) + 8003040: ffffcfff .word 0xffffcfff -08003084 : +08003044 : +{ + 8003044: b580 push {r7, lr} + 8003046: b082 sub sp, #8 + 8003048: af00 add r7, sp, #0 + 800304a: 6078 str r0, [r7, #4] + 800304c: 6039 str r1, [r7, #0] + MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); + 800304e: 687b ldr r3, [r7, #4] + 8003050: 689b ldr r3, [r3, #8] + 8003052: 4a05 ldr r2, [pc, #20] ; (8003068 ) + 8003054: 401a ands r2, r3 + 8003056: 683b ldr r3, [r7, #0] + 8003058: 431a orrs r2, r3 + 800305a: 687b ldr r3, [r7, #4] + 800305c: 609a str r2, [r3, #8] +} + 800305e: 46c0 nop ; (mov r8, r8) + 8003060: 46bd mov sp, r7 + 8003062: b002 add sp, #8 + 8003064: bd80 pop {r7, pc} + 8003066: 46c0 nop ; (mov r8, r8) + 8003068: fffffcff .word 0xfffffcff + +0800306c : +{ + 800306c: b5b0 push {r4, r5, r7, lr} + 800306e: b08a sub sp, #40 ; 0x28 + 8003070: af00 add r7, sp, #0 + 8003072: 6278 str r0, [r7, #36] ; 0x24 + 8003074: 6239 str r1, [r7, #32] + 8003076: 61fa str r2, [r7, #28] + if (BaudRate != 0U) + 8003078: 69fb ldr r3, [r7, #28] + 800307a: 2b00 cmp r3, #0 + 800307c: d024 beq.n 80030c8 + LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate); + 800307e: 6a3b ldr r3, [r7, #32] + 8003080: 613b str r3, [r7, #16] + 8003082: 2300 movs r3, #0 + 8003084: 617b str r3, [r7, #20] + 8003086: 6939 ldr r1, [r7, #16] + 8003088: 697a ldr r2, [r7, #20] + 800308a: 000b movs r3, r1 + 800308c: 0e1b lsrs r3, r3, #24 + 800308e: 0010 movs r0, r2 + 8003090: 0205 lsls r5, r0, #8 + 8003092: 431d orrs r5, r3 + 8003094: 000b movs r3, r1 + 8003096: 021c lsls r4, r3, #8 + 8003098: 69fb ldr r3, [r7, #28] + 800309a: 085b lsrs r3, r3, #1 + 800309c: 60bb str r3, [r7, #8] + 800309e: 2300 movs r3, #0 + 80030a0: 60fb str r3, [r7, #12] + 80030a2: 68b8 ldr r0, [r7, #8] + 80030a4: 68f9 ldr r1, [r7, #12] + 80030a6: 1900 adds r0, r0, r4 + 80030a8: 4169 adcs r1, r5 + 80030aa: 69fb ldr r3, [r7, #28] + 80030ac: 603b str r3, [r7, #0] + 80030ae: 2300 movs r3, #0 + 80030b0: 607b str r3, [r7, #4] + 80030b2: 683a ldr r2, [r7, #0] + 80030b4: 687b ldr r3, [r7, #4] + 80030b6: f7fd f8b3 bl 8000220 <__aeabi_uldivmod> + 80030ba: 0002 movs r2, r0 + 80030bc: 000b movs r3, r1 + 80030be: 0013 movs r3, r2 + 80030c0: 031b lsls r3, r3, #12 + 80030c2: 0b1a lsrs r2, r3, #12 + 80030c4: 6a7b ldr r3, [r7, #36] ; 0x24 + 80030c6: 60da str r2, [r3, #12] +} + 80030c8: 46c0 nop ; (mov r8, r8) + 80030ca: 46bd mov sp, r7 + 80030cc: b00a add sp, #40 ; 0x28 + 80030ce: bdb0 pop {r4, r5, r7, pc} + +080030d0 : * @retval An ErrorStatus enumeration value: * - SUCCESS: LPUART registers are initialized according to LPUART_InitStruct content * - ERROR: Problem occurred during LPUART Registers initialization */ ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct) { - 8003084: b590 push {r4, r7, lr} - 8003086: b085 sub sp, #20 - 8003088: af00 add r7, sp, #0 - 800308a: 6078 str r0, [r7, #4] - 800308c: 6039 str r1, [r7, #0] + 80030d0: b590 push {r4, r7, lr} + 80030d2: b085 sub sp, #20 + 80030d4: af00 add r7, sp, #0 + 80030d6: 6078 str r0, [r7, #4] + 80030d8: 6039 str r1, [r7, #0] ErrorStatus status = ERROR; - 800308e: 240f movs r4, #15 - 8003090: 193b adds r3, r7, r4 - 8003092: 2201 movs r2, #1 - 8003094: 701a strb r2, [r3, #0] + 80030da: 240f movs r4, #15 + 80030dc: 193b adds r3, r7, r4 + 80030de: 2201 movs r2, #1 + 80030e0: 701a strb r2, [r3, #0] assert_param(IS_LL_LPUART_DIRECTION(LPUART_InitStruct->TransferDirection)); assert_param(IS_LL_LPUART_HWCONTROL(LPUART_InitStruct->HardwareFlowControl)); /* LPUART needs to be in disabled state, in order to be able to configure some bits in CRx registers. Otherwise (LPUART not in Disabled state) => return ERROR */ if (LL_LPUART_IsEnabled(LPUARTx) == 0U) - 8003096: 687b ldr r3, [r7, #4] - 8003098: 0018 movs r0, r3 - 800309a: f7ff ff88 bl 8002fae - 800309e: 1e03 subs r3, r0, #0 - 80030a0: d134 bne.n 800310c + 80030e2: 687b ldr r3, [r7, #4] + 80030e4: 0018 movs r0, r3 + 80030e6: f7ff ff88 bl 8002ffa + 80030ea: 1e03 subs r3, r0, #0 + 80030ec: d134 bne.n 8003158 * Configure LPUARTx CR1 (LPUART Word Length, Parity and Transfer Direction bits) with parameters: * - DataWidth: USART_CR1_M bits according to LPUART_InitStruct->DataWidth value * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to LPUART_InitStruct->Parity value * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to LPUART_InitStruct->TransferDirection value */ MODIFY_REG(LPUARTx->CR1, - 80030a2: 687b ldr r3, [r7, #4] - 80030a4: 681b ldr r3, [r3, #0] - 80030a6: 4a1d ldr r2, [pc, #116] ; (800311c ) - 80030a8: 401a ands r2, r3 - 80030aa: 683b ldr r3, [r7, #0] - 80030ac: 6859 ldr r1, [r3, #4] - 80030ae: 683b ldr r3, [r7, #0] - 80030b0: 68db ldr r3, [r3, #12] - 80030b2: 4319 orrs r1, r3 - 80030b4: 683b ldr r3, [r7, #0] - 80030b6: 691b ldr r3, [r3, #16] - 80030b8: 430b orrs r3, r1 - 80030ba: 431a orrs r2, r3 - 80030bc: 687b ldr r3, [r7, #4] - 80030be: 601a str r2, [r3, #0] + 80030ee: 687b ldr r3, [r7, #4] + 80030f0: 681b ldr r3, [r3, #0] + 80030f2: 4a1d ldr r2, [pc, #116] ; (8003168 ) + 80030f4: 401a ands r2, r3 + 80030f6: 683b ldr r3, [r7, #0] + 80030f8: 6859 ldr r1, [r3, #4] + 80030fa: 683b ldr r3, [r7, #0] + 80030fc: 68db ldr r3, [r3, #12] + 80030fe: 4319 orrs r1, r3 + 8003100: 683b ldr r3, [r7, #0] + 8003102: 691b ldr r3, [r3, #16] + 8003104: 430b orrs r3, r1 + 8003106: 431a orrs r2, r3 + 8003108: 687b ldr r3, [r7, #4] + 800310a: 601a str r2, [r3, #0] /*---------------------------- LPUART CR2 Configuration ----------------------- * Configure LPUARTx CR2 (Stop bits) with parameters: * - Stop Bits: USART_CR2_STOP bits according to LPUART_InitStruct->StopBits value. */ LL_LPUART_SetStopBitsLength(LPUARTx, LPUART_InitStruct->StopBits); - 80030c0: 683b ldr r3, [r7, #0] - 80030c2: 689a ldr r2, [r3, #8] - 80030c4: 687b ldr r3, [r7, #4] - 80030c6: 0011 movs r1, r2 - 80030c8: 0018 movs r0, r3 - 80030ca: f7ff ff81 bl 8002fd0 + 800310c: 683b ldr r3, [r7, #0] + 800310e: 689a ldr r2, [r3, #8] + 8003110: 687b ldr r3, [r7, #4] + 8003112: 0011 movs r1, r2 + 8003114: 0018 movs r0, r3 + 8003116: f7ff ff81 bl 800301c /*---------------------------- LPUART CR3 Configuration ----------------------- * Configure LPUARTx CR3 (Hardware Flow Control) with parameters: * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according * to LPUART_InitStruct->HardwareFlowControl value. */ LL_LPUART_SetHWFlowCtrl(LPUARTx, LPUART_InitStruct->HardwareFlowControl); - 80030ce: 683b ldr r3, [r7, #0] - 80030d0: 695a ldr r2, [r3, #20] - 80030d2: 687b ldr r3, [r7, #4] - 80030d4: 0011 movs r1, r2 - 80030d6: 0018 movs r0, r3 - 80030d8: f7ff ff8e bl 8002ff8 + 800311a: 683b ldr r3, [r7, #0] + 800311c: 695a ldr r2, [r3, #20] + 800311e: 687b ldr r3, [r7, #4] + 8003120: 0011 movs r1, r2 + 8003122: 0018 movs r0, r3 + 8003124: f7ff ff8e bl 8003044 /*---------------------------- LPUART BRR Configuration ----------------------- * Retrieve Clock frequency used for LPUART Peripheral */ periphclk = LL_RCC_GetLPUARTClockFreq(LL_RCC_LPUART1_CLKSOURCE); - 80030dc: 23c0 movs r3, #192 ; 0xc0 - 80030de: 011b lsls r3, r3, #4 - 80030e0: 0018 movs r0, r3 - 80030e2: f000 f8b3 bl 800324c - 80030e6: 0003 movs r3, r0 - 80030e8: 60bb str r3, [r7, #8] + 8003128: 23c0 movs r3, #192 ; 0xc0 + 800312a: 011b lsls r3, r3, #4 + 800312c: 0018 movs r0, r3 + 800312e: f000 f8b3 bl 8003298 + 8003132: 0003 movs r3, r0 + 8003134: 60bb str r3, [r7, #8] /* Configure the LPUART Baud Rate : - valid baud rate value (different from 0) is required - Peripheral clock as returned by RCC service, should be valid (different from 0). */ if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) - 80030ea: 68bb ldr r3, [r7, #8] - 80030ec: 2b00 cmp r3, #0 - 80030ee: d00d beq.n 800310c + 8003136: 68bb ldr r3, [r7, #8] + 8003138: 2b00 cmp r3, #0 + 800313a: d00d beq.n 8003158 && (LPUART_InitStruct->BaudRate != 0U)) - 80030f0: 683b ldr r3, [r7, #0] - 80030f2: 681b ldr r3, [r3, #0] - 80030f4: 2b00 cmp r3, #0 - 80030f6: d009 beq.n 800310c + 800313c: 683b ldr r3, [r7, #0] + 800313e: 681b ldr r3, [r3, #0] + 8003140: 2b00 cmp r3, #0 + 8003142: d009 beq.n 8003158 { status = SUCCESS; - 80030f8: 193b adds r3, r7, r4 - 80030fa: 2200 movs r2, #0 - 80030fc: 701a strb r2, [r3, #0] + 8003144: 193b adds r3, r7, r4 + 8003146: 2200 movs r2, #0 + 8003148: 701a strb r2, [r3, #0] LL_LPUART_SetBaudRate(LPUARTx, - 80030fe: 683b ldr r3, [r7, #0] - 8003100: 681a ldr r2, [r3, #0] - 8003102: 68b9 ldr r1, [r7, #8] - 8003104: 687b ldr r3, [r7, #4] - 8003106: 0018 movs r0, r3 - 8003108: f7ff ff8a bl 8003020 + 800314a: 683b ldr r3, [r7, #0] + 800314c: 681a ldr r2, [r3, #0] + 800314e: 68b9 ldr r1, [r7, #8] + 8003150: 687b ldr r3, [r7, #4] + 8003152: 0018 movs r0, r3 + 8003154: f7ff ff8a bl 800306c assert_param(IS_LL_LPUART_BRR_MAX(LPUARTx->BRR)); } } return (status); - 800310c: 230f movs r3, #15 - 800310e: 18fb adds r3, r7, r3 - 8003110: 781b ldrb r3, [r3, #0] + 8003158: 230f movs r3, #15 + 800315a: 18fb adds r3, r7, r3 + 800315c: 781b ldrb r3, [r3, #0] } - 8003112: 0018 movs r0, r3 - 8003114: 46bd mov sp, r7 - 8003116: b005 add sp, #20 - 8003118: bd90 pop {r4, r7, pc} - 800311a: 46c0 nop ; (mov r8, r8) - 800311c: efffe9f3 .word 0xefffe9f3 + 800315e: 0018 movs r0, r3 + 8003160: 46bd mov sp, r7 + 8003162: b005 add sp, #20 + 8003164: bd90 pop {r4, r7, pc} + 8003166: 46c0 nop ; (mov r8, r8) + 8003168: efffe9f3 .word 0xefffe9f3 -08003120 : +0800316c : { - 8003120: b580 push {r7, lr} - 8003122: af00 add r7, sp, #0 + 800316c: b580 push {r7, lr} + 800316e: af00 add r7, sp, #0 return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RCC_CR_HSIRDY) ? 1UL : 0UL); - 8003124: 4b05 ldr r3, [pc, #20] ; (800313c ) - 8003126: 681b ldr r3, [r3, #0] - 8003128: 2204 movs r2, #4 - 800312a: 4013 ands r3, r2 - 800312c: 2b04 cmp r3, #4 - 800312e: d101 bne.n 8003134 - 8003130: 2301 movs r3, #1 - 8003132: e000 b.n 8003136 - 8003134: 2300 movs r3, #0 + 8003170: 4b05 ldr r3, [pc, #20] ; (8003188 ) + 8003172: 681b ldr r3, [r3, #0] + 8003174: 2204 movs r2, #4 + 8003176: 4013 ands r3, r2 + 8003178: 2b04 cmp r3, #4 + 800317a: d101 bne.n 8003180 + 800317c: 2301 movs r3, #1 + 800317e: e000 b.n 8003182 + 8003180: 2300 movs r3, #0 } - 8003136: 0018 movs r0, r3 - 8003138: 46bd mov sp, r7 - 800313a: bd80 pop {r7, pc} - 800313c: 40021000 .word 0x40021000 + 8003182: 0018 movs r0, r3 + 8003184: 46bd mov sp, r7 + 8003186: bd80 pop {r7, pc} + 8003188: 40021000 .word 0x40021000 -08003140 : +0800318c : { - 8003140: b580 push {r7, lr} - 8003142: af00 add r7, sp, #0 + 800318c: b580 push {r7, lr} + 800318e: af00 add r7, sp, #0 return ((READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == RCC_CSR_LSERDY) ? 1UL : 0UL); - 8003144: 4b07 ldr r3, [pc, #28] ; (8003164 ) - 8003146: 6d1a ldr r2, [r3, #80] ; 0x50 - 8003148: 2380 movs r3, #128 ; 0x80 - 800314a: 009b lsls r3, r3, #2 - 800314c: 401a ands r2, r3 - 800314e: 2380 movs r3, #128 ; 0x80 - 8003150: 009b lsls r3, r3, #2 - 8003152: 429a cmp r2, r3 - 8003154: d101 bne.n 800315a - 8003156: 2301 movs r3, #1 - 8003158: e000 b.n 800315c - 800315a: 2300 movs r3, #0 + 8003190: 4b07 ldr r3, [pc, #28] ; (80031b0 ) + 8003192: 6d1a ldr r2, [r3, #80] ; 0x50 + 8003194: 2380 movs r3, #128 ; 0x80 + 8003196: 009b lsls r3, r3, #2 + 8003198: 401a ands r2, r3 + 800319a: 2380 movs r3, #128 ; 0x80 + 800319c: 009b lsls r3, r3, #2 + 800319e: 429a cmp r2, r3 + 80031a0: d101 bne.n 80031a6 + 80031a2: 2301 movs r3, #1 + 80031a4: e000 b.n 80031a8 + 80031a6: 2300 movs r3, #0 } - 800315c: 0018 movs r0, r3 - 800315e: 46bd mov sp, r7 - 8003160: bd80 pop {r7, pc} - 8003162: 46c0 nop ; (mov r8, r8) - 8003164: 40021000 .word 0x40021000 + 80031a8: 0018 movs r0, r3 + 80031aa: 46bd mov sp, r7 + 80031ac: bd80 pop {r7, pc} + 80031ae: 46c0 nop ; (mov r8, r8) + 80031b0: 40021000 .word 0x40021000 -08003168 : +080031b4 : { - 8003168: b580 push {r7, lr} - 800316a: af00 add r7, sp, #0 + 80031b4: b580 push {r7, lr} + 80031b6: af00 add r7, sp, #0 return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSIRANGE)); - 800316c: 4b03 ldr r3, [pc, #12] ; (800317c ) - 800316e: 685a ldr r2, [r3, #4] - 8003170: 23e0 movs r3, #224 ; 0xe0 - 8003172: 021b lsls r3, r3, #8 - 8003174: 4013 ands r3, r2 + 80031b8: 4b03 ldr r3, [pc, #12] ; (80031c8 ) + 80031ba: 685a ldr r2, [r3, #4] + 80031bc: 23e0 movs r3, #224 ; 0xe0 + 80031be: 021b lsls r3, r3, #8 + 80031c0: 4013 ands r3, r2 } - 8003176: 0018 movs r0, r3 - 8003178: 46bd mov sp, r7 - 800317a: bd80 pop {r7, pc} - 800317c: 40021000 .word 0x40021000 + 80031c2: 0018 movs r0, r3 + 80031c4: 46bd mov sp, r7 + 80031c6: bd80 pop {r7, pc} + 80031c8: 40021000 .word 0x40021000 -08003180 : +080031cc : { - 8003180: b580 push {r7, lr} - 8003182: af00 add r7, sp, #0 + 80031cc: b580 push {r7, lr} + 80031ce: af00 add r7, sp, #0 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); - 8003184: 4b03 ldr r3, [pc, #12] ; (8003194 ) - 8003186: 68db ldr r3, [r3, #12] - 8003188: 220c movs r2, #12 - 800318a: 4013 ands r3, r2 -} - 800318c: 0018 movs r0, r3 - 800318e: 46bd mov sp, r7 - 8003190: bd80 pop {r7, pc} - 8003192: 46c0 nop ; (mov r8, r8) - 8003194: 40021000 .word 0x40021000 - -08003198 : -{ - 8003198: b580 push {r7, lr} - 800319a: af00 add r7, sp, #0 - return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)); - 800319c: 4b03 ldr r3, [pc, #12] ; (80031ac ) - 800319e: 68db ldr r3, [r3, #12] - 80031a0: 22f0 movs r2, #240 ; 0xf0 - 80031a2: 4013 ands r3, r2 -} - 80031a4: 0018 movs r0, r3 - 80031a6: 46bd mov sp, r7 - 80031a8: bd80 pop {r7, pc} - 80031aa: 46c0 nop ; (mov r8, r8) - 80031ac: 40021000 .word 0x40021000 - -080031b0 : -{ - 80031b0: b580 push {r7, lr} - 80031b2: af00 add r7, sp, #0 - return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1)); - 80031b4: 4b03 ldr r3, [pc, #12] ; (80031c4 ) - 80031b6: 68da ldr r2, [r3, #12] - 80031b8: 23e0 movs r3, #224 ; 0xe0 - 80031ba: 00db lsls r3, r3, #3 - 80031bc: 4013 ands r3, r2 -} - 80031be: 0018 movs r0, r3 - 80031c0: 46bd mov sp, r7 - 80031c2: bd80 pop {r7, pc} - 80031c4: 40021000 .word 0x40021000 - -080031c8 : -{ - 80031c8: b580 push {r7, lr} - 80031ca: b082 sub sp, #8 - 80031cc: af00 add r7, sp, #0 - 80031ce: 6078 str r0, [r7, #4] - return (uint32_t)(READ_BIT(RCC->CCIPR, LPUARTx)); - 80031d0: 4b03 ldr r3, [pc, #12] ; (80031e0 ) - 80031d2: 6cdb ldr r3, [r3, #76] ; 0x4c - 80031d4: 687a ldr r2, [r7, #4] + 80031d0: 4b03 ldr r3, [pc, #12] ; (80031e0 ) + 80031d2: 68db ldr r3, [r3, #12] + 80031d4: 220c movs r2, #12 80031d6: 4013 ands r3, r2 } 80031d8: 0018 movs r0, r3 80031da: 46bd mov sp, r7 - 80031dc: b002 add sp, #8 - 80031de: bd80 pop {r7, pc} + 80031dc: bd80 pop {r7, pc} + 80031de: 46c0 nop ; (mov r8, r8) 80031e0: 40021000 .word 0x40021000 -080031e4 : - * @retval Returned value can be one of the following values: - * @arg @ref LL_RCC_PLLSOURCE_HSI - * @arg @ref LL_RCC_PLLSOURCE_HSE - */ -__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void) +080031e4 : { 80031e4: b580 push {r7, lr} 80031e6: af00 add r7, sp, #0 - return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC)); - 80031e8: 4b03 ldr r3, [pc, #12] ; (80031f8 ) - 80031ea: 68da ldr r2, [r3, #12] - 80031ec: 2380 movs r3, #128 ; 0x80 - 80031ee: 025b lsls r3, r3, #9 - 80031f0: 4013 ands r3, r2 + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)); + 80031e8: 4b03 ldr r3, [pc, #12] ; (80031f8 ) + 80031ea: 68db ldr r3, [r3, #12] + 80031ec: 22f0 movs r2, #240 ; 0xf0 + 80031ee: 4013 ands r3, r2 } - 80031f2: 0018 movs r0, r3 - 80031f4: 46bd mov sp, r7 - 80031f6: bd80 pop {r7, pc} + 80031f0: 0018 movs r0, r3 + 80031f2: 46bd mov sp, r7 + 80031f4: bd80 pop {r7, pc} + 80031f6: 46c0 nop ; (mov r8, r8) 80031f8: 40021000 .word 0x40021000 -080031fc : - * @arg @ref LL_RCC_PLL_MUL_24 - * @arg @ref LL_RCC_PLL_MUL_32 - * @arg @ref LL_RCC_PLL_MUL_48 - */ -__STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void) +080031fc : { 80031fc: b580 push {r7, lr} 80031fe: af00 add r7, sp, #0 - return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL)); - 8003200: 4b03 ldr r3, [pc, #12] ; (8003210 ) + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1)); + 8003200: 4b03 ldr r3, [pc, #12] ; (8003210 ) 8003202: 68da ldr r2, [r3, #12] - 8003204: 23f0 movs r3, #240 ; 0xf0 - 8003206: 039b lsls r3, r3, #14 + 8003204: 23e0 movs r3, #224 ; 0xe0 + 8003206: 00db lsls r3, r3, #3 8003208: 4013 ands r3, r2 } 800320a: 0018 movs r0, r3 @@ -8552,791 +8553,851 @@ __STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void) 800320e: bd80 pop {r7, pc} 8003210: 40021000 .word 0x40021000 -08003214 : +08003214 : +{ + 8003214: b580 push {r7, lr} + 8003216: b082 sub sp, #8 + 8003218: af00 add r7, sp, #0 + 800321a: 6078 str r0, [r7, #4] + return (uint32_t)(READ_BIT(RCC->CCIPR, LPUARTx)); + 800321c: 4b03 ldr r3, [pc, #12] ; (800322c ) + 800321e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8003220: 687a ldr r2, [r7, #4] + 8003222: 4013 ands r3, r2 +} + 8003224: 0018 movs r0, r3 + 8003226: 46bd mov sp, r7 + 8003228: b002 add sp, #8 + 800322a: bd80 pop {r7, pc} + 800322c: 40021000 .word 0x40021000 + +08003230 : + * @retval Returned value can be one of the following values: + * @arg @ref LL_RCC_PLLSOURCE_HSI + * @arg @ref LL_RCC_PLLSOURCE_HSE + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void) +{ + 8003230: b580 push {r7, lr} + 8003232: af00 add r7, sp, #0 + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC)); + 8003234: 4b03 ldr r3, [pc, #12] ; (8003244 ) + 8003236: 68da ldr r2, [r3, #12] + 8003238: 2380 movs r3, #128 ; 0x80 + 800323a: 025b lsls r3, r3, #9 + 800323c: 4013 ands r3, r2 +} + 800323e: 0018 movs r0, r3 + 8003240: 46bd mov sp, r7 + 8003242: bd80 pop {r7, pc} + 8003244: 40021000 .word 0x40021000 + +08003248 : + * @arg @ref LL_RCC_PLL_MUL_24 + * @arg @ref LL_RCC_PLL_MUL_32 + * @arg @ref LL_RCC_PLL_MUL_48 + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void) +{ + 8003248: b580 push {r7, lr} + 800324a: af00 add r7, sp, #0 + return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL)); + 800324c: 4b03 ldr r3, [pc, #12] ; (800325c ) + 800324e: 68da ldr r2, [r3, #12] + 8003250: 23f0 movs r3, #240 ; 0xf0 + 8003252: 039b lsls r3, r3, #14 + 8003254: 4013 ands r3, r2 +} + 8003256: 0018 movs r0, r3 + 8003258: 46bd mov sp, r7 + 800325a: bd80 pop {r7, pc} + 800325c: 40021000 .word 0x40021000 + +08003260 : * @arg @ref LL_RCC_PLL_DIV_2 * @arg @ref LL_RCC_PLL_DIV_3 * @arg @ref LL_RCC_PLL_DIV_4 */ __STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void) { - 8003214: b580 push {r7, lr} - 8003216: af00 add r7, sp, #0 + 8003260: b580 push {r7, lr} + 8003262: af00 add r7, sp, #0 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV)); - 8003218: 4b03 ldr r3, [pc, #12] ; (8003228 ) - 800321a: 68da ldr r2, [r3, #12] - 800321c: 23c0 movs r3, #192 ; 0xc0 - 800321e: 041b lsls r3, r3, #16 - 8003220: 4013 ands r3, r2 + 8003264: 4b03 ldr r3, [pc, #12] ; (8003274 ) + 8003266: 68da ldr r2, [r3, #12] + 8003268: 23c0 movs r3, #192 ; 0xc0 + 800326a: 041b lsls r3, r3, #16 + 800326c: 4013 ands r3, r2 } - 8003222: 0018 movs r0, r3 - 8003224: 46bd mov sp, r7 - 8003226: bd80 pop {r7, pc} - 8003228: 40021000 .word 0x40021000 + 800326e: 0018 movs r0, r3 + 8003270: 46bd mov sp, r7 + 8003272: bd80 pop {r7, pc} + 8003274: 40021000 .word 0x40021000 -0800322c : +08003278 : * @brief Check if HSI Divider is enabled (it divides by 4) * @rmtoll CR HSIDIVF LL_RCC_IsActiveFlag_HSIDIV * @retval State of bit (1 or 0). */ __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIDIV(void) { - 800322c: b580 push {r7, lr} - 800322e: af00 add r7, sp, #0 + 8003278: b580 push {r7, lr} + 800327a: af00 add r7, sp, #0 return ((READ_BIT(RCC->CR, RCC_CR_HSIDIVF) == RCC_CR_HSIDIVF) ? 1UL : 0UL); - 8003230: 4b05 ldr r3, [pc, #20] ; (8003248 ) - 8003232: 681b ldr r3, [r3, #0] - 8003234: 2210 movs r2, #16 - 8003236: 4013 ands r3, r2 - 8003238: 2b10 cmp r3, #16 - 800323a: d101 bne.n 8003240 - 800323c: 2301 movs r3, #1 - 800323e: e000 b.n 8003242 - 8003240: 2300 movs r3, #0 + 800327c: 4b05 ldr r3, [pc, #20] ; (8003294 ) + 800327e: 681b ldr r3, [r3, #0] + 8003280: 2210 movs r2, #16 + 8003282: 4013 ands r3, r2 + 8003284: 2b10 cmp r3, #16 + 8003286: d101 bne.n 800328c + 8003288: 2301 movs r3, #1 + 800328a: e000 b.n 800328e + 800328c: 2300 movs r3, #0 } - 8003242: 0018 movs r0, r3 - 8003244: 46bd mov sp, r7 - 8003246: bd80 pop {r7, pc} - 8003248: 40021000 .word 0x40021000 + 800328e: 0018 movs r0, r3 + 8003290: 46bd mov sp, r7 + 8003292: bd80 pop {r7, pc} + 8003294: 40021000 .word 0x40021000 -0800324c : +08003298 : * @arg @ref LL_RCC_LPUART1_CLKSOURCE * @retval LPUART clock frequency (in Hz) * @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready */ uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource) { - 800324c: b580 push {r7, lr} - 800324e: b084 sub sp, #16 - 8003250: af00 add r7, sp, #0 - 8003252: 6078 str r0, [r7, #4] + 8003298: b580 push {r7, lr} + 800329a: b084 sub sp, #16 + 800329c: af00 add r7, sp, #0 + 800329e: 6078 str r0, [r7, #4] uint32_t lpuart_frequency = LL_RCC_PERIPH_FREQUENCY_NO; - 8003254: 2300 movs r3, #0 - 8003256: 60fb str r3, [r7, #12] + 80032a0: 2300 movs r3, #0 + 80032a2: 60fb str r3, [r7, #12] /* Check parameter */ assert_param(IS_LL_RCC_LPUART_CLKSOURCE(LPUARTxSource)); /* LPUART1CLK clock frequency */ switch (LL_RCC_GetLPUARTClockSource(LPUARTxSource)) - 8003258: 687b ldr r3, [r7, #4] - 800325a: 0018 movs r0, r3 - 800325c: f7ff ffb4 bl 80031c8 - 8003260: 0003 movs r3, r0 - 8003262: 22c0 movs r2, #192 ; 0xc0 - 8003264: 0112 lsls r2, r2, #4 - 8003266: 4293 cmp r3, r2 - 8003268: d01f beq.n 80032aa - 800326a: 22c0 movs r2, #192 ; 0xc0 - 800326c: 0112 lsls r2, r2, #4 - 800326e: 4293 cmp r3, r2 - 8003270: d823 bhi.n 80032ba - 8003272: 2280 movs r2, #128 ; 0x80 - 8003274: 00d2 lsls r2, r2, #3 - 8003276: 4293 cmp r3, r2 - 8003278: d004 beq.n 8003284 - 800327a: 2280 movs r2, #128 ; 0x80 - 800327c: 0112 lsls r2, r2, #4 - 800327e: 4293 cmp r3, r2 - 8003280: d005 beq.n 800328e - 8003282: e01a b.n 80032ba + 80032a4: 687b ldr r3, [r7, #4] + 80032a6: 0018 movs r0, r3 + 80032a8: f7ff ffb4 bl 8003214 + 80032ac: 0003 movs r3, r0 + 80032ae: 22c0 movs r2, #192 ; 0xc0 + 80032b0: 0112 lsls r2, r2, #4 + 80032b2: 4293 cmp r3, r2 + 80032b4: d01f beq.n 80032f6 + 80032b6: 22c0 movs r2, #192 ; 0xc0 + 80032b8: 0112 lsls r2, r2, #4 + 80032ba: 4293 cmp r3, r2 + 80032bc: d823 bhi.n 8003306 + 80032be: 2280 movs r2, #128 ; 0x80 + 80032c0: 00d2 lsls r2, r2, #3 + 80032c2: 4293 cmp r3, r2 + 80032c4: d004 beq.n 80032d0 + 80032c6: 2280 movs r2, #128 ; 0x80 + 80032c8: 0112 lsls r2, r2, #4 + 80032ca: 4293 cmp r3, r2 + 80032cc: d005 beq.n 80032da + 80032ce: e01a b.n 8003306 { case LL_RCC_LPUART1_CLKSOURCE_SYSCLK: /* LPUART1 Clock is System Clock */ lpuart_frequency = RCC_GetSystemClockFreq(); - 8003284: f000 f832 bl 80032ec - 8003288: 0003 movs r3, r0 - 800328a: 60fb str r3, [r7, #12] + 80032d0: f000 f832 bl 8003338 + 80032d4: 0003 movs r3, r0 + 80032d6: 60fb str r3, [r7, #12] break; - 800328c: e025 b.n 80032da + 80032d8: e025 b.n 8003326 case LL_RCC_LPUART1_CLKSOURCE_HSI: /* LPUART1 Clock is HSI Osc. */ if (LL_RCC_HSI_IsReady() != 0U) - 800328e: f7ff ff47 bl 8003120 - 8003292: 1e03 subs r3, r0, #0 - 8003294: d01e beq.n 80032d4 + 80032da: f7ff ff47 bl 800316c + 80032de: 1e03 subs r3, r0, #0 + 80032e0: d01e beq.n 8003320 { if (LL_RCC_IsActiveFlag_HSIDIV() != 0U) - 8003296: f7ff ffc9 bl 800322c - 800329a: 1e03 subs r3, r0, #0 - 800329c: d002 beq.n 80032a4 + 80032e2: f7ff ffc9 bl 8003278 + 80032e6: 1e03 subs r3, r0, #0 + 80032e8: d002 beq.n 80032f0 { lpuart_frequency = (HSI_VALUE >> 2U); - 800329e: 4b11 ldr r3, [pc, #68] ; (80032e4 ) - 80032a0: 60fb str r3, [r7, #12] + 80032ea: 4b11 ldr r3, [pc, #68] ; (8003330 ) + 80032ec: 60fb str r3, [r7, #12] else { lpuart_frequency = HSI_VALUE; } } break; - 80032a2: e017 b.n 80032d4 + 80032ee: e017 b.n 8003320 lpuart_frequency = HSI_VALUE; - 80032a4: 4b10 ldr r3, [pc, #64] ; (80032e8 ) - 80032a6: 60fb str r3, [r7, #12] + 80032f0: 4b10 ldr r3, [pc, #64] ; (8003334 ) + 80032f2: 60fb str r3, [r7, #12] break; - 80032a8: e014 b.n 80032d4 + 80032f4: e014 b.n 8003320 case LL_RCC_LPUART1_CLKSOURCE_LSE: /* LPUART1 Clock is LSE Osc. */ if (LL_RCC_LSE_IsReady() != 0U) - 80032aa: f7ff ff49 bl 8003140 - 80032ae: 1e03 subs r3, r0, #0 - 80032b0: d012 beq.n 80032d8 + 80032f6: f7ff ff49 bl 800318c + 80032fa: 1e03 subs r3, r0, #0 + 80032fc: d012 beq.n 8003324 { lpuart_frequency = LSE_VALUE; - 80032b2: 2380 movs r3, #128 ; 0x80 - 80032b4: 021b lsls r3, r3, #8 - 80032b6: 60fb str r3, [r7, #12] + 80032fe: 2380 movs r3, #128 ; 0x80 + 8003300: 021b lsls r3, r3, #8 + 8003302: 60fb str r3, [r7, #12] } break; - 80032b8: e00e b.n 80032d8 + 8003304: e00e b.n 8003324 case LL_RCC_LPUART1_CLKSOURCE_PCLK1: /* LPUART1 Clock is PCLK1 */ default: lpuart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); - 80032ba: f000 f817 bl 80032ec - 80032be: 0003 movs r3, r0 - 80032c0: 0018 movs r0, r3 - 80032c2: f000 f857 bl 8003374 - 80032c6: 0003 movs r3, r0 - 80032c8: 0018 movs r0, r3 - 80032ca: f000 f869 bl 80033a0 - 80032ce: 0003 movs r3, r0 - 80032d0: 60fb str r3, [r7, #12] + 8003306: f000 f817 bl 8003338 + 800330a: 0003 movs r3, r0 + 800330c: 0018 movs r0, r3 + 800330e: f000 f857 bl 80033c0 + 8003312: 0003 movs r3, r0 + 8003314: 0018 movs r0, r3 + 8003316: f000 f869 bl 80033ec + 800331a: 0003 movs r3, r0 + 800331c: 60fb str r3, [r7, #12] break; - 80032d2: e002 b.n 80032da + 800331e: e002 b.n 8003326 break; - 80032d4: 46c0 nop ; (mov r8, r8) - 80032d6: e000 b.n 80032da + 8003320: 46c0 nop ; (mov r8, r8) + 8003322: e000 b.n 8003326 break; - 80032d8: 46c0 nop ; (mov r8, r8) + 8003324: 46c0 nop ; (mov r8, r8) } return lpuart_frequency; - 80032da: 68fb ldr r3, [r7, #12] + 8003326: 68fb ldr r3, [r7, #12] } - 80032dc: 0018 movs r0, r3 - 80032de: 46bd mov sp, r7 - 80032e0: b004 add sp, #16 - 80032e2: bd80 pop {r7, pc} - 80032e4: 003d0900 .word 0x003d0900 - 80032e8: 00f42400 .word 0x00f42400 + 8003328: 0018 movs r0, r3 + 800332a: 46bd mov sp, r7 + 800332c: b004 add sp, #16 + 800332e: bd80 pop {r7, pc} + 8003330: 003d0900 .word 0x003d0900 + 8003334: 00f42400 .word 0x00f42400 -080032ec : +08003338 : /** * @brief Return SYSTEM clock frequency * @retval SYSTEM clock frequency (in Hz) */ uint32_t RCC_GetSystemClockFreq(void) { - 80032ec: b580 push {r7, lr} - 80032ee: b082 sub sp, #8 - 80032f0: af00 add r7, sp, #0 + 8003338: b580 push {r7, lr} + 800333a: b082 sub sp, #8 + 800333c: af00 add r7, sp, #0 uint32_t frequency; /* Get SYSCLK source -------------------------------------------------------*/ switch (LL_RCC_GetSysClkSource()) - 80032f2: f7ff ff45 bl 8003180 - 80032f6: 0003 movs r3, r0 - 80032f8: 2b0c cmp r3, #12 - 80032fa: d020 beq.n 800333e - 80032fc: d824 bhi.n 8003348 - 80032fe: 2b08 cmp r3, #8 - 8003300: d01a beq.n 8003338 - 8003302: d821 bhi.n 8003348 - 8003304: 2b00 cmp r3, #0 - 8003306: d002 beq.n 800330e - 8003308: 2b04 cmp r3, #4 - 800330a: d00b beq.n 8003324 - 800330c: e01c b.n 8003348 + 800333e: f7ff ff45 bl 80031cc + 8003342: 0003 movs r3, r0 + 8003344: 2b0c cmp r3, #12 + 8003346: d020 beq.n 800338a + 8003348: d824 bhi.n 8003394 + 800334a: 2b08 cmp r3, #8 + 800334c: d01a beq.n 8003384 + 800334e: d821 bhi.n 8003394 + 8003350: 2b00 cmp r3, #0 + 8003352: d002 beq.n 800335a + 8003354: 2b04 cmp r3, #4 + 8003356: d00b beq.n 8003370 + 8003358: e01c b.n 8003394 { case LL_RCC_SYS_CLKSOURCE_STATUS_MSI: /* MSI used as system clock source */ frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange()); - 800330e: f7ff ff2b bl 8003168 - 8003312: 0003 movs r3, r0 - 8003314: 0b5b lsrs r3, r3, #13 - 8003316: 3301 adds r3, #1 - 8003318: 2280 movs r2, #128 ; 0x80 - 800331a: 0212 lsls r2, r2, #8 - 800331c: 409a lsls r2, r3 - 800331e: 0013 movs r3, r2 - 8003320: 607b str r3, [r7, #4] + 800335a: f7ff ff2b bl 80031b4 + 800335e: 0003 movs r3, r0 + 8003360: 0b5b lsrs r3, r3, #13 + 8003362: 3301 adds r3, #1 + 8003364: 2280 movs r2, #128 ; 0x80 + 8003366: 0212 lsls r2, r2, #8 + 8003368: 409a lsls r2, r3 + 800336a: 0013 movs r3, r2 + 800336c: 607b str r3, [r7, #4] break; - 8003322: e01c b.n 800335e + 800336e: e01c b.n 80033aa case LL_RCC_SYS_CLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ if (LL_RCC_IsActiveFlag_HSIDIV() != 0U) - 8003324: f7ff ff82 bl 800322c - 8003328: 1e03 subs r3, r0, #0 - 800332a: d002 beq.n 8003332 + 8003370: f7ff ff82 bl 8003278 + 8003374: 1e03 subs r3, r0, #0 + 8003376: d002 beq.n 800337e { frequency = (HSI_VALUE >> 2U); - 800332c: 4b0e ldr r3, [pc, #56] ; (8003368 ) - 800332e: 607b str r3, [r7, #4] + 8003378: 4b0e ldr r3, [pc, #56] ; (80033b4 ) + 800337a: 607b str r3, [r7, #4] } else { frequency = HSI_VALUE; } break; - 8003330: e015 b.n 800335e + 800337c: e015 b.n 80033aa frequency = HSI_VALUE; - 8003332: 4b0e ldr r3, [pc, #56] ; (800336c ) - 8003334: 607b str r3, [r7, #4] + 800337e: 4b0e ldr r3, [pc, #56] ; (80033b8 ) + 8003380: 607b str r3, [r7, #4] break; - 8003336: e012 b.n 800335e + 8003382: e012 b.n 80033aa case LL_RCC_SYS_CLKSOURCE_STATUS_HSE: /* HSE used as system clock source */ frequency = HSE_VALUE; - 8003338: 4b0d ldr r3, [pc, #52] ; (8003370 ) - 800333a: 607b str r3, [r7, #4] + 8003384: 4b0d ldr r3, [pc, #52] ; (80033bc ) + 8003386: 607b str r3, [r7, #4] break; - 800333c: e00f b.n 800335e + 8003388: e00f b.n 80033aa case LL_RCC_SYS_CLKSOURCE_STATUS_PLL: /* PLL used as system clock source */ frequency = RCC_PLL_GetFreqDomain_SYS(); - 800333e: f000 f843 bl 80033c8 - 8003342: 0003 movs r3, r0 - 8003344: 607b str r3, [r7, #4] + 800338a: f000 f843 bl 8003414 + 800338e: 0003 movs r3, r0 + 8003390: 607b str r3, [r7, #4] break; - 8003346: e00a b.n 800335e + 8003392: e00a b.n 80033aa default: frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange()); - 8003348: f7ff ff0e bl 8003168 - 800334c: 0003 movs r3, r0 - 800334e: 0b5b lsrs r3, r3, #13 - 8003350: 3301 adds r3, #1 - 8003352: 2280 movs r2, #128 ; 0x80 - 8003354: 0212 lsls r2, r2, #8 - 8003356: 409a lsls r2, r3 - 8003358: 0013 movs r3, r2 - 800335a: 607b str r3, [r7, #4] + 8003394: f7ff ff0e bl 80031b4 + 8003398: 0003 movs r3, r0 + 800339a: 0b5b lsrs r3, r3, #13 + 800339c: 3301 adds r3, #1 + 800339e: 2280 movs r2, #128 ; 0x80 + 80033a0: 0212 lsls r2, r2, #8 + 80033a2: 409a lsls r2, r3 + 80033a4: 0013 movs r3, r2 + 80033a6: 607b str r3, [r7, #4] break; - 800335c: 46c0 nop ; (mov r8, r8) + 80033a8: 46c0 nop ; (mov r8, r8) } return frequency; - 800335e: 687b ldr r3, [r7, #4] + 80033aa: 687b ldr r3, [r7, #4] } - 8003360: 0018 movs r0, r3 - 8003362: 46bd mov sp, r7 - 8003364: b002 add sp, #8 - 8003366: bd80 pop {r7, pc} - 8003368: 003d0900 .word 0x003d0900 - 800336c: 00f42400 .word 0x00f42400 - 8003370: 007a1200 .word 0x007a1200 + 80033ac: 0018 movs r0, r3 + 80033ae: 46bd mov sp, r7 + 80033b0: b002 add sp, #8 + 80033b2: bd80 pop {r7, pc} + 80033b4: 003d0900 .word 0x003d0900 + 80033b8: 00f42400 .word 0x00f42400 + 80033bc: 007a1200 .word 0x007a1200 -08003374 : +080033c0 : * @brief Return HCLK clock frequency * @param SYSCLK_Frequency SYSCLK clock frequency * @retval HCLK clock frequency (in Hz) */ uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency) { - 8003374: b580 push {r7, lr} - 8003376: b082 sub sp, #8 - 8003378: af00 add r7, sp, #0 - 800337a: 6078 str r0, [r7, #4] + 80033c0: b580 push {r7, lr} + 80033c2: b082 sub sp, #8 + 80033c4: af00 add r7, sp, #0 + 80033c6: 6078 str r0, [r7, #4] /* HCLK clock frequency */ return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler()); - 800337c: f7ff ff0c bl 8003198 - 8003380: 0003 movs r3, r0 - 8003382: 091b lsrs r3, r3, #4 - 8003384: 220f movs r2, #15 - 8003386: 4013 ands r3, r2 - 8003388: 4a04 ldr r2, [pc, #16] ; (800339c ) - 800338a: 5cd3 ldrb r3, [r2, r3] - 800338c: 001a movs r2, r3 - 800338e: 687b ldr r3, [r7, #4] - 8003390: 40d3 lsrs r3, r2 + 80033c8: f7ff ff0c bl 80031e4 + 80033cc: 0003 movs r3, r0 + 80033ce: 091b lsrs r3, r3, #4 + 80033d0: 220f movs r2, #15 + 80033d2: 4013 ands r3, r2 + 80033d4: 4a04 ldr r2, [pc, #16] ; (80033e8 ) + 80033d6: 5cd3 ldrb r3, [r2, r3] + 80033d8: 001a movs r2, r3 + 80033da: 687b ldr r3, [r7, #4] + 80033dc: 40d3 lsrs r3, r2 } - 8003392: 0018 movs r0, r3 - 8003394: 46bd mov sp, r7 - 8003396: b002 add sp, #8 - 8003398: bd80 pop {r7, pc} - 800339a: 46c0 nop ; (mov r8, r8) - 800339c: 08003720 .word 0x08003720 + 80033de: 0018 movs r0, r3 + 80033e0: 46bd mov sp, r7 + 80033e2: b002 add sp, #8 + 80033e4: bd80 pop {r7, pc} + 80033e6: 46c0 nop ; (mov r8, r8) + 80033e8: 0800376c .word 0x0800376c -080033a0 : +080033ec : * @brief Return PCLK1 clock frequency * @param HCLK_Frequency HCLK clock frequency * @retval PCLK1 clock frequency (in Hz) */ uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency) { - 80033a0: b580 push {r7, lr} - 80033a2: b082 sub sp, #8 - 80033a4: af00 add r7, sp, #0 - 80033a6: 6078 str r0, [r7, #4] + 80033ec: b580 push {r7, lr} + 80033ee: b082 sub sp, #8 + 80033f0: af00 add r7, sp, #0 + 80033f2: 6078 str r0, [r7, #4] /* PCLK1 clock frequency */ return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler()); - 80033a8: f7ff ff02 bl 80031b0 - 80033ac: 0003 movs r3, r0 - 80033ae: 0a1b lsrs r3, r3, #8 - 80033b0: 4a04 ldr r2, [pc, #16] ; (80033c4 ) - 80033b2: 5cd3 ldrb r3, [r2, r3] - 80033b4: 001a movs r2, r3 - 80033b6: 687b ldr r3, [r7, #4] - 80033b8: 40d3 lsrs r3, r2 + 80033f4: f7ff ff02 bl 80031fc + 80033f8: 0003 movs r3, r0 + 80033fa: 0a1b lsrs r3, r3, #8 + 80033fc: 4a04 ldr r2, [pc, #16] ; (8003410 ) + 80033fe: 5cd3 ldrb r3, [r2, r3] + 8003400: 001a movs r2, r3 + 8003402: 687b ldr r3, [r7, #4] + 8003404: 40d3 lsrs r3, r2 } - 80033ba: 0018 movs r0, r3 - 80033bc: 46bd mov sp, r7 - 80033be: b002 add sp, #8 - 80033c0: bd80 pop {r7, pc} - 80033c2: 46c0 nop ; (mov r8, r8) - 80033c4: 08003730 .word 0x08003730 + 8003406: 0018 movs r0, r3 + 8003408: 46bd mov sp, r7 + 800340a: b002 add sp, #8 + 800340c: bd80 pop {r7, pc} + 800340e: 46c0 nop ; (mov r8, r8) + 8003410: 0800377c .word 0x0800377c -080033c8 : +08003414 : /** * @brief Return PLL clock frequency used for system domain * @retval PLL clock frequency (in Hz) */ uint32_t RCC_PLL_GetFreqDomain_SYS(void) { - 80033c8: b590 push {r4, r7, lr} - 80033ca: b083 sub sp, #12 - 80033cc: af00 add r7, sp, #0 + 8003414: b590 push {r4, r7, lr} + 8003416: b083 sub sp, #12 + 8003418: af00 add r7, sp, #0 uint32_t pllinputfreq, pllsource; /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL divider) * PLL Multiplicator */ /* Get PLL source */ pllsource = LL_RCC_PLL_GetMainSource(); - 80033ce: f7ff ff09 bl 80031e4 - 80033d2: 0003 movs r3, r0 - 80033d4: 603b str r3, [r7, #0] + 800341a: f7ff ff09 bl 8003230 + 800341e: 0003 movs r3, r0 + 8003420: 603b str r3, [r7, #0] switch (pllsource) - 80033d6: 683b ldr r3, [r7, #0] - 80033d8: 2b00 cmp r3, #0 - 80033da: d109 bne.n 80033f0 + 8003422: 683b ldr r3, [r7, #0] + 8003424: 2b00 cmp r3, #0 + 8003426: d109 bne.n 800343c { case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (LL_RCC_IsActiveFlag_HSIDIV() != 0U) - 80033dc: f7ff ff26 bl 800322c - 80033e0: 1e03 subs r3, r0, #0 - 80033e2: d002 beq.n 80033ea + 8003428: f7ff ff26 bl 8003278 + 800342c: 1e03 subs r3, r0, #0 + 800342e: d002 beq.n 8003436 { pllinputfreq = (HSI_VALUE >> 2U); - 80033e4: 4b10 ldr r3, [pc, #64] ; (8003428 ) - 80033e6: 607b str r3, [r7, #4] + 8003430: 4b10 ldr r3, [pc, #64] ; (8003474 ) + 8003432: 607b str r3, [r7, #4] } else { pllinputfreq = HSI_VALUE; } break; - 80033e8: e005 b.n 80033f6 + 8003434: e005 b.n 8003442 pllinputfreq = HSI_VALUE; - 80033ea: 4b10 ldr r3, [pc, #64] ; (800342c ) - 80033ec: 607b str r3, [r7, #4] + 8003436: 4b10 ldr r3, [pc, #64] ; (8003478 ) + 8003438: 607b str r3, [r7, #4] break; - 80033ee: e002 b.n 80033f6 + 800343a: e002 b.n 8003442 default: /* HSE used as PLL clock source */ pllinputfreq = HSE_VALUE; - 80033f0: 4b0f ldr r3, [pc, #60] ; (8003430 ) - 80033f2: 607b str r3, [r7, #4] + 800343c: 4b0f ldr r3, [pc, #60] ; (800347c ) + 800343e: 607b str r3, [r7, #4] break; - 80033f4: 46c0 nop ; (mov r8, r8) + 8003440: 46c0 nop ; (mov r8, r8) } return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator(), LL_RCC_PLL_GetDivider()); - 80033f6: f7ff ff01 bl 80031fc - 80033fa: 0003 movs r3, r0 - 80033fc: 0c9b lsrs r3, r3, #18 - 80033fe: 4a0d ldr r2, [pc, #52] ; (8003434 ) - 8003400: 5cd3 ldrb r3, [r2, r3] - 8003402: 001a movs r2, r3 - 8003404: 687b ldr r3, [r7, #4] - 8003406: 4353 muls r3, r2 - 8003408: 001c movs r4, r3 - 800340a: f7ff ff03 bl 8003214 - 800340e: 0003 movs r3, r0 - 8003410: 0d9b lsrs r3, r3, #22 - 8003412: 3301 adds r3, #1 - 8003414: 0019 movs r1, r3 - 8003416: 0020 movs r0, r4 - 8003418: f7fc fe76 bl 8000108 <__udivsi3> - 800341c: 0003 movs r3, r0 + 8003442: f7ff ff01 bl 8003248 + 8003446: 0003 movs r3, r0 + 8003448: 0c9b lsrs r3, r3, #18 + 800344a: 4a0d ldr r2, [pc, #52] ; (8003480 ) + 800344c: 5cd3 ldrb r3, [r2, r3] + 800344e: 001a movs r2, r3 + 8003450: 687b ldr r3, [r7, #4] + 8003452: 4353 muls r3, r2 + 8003454: 001c movs r4, r3 + 8003456: f7ff ff03 bl 8003260 + 800345a: 0003 movs r3, r0 + 800345c: 0d9b lsrs r3, r3, #22 + 800345e: 3301 adds r3, #1 + 8003460: 0019 movs r1, r3 + 8003462: 0020 movs r0, r4 + 8003464: f7fc fe50 bl 8000108 <__udivsi3> + 8003468: 0003 movs r3, r0 } - 800341e: 0018 movs r0, r3 - 8003420: 46bd mov sp, r7 - 8003422: b003 add sp, #12 - 8003424: bd90 pop {r4, r7, pc} - 8003426: 46c0 nop ; (mov r8, r8) - 8003428: 003d0900 .word 0x003d0900 - 800342c: 00f42400 .word 0x00f42400 - 8003430: 007a1200 .word 0x007a1200 - 8003434: 08003738 .word 0x08003738 + 800346a: 0018 movs r0, r3 + 800346c: 46bd mov sp, r7 + 800346e: b003 add sp, #12 + 8003470: bd90 pop {r4, r7, pc} + 8003472: 46c0 nop ; (mov r8, r8) + 8003474: 003d0900 .word 0x003d0900 + 8003478: 00f42400 .word 0x00f42400 + 800347c: 007a1200 .word 0x007a1200 + 8003480: 08003784 .word 0x08003784 -08003438 : +08003484 : { - 8003438: b580 push {r7, lr} - 800343a: b082 sub sp, #8 - 800343c: af00 add r7, sp, #0 - 800343e: 6078 str r0, [r7, #4] - 8003440: 6039 str r1, [r7, #0] + 8003484: b580 push {r7, lr} + 8003486: b082 sub sp, #8 + 8003488: af00 add r7, sp, #0 + 800348a: 6078 str r0, [r7, #4] + 800348c: 6039 str r1, [r7, #0] WRITE_REG(TIMx->PSC, Prescaler); - 8003442: 687b ldr r3, [r7, #4] - 8003444: 683a ldr r2, [r7, #0] - 8003446: 629a str r2, [r3, #40] ; 0x28 + 800348e: 687b ldr r3, [r7, #4] + 8003490: 683a ldr r2, [r7, #0] + 8003492: 629a str r2, [r3, #40] ; 0x28 } - 8003448: 46c0 nop ; (mov r8, r8) - 800344a: 46bd mov sp, r7 - 800344c: b002 add sp, #8 - 800344e: bd80 pop {r7, pc} + 8003494: 46c0 nop ; (mov r8, r8) + 8003496: 46bd mov sp, r7 + 8003498: b002 add sp, #8 + 800349a: bd80 pop {r7, pc} -08003450 : +0800349c : { - 8003450: b580 push {r7, lr} - 8003452: b082 sub sp, #8 - 8003454: af00 add r7, sp, #0 - 8003456: 6078 str r0, [r7, #4] - 8003458: 6039 str r1, [r7, #0] + 800349c: b580 push {r7, lr} + 800349e: b082 sub sp, #8 + 80034a0: af00 add r7, sp, #0 + 80034a2: 6078 str r0, [r7, #4] + 80034a4: 6039 str r1, [r7, #0] WRITE_REG(TIMx->ARR, AutoReload); - 800345a: 687b ldr r3, [r7, #4] - 800345c: 683a ldr r2, [r7, #0] - 800345e: 62da str r2, [r3, #44] ; 0x2c + 80034a6: 687b ldr r3, [r7, #4] + 80034a8: 683a ldr r2, [r7, #0] + 80034aa: 62da str r2, [r3, #44] ; 0x2c } - 8003460: 46c0 nop ; (mov r8, r8) - 8003462: 46bd mov sp, r7 - 8003464: b002 add sp, #8 - 8003466: bd80 pop {r7, pc} + 80034ac: 46c0 nop ; (mov r8, r8) + 80034ae: 46bd mov sp, r7 + 80034b0: b002 add sp, #8 + 80034b2: bd80 pop {r7, pc} -08003468 : +080034b4 : * @rmtoll EGR UG LL_TIM_GenerateEvent_UPDATE * @param TIMx Timer instance * @retval None */ __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx) { - 8003468: b580 push {r7, lr} - 800346a: b082 sub sp, #8 - 800346c: af00 add r7, sp, #0 - 800346e: 6078 str r0, [r7, #4] + 80034b4: b580 push {r7, lr} + 80034b6: b082 sub sp, #8 + 80034b8: af00 add r7, sp, #0 + 80034ba: 6078 str r0, [r7, #4] SET_BIT(TIMx->EGR, TIM_EGR_UG); - 8003470: 687b ldr r3, [r7, #4] - 8003472: 695b ldr r3, [r3, #20] - 8003474: 2201 movs r2, #1 - 8003476: 431a orrs r2, r3 - 8003478: 687b ldr r3, [r7, #4] - 800347a: 615a str r2, [r3, #20] + 80034bc: 687b ldr r3, [r7, #4] + 80034be: 695b ldr r3, [r3, #20] + 80034c0: 2201 movs r2, #1 + 80034c2: 431a orrs r2, r3 + 80034c4: 687b ldr r3, [r7, #4] + 80034c6: 615a str r2, [r3, #20] } - 800347c: 46c0 nop ; (mov r8, r8) - 800347e: 46bd mov sp, r7 - 8003480: b002 add sp, #8 - 8003482: bd80 pop {r7, pc} + 80034c8: 46c0 nop ; (mov r8, r8) + 80034ca: 46bd mov sp, r7 + 80034cc: b002 add sp, #8 + 80034ce: bd80 pop {r7, pc} -08003484 : +080034d0 : * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx registers are de-initialized * - ERROR: not applicable */ ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct) { - 8003484: b580 push {r7, lr} - 8003486: b084 sub sp, #16 - 8003488: af00 add r7, sp, #0 - 800348a: 6078 str r0, [r7, #4] - 800348c: 6039 str r1, [r7, #0] + 80034d0: b580 push {r7, lr} + 80034d2: b084 sub sp, #16 + 80034d4: af00 add r7, sp, #0 + 80034d6: 6078 str r0, [r7, #4] + 80034d8: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(TIMx)); assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode)); assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision)); tmpcr1 = LL_TIM_ReadReg(TIMx, CR1); - 800348e: 687b ldr r3, [r7, #4] - 8003490: 681b ldr r3, [r3, #0] - 8003492: 60fb str r3, [r7, #12] + 80034da: 687b ldr r3, [r7, #4] + 80034dc: 681b ldr r3, [r3, #0] + 80034de: 60fb str r3, [r7, #12] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8003494: 687a ldr r2, [r7, #4] - 8003496: 2380 movs r3, #128 ; 0x80 - 8003498: 05db lsls r3, r3, #23 - 800349a: 429a cmp r2, r3 - 800349c: d003 beq.n 80034a6 - 800349e: 687b ldr r3, [r7, #4] - 80034a0: 4a1a ldr r2, [pc, #104] ; (800350c ) - 80034a2: 4293 cmp r3, r2 - 80034a4: d107 bne.n 80034b6 + 80034e0: 687a ldr r2, [r7, #4] + 80034e2: 2380 movs r3, #128 ; 0x80 + 80034e4: 05db lsls r3, r3, #23 + 80034e6: 429a cmp r2, r3 + 80034e8: d003 beq.n 80034f2 + 80034ea: 687b ldr r3, [r7, #4] + 80034ec: 4a1a ldr r2, [pc, #104] ; (8003558 ) + 80034ee: 4293 cmp r3, r2 + 80034f0: d107 bne.n 8003502 { /* Select the Counter Mode */ MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode); - 80034a6: 68fb ldr r3, [r7, #12] - 80034a8: 2270 movs r2, #112 ; 0x70 - 80034aa: 4393 bics r3, r2 - 80034ac: 001a movs r2, r3 - 80034ae: 683b ldr r3, [r7, #0] - 80034b0: 685b ldr r3, [r3, #4] - 80034b2: 4313 orrs r3, r2 - 80034b4: 60fb str r3, [r7, #12] + 80034f2: 68fb ldr r3, [r7, #12] + 80034f4: 2270 movs r2, #112 ; 0x70 + 80034f6: 4393 bics r3, r2 + 80034f8: 001a movs r2, r3 + 80034fa: 683b ldr r3, [r7, #0] + 80034fc: 685b ldr r3, [r3, #4] + 80034fe: 4313 orrs r3, r2 + 8003500: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 80034b6: 687a ldr r2, [r7, #4] - 80034b8: 2380 movs r3, #128 ; 0x80 - 80034ba: 05db lsls r3, r3, #23 - 80034bc: 429a cmp r2, r3 - 80034be: d003 beq.n 80034c8 - 80034c0: 687b ldr r3, [r7, #4] - 80034c2: 4a12 ldr r2, [pc, #72] ; (800350c ) - 80034c4: 4293 cmp r3, r2 - 80034c6: d106 bne.n 80034d6 + 8003502: 687a ldr r2, [r7, #4] + 8003504: 2380 movs r3, #128 ; 0x80 + 8003506: 05db lsls r3, r3, #23 + 8003508: 429a cmp r2, r3 + 800350a: d003 beq.n 8003514 + 800350c: 687b ldr r3, [r7, #4] + 800350e: 4a12 ldr r2, [pc, #72] ; (8003558 ) + 8003510: 4293 cmp r3, r2 + 8003512: d106 bne.n 8003522 { /* Set the clock division */ MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision); - 80034c8: 68fb ldr r3, [r7, #12] - 80034ca: 4a11 ldr r2, [pc, #68] ; (8003510 ) - 80034cc: 401a ands r2, r3 - 80034ce: 683b ldr r3, [r7, #0] - 80034d0: 68db ldr r3, [r3, #12] - 80034d2: 4313 orrs r3, r2 - 80034d4: 60fb str r3, [r7, #12] + 8003514: 68fb ldr r3, [r7, #12] + 8003516: 4a11 ldr r2, [pc, #68] ; (800355c ) + 8003518: 401a ands r2, r3 + 800351a: 683b ldr r3, [r7, #0] + 800351c: 68db ldr r3, [r3, #12] + 800351e: 4313 orrs r3, r2 + 8003520: 60fb str r3, [r7, #12] } /* Write to TIMx CR1 */ LL_TIM_WriteReg(TIMx, CR1, tmpcr1); - 80034d6: 687b ldr r3, [r7, #4] - 80034d8: 68fa ldr r2, [r7, #12] - 80034da: 601a str r2, [r3, #0] + 8003522: 687b ldr r3, [r7, #4] + 8003524: 68fa ldr r2, [r7, #12] + 8003526: 601a str r2, [r3, #0] /* Set the Autoreload value */ LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload); - 80034dc: 683b ldr r3, [r7, #0] - 80034de: 689a ldr r2, [r3, #8] - 80034e0: 687b ldr r3, [r7, #4] - 80034e2: 0011 movs r1, r2 - 80034e4: 0018 movs r0, r3 - 80034e6: f7ff ffb3 bl 8003450 + 8003528: 683b ldr r3, [r7, #0] + 800352a: 689a ldr r2, [r3, #8] + 800352c: 687b ldr r3, [r7, #4] + 800352e: 0011 movs r1, r2 + 8003530: 0018 movs r0, r3 + 8003532: f7ff ffb3 bl 800349c /* Set the Prescaler value */ LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler); - 80034ea: 683b ldr r3, [r7, #0] - 80034ec: 881b ldrh r3, [r3, #0] - 80034ee: 001a movs r2, r3 - 80034f0: 687b ldr r3, [r7, #4] - 80034f2: 0011 movs r1, r2 - 80034f4: 0018 movs r0, r3 - 80034f6: f7ff ff9f bl 8003438 + 8003536: 683b ldr r3, [r7, #0] + 8003538: 881b ldrh r3, [r3, #0] + 800353a: 001a movs r2, r3 + 800353c: 687b ldr r3, [r7, #4] + 800353e: 0011 movs r1, r2 + 8003540: 0018 movs r0, r3 + 8003542: f7ff ff9f bl 8003484 /* Generate an update event to reload the Prescaler and the repetition counter value (if applicable) immediately */ LL_TIM_GenerateEvent_UPDATE(TIMx); - 80034fa: 687b ldr r3, [r7, #4] - 80034fc: 0018 movs r0, r3 - 80034fe: f7ff ffb3 bl 8003468 + 8003546: 687b ldr r3, [r7, #4] + 8003548: 0018 movs r0, r3 + 800354a: f7ff ffb3 bl 80034b4 return SUCCESS; - 8003502: 2300 movs r3, #0 + 800354e: 2300 movs r3, #0 } - 8003504: 0018 movs r0, r3 - 8003506: 46bd mov sp, r7 - 8003508: b004 add sp, #16 - 800350a: bd80 pop {r7, pc} - 800350c: 40010800 .word 0x40010800 - 8003510: fffffcff .word 0xfffffcff + 8003550: 0018 movs r0, r3 + 8003552: 46bd mov sp, r7 + 8003554: b004 add sp, #16 + 8003556: bd80 pop {r7, pc} + 8003558: 40010800 .word 0x40010800 + 800355c: fffffcff .word 0xfffffcff -08003514 : +08003560 : * configuration by calling this function, for a delay use rather osDelay RTOS service. * @param Ticks Number of ticks * @retval None */ __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) { - 8003514: b580 push {r7, lr} - 8003516: b082 sub sp, #8 - 8003518: af00 add r7, sp, #0 - 800351a: 6078 str r0, [r7, #4] - 800351c: 6039 str r1, [r7, #0] + 8003560: b580 push {r7, lr} + 8003562: b082 sub sp, #8 + 8003564: af00 add r7, sp, #0 + 8003566: 6078 str r0, [r7, #4] + 8003568: 6039 str r1, [r7, #0] /* Configure the SysTick to have interrupt in 1ms time base */ SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ - 800351e: 6839 ldr r1, [r7, #0] - 8003520: 6878 ldr r0, [r7, #4] - 8003522: f7fc fdf1 bl 8000108 <__udivsi3> - 8003526: 0003 movs r3, r0 - 8003528: 001a movs r2, r3 - 800352a: 4b06 ldr r3, [pc, #24] ; (8003544 ) - 800352c: 3a01 subs r2, #1 - 800352e: 605a str r2, [r3, #4] + 800356a: 6839 ldr r1, [r7, #0] + 800356c: 6878 ldr r0, [r7, #4] + 800356e: f7fc fdcb bl 8000108 <__udivsi3> + 8003572: 0003 movs r3, r0 + 8003574: 001a movs r2, r3 + 8003576: 4b06 ldr r3, [pc, #24] ; (8003590 ) + 8003578: 3a01 subs r2, #1 + 800357a: 605a str r2, [r3, #4] SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8003530: 4b04 ldr r3, [pc, #16] ; (8003544 ) - 8003532: 2200 movs r2, #0 - 8003534: 609a str r2, [r3, #8] + 800357c: 4b04 ldr r3, [pc, #16] ; (8003590 ) + 800357e: 2200 movs r2, #0 + 8003580: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8003536: 4b03 ldr r3, [pc, #12] ; (8003544 ) - 8003538: 2205 movs r2, #5 - 800353a: 601a str r2, [r3, #0] + 8003582: 4b03 ldr r3, [pc, #12] ; (8003590 ) + 8003584: 2205 movs r2, #5 + 8003586: 601a str r2, [r3, #0] SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ } - 800353c: 46c0 nop ; (mov r8, r8) - 800353e: 46bd mov sp, r7 - 8003540: b002 add sp, #8 - 8003542: bd80 pop {r7, pc} - 8003544: e000e010 .word 0xe000e010 + 8003588: 46c0 nop ; (mov r8, r8) + 800358a: 46bd mov sp, r7 + 800358c: b002 add sp, #8 + 800358e: bd80 pop {r7, pc} + 8003590: e000e010 .word 0xe000e010 -08003548 : +08003594 : * @param HCLKFrequency HCLK frequency in Hz * @note HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq * @retval None */ void LL_Init1msTick(uint32_t HCLKFrequency) { - 8003548: b580 push {r7, lr} - 800354a: b082 sub sp, #8 - 800354c: af00 add r7, sp, #0 - 800354e: 6078 str r0, [r7, #4] + 8003594: b580 push {r7, lr} + 8003596: b082 sub sp, #8 + 8003598: af00 add r7, sp, #0 + 800359a: 6078 str r0, [r7, #4] /* Use frequency provided in argument */ LL_InitTick(HCLKFrequency, 1000U); - 8003550: 23fa movs r3, #250 ; 0xfa - 8003552: 009a lsls r2, r3, #2 - 8003554: 687b ldr r3, [r7, #4] - 8003556: 0011 movs r1, r2 - 8003558: 0018 movs r0, r3 - 800355a: f7ff ffdb bl 8003514 + 800359c: 23fa movs r3, #250 ; 0xfa + 800359e: 009a lsls r2, r3, #2 + 80035a0: 687b ldr r3, [r7, #4] + 80035a2: 0011 movs r1, r2 + 80035a4: 0018 movs r0, r3 + 80035a6: f7ff ffdb bl 8003560 } - 800355e: 46c0 nop ; (mov r8, r8) - 8003560: 46bd mov sp, r7 - 8003562: b002 add sp, #8 - 8003564: bd80 pop {r7, pc} + 80035aa: 46c0 nop ; (mov r8, r8) + 80035ac: 46bd mov sp, r7 + 80035ae: b002 add sp, #8 + 80035b0: bd80 pop {r7, pc} ... -08003568 : +080035b4 : * will configure Systick to 1ms * @param Delay specifies the delay time length, in milliseconds. * @retval None */ void LL_mDelay(uint32_t Delay) { - 8003568: b580 push {r7, lr} - 800356a: b084 sub sp, #16 - 800356c: af00 add r7, sp, #0 - 800356e: 6078 str r0, [r7, #4] + 80035b4: b580 push {r7, lr} + 80035b6: b084 sub sp, #16 + 80035b8: af00 add r7, sp, #0 + 80035ba: 6078 str r0, [r7, #4] __IO uint32_t tmp = SysTick->CTRL; /* Clear the COUNTFLAG first */ - 8003570: 4b0d ldr r3, [pc, #52] ; (80035a8 ) - 8003572: 681b ldr r3, [r3, #0] - 8003574: 60fb str r3, [r7, #12] + 80035bc: 4b0d ldr r3, [pc, #52] ; (80035f4 ) + 80035be: 681b ldr r3, [r3, #0] + 80035c0: 60fb str r3, [r7, #12] /* Add this code to indicate that local variable is not used */ ((void)tmp); - 8003576: 68fb ldr r3, [r7, #12] + 80035c2: 68fb ldr r3, [r7, #12] /* Add a period to guaranty minimum wait */ if (Delay < LL_MAX_DELAY) - 8003578: 687b ldr r3, [r7, #4] - 800357a: 3301 adds r3, #1 - 800357c: d00c beq.n 8003598 + 80035c4: 687b ldr r3, [r7, #4] + 80035c6: 3301 adds r3, #1 + 80035c8: d00c beq.n 80035e4 { Delay++; - 800357e: 687b ldr r3, [r7, #4] - 8003580: 3301 adds r3, #1 - 8003582: 607b str r3, [r7, #4] + 80035ca: 687b ldr r3, [r7, #4] + 80035cc: 3301 adds r3, #1 + 80035ce: 607b str r3, [r7, #4] } while (Delay) - 8003584: e008 b.n 8003598 + 80035d0: e008 b.n 80035e4 { if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U) - 8003586: 4b08 ldr r3, [pc, #32] ; (80035a8 ) - 8003588: 681a ldr r2, [r3, #0] - 800358a: 2380 movs r3, #128 ; 0x80 - 800358c: 025b lsls r3, r3, #9 - 800358e: 4013 ands r3, r2 - 8003590: d002 beq.n 8003598 + 80035d2: 4b08 ldr r3, [pc, #32] ; (80035f4 ) + 80035d4: 681a ldr r2, [r3, #0] + 80035d6: 2380 movs r3, #128 ; 0x80 + 80035d8: 025b lsls r3, r3, #9 + 80035da: 4013 ands r3, r2 + 80035dc: d002 beq.n 80035e4 { Delay--; - 8003592: 687b ldr r3, [r7, #4] - 8003594: 3b01 subs r3, #1 - 8003596: 607b str r3, [r7, #4] + 80035de: 687b ldr r3, [r7, #4] + 80035e0: 3b01 subs r3, #1 + 80035e2: 607b str r3, [r7, #4] while (Delay) - 8003598: 687b ldr r3, [r7, #4] - 800359a: 2b00 cmp r3, #0 - 800359c: d1f3 bne.n 8003586 + 80035e4: 687b ldr r3, [r7, #4] + 80035e6: 2b00 cmp r3, #0 + 80035e8: d1f3 bne.n 80035d2 } } } - 800359e: 46c0 nop ; (mov r8, r8) - 80035a0: 46c0 nop ; (mov r8, r8) - 80035a2: 46bd mov sp, r7 - 80035a4: b004 add sp, #16 - 80035a6: bd80 pop {r7, pc} - 80035a8: e000e010 .word 0xe000e010 + 80035ea: 46c0 nop ; (mov r8, r8) + 80035ec: 46c0 nop ; (mov r8, r8) + 80035ee: 46bd mov sp, r7 + 80035f0: b004 add sp, #16 + 80035f2: bd80 pop {r7, pc} + 80035f4: e000e010 .word 0xe000e010 -080035ac : +080035f8 : * @note Variable can be calculated also through SystemCoreClockUpdate function. * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) * @retval None */ void LL_SetSystemCoreClock(uint32_t HCLKFrequency) { - 80035ac: b580 push {r7, lr} - 80035ae: b082 sub sp, #8 - 80035b0: af00 add r7, sp, #0 - 80035b2: 6078 str r0, [r7, #4] + 80035f8: b580 push {r7, lr} + 80035fa: b082 sub sp, #8 + 80035fc: af00 add r7, sp, #0 + 80035fe: 6078 str r0, [r7, #4] /* HCLK clock frequency */ SystemCoreClock = HCLKFrequency; - 80035b4: 4b03 ldr r3, [pc, #12] ; (80035c4 ) - 80035b6: 687a ldr r2, [r7, #4] - 80035b8: 601a str r2, [r3, #0] + 8003600: 4b03 ldr r3, [pc, #12] ; (8003610 ) + 8003602: 687a ldr r2, [r7, #4] + 8003604: 601a str r2, [r3, #0] } - 80035ba: 46c0 nop ; (mov r8, r8) - 80035bc: 46bd mov sp, r7 - 80035be: b002 add sp, #8 - 80035c0: bd80 pop {r7, pc} - 80035c2: 46c0 nop ; (mov r8, r8) - 80035c4: 20000004 .word 0x20000004 + 8003606: 46c0 nop ; (mov r8, r8) + 8003608: 46bd mov sp, r7 + 800360a: b002 add sp, #8 + 800360c: bd80 pop {r7, pc} + 800360e: 46c0 nop ; (mov r8, r8) + 8003610: 20000004 .word 0x20000004 -080035c8 <__libc_init_array>: - 80035c8: b570 push {r4, r5, r6, lr} - 80035ca: 2600 movs r6, #0 - 80035cc: 4d0c ldr r5, [pc, #48] ; (8003600 <__libc_init_array+0x38>) - 80035ce: 4c0d ldr r4, [pc, #52] ; (8003604 <__libc_init_array+0x3c>) - 80035d0: 1b64 subs r4, r4, r5 - 80035d2: 10a4 asrs r4, r4, #2 - 80035d4: 42a6 cmp r6, r4 - 80035d6: d109 bne.n 80035ec <__libc_init_array+0x24> - 80035d8: 2600 movs r6, #0 - 80035da: f000 f821 bl 8003620 <_init> - 80035de: 4d0a ldr r5, [pc, #40] ; (8003608 <__libc_init_array+0x40>) - 80035e0: 4c0a ldr r4, [pc, #40] ; (800360c <__libc_init_array+0x44>) - 80035e2: 1b64 subs r4, r4, r5 - 80035e4: 10a4 asrs r4, r4, #2 - 80035e6: 42a6 cmp r6, r4 - 80035e8: d105 bne.n 80035f6 <__libc_init_array+0x2e> - 80035ea: bd70 pop {r4, r5, r6, pc} - 80035ec: 00b3 lsls r3, r6, #2 - 80035ee: 58eb ldr r3, [r5, r3] - 80035f0: 4798 blx r3 - 80035f2: 3601 adds r6, #1 - 80035f4: e7ee b.n 80035d4 <__libc_init_array+0xc> - 80035f6: 00b3 lsls r3, r6, #2 - 80035f8: 58eb ldr r3, [r5, r3] - 80035fa: 4798 blx r3 - 80035fc: 3601 adds r6, #1 - 80035fe: e7f2 b.n 80035e6 <__libc_init_array+0x1e> - 8003600: 0800374c .word 0x0800374c - 8003604: 0800374c .word 0x0800374c - 8003608: 0800374c .word 0x0800374c - 800360c: 08003750 .word 0x08003750 +08003614 <__libc_init_array>: + 8003614: b570 push {r4, r5, r6, lr} + 8003616: 2600 movs r6, #0 + 8003618: 4d0c ldr r5, [pc, #48] ; (800364c <__libc_init_array+0x38>) + 800361a: 4c0d ldr r4, [pc, #52] ; (8003650 <__libc_init_array+0x3c>) + 800361c: 1b64 subs r4, r4, r5 + 800361e: 10a4 asrs r4, r4, #2 + 8003620: 42a6 cmp r6, r4 + 8003622: d109 bne.n 8003638 <__libc_init_array+0x24> + 8003624: 2600 movs r6, #0 + 8003626: f000 f821 bl 800366c <_init> + 800362a: 4d0a ldr r5, [pc, #40] ; (8003654 <__libc_init_array+0x40>) + 800362c: 4c0a ldr r4, [pc, #40] ; (8003658 <__libc_init_array+0x44>) + 800362e: 1b64 subs r4, r4, r5 + 8003630: 10a4 asrs r4, r4, #2 + 8003632: 42a6 cmp r6, r4 + 8003634: d105 bne.n 8003642 <__libc_init_array+0x2e> + 8003636: bd70 pop {r4, r5, r6, pc} + 8003638: 00b3 lsls r3, r6, #2 + 800363a: 58eb ldr r3, [r5, r3] + 800363c: 4798 blx r3 + 800363e: 3601 adds r6, #1 + 8003640: e7ee b.n 8003620 <__libc_init_array+0xc> + 8003642: 00b3 lsls r3, r6, #2 + 8003644: 58eb ldr r3, [r5, r3] + 8003646: 4798 blx r3 + 8003648: 3601 adds r6, #1 + 800364a: e7f2 b.n 8003632 <__libc_init_array+0x1e> + 800364c: 08003798 .word 0x08003798 + 8003650: 08003798 .word 0x08003798 + 8003654: 08003798 .word 0x08003798 + 8003658: 0800379c .word 0x0800379c -08003610 : - 8003610: 0003 movs r3, r0 - 8003612: 1882 adds r2, r0, r2 - 8003614: 4293 cmp r3, r2 - 8003616: d100 bne.n 800361a - 8003618: 4770 bx lr - 800361a: 7019 strb r1, [r3, #0] - 800361c: 3301 adds r3, #1 - 800361e: e7f9 b.n 8003614 +0800365c : + 800365c: 0003 movs r3, r0 + 800365e: 1882 adds r2, r0, r2 + 8003660: 4293 cmp r3, r2 + 8003662: d100 bne.n 8003666 + 8003664: 4770 bx lr + 8003666: 7019 strb r1, [r3, #0] + 8003668: 3301 adds r3, #1 + 800366a: e7f9 b.n 8003660 -08003620 <_init>: - 8003620: b5f8 push {r3, r4, r5, r6, r7, lr} - 8003622: 46c0 nop ; (mov r8, r8) - 8003624: bcf8 pop {r3, r4, r5, r6, r7} - 8003626: bc08 pop {r3} - 8003628: 469e mov lr, r3 - 800362a: 4770 bx lr +0800366c <_init>: + 800366c: b5f8 push {r3, r4, r5, r6, r7, lr} + 800366e: 46c0 nop ; (mov r8, r8) + 8003670: bcf8 pop {r3, r4, r5, r6, r7} + 8003672: bc08 pop {r3} + 8003674: 469e mov lr, r3 + 8003676: 4770 bx lr -0800362c <_fini>: - 800362c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800362e: 46c0 nop ; (mov r8, r8) - 8003630: bcf8 pop {r3, r4, r5, r6, r7} - 8003632: bc08 pop {r3} - 8003634: 469e mov lr, r3 - 8003636: 4770 bx lr +08003678 <_fini>: + 8003678: b5f8 push {r3, r4, r5, r6, r7, lr} + 800367a: 46c0 nop ; (mov r8, r8) + 800367c: bcf8 pop {r3, r4, r5, r6, r7} + 800367e: bc08 pop {r3} + 8003680: 469e mov lr, r3 + 8003682: 4770 bx lr diff --git a/fw_old/Debug/iaq_wired_sensor.map b/fw_old/Debug/iaq_wired_sensor.map index 307dc63..a48a16d 100644 --- a/fw_old/Debug/iaq_wired_sensor.map +++ b/fw_old/Debug/iaq_wired_sensor.map @@ -1496,7 +1496,7 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- 0x0000000008000000 g_pfnVectors 0x00000000080000c0 . = ALIGN (0x4) -.text 0x00000000080000c0 0x3578 +.text 0x00000000080000c0 0x35c4 0x00000000080000c0 . = ALIGN (0x4) *(.text) .text 0x00000000080000c0 0x48 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o @@ -1595,402 +1595,406 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- 0x0000000008000de4 0x28 ./Core/Src/main.o .text.LL_LPUART_IsActiveFlag_TXE 0x0000000008000e0c 0x22 ./Core/Src/main.o - .text.LL_LPUART_EnableIT_IDLE - 0x0000000008000e2e 0x1c ./Core/Src/main.o - .text.LL_LPUART_EnableIT_RXNE - 0x0000000008000e4a 0x1c ./Core/Src/main.o - .text.LL_LPUART_DisableIT_IDLE - 0x0000000008000e66 0x1e ./Core/Src/main.o - .text.LL_LPUART_DisableIT_RXNE - 0x0000000008000e84 0x1e ./Core/Src/main.o - .text.LL_LPUART_TransmitData9 - 0x0000000008000ea2 0x22 ./Core/Src/main.o - .text.LL_RCC_HSI_Enable - 0x0000000008000ec4 0x1c ./Core/Src/main.o - .text.LL_RCC_HSI_IsReady - 0x0000000008000ee0 0x20 ./Core/Src/main.o - .text.LL_RCC_HSI_SetCalibTrimming - 0x0000000008000f00 0x2c ./Core/Src/main.o - .text.LL_RCC_SetSysClkSource - 0x0000000008000f2c 0x28 ./Core/Src/main.o - .text.LL_RCC_GetSysClkSource - 0x0000000008000f54 0x18 ./Core/Src/main.o - .text.LL_RCC_SetAHBPrescaler - 0x0000000008000f6c 0x28 ./Core/Src/main.o - .text.LL_RCC_SetAPB1Prescaler - 0x0000000008000f94 0x2c ./Core/Src/main.o - .text.LL_RCC_SetAPB2Prescaler - 0x0000000008000fc0 0x2c ./Core/Src/main.o - .text.LL_RCC_SetLPUARTClockSource - 0x0000000008000fec 0x2c ./Core/Src/main.o - .text.LL_RCC_SetI2CClockSource - 0x0000000008001018 0x38 ./Core/Src/main.o - .text.LL_RCC_PLL_Enable - 0x0000000008001050 0x1c ./Core/Src/main.o - .text.LL_RCC_PLL_IsReady - 0x000000000800106c 0x28 ./Core/Src/main.o - .text.LL_RCC_PLL_ConfigDomain_SYS - 0x0000000008001094 0x38 ./Core/Src/main.o - .text.LL_APB1_GRP1_EnableClock - 0x00000000080010cc 0x2c ./Core/Src/main.o - .text.LL_APB2_GRP1_EnableClock - 0x00000000080010f8 0x2c ./Core/Src/main.o - .text.LL_IOP_GRP1_EnableClock - 0x0000000008001124 0x2c ./Core/Src/main.o - .text.LL_FLASH_SetLatency - 0x0000000008001150 0x28 ./Core/Src/main.o - .text.LL_FLASH_GetLatency - 0x0000000008001178 0x18 ./Core/Src/main.o - .text.LL_PWR_SetRegulVoltageScaling - 0x0000000008001190 0x2c ./Core/Src/main.o - .text.LL_TIM_EnableCounter - 0x00000000080011bc 0x1c ./Core/Src/main.o - .text.LL_TIM_EnableARRPreload - 0x00000000080011d8 0x1c ./Core/Src/main.o - .text.LL_TIM_SetClockSource - 0x00000000080011f4 0x28 ./Core/Src/main.o - .text.LL_TIM_SetTriggerOutput - 0x000000000800121c 0x24 ./Core/Src/main.o - .text.LL_TIM_DisableMasterSlaveMode - 0x0000000008001240 0x1e ./Core/Src/main.o - .text.LL_TIM_EnableIT_UPDATE - 0x000000000800125e 0x1c ./Core/Src/main.o - .text.LL_GPIO_SetOutputPin - 0x000000000800127a 0x18 ./Core/Src/main.o - .text.LL_GPIO_ResetOutputPin - 0x0000000008001292 0x18 ./Core/Src/main.o - *fill* 0x00000000080012aa 0x2 - .text.main 0x00000000080012ac 0x374 ./Core/Src/main.o - 0x00000000080012ac main - .text.SystemClock_Config - 0x0000000008001620 0xa0 ./Core/Src/main.o - 0x0000000008001620 SystemClock_Config - .text.MX_I2C1_Init - 0x00000000080016c0 0x110 ./Core/Src/main.o - .text.MX_LPUART1_UART_Init - 0x00000000080017d0 0x180 ./Core/Src/main.o - .text.MX_TIM21_Init - 0x0000000008001950 0x88 ./Core/Src/main.o - .text.MX_GPIO_Init - 0x00000000080019d8 0xca ./Core/Src/main.o - *fill* 0x0000000008001aa2 0x2 - .text.LPUART1_TX_Buffer - 0x0000000008001aa4 0x6c ./Core/Src/main.o - 0x0000000008001aa4 LPUART1_TX_Buffer - .text.uart_disable_interrupts - 0x0000000008001b10 0x28 ./Core/Src/main.o - 0x0000000008001b10 uart_disable_interrupts - .text.uart_enable_interrupts - 0x0000000008001b38 0x28 ./Core/Src/main.o - 0x0000000008001b38 uart_enable_interrupts - .text.modbus_slave_callback - 0x0000000008001b60 0x30c ./Core/Src/main.o - 0x0000000008001b60 modbus_slave_callback - .text.modbus_transmit_function - 0x0000000008001e6c 0x26 ./Core/Src/main.o - 0x0000000008001e6c modbus_transmit_function - *fill* 0x0000000008001e92 0x2 - .text.modbus_CRC16 - 0x0000000008001e94 0x94 ./Core/Src/modbus.o - 0x0000000008001e94 modbus_CRC16 - .text.modbus_copy_reply_to_buffer - 0x0000000008001f28 0x194 ./Core/Src/modbus.o - 0x0000000008001f28 modbus_copy_reply_to_buffer - .text.modbus_slave_set_address - 0x00000000080020bc 0x30 ./Core/Src/modbus.o - 0x00000000080020bc modbus_slave_set_address - .text.modbus_slave_process_msg - 0x00000000080020ec 0x54c ./Core/Src/modbus.o - 0x00000000080020ec modbus_slave_process_msg - .text.scd4x_send_cmd - 0x0000000008002638 0x4c ./Core/Src/scd4x.o - 0x0000000008002638 scd4x_send_cmd - .text.scd4x_start_periodic_measurement - 0x0000000008002684 0x18 ./Core/Src/scd4x.o - 0x0000000008002684 scd4x_start_periodic_measurement - .text.scd4x_read_measurement - 0x000000000800269c 0xe8 ./Core/Src/scd4x.o - 0x000000000800269c scd4x_read_measurement - .text.sht4x_measure - 0x0000000008002784 0xd4 ./Core/Src/sht4x.o - 0x0000000008002784 sht4x_measure - .text.sps30_read_measured_values - 0x0000000008002858 0xee ./Core/Src/sps30.o - 0x0000000008002858 sps30_read_measured_values - .text.LL_LPUART_IsActiveFlag_IDLE - 0x0000000008002946 0x22 ./Core/Src/stm32l0xx_it.o - .text.LL_LPUART_IsActiveFlag_RXNE - 0x0000000008002968 0x22 ./Core/Src/stm32l0xx_it.o + .text.LL_LPUART_ClearFlag_NE + 0x0000000008000e2e 0x16 ./Core/Src/main.o .text.LL_LPUART_ClearFlag_IDLE - 0x000000000800298a 0x16 ./Core/Src/stm32l0xx_it.o - .text.LL_LPUART_IsEnabledIT_IDLE - 0x00000000080029a0 0x22 ./Core/Src/stm32l0xx_it.o - .text.LL_LPUART_IsEnabledIT_RXNE - 0x00000000080029c2 0x22 ./Core/Src/stm32l0xx_it.o - .text.LL_LPUART_ReceiveData9 - 0x00000000080029e4 0x1c ./Core/Src/stm32l0xx_it.o - .text.LL_TIM_ClearFlag_UPDATE - 0x0000000008002a00 0x18 ./Core/Src/stm32l0xx_it.o - .text.NMI_Handler - 0x0000000008002a18 0x6 ./Core/Src/stm32l0xx_it.o - 0x0000000008002a18 NMI_Handler - .text.HardFault_Handler - 0x0000000008002a1e 0x6 ./Core/Src/stm32l0xx_it.o - 0x0000000008002a1e HardFault_Handler - .text.SVC_Handler - 0x0000000008002a24 0xa ./Core/Src/stm32l0xx_it.o - 0x0000000008002a24 SVC_Handler - .text.PendSV_Handler - 0x0000000008002a2e 0xa ./Core/Src/stm32l0xx_it.o - 0x0000000008002a2e PendSV_Handler - .text.SysTick_Handler - 0x0000000008002a38 0xa ./Core/Src/stm32l0xx_it.o - 0x0000000008002a38 SysTick_Handler - *fill* 0x0000000008002a42 0x2 - .text.TIM21_IRQHandler - 0x0000000008002a44 0x20 ./Core/Src/stm32l0xx_it.o - 0x0000000008002a44 TIM21_IRQHandler - .text.LPUART1_IRQHandler - 0x0000000008002a64 0x80 ./Core/Src/stm32l0xx_it.o - 0x0000000008002a64 LPUART1_IRQHandler - .text.LPUART1_CharReception_Callback - 0x0000000008002ae4 0x4c ./Core/Src/stm32l0xx_it.o - 0x0000000008002ae4 LPUART1_CharReception_Callback - .text.SystemInit - 0x0000000008002b30 0xa ./Core/Src/system_stm32l0xx.o - 0x0000000008002b30 SystemInit - *fill* 0x0000000008002b3a 0x2 - .text.Reset_Handler - 0x0000000008002b3c 0x80 ./Core/Startup/startup_stm32l011f4ux.o - 0x0000000008002b3c Reset_Handler - .text.Default_Handler - 0x0000000008002bbc 0x2 ./Core/Startup/startup_stm32l011f4ux.o - 0x0000000008002bbc ADC1_COMP_IRQHandler - 0x0000000008002bbc PVD_IRQHandler - 0x0000000008002bbc I2C1_IRQHandler - 0x0000000008002bbc SPI1_IRQHandler - 0x0000000008002bbc EXTI2_3_IRQHandler - 0x0000000008002bbc RTC_IRQHandler - 0x0000000008002bbc EXTI4_15_IRQHandler - 0x0000000008002bbc RCC_IRQHandler - 0x0000000008002bbc DMA1_Channel1_IRQHandler - 0x0000000008002bbc Default_Handler - 0x0000000008002bbc DMA1_Channel4_5_IRQHandler - 0x0000000008002bbc EXTI0_1_IRQHandler - 0x0000000008002bbc WWDG_IRQHandler - 0x0000000008002bbc TIM2_IRQHandler - 0x0000000008002bbc DMA1_Channel2_3_IRQHandler - 0x0000000008002bbc USART2_IRQHandler - 0x0000000008002bbc FLASH_IRQHandler - 0x0000000008002bbc LPTIM1_IRQHandler - .text.LL_GPIO_SetPinMode - 0x0000000008002bbe 0x38 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .text.LL_GPIO_SetPinOutputType - 0x0000000008002bf6 0x2a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .text.LL_GPIO_SetPinSpeed - 0x0000000008002c20 0x38 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .text.LL_GPIO_SetPinPull - 0x0000000008002c58 0x38 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .text.LL_GPIO_SetAFPin_0_7 - 0x0000000008002c90 0x46 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .text.LL_GPIO_SetAFPin_8_15 - 0x0000000008002cd6 0x5a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .text.LL_GPIO_Init - 0x0000000008002d30 0xbc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - 0x0000000008002d30 LL_GPIO_Init - .text.LL_I2C_Enable - 0x0000000008002dec 0x1c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .text.LL_I2C_Disable - 0x0000000008002e08 0x1e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - *fill* 0x0000000008002e26 0x2 - .text.LL_I2C_ConfigFilters - 0x0000000008002e28 0x30 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .text.LL_I2C_SetOwnAddress1 - 0x0000000008002e58 0x28 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .text.LL_I2C_EnableOwnAddress1 - 0x0000000008002e80 0x1e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - *fill* 0x0000000008002e9e 0x2 - .text.LL_I2C_DisableOwnAddress1 - 0x0000000008002ea0 0x20 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .text.LL_I2C_SetTiming - 0x0000000008002ec0 0x18 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .text.LL_I2C_SetMode - 0x0000000008002ed8 0x28 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .text.LL_I2C_AcknowledgeNextData - 0x0000000008002f00 0x28 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .text.LL_I2C_Init - 0x0000000008002f28 0x86 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - 0x0000000008002f28 LL_I2C_Init - .text.LL_LPUART_IsEnabled - 0x0000000008002fae 0x22 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - .text.LL_LPUART_SetStopBitsLength - 0x0000000008002fd0 0x28 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - .text.LL_LPUART_SetHWFlowCtrl - 0x0000000008002ff8 0x28 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - .text.LL_LPUART_SetBaudRate - 0x0000000008003020 0x64 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - .text.LL_LPUART_Init - 0x0000000008003084 0x9c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - 0x0000000008003084 LL_LPUART_Init + 0x0000000008000e44 0x16 ./Core/Src/main.o + .text.LL_LPUART_EnableIT_IDLE + 0x0000000008000e5a 0x1c ./Core/Src/main.o + .text.LL_LPUART_EnableIT_RXNE + 0x0000000008000e76 0x1c ./Core/Src/main.o + .text.LL_LPUART_DisableIT_IDLE + 0x0000000008000e92 0x1e ./Core/Src/main.o + .text.LL_LPUART_DisableIT_RXNE + 0x0000000008000eb0 0x1e ./Core/Src/main.o + .text.LL_LPUART_TransmitData9 + 0x0000000008000ece 0x22 ./Core/Src/main.o + .text.LL_RCC_HSI_Enable + 0x0000000008000ef0 0x1c ./Core/Src/main.o .text.LL_RCC_HSI_IsReady - 0x0000000008003120 0x20 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o - .text.LL_RCC_LSE_IsReady - 0x0000000008003140 0x28 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o - .text.LL_RCC_MSI_GetRange - 0x0000000008003168 0x18 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o + 0x0000000008000f0c 0x20 ./Core/Src/main.o + .text.LL_RCC_HSI_SetCalibTrimming + 0x0000000008000f2c 0x2c ./Core/Src/main.o + .text.LL_RCC_SetSysClkSource + 0x0000000008000f58 0x28 ./Core/Src/main.o .text.LL_RCC_GetSysClkSource - 0x0000000008003180 0x18 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o + 0x0000000008000f80 0x18 ./Core/Src/main.o + .text.LL_RCC_SetAHBPrescaler + 0x0000000008000f98 0x28 ./Core/Src/main.o + .text.LL_RCC_SetAPB1Prescaler + 0x0000000008000fc0 0x2c ./Core/Src/main.o + .text.LL_RCC_SetAPB2Prescaler + 0x0000000008000fec 0x2c ./Core/Src/main.o + .text.LL_RCC_SetLPUARTClockSource + 0x0000000008001018 0x2c ./Core/Src/main.o + .text.LL_RCC_SetI2CClockSource + 0x0000000008001044 0x38 ./Core/Src/main.o + .text.LL_RCC_PLL_Enable + 0x000000000800107c 0x1c ./Core/Src/main.o + .text.LL_RCC_PLL_IsReady + 0x0000000008001098 0x28 ./Core/Src/main.o + .text.LL_RCC_PLL_ConfigDomain_SYS + 0x00000000080010c0 0x38 ./Core/Src/main.o + .text.LL_APB1_GRP1_EnableClock + 0x00000000080010f8 0x2c ./Core/Src/main.o + .text.LL_APB2_GRP1_EnableClock + 0x0000000008001124 0x2c ./Core/Src/main.o + .text.LL_IOP_GRP1_EnableClock + 0x0000000008001150 0x2c ./Core/Src/main.o + .text.LL_FLASH_SetLatency + 0x000000000800117c 0x28 ./Core/Src/main.o + .text.LL_FLASH_GetLatency + 0x00000000080011a4 0x18 ./Core/Src/main.o + .text.LL_PWR_SetRegulVoltageScaling + 0x00000000080011bc 0x2c ./Core/Src/main.o + .text.LL_TIM_EnableCounter + 0x00000000080011e8 0x1c ./Core/Src/main.o + .text.LL_TIM_EnableARRPreload + 0x0000000008001204 0x1c ./Core/Src/main.o + .text.LL_TIM_SetClockSource + 0x0000000008001220 0x28 ./Core/Src/main.o + .text.LL_TIM_SetTriggerOutput + 0x0000000008001248 0x24 ./Core/Src/main.o + .text.LL_TIM_DisableMasterSlaveMode + 0x000000000800126c 0x1e ./Core/Src/main.o + .text.LL_TIM_EnableIT_UPDATE + 0x000000000800128a 0x1c ./Core/Src/main.o + .text.LL_GPIO_SetOutputPin + 0x00000000080012a6 0x18 ./Core/Src/main.o + .text.LL_GPIO_ResetOutputPin + 0x00000000080012be 0x18 ./Core/Src/main.o + *fill* 0x00000000080012d6 0x2 + .text.main 0x00000000080012d8 0x374 ./Core/Src/main.o + 0x00000000080012d8 main + .text.SystemClock_Config + 0x000000000800164c 0xa0 ./Core/Src/main.o + 0x000000000800164c SystemClock_Config + .text.MX_I2C1_Init + 0x00000000080016ec 0x110 ./Core/Src/main.o + .text.MX_LPUART1_UART_Init + 0x00000000080017fc 0x180 ./Core/Src/main.o + .text.MX_TIM21_Init + 0x000000000800197c 0x88 ./Core/Src/main.o + .text.MX_GPIO_Init + 0x0000000008001a04 0xca ./Core/Src/main.o + *fill* 0x0000000008001ace 0x2 + .text.LPUART1_TX_Buffer + 0x0000000008001ad0 0x6c ./Core/Src/main.o + 0x0000000008001ad0 LPUART1_TX_Buffer + .text.uart_disable_interrupts + 0x0000000008001b3c 0x28 ./Core/Src/main.o + 0x0000000008001b3c uart_disable_interrupts + .text.uart_enable_interrupts + 0x0000000008001b64 0x38 ./Core/Src/main.o + 0x0000000008001b64 uart_enable_interrupts + .text.modbus_slave_callback + 0x0000000008001b9c 0x30c ./Core/Src/main.o + 0x0000000008001b9c modbus_slave_callback + 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/opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o + .init 0x000000000800366c 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crti.o + 0x000000000800366c _init + .init 0x0000000008003670 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o *(.fini) - .fini 0x000000000800362c 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crti.o - 0x000000000800362c _fini - .fini 0x0000000008003630 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o - 0x0000000008003638 . = ALIGN (0x4) - 0x0000000008003638 _etext = . + .fini 0x0000000008003678 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crti.o + 0x0000000008003678 _fini + .fini 0x000000000800367c 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o + 0x0000000008003684 . = ALIGN (0x4) + 0x0000000008003684 _etext = . -.vfp11_veneer 0x0000000008003638 0x0 - .vfp11_veneer 0x0000000008003638 0x0 linker stubs +.vfp11_veneer 0x0000000008003684 0x0 + .vfp11_veneer 0x0000000008003684 0x0 linker stubs -.v4_bx 0x0000000008003638 0x0 - .v4_bx 0x0000000008003638 0x0 linker stubs +.v4_bx 0x0000000008003684 0x0 + .v4_bx 0x0000000008003684 0x0 linker stubs -.iplt 0x0000000008003638 0x0 - .iplt 0x0000000008003638 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o +.iplt 0x0000000008003684 0x0 + .iplt 0x0000000008003684 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o -.rodata 0x0000000008003638 0x10c - 0x0000000008003638 . = ALIGN (0x4) +.rodata 0x0000000008003684 0x10c + 0x0000000008003684 . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.config_baudrates - 0x0000000008003638 0x28 ./Core/Src/config.o - 0x0000000008003638 config_baudrates + 0x0000000008003684 0x28 ./Core/Src/config.o + 0x0000000008003684 config_baudrates .rodata.config_baudrates_length - 0x0000000008003660 0x1 ./Core/Src/config.o - 0x0000000008003660 config_baudrates_length - *fill* 0x0000000008003661 0x3 + 0x00000000080036ac 0x1 ./Core/Src/config.o + 0x00000000080036ac config_baudrates_length + *fill* 0x00000000080036ad 0x3 .rodata.modbus_slave_callback - 0x0000000008003664 0x5c ./Core/Src/main.o + 0x00000000080036b0 0x5c ./Core/Src/main.o .rodata.modbus_slave_process_msg - 0x00000000080036c0 0x60 ./Core/Src/modbus.o + 0x000000000800370c 0x60 ./Core/Src/modbus.o .rodata.AHBPrescTable - 0x0000000008003720 0x10 ./Core/Src/system_stm32l0xx.o - 0x0000000008003720 AHBPrescTable + 0x000000000800376c 0x10 ./Core/Src/system_stm32l0xx.o + 0x000000000800376c AHBPrescTable .rodata.APBPrescTable - 0x0000000008003730 0x8 ./Core/Src/system_stm32l0xx.o - 0x0000000008003730 APBPrescTable + 0x000000000800377c 0x8 ./Core/Src/system_stm32l0xx.o + 0x000000000800377c APBPrescTable .rodata.PLLMulTable - 0x0000000008003738 0x9 ./Core/Src/system_stm32l0xx.o - 0x0000000008003738 PLLMulTable - 0x0000000008003744 . = ALIGN (0x4) - *fill* 0x0000000008003741 0x3 + 0x0000000008003784 0x9 ./Core/Src/system_stm32l0xx.o + 0x0000000008003784 PLLMulTable + 0x0000000008003790 . = ALIGN (0x4) + *fill* 0x000000000800378d 0x3 -.ARM.extab 0x0000000008003744 0x0 - 0x0000000008003744 . = ALIGN (0x4) +.ARM.extab 0x0000000008003790 0x0 + 0x0000000008003790 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x0000000008003744 . = ALIGN (0x4) + 0x0000000008003790 . = ALIGN (0x4) -.ARM 0x0000000008003744 0x8 - 0x0000000008003744 . = ALIGN (0x4) - 0x0000000008003744 __exidx_start = . +.ARM 0x0000000008003790 0x8 + 0x0000000008003790 . = ALIGN (0x4) + 0x0000000008003790 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0000000008003744 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o) - 0x000000000800374c __exidx_end = . - 0x000000000800374c . = ALIGN (0x4) + .ARM.exidx 0x0000000008003790 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o) + 0x0000000008003798 __exidx_end = . + 0x0000000008003798 . = ALIGN (0x4) -.rel.dyn 0x000000000800374c 0x0 - .rel.iplt 0x000000000800374c 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o +.rel.dyn 0x0000000008003798 0x0 + .rel.iplt 0x0000000008003798 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o -.preinit_array 0x000000000800374c 0x0 - 0x000000000800374c . = ALIGN (0x4) - 0x000000000800374c PROVIDE (__preinit_array_start = .) +.preinit_array 0x0000000008003798 0x0 + 0x0000000008003798 . = ALIGN (0x4) + 0x0000000008003798 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x000000000800374c PROVIDE (__preinit_array_end = .) - 0x000000000800374c . = ALIGN (0x4) + 0x0000000008003798 PROVIDE (__preinit_array_end = .) + 0x0000000008003798 . = ALIGN (0x4) -.init_array 0x000000000800374c 0x4 - 0x000000000800374c . = ALIGN (0x4) - 0x000000000800374c PROVIDE (__init_array_start = .) +.init_array 0x0000000008003798 0x4 + 0x0000000008003798 . = ALIGN (0x4) + 0x0000000008003798 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x000000000800374c 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o - 0x0000000008003750 PROVIDE (__init_array_end = .) - 0x0000000008003750 . = ALIGN (0x4) + .init_array 0x0000000008003798 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o + 0x000000000800379c PROVIDE (__init_array_end = .) + 0x000000000800379c . = ALIGN (0x4) -.fini_array 0x0000000008003750 0x4 - 0x0000000008003750 . = ALIGN (0x4) +.fini_array 0x000000000800379c 0x4 + 0x000000000800379c . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0000000008003750 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o + .fini_array 0x000000000800379c 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x0000000008003754 . = ALIGN (0x4) - 0x0000000008003754 _sidata = LOADADDR (.data) + 0x00000000080037a0 . = ALIGN (0x4) + 0x00000000080037a0 _sidata = LOADADDR (.data) -.data 0x0000000020000000 0x8 load address 0x0000000008003754 +.data 0x0000000020000000 0x8 load address 0x00000000080037a0 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -2007,11 +2011,11 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- 0x0000000020000008 . = ALIGN (0x4) 0x0000000020000008 _edata = . -.igot.plt 0x0000000020000008 0x0 load address 0x000000000800375c +.igot.plt 0x0000000020000008 0x0 load address 0x00000000080037a8 .igot.plt 0x0000000020000008 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o 0x0000000020000008 . = ALIGN (0x4) -.bss 0x0000000020000008 0x174 load address 0x000000000800375c +.bss 0x0000000020000008 0x174 load address 0x00000000080037a8 0x0000000020000008 _sbss = . 0x0000000020000008 __bss_start__ = _sbss *(.bss) @@ -2068,7 +2072,7 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- 0x000000002000017c __bss_end__ = _ebss ._user_heap_stack - 0x000000002000017c 0x604 load address 0x000000000800375c + 0x000000002000017c 0x604 load address 0x00000000080037a8 0x0000000020000180 . = ALIGN (0x8) *fill* 0x000000002000017c 0x4 [!provide] PROVIDE (end = .) @@ -2147,23 +2151,23 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libm.a LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a -.debug_info 0x0000000000000000 0x7101 +.debug_info 0x0000000000000000 0x7151 .debug_info 0x0000000000000000 0x4ac ./Core/Src/config.o .debug_info 0x00000000000004ac 0x496 ./Core/Src/i2c.o - .debug_info 0x0000000000000942 0x1bfd ./Core/Src/main.o - .debug_info 0x000000000000253f 0x58f ./Core/Src/modbus.o - .debug_info 0x0000000000002ace 0x440 ./Core/Src/scd4x.o - .debug_info 0x0000000000002f0e 0x3e0 ./Core/Src/sht4x.o - .debug_info 0x00000000000032ee 0x50b ./Core/Src/sps30.o - .debug_info 0x00000000000037f9 0x64d ./Core/Src/stm32l0xx_it.o - .debug_info 0x0000000000003e46 0x302 ./Core/Src/system_stm32l0xx.o - .debug_info 0x0000000000004148 0x22 ./Core/Startup/startup_stm32l011f4ux.o - .debug_info 0x000000000000416a 0x657 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .debug_info 0x00000000000047c1 0x668 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .debug_info 0x0000000000004e29 0x59d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - .debug_info 0x00000000000053c6 0x799 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o - .debug_info 0x0000000000005b5f 0xcd9 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o - .debug_info 0x0000000000006838 0x8c9 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o + .debug_info 0x0000000000000942 0x1c4d ./Core/Src/main.o + .debug_info 0x000000000000258f 0x58f ./Core/Src/modbus.o + .debug_info 0x0000000000002b1e 0x440 ./Core/Src/scd4x.o + .debug_info 0x0000000000002f5e 0x3e0 ./Core/Src/sht4x.o + .debug_info 0x000000000000333e 0x50b ./Core/Src/sps30.o + .debug_info 0x0000000000003849 0x64d ./Core/Src/stm32l0xx_it.o + .debug_info 0x0000000000003e96 0x302 ./Core/Src/system_stm32l0xx.o + .debug_info 0x0000000000004198 0x22 ./Core/Startup/startup_stm32l011f4ux.o + .debug_info 0x00000000000041ba 0x657 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o + .debug_info 0x0000000000004811 0x668 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o + .debug_info 0x0000000000004e79 0x59d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o + .debug_info 0x0000000000005416 0x799 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o + .debug_info 0x0000000000005baf 0xcd9 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o + .debug_info 0x0000000000006888 0x8c9 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o .debug_abbrev 0x0000000000000000 0x1a58 .debug_abbrev 0x0000000000000000 0x17e ./Core/Src/config.o @@ -2183,57 +2187,57 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- .debug_abbrev 0x00000000000015f2 0x216 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o .debug_abbrev 0x0000000000001808 0x250 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o -.debug_aranges 0x0000000000000000 0x948 +.debug_aranges 0x0000000000000000 0x958 .debug_aranges 0x0000000000000000 0x50 ./Core/Src/config.o .debug_aranges 0x0000000000000050 0x70 ./Core/Src/i2c.o .debug_aranges - 0x00000000000000c0 0x210 ./Core/Src/main.o + 0x00000000000000c0 0x220 ./Core/Src/main.o .debug_aranges - 0x00000000000002d0 0x38 ./Core/Src/modbus.o + 0x00000000000002e0 0x38 ./Core/Src/modbus.o .debug_aranges - 0x0000000000000308 0x48 ./Core/Src/scd4x.o + 0x0000000000000318 0x48 ./Core/Src/scd4x.o .debug_aranges - 0x0000000000000350 0x30 ./Core/Src/sht4x.o + 0x0000000000000360 0x30 ./Core/Src/sht4x.o .debug_aranges - 0x0000000000000380 0x70 ./Core/Src/sps30.o + 0x0000000000000390 0x70 ./Core/Src/sps30.o .debug_aranges - 0x00000000000003f0 0x90 ./Core/Src/stm32l0xx_it.o + 0x0000000000000400 0x90 ./Core/Src/stm32l0xx_it.o .debug_aranges - 0x0000000000000480 0x28 ./Core/Src/system_stm32l0xx.o + 0x0000000000000490 0x28 ./Core/Src/system_stm32l0xx.o .debug_aranges - 0x00000000000004a8 0x28 ./Core/Startup/startup_stm32l011f4ux.o + 0x00000000000004b8 0x28 ./Core/Startup/startup_stm32l011f4ux.o .debug_aranges - 0x00000000000004d0 0x70 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o + 0x00000000000004e0 0x70 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o .debug_aranges - 0x0000000000000540 0x88 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o + 0x0000000000000550 0x88 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o .debug_aranges - 0x00000000000005c8 0x60 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o + 0x00000000000005d8 0x60 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o .debug_aranges - 0x0000000000000628 0x130 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o + 0x0000000000000638 0x130 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o .debug_aranges - 0x0000000000000758 0x100 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o + 0x0000000000000768 0x100 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o .debug_aranges - 0x0000000000000858 0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o + 0x0000000000000868 0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o -.debug_ranges 0x0000000000000000 0x850 +.debug_ranges 0x0000000000000000 0x860 .debug_ranges 0x0000000000000000 0x40 ./Core/Src/config.o .debug_ranges 0x0000000000000040 0x60 ./Core/Src/i2c.o - .debug_ranges 0x00000000000000a0 0x200 ./Core/Src/main.o - .debug_ranges 0x00000000000002a0 0x28 ./Core/Src/modbus.o - .debug_ranges 0x00000000000002c8 0x38 ./Core/Src/scd4x.o - .debug_ranges 0x0000000000000300 0x20 ./Core/Src/sht4x.o - .debug_ranges 0x0000000000000320 0x60 ./Core/Src/sps30.o - .debug_ranges 0x0000000000000380 0x80 ./Core/Src/stm32l0xx_it.o - .debug_ranges 0x0000000000000400 0x18 ./Core/Src/system_stm32l0xx.o - .debug_ranges 0x0000000000000418 0x20 ./Core/Startup/startup_stm32l011f4ux.o - .debug_ranges 0x0000000000000438 0x60 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .debug_ranges 0x0000000000000498 0x78 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .debug_ranges 0x0000000000000510 0x50 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - .debug_ranges 0x0000000000000560 0x120 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o - .debug_ranges 0x0000000000000680 0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o - .debug_ranges 0x0000000000000770 0xe0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o + .debug_ranges 0x00000000000000a0 0x210 ./Core/Src/main.o + .debug_ranges 0x00000000000002b0 0x28 ./Core/Src/modbus.o + .debug_ranges 0x00000000000002d8 0x38 ./Core/Src/scd4x.o + .debug_ranges 0x0000000000000310 0x20 ./Core/Src/sht4x.o + .debug_ranges 0x0000000000000330 0x60 ./Core/Src/sps30.o + .debug_ranges 0x0000000000000390 0x80 ./Core/Src/stm32l0xx_it.o + .debug_ranges 0x0000000000000410 0x18 ./Core/Src/system_stm32l0xx.o + .debug_ranges 0x0000000000000428 0x20 ./Core/Startup/startup_stm32l011f4ux.o + .debug_ranges 0x0000000000000448 0x60 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o + .debug_ranges 0x00000000000004a8 0x78 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o + .debug_ranges 0x0000000000000520 0x50 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o + .debug_ranges 0x0000000000000570 0x120 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o + .debug_ranges 0x0000000000000690 0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o + .debug_ranges 0x0000000000000780 0xe0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o .debug_macro 0x0000000000000000 0xc631 .debug_macro 0x0000000000000000 0xc9 ./Core/Src/config.o @@ -2297,56 +2301,56 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- .debug_macro 0x000000000000bf90 0x53f ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o .debug_macro 0x000000000000c4cf 0x162 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o -.debug_line 0x0000000000000000 0x72e4 +.debug_line 0x0000000000000000 0x7326 .debug_line 0x0000000000000000 0x65a ./Core/Src/config.o .debug_line 0x000000000000065a 0x640 ./Core/Src/i2c.o - .debug_line 0x0000000000000c9a 0x1166 ./Core/Src/main.o - .debug_line 0x0000000000001e00 0x6d6 ./Core/Src/modbus.o - .debug_line 0x00000000000024d6 0x6ad ./Core/Src/scd4x.o - .debug_line 0x0000000000002b83 0x645 ./Core/Src/sht4x.o - .debug_line 0x00000000000031c8 0x6a0 ./Core/Src/sps30.o - .debug_line 0x0000000000003868 0x7c7 ./Core/Src/stm32l0xx_it.o - .debug_line 0x000000000000402f 0x4ce ./Core/Src/system_stm32l0xx.o - .debug_line 0x00000000000044fd 0x9b ./Core/Startup/startup_stm32l011f4ux.o - .debug_line 0x0000000000004598 0x5ee ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .debug_line 0x0000000000004b86 0x5e8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .debug_line 0x000000000000516e 0x5b1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - .debug_line 0x000000000000571f 0xa0e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o - .debug_line 0x000000000000612d 0x8c6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o - .debug_line 0x00000000000069f3 0x8f1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o + .debug_line 0x0000000000000c9a 0x119c ./Core/Src/main.o + .debug_line 0x0000000000001e36 0x6d6 ./Core/Src/modbus.o + .debug_line 0x000000000000250c 0x6b3 ./Core/Src/scd4x.o + .debug_line 0x0000000000002bbf 0x64b ./Core/Src/sht4x.o + .debug_line 0x000000000000320a 0x6a0 ./Core/Src/sps30.o + .debug_line 0x00000000000038aa 0x7c7 ./Core/Src/stm32l0xx_it.o + .debug_line 0x0000000000004071 0x4ce ./Core/Src/system_stm32l0xx.o + .debug_line 0x000000000000453f 0x9b ./Core/Startup/startup_stm32l011f4ux.o + .debug_line 0x00000000000045da 0x5ee ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o + .debug_line 0x0000000000004bc8 0x5e8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o + .debug_line 0x00000000000051b0 0x5b1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o + .debug_line 0x0000000000005761 0xa0e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o + .debug_line 0x000000000000616f 0x8c6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o + .debug_line 0x0000000000006a35 0x8f1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o -.debug_str 0x0000000000000000 0x3eada +.debug_str 0x0000000000000000 0x3eaf1 .debug_str 0x0000000000000000 0x30b1a ./Core/Src/config.o 0x30d36 (size before relaxing) .debug_str 0x0000000000030b1a 0x1e3e ./Core/Src/i2c.o 0x32192 (size before relaxing) - .debug_str 0x0000000000032958 0x8857 ./Core/Src/main.o - 0x3b307 (size before relaxing) - .debug_str 0x000000000003b1af 0x336 ./Core/Src/modbus.o + .debug_str 0x0000000000032958 0x8887 ./Core/Src/main.o + 0x3b337 (size before relaxing) + .debug_str 0x000000000003b1df 0x336 ./Core/Src/modbus.o 0x458e (size before relaxing) - .debug_str 0x000000000003b4e5 0x18a ./Core/Src/scd4x.o + .debug_str 0x000000000003b515 0x18a ./Core/Src/scd4x.o 0x3a155 (size before relaxing) - .debug_str 0x000000000003b66f 0x162 ./Core/Src/sht4x.o + .debug_str 0x000000000003b69f 0x162 ./Core/Src/sht4x.o 0x3a16a (size before relaxing) - .debug_str 0x000000000003b7d1 0x2f1 ./Core/Src/sps30.o + .debug_str 0x000000000003b801 0x2f1 ./Core/Src/sps30.o 0x317e9 (size before relaxing) - .debug_str 0x000000000003bac2 0x16b ./Core/Src/stm32l0xx_it.o + .debug_str 0x000000000003baf2 0x152 ./Core/Src/stm32l0xx_it.o 0x3a194 (size before relaxing) - .debug_str 0x000000000003bc2d 0x61 ./Core/Src/system_stm32l0xx.o + .debug_str 0x000000000003bc44 0x61 ./Core/Src/system_stm32l0xx.o 0x30424 (size before relaxing) - .debug_str 0x000000000003bc8e 0x36 ./Core/Startup/startup_stm32l011f4ux.o + .debug_str 0x000000000003bca5 0x36 ./Core/Startup/startup_stm32l011f4ux.o 0x6f (size before relaxing) - .debug_str 0x000000000003bcc4 0x578 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o + .debug_str 0x000000000003bcdb 0x578 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o 0x31544 (size before relaxing) - .debug_str 0x000000000003c23c 0x3ed ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o + .debug_str 0x000000000003c253 0x3ed ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o 0x31cb9 (size before relaxing) - .debug_str 0x000000000003c629 0x4eb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o + .debug_str 0x000000000003c640 0x4eb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o 0x33315 (size before relaxing) - .debug_str 0x000000000003cb14 0x522 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o + .debug_str 0x000000000003cb2b 0x522 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o 0x32239 (size before relaxing) - .debug_str 0x000000000003d036 0xdf1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o + .debug_str 0x000000000003d04d 0xdf1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o 0x34198 (size before relaxing) - .debug_str 0x000000000003de27 0xcb3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o + .debug_str 0x000000000003de3e 0xcb3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o 0x33960 (size before relaxing) .comment 0x0000000000000000 0x53 @@ -2367,23 +2371,23 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- .comment 0x0000000000000053 0x54 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o .comment 0x0000000000000053 0x54 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o -.debug_frame 0x0000000000000000 0x1fbc +.debug_frame 0x0000000000000000 0x1ffc .debug_frame 0x0000000000000000 0xf0 ./Core/Src/config.o .debug_frame 0x00000000000000f0 0x170 ./Core/Src/i2c.o - .debug_frame 0x0000000000000260 0x7d0 ./Core/Src/main.o - .debug_frame 0x0000000000000a30 0x98 ./Core/Src/modbus.o - .debug_frame 0x0000000000000ac8 0xc4 ./Core/Src/scd4x.o - .debug_frame 0x0000000000000b8c 0x70 ./Core/Src/sht4x.o - .debug_frame 0x0000000000000bfc 0x164 ./Core/Src/sps30.o - .debug_frame 0x0000000000000d60 0x1d4 ./Core/Src/stm32l0xx_it.o - .debug_frame 0x0000000000000f34 0x4c ./Core/Src/system_stm32l0xx.o - .debug_frame 0x0000000000000f80 0x170 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o - .debug_frame 0x00000000000010f0 0x1d0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o - .debug_frame 0x00000000000012c0 0x134 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o - .debug_frame 0x00000000000013f4 0x42c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o - .debug_frame 0x0000000000001820 0x3b0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o - .debug_frame 0x0000000000001bd0 0x344 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o - .debug_frame 0x0000000000001f14 0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o) - .debug_frame 0x0000000000001f40 0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o) - .debug_frame 0x0000000000001f60 0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) - .debug_frame 0x0000000000001f80 0x3c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o) + .debug_frame 0x0000000000000260 0x810 ./Core/Src/main.o + .debug_frame 0x0000000000000a70 0x98 ./Core/Src/modbus.o + .debug_frame 0x0000000000000b08 0xc4 ./Core/Src/scd4x.o + .debug_frame 0x0000000000000bcc 0x70 ./Core/Src/sht4x.o + .debug_frame 0x0000000000000c3c 0x164 ./Core/Src/sps30.o + .debug_frame 0x0000000000000da0 0x1d4 ./Core/Src/stm32l0xx_it.o + .debug_frame 0x0000000000000f74 0x4c ./Core/Src/system_stm32l0xx.o + .debug_frame 0x0000000000000fc0 0x170 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o + .debug_frame 0x0000000000001130 0x1d0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o + .debug_frame 0x0000000000001300 0x134 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o + .debug_frame 0x0000000000001434 0x42c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o + .debug_frame 0x0000000000001860 0x3b0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.o + .debug_frame 0x0000000000001c10 0x344 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o + .debug_frame 0x0000000000001f54 0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o) + .debug_frame 0x0000000000001f80 0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o) + .debug_frame 0x0000000000001fa0 0x20 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) + .debug_frame 0x0000000000001fc0 0x3c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o) diff --git a/tests/read_input_register_test.py b/tests/read_input_register_test.py index ac5a2c5..439f316 100755 --- a/tests/read_input_register_test.py +++ b/tests/read_input_register_test.py @@ -4,10 +4,10 @@ from sys import exit import minimalmodbus import serial -slave_address = 254 +slave_address = 252 instrument = minimalmodbus.Instrument('/dev/rs485', slave_address, close_port_after_each_call=True) # port name, slave address (in decimal) -instrument.serial.baudrate = 19200 +instrument.serial.baudrate = 115200 instrument.serial.bytesize = 8 instrument.serial.parity = serial.PARITY_EVEN instrument.serial.stopbits = 1