diff --git a/fw/.cproject b/fw/.cproject
index e5db677..98ad7dc 100644
--- a/fw/.cproject
+++ b/fw/.cproject
@@ -65,7 +65,7 @@
                                 								
                                 <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1650648268" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
                                 								
-                                <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.622042" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+                                <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.622042" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.o0" valueType="enumerated"/>
                                 								
                                 <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.2027210563" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
                                     									
diff --git a/fw/Core/Src/scd4x.c b/fw/Core/Src/scd4x.c
index 1c4ad9a..470006b 100644
--- a/fw/Core/Src/scd4x.c
+++ b/fw/Core/Src/scd4x.c
@@ -69,11 +69,13 @@ int8_t scd4x_read_measurement(int * co2, int *temperature, int *relative_humidit
 	buffer[0] = READ_MEASUREMENT >> 8;
 	buffer[1] = READ_MEASUREMENT & 0x00ff;
 	result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2);
-	if (result != I2C_OK) {
-		return SCD4X_ERROR;
-	}
 
-	LL_mDelay(10); // 10 ms should be enough
+	// TODO: Proc to vraci NACK? Vyresit.
+	/*if (result != I2C_OK) {
+		return SCD4X_ERROR;
+	}*/
+
+	LL_mDelay(1); // 10 ms should be enough
 	// read out
 	result = i2c_receive(SCD4X_I2C_ADDRESS<<1, buffer, 9);
 	if (result != I2C_OK)
diff --git a/fw/Debug/Core/Src/crc8.o b/fw/Debug/Core/Src/crc8.o
index 83ac802..0cf5828 100644
Binary files a/fw/Debug/Core/Src/crc8.o and b/fw/Debug/Core/Src/crc8.o differ
diff --git a/fw/Debug/Core/Src/crc8.su b/fw/Debug/Core/Src/crc8.su
index 9f53d23..d2e1e30 100644
--- a/fw/Debug/Core/Src/crc8.su
+++ b/fw/Debug/Core/Src/crc8.su
@@ -1 +1 @@
-crc8.c:11:9:crc8_calculate	20	static
+crc8.c:11:9:crc8_calculate	24	static
diff --git a/fw/Debug/Core/Src/i2c.o b/fw/Debug/Core/Src/i2c.o
index e49e92b..4377aa9 100644
Binary files a/fw/Debug/Core/Src/i2c.o and b/fw/Debug/Core/Src/i2c.o differ
diff --git a/fw/Debug/Core/Src/i2c.su b/fw/Debug/Core/Src/i2c.su
index 4085855..585a248 100644
--- a/fw/Debug/Core/Src/i2c.su
+++ b/fw/Debug/Core/Src/i2c.su
@@ -1,3 +1,11 @@
-i2c.c:12:5:i2c_init	0	static
-i2c.c:21:5:i2c_transmit	16	static
-i2c.c:47:5:i2c_receive	20	static
+stm32l0xx_ll_i2c.h:1511:26:LL_I2C_IsActiveFlag_TXE	16	static
+stm32l0xx_ll_i2c.h:1537:26:LL_I2C_IsActiveFlag_RXNE	16	static
+stm32l0xx_ll_i2c.h:1563:26:LL_I2C_IsActiveFlag_NACK	16	static
+stm32l0xx_ll_i2c.h:1576:26:LL_I2C_IsActiveFlag_STOP	16	static
+stm32l0xx_ll_i2c.h:1733:22:LL_I2C_ClearFlag_STOP	16	static
+stm32l0xx_ll_i2c.h:2090:22:LL_I2C_HandleTransfer	24	static
+stm32l0xx_ll_i2c.h:2174:25:LL_I2C_ReceiveData8	16	static
+stm32l0xx_ll_i2c.h:2186:22:LL_I2C_TransmitData8	16	static
+i2c.c:12:5:i2c_init	16	static
+i2c.c:21:5:i2c_transmit	40	static
+i2c.c:47:5:i2c_receive	48	static
diff --git a/fw/Debug/Core/Src/led.o b/fw/Debug/Core/Src/led.o
index 9f923f1..db38d76 100644
Binary files a/fw/Debug/Core/Src/led.o and b/fw/Debug/Core/Src/led.o differ
diff --git a/fw/Debug/Core/Src/led.su b/fw/Debug/Core/Src/led.su
index 6ec046d..5d90d6b 100644
--- a/fw/Debug/Core/Src/led.su
+++ b/fw/Debug/Core/Src/led.su
@@ -1,6 +1,9 @@
-led.c:42:6:led_set_color	16	static
-led.c:49:6:led_gpio_off	0	static
-led.c:57:6:led_gpio_on	0	static
-led.c:69:6:led_off	0	static
-led.c:81:6:led_pwm_handler	20	static
-led.c:127:6:led_init	16	static
+stm32l0xx_ll_gpio.h:734:26:LL_GPIO_ReadInputPort	16	static
+stm32l0xx_ll_gpio.h:775:22:LL_GPIO_WriteOutputPort	16	static
+stm32l0xx_ll_gpio.h:902:22:LL_GPIO_TogglePin	24	static
+led.c:42:6:led_set_color	24	static
+led.c:49:6:led_gpio_off	24	static
+led.c:57:6:led_gpio_on	24	static
+led.c:69:6:led_off	8	static
+led.c:81:6:led_pwm_handler	24	static
+led.c:127:6:led_init	24	static
diff --git a/fw/Debug/Core/Src/main.o b/fw/Debug/Core/Src/main.o
index 31ac4a9..3eebae2 100644
Binary files a/fw/Debug/Core/Src/main.o and b/fw/Debug/Core/Src/main.o differ
diff --git a/fw/Debug/Core/Src/main.su b/fw/Debug/Core/Src/main.su
index 84efcf2..02d3513 100644
--- a/fw/Debug/Core/Src/main.su
+++ b/fw/Debug/Core/Src/main.su
@@ -1,5 +1,47 @@
-stm32l0xx_ll_bus.h:440:22:LL_APB1_GRP1_EnableClock	8	static
-stm32l0xx_ll_bus.h:987:22:LL_IOP_GRP1_EnableClock	8	static
+core_cm0plus.h:741:22:__NVIC_EnableIRQ	16	static
+core_cm0plus.h:848:22:__NVIC_SetPriority	24	static
+stm32l0xx_ll_dma.h:606:22:LL_DMA_SetDataTransferDirection	24	static
+stm32l0xx_ll_dma.h:655:22:LL_DMA_SetMode	24	static
+stm32l0xx_ll_dma.h:700:22:LL_DMA_SetPeriphIncMode	24	static
+stm32l0xx_ll_dma.h:745:22:LL_DMA_SetMemoryIncMode	24	static
+stm32l0xx_ll_dma.h:791:22:LL_DMA_SetPeriphSize	24	static
+stm32l0xx_ll_dma.h:838:22:LL_DMA_SetMemorySize	24	static
+stm32l0xx_ll_dma.h:886:22:LL_DMA_SetChannelPriorityLevel	24	static
+stm32l0xx_ll_dma.h:1207:22:LL_DMA_SetPeriphRequest	24	static
+stm32l0xx_ll_i2c.h:391:22:LL_I2C_Enable	16	static
+stm32l0xx_ll_i2c.h:604:22:LL_I2C_EnableClockStretching	16	static
+stm32l0xx_ll_i2c.h:724:22:LL_I2C_DisableGeneralCall	16	static
+stm32l0xx_ll_i2c.h:835:22:LL_I2C_SetOwnAddress2	24	static
+stm32l0xx_ll_i2c.h:857:22:LL_I2C_DisableOwnAddress2	16	static
+stm32l0xx_ll_i2c.h:1838:22:LL_I2C_EnableAutoEndMode	16	static
+stm32l0xx_ll_lpuart.h:396:22:LL_LPUART_Enable	16	static
+stm32l0xx_ll_lpuart.h:1210:22:LL_LPUART_SetDEDeassertionTime	16	static
+stm32l0xx_ll_lpuart.h:1233:22:LL_LPUART_SetDEAssertionTime	16	static
+stm32l0xx_ll_lpuart.h:1255:22:LL_LPUART_EnableDEMode	16	static
+stm32l0xx_ll_lpuart.h:1291:22:LL_LPUART_SetDESignalPolarity	16	static
+stm32l0xx_ll_rcc.h:1163:22:LL_RCC_MSI_Enable	8	static
+stm32l0xx_ll_rcc.h:1183:26:LL_RCC_MSI_IsReady	8	static
+stm32l0xx_ll_rcc.h:1201:22:LL_RCC_MSI_SetRange	16	static
+stm32l0xx_ll_rcc.h:1242:22:LL_RCC_MSI_SetCalibTrimming	16	static
+stm32l0xx_ll_rcc.h:1275:22:LL_RCC_SetSysClkSource	16	static
+stm32l0xx_ll_rcc.h:1289:26:LL_RCC_GetSysClkSource	8	static
+stm32l0xx_ll_rcc.h:1309:22:LL_RCC_SetAHBPrescaler	16	static
+stm32l0xx_ll_rcc.h:1325:22:LL_RCC_SetAPB1Prescaler	16	static
+stm32l0xx_ll_rcc.h:1341:22:LL_RCC_SetAPB2Prescaler	16	static
+stm32l0xx_ll_rcc.h:1496:22:LL_RCC_SetLPUARTClockSource	16	static
+stm32l0xx_ll_rcc.h:1515:22:LL_RCC_SetI2CClockSource	16	static
+stm32l0xx_ll_bus.h:224:22:LL_AHB1_GRP1_EnableClock	24	static
+stm32l0xx_ll_bus.h:440:22:LL_APB1_GRP1_EnableClock	24	static
+stm32l0xx_ll_bus.h:786:22:LL_APB2_GRP1_EnableClock	24	static
+stm32l0xx_ll_bus.h:987:22:LL_IOP_GRP1_EnableClock	24	static
+stm32l0xx_ll_system.h:912:22:LL_FLASH_SetLatency	16	static
+stm32l0xx_ll_system.h:924:26:LL_FLASH_GetLatency	8	static
+stm32l0xx_ll_pwr.h:272:22:LL_PWR_SetRegulVoltageScaling	16	static
+stm32l0xx_ll_gpio.h:844:22:LL_GPIO_SetOutputPin	16	static
+main.c:67:5:main	48	static
 main.c:142:6:SystemClock_Config	8	static
-main.c:67:5:main	96	static
-main.c:401:6:Error_Handler	0	static,ignoring_inline_asm
+main.c:181:13:MX_I2C1_Init	72	static
+main.c:244:13:MX_LPUART1_UART_Init	64	static
+main.c:331:13:MX_DMA_Init	8	static
+main.c:350:13:MX_GPIO_Init	32	static
+main.c:401:6:Error_Handler	8	static,ignoring_inline_asm
diff --git a/fw/Debug/Core/Src/scd4x.o b/fw/Debug/Core/Src/scd4x.o
index ec36201..63a0e2c 100644
Binary files a/fw/Debug/Core/Src/scd4x.o and b/fw/Debug/Core/Src/scd4x.o differ
diff --git a/fw/Debug/Core/Src/scd4x.su b/fw/Debug/Core/Src/scd4x.su
index da3f3a4..5aa5725 100644
--- a/fw/Debug/Core/Src/scd4x.su
+++ b/fw/Debug/Core/Src/scd4x.su
@@ -1,6 +1,6 @@
-scd4x.c:10:8:scd4x_send_cmd	40	static
-scd4x.c:26:8:scd4x_read_data	0	static
+scd4x.c:10:8:scd4x_send_cmd	56	static
+scd4x.c:26:8:scd4x_read_data	16	static
 scd4x.c:31:8:scd4x_start_periodic_measurement	8	static
 scd4x.c:36:8:scd4x_stop_periodic_measurement	8	static
 scd4x.c:41:8:scd4x_perform_factory_reset	8	static
-scd4x.c:46:8:scd4x_read_measurement	64	static
+scd4x.c:46:8:scd4x_read_measurement	88	static
diff --git a/fw/Debug/Core/Src/stm32l0xx_it.o b/fw/Debug/Core/Src/stm32l0xx_it.o
index 41ed534..c832631 100644
Binary files a/fw/Debug/Core/Src/stm32l0xx_it.o and b/fw/Debug/Core/Src/stm32l0xx_it.o differ
diff --git a/fw/Debug/Core/Src/stm32l0xx_it.su b/fw/Debug/Core/Src/stm32l0xx_it.su
index 18c00ec..865feb0 100644
--- a/fw/Debug/Core/Src/stm32l0xx_it.su
+++ b/fw/Debug/Core/Src/stm32l0xx_it.su
@@ -1,6 +1,6 @@
-stm32l0xx_it.c:71:6:NMI_Handler	0	static
-stm32l0xx_it.c:86:6:HardFault_Handler	0	static
-stm32l0xx_it.c:101:6:SVC_Handler	0	static
-stm32l0xx_it.c:114:6:PendSV_Handler	0	static
+stm32l0xx_it.c:71:6:NMI_Handler	8	static
+stm32l0xx_it.c:86:6:HardFault_Handler	8	static
+stm32l0xx_it.c:101:6:SVC_Handler	8	static
+stm32l0xx_it.c:114:6:PendSV_Handler	8	static
 stm32l0xx_it.c:127:6:SysTick_Handler	8	static
-stm32l0xx_it.c:148:6:DMA1_Channel2_3_IRQHandler	0	static
+stm32l0xx_it.c:148:6:DMA1_Channel2_3_IRQHandler	8	static
diff --git a/fw/Debug/Core/Src/subdir.mk b/fw/Debug/Core/Src/subdir.mk
index 8c179da..d27f9e0 100644
--- a/fw/Debug/Core/Src/subdir.mk
+++ b/fw/Debug/Core/Src/subdir.mk
@@ -40,21 +40,21 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Core/Src/crc8.o: ../Core/Src/crc8.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/crc8.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/crc8.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Core/Src/i2c.o: ../Core/Src/i2c.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/i2c.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/i2c.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Core/Src/led.o: ../Core/Src/led.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/led.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/led.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Core/Src/main.o: ../Core/Src/main.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Core/Src/scd4x.o: ../Core/Src/scd4x.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/scd4x.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/scd4x.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Core/Src/stm32l0xx_it.o: ../Core/Src/stm32l0xx_it.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l0xx_it.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l0xx_it.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Core/Src/syscalls.o: ../Core/Src/syscalls.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Core/Src/sysmem.o: ../Core/Src/sysmem.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Core/Src/system_stm32l0xx.o: ../Core/Src/system_stm32l0xx.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32l0xx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32l0xx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 
diff --git a/fw/Debug/Core/Src/syscalls.o b/fw/Debug/Core/Src/syscalls.o
index b0ef4b4..0737ed6 100644
Binary files a/fw/Debug/Core/Src/syscalls.o and b/fw/Debug/Core/Src/syscalls.o differ
diff --git a/fw/Debug/Core/Src/syscalls.su b/fw/Debug/Core/Src/syscalls.su
index c872039..2a6e0d7 100644
--- a/fw/Debug/Core/Src/syscalls.su
+++ b/fw/Debug/Core/Src/syscalls.su
@@ -1,18 +1,18 @@
-syscalls.c:48:6:initialise_monitor_handles	0	static
-syscalls.c:52:5:_getpid	0	static
-syscalls.c:57:5:_kill	8	static
-syscalls.c:63:6:_exit	8	static
-syscalls.c:69:27:_read	16	static
-syscalls.c:81:27:_write	16	static
-syscalls.c:92:5:_close	0	static
-syscalls.c:98:5:_fstat	0	static
-syscalls.c:104:5:_isatty	0	static
-syscalls.c:109:5:_lseek	0	static
-syscalls.c:114:5:_open	0	static
-syscalls.c:120:5:_wait	8	static
-syscalls.c:126:5:_unlink	8	static
-syscalls.c:132:5:_times	0	static
-syscalls.c:137:5:_stat	0	static
-syscalls.c:143:5:_link	8	static
+syscalls.c:48:6:initialise_monitor_handles	8	static
+syscalls.c:52:5:_getpid	8	static
+syscalls.c:57:5:_kill	16	static
+syscalls.c:63:6:_exit	16	static
+syscalls.c:69:27:_read	32	static
+syscalls.c:81:27:_write	32	static
+syscalls.c:92:5:_close	16	static
+syscalls.c:98:5:_fstat	16	static
+syscalls.c:104:5:_isatty	16	static
+syscalls.c:109:5:_lseek	24	static
+syscalls.c:114:5:_open	20	static
+syscalls.c:120:5:_wait	16	static
+syscalls.c:126:5:_unlink	16	static
+syscalls.c:132:5:_times	16	static
+syscalls.c:137:5:_stat	16	static
+syscalls.c:143:5:_link	16	static
 syscalls.c:149:5:_fork	8	static
-syscalls.c:155:5:_execve	8	static
+syscalls.c:155:5:_execve	24	static
diff --git a/fw/Debug/Core/Src/sysmem.o b/fw/Debug/Core/Src/sysmem.o
index acba301..32fccac 100644
Binary files a/fw/Debug/Core/Src/sysmem.o and b/fw/Debug/Core/Src/sysmem.o differ
diff --git a/fw/Debug/Core/Src/sysmem.su b/fw/Debug/Core/Src/sysmem.su
index c9ac5ce..4474c68 100644
--- a/fw/Debug/Core/Src/sysmem.su
+++ b/fw/Debug/Core/Src/sysmem.su
@@ -1 +1 @@
-sysmem.c:54:7:_sbrk	8	static
+sysmem.c:54:7:_sbrk	32	static
diff --git a/fw/Debug/Core/Src/system_stm32l0xx.o b/fw/Debug/Core/Src/system_stm32l0xx.o
index 99fa31a..01f2439 100644
Binary files a/fw/Debug/Core/Src/system_stm32l0xx.o and b/fw/Debug/Core/Src/system_stm32l0xx.o differ
diff --git a/fw/Debug/Core/Src/system_stm32l0xx.su b/fw/Debug/Core/Src/system_stm32l0xx.su
index f548a45..abf8ac4 100644
--- a/fw/Debug/Core/Src/system_stm32l0xx.su
+++ b/fw/Debug/Core/Src/system_stm32l0xx.su
@@ -1,2 +1,2 @@
-system_stm32l0xx.c:154:6:SystemInit	0	static
-system_stm32l0xx.c:200:6:SystemCoreClockUpdate	16	static
+system_stm32l0xx.c:154:6:SystemInit	8	static
+system_stm32l0xx.c:200:6:SystemCoreClockUpdate	32	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
index 28b4bd9..e0e6190 100644
Binary files a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o and b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o differ
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.su b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.su
index 7e34b01..da292ac 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.su
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.su
@@ -1,3 +1,15 @@
-stm32l0xx_ll_dma.c:150:13:LL_DMA_DeInit	16	static
-stm32l0xx_ll_dma.c:275:13:LL_DMA_Init	16	static
-stm32l0xx_ll_dma.c:343:6:LL_DMA_StructInit	0	static
+stm32l0xx_ll_dma.h:580:22:LL_DMA_ConfigTransfer	24	static
+stm32l0xx_ll_dma.h:933:22:LL_DMA_SetDataLength	24	static
+stm32l0xx_ll_dma.h:1018:22:LL_DMA_SetMemoryAddress	24	static
+stm32l0xx_ll_dma.h:1040:22:LL_DMA_SetPeriphAddress	24	static
+stm32l0xx_ll_dma.h:1207:22:LL_DMA_SetPeriphRequest	24	static
+stm32l0xx_ll_dma.h:1593:22:LL_DMA_ClearFlag_GI1	16	static
+stm32l0xx_ll_dma.h:1604:22:LL_DMA_ClearFlag_GI2	16	static
+stm32l0xx_ll_dma.h:1615:22:LL_DMA_ClearFlag_GI3	16	static
+stm32l0xx_ll_dma.h:1626:22:LL_DMA_ClearFlag_GI4	16	static
+stm32l0xx_ll_dma.h:1637:22:LL_DMA_ClearFlag_GI5	16	static
+stm32l0xx_ll_bus.h:301:22:LL_AHB1_GRP1_ForceReset	16	static
+stm32l0xx_ll_bus.h:326:22:LL_AHB1_GRP1_ReleaseReset	16	static
+stm32l0xx_ll_dma.c:150:13:LL_DMA_DeInit	24	static
+stm32l0xx_ll_dma.c:275:13:LL_DMA_Init	24	static
+stm32l0xx_ll_dma.c:343:6:LL_DMA_StructInit	16	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
index bf76e61..17e037f 100644
Binary files a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o and b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o differ
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.su b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.su
index ca187b5..bad8ae9 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.su
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.su
@@ -1,3 +1,11 @@
-stm32l0xx_ll_exti.c:80:10:LL_EXTI_DeInit	0	static
-stm32l0xx_ll_exti.c:105:10:LL_EXTI_Init	8	static
-stm32l0xx_ll_exti.c:186:6:LL_EXTI_StructInit	0	static
+stm32l0xx_ll_exti.h:274:22:LL_EXTI_EnableIT_0_31	16	static
+stm32l0xx_ll_exti.h:322:22:LL_EXTI_DisableIT_0_31	16	static
+stm32l0xx_ll_exti.h:425:22:LL_EXTI_EnableEvent_0_31	16	static
+stm32l0xx_ll_exti.h:472:22:LL_EXTI_DisableEvent_0_31	16	static
+stm32l0xx_ll_exti.h:572:22:LL_EXTI_EnableRisingTrig_0_31	16	static
+stm32l0xx_ll_exti.h:618:22:LL_EXTI_DisableRisingTrig_0_31	16	static
+stm32l0xx_ll_exti.h:710:22:LL_EXTI_EnableFallingTrig_0_31	16	static
+stm32l0xx_ll_exti.h:754:22:LL_EXTI_DisableFallingTrig_0_31	16	static
+stm32l0xx_ll_exti.c:80:10:LL_EXTI_DeInit	8	static
+stm32l0xx_ll_exti.c:105:10:LL_EXTI_Init	24	static
+stm32l0xx_ll_exti.c:186:6:LL_EXTI_StructInit	16	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
index 23f8214..24a5245 100644
Binary files a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o and b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o differ
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.su b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.su
index bc587a1..85319e8 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.su
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.su
@@ -1,3 +1,11 @@
-stm32l0xx_ll_gpio.c:96:13:LL_GPIO_DeInit	0	static
-stm32l0xx_ll_gpio.c:157:13:LL_GPIO_Init	32	static
-stm32l0xx_ll_gpio.c:231:6:LL_GPIO_StructInit	0	static
+stm32l0xx_ll_gpio.h:270:22:LL_GPIO_SetPinMode	24	static
+stm32l0xx_ll_gpio.h:338:22:LL_GPIO_SetPinOutputType	24	static
+stm32l0xx_ll_gpio.h:409:22:LL_GPIO_SetPinSpeed	24	static
+stm32l0xx_ll_gpio.h:478:22:LL_GPIO_SetPinPull	24	static
+stm32l0xx_ll_gpio.h:541:22:LL_GPIO_SetAFPin_0_7	24	static
+stm32l0xx_ll_gpio.h:602:22:LL_GPIO_SetAFPin_8_15	24	static
+stm32l0xx_ll_bus.h:1064:22:LL_IOP_GRP1_ForceReset	16	static
+stm32l0xx_ll_bus.h:1089:22:LL_IOP_GRP1_ReleaseReset	16	static
+stm32l0xx_ll_gpio.c:96:13:LL_GPIO_DeInit	24	static
+stm32l0xx_ll_gpio.c:157:13:LL_GPIO_Init	24	static
+stm32l0xx_ll_gpio.c:231:6:LL_GPIO_StructInit	16	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
index b6f0046..bb5a300 100644
Binary files a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o and b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o differ
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.su b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.su
index bfa06c8..9e7d505 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.su
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.su
@@ -1,3 +1,14 @@
-stm32l0xx_ll_i2c.c:87:13:LL_I2C_DeInit	0	static
-stm32l0xx_ll_i2c.c:139:13:LL_I2C_Init	12	static
-stm32l0xx_ll_i2c.c:207:6:LL_I2C_StructInit	0	static
+stm32l0xx_ll_i2c.h:391:22:LL_I2C_Enable	16	static
+stm32l0xx_ll_i2c.h:405:22:LL_I2C_Disable	16	static
+stm32l0xx_ll_i2c.h:436:22:LL_I2C_ConfigFilters	24	static
+stm32l0xx_ll_i2c.h:779:22:LL_I2C_SetOwnAddress1	24	static
+stm32l0xx_ll_i2c.h:790:22:LL_I2C_EnableOwnAddress1	16	static
+stm32l0xx_ll_i2c.h:801:22:LL_I2C_DisableOwnAddress1	16	static
+stm32l0xx_ll_i2c.h:882:22:LL_I2C_SetTiming	16	static
+stm32l0xx_ll_i2c.h:956:22:LL_I2C_SetMode	16	static
+stm32l0xx_ll_i2c.h:1935:22:LL_I2C_AcknowledgeNextData	16	static
+stm32l0xx_ll_bus.h:595:22:LL_APB1_GRP1_ForceReset	16	static
+stm32l0xx_ll_bus.h:646:22:LL_APB1_GRP1_ReleaseReset	16	static
+stm32l0xx_ll_i2c.c:87:13:LL_I2C_DeInit	24	static
+stm32l0xx_ll_i2c.c:139:13:LL_I2C_Init	16	static
+stm32l0xx_ll_i2c.c:207:6:LL_I2C_StructInit	16	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
index fabf774..d153996 100644
Binary files a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o and b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o differ
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.su b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.su
index 2af37eb..c33c786 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.su
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.su
@@ -1,3 +1,9 @@
-stm32l0xx_ll_lpuart.c:117:13:LL_LPUART_DeInit	0	static
-stm32l0xx_ll_lpuart.c:155:13:LL_LPUART_Init	24	static
-stm32l0xx_ll_lpuart.c:232:6:LL_LPUART_StructInit	0	static
+stm32l0xx_ll_lpuart.h:426:26:LL_LPUART_IsEnabled	16	static
+stm32l0xx_ll_lpuart.h:715:22:LL_LPUART_SetStopBitsLength	16	static
+stm32l0xx_ll_lpuart.h:1019:22:LL_LPUART_SetHWFlowCtrl	16	static
+stm32l0xx_ll_lpuart.h:1118:22:LL_LPUART_SetBaudRate	56	static
+stm32l0xx_ll_bus.h:595:22:LL_APB1_GRP1_ForceReset	16	static
+stm32l0xx_ll_bus.h:646:22:LL_APB1_GRP1_ReleaseReset	16	static
+stm32l0xx_ll_lpuart.c:117:13:LL_LPUART_DeInit	24	static
+stm32l0xx_ll_lpuart.c:155:13:LL_LPUART_Init	32	static
+stm32l0xx_ll_lpuart.c:232:6:LL_LPUART_StructInit	16	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
index e423123..0b7b853 100644
Binary files a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o and b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o differ
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.su b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.su
index 68038bc..c2f6d7c 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.su
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.su
@@ -1 +1,3 @@
-stm32l0xx_ll_pwr.c:56:13:LL_PWR_DeInit	0	static
+stm32l0xx_ll_bus.h:595:22:LL_APB1_GRP1_ForceReset	16	static
+stm32l0xx_ll_bus.h:646:22:LL_APB1_GRP1_ReleaseReset	16	static
+stm32l0xx_ll_pwr.c:56:13:LL_PWR_DeInit	8	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
index 1cd68e3..974fd2d 100644
Binary files a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o and b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o differ
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.su b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.su
index 0819a7b..8b7b4b2 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.su
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.su
@@ -1,13 +1,35 @@
-stm32l0xx_ll_rcc.h:802:26:LL_RCC_HSI_IsReady	0	static
-stm32l0xx_ll_rcc.h:2097:26:LL_RCC_IsActiveFlag_HSIDIV	0	static
+stm32l0xx_ll_rcc.h:705:22:LL_RCC_HSE_DisableBypass	8	static
+stm32l0xx_ll_rcc.h:802:26:LL_RCC_HSI_IsReady	8	static
+stm32l0xx_ll_rcc.h:893:22:LL_RCC_HSI_SetCalibTrimming	16	static
+stm32l0xx_ll_rcc.h:1097:26:LL_RCC_LSE_IsReady	8	static
+stm32l0xx_ll_rcc.h:1145:26:LL_RCC_LSI_IsReady	8	static
+stm32l0xx_ll_rcc.h:1163:22:LL_RCC_MSI_Enable	8	static
+stm32l0xx_ll_rcc.h:1183:26:LL_RCC_MSI_IsReady	8	static
+stm32l0xx_ll_rcc.h:1201:22:LL_RCC_MSI_SetRange	16	static
+stm32l0xx_ll_rcc.h:1218:26:LL_RCC_MSI_GetRange	8	static
+stm32l0xx_ll_rcc.h:1242:22:LL_RCC_MSI_SetCalibTrimming	16	static
+stm32l0xx_ll_rcc.h:1289:26:LL_RCC_GetSysClkSource	8	static
+stm32l0xx_ll_rcc.h:1360:26:LL_RCC_GetAHBPrescaler	8	static
+stm32l0xx_ll_rcc.h:1375:26:LL_RCC_GetAPB1Prescaler	8	static
+stm32l0xx_ll_rcc.h:1390:26:LL_RCC_GetAPB2Prescaler	8	static
+stm32l0xx_ll_rcc.h:1586:26:LL_RCC_GetUSARTClockSource	16	static
+stm32l0xx_ll_rcc.h:1604:26:LL_RCC_GetLPUARTClockSource	16	static
+stm32l0xx_ll_rcc.h:1625:26:LL_RCC_GetI2CClockSource	16	static
+stm32l0xx_ll_rcc.h:1641:26:LL_RCC_GetLPTIMClockSource	16	static
+stm32l0xx_ll_rcc.h:1805:26:LL_RCC_PLL_IsReady	8	static
+stm32l0xx_ll_rcc.h:1859:26:LL_RCC_PLL_GetMainSource	8	static
+stm32l0xx_ll_rcc.h:1878:26:LL_RCC_PLL_GetMultiplicator	8	static
+stm32l0xx_ll_rcc.h:1891:26:LL_RCC_PLL_GetDivider	8	static
+stm32l0xx_ll_rcc.h:2097:26:LL_RCC_IsActiveFlag_HSIDIV	8	static
+stm32l0xx_ll_rcc.h:2189:22:LL_RCC_ClearResetFlags	8	static
 stm32l0xx_ll_rcc.c:112:13:LL_RCC_DeInit	16	static,ignoring_inline_asm
-stm32l0xx_ll_rcc.c:622:10:RCC_GetHCLKClockFreq	0	static
-stm32l0xx_ll_rcc.c:633:10:RCC_GetPCLK1ClockFreq	0	static
-stm32l0xx_ll_rcc.c:644:10:RCC_GetPCLK2ClockFreq	0	static
-stm32l0xx_ll_rcc.c:654:10:RCC_PLL_GetFreqDomain_SYS	8	static
-stm32l0xx_ll_rcc.c:579:10:RCC_GetSystemClockFreq	8	static
-stm32l0xx_ll_rcc.c:222:6:LL_RCC_GetSystemClocksFreq	8	static
-stm32l0xx_ll_rcc.c:247:10:LL_RCC_GetUSARTClockFreq	8	static
-stm32l0xx_ll_rcc.c:344:10:LL_RCC_GetI2CClockFreq	8	static
-stm32l0xx_ll_rcc.c:423:10:LL_RCC_GetLPUARTClockFreq	8	static
-stm32l0xx_ll_rcc.c:474:10:LL_RCC_GetLPTIMClockFreq	8	static
+stm32l0xx_ll_rcc.c:222:6:LL_RCC_GetSystemClocksFreq	16	static
+stm32l0xx_ll_rcc.c:247:10:LL_RCC_GetUSARTClockFreq	24	static
+stm32l0xx_ll_rcc.c:344:10:LL_RCC_GetI2CClockFreq	24	static
+stm32l0xx_ll_rcc.c:423:10:LL_RCC_GetLPUARTClockFreq	24	static
+stm32l0xx_ll_rcc.c:474:10:LL_RCC_GetLPTIMClockFreq	24	static
+stm32l0xx_ll_rcc.c:579:10:RCC_GetSystemClockFreq	16	static
+stm32l0xx_ll_rcc.c:622:10:RCC_GetHCLKClockFreq	16	static
+stm32l0xx_ll_rcc.c:633:10:RCC_GetPCLK1ClockFreq	16	static
+stm32l0xx_ll_rcc.c:644:10:RCC_GetPCLK2ClockFreq	16	static
+stm32l0xx_ll_rcc.c:654:10:RCC_PLL_GetFreqDomain_SYS	24	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
index 19bf0e5..3e5f0f9 100644
Binary files a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o and b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o differ
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.su b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.su
index ab2a69f..77b5e99 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.su
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.su
@@ -1,7 +1,27 @@
-stm32l0xx_ll_utils.c:147:6:LL_Init1msTick	8	static
-stm32l0xx_ll_utils.c:163:6:LL_mDelay	8	static
-stm32l0xx_ll_utils.c:225:6:LL_SetSystemCoreClock	0	static
-stm32l0xx_ll_utils.c:239:13:LL_SetFlashLatency	8	static
-stm32l0xx_ll_utils.c:521:20:UTILS_EnablePLLAndSwitchSystem	16	static
-stm32l0xx_ll_utils.c:338:13:LL_PLL_ConfigSystemClock_HSI	24	static
-stm32l0xx_ll_utils.c:397:13:LL_PLL_ConfigSystemClock_HSE	24	static
+stm32l0xx_ll_rcc.h:695:22:LL_RCC_HSE_EnableBypass	8	static
+stm32l0xx_ll_rcc.h:705:22:LL_RCC_HSE_DisableBypass	8	static
+stm32l0xx_ll_rcc.h:715:22:LL_RCC_HSE_Enable	8	static
+stm32l0xx_ll_rcc.h:735:26:LL_RCC_HSE_IsReady	8	static
+stm32l0xx_ll_rcc.h:782:22:LL_RCC_HSI_Enable	8	static
+stm32l0xx_ll_rcc.h:802:26:LL_RCC_HSI_IsReady	8	static
+stm32l0xx_ll_rcc.h:1275:22:LL_RCC_SetSysClkSource	16	static
+stm32l0xx_ll_rcc.h:1289:26:LL_RCC_GetSysClkSource	8	static
+stm32l0xx_ll_rcc.h:1309:22:LL_RCC_SetAHBPrescaler	16	static
+stm32l0xx_ll_rcc.h:1325:22:LL_RCC_SetAPB1Prescaler	16	static
+stm32l0xx_ll_rcc.h:1341:22:LL_RCC_SetAPB2Prescaler	16	static
+stm32l0xx_ll_rcc.h:1784:22:LL_RCC_PLL_Enable	8	static
+stm32l0xx_ll_rcc.h:1805:26:LL_RCC_PLL_IsReady	8	static
+stm32l0xx_ll_rcc.h:1834:22:LL_RCC_PLL_ConfigDomain_SYS	24	static
+stm32l0xx_ll_utils.h:220:22:LL_InitTick	16	static
+stm32l0xx_ll_system.h:912:22:LL_FLASH_SetLatency	16	static
+stm32l0xx_ll_system.h:924:26:LL_FLASH_GetLatency	8	static
+stm32l0xx_ll_pwr.h:285:26:LL_PWR_GetRegulVoltageScaling	8	static
+stm32l0xx_ll_utils.c:147:6:LL_Init1msTick	16	static
+stm32l0xx_ll_utils.c:163:6:LL_mDelay	24	static
+stm32l0xx_ll_utils.c:225:6:LL_SetSystemCoreClock	16	static
+stm32l0xx_ll_utils.c:239:13:LL_SetFlashLatency	32	static
+stm32l0xx_ll_utils.c:338:13:LL_PLL_ConfigSystemClock_HSI	32	static
+stm32l0xx_ll_utils.c:397:13:LL_PLL_ConfigSystemClock_HSE	40	static
+stm32l0xx_ll_utils.c:467:17:UTILS_GetPLLOutputFrequency	24	static
+stm32l0xx_ll_utils.c:497:20:UTILS_PLL_IsBusy	16	static
+stm32l0xx_ll_utils.c:521:20:UTILS_EnablePLLAndSwitchSystem	32	static
diff --git a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
index 40b8c42..594a220 100644
--- a/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
+++ b/fw/Debug/Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
@@ -37,19 +37,19 @@ C_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o: ../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o: ../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o: ../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o: ../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o: ../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o: ../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o: ../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o: ../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.c Drivers/STM32L0xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -Os -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m0plus -std=gnu11 -g3 -DSTM32L011xx -DDEBUG -DUSE_FULL_LL_DRIVER '-DHSE_VALUE=8000000' '-DHSE_STARTUP_TIMEOUT=100' '-DLSE_STARTUP_TIMEOUT=5000' '-DLSE_VALUE=32768' '-DMSI_VALUE=2097000' '-DHSI_VALUE=16000000' '-DLSI_VALUE=37000' '-DVDD_VALUE=3300' '-DPREFETCH_ENABLE=0' '-DINSTRUCTION_CACHE_ENABLE=1' '-DDATA_CACHE_ENABLE=1' -c -I../Core/Inc -I../Drivers/STM32L0xx_HAL_Driver/Inc -I../Drivers/CMSIS/Device/ST/STM32L0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 
diff --git a/fw/Debug/iaq_wired_sensor.bin b/fw/Debug/iaq_wired_sensor.bin
index 08965d5..d504be1 100755
Binary files a/fw/Debug/iaq_wired_sensor.bin and b/fw/Debug/iaq_wired_sensor.bin differ
diff --git a/fw/Debug/iaq_wired_sensor.elf b/fw/Debug/iaq_wired_sensor.elf
index 1a8b7e0..bbad228 100755
Binary files a/fw/Debug/iaq_wired_sensor.elf and b/fw/Debug/iaq_wired_sensor.elf differ
diff --git a/fw/Debug/iaq_wired_sensor.list b/fw/Debug/iaq_wired_sensor.list
index 7e0adf7..6fa4b97 100644
--- a/fw/Debug/iaq_wired_sensor.list
+++ b/fw/Debug/iaq_wired_sensor.list
@@ -5,47 +5,45 @@ Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
   0 .isr_vector   000000c0  08000000  08000000  00010000  2**0
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         000010c4  080000c0  080000c0  000100c0  2**2
+  1 .text         00002300  080000c0  080000c0  000100c0  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       00000024  08001184  08001184  00011184  2**0
+  2 .rodata       0000002c  080023c0  080023c0  000123c0  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  080011a8  080011a8  00020004  2**0
+  3 .ARM.extab    00000000  080023ec  080023ec  00020004  2**0
                   CONTENTS
-  4 .ARM          00000008  080011a8  080011a8  000111a8  2**2
+  4 .ARM          00000008  080023ec  080023ec  000123ec  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  5 .preinit_array 00000000  080011b0  080011b0  00020004  2**0
+  5 .preinit_array 00000000  080023f4  080023f4  00020004  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  080011b0  080011b0  000111b0  2**2
+  6 .init_array   00000004  080023f4  080023f4  000123f4  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  7 .fini_array   00000004  080011b4  080011b4  000111b4  2**2
+  7 .fini_array   00000004  080023f8  080023f8  000123f8  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  8 .data         00000004  20000000  080011b8  00020000  2**2
+  8 .data         00000004  20000000  080023fc  00020000  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          00000044  20000004  080011bc  00020004  2**2
+  9 .bss          00000044  20000004  08002400  00020004  2**2
                   ALLOC
- 10 ._user_heap_stack 00000600  20000048  080011bc  00020048  2**0
+ 10 ._user_heap_stack 00000600  20000048  08002400  00020048  2**0
                   ALLOC
  11 .ARM.attributes 00000028  00000000  00000000  00020004  2**0
                   CONTENTS, READONLY
- 12 .debug_info   000061e6  00000000  00000000  0002002c  2**0
+ 12 .debug_info   000047c3  00000000  00000000  0002002c  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 0000189b  00000000  00000000  00026212  2**0
+ 13 .debug_abbrev 0000128a  00000000  00000000  000247ef  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_loc    00002616  00000000  00000000  00027aad  2**0
+ 14 .debug_aranges 000006b8  00000000  00000000  00025a80  2**3
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_aranges 000002e8  00000000  00000000  0002a0c8  2**3
+ 15 .debug_ranges 00000600  00000000  00000000  00026138  2**3
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_ranges 00000bd8  00000000  00000000  0002a3b0  2**3
+ 16 .debug_macro  0000a637  00000000  00000000  00026738  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_macro  0000a637  00000000  00000000  0002af88  2**0
+ 17 .debug_line   00004f6d  00000000  00000000  00030d6f  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_line   0000583d  00000000  00000000  000355bf  2**0
+ 18 .debug_str    00039797  00000000  00000000  00035cdc  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .debug_str    000397bb  00000000  00000000  0003adfc  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 20 .comment      00000053  00000000  00000000  000745b7  2**0
+ 19 .comment      00000053  00000000  00000000  0006f473  2**0
                   CONTENTS, READONLY
- 21 .debug_frame  00000664  00000000  00000000  0007460c  2**2
+ 20 .debug_frame  000016e4  00000000  00000000  0006f4c8  2**2
                   CONTENTS, READONLY, DEBUGGING, OCTETS
 
 Disassembly of section .text:
@@ -67,7 +65,7 @@ Disassembly of section .text:
  80000da:	bd10      	pop	{r4, pc}
  80000dc:	20000004 	.word	0x20000004
  80000e0:	00000000 	.word	0x00000000
- 80000e4:	0800116c 	.word	0x0800116c
+ 80000e4:	080023a8 	.word	0x080023a8
 
 080000e8 <frame_dummy>:
  80000e8:	4b04      	ldr	r3, [pc, #16]	; (80000fc <frame_dummy+0x14>)
@@ -82,7 +80,7 @@ Disassembly of section .text:
  80000fa:	46c0      	nop			; (mov r8, r8)
  80000fc:	00000000 	.word	0x00000000
  8000100:	20000008 	.word	0x20000008
- 8000104:	0800116c 	.word	0x0800116c
+ 8000104:	080023a8 	.word	0x080023a8
 
 08000108 <__udivsi3>:
  8000108:	2200      	movs	r2, #0
@@ -741,2343 +739,5360 @@ Disassembly of section .text:
  8000614:	01010101 	.word	0x01010101
 	...
 
-08000620 <i2c_init>:
-
-i2c_context_t *i2c_context;
-
-int i2c_init(i2c_context_t *context)
+08000620 <LL_I2C_IsActiveFlag_TXE>:
+  * @rmtoll ISR          TXE           LL_I2C_IsActiveFlag_TXE
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
 {
-	if (context == NULL) {
- 8000620:	2800      	cmp	r0, #0
- 8000622:	d003      	beq.n	800062c <i2c_init+0xc>
-		return I2C_ERROR;
-	}
-	i2c_context = context;
- 8000624:	4b03      	ldr	r3, [pc, #12]	; (8000634 <i2c_init+0x14>)
- 8000626:	6018      	str	r0, [r3, #0]
-	return I2C_OK;
- 8000628:	2000      	movs	r0, #0
+ 8000620:	b580      	push	{r7, lr}
+ 8000622:	b082      	sub	sp, #8
+ 8000624:	af00      	add	r7, sp, #0
+ 8000626:	6078      	str	r0, [r7, #4]
+  return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)) ? 1UL : 0UL);
+ 8000628:	687b      	ldr	r3, [r7, #4]
+ 800062a:	699b      	ldr	r3, [r3, #24]
+ 800062c:	2201      	movs	r2, #1
+ 800062e:	4013      	ands	r3, r2
+ 8000630:	2b01      	cmp	r3, #1
+ 8000632:	d101      	bne.n	8000638 <LL_I2C_IsActiveFlag_TXE+0x18>
+ 8000634:	2301      	movs	r3, #1
+ 8000636:	e000      	b.n	800063a <LL_I2C_IsActiveFlag_TXE+0x1a>
+ 8000638:	2300      	movs	r3, #0
 }
- 800062a:	4770      	bx	lr
-		return I2C_ERROR;
- 800062c:	2001      	movs	r0, #1
- 800062e:	4240      	negs	r0, r0
- 8000630:	e7fb      	b.n	800062a <i2c_init+0xa>
- 8000632:	46c0      	nop			; (mov r8, r8)
- 8000634:	20000024 	.word	0x20000024
+ 800063a:	0018      	movs	r0, r3
+ 800063c:	46bd      	mov	sp, r7
+ 800063e:	b002      	add	sp, #8
+ 8000640:	bd80      	pop	{r7, pc}
 
-08000638 <i2c_transmit>:
+08000642 <LL_I2C_IsActiveFlag_RXNE>:
+  * @rmtoll ISR          RXNE          LL_I2C_IsActiveFlag_RXNE
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
+{
+ 8000642:	b580      	push	{r7, lr}
+ 8000644:	b082      	sub	sp, #8
+ 8000646:	af00      	add	r7, sp, #0
+ 8000648:	6078      	str	r0, [r7, #4]
+  return ((READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)) ? 1UL : 0UL);
+ 800064a:	687b      	ldr	r3, [r7, #4]
+ 800064c:	699b      	ldr	r3, [r3, #24]
+ 800064e:	2204      	movs	r2, #4
+ 8000650:	4013      	ands	r3, r2
+ 8000652:	2b04      	cmp	r3, #4
+ 8000654:	d101      	bne.n	800065a <LL_I2C_IsActiveFlag_RXNE+0x18>
+ 8000656:	2301      	movs	r3, #1
+ 8000658:	e000      	b.n	800065c <LL_I2C_IsActiveFlag_RXNE+0x1a>
+ 800065a:	2300      	movs	r3, #0
+}
+ 800065c:	0018      	movs	r0, r3
+ 800065e:	46bd      	mov	sp, r7
+ 8000660:	b002      	add	sp, #8
+ 8000662:	bd80      	pop	{r7, pc}
 
-int i2c_transmit(uint8_t address, uint8_t *buffer, int len)
+08000664 <LL_I2C_IsActiveFlag_NACK>:
+  * @rmtoll ISR          NACKF         LL_I2C_IsActiveFlag_NACK
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
 {
-	LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
- 8000638:	4b15      	ldr	r3, [pc, #84]	; (8000690 <i2c_transmit+0x58>)
+ 8000664:	b580      	push	{r7, lr}
+ 8000666:	b082      	sub	sp, #8
+ 8000668:	af00      	add	r7, sp, #0
+ 800066a:	6078      	str	r0, [r7, #4]
+  return ((READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF)) ? 1UL : 0UL);
+ 800066c:	687b      	ldr	r3, [r7, #4]
+ 800066e:	699b      	ldr	r3, [r3, #24]
+ 8000670:	2210      	movs	r2, #16
+ 8000672:	4013      	ands	r3, r2
+ 8000674:	2b10      	cmp	r3, #16
+ 8000676:	d101      	bne.n	800067c <LL_I2C_IsActiveFlag_NACK+0x18>
+ 8000678:	2301      	movs	r3, #1
+ 800067a:	e000      	b.n	800067e <LL_I2C_IsActiveFlag_NACK+0x1a>
+ 800067c:	2300      	movs	r3, #0
+}
+ 800067e:	0018      	movs	r0, r3
+ 8000680:	46bd      	mov	sp, r7
+ 8000682:	b002      	add	sp, #8
+ 8000684:	bd80      	pop	{r7, pc}
+
+08000686 <LL_I2C_IsActiveFlag_STOP>:
+  * @rmtoll ISR          STOPF         LL_I2C_IsActiveFlag_STOP
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
 {
- 800063a:	b570      	push	{r4, r5, r6, lr}
-	LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
- 800063c:	681b      	ldr	r3, [r3, #0]
+ 8000686:	b580      	push	{r7, lr}
+ 8000688:	b082      	sub	sp, #8
+ 800068a:	af00      	add	r7, sp, #0
+ 800068c:	6078      	str	r0, [r7, #4]
+  return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
+ 800068e:	687b      	ldr	r3, [r7, #4]
+ 8000690:	699b      	ldr	r3, [r3, #24]
+ 8000692:	2220      	movs	r2, #32
+ 8000694:	4013      	ands	r3, r2
+ 8000696:	2b20      	cmp	r3, #32
+ 8000698:	d101      	bne.n	800069e <LL_I2C_IsActiveFlag_STOP+0x18>
+ 800069a:	2301      	movs	r3, #1
+ 800069c:	e000      	b.n	80006a0 <LL_I2C_IsActiveFlag_STOP+0x1a>
+ 800069e:	2300      	movs	r3, #0
+}
+ 80006a0:	0018      	movs	r0, r3
+ 80006a2:	46bd      	mov	sp, r7
+ 80006a4:	b002      	add	sp, #8
+ 80006a6:	bd80      	pop	{r7, pc}
+
+080006a8 <LL_I2C_ClearFlag_STOP>:
+  * @rmtoll ICR          STOPCF        LL_I2C_ClearFlag_STOP
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
+{
+ 80006a8:	b580      	push	{r7, lr}
+ 80006aa:	b082      	sub	sp, #8
+ 80006ac:	af00      	add	r7, sp, #0
+ 80006ae:	6078      	str	r0, [r7, #4]
+  SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
+ 80006b0:	687b      	ldr	r3, [r7, #4]
+ 80006b2:	69db      	ldr	r3, [r3, #28]
+ 80006b4:	2220      	movs	r2, #32
+ 80006b6:	431a      	orrs	r2, r3
+ 80006b8:	687b      	ldr	r3, [r7, #4]
+ 80006ba:	61da      	str	r2, [r3, #28]
+}
+ 80006bc:	46c0      	nop			; (mov r8, r8)
+ 80006be:	46bd      	mov	sp, r7
+ 80006c0:	b002      	add	sp, #8
+ 80006c2:	bd80      	pop	{r7, pc}
+
+080006c4 <LL_I2C_HandleTransfer>:
+  *         @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
   * @retval None
   */
 __STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
                                            uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
 {
+ 80006c4:	b580      	push	{r7, lr}
+ 80006c6:	b084      	sub	sp, #16
+ 80006c8:	af00      	add	r7, sp, #0
+ 80006ca:	60f8      	str	r0, [r7, #12]
+ 80006cc:	60b9      	str	r1, [r7, #8]
+ 80006ce:	607a      	str	r2, [r7, #4]
+ 80006d0:	603b      	str	r3, [r7, #0]
   MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 |
- 800063e:	0414      	lsls	r4, r2, #16
- 8000640:	681b      	ldr	r3, [r3, #0]
- 8000642:	4304      	orrs	r4, r0
- 8000644:	685d      	ldr	r5, [r3, #4]
- 8000646:	4813      	ldr	r0, [pc, #76]	; (8000694 <i2c_transmit+0x5c>)
- 8000648:	4005      	ands	r5, r0
- 800064a:	4813      	ldr	r0, [pc, #76]	; (8000698 <i2c_transmit+0x60>)
- 800064c:	432c      	orrs	r4, r5
- 800064e:	4304      	orrs	r4, r0
- 8000650:	605c      	str	r4, [r3, #4]
-  return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
- 8000652:	2020      	movs	r0, #32
+ 80006d2:	68fb      	ldr	r3, [r7, #12]
+ 80006d4:	685b      	ldr	r3, [r3, #4]
+ 80006d6:	69fa      	ldr	r2, [r7, #28]
+ 80006d8:	0d51      	lsrs	r1, r2, #21
+ 80006da:	2280      	movs	r2, #128	; 0x80
+ 80006dc:	00d2      	lsls	r2, r2, #3
+ 80006de:	400a      	ands	r2, r1
+ 80006e0:	490a      	ldr	r1, [pc, #40]	; (800070c <LL_I2C_HandleTransfer+0x48>)
+ 80006e2:	430a      	orrs	r2, r1
+ 80006e4:	43d2      	mvns	r2, r2
+ 80006e6:	401a      	ands	r2, r3
+ 80006e8:	68b9      	ldr	r1, [r7, #8]
+ 80006ea:	687b      	ldr	r3, [r7, #4]
+ 80006ec:	4319      	orrs	r1, r3
+ 80006ee:	683b      	ldr	r3, [r7, #0]
+ 80006f0:	041b      	lsls	r3, r3, #16
+ 80006f2:	4319      	orrs	r1, r3
+ 80006f4:	69bb      	ldr	r3, [r7, #24]
+ 80006f6:	4319      	orrs	r1, r3
+ 80006f8:	69fb      	ldr	r3, [r7, #28]
+ 80006fa:	430b      	orrs	r3, r1
+ 80006fc:	431a      	orrs	r2, r3
+ 80006fe:	68fb      	ldr	r3, [r7, #12]
+ 8000700:	605a      	str	r2, [r3, #4]
              (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) |
              I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
              I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
              SlaveAddr | SlaveAddrSize | (TransferSize << I2C_CR2_NBYTES_Pos) | EndMode | Request);
 }
- 8000654:	2400      	movs	r4, #0
-  return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)) ? 1UL : 0UL);
- 8000656:	2501      	movs	r5, #1
-  return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
- 8000658:	699e      	ldr	r6, [r3, #24]
- 800065a:	4206      	tst	r6, r0
- 800065c:	d00d      	beq.n	800067a <i2c_transmit+0x42>
-  SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
- 800065e:	69d9      	ldr	r1, [r3, #28]
- 8000660:	4301      	orrs	r1, r0
- 8000662:	61d9      	str	r1, [r3, #28]
-  return ((READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF)) ? 1UL : 0UL);
- 8000664:	6999      	ldr	r1, [r3, #24]
- 8000666:	2310      	movs	r3, #16
- 8000668:	0008      	movs	r0, r1
- 800066a:	4018      	ands	r0, r3
- 800066c:	4219      	tst	r1, r3
- 800066e:	d10d      	bne.n	800068c <i2c_transmit+0x54>
-	}
-	LL_I2C_ClearFlag_STOP(i2c_context->i2c);
-	if (LL_I2C_IsActiveFlag_NACK(i2c_context->i2c)) {
-		return I2C_ERROR_NACK;
-	}
-	if (len != i) {
- 8000670:	42a2      	cmp	r2, r4
- 8000672:	d001      	beq.n	8000678 <i2c_transmit+0x40>
-		// this will probably never happen, as NACK flag
-		// is raised everytime len != number of TXed bytes
-		return I2C_ERROR_TX_INCOMPLETE;
- 8000674:	2003      	movs	r0, #3
-		return I2C_ERROR_NACK;
- 8000676:	4240      	negs	r0, r0
-	}
-	return I2C_OK;
+ 8000702:	46c0      	nop			; (mov r8, r8)
+ 8000704:	46bd      	mov	sp, r7
+ 8000706:	b004      	add	sp, #16
+ 8000708:	bd80      	pop	{r7, pc}
+ 800070a:	46c0      	nop			; (mov r8, r8)
+ 800070c:	03ff7bff 	.word	0x03ff7bff
+
+08000710 <LL_I2C_ReceiveData8>:
+  * @rmtoll RXDR         RXDATA        LL_I2C_ReceiveData8
+  * @param  I2Cx I2C Instance.
+  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
+  */
+__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
+{
+ 8000710:	b580      	push	{r7, lr}
+ 8000712:	b082      	sub	sp, #8
+ 8000714:	af00      	add	r7, sp, #0
+ 8000716:	6078      	str	r0, [r7, #4]
+  return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
+ 8000718:	687b      	ldr	r3, [r7, #4]
+ 800071a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800071c:	b2db      	uxtb	r3, r3
 }
- 8000678:	bd70      	pop	{r4, r5, r6, pc}
-  return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)) ? 1UL : 0UL);
- 800067a:	699e      	ldr	r6, [r3, #24]
-		if (LL_I2C_IsActiveFlag_TXE(i2c_context->i2c)) {
- 800067c:	422e      	tst	r6, r5
- 800067e:	d0eb      	beq.n	8000658 <i2c_transmit+0x20>
-			if (i < len) {
- 8000680:	42a2      	cmp	r2, r4
- 8000682:	dde9      	ble.n	8000658 <i2c_transmit+0x20>
+ 800071e:	0018      	movs	r0, r3
+ 8000720:	46bd      	mov	sp, r7
+ 8000722:	b002      	add	sp, #8
+ 8000724:	bd80      	pop	{r7, pc}
+
+08000726 <LL_I2C_TransmitData8>:
+  * @param  I2Cx I2C Instance.
   * @param  Data Value between Min_Data=0x00 and Max_Data=0xFF
   * @retval None
   */
 __STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
 {
+ 8000726:	b580      	push	{r7, lr}
+ 8000728:	b082      	sub	sp, #8
+ 800072a:	af00      	add	r7, sp, #0
+ 800072c:	6078      	str	r0, [r7, #4]
+ 800072e:	000a      	movs	r2, r1
+ 8000730:	1cfb      	adds	r3, r7, #3
+ 8000732:	701a      	strb	r2, [r3, #0]
   WRITE_REG(I2Cx->TXDR, Data);
- 8000684:	5d0e      	ldrb	r6, [r1, r4]
- 8000686:	3401      	adds	r4, #1
- 8000688:	629e      	str	r6, [r3, #40]	; 0x28
+ 8000734:	1cfb      	adds	r3, r7, #3
+ 8000736:	781a      	ldrb	r2, [r3, #0]
+ 8000738:	687b      	ldr	r3, [r7, #4]
+ 800073a:	629a      	str	r2, [r3, #40]	; 0x28
 }
- 800068a:	e7e5      	b.n	8000658 <i2c_transmit+0x20>
-		return I2C_ERROR_NACK;
- 800068c:	2002      	movs	r0, #2
- 800068e:	e7f2      	b.n	8000676 <i2c_transmit+0x3e>
- 8000690:	20000024 	.word	0x20000024
- 8000694:	fc008000 	.word	0xfc008000
- 8000698:	80002000 	.word	0x80002000
+ 800073c:	46c0      	nop			; (mov r8, r8)
+ 800073e:	46bd      	mov	sp, r7
+ 8000740:	b002      	add	sp, #8
+ 8000742:	bd80      	pop	{r7, pc}
 
-0800069c <i2c_receive>:
+08000744 <i2c_init>:
+#include "i2c.h"
+
+i2c_context_t *i2c_context;
+
+int i2c_init(i2c_context_t *context)
+{
+ 8000744:	b580      	push	{r7, lr}
+ 8000746:	b082      	sub	sp, #8
+ 8000748:	af00      	add	r7, sp, #0
+ 800074a:	6078      	str	r0, [r7, #4]
+	if (context == NULL) {
+ 800074c:	687b      	ldr	r3, [r7, #4]
+ 800074e:	2b00      	cmp	r3, #0
+ 8000750:	d102      	bne.n	8000758 <i2c_init+0x14>
+		return I2C_ERROR;
+ 8000752:	2301      	movs	r3, #1
+ 8000754:	425b      	negs	r3, r3
+ 8000756:	e003      	b.n	8000760 <i2c_init+0x1c>
+	}
+	i2c_context = context;
+ 8000758:	4b03      	ldr	r3, [pc, #12]	; (8000768 <i2c_init+0x24>)
+ 800075a:	687a      	ldr	r2, [r7, #4]
+ 800075c:	601a      	str	r2, [r3, #0]
+	return I2C_OK;
+ 800075e:	2300      	movs	r3, #0
+}
+ 8000760:	0018      	movs	r0, r3
+ 8000762:	46bd      	mov	sp, r7
+ 8000764:	b002      	add	sp, #8
+ 8000766:	bd80      	pop	{r7, pc}
+ 8000768:	20000024 	.word	0x20000024
+
+0800076c <i2c_transmit>:
+
+int i2c_transmit(uint8_t address, uint8_t *buffer, int len)
+{
+ 800076c:	b580      	push	{r7, lr}
+ 800076e:	b088      	sub	sp, #32
+ 8000770:	af02      	add	r7, sp, #8
+ 8000772:	60b9      	str	r1, [r7, #8]
+ 8000774:	607a      	str	r2, [r7, #4]
+ 8000776:	210f      	movs	r1, #15
+ 8000778:	187b      	adds	r3, r7, r1
+ 800077a:	1c02      	adds	r2, r0, #0
+ 800077c:	701a      	strb	r2, [r3, #0]
+	LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
+ 800077e:	4b28      	ldr	r3, [pc, #160]	; (8000820 <i2c_transmit+0xb4>)
+ 8000780:	681b      	ldr	r3, [r3, #0]
+ 8000782:	6818      	ldr	r0, [r3, #0]
+ 8000784:	187b      	adds	r3, r7, r1
+ 8000786:	7819      	ldrb	r1, [r3, #0]
+ 8000788:	687a      	ldr	r2, [r7, #4]
+ 800078a:	4b26      	ldr	r3, [pc, #152]	; (8000824 <i2c_transmit+0xb8>)
+ 800078c:	9301      	str	r3, [sp, #4]
+ 800078e:	2380      	movs	r3, #128	; 0x80
+ 8000790:	049b      	lsls	r3, r3, #18
+ 8000792:	9300      	str	r3, [sp, #0]
+ 8000794:	0013      	movs	r3, r2
+ 8000796:	2200      	movs	r2, #0
+ 8000798:	f7ff ff94 	bl	80006c4 <LL_I2C_HandleTransfer>
+			LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_WRITE);
+	int i = 0;
+ 800079c:	2300      	movs	r3, #0
+ 800079e:	617b      	str	r3, [r7, #20]
+	// Autoend mode will raise STOP flag if NACK is detected
+	// (or if desired number of bytes is transmitted)
+	while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
+ 80007a0:	e018      	b.n	80007d4 <i2c_transmit+0x68>
+		if (LL_I2C_IsActiveFlag_TXE(i2c_context->i2c)) {
+ 80007a2:	4b1f      	ldr	r3, [pc, #124]	; (8000820 <i2c_transmit+0xb4>)
+ 80007a4:	681b      	ldr	r3, [r3, #0]
+ 80007a6:	681b      	ldr	r3, [r3, #0]
+ 80007a8:	0018      	movs	r0, r3
+ 80007aa:	f7ff ff39 	bl	8000620 <LL_I2C_IsActiveFlag_TXE>
+ 80007ae:	1e03      	subs	r3, r0, #0
+ 80007b0:	d010      	beq.n	80007d4 <i2c_transmit+0x68>
+			if (i < len) {
+ 80007b2:	697a      	ldr	r2, [r7, #20]
+ 80007b4:	687b      	ldr	r3, [r7, #4]
+ 80007b6:	429a      	cmp	r2, r3
+ 80007b8:	da0c      	bge.n	80007d4 <i2c_transmit+0x68>
+				LL_I2C_TransmitData8(i2c_context->i2c, buffer[i++]);
+ 80007ba:	4b19      	ldr	r3, [pc, #100]	; (8000820 <i2c_transmit+0xb4>)
+ 80007bc:	681b      	ldr	r3, [r3, #0]
+ 80007be:	6818      	ldr	r0, [r3, #0]
+ 80007c0:	697b      	ldr	r3, [r7, #20]
+ 80007c2:	1c5a      	adds	r2, r3, #1
+ 80007c4:	617a      	str	r2, [r7, #20]
+ 80007c6:	001a      	movs	r2, r3
+ 80007c8:	68bb      	ldr	r3, [r7, #8]
+ 80007ca:	189b      	adds	r3, r3, r2
+ 80007cc:	781b      	ldrb	r3, [r3, #0]
+ 80007ce:	0019      	movs	r1, r3
+ 80007d0:	f7ff ffa9 	bl	8000726 <LL_I2C_TransmitData8>
+	while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
+ 80007d4:	4b12      	ldr	r3, [pc, #72]	; (8000820 <i2c_transmit+0xb4>)
+ 80007d6:	681b      	ldr	r3, [r3, #0]
+ 80007d8:	681b      	ldr	r3, [r3, #0]
+ 80007da:	0018      	movs	r0, r3
+ 80007dc:	f7ff ff53 	bl	8000686 <LL_I2C_IsActiveFlag_STOP>
+ 80007e0:	1e03      	subs	r3, r0, #0
+ 80007e2:	d0de      	beq.n	80007a2 <i2c_transmit+0x36>
+			}
+		}
+	}
+	LL_I2C_ClearFlag_STOP(i2c_context->i2c);
+ 80007e4:	4b0e      	ldr	r3, [pc, #56]	; (8000820 <i2c_transmit+0xb4>)
+ 80007e6:	681b      	ldr	r3, [r3, #0]
+ 80007e8:	681b      	ldr	r3, [r3, #0]
+ 80007ea:	0018      	movs	r0, r3
+ 80007ec:	f7ff ff5c 	bl	80006a8 <LL_I2C_ClearFlag_STOP>
+	if (LL_I2C_IsActiveFlag_NACK(i2c_context->i2c)) {
+ 80007f0:	4b0b      	ldr	r3, [pc, #44]	; (8000820 <i2c_transmit+0xb4>)
+ 80007f2:	681b      	ldr	r3, [r3, #0]
+ 80007f4:	681b      	ldr	r3, [r3, #0]
+ 80007f6:	0018      	movs	r0, r3
+ 80007f8:	f7ff ff34 	bl	8000664 <LL_I2C_IsActiveFlag_NACK>
+ 80007fc:	1e03      	subs	r3, r0, #0
+ 80007fe:	d002      	beq.n	8000806 <i2c_transmit+0x9a>
+		return I2C_ERROR_NACK;
+ 8000800:	2302      	movs	r3, #2
+ 8000802:	425b      	negs	r3, r3
+ 8000804:	e007      	b.n	8000816 <i2c_transmit+0xaa>
+	}
+	if (len != i) {
+ 8000806:	687a      	ldr	r2, [r7, #4]
+ 8000808:	697b      	ldr	r3, [r7, #20]
+ 800080a:	429a      	cmp	r2, r3
+ 800080c:	d002      	beq.n	8000814 <i2c_transmit+0xa8>
+		// this will probably never happen, as NACK flag
+		// is raised everytime len != number of TXed bytes
+		return I2C_ERROR_TX_INCOMPLETE;
+ 800080e:	2303      	movs	r3, #3
+ 8000810:	425b      	negs	r3, r3
+ 8000812:	e000      	b.n	8000816 <i2c_transmit+0xaa>
+	}
+	return I2C_OK;
+ 8000814:	2300      	movs	r3, #0
+}
+ 8000816:	0018      	movs	r0, r3
+ 8000818:	46bd      	mov	sp, r7
+ 800081a:	b006      	add	sp, #24
+ 800081c:	bd80      	pop	{r7, pc}
+ 800081e:	46c0      	nop			; (mov r8, r8)
+ 8000820:	20000024 	.word	0x20000024
+ 8000824:	80002000 	.word	0x80002000
+
+08000828 <i2c_receive>:
 
 int i2c_receive(uint8_t address, uint8_t *buffer, int len)
 {
- 800069c:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 8000828:	b590      	push	{r4, r7, lr}
+ 800082a:	b089      	sub	sp, #36	; 0x24
+ 800082c:	af02      	add	r7, sp, #8
+ 800082e:	60b9      	str	r1, [r7, #8]
+ 8000830:	607a      	str	r2, [r7, #4]
+ 8000832:	210f      	movs	r1, #15
+ 8000834:	187b      	adds	r3, r7, r1
+ 8000836:	1c02      	adds	r2, r0, #0
+ 8000838:	701a      	strb	r2, [r3, #0]
 	LL_I2C_HandleTransfer(i2c_context->i2c, address, LL_I2C_ADDRSLAVE_7BIT, len,
- 800069e:	4d12      	ldr	r5, [pc, #72]	; (80006e8 <i2c_receive+0x4c>)
- 80006a0:	682b      	ldr	r3, [r5, #0]
- 80006a2:	681c      	ldr	r4, [r3, #0]
-  MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 |
- 80006a4:	0413      	lsls	r3, r2, #16
- 80006a6:	6866      	ldr	r6, [r4, #4]
- 80006a8:	4303      	orrs	r3, r0
- 80006aa:	4810      	ldr	r0, [pc, #64]	; (80006ec <i2c_receive+0x50>)
- 80006ac:	4006      	ands	r6, r0
- 80006ae:	4810      	ldr	r0, [pc, #64]	; (80006f0 <i2c_receive+0x54>)
- 80006b0:	4333      	orrs	r3, r6
- 80006b2:	4303      	orrs	r3, r0
- 80006b4:	6063      	str	r3, [r4, #4]
-  return ((READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)) ? 1UL : 0UL);
- 80006b6:	2604      	movs	r6, #4
-}
- 80006b8:	2300      	movs	r3, #0
-  return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
- 80006ba:	2420      	movs	r4, #32
+ 800083a:	4b23      	ldr	r3, [pc, #140]	; (80008c8 <i2c_receive+0xa0>)
+ 800083c:	681b      	ldr	r3, [r3, #0]
+ 800083e:	6818      	ldr	r0, [r3, #0]
+ 8000840:	187b      	adds	r3, r7, r1
+ 8000842:	7819      	ldrb	r1, [r3, #0]
+ 8000844:	687a      	ldr	r2, [r7, #4]
+ 8000846:	4b21      	ldr	r3, [pc, #132]	; (80008cc <i2c_receive+0xa4>)
+ 8000848:	9301      	str	r3, [sp, #4]
+ 800084a:	2380      	movs	r3, #128	; 0x80
+ 800084c:	049b      	lsls	r3, r3, #18
+ 800084e:	9300      	str	r3, [sp, #0]
+ 8000850:	0013      	movs	r3, r2
+ 8000852:	2200      	movs	r2, #0
+ 8000854:	f7ff ff36 	bl	80006c4 <LL_I2C_HandleTransfer>
 				LL_I2C_MODE_AUTOEND, LL_I2C_GENERATE_START_READ);
 	int i = 0;
+ 8000858:	2300      	movs	r3, #0
+ 800085a:	617b      	str	r3, [r7, #20]
 	while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
- 80006bc:	6828      	ldr	r0, [r5, #0]
- 80006be:	6800      	ldr	r0, [r0, #0]
- 80006c0:	6987      	ldr	r7, [r0, #24]
- 80006c2:	4227      	tst	r7, r4
- 80006c4:	d108      	bne.n	80006d8 <i2c_receive+0x3c>
-  return ((READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)) ? 1UL : 0UL);
- 80006c6:	6987      	ldr	r7, [r0, #24]
- 80006c8:	4237      	tst	r7, r6
- 80006ca:	d0f9      	beq.n	80006c0 <i2c_receive+0x24>
+ 800085c:	e019      	b.n	8000892 <i2c_receive+0x6a>
 		if (LL_I2C_IsActiveFlag_RXNE(i2c_context->i2c)) {
+ 800085e:	4b1a      	ldr	r3, [pc, #104]	; (80008c8 <i2c_receive+0xa0>)
+ 8000860:	681b      	ldr	r3, [r3, #0]
+ 8000862:	681b      	ldr	r3, [r3, #0]
+ 8000864:	0018      	movs	r0, r3
+ 8000866:	f7ff feec 	bl	8000642 <LL_I2C_IsActiveFlag_RXNE>
+ 800086a:	1e03      	subs	r3, r0, #0
+ 800086c:	d011      	beq.n	8000892 <i2c_receive+0x6a>
 			if (i < len) {
- 80006cc:	429a      	cmp	r2, r3
- 80006ce:	ddf7      	ble.n	80006c0 <i2c_receive+0x24>
-  return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
- 80006d0:	6a40      	ldr	r0, [r0, #36]	; 0x24
- 80006d2:	54c8      	strb	r0, [r1, r3]
- 80006d4:	3301      	adds	r3, #1
- 80006d6:	e7f1      	b.n	80006bc <i2c_receive+0x20>
-  SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
- 80006d8:	69c1      	ldr	r1, [r0, #28]
- 80006da:	430c      	orrs	r4, r1
- 80006dc:	61c4      	str	r4, [r0, #28]
+ 800086e:	697a      	ldr	r2, [r7, #20]
+ 8000870:	687b      	ldr	r3, [r7, #4]
+ 8000872:	429a      	cmp	r2, r3
+ 8000874:	da0d      	bge.n	8000892 <i2c_receive+0x6a>
+				buffer[i++] = LL_I2C_ReceiveData8(i2c_context->i2c);
+ 8000876:	4b14      	ldr	r3, [pc, #80]	; (80008c8 <i2c_receive+0xa0>)
+ 8000878:	681b      	ldr	r3, [r3, #0]
+ 800087a:	6819      	ldr	r1, [r3, #0]
+ 800087c:	697b      	ldr	r3, [r7, #20]
+ 800087e:	1c5a      	adds	r2, r3, #1
+ 8000880:	617a      	str	r2, [r7, #20]
+ 8000882:	001a      	movs	r2, r3
+ 8000884:	68bb      	ldr	r3, [r7, #8]
+ 8000886:	189c      	adds	r4, r3, r2
+ 8000888:	0008      	movs	r0, r1
+ 800088a:	f7ff ff41 	bl	8000710 <LL_I2C_ReceiveData8>
+ 800088e:	0003      	movs	r3, r0
+ 8000890:	7023      	strb	r3, [r4, #0]
+	while (!LL_I2C_IsActiveFlag_STOP(i2c_context->i2c)) {
+ 8000892:	4b0d      	ldr	r3, [pc, #52]	; (80008c8 <i2c_receive+0xa0>)
+ 8000894:	681b      	ldr	r3, [r3, #0]
+ 8000896:	681b      	ldr	r3, [r3, #0]
+ 8000898:	0018      	movs	r0, r3
+ 800089a:	f7ff fef4 	bl	8000686 <LL_I2C_IsActiveFlag_STOP>
+ 800089e:	1e03      	subs	r3, r0, #0
+ 80008a0:	d0dd      	beq.n	800085e <i2c_receive+0x36>
+			}
+		}
 	}
 	LL_I2C_ClearFlag_STOP(i2c_context->i2c);
+ 80008a2:	4b09      	ldr	r3, [pc, #36]	; (80008c8 <i2c_receive+0xa0>)
+ 80008a4:	681b      	ldr	r3, [r3, #0]
+ 80008a6:	681b      	ldr	r3, [r3, #0]
+ 80008a8:	0018      	movs	r0, r3
+ 80008aa:	f7ff fefd 	bl	80006a8 <LL_I2C_ClearFlag_STOP>
 	if (len != i) {
+ 80008ae:	687a      	ldr	r2, [r7, #4]
+ 80008b0:	697b      	ldr	r3, [r7, #20]
+ 80008b2:	429a      	cmp	r2, r3
+ 80008b4:	d002      	beq.n	80008bc <i2c_receive+0x94>
 		return I2C_ERROR_RX_INCOMPLETE;
+ 80008b6:	2304      	movs	r3, #4
+ 80008b8:	425b      	negs	r3, r3
+ 80008ba:	e000      	b.n	80008be <i2c_receive+0x96>
 	}
 	return I2C_OK; // TODO error detection
- 80006de:	2000      	movs	r0, #0
-	if (len != i) {
- 80006e0:	429a      	cmp	r2, r3
- 80006e2:	d000      	beq.n	80006e6 <i2c_receive+0x4a>
-		return I2C_ERROR_RX_INCOMPLETE;
- 80006e4:	3804      	subs	r0, #4
+ 80008bc:	2300      	movs	r3, #0
 }
- 80006e6:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 80006e8:	20000024 	.word	0x20000024
- 80006ec:	fc008000 	.word	0xfc008000
- 80006f0:	82002400 	.word	0x82002400
+ 80008be:	0018      	movs	r0, r3
+ 80008c0:	46bd      	mov	sp, r7
+ 80008c2:	b007      	add	sp, #28
+ 80008c4:	bd90      	pop	{r4, r7, pc}
+ 80008c6:	46c0      	nop			; (mov r8, r8)
+ 80008c8:	20000024 	.word	0x20000024
+ 80008cc:	80002400 	.word	0x80002400
 
-080006f4 <led_set_color>:
+080008d0 <LL_GPIO_ReadInputPort>:
+  * @rmtoll IDR          IDy           LL_GPIO_ReadInputPort
+  * @param  GPIOx GPIO Port
+  * @retval Input data register value of port
+  */
+__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
+{
+ 80008d0:	b580      	push	{r7, lr}
+ 80008d2:	b082      	sub	sp, #8
+ 80008d4:	af00      	add	r7, sp, #0
+ 80008d6:	6078      	str	r0, [r7, #4]
+  return (uint32_t)(READ_REG(GPIOx->IDR));
+ 80008d8:	687b      	ldr	r3, [r7, #4]
+ 80008da:	691b      	ldr	r3, [r3, #16]
+}
+ 80008dc:	0018      	movs	r0, r3
+ 80008de:	46bd      	mov	sp, r7
+ 80008e0:	b002      	add	sp, #8
+ 80008e2:	bd80      	pop	{r7, pc}
+
+080008e4 <LL_GPIO_WriteOutputPort>:
+  * @param  GPIOx GPIO Port
+  * @param  PortValue Level value for each pin of the port
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
+{
+ 80008e4:	b580      	push	{r7, lr}
+ 80008e6:	b082      	sub	sp, #8
+ 80008e8:	af00      	add	r7, sp, #0
+ 80008ea:	6078      	str	r0, [r7, #4]
+ 80008ec:	6039      	str	r1, [r7, #0]
+  WRITE_REG(GPIOx->ODR, PortValue);
+ 80008ee:	687b      	ldr	r3, [r7, #4]
+ 80008f0:	683a      	ldr	r2, [r7, #0]
+ 80008f2:	615a      	str	r2, [r3, #20]
+}
+ 80008f4:	46c0      	nop			; (mov r8, r8)
+ 80008f6:	46bd      	mov	sp, r7
+ 80008f8:	b002      	add	sp, #8
+ 80008fa:	bd80      	pop	{r7, pc}
+
+080008fc <LL_GPIO_TogglePin>:
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+{
+ 80008fc:	b580      	push	{r7, lr}
+ 80008fe:	b084      	sub	sp, #16
+ 8000900:	af00      	add	r7, sp, #0
+ 8000902:	6078      	str	r0, [r7, #4]
+ 8000904:	6039      	str	r1, [r7, #0]
+  uint32_t odr = READ_REG(GPIOx->ODR);
+ 8000906:	687b      	ldr	r3, [r7, #4]
+ 8000908:	695b      	ldr	r3, [r3, #20]
+ 800090a:	60fb      	str	r3, [r7, #12]
+  WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
+ 800090c:	68fb      	ldr	r3, [r7, #12]
+ 800090e:	683a      	ldr	r2, [r7, #0]
+ 8000910:	4013      	ands	r3, r2
+ 8000912:	041a      	lsls	r2, r3, #16
+ 8000914:	68fb      	ldr	r3, [r7, #12]
+ 8000916:	43db      	mvns	r3, r3
+ 8000918:	6839      	ldr	r1, [r7, #0]
+ 800091a:	400b      	ands	r3, r1
+ 800091c:	431a      	orrs	r2, r3
+ 800091e:	687b      	ldr	r3, [r7, #4]
+ 8000920:	619a      	str	r2, [r3, #24]
+}
+ 8000922:	46c0      	nop			; (mov r8, r8)
+ 8000924:	46bd      	mov	sp, r7
+ 8000926:	b004      	add	sp, #16
+ 8000928:	bd80      	pop	{r7, pc}
+	...
+
+0800092c <led_set_color>:
+ *     uint8_t green: green color intensity, possible values 0 ... 255
  *     uint8_t blue: blue color intensity, possible values 0 ... 255
  * NOTE: if (color * led_pwm_max) < 255, LED will be off
  */
 void led_set_color(uint8_t red, uint8_t green, uint8_t blue)
 {
+ 800092c:	b590      	push	{r4, r7, lr}
+ 800092e:	b083      	sub	sp, #12
+ 8000930:	af00      	add	r7, sp, #0
+ 8000932:	0004      	movs	r4, r0
+ 8000934:	0008      	movs	r0, r1
+ 8000936:	0011      	movs	r1, r2
+ 8000938:	1dfb      	adds	r3, r7, #7
+ 800093a:	1c22      	adds	r2, r4, #0
+ 800093c:	701a      	strb	r2, [r3, #0]
+ 800093e:	1dbb      	adds	r3, r7, #6
+ 8000940:	1c02      	adds	r2, r0, #0
+ 8000942:	701a      	strb	r2, [r3, #0]
+ 8000944:	1d7b      	adds	r3, r7, #5
+ 8000946:	1c0a      	adds	r2, r1, #0
+ 8000948:	701a      	strb	r2, [r3, #0]
 	led_red_intensity = (int)red * led_pwm_max / 255;
- 80006f4:	4b0c      	ldr	r3, [pc, #48]	; (8000728 <led_set_color+0x34>)
-{
- 80006f6:	b570      	push	{r4, r5, r6, lr}
-	led_red_intensity = (int)red * led_pwm_max / 255;
- 80006f8:	681c      	ldr	r4, [r3, #0]
-{
- 80006fa:	000d      	movs	r5, r1
-	led_red_intensity = (int)red * led_pwm_max / 255;
- 80006fc:	4360      	muls	r0, r4
- 80006fe:	21ff      	movs	r1, #255	; 0xff
-{
- 8000700:	0016      	movs	r6, r2
-	led_red_intensity = (int)red * led_pwm_max / 255;
- 8000702:	f7ff fd8b 	bl	800021c <__divsi3>
- 8000706:	4b09      	ldr	r3, [pc, #36]	; (800072c <led_set_color+0x38>)
+ 800094a:	1dfb      	adds	r3, r7, #7
+ 800094c:	781a      	ldrb	r2, [r3, #0]
+ 800094e:	4b14      	ldr	r3, [pc, #80]	; (80009a0 <led_set_color+0x74>)
+ 8000950:	681b      	ldr	r3, [r3, #0]
+ 8000952:	4353      	muls	r3, r2
+ 8000954:	21ff      	movs	r1, #255	; 0xff
+ 8000956:	0018      	movs	r0, r3
+ 8000958:	f7ff fc60 	bl	800021c <__divsi3>
+ 800095c:	0003      	movs	r3, r0
+ 800095e:	001a      	movs	r2, r3
+ 8000960:	4b10      	ldr	r3, [pc, #64]	; (80009a4 <led_set_color+0x78>)
+ 8000962:	601a      	str	r2, [r3, #0]
 	led_green_intensity = (int)green * led_pwm_max / 255;
- 8000708:	21ff      	movs	r1, #255	; 0xff
-	led_red_intensity = (int)red * led_pwm_max / 255;
- 800070a:	6018      	str	r0, [r3, #0]
-	led_green_intensity = (int)green * led_pwm_max / 255;
- 800070c:	0028      	movs	r0, r5
- 800070e:	4360      	muls	r0, r4
- 8000710:	f7ff fd84 	bl	800021c <__divsi3>
- 8000714:	4b06      	ldr	r3, [pc, #24]	; (8000730 <led_set_color+0x3c>)
+ 8000964:	1dbb      	adds	r3, r7, #6
+ 8000966:	781a      	ldrb	r2, [r3, #0]
+ 8000968:	4b0d      	ldr	r3, [pc, #52]	; (80009a0 <led_set_color+0x74>)
+ 800096a:	681b      	ldr	r3, [r3, #0]
+ 800096c:	4353      	muls	r3, r2
+ 800096e:	21ff      	movs	r1, #255	; 0xff
+ 8000970:	0018      	movs	r0, r3
+ 8000972:	f7ff fc53 	bl	800021c <__divsi3>
+ 8000976:	0003      	movs	r3, r0
+ 8000978:	001a      	movs	r2, r3
+ 800097a:	4b0b      	ldr	r3, [pc, #44]	; (80009a8 <led_set_color+0x7c>)
+ 800097c:	601a      	str	r2, [r3, #0]
 	led_blue_intensity = (int)blue * led_pwm_max / 255;
- 8000716:	21ff      	movs	r1, #255	; 0xff
-	led_green_intensity = (int)green * led_pwm_max / 255;
- 8000718:	6018      	str	r0, [r3, #0]
-	led_blue_intensity = (int)blue * led_pwm_max / 255;
- 800071a:	0020      	movs	r0, r4
- 800071c:	4370      	muls	r0, r6
- 800071e:	f7ff fd7d 	bl	800021c <__divsi3>
- 8000722:	4b04      	ldr	r3, [pc, #16]	; (8000734 <led_set_color+0x40>)
- 8000724:	6018      	str	r0, [r3, #0]
+ 800097e:	1d7b      	adds	r3, r7, #5
+ 8000980:	781a      	ldrb	r2, [r3, #0]
+ 8000982:	4b07      	ldr	r3, [pc, #28]	; (80009a0 <led_set_color+0x74>)
+ 8000984:	681b      	ldr	r3, [r3, #0]
+ 8000986:	4353      	muls	r3, r2
+ 8000988:	21ff      	movs	r1, #255	; 0xff
+ 800098a:	0018      	movs	r0, r3
+ 800098c:	f7ff fc46 	bl	800021c <__divsi3>
+ 8000990:	0003      	movs	r3, r0
+ 8000992:	001a      	movs	r2, r3
+ 8000994:	4b05      	ldr	r3, [pc, #20]	; (80009ac <led_set_color+0x80>)
+ 8000996:	601a      	str	r2, [r3, #0]
 }
- 8000726:	bd70      	pop	{r4, r5, r6, pc}
- 8000728:	2000002c 	.word	0x2000002c
- 800072c:	20000030 	.word	0x20000030
- 8000730:	20000028 	.word	0x20000028
- 8000734:	20000038 	.word	0x20000038
+ 8000998:	46c0      	nop			; (mov r8, r8)
+ 800099a:	46bd      	mov	sp, r7
+ 800099c:	b003      	add	sp, #12
+ 800099e:	bd90      	pop	{r4, r7, pc}
+ 80009a0:	2000002c 	.word	0x2000002c
+ 80009a4:	20000030 	.word	0x20000030
+ 80009a8:	20000028 	.word	0x20000028
+ 80009ac:	20000038 	.word	0x20000038
 
-08000738 <led_pwm_handler>:
+080009b0 <led_gpio_on>:
+	port_value &= ~pin_mask;
+	LL_GPIO_WriteOutputPort(port, port_value);
+}
+
+void led_gpio_on(GPIO_TypeDef *port, uint32_t pin_mask)
+{
+ 80009b0:	b580      	push	{r7, lr}
+ 80009b2:	b084      	sub	sp, #16
+ 80009b4:	af00      	add	r7, sp, #0
+ 80009b6:	6078      	str	r0, [r7, #4]
+ 80009b8:	6039      	str	r1, [r7, #0]
+	uint32_t port_value;
+	port_value = LL_GPIO_ReadInputPort(port);
+ 80009ba:	687b      	ldr	r3, [r7, #4]
+ 80009bc:	0018      	movs	r0, r3
+ 80009be:	f7ff ff87 	bl	80008d0 <LL_GPIO_ReadInputPort>
+ 80009c2:	0003      	movs	r3, r0
+ 80009c4:	60fb      	str	r3, [r7, #12]
+	port_value |= pin_mask;
+ 80009c6:	68fa      	ldr	r2, [r7, #12]
+ 80009c8:	683b      	ldr	r3, [r7, #0]
+ 80009ca:	4313      	orrs	r3, r2
+ 80009cc:	60fb      	str	r3, [r7, #12]
+	LL_GPIO_WriteOutputPort(port, port_value);
+ 80009ce:	68fa      	ldr	r2, [r7, #12]
+ 80009d0:	687b      	ldr	r3, [r7, #4]
+ 80009d2:	0011      	movs	r1, r2
+ 80009d4:	0018      	movs	r0, r3
+ 80009d6:	f7ff ff85 	bl	80008e4 <LL_GPIO_WriteOutputPort>
+}
+ 80009da:	46c0      	nop			; (mov r8, r8)
+ 80009dc:	46bd      	mov	sp, r7
+ 80009de:	b004      	add	sp, #16
+ 80009e0:	bd80      	pop	{r7, pc}
+	...
+
+080009e4 <led_pwm_handler>:
+ * led_pwm_handler():
+ * handles switching LEDs on/off according to desired intensity;
+ * should be regularly called in timer routine, preferably in SysTick_Handler()
  */
 void led_pwm_handler()
 {
+ 80009e4:	b580      	push	{r7, lr}
+ 80009e6:	b084      	sub	sp, #16
+ 80009e8:	af00      	add	r7, sp, #0
 	int new_red_state, new_green_state, new_blue_state;
 
 	if (led_context == NULL) {
- 8000738:	4b27      	ldr	r3, [pc, #156]	; (80007d8 <led_pwm_handler+0xa0>)
-{
- 800073a:	b5f0      	push	{r4, r5, r6, r7, lr}
-	if (led_context == NULL) {
- 800073c:	681a      	ldr	r2, [r3, #0]
- 800073e:	2a00      	cmp	r2, #0
- 8000740:	d049      	beq.n	80007d6 <led_pwm_handler+0x9e>
+ 80009ea:	4b37      	ldr	r3, [pc, #220]	; (8000ac8 <led_pwm_handler+0xe4>)
+ 80009ec:	681b      	ldr	r3, [r3, #0]
+ 80009ee:	2b00      	cmp	r3, #0
+ 80009f0:	d065      	beq.n	8000abe <led_pwm_handler+0xda>
 		// led_pwm_handler() may be called before led_init() was called;
 		// this would result in a crash
 		return;
 	}
 
 	new_red_state = led_pwm_counter >= led_red_intensity ? 1 : 0;
- 8000742:	4926      	ldr	r1, [pc, #152]	; (80007dc <led_pwm_handler+0xa4>)
- 8000744:	4b26      	ldr	r3, [pc, #152]	; (80007e0 <led_pwm_handler+0xa8>)
- 8000746:	6808      	ldr	r0, [r1, #0]
- 8000748:	681b      	ldr	r3, [r3, #0]
- 800074a:	0fc5      	lsrs	r5, r0, #31
- 800074c:	17d9      	asrs	r1, r3, #31
- 800074e:	4283      	cmp	r3, r0
- 8000750:	414d      	adcs	r5, r1
+ 80009f2:	4b36      	ldr	r3, [pc, #216]	; (8000acc <led_pwm_handler+0xe8>)
+ 80009f4:	681a      	ldr	r2, [r3, #0]
+ 80009f6:	4b36      	ldr	r3, [pc, #216]	; (8000ad0 <led_pwm_handler+0xec>)
+ 80009f8:	681b      	ldr	r3, [r3, #0]
+ 80009fa:	17d0      	asrs	r0, r2, #31
+ 80009fc:	0fd9      	lsrs	r1, r3, #31
+ 80009fe:	429a      	cmp	r2, r3
+ 8000a00:	4148      	adcs	r0, r1
+ 8000a02:	0003      	movs	r3, r0
+ 8000a04:	b2db      	uxtb	r3, r3
+ 8000a06:	60fb      	str	r3, [r7, #12]
 	new_green_state = led_pwm_counter >= led_green_intensity ? 1 : 0;
- 8000752:	4824      	ldr	r0, [pc, #144]	; (80007e4 <led_pwm_handler+0xac>)
+ 8000a08:	4b30      	ldr	r3, [pc, #192]	; (8000acc <led_pwm_handler+0xe8>)
+ 8000a0a:	681a      	ldr	r2, [r3, #0]
+ 8000a0c:	4b31      	ldr	r3, [pc, #196]	; (8000ad4 <led_pwm_handler+0xf0>)
+ 8000a0e:	681b      	ldr	r3, [r3, #0]
+ 8000a10:	17d0      	asrs	r0, r2, #31
+ 8000a12:	0fd9      	lsrs	r1, r3, #31
+ 8000a14:	429a      	cmp	r2, r3
+ 8000a16:	4148      	adcs	r0, r1
+ 8000a18:	0003      	movs	r3, r0
+ 8000a1a:	b2db      	uxtb	r3, r3
+ 8000a1c:	60bb      	str	r3, [r7, #8]
 	new_blue_state = led_pwm_counter >= led_blue_intensity ? 1 : 0;
+ 8000a1e:	4b2b      	ldr	r3, [pc, #172]	; (8000acc <led_pwm_handler+0xe8>)
+ 8000a20:	681a      	ldr	r2, [r3, #0]
+ 8000a22:	4b2d      	ldr	r3, [pc, #180]	; (8000ad8 <led_pwm_handler+0xf4>)
+ 8000a24:	681b      	ldr	r3, [r3, #0]
+ 8000a26:	17d0      	asrs	r0, r2, #31
+ 8000a28:	0fd9      	lsrs	r1, r3, #31
+ 8000a2a:	429a      	cmp	r2, r3
+ 8000a2c:	4148      	adcs	r0, r1
+ 8000a2e:	0003      	movs	r3, r0
+ 8000a30:	b2db      	uxtb	r3, r3
+ 8000a32:	607b      	str	r3, [r7, #4]
 	// SysTick() is called at 1 kHz frequency, we don't want to call HAL_GPIO_WritePin() every time
 	if (led_red_state != new_red_state) {
- 8000754:	4f24      	ldr	r7, [pc, #144]	; (80007e8 <led_pwm_handler+0xb0>)
-	new_green_state = led_pwm_counter >= led_green_intensity ? 1 : 0;
- 8000756:	6800      	ldr	r0, [r0, #0]
- 8000758:	0fc4      	lsrs	r4, r0, #31
- 800075a:	4283      	cmp	r3, r0
- 800075c:	414c      	adcs	r4, r1
-	new_blue_state = led_pwm_counter >= led_blue_intensity ? 1 : 0;
- 800075e:	4823      	ldr	r0, [pc, #140]	; (80007ec <led_pwm_handler+0xb4>)
- 8000760:	6800      	ldr	r0, [r0, #0]
- 8000762:	0fc6      	lsrs	r6, r0, #31
- 8000764:	4283      	cmp	r3, r0
- 8000766:	4171      	adcs	r1, r6
- 8000768:	468c      	mov	ip, r1
-	if (led_red_state != new_red_state) {
- 800076a:	6839      	ldr	r1, [r7, #0]
- 800076c:	42a9      	cmp	r1, r5
- 800076e:	d00b      	beq.n	8000788 <led_pwm_handler+0x50>
-  *         @arg @ref LL_GPIO_PIN_ALL
-  * @retval None
-  */
-__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
-{
-  uint32_t odr = READ_REG(GPIOx->ODR);
- 8000770:	6811      	ldr	r1, [r2, #0]
-  WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
- 8000772:	6850      	ldr	r0, [r2, #4]
-  uint32_t odr = READ_REG(GPIOx->ODR);
- 8000774:	694e      	ldr	r6, [r1, #20]
-  WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
- 8000776:	6851      	ldr	r1, [r2, #4]
- 8000778:	4030      	ands	r0, r6
- 800077a:	43b1      	bics	r1, r6
- 800077c:	000e      	movs	r6, r1
- 800077e:	0400      	lsls	r0, r0, #16
- 8000780:	6811      	ldr	r1, [r2, #0]
- 8000782:	4306      	orrs	r6, r0
- 8000784:	618e      	str	r6, [r1, #24]
+ 8000a34:	4b29      	ldr	r3, [pc, #164]	; (8000adc <led_pwm_handler+0xf8>)
+ 8000a36:	681b      	ldr	r3, [r3, #0]
+ 8000a38:	68fa      	ldr	r2, [r7, #12]
+ 8000a3a:	429a      	cmp	r2, r3
+ 8000a3c:	d00c      	beq.n	8000a58 <led_pwm_handler+0x74>
 		LL_GPIO_TogglePin(led_context->red_led_port, led_context->red_led_pin);
+ 8000a3e:	4b22      	ldr	r3, [pc, #136]	; (8000ac8 <led_pwm_handler+0xe4>)
+ 8000a40:	681b      	ldr	r3, [r3, #0]
+ 8000a42:	681a      	ldr	r2, [r3, #0]
+ 8000a44:	4b20      	ldr	r3, [pc, #128]	; (8000ac8 <led_pwm_handler+0xe4>)
+ 8000a46:	681b      	ldr	r3, [r3, #0]
+ 8000a48:	685b      	ldr	r3, [r3, #4]
+ 8000a4a:	0019      	movs	r1, r3
+ 8000a4c:	0010      	movs	r0, r2
+ 8000a4e:	f7ff ff55 	bl	80008fc <LL_GPIO_TogglePin>
 		led_red_state = new_red_state;
- 8000786:	603d      	str	r5, [r7, #0]
+ 8000a52:	4b22      	ldr	r3, [pc, #136]	; (8000adc <led_pwm_handler+0xf8>)
+ 8000a54:	68fa      	ldr	r2, [r7, #12]
+ 8000a56:	601a      	str	r2, [r3, #0]
 	}
 	if (led_green_state != new_green_state) {
- 8000788:	4e19      	ldr	r6, [pc, #100]	; (80007f0 <led_pwm_handler+0xb8>)
- 800078a:	6831      	ldr	r1, [r6, #0]
- 800078c:	42a1      	cmp	r1, r4
- 800078e:	d00a      	beq.n	80007a6 <led_pwm_handler+0x6e>
+ 8000a58:	4b21      	ldr	r3, [pc, #132]	; (8000ae0 <led_pwm_handler+0xfc>)
+ 8000a5a:	681b      	ldr	r3, [r3, #0]
+ 8000a5c:	68ba      	ldr	r2, [r7, #8]
+ 8000a5e:	429a      	cmp	r2, r3
+ 8000a60:	d00c      	beq.n	8000a7c <led_pwm_handler+0x98>
 		LL_GPIO_TogglePin(led_context->green_led_port, led_context->green_led_pin);
- 8000790:	6897      	ldr	r7, [r2, #8]
- 8000792:	68d1      	ldr	r1, [r2, #12]
-  uint32_t odr = READ_REG(GPIOx->ODR);
- 8000794:	6978      	ldr	r0, [r7, #20]
-  WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
- 8000796:	68d5      	ldr	r5, [r2, #12]
- 8000798:	4381      	bics	r1, r0
- 800079a:	4005      	ands	r5, r0
- 800079c:	0008      	movs	r0, r1
- 800079e:	042d      	lsls	r5, r5, #16
- 80007a0:	4328      	orrs	r0, r5
- 80007a2:	61b8      	str	r0, [r7, #24]
+ 8000a62:	4b19      	ldr	r3, [pc, #100]	; (8000ac8 <led_pwm_handler+0xe4>)
+ 8000a64:	681b      	ldr	r3, [r3, #0]
+ 8000a66:	689a      	ldr	r2, [r3, #8]
+ 8000a68:	4b17      	ldr	r3, [pc, #92]	; (8000ac8 <led_pwm_handler+0xe4>)
+ 8000a6a:	681b      	ldr	r3, [r3, #0]
+ 8000a6c:	68db      	ldr	r3, [r3, #12]
+ 8000a6e:	0019      	movs	r1, r3
+ 8000a70:	0010      	movs	r0, r2
+ 8000a72:	f7ff ff43 	bl	80008fc <LL_GPIO_TogglePin>
 		led_green_state = new_green_state;
- 80007a4:	6034      	str	r4, [r6, #0]
+ 8000a76:	4b1a      	ldr	r3, [pc, #104]	; (8000ae0 <led_pwm_handler+0xfc>)
+ 8000a78:	68ba      	ldr	r2, [r7, #8]
+ 8000a7a:	601a      	str	r2, [r3, #0]
 	}
 	if (led_blue_state != new_blue_state) {
- 80007a6:	4c13      	ldr	r4, [pc, #76]	; (80007f4 <led_pwm_handler+0xbc>)
- 80007a8:	6821      	ldr	r1, [r4, #0]
- 80007aa:	4561      	cmp	r1, ip
- 80007ac:	d00a      	beq.n	80007c4 <led_pwm_handler+0x8c>
+ 8000a7c:	4b19      	ldr	r3, [pc, #100]	; (8000ae4 <led_pwm_handler+0x100>)
+ 8000a7e:	681b      	ldr	r3, [r3, #0]
+ 8000a80:	687a      	ldr	r2, [r7, #4]
+ 8000a82:	429a      	cmp	r2, r3
+ 8000a84:	d00c      	beq.n	8000aa0 <led_pwm_handler+0xbc>
 		LL_GPIO_TogglePin(led_context->blue_led_port, led_context->blue_led_pin);
- 80007ae:	6915      	ldr	r5, [r2, #16]
- 80007b0:	6950      	ldr	r0, [r2, #20]
-  uint32_t odr = READ_REG(GPIOx->ODR);
- 80007b2:	696e      	ldr	r6, [r5, #20]
-  WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
- 80007b4:	0032      	movs	r2, r6
- 80007b6:	4002      	ands	r2, r0
- 80007b8:	0412      	lsls	r2, r2, #16
- 80007ba:	43b0      	bics	r0, r6
- 80007bc:	4302      	orrs	r2, r0
- 80007be:	61aa      	str	r2, [r5, #24]
+ 8000a86:	4b10      	ldr	r3, [pc, #64]	; (8000ac8 <led_pwm_handler+0xe4>)
+ 8000a88:	681b      	ldr	r3, [r3, #0]
+ 8000a8a:	691a      	ldr	r2, [r3, #16]
+ 8000a8c:	4b0e      	ldr	r3, [pc, #56]	; (8000ac8 <led_pwm_handler+0xe4>)
+ 8000a8e:	681b      	ldr	r3, [r3, #0]
+ 8000a90:	695b      	ldr	r3, [r3, #20]
+ 8000a92:	0019      	movs	r1, r3
+ 8000a94:	0010      	movs	r0, r2
+ 8000a96:	f7ff ff31 	bl	80008fc <LL_GPIO_TogglePin>
 		led_blue_state = new_blue_state;
- 80007c0:	4662      	mov	r2, ip
- 80007c2:	6022      	str	r2, [r4, #0]
+ 8000a9a:	4b12      	ldr	r3, [pc, #72]	; (8000ae4 <led_pwm_handler+0x100>)
+ 8000a9c:	687a      	ldr	r2, [r7, #4]
+ 8000a9e:	601a      	str	r2, [r3, #0]
 	}
 	if (++led_pwm_counter >= led_pwm_max) {
- 80007c4:	490c      	ldr	r1, [pc, #48]	; (80007f8 <led_pwm_handler+0xc0>)
- 80007c6:	4a06      	ldr	r2, [pc, #24]	; (80007e0 <led_pwm_handler+0xa8>)
- 80007c8:	6809      	ldr	r1, [r1, #0]
- 80007ca:	3301      	adds	r3, #1
- 80007cc:	6013      	str	r3, [r2, #0]
- 80007ce:	428b      	cmp	r3, r1
- 80007d0:	db01      	blt.n	80007d6 <led_pwm_handler+0x9e>
+ 8000aa0:	4b0a      	ldr	r3, [pc, #40]	; (8000acc <led_pwm_handler+0xe8>)
+ 8000aa2:	681b      	ldr	r3, [r3, #0]
+ 8000aa4:	1c5a      	adds	r2, r3, #1
+ 8000aa6:	4b09      	ldr	r3, [pc, #36]	; (8000acc <led_pwm_handler+0xe8>)
+ 8000aa8:	601a      	str	r2, [r3, #0]
+ 8000aaa:	4b08      	ldr	r3, [pc, #32]	; (8000acc <led_pwm_handler+0xe8>)
+ 8000aac:	681a      	ldr	r2, [r3, #0]
+ 8000aae:	4b0e      	ldr	r3, [pc, #56]	; (8000ae8 <led_pwm_handler+0x104>)
+ 8000ab0:	681b      	ldr	r3, [r3, #0]
+ 8000ab2:	429a      	cmp	r2, r3
+ 8000ab4:	db04      	blt.n	8000ac0 <led_pwm_handler+0xdc>
 		led_pwm_counter = 0;
- 80007d2:	2300      	movs	r3, #0
- 80007d4:	6013      	str	r3, [r2, #0]
+ 8000ab6:	4b05      	ldr	r3, [pc, #20]	; (8000acc <led_pwm_handler+0xe8>)
+ 8000ab8:	2200      	movs	r2, #0
+ 8000aba:	601a      	str	r2, [r3, #0]
+ 8000abc:	e000      	b.n	8000ac0 <led_pwm_handler+0xdc>
+		return;
+ 8000abe:	46c0      	nop			; (mov r8, r8)
 	}
 }
- 80007d6:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 80007d8:	20000020 	.word	0x20000020
- 80007dc:	20000030 	.word	0x20000030
- 80007e0:	20000034 	.word	0x20000034
- 80007e4:	20000028 	.word	0x20000028
- 80007e8:	20000044 	.word	0x20000044
- 80007ec:	20000038 	.word	0x20000038
- 80007f0:	20000040 	.word	0x20000040
- 80007f4:	2000003c 	.word	0x2000003c
- 80007f8:	2000002c 	.word	0x2000002c
+ 8000ac0:	46bd      	mov	sp, r7
+ 8000ac2:	b004      	add	sp, #16
+ 8000ac4:	bd80      	pop	{r7, pc}
+ 8000ac6:	46c0      	nop			; (mov r8, r8)
+ 8000ac8:	20000020 	.word	0x20000020
+ 8000acc:	20000034 	.word	0x20000034
+ 8000ad0:	20000030 	.word	0x20000030
+ 8000ad4:	20000028 	.word	0x20000028
+ 8000ad8:	20000038 	.word	0x20000038
+ 8000adc:	20000044 	.word	0x20000044
+ 8000ae0:	20000040 	.word	0x20000040
+ 8000ae4:	2000003c 	.word	0x2000003c
+ 8000ae8:	2000002c 	.word	0x2000002c
 
-080007fc <led_init>:
+08000aec <led_init>:
  *         Frequency of led_pwm_handler() calls. Eequal to timer frequency if timer callback is used,
  *         e.g. if led_pwm_handler() is called within SysTick_Handler(), then frequency is
  *         HAL_TICK_FREQ_1KHZ
  */
 void led_init(led_context_t *context, int pwm_freq, int pwm_handler_freq)
 {
- 80007fc:	b570      	push	{r4, r5, r6, lr}
- 80007fe:	0004      	movs	r4, r0
- 8000800:	0010      	movs	r0, r2
+ 8000aec:	b580      	push	{r7, lr}
+ 8000aee:	b084      	sub	sp, #16
+ 8000af0:	af00      	add	r7, sp, #0
+ 8000af2:	60f8      	str	r0, [r7, #12]
+ 8000af4:	60b9      	str	r1, [r7, #8]
+ 8000af6:	607a      	str	r2, [r7, #4]
 	// save context
 	led_context = context;
+ 8000af8:	4b1f      	ldr	r3, [pc, #124]	; (8000b78 <led_init+0x8c>)
+ 8000afa:	68fa      	ldr	r2, [r7, #12]
+ 8000afc:	601a      	str	r2, [r3, #0]
 	// Initial values
 	led_red_intensity = 0;
- 8000802:	2200      	movs	r2, #0
-	led_context = context;
- 8000804:	4b11      	ldr	r3, [pc, #68]	; (800084c <led_init+0x50>)
+ 8000afe:	4b1f      	ldr	r3, [pc, #124]	; (8000b7c <led_init+0x90>)
+ 8000b00:	2200      	movs	r2, #0
+ 8000b02:	601a      	str	r2, [r3, #0]
 	led_red_state = 1; // state is inverted (LEDs are sinking current into MCU)
- 8000806:	4d12      	ldr	r5, [pc, #72]	; (8000850 <led_init+0x54>)
-	led_context = context;
- 8000808:	601c      	str	r4, [r3, #0]
-	led_red_intensity = 0;
- 800080a:	4b12      	ldr	r3, [pc, #72]	; (8000854 <led_init+0x58>)
- 800080c:	601a      	str	r2, [r3, #0]
-	led_red_state = 1; // state is inverted (LEDs are sinking current into MCU)
- 800080e:	2301      	movs	r3, #1
- 8000810:	602b      	str	r3, [r5, #0]
+ 8000b04:	4b1e      	ldr	r3, [pc, #120]	; (8000b80 <led_init+0x94>)
+ 8000b06:	2201      	movs	r2, #1
+ 8000b08:	601a      	str	r2, [r3, #0]
 	led_green_intensity = 0;
- 8000812:	4d11      	ldr	r5, [pc, #68]	; (8000858 <led_init+0x5c>)
- 8000814:	602a      	str	r2, [r5, #0]
+ 8000b0a:	4b1e      	ldr	r3, [pc, #120]	; (8000b84 <led_init+0x98>)
+ 8000b0c:	2200      	movs	r2, #0
+ 8000b0e:	601a      	str	r2, [r3, #0]
 	led_green_state = 1;
- 8000816:	4d11      	ldr	r5, [pc, #68]	; (800085c <led_init+0x60>)
- 8000818:	602b      	str	r3, [r5, #0]
+ 8000b10:	4b1d      	ldr	r3, [pc, #116]	; (8000b88 <led_init+0x9c>)
+ 8000b12:	2201      	movs	r2, #1
+ 8000b14:	601a      	str	r2, [r3, #0]
 	led_blue_intensity = 0;
- 800081a:	4d11      	ldr	r5, [pc, #68]	; (8000860 <led_init+0x64>)
- 800081c:	602a      	str	r2, [r5, #0]
+ 8000b16:	4b1d      	ldr	r3, [pc, #116]	; (8000b8c <led_init+0xa0>)
+ 8000b18:	2200      	movs	r2, #0
+ 8000b1a:	601a      	str	r2, [r3, #0]
 	led_blue_state = 1;
- 800081e:	4a11      	ldr	r2, [pc, #68]	; (8000864 <led_init+0x68>)
- 8000820:	6013      	str	r3, [r2, #0]
+ 8000b1c:	4b1c      	ldr	r3, [pc, #112]	; (8000b90 <led_init+0xa4>)
+ 8000b1e:	2201      	movs	r2, #1
+ 8000b20:	601a      	str	r2, [r3, #0]
 	// calculate PWM counter overflow value (max value)
 	// e.g. for 1 kHz handler freq and 25 Hz PWM freq, we only have
 	// resolution of 40 steps for pwm
 	led_pwm_max = pwm_handler_freq / pwm_freq;
- 8000822:	f7ff fcfb 	bl	800021c <__divsi3>
+ 8000b22:	68b9      	ldr	r1, [r7, #8]
+ 8000b24:	6878      	ldr	r0, [r7, #4]
+ 8000b26:	f7ff fb79 	bl	800021c <__divsi3>
+ 8000b2a:	0003      	movs	r3, r0
+ 8000b2c:	001a      	movs	r2, r3
+ 8000b2e:	4b19      	ldr	r3, [pc, #100]	; (8000b94 <led_init+0xa8>)
+ 8000b30:	601a      	str	r2, [r3, #0]
 	// turn off all LEDs (inverted)
 	led_gpio_on(led_context->red_led_port, led_context->red_led_pin);
- 8000826:	6822      	ldr	r2, [r4, #0]
-	led_pwm_max = pwm_handler_freq / pwm_freq;
- 8000828:	4b0f      	ldr	r3, [pc, #60]	; (8000868 <led_init+0x6c>)
-	port_value |= pin_mask;
- 800082a:	6861      	ldr	r1, [r4, #4]
-	led_pwm_max = pwm_handler_freq / pwm_freq;
- 800082c:	6018      	str	r0, [r3, #0]
-  return (uint32_t)(READ_REG(GPIOx->IDR));
- 800082e:	6913      	ldr	r3, [r2, #16]
-	port_value |= pin_mask;
- 8000830:	430b      	orrs	r3, r1
-  WRITE_REG(GPIOx->ODR, PortValue);
- 8000832:	6153      	str	r3, [r2, #20]
+ 8000b32:	4b11      	ldr	r3, [pc, #68]	; (8000b78 <led_init+0x8c>)
+ 8000b34:	681b      	ldr	r3, [r3, #0]
+ 8000b36:	681a      	ldr	r2, [r3, #0]
+ 8000b38:	4b0f      	ldr	r3, [pc, #60]	; (8000b78 <led_init+0x8c>)
+ 8000b3a:	681b      	ldr	r3, [r3, #0]
+ 8000b3c:	685b      	ldr	r3, [r3, #4]
+ 8000b3e:	0019      	movs	r1, r3
+ 8000b40:	0010      	movs	r0, r2
+ 8000b42:	f7ff ff35 	bl	80009b0 <led_gpio_on>
 	led_gpio_on(led_context->green_led_port, led_context->green_led_pin);
- 8000834:	68a2      	ldr	r2, [r4, #8]
-	port_value |= pin_mask;
- 8000836:	68e1      	ldr	r1, [r4, #12]
-  return (uint32_t)(READ_REG(GPIOx->IDR));
- 8000838:	6913      	ldr	r3, [r2, #16]
- 800083a:	430b      	orrs	r3, r1
-  WRITE_REG(GPIOx->ODR, PortValue);
- 800083c:	6153      	str	r3, [r2, #20]
+ 8000b46:	4b0c      	ldr	r3, [pc, #48]	; (8000b78 <led_init+0x8c>)
+ 8000b48:	681b      	ldr	r3, [r3, #0]
+ 8000b4a:	689a      	ldr	r2, [r3, #8]
+ 8000b4c:	4b0a      	ldr	r3, [pc, #40]	; (8000b78 <led_init+0x8c>)
+ 8000b4e:	681b      	ldr	r3, [r3, #0]
+ 8000b50:	68db      	ldr	r3, [r3, #12]
+ 8000b52:	0019      	movs	r1, r3
+ 8000b54:	0010      	movs	r0, r2
+ 8000b56:	f7ff ff2b 	bl	80009b0 <led_gpio_on>
 	led_gpio_on(led_context->blue_led_port, led_context->blue_led_pin);
- 800083e:	6922      	ldr	r2, [r4, #16]
-	port_value |= pin_mask;
- 8000840:	6961      	ldr	r1, [r4, #20]
-  return (uint32_t)(READ_REG(GPIOx->IDR));
- 8000842:	6913      	ldr	r3, [r2, #16]
- 8000844:	430b      	orrs	r3, r1
-  WRITE_REG(GPIOx->ODR, PortValue);
- 8000846:	6153      	str	r3, [r2, #20]
+ 8000b5a:	4b07      	ldr	r3, [pc, #28]	; (8000b78 <led_init+0x8c>)
+ 8000b5c:	681b      	ldr	r3, [r3, #0]
+ 8000b5e:	691a      	ldr	r2, [r3, #16]
+ 8000b60:	4b05      	ldr	r3, [pc, #20]	; (8000b78 <led_init+0x8c>)
+ 8000b62:	681b      	ldr	r3, [r3, #0]
+ 8000b64:	695b      	ldr	r3, [r3, #20]
+ 8000b66:	0019      	movs	r1, r3
+ 8000b68:	0010      	movs	r0, r2
+ 8000b6a:	f7ff ff21 	bl	80009b0 <led_gpio_on>
 }
- 8000848:	bd70      	pop	{r4, r5, r6, pc}
- 800084a:	46c0      	nop			; (mov r8, r8)
- 800084c:	20000020 	.word	0x20000020
- 8000850:	20000044 	.word	0x20000044
- 8000854:	20000030 	.word	0x20000030
- 8000858:	20000028 	.word	0x20000028
- 800085c:	20000040 	.word	0x20000040
- 8000860:	20000038 	.word	0x20000038
- 8000864:	2000003c 	.word	0x2000003c
- 8000868:	2000002c 	.word	0x2000002c
+ 8000b6e:	46c0      	nop			; (mov r8, r8)
+ 8000b70:	46bd      	mov	sp, r7
+ 8000b72:	b004      	add	sp, #16
+ 8000b74:	bd80      	pop	{r7, pc}
+ 8000b76:	46c0      	nop			; (mov r8, r8)
+ 8000b78:	20000020 	.word	0x20000020
+ 8000b7c:	20000030 	.word	0x20000030
+ 8000b80:	20000044 	.word	0x20000044
+ 8000b84:	20000028 	.word	0x20000028
+ 8000b88:	20000040 	.word	0x20000040
+ 8000b8c:	20000038 	.word	0x20000038
+ 8000b90:	2000003c 	.word	0x2000003c
+ 8000b94:	2000002c 	.word	0x2000002c
 
-0800086c <LL_APB1_GRP1_EnableClock>:
+08000b98 <__NVIC_EnableIRQ>:
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8000b98:	b580      	push	{r7, lr}
+ 8000b9a:	b082      	sub	sp, #8
+ 8000b9c:	af00      	add	r7, sp, #0
+ 8000b9e:	0002      	movs	r2, r0
+ 8000ba0:	1dfb      	adds	r3, r7, #7
+ 8000ba2:	701a      	strb	r2, [r3, #0]
+  if ((int32_t)(IRQn) >= 0)
+ 8000ba4:	1dfb      	adds	r3, r7, #7
+ 8000ba6:	781b      	ldrb	r3, [r3, #0]
+ 8000ba8:	2b7f      	cmp	r3, #127	; 0x7f
+ 8000baa:	d809      	bhi.n	8000bc0 <__NVIC_EnableIRQ+0x28>
+  {
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ 8000bac:	1dfb      	adds	r3, r7, #7
+ 8000bae:	781b      	ldrb	r3, [r3, #0]
+ 8000bb0:	001a      	movs	r2, r3
+ 8000bb2:	231f      	movs	r3, #31
+ 8000bb4:	401a      	ands	r2, r3
+ 8000bb6:	4b04      	ldr	r3, [pc, #16]	; (8000bc8 <__NVIC_EnableIRQ+0x30>)
+ 8000bb8:	2101      	movs	r1, #1
+ 8000bba:	4091      	lsls	r1, r2
+ 8000bbc:	000a      	movs	r2, r1
+ 8000bbe:	601a      	str	r2, [r3, #0]
+  }
+}
+ 8000bc0:	46c0      	nop			; (mov r8, r8)
+ 8000bc2:	46bd      	mov	sp, r7
+ 8000bc4:	b002      	add	sp, #8
+ 8000bc6:	bd80      	pop	{r7, pc}
+ 8000bc8:	e000e100 	.word	0xe000e100
+
+08000bcc <__NVIC_SetPriority>:
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 8000bcc:	b590      	push	{r4, r7, lr}
+ 8000bce:	b083      	sub	sp, #12
+ 8000bd0:	af00      	add	r7, sp, #0
+ 8000bd2:	0002      	movs	r2, r0
+ 8000bd4:	6039      	str	r1, [r7, #0]
+ 8000bd6:	1dfb      	adds	r3, r7, #7
+ 8000bd8:	701a      	strb	r2, [r3, #0]
+  if ((int32_t)(IRQn) >= 0)
+ 8000bda:	1dfb      	adds	r3, r7, #7
+ 8000bdc:	781b      	ldrb	r3, [r3, #0]
+ 8000bde:	2b7f      	cmp	r3, #127	; 0x7f
+ 8000be0:	d828      	bhi.n	8000c34 <__NVIC_SetPriority+0x68>
+  {
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ 8000be2:	4a2f      	ldr	r2, [pc, #188]	; (8000ca0 <__NVIC_SetPriority+0xd4>)
+ 8000be4:	1dfb      	adds	r3, r7, #7
+ 8000be6:	781b      	ldrb	r3, [r3, #0]
+ 8000be8:	b25b      	sxtb	r3, r3
+ 8000bea:	089b      	lsrs	r3, r3, #2
+ 8000bec:	33c0      	adds	r3, #192	; 0xc0
+ 8000bee:	009b      	lsls	r3, r3, #2
+ 8000bf0:	589b      	ldr	r3, [r3, r2]
+ 8000bf2:	1dfa      	adds	r2, r7, #7
+ 8000bf4:	7812      	ldrb	r2, [r2, #0]
+ 8000bf6:	0011      	movs	r1, r2
+ 8000bf8:	2203      	movs	r2, #3
+ 8000bfa:	400a      	ands	r2, r1
+ 8000bfc:	00d2      	lsls	r2, r2, #3
+ 8000bfe:	21ff      	movs	r1, #255	; 0xff
+ 8000c00:	4091      	lsls	r1, r2
+ 8000c02:	000a      	movs	r2, r1
+ 8000c04:	43d2      	mvns	r2, r2
+ 8000c06:	401a      	ands	r2, r3
+ 8000c08:	0011      	movs	r1, r2
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+ 8000c0a:	683b      	ldr	r3, [r7, #0]
+ 8000c0c:	019b      	lsls	r3, r3, #6
+ 8000c0e:	22ff      	movs	r2, #255	; 0xff
+ 8000c10:	401a      	ands	r2, r3
+ 8000c12:	1dfb      	adds	r3, r7, #7
+ 8000c14:	781b      	ldrb	r3, [r3, #0]
+ 8000c16:	0018      	movs	r0, r3
+ 8000c18:	2303      	movs	r3, #3
+ 8000c1a:	4003      	ands	r3, r0
+ 8000c1c:	00db      	lsls	r3, r3, #3
+ 8000c1e:	409a      	lsls	r2, r3
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ 8000c20:	481f      	ldr	r0, [pc, #124]	; (8000ca0 <__NVIC_SetPriority+0xd4>)
+ 8000c22:	1dfb      	adds	r3, r7, #7
+ 8000c24:	781b      	ldrb	r3, [r3, #0]
+ 8000c26:	b25b      	sxtb	r3, r3
+ 8000c28:	089b      	lsrs	r3, r3, #2
+ 8000c2a:	430a      	orrs	r2, r1
+ 8000c2c:	33c0      	adds	r3, #192	; 0xc0
+ 8000c2e:	009b      	lsls	r3, r3, #2
+ 8000c30:	501a      	str	r2, [r3, r0]
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+ 8000c32:	e031      	b.n	8000c98 <__NVIC_SetPriority+0xcc>
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ 8000c34:	4a1b      	ldr	r2, [pc, #108]	; (8000ca4 <__NVIC_SetPriority+0xd8>)
+ 8000c36:	1dfb      	adds	r3, r7, #7
+ 8000c38:	781b      	ldrb	r3, [r3, #0]
+ 8000c3a:	0019      	movs	r1, r3
+ 8000c3c:	230f      	movs	r3, #15
+ 8000c3e:	400b      	ands	r3, r1
+ 8000c40:	3b08      	subs	r3, #8
+ 8000c42:	089b      	lsrs	r3, r3, #2
+ 8000c44:	3306      	adds	r3, #6
+ 8000c46:	009b      	lsls	r3, r3, #2
+ 8000c48:	18d3      	adds	r3, r2, r3
+ 8000c4a:	3304      	adds	r3, #4
+ 8000c4c:	681b      	ldr	r3, [r3, #0]
+ 8000c4e:	1dfa      	adds	r2, r7, #7
+ 8000c50:	7812      	ldrb	r2, [r2, #0]
+ 8000c52:	0011      	movs	r1, r2
+ 8000c54:	2203      	movs	r2, #3
+ 8000c56:	400a      	ands	r2, r1
+ 8000c58:	00d2      	lsls	r2, r2, #3
+ 8000c5a:	21ff      	movs	r1, #255	; 0xff
+ 8000c5c:	4091      	lsls	r1, r2
+ 8000c5e:	000a      	movs	r2, r1
+ 8000c60:	43d2      	mvns	r2, r2
+ 8000c62:	401a      	ands	r2, r3
+ 8000c64:	0011      	movs	r1, r2
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+ 8000c66:	683b      	ldr	r3, [r7, #0]
+ 8000c68:	019b      	lsls	r3, r3, #6
+ 8000c6a:	22ff      	movs	r2, #255	; 0xff
+ 8000c6c:	401a      	ands	r2, r3
+ 8000c6e:	1dfb      	adds	r3, r7, #7
+ 8000c70:	781b      	ldrb	r3, [r3, #0]
+ 8000c72:	0018      	movs	r0, r3
+ 8000c74:	2303      	movs	r3, #3
+ 8000c76:	4003      	ands	r3, r0
+ 8000c78:	00db      	lsls	r3, r3, #3
+ 8000c7a:	409a      	lsls	r2, r3
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+ 8000c7c:	4809      	ldr	r0, [pc, #36]	; (8000ca4 <__NVIC_SetPriority+0xd8>)
+ 8000c7e:	1dfb      	adds	r3, r7, #7
+ 8000c80:	781b      	ldrb	r3, [r3, #0]
+ 8000c82:	001c      	movs	r4, r3
+ 8000c84:	230f      	movs	r3, #15
+ 8000c86:	4023      	ands	r3, r4
+ 8000c88:	3b08      	subs	r3, #8
+ 8000c8a:	089b      	lsrs	r3, r3, #2
+ 8000c8c:	430a      	orrs	r2, r1
+ 8000c8e:	3306      	adds	r3, #6
+ 8000c90:	009b      	lsls	r3, r3, #2
+ 8000c92:	18c3      	adds	r3, r0, r3
+ 8000c94:	3304      	adds	r3, #4
+ 8000c96:	601a      	str	r2, [r3, #0]
+}
+ 8000c98:	46c0      	nop			; (mov r8, r8)
+ 8000c9a:	46bd      	mov	sp, r7
+ 8000c9c:	b003      	add	sp, #12
+ 8000c9e:	bd90      	pop	{r4, r7, pc}
+ 8000ca0:	e000e100 	.word	0xe000e100
+ 8000ca4:	e000ed00 	.word	0xe000ed00
+
+08000ca8 <LL_DMA_SetDataTransferDirection>:
+  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
+  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction)
+{
+ 8000ca8:	b580      	push	{r7, lr}
+ 8000caa:	b084      	sub	sp, #16
+ 8000cac:	af00      	add	r7, sp, #0
+ 8000cae:	60f8      	str	r0, [r7, #12]
+ 8000cb0:	60b9      	str	r1, [r7, #8]
+ 8000cb2:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+ 8000cb4:	68bb      	ldr	r3, [r7, #8]
+ 8000cb6:	3b01      	subs	r3, #1
+ 8000cb8:	4a0b      	ldr	r2, [pc, #44]	; (8000ce8 <LL_DMA_SetDataTransferDirection+0x40>)
+ 8000cba:	5cd3      	ldrb	r3, [r2, r3]
+ 8000cbc:	001a      	movs	r2, r3
+ 8000cbe:	68fb      	ldr	r3, [r7, #12]
+ 8000cc0:	18d3      	adds	r3, r2, r3
+ 8000cc2:	681b      	ldr	r3, [r3, #0]
+ 8000cc4:	4a09      	ldr	r2, [pc, #36]	; (8000cec <LL_DMA_SetDataTransferDirection+0x44>)
+ 8000cc6:	4013      	ands	r3, r2
+ 8000cc8:	0019      	movs	r1, r3
+ 8000cca:	68bb      	ldr	r3, [r7, #8]
+ 8000ccc:	3b01      	subs	r3, #1
+ 8000cce:	4a06      	ldr	r2, [pc, #24]	; (8000ce8 <LL_DMA_SetDataTransferDirection+0x40>)
+ 8000cd0:	5cd3      	ldrb	r3, [r2, r3]
+ 8000cd2:	001a      	movs	r2, r3
+ 8000cd4:	68fb      	ldr	r3, [r7, #12]
+ 8000cd6:	18d3      	adds	r3, r2, r3
+ 8000cd8:	687a      	ldr	r2, [r7, #4]
+ 8000cda:	430a      	orrs	r2, r1
+ 8000cdc:	601a      	str	r2, [r3, #0]
+             DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction);
+}
+ 8000cde:	46c0      	nop			; (mov r8, r8)
+ 8000ce0:	46bd      	mov	sp, r7
+ 8000ce2:	b004      	add	sp, #16
+ 8000ce4:	bd80      	pop	{r7, pc}
+ 8000ce6:	46c0      	nop			; (mov r8, r8)
+ 8000ce8:	080023c0 	.word	0x080023c0
+ 8000cec:	ffffbfef 	.word	0xffffbfef
+
+08000cf0 <LL_DMA_SetMode>:
+  *         @arg @ref LL_DMA_MODE_NORMAL
+  *         @arg @ref LL_DMA_MODE_CIRCULAR
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)
+{
+ 8000cf0:	b580      	push	{r7, lr}
+ 8000cf2:	b084      	sub	sp, #16
+ 8000cf4:	af00      	add	r7, sp, #0
+ 8000cf6:	60f8      	str	r0, [r7, #12]
+ 8000cf8:	60b9      	str	r1, [r7, #8]
+ 8000cfa:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_CIRC,
+ 8000cfc:	68bb      	ldr	r3, [r7, #8]
+ 8000cfe:	3b01      	subs	r3, #1
+ 8000d00:	4a0b      	ldr	r2, [pc, #44]	; (8000d30 <LL_DMA_SetMode+0x40>)
+ 8000d02:	5cd3      	ldrb	r3, [r2, r3]
+ 8000d04:	001a      	movs	r2, r3
+ 8000d06:	68fb      	ldr	r3, [r7, #12]
+ 8000d08:	18d3      	adds	r3, r2, r3
+ 8000d0a:	681b      	ldr	r3, [r3, #0]
+ 8000d0c:	2220      	movs	r2, #32
+ 8000d0e:	4393      	bics	r3, r2
+ 8000d10:	0019      	movs	r1, r3
+ 8000d12:	68bb      	ldr	r3, [r7, #8]
+ 8000d14:	3b01      	subs	r3, #1
+ 8000d16:	4a06      	ldr	r2, [pc, #24]	; (8000d30 <LL_DMA_SetMode+0x40>)
+ 8000d18:	5cd3      	ldrb	r3, [r2, r3]
+ 8000d1a:	001a      	movs	r2, r3
+ 8000d1c:	68fb      	ldr	r3, [r7, #12]
+ 8000d1e:	18d3      	adds	r3, r2, r3
+ 8000d20:	687a      	ldr	r2, [r7, #4]
+ 8000d22:	430a      	orrs	r2, r1
+ 8000d24:	601a      	str	r2, [r3, #0]
+             Mode);
+}
+ 8000d26:	46c0      	nop			; (mov r8, r8)
+ 8000d28:	46bd      	mov	sp, r7
+ 8000d2a:	b004      	add	sp, #16
+ 8000d2c:	bd80      	pop	{r7, pc}
+ 8000d2e:	46c0      	nop			; (mov r8, r8)
+ 8000d30:	080023c0 	.word	0x080023c0
+
+08000d34 <LL_DMA_SetPeriphIncMode>:
+  *         @arg @ref LL_DMA_PERIPH_INCREMENT
+  *         @arg @ref LL_DMA_PERIPH_NOINCREMENT
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
+{
+ 8000d34:	b580      	push	{r7, lr}
+ 8000d36:	b084      	sub	sp, #16
+ 8000d38:	af00      	add	r7, sp, #0
+ 8000d3a:	60f8      	str	r0, [r7, #12]
+ 8000d3c:	60b9      	str	r1, [r7, #8]
+ 8000d3e:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
+ 8000d40:	68bb      	ldr	r3, [r7, #8]
+ 8000d42:	3b01      	subs	r3, #1
+ 8000d44:	4a0b      	ldr	r2, [pc, #44]	; (8000d74 <LL_DMA_SetPeriphIncMode+0x40>)
+ 8000d46:	5cd3      	ldrb	r3, [r2, r3]
+ 8000d48:	001a      	movs	r2, r3
+ 8000d4a:	68fb      	ldr	r3, [r7, #12]
+ 8000d4c:	18d3      	adds	r3, r2, r3
+ 8000d4e:	681b      	ldr	r3, [r3, #0]
+ 8000d50:	2240      	movs	r2, #64	; 0x40
+ 8000d52:	4393      	bics	r3, r2
+ 8000d54:	0019      	movs	r1, r3
+ 8000d56:	68bb      	ldr	r3, [r7, #8]
+ 8000d58:	3b01      	subs	r3, #1
+ 8000d5a:	4a06      	ldr	r2, [pc, #24]	; (8000d74 <LL_DMA_SetPeriphIncMode+0x40>)
+ 8000d5c:	5cd3      	ldrb	r3, [r2, r3]
+ 8000d5e:	001a      	movs	r2, r3
+ 8000d60:	68fb      	ldr	r3, [r7, #12]
+ 8000d62:	18d3      	adds	r3, r2, r3
+ 8000d64:	687a      	ldr	r2, [r7, #4]
+ 8000d66:	430a      	orrs	r2, r1
+ 8000d68:	601a      	str	r2, [r3, #0]
+             PeriphOrM2MSrcIncMode);
+}
+ 8000d6a:	46c0      	nop			; (mov r8, r8)
+ 8000d6c:	46bd      	mov	sp, r7
+ 8000d6e:	b004      	add	sp, #16
+ 8000d70:	bd80      	pop	{r7, pc}
+ 8000d72:	46c0      	nop			; (mov r8, r8)
+ 8000d74:	080023c0 	.word	0x080023c0
+
+08000d78 <LL_DMA_SetMemoryIncMode>:
+  *         @arg @ref LL_DMA_MEMORY_INCREMENT
+  *         @arg @ref LL_DMA_MEMORY_NOINCREMENT
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
+{
+ 8000d78:	b580      	push	{r7, lr}
+ 8000d7a:	b084      	sub	sp, #16
+ 8000d7c:	af00      	add	r7, sp, #0
+ 8000d7e:	60f8      	str	r0, [r7, #12]
+ 8000d80:	60b9      	str	r1, [r7, #8]
+ 8000d82:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MINC,
+ 8000d84:	68bb      	ldr	r3, [r7, #8]
+ 8000d86:	3b01      	subs	r3, #1
+ 8000d88:	4a0b      	ldr	r2, [pc, #44]	; (8000db8 <LL_DMA_SetMemoryIncMode+0x40>)
+ 8000d8a:	5cd3      	ldrb	r3, [r2, r3]
+ 8000d8c:	001a      	movs	r2, r3
+ 8000d8e:	68fb      	ldr	r3, [r7, #12]
+ 8000d90:	18d3      	adds	r3, r2, r3
+ 8000d92:	681b      	ldr	r3, [r3, #0]
+ 8000d94:	2280      	movs	r2, #128	; 0x80
+ 8000d96:	4393      	bics	r3, r2
+ 8000d98:	0019      	movs	r1, r3
+ 8000d9a:	68bb      	ldr	r3, [r7, #8]
+ 8000d9c:	3b01      	subs	r3, #1
+ 8000d9e:	4a06      	ldr	r2, [pc, #24]	; (8000db8 <LL_DMA_SetMemoryIncMode+0x40>)
+ 8000da0:	5cd3      	ldrb	r3, [r2, r3]
+ 8000da2:	001a      	movs	r2, r3
+ 8000da4:	68fb      	ldr	r3, [r7, #12]
+ 8000da6:	18d3      	adds	r3, r2, r3
+ 8000da8:	687a      	ldr	r2, [r7, #4]
+ 8000daa:	430a      	orrs	r2, r1
+ 8000dac:	601a      	str	r2, [r3, #0]
+             MemoryOrM2MDstIncMode);
+}
+ 8000dae:	46c0      	nop			; (mov r8, r8)
+ 8000db0:	46bd      	mov	sp, r7
+ 8000db2:	b004      	add	sp, #16
+ 8000db4:	bd80      	pop	{r7, pc}
+ 8000db6:	46c0      	nop			; (mov r8, r8)
+ 8000db8:	080023c0 	.word	0x080023c0
+
+08000dbc <LL_DMA_SetPeriphSize>:
+  *         @arg @ref LL_DMA_PDATAALIGN_HALFWORD
+  *         @arg @ref LL_DMA_PDATAALIGN_WORD
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
+{
+ 8000dbc:	b580      	push	{r7, lr}
+ 8000dbe:	b084      	sub	sp, #16
+ 8000dc0:	af00      	add	r7, sp, #0
+ 8000dc2:	60f8      	str	r0, [r7, #12]
+ 8000dc4:	60b9      	str	r1, [r7, #8]
+ 8000dc6:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PSIZE,
+ 8000dc8:	68bb      	ldr	r3, [r7, #8]
+ 8000dca:	3b01      	subs	r3, #1
+ 8000dcc:	4a0b      	ldr	r2, [pc, #44]	; (8000dfc <LL_DMA_SetPeriphSize+0x40>)
+ 8000dce:	5cd3      	ldrb	r3, [r2, r3]
+ 8000dd0:	001a      	movs	r2, r3
+ 8000dd2:	68fb      	ldr	r3, [r7, #12]
+ 8000dd4:	18d3      	adds	r3, r2, r3
+ 8000dd6:	681b      	ldr	r3, [r3, #0]
+ 8000dd8:	4a09      	ldr	r2, [pc, #36]	; (8000e00 <LL_DMA_SetPeriphSize+0x44>)
+ 8000dda:	4013      	ands	r3, r2
+ 8000ddc:	0019      	movs	r1, r3
+ 8000dde:	68bb      	ldr	r3, [r7, #8]
+ 8000de0:	3b01      	subs	r3, #1
+ 8000de2:	4a06      	ldr	r2, [pc, #24]	; (8000dfc <LL_DMA_SetPeriphSize+0x40>)
+ 8000de4:	5cd3      	ldrb	r3, [r2, r3]
+ 8000de6:	001a      	movs	r2, r3
+ 8000de8:	68fb      	ldr	r3, [r7, #12]
+ 8000dea:	18d3      	adds	r3, r2, r3
+ 8000dec:	687a      	ldr	r2, [r7, #4]
+ 8000dee:	430a      	orrs	r2, r1
+ 8000df0:	601a      	str	r2, [r3, #0]
+             PeriphOrM2MSrcDataSize);
+}
+ 8000df2:	46c0      	nop			; (mov r8, r8)
+ 8000df4:	46bd      	mov	sp, r7
+ 8000df6:	b004      	add	sp, #16
+ 8000df8:	bd80      	pop	{r7, pc}
+ 8000dfa:	46c0      	nop			; (mov r8, r8)
+ 8000dfc:	080023c0 	.word	0x080023c0
+ 8000e00:	fffffcff 	.word	0xfffffcff
+
+08000e04 <LL_DMA_SetMemorySize>:
+  *         @arg @ref LL_DMA_MDATAALIGN_HALFWORD
+  *         @arg @ref LL_DMA_MDATAALIGN_WORD
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
+{
+ 8000e04:	b580      	push	{r7, lr}
+ 8000e06:	b084      	sub	sp, #16
+ 8000e08:	af00      	add	r7, sp, #0
+ 8000e0a:	60f8      	str	r0, [r7, #12]
+ 8000e0c:	60b9      	str	r1, [r7, #8]
+ 8000e0e:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MSIZE,
+ 8000e10:	68bb      	ldr	r3, [r7, #8]
+ 8000e12:	3b01      	subs	r3, #1
+ 8000e14:	4a0b      	ldr	r2, [pc, #44]	; (8000e44 <LL_DMA_SetMemorySize+0x40>)
+ 8000e16:	5cd3      	ldrb	r3, [r2, r3]
+ 8000e18:	001a      	movs	r2, r3
+ 8000e1a:	68fb      	ldr	r3, [r7, #12]
+ 8000e1c:	18d3      	adds	r3, r2, r3
+ 8000e1e:	681b      	ldr	r3, [r3, #0]
+ 8000e20:	4a09      	ldr	r2, [pc, #36]	; (8000e48 <LL_DMA_SetMemorySize+0x44>)
+ 8000e22:	4013      	ands	r3, r2
+ 8000e24:	0019      	movs	r1, r3
+ 8000e26:	68bb      	ldr	r3, [r7, #8]
+ 8000e28:	3b01      	subs	r3, #1
+ 8000e2a:	4a06      	ldr	r2, [pc, #24]	; (8000e44 <LL_DMA_SetMemorySize+0x40>)
+ 8000e2c:	5cd3      	ldrb	r3, [r2, r3]
+ 8000e2e:	001a      	movs	r2, r3
+ 8000e30:	68fb      	ldr	r3, [r7, #12]
+ 8000e32:	18d3      	adds	r3, r2, r3
+ 8000e34:	687a      	ldr	r2, [r7, #4]
+ 8000e36:	430a      	orrs	r2, r1
+ 8000e38:	601a      	str	r2, [r3, #0]
+             MemoryOrM2MDstDataSize);
+}
+ 8000e3a:	46c0      	nop			; (mov r8, r8)
+ 8000e3c:	46bd      	mov	sp, r7
+ 8000e3e:	b004      	add	sp, #16
+ 8000e40:	bd80      	pop	{r7, pc}
+ 8000e42:	46c0      	nop			; (mov r8, r8)
+ 8000e44:	080023c0 	.word	0x080023c0
+ 8000e48:	fffff3ff 	.word	0xfffff3ff
+
+08000e4c <LL_DMA_SetChannelPriorityLevel>:
+  *         @arg @ref LL_DMA_PRIORITY_HIGH
+  *         @arg @ref LL_DMA_PRIORITY_VERYHIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority)
+{
+ 8000e4c:	b580      	push	{r7, lr}
+ 8000e4e:	b084      	sub	sp, #16
+ 8000e50:	af00      	add	r7, sp, #0
+ 8000e52:	60f8      	str	r0, [r7, #12]
+ 8000e54:	60b9      	str	r1, [r7, #8]
+ 8000e56:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PL,
+ 8000e58:	68bb      	ldr	r3, [r7, #8]
+ 8000e5a:	3b01      	subs	r3, #1
+ 8000e5c:	4a0b      	ldr	r2, [pc, #44]	; (8000e8c <LL_DMA_SetChannelPriorityLevel+0x40>)
+ 8000e5e:	5cd3      	ldrb	r3, [r2, r3]
+ 8000e60:	001a      	movs	r2, r3
+ 8000e62:	68fb      	ldr	r3, [r7, #12]
+ 8000e64:	18d3      	adds	r3, r2, r3
+ 8000e66:	681b      	ldr	r3, [r3, #0]
+ 8000e68:	4a09      	ldr	r2, [pc, #36]	; (8000e90 <LL_DMA_SetChannelPriorityLevel+0x44>)
+ 8000e6a:	4013      	ands	r3, r2
+ 8000e6c:	0019      	movs	r1, r3
+ 8000e6e:	68bb      	ldr	r3, [r7, #8]
+ 8000e70:	3b01      	subs	r3, #1
+ 8000e72:	4a06      	ldr	r2, [pc, #24]	; (8000e8c <LL_DMA_SetChannelPriorityLevel+0x40>)
+ 8000e74:	5cd3      	ldrb	r3, [r2, r3]
+ 8000e76:	001a      	movs	r2, r3
+ 8000e78:	68fb      	ldr	r3, [r7, #12]
+ 8000e7a:	18d3      	adds	r3, r2, r3
+ 8000e7c:	687a      	ldr	r2, [r7, #4]
+ 8000e7e:	430a      	orrs	r2, r1
+ 8000e80:	601a      	str	r2, [r3, #0]
+             Priority);
+}
+ 8000e82:	46c0      	nop			; (mov r8, r8)
+ 8000e84:	46bd      	mov	sp, r7
+ 8000e86:	b004      	add	sp, #16
+ 8000e88:	bd80      	pop	{r7, pc}
+ 8000e8a:	46c0      	nop			; (mov r8, r8)
+ 8000e8c:	080023c0 	.word	0x080023c0
+ 8000e90:	ffffcfff 	.word	0xffffcfff
+
+08000e94 <LL_DMA_SetPeriphRequest>:
+  *         @arg @ref LL_DMA_REQUEST_14
+  *         @arg @ref LL_DMA_REQUEST_15
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request)
+{
+ 8000e94:	b580      	push	{r7, lr}
+ 8000e96:	b084      	sub	sp, #16
+ 8000e98:	af00      	add	r7, sp, #0
+ 8000e9a:	60f8      	str	r0, [r7, #12]
+ 8000e9c:	60b9      	str	r1, [r7, #8]
+ 8000e9e:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
+ 8000ea0:	68fb      	ldr	r3, [r7, #12]
+ 8000ea2:	33a8      	adds	r3, #168	; 0xa8
+ 8000ea4:	681b      	ldr	r3, [r3, #0]
+ 8000ea6:	68ba      	ldr	r2, [r7, #8]
+ 8000ea8:	3a01      	subs	r2, #1
+ 8000eaa:	0092      	lsls	r2, r2, #2
+ 8000eac:	210f      	movs	r1, #15
+ 8000eae:	4091      	lsls	r1, r2
+ 8000eb0:	000a      	movs	r2, r1
+ 8000eb2:	43d2      	mvns	r2, r2
+ 8000eb4:	401a      	ands	r2, r3
+ 8000eb6:	0011      	movs	r1, r2
+ 8000eb8:	68bb      	ldr	r3, [r7, #8]
+ 8000eba:	3b01      	subs	r3, #1
+ 8000ebc:	009b      	lsls	r3, r3, #2
+ 8000ebe:	687a      	ldr	r2, [r7, #4]
+ 8000ec0:	409a      	lsls	r2, r3
+ 8000ec2:	68fb      	ldr	r3, [r7, #12]
+ 8000ec4:	33a8      	adds	r3, #168	; 0xa8
+ 8000ec6:	430a      	orrs	r2, r1
+ 8000ec8:	601a      	str	r2, [r3, #0]
+             DMA_CSELR_C1S << ((Channel - 1U) * 4U), Request << DMA_POSITION_CSELR_CXS);
+}
+ 8000eca:	46c0      	nop			; (mov r8, r8)
+ 8000ecc:	46bd      	mov	sp, r7
+ 8000ece:	b004      	add	sp, #16
+ 8000ed0:	bd80      	pop	{r7, pc}
+
+08000ed2 <LL_I2C_Enable>:
+{
+ 8000ed2:	b580      	push	{r7, lr}
+ 8000ed4:	b082      	sub	sp, #8
+ 8000ed6:	af00      	add	r7, sp, #0
+ 8000ed8:	6078      	str	r0, [r7, #4]
+  SET_BIT(I2Cx->CR1, I2C_CR1_PE);
+ 8000eda:	687b      	ldr	r3, [r7, #4]
+ 8000edc:	681b      	ldr	r3, [r3, #0]
+ 8000ede:	2201      	movs	r2, #1
+ 8000ee0:	431a      	orrs	r2, r3
+ 8000ee2:	687b      	ldr	r3, [r7, #4]
+ 8000ee4:	601a      	str	r2, [r3, #0]
+}
+ 8000ee6:	46c0      	nop			; (mov r8, r8)
+ 8000ee8:	46bd      	mov	sp, r7
+ 8000eea:	b002      	add	sp, #8
+ 8000eec:	bd80      	pop	{r7, pc}
+	...
+
+08000ef0 <LL_I2C_EnableClockStretching>:
+{
+ 8000ef0:	b580      	push	{r7, lr}
+ 8000ef2:	b082      	sub	sp, #8
+ 8000ef4:	af00      	add	r7, sp, #0
+ 8000ef6:	6078      	str	r0, [r7, #4]
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
+ 8000ef8:	687b      	ldr	r3, [r7, #4]
+ 8000efa:	681b      	ldr	r3, [r3, #0]
+ 8000efc:	4a03      	ldr	r2, [pc, #12]	; (8000f0c <LL_I2C_EnableClockStretching+0x1c>)
+ 8000efe:	401a      	ands	r2, r3
+ 8000f00:	687b      	ldr	r3, [r7, #4]
+ 8000f02:	601a      	str	r2, [r3, #0]
+}
+ 8000f04:	46c0      	nop			; (mov r8, r8)
+ 8000f06:	46bd      	mov	sp, r7
+ 8000f08:	b002      	add	sp, #8
+ 8000f0a:	bd80      	pop	{r7, pc}
+ 8000f0c:	fffdffff 	.word	0xfffdffff
+
+08000f10 <LL_I2C_DisableGeneralCall>:
+{
+ 8000f10:	b580      	push	{r7, lr}
+ 8000f12:	b082      	sub	sp, #8
+ 8000f14:	af00      	add	r7, sp, #0
+ 8000f16:	6078      	str	r0, [r7, #4]
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
+ 8000f18:	687b      	ldr	r3, [r7, #4]
+ 8000f1a:	681b      	ldr	r3, [r3, #0]
+ 8000f1c:	4a03      	ldr	r2, [pc, #12]	; (8000f2c <LL_I2C_DisableGeneralCall+0x1c>)
+ 8000f1e:	401a      	ands	r2, r3
+ 8000f20:	687b      	ldr	r3, [r7, #4]
+ 8000f22:	601a      	str	r2, [r3, #0]
+}
+ 8000f24:	46c0      	nop			; (mov r8, r8)
+ 8000f26:	46bd      	mov	sp, r7
+ 8000f28:	b002      	add	sp, #8
+ 8000f2a:	bd80      	pop	{r7, pc}
+ 8000f2c:	fff7ffff 	.word	0xfff7ffff
+
+08000f30 <LL_I2C_SetOwnAddress2>:
+{
+ 8000f30:	b580      	push	{r7, lr}
+ 8000f32:	b084      	sub	sp, #16
+ 8000f34:	af00      	add	r7, sp, #0
+ 8000f36:	60f8      	str	r0, [r7, #12]
+ 8000f38:	60b9      	str	r1, [r7, #8]
+ 8000f3a:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask);
+ 8000f3c:	68fb      	ldr	r3, [r7, #12]
+ 8000f3e:	68db      	ldr	r3, [r3, #12]
+ 8000f40:	4a05      	ldr	r2, [pc, #20]	; (8000f58 <LL_I2C_SetOwnAddress2+0x28>)
+ 8000f42:	401a      	ands	r2, r3
+ 8000f44:	68b9      	ldr	r1, [r7, #8]
+ 8000f46:	687b      	ldr	r3, [r7, #4]
+ 8000f48:	430b      	orrs	r3, r1
+ 8000f4a:	431a      	orrs	r2, r3
+ 8000f4c:	68fb      	ldr	r3, [r7, #12]
+ 8000f4e:	60da      	str	r2, [r3, #12]
+}
+ 8000f50:	46c0      	nop			; (mov r8, r8)
+ 8000f52:	46bd      	mov	sp, r7
+ 8000f54:	b004      	add	sp, #16
+ 8000f56:	bd80      	pop	{r7, pc}
+ 8000f58:	fffff801 	.word	0xfffff801
+
+08000f5c <LL_I2C_DisableOwnAddress2>:
+{
+ 8000f5c:	b580      	push	{r7, lr}
+ 8000f5e:	b082      	sub	sp, #8
+ 8000f60:	af00      	add	r7, sp, #0
+ 8000f62:	6078      	str	r0, [r7, #4]
+  CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
+ 8000f64:	687b      	ldr	r3, [r7, #4]
+ 8000f66:	68db      	ldr	r3, [r3, #12]
+ 8000f68:	4a03      	ldr	r2, [pc, #12]	; (8000f78 <LL_I2C_DisableOwnAddress2+0x1c>)
+ 8000f6a:	401a      	ands	r2, r3
+ 8000f6c:	687b      	ldr	r3, [r7, #4]
+ 8000f6e:	60da      	str	r2, [r3, #12]
+}
+ 8000f70:	46c0      	nop			; (mov r8, r8)
+ 8000f72:	46bd      	mov	sp, r7
+ 8000f74:	b002      	add	sp, #8
+ 8000f76:	bd80      	pop	{r7, pc}
+ 8000f78:	ffff7fff 	.word	0xffff7fff
+
+08000f7c <LL_I2C_EnableAutoEndMode>:
+{
+ 8000f7c:	b580      	push	{r7, lr}
+ 8000f7e:	b082      	sub	sp, #8
+ 8000f80:	af00      	add	r7, sp, #0
+ 8000f82:	6078      	str	r0, [r7, #4]
+  SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
+ 8000f84:	687b      	ldr	r3, [r7, #4]
+ 8000f86:	685b      	ldr	r3, [r3, #4]
+ 8000f88:	2280      	movs	r2, #128	; 0x80
+ 8000f8a:	0492      	lsls	r2, r2, #18
+ 8000f8c:	431a      	orrs	r2, r3
+ 8000f8e:	687b      	ldr	r3, [r7, #4]
+ 8000f90:	605a      	str	r2, [r3, #4]
+}
+ 8000f92:	46c0      	nop			; (mov r8, r8)
+ 8000f94:	46bd      	mov	sp, r7
+ 8000f96:	b002      	add	sp, #8
+ 8000f98:	bd80      	pop	{r7, pc}
+
+08000f9a <LL_LPUART_Enable>:
+  * @rmtoll CR1          UE            LL_LPUART_Enable
+  * @param  LPUARTx LPUART Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
+{
+ 8000f9a:	b580      	push	{r7, lr}
+ 8000f9c:	b082      	sub	sp, #8
+ 8000f9e:	af00      	add	r7, sp, #0
+ 8000fa0:	6078      	str	r0, [r7, #4]
+  SET_BIT(LPUARTx->CR1, USART_CR1_UE);
+ 8000fa2:	687b      	ldr	r3, [r7, #4]
+ 8000fa4:	681b      	ldr	r3, [r3, #0]
+ 8000fa6:	2201      	movs	r2, #1
+ 8000fa8:	431a      	orrs	r2, r3
+ 8000faa:	687b      	ldr	r3, [r7, #4]
+ 8000fac:	601a      	str	r2, [r3, #0]
+}
+ 8000fae:	46c0      	nop			; (mov r8, r8)
+ 8000fb0:	46bd      	mov	sp, r7
+ 8000fb2:	b002      	add	sp, #8
+ 8000fb4:	bd80      	pop	{r7, pc}
+	...
+
+08000fb8 <LL_LPUART_SetDEDeassertionTime>:
+  * @param  LPUARTx LPUART Instance
+  * @param  Time Value between Min_Data=0 and Max_Data=31
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
+{
+ 8000fb8:	b580      	push	{r7, lr}
+ 8000fba:	b082      	sub	sp, #8
+ 8000fbc:	af00      	add	r7, sp, #0
+ 8000fbe:	6078      	str	r0, [r7, #4]
+ 8000fc0:	6039      	str	r1, [r7, #0]
+  MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
+ 8000fc2:	687b      	ldr	r3, [r7, #4]
+ 8000fc4:	681b      	ldr	r3, [r3, #0]
+ 8000fc6:	4a05      	ldr	r2, [pc, #20]	; (8000fdc <LL_LPUART_SetDEDeassertionTime+0x24>)
+ 8000fc8:	401a      	ands	r2, r3
+ 8000fca:	683b      	ldr	r3, [r7, #0]
+ 8000fcc:	041b      	lsls	r3, r3, #16
+ 8000fce:	431a      	orrs	r2, r3
+ 8000fd0:	687b      	ldr	r3, [r7, #4]
+ 8000fd2:	601a      	str	r2, [r3, #0]
+}
+ 8000fd4:	46c0      	nop			; (mov r8, r8)
+ 8000fd6:	46bd      	mov	sp, r7
+ 8000fd8:	b002      	add	sp, #8
+ 8000fda:	bd80      	pop	{r7, pc}
+ 8000fdc:	ffe0ffff 	.word	0xffe0ffff
+
+08000fe0 <LL_LPUART_SetDEAssertionTime>:
+  * @param  LPUARTx LPUART Instance
+  * @param  Time Value between Min_Data=0 and Max_Data=31
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
+{
+ 8000fe0:	b580      	push	{r7, lr}
+ 8000fe2:	b082      	sub	sp, #8
+ 8000fe4:	af00      	add	r7, sp, #0
+ 8000fe6:	6078      	str	r0, [r7, #4]
+ 8000fe8:	6039      	str	r1, [r7, #0]
+  MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
+ 8000fea:	687b      	ldr	r3, [r7, #4]
+ 8000fec:	681b      	ldr	r3, [r3, #0]
+ 8000fee:	4a05      	ldr	r2, [pc, #20]	; (8001004 <LL_LPUART_SetDEAssertionTime+0x24>)
+ 8000ff0:	401a      	ands	r2, r3
+ 8000ff2:	683b      	ldr	r3, [r7, #0]
+ 8000ff4:	055b      	lsls	r3, r3, #21
+ 8000ff6:	431a      	orrs	r2, r3
+ 8000ff8:	687b      	ldr	r3, [r7, #4]
+ 8000ffa:	601a      	str	r2, [r3, #0]
+}
+ 8000ffc:	46c0      	nop			; (mov r8, r8)
+ 8000ffe:	46bd      	mov	sp, r7
+ 8001000:	b002      	add	sp, #8
+ 8001002:	bd80      	pop	{r7, pc}
+ 8001004:	fc1fffff 	.word	0xfc1fffff
+
+08001008 <LL_LPUART_EnableDEMode>:
+  * @rmtoll CR3          DEM           LL_LPUART_EnableDEMode
+  * @param  LPUARTx LPUART Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
+{
+ 8001008:	b580      	push	{r7, lr}
+ 800100a:	b082      	sub	sp, #8
+ 800100c:	af00      	add	r7, sp, #0
+ 800100e:	6078      	str	r0, [r7, #4]
+  SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
+ 8001010:	687b      	ldr	r3, [r7, #4]
+ 8001012:	689b      	ldr	r3, [r3, #8]
+ 8001014:	2280      	movs	r2, #128	; 0x80
+ 8001016:	01d2      	lsls	r2, r2, #7
+ 8001018:	431a      	orrs	r2, r3
+ 800101a:	687b      	ldr	r3, [r7, #4]
+ 800101c:	609a      	str	r2, [r3, #8]
+}
+ 800101e:	46c0      	nop			; (mov r8, r8)
+ 8001020:	46bd      	mov	sp, r7
+ 8001022:	b002      	add	sp, #8
+ 8001024:	bd80      	pop	{r7, pc}
+	...
+
+08001028 <LL_LPUART_SetDESignalPolarity>:
+  *         @arg @ref LL_LPUART_DE_POLARITY_HIGH
+  *         @arg @ref LL_LPUART_DE_POLARITY_LOW
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
+{
+ 8001028:	b580      	push	{r7, lr}
+ 800102a:	b082      	sub	sp, #8
+ 800102c:	af00      	add	r7, sp, #0
+ 800102e:	6078      	str	r0, [r7, #4]
+ 8001030:	6039      	str	r1, [r7, #0]
+  MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
+ 8001032:	687b      	ldr	r3, [r7, #4]
+ 8001034:	689b      	ldr	r3, [r3, #8]
+ 8001036:	4a05      	ldr	r2, [pc, #20]	; (800104c <LL_LPUART_SetDESignalPolarity+0x24>)
+ 8001038:	401a      	ands	r2, r3
+ 800103a:	683b      	ldr	r3, [r7, #0]
+ 800103c:	431a      	orrs	r2, r3
+ 800103e:	687b      	ldr	r3, [r7, #4]
+ 8001040:	609a      	str	r2, [r3, #8]
+}
+ 8001042:	46c0      	nop			; (mov r8, r8)
+ 8001044:	46bd      	mov	sp, r7
+ 8001046:	b002      	add	sp, #8
+ 8001048:	bd80      	pop	{r7, pc}
+ 800104a:	46c0      	nop			; (mov r8, r8)
+ 800104c:	ffff7fff 	.word	0xffff7fff
+
+08001050 <LL_RCC_MSI_Enable>:
+  * @brief  Enable MSI oscillator
+  * @rmtoll CR           MSION         LL_RCC_MSI_Enable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_MSI_Enable(void)
+{
+ 8001050:	b580      	push	{r7, lr}
+ 8001052:	af00      	add	r7, sp, #0
+  SET_BIT(RCC->CR, RCC_CR_MSION);
+ 8001054:	4b04      	ldr	r3, [pc, #16]	; (8001068 <LL_RCC_MSI_Enable+0x18>)
+ 8001056:	681a      	ldr	r2, [r3, #0]
+ 8001058:	4b03      	ldr	r3, [pc, #12]	; (8001068 <LL_RCC_MSI_Enable+0x18>)
+ 800105a:	2180      	movs	r1, #128	; 0x80
+ 800105c:	0049      	lsls	r1, r1, #1
+ 800105e:	430a      	orrs	r2, r1
+ 8001060:	601a      	str	r2, [r3, #0]
+}
+ 8001062:	46c0      	nop			; (mov r8, r8)
+ 8001064:	46bd      	mov	sp, r7
+ 8001066:	bd80      	pop	{r7, pc}
+ 8001068:	40021000 	.word	0x40021000
+
+0800106c <LL_RCC_MSI_IsReady>:
+  * @brief  Check if MSI oscillator Ready
+  * @rmtoll CR           MSIRDY        LL_RCC_MSI_IsReady
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void)
+{
+ 800106c:	b580      	push	{r7, lr}
+ 800106e:	af00      	add	r7, sp, #0
+  return ((READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RCC_CR_MSIRDY) ? 1UL : 0UL);
+ 8001070:	4b07      	ldr	r3, [pc, #28]	; (8001090 <LL_RCC_MSI_IsReady+0x24>)
+ 8001072:	681a      	ldr	r2, [r3, #0]
+ 8001074:	2380      	movs	r3, #128	; 0x80
+ 8001076:	009b      	lsls	r3, r3, #2
+ 8001078:	401a      	ands	r2, r3
+ 800107a:	2380      	movs	r3, #128	; 0x80
+ 800107c:	009b      	lsls	r3, r3, #2
+ 800107e:	429a      	cmp	r2, r3
+ 8001080:	d101      	bne.n	8001086 <LL_RCC_MSI_IsReady+0x1a>
+ 8001082:	2301      	movs	r3, #1
+ 8001084:	e000      	b.n	8001088 <LL_RCC_MSI_IsReady+0x1c>
+ 8001086:	2300      	movs	r3, #0
+}
+ 8001088:	0018      	movs	r0, r3
+ 800108a:	46bd      	mov	sp, r7
+ 800108c:	bd80      	pop	{r7, pc}
+ 800108e:	46c0      	nop			; (mov r8, r8)
+ 8001090:	40021000 	.word	0x40021000
+
+08001094 <LL_RCC_MSI_SetRange>:
+  *         @arg @ref LL_RCC_MSIRANGE_5
+  *         @arg @ref LL_RCC_MSIRANGE_6
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_MSI_SetRange(uint32_t Range)
+{
+ 8001094:	b580      	push	{r7, lr}
+ 8001096:	b082      	sub	sp, #8
+ 8001098:	af00      	add	r7, sp, #0
+ 800109a:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSIRANGE, Range);
+ 800109c:	4b06      	ldr	r3, [pc, #24]	; (80010b8 <LL_RCC_MSI_SetRange+0x24>)
+ 800109e:	685b      	ldr	r3, [r3, #4]
+ 80010a0:	4a06      	ldr	r2, [pc, #24]	; (80010bc <LL_RCC_MSI_SetRange+0x28>)
+ 80010a2:	4013      	ands	r3, r2
+ 80010a4:	0019      	movs	r1, r3
+ 80010a6:	4b04      	ldr	r3, [pc, #16]	; (80010b8 <LL_RCC_MSI_SetRange+0x24>)
+ 80010a8:	687a      	ldr	r2, [r7, #4]
+ 80010aa:	430a      	orrs	r2, r1
+ 80010ac:	605a      	str	r2, [r3, #4]
+}
+ 80010ae:	46c0      	nop			; (mov r8, r8)
+ 80010b0:	46bd      	mov	sp, r7
+ 80010b2:	b002      	add	sp, #8
+ 80010b4:	bd80      	pop	{r7, pc}
+ 80010b6:	46c0      	nop			; (mov r8, r8)
+ 80010b8:	40021000 	.word	0x40021000
+ 80010bc:	ffff1fff 	.word	0xffff1fff
+
+080010c0 <LL_RCC_MSI_SetCalibTrimming>:
+  * @rmtoll ICSCR        MSITRIM       LL_RCC_MSI_SetCalibTrimming
+  * @param  Value between Min_Data = 0x00 and Max_Data = 0xFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_MSI_SetCalibTrimming(uint32_t Value)
+{
+ 80010c0:	b580      	push	{r7, lr}
+ 80010c2:	b082      	sub	sp, #8
+ 80010c4:	af00      	add	r7, sp, #0
+ 80010c6:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, Value << RCC_ICSCR_MSITRIM_Pos);
+ 80010c8:	4b06      	ldr	r3, [pc, #24]	; (80010e4 <LL_RCC_MSI_SetCalibTrimming+0x24>)
+ 80010ca:	685b      	ldr	r3, [r3, #4]
+ 80010cc:	021b      	lsls	r3, r3, #8
+ 80010ce:	0a19      	lsrs	r1, r3, #8
+ 80010d0:	687b      	ldr	r3, [r7, #4]
+ 80010d2:	061a      	lsls	r2, r3, #24
+ 80010d4:	4b03      	ldr	r3, [pc, #12]	; (80010e4 <LL_RCC_MSI_SetCalibTrimming+0x24>)
+ 80010d6:	430a      	orrs	r2, r1
+ 80010d8:	605a      	str	r2, [r3, #4]
+}
+ 80010da:	46c0      	nop			; (mov r8, r8)
+ 80010dc:	46bd      	mov	sp, r7
+ 80010de:	b002      	add	sp, #8
+ 80010e0:	bd80      	pop	{r7, pc}
+ 80010e2:	46c0      	nop			; (mov r8, r8)
+ 80010e4:	40021000 	.word	0x40021000
+
+080010e8 <LL_RCC_SetSysClkSource>:
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
+{
+ 80010e8:	b580      	push	{r7, lr}
+ 80010ea:	b082      	sub	sp, #8
+ 80010ec:	af00      	add	r7, sp, #0
+ 80010ee:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
+ 80010f0:	4b06      	ldr	r3, [pc, #24]	; (800110c <LL_RCC_SetSysClkSource+0x24>)
+ 80010f2:	68db      	ldr	r3, [r3, #12]
+ 80010f4:	2203      	movs	r2, #3
+ 80010f6:	4393      	bics	r3, r2
+ 80010f8:	0019      	movs	r1, r3
+ 80010fa:	4b04      	ldr	r3, [pc, #16]	; (800110c <LL_RCC_SetSysClkSource+0x24>)
+ 80010fc:	687a      	ldr	r2, [r7, #4]
+ 80010fe:	430a      	orrs	r2, r1
+ 8001100:	60da      	str	r2, [r3, #12]
+}
+ 8001102:	46c0      	nop			; (mov r8, r8)
+ 8001104:	46bd      	mov	sp, r7
+ 8001106:	b002      	add	sp, #8
+ 8001108:	bd80      	pop	{r7, pc}
+ 800110a:	46c0      	nop			; (mov r8, r8)
+ 800110c:	40021000 	.word	0x40021000
+
+08001110 <LL_RCC_GetSysClkSource>:
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
+{
+ 8001110:	b580      	push	{r7, lr}
+ 8001112:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
+ 8001114:	4b03      	ldr	r3, [pc, #12]	; (8001124 <LL_RCC_GetSysClkSource+0x14>)
+ 8001116:	68db      	ldr	r3, [r3, #12]
+ 8001118:	220c      	movs	r2, #12
+ 800111a:	4013      	ands	r3, r2
+}
+ 800111c:	0018      	movs	r0, r3
+ 800111e:	46bd      	mov	sp, r7
+ 8001120:	bd80      	pop	{r7, pc}
+ 8001122:	46c0      	nop			; (mov r8, r8)
+ 8001124:	40021000 	.word	0x40021000
+
+08001128 <LL_RCC_SetAHBPrescaler>:
+  *         @arg @ref LL_RCC_SYSCLK_DIV_256
+  *         @arg @ref LL_RCC_SYSCLK_DIV_512
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
+{
+ 8001128:	b580      	push	{r7, lr}
+ 800112a:	b082      	sub	sp, #8
+ 800112c:	af00      	add	r7, sp, #0
+ 800112e:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
+ 8001130:	4b06      	ldr	r3, [pc, #24]	; (800114c <LL_RCC_SetAHBPrescaler+0x24>)
+ 8001132:	68db      	ldr	r3, [r3, #12]
+ 8001134:	22f0      	movs	r2, #240	; 0xf0
+ 8001136:	4393      	bics	r3, r2
+ 8001138:	0019      	movs	r1, r3
+ 800113a:	4b04      	ldr	r3, [pc, #16]	; (800114c <LL_RCC_SetAHBPrescaler+0x24>)
+ 800113c:	687a      	ldr	r2, [r7, #4]
+ 800113e:	430a      	orrs	r2, r1
+ 8001140:	60da      	str	r2, [r3, #12]
+}
+ 8001142:	46c0      	nop			; (mov r8, r8)
+ 8001144:	46bd      	mov	sp, r7
+ 8001146:	b002      	add	sp, #8
+ 8001148:	bd80      	pop	{r7, pc}
+ 800114a:	46c0      	nop			; (mov r8, r8)
+ 800114c:	40021000 	.word	0x40021000
+
+08001150 <LL_RCC_SetAPB1Prescaler>:
+  *         @arg @ref LL_RCC_APB1_DIV_8
+  *         @arg @ref LL_RCC_APB1_DIV_16
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
+{
+ 8001150:	b580      	push	{r7, lr}
+ 8001152:	b082      	sub	sp, #8
+ 8001154:	af00      	add	r7, sp, #0
+ 8001156:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
+ 8001158:	4b06      	ldr	r3, [pc, #24]	; (8001174 <LL_RCC_SetAPB1Prescaler+0x24>)
+ 800115a:	68db      	ldr	r3, [r3, #12]
+ 800115c:	4a06      	ldr	r2, [pc, #24]	; (8001178 <LL_RCC_SetAPB1Prescaler+0x28>)
+ 800115e:	4013      	ands	r3, r2
+ 8001160:	0019      	movs	r1, r3
+ 8001162:	4b04      	ldr	r3, [pc, #16]	; (8001174 <LL_RCC_SetAPB1Prescaler+0x24>)
+ 8001164:	687a      	ldr	r2, [r7, #4]
+ 8001166:	430a      	orrs	r2, r1
+ 8001168:	60da      	str	r2, [r3, #12]
+}
+ 800116a:	46c0      	nop			; (mov r8, r8)
+ 800116c:	46bd      	mov	sp, r7
+ 800116e:	b002      	add	sp, #8
+ 8001170:	bd80      	pop	{r7, pc}
+ 8001172:	46c0      	nop			; (mov r8, r8)
+ 8001174:	40021000 	.word	0x40021000
+ 8001178:	fffff8ff 	.word	0xfffff8ff
+
+0800117c <LL_RCC_SetAPB2Prescaler>:
+  *         @arg @ref LL_RCC_APB2_DIV_8
+  *         @arg @ref LL_RCC_APB2_DIV_16
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
+{
+ 800117c:	b580      	push	{r7, lr}
+ 800117e:	b082      	sub	sp, #8
+ 8001180:	af00      	add	r7, sp, #0
+ 8001182:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
+ 8001184:	4b06      	ldr	r3, [pc, #24]	; (80011a0 <LL_RCC_SetAPB2Prescaler+0x24>)
+ 8001186:	68db      	ldr	r3, [r3, #12]
+ 8001188:	4a06      	ldr	r2, [pc, #24]	; (80011a4 <LL_RCC_SetAPB2Prescaler+0x28>)
+ 800118a:	4013      	ands	r3, r2
+ 800118c:	0019      	movs	r1, r3
+ 800118e:	4b04      	ldr	r3, [pc, #16]	; (80011a0 <LL_RCC_SetAPB2Prescaler+0x24>)
+ 8001190:	687a      	ldr	r2, [r7, #4]
+ 8001192:	430a      	orrs	r2, r1
+ 8001194:	60da      	str	r2, [r3, #12]
+}
+ 8001196:	46c0      	nop			; (mov r8, r8)
+ 8001198:	46bd      	mov	sp, r7
+ 800119a:	b002      	add	sp, #8
+ 800119c:	bd80      	pop	{r7, pc}
+ 800119e:	46c0      	nop			; (mov r8, r8)
+ 80011a0:	40021000 	.word	0x40021000
+ 80011a4:	ffffc7ff 	.word	0xffffc7ff
+
+080011a8 <LL_RCC_SetLPUARTClockSource>:
+  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
+  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource)
+{
+ 80011a8:	b580      	push	{r7, lr}
+ 80011aa:	b082      	sub	sp, #8
+ 80011ac:	af00      	add	r7, sp, #0
+ 80011ae:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource);
+ 80011b0:	4b06      	ldr	r3, [pc, #24]	; (80011cc <LL_RCC_SetLPUARTClockSource+0x24>)
+ 80011b2:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 80011b4:	4a06      	ldr	r2, [pc, #24]	; (80011d0 <LL_RCC_SetLPUARTClockSource+0x28>)
+ 80011b6:	4013      	ands	r3, r2
+ 80011b8:	0019      	movs	r1, r3
+ 80011ba:	4b04      	ldr	r3, [pc, #16]	; (80011cc <LL_RCC_SetLPUARTClockSource+0x24>)
+ 80011bc:	687a      	ldr	r2, [r7, #4]
+ 80011be:	430a      	orrs	r2, r1
+ 80011c0:	64da      	str	r2, [r3, #76]	; 0x4c
+}
+ 80011c2:	46c0      	nop			; (mov r8, r8)
+ 80011c4:	46bd      	mov	sp, r7
+ 80011c6:	b002      	add	sp, #8
+ 80011c8:	bd80      	pop	{r7, pc}
+ 80011ca:	46c0      	nop			; (mov r8, r8)
+ 80011cc:	40021000 	.word	0x40021000
+ 80011d0:	fffff3ff 	.word	0xfffff3ff
+
+080011d4 <LL_RCC_SetI2CClockSource>:
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource)
+{
+ 80011d4:	b580      	push	{r7, lr}
+ 80011d6:	b082      	sub	sp, #8
+ 80011d8:	af00      	add	r7, sp, #0
+ 80011da:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(RCC->CCIPR, ((I2CxSource >> 4U) & 0x000FF000U), ((I2CxSource << 4U) & 0x000FF000U));
+ 80011dc:	4b0a      	ldr	r3, [pc, #40]	; (8001208 <LL_RCC_SetI2CClockSource+0x34>)
+ 80011de:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 80011e0:	687a      	ldr	r2, [r7, #4]
+ 80011e2:	0911      	lsrs	r1, r2, #4
+ 80011e4:	22ff      	movs	r2, #255	; 0xff
+ 80011e6:	0312      	lsls	r2, r2, #12
+ 80011e8:	400a      	ands	r2, r1
+ 80011ea:	43d2      	mvns	r2, r2
+ 80011ec:	401a      	ands	r2, r3
+ 80011ee:	0011      	movs	r1, r2
+ 80011f0:	687b      	ldr	r3, [r7, #4]
+ 80011f2:	011a      	lsls	r2, r3, #4
+ 80011f4:	23ff      	movs	r3, #255	; 0xff
+ 80011f6:	031b      	lsls	r3, r3, #12
+ 80011f8:	401a      	ands	r2, r3
+ 80011fa:	4b03      	ldr	r3, [pc, #12]	; (8001208 <LL_RCC_SetI2CClockSource+0x34>)
+ 80011fc:	430a      	orrs	r2, r1
+ 80011fe:	64da      	str	r2, [r3, #76]	; 0x4c
+}
+ 8001200:	46c0      	nop			; (mov r8, r8)
+ 8001202:	46bd      	mov	sp, r7
+ 8001204:	b002      	add	sp, #8
+ 8001206:	bd80      	pop	{r7, pc}
+ 8001208:	40021000 	.word	0x40021000
+
+0800120c <LL_AHB1_GRP1_EnableClock>:
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
+{
+ 800120c:	b580      	push	{r7, lr}
+ 800120e:	b084      	sub	sp, #16
+ 8001210:	af00      	add	r7, sp, #0
+ 8001212:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tmpreg;
+  SET_BIT(RCC->AHBENR, Periphs);
+ 8001214:	4b07      	ldr	r3, [pc, #28]	; (8001234 <LL_AHB1_GRP1_EnableClock+0x28>)
+ 8001216:	6b19      	ldr	r1, [r3, #48]	; 0x30
+ 8001218:	4b06      	ldr	r3, [pc, #24]	; (8001234 <LL_AHB1_GRP1_EnableClock+0x28>)
+ 800121a:	687a      	ldr	r2, [r7, #4]
+ 800121c:	430a      	orrs	r2, r1
+ 800121e:	631a      	str	r2, [r3, #48]	; 0x30
+  /* Delay after an RCC peripheral clock enabling */
+  tmpreg = READ_BIT(RCC->AHBENR, Periphs);
+ 8001220:	4b04      	ldr	r3, [pc, #16]	; (8001234 <LL_AHB1_GRP1_EnableClock+0x28>)
+ 8001222:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001224:	687a      	ldr	r2, [r7, #4]
+ 8001226:	4013      	ands	r3, r2
+ 8001228:	60fb      	str	r3, [r7, #12]
+  (void)tmpreg;
+ 800122a:	68fb      	ldr	r3, [r7, #12]
+}
+ 800122c:	46c0      	nop			; (mov r8, r8)
+ 800122e:	46bd      	mov	sp, r7
+ 8001230:	b004      	add	sp, #16
+ 8001232:	bd80      	pop	{r7, pc}
+ 8001234:	40021000 	.word	0x40021000
+
+08001238 <LL_APB1_GRP1_EnableClock>:
+  *
+  *         (*) value not defined in all devices.
   * @retval None
 */
 __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
 {
+ 8001238:	b580      	push	{r7, lr}
+ 800123a:	b084      	sub	sp, #16
+ 800123c:	af00      	add	r7, sp, #0
+ 800123e:	6078      	str	r0, [r7, #4]
   __IO uint32_t tmpreg;
   SET_BIT(RCC->APB1ENR, Periphs);
- 800086c:	4b05      	ldr	r3, [pc, #20]	; (8000884 <LL_APB1_GRP1_EnableClock+0x18>)
-{
- 800086e:	b082      	sub	sp, #8
-  SET_BIT(RCC->APB1ENR, Periphs);
- 8000870:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 8000872:	4302      	orrs	r2, r0
- 8000874:	639a      	str	r2, [r3, #56]	; 0x38
+ 8001240:	4b07      	ldr	r3, [pc, #28]	; (8001260 <LL_APB1_GRP1_EnableClock+0x28>)
+ 8001242:	6b99      	ldr	r1, [r3, #56]	; 0x38
+ 8001244:	4b06      	ldr	r3, [pc, #24]	; (8001260 <LL_APB1_GRP1_EnableClock+0x28>)
+ 8001246:	687a      	ldr	r2, [r7, #4]
+ 8001248:	430a      	orrs	r2, r1
+ 800124a:	639a      	str	r2, [r3, #56]	; 0x38
   /* Delay after an RCC peripheral clock enabling */
   tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
- 8000876:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 8000878:	4018      	ands	r0, r3
- 800087a:	9001      	str	r0, [sp, #4]
+ 800124c:	4b04      	ldr	r3, [pc, #16]	; (8001260 <LL_APB1_GRP1_EnableClock+0x28>)
+ 800124e:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8001250:	687a      	ldr	r2, [r7, #4]
+ 8001252:	4013      	ands	r3, r2
+ 8001254:	60fb      	str	r3, [r7, #12]
   (void)tmpreg;
- 800087c:	9b01      	ldr	r3, [sp, #4]
+ 8001256:	68fb      	ldr	r3, [r7, #12]
 }
- 800087e:	b002      	add	sp, #8
- 8000880:	4770      	bx	lr
- 8000882:	46c0      	nop			; (mov r8, r8)
- 8000884:	40021000 	.word	0x40021000
+ 8001258:	46c0      	nop			; (mov r8, r8)
+ 800125a:	46bd      	mov	sp, r7
+ 800125c:	b004      	add	sp, #16
+ 800125e:	bd80      	pop	{r7, pc}
+ 8001260:	40021000 	.word	0x40021000
 
-08000888 <LL_IOP_GRP1_EnableClock>:
+08001264 <LL_APB2_GRP1_EnableClock>:
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
+{
+ 8001264:	b580      	push	{r7, lr}
+ 8001266:	b084      	sub	sp, #16
+ 8001268:	af00      	add	r7, sp, #0
+ 800126a:	6078      	str	r0, [r7, #4]
+  __IO uint32_t tmpreg;
+  SET_BIT(RCC->APB2ENR, Periphs);
+ 800126c:	4b07      	ldr	r3, [pc, #28]	; (800128c <LL_APB2_GRP1_EnableClock+0x28>)
+ 800126e:	6b59      	ldr	r1, [r3, #52]	; 0x34
+ 8001270:	4b06      	ldr	r3, [pc, #24]	; (800128c <LL_APB2_GRP1_EnableClock+0x28>)
+ 8001272:	687a      	ldr	r2, [r7, #4]
+ 8001274:	430a      	orrs	r2, r1
+ 8001276:	635a      	str	r2, [r3, #52]	; 0x34
+  /* Delay after an RCC peripheral clock enabling */
+  tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
+ 8001278:	4b04      	ldr	r3, [pc, #16]	; (800128c <LL_APB2_GRP1_EnableClock+0x28>)
+ 800127a:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 800127c:	687a      	ldr	r2, [r7, #4]
+ 800127e:	4013      	ands	r3, r2
+ 8001280:	60fb      	str	r3, [r7, #12]
+  (void)tmpreg;
+ 8001282:	68fb      	ldr	r3, [r7, #12]
+}
+ 8001284:	46c0      	nop			; (mov r8, r8)
+ 8001286:	46bd      	mov	sp, r7
+ 8001288:	b004      	add	sp, #16
+ 800128a:	bd80      	pop	{r7, pc}
+ 800128c:	40021000 	.word	0x40021000
+
+08001290 <LL_IOP_GRP1_EnableClock>:
+  *
+  *         (*) value not defined in all devices.
   * @retval None
 */
 __STATIC_INLINE void LL_IOP_GRP1_EnableClock(uint32_t Periphs)
 {
+ 8001290:	b580      	push	{r7, lr}
+ 8001292:	b084      	sub	sp, #16
+ 8001294:	af00      	add	r7, sp, #0
+ 8001296:	6078      	str	r0, [r7, #4]
   __IO uint32_t tmpreg;
   SET_BIT(RCC->IOPENR, Periphs);
- 8000888:	4b05      	ldr	r3, [pc, #20]	; (80008a0 <LL_IOP_GRP1_EnableClock+0x18>)
-{
- 800088a:	b082      	sub	sp, #8
-  SET_BIT(RCC->IOPENR, Periphs);
- 800088c:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 800088e:	4302      	orrs	r2, r0
- 8000890:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8001298:	4b07      	ldr	r3, [pc, #28]	; (80012b8 <LL_IOP_GRP1_EnableClock+0x28>)
+ 800129a:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
+ 800129c:	4b06      	ldr	r3, [pc, #24]	; (80012b8 <LL_IOP_GRP1_EnableClock+0x28>)
+ 800129e:	687a      	ldr	r2, [r7, #4]
+ 80012a0:	430a      	orrs	r2, r1
+ 80012a2:	62da      	str	r2, [r3, #44]	; 0x2c
   /* Delay after an RCC peripheral clock enabling */
   tmpreg = READ_BIT(RCC->IOPENR, Periphs);
- 8000892:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8000894:	4018      	ands	r0, r3
- 8000896:	9001      	str	r0, [sp, #4]
+ 80012a4:	4b04      	ldr	r3, [pc, #16]	; (80012b8 <LL_IOP_GRP1_EnableClock+0x28>)
+ 80012a6:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80012a8:	687a      	ldr	r2, [r7, #4]
+ 80012aa:	4013      	ands	r3, r2
+ 80012ac:	60fb      	str	r3, [r7, #12]
   (void)tmpreg;
- 8000898:	9b01      	ldr	r3, [sp, #4]
+ 80012ae:	68fb      	ldr	r3, [r7, #12]
 }
- 800089a:	b002      	add	sp, #8
- 800089c:	4770      	bx	lr
- 800089e:	46c0      	nop			; (mov r8, r8)
- 80008a0:	40021000 	.word	0x40021000
+ 80012b0:	46c0      	nop			; (mov r8, r8)
+ 80012b2:	46bd      	mov	sp, r7
+ 80012b4:	b004      	add	sp, #16
+ 80012b6:	bd80      	pop	{r7, pc}
+ 80012b8:	40021000 	.word	0x40021000
 
-080008a4 <SystemClock_Config>:
+080012bc <LL_FLASH_SetLatency>:
+  *         @arg @ref LL_FLASH_LATENCY_0
   *         @arg @ref LL_FLASH_LATENCY_1
   * @retval None
   */
 __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
 {
+ 80012bc:	b580      	push	{r7, lr}
+ 80012be:	b082      	sub	sp, #8
+ 80012c0:	af00      	add	r7, sp, #0
+ 80012c2:	6078      	str	r0, [r7, #4]
   MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
- 80008a4:	2201      	movs	r2, #1
- 80008a6:	4b24      	ldr	r3, [pc, #144]	; (8000938 <SystemClock_Config+0x94>)
+ 80012c4:	4b06      	ldr	r3, [pc, #24]	; (80012e0 <LL_FLASH_SetLatency+0x24>)
+ 80012c6:	681b      	ldr	r3, [r3, #0]
+ 80012c8:	2201      	movs	r2, #1
+ 80012ca:	4393      	bics	r3, r2
+ 80012cc:	0019      	movs	r1, r3
+ 80012ce:	4b04      	ldr	r3, [pc, #16]	; (80012e0 <LL_FLASH_SetLatency+0x24>)
+ 80012d0:	687a      	ldr	r2, [r7, #4]
+ 80012d2:	430a      	orrs	r2, r1
+ 80012d4:	601a      	str	r2, [r3, #0]
+}
+ 80012d6:	46c0      	nop			; (mov r8, r8)
+ 80012d8:	46bd      	mov	sp, r7
+ 80012da:	b002      	add	sp, #8
+ 80012dc:	bd80      	pop	{r7, pc}
+ 80012de:	46c0      	nop			; (mov r8, r8)
+ 80012e0:	40022000 	.word	0x40022000
+
+080012e4 <LL_FLASH_GetLatency>:
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_FLASH_LATENCY_0
+  *         @arg @ref LL_FLASH_LATENCY_1
+  */
+__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
+{
+ 80012e4:	b580      	push	{r7, lr}
+ 80012e6:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
+ 80012e8:	4b03      	ldr	r3, [pc, #12]	; (80012f8 <LL_FLASH_GetLatency+0x14>)
+ 80012ea:	681b      	ldr	r3, [r3, #0]
+ 80012ec:	2201      	movs	r2, #1
+ 80012ee:	4013      	ands	r3, r2
+}
+ 80012f0:	0018      	movs	r0, r3
+ 80012f2:	46bd      	mov	sp, r7
+ 80012f4:	bd80      	pop	{r7, pc}
+ 80012f6:	46c0      	nop			; (mov r8, r8)
+ 80012f8:	40022000 	.word	0x40022000
+
+080012fc <LL_PWR_SetRegulVoltageScaling>:
+  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
+  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
+{
+ 80012fc:	b580      	push	{r7, lr}
+ 80012fe:	b082      	sub	sp, #8
+ 8001300:	af00      	add	r7, sp, #0
+ 8001302:	6078      	str	r0, [r7, #4]
+  MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
+ 8001304:	4b06      	ldr	r3, [pc, #24]	; (8001320 <LL_PWR_SetRegulVoltageScaling+0x24>)
+ 8001306:	681b      	ldr	r3, [r3, #0]
+ 8001308:	4a06      	ldr	r2, [pc, #24]	; (8001324 <LL_PWR_SetRegulVoltageScaling+0x28>)
+ 800130a:	4013      	ands	r3, r2
+ 800130c:	0019      	movs	r1, r3
+ 800130e:	4b04      	ldr	r3, [pc, #16]	; (8001320 <LL_PWR_SetRegulVoltageScaling+0x24>)
+ 8001310:	687a      	ldr	r2, [r7, #4]
+ 8001312:	430a      	orrs	r2, r1
+ 8001314:	601a      	str	r2, [r3, #0]
+}
+ 8001316:	46c0      	nop			; (mov r8, r8)
+ 8001318:	46bd      	mov	sp, r7
+ 800131a:	b002      	add	sp, #8
+ 800131c:	bd80      	pop	{r7, pc}
+ 800131e:	46c0      	nop			; (mov r8, r8)
+ 8001320:	40007000 	.word	0x40007000
+ 8001324:	ffffe7ff 	.word	0xffffe7ff
+
+08001328 <LL_GPIO_SetOutputPin>:
+{
+ 8001328:	b580      	push	{r7, lr}
+ 800132a:	b082      	sub	sp, #8
+ 800132c:	af00      	add	r7, sp, #0
+ 800132e:	6078      	str	r0, [r7, #4]
+ 8001330:	6039      	str	r1, [r7, #0]
+  WRITE_REG(GPIOx->BSRR, PinMask);
+ 8001332:	687b      	ldr	r3, [r7, #4]
+ 8001334:	683a      	ldr	r2, [r7, #0]
+ 8001336:	619a      	str	r2, [r3, #24]
+}
+ 8001338:	46c0      	nop			; (mov r8, r8)
+ 800133a:	46bd      	mov	sp, r7
+ 800133c:	b002      	add	sp, #8
+ 800133e:	bd80      	pop	{r7, pc}
+
+08001340 <main>:
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+ 8001340:	b580      	push	{r7, lr}
+ 8001342:	b08a      	sub	sp, #40	; 0x28
+ 8001344:	af00      	add	r7, sp, #0
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+
+  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
+ 8001346:	2001      	movs	r0, #1
+ 8001348:	f7ff ff8c 	bl	8001264 <LL_APB2_GRP1_EnableClock>
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
+ 800134c:	2380      	movs	r3, #128	; 0x80
+ 800134e:	055b      	lsls	r3, r3, #21
+ 8001350:	0018      	movs	r0, r3
+ 8001352:	f7ff ff71 	bl	8001238 <LL_APB1_GRP1_EnableClock>
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+ 8001356:	f000 f851 	bl	80013fc <SystemClock_Config>
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+ 800135a:	f000 f9fc 	bl	8001756 <MX_GPIO_Init>
+  MX_DMA_Init();
+ 800135e:	f000 f9eb 	bl	8001738 <MX_DMA_Init>
+  MX_I2C1_Init();
+ 8001362:	f000 f891 	bl	8001488 <MX_I2C1_Init>
+  MX_LPUART1_UART_Init();
+ 8001366:	f000 f917 	bl	8001598 <MX_LPUART1_UART_Init>
+  /* USER CODE BEGIN 2 */
+  LL_I2C_Enable(I2C1);
+ 800136a:	4b22      	ldr	r3, [pc, #136]	; (80013f4 <main+0xb4>)
+ 800136c:	0018      	movs	r0, r3
+ 800136e:	f7ff fdb0 	bl	8000ed2 <LL_I2C_Enable>
+  LL_LPUART_Enable(LPUART1);
+ 8001372:	4b21      	ldr	r3, [pc, #132]	; (80013f8 <main+0xb8>)
+ 8001374:	0018      	movs	r0, r3
+ 8001376:	f7ff fe10 	bl	8000f9a <LL_LPUART_Enable>
+  /* LED PWM context */
+  led_context_t led_context;
+  led_context.red_led_port = LED_R_GPIO_Port;
+ 800137a:	2110      	movs	r1, #16
+ 800137c:	187b      	adds	r3, r7, r1
+ 800137e:	22a0      	movs	r2, #160	; 0xa0
+ 8001380:	05d2      	lsls	r2, r2, #23
+ 8001382:	601a      	str	r2, [r3, #0]
+  led_context.green_led_port = LED_G_GPIO_Port;
+ 8001384:	187b      	adds	r3, r7, r1
+ 8001386:	22a0      	movs	r2, #160	; 0xa0
+ 8001388:	05d2      	lsls	r2, r2, #23
+ 800138a:	609a      	str	r2, [r3, #8]
+  led_context.blue_led_port = LED_B_GPIO_Port;
+ 800138c:	187b      	adds	r3, r7, r1
+ 800138e:	22a0      	movs	r2, #160	; 0xa0
+ 8001390:	05d2      	lsls	r2, r2, #23
+ 8001392:	611a      	str	r2, [r3, #16]
+  led_context.red_led_pin = LED_R_Pin;
+ 8001394:	187b      	adds	r3, r7, r1
+ 8001396:	2280      	movs	r2, #128	; 0x80
+ 8001398:	605a      	str	r2, [r3, #4]
+  led_context.green_led_pin = LED_G_Pin;
+ 800139a:	187b      	adds	r3, r7, r1
+ 800139c:	2240      	movs	r2, #64	; 0x40
+ 800139e:	60da      	str	r2, [r3, #12]
+  led_context.blue_led_pin = LED_B_Pin;
+ 80013a0:	187b      	adds	r3, r7, r1
+ 80013a2:	2220      	movs	r2, #32
+ 80013a4:	615a      	str	r2, [r3, #20]
+  led_init(&led_context, 50, 1000);
+ 80013a6:	23fa      	movs	r3, #250	; 0xfa
+ 80013a8:	009a      	lsls	r2, r3, #2
+ 80013aa:	187b      	adds	r3, r7, r1
+ 80013ac:	2132      	movs	r1, #50	; 0x32
+ 80013ae:	0018      	movs	r0, r3
+ 80013b0:	f7ff fb9c 	bl	8000aec <led_init>
+  led_set_color(0, 20, 0);
+ 80013b4:	2200      	movs	r2, #0
+ 80013b6:	2114      	movs	r1, #20
+ 80013b8:	2000      	movs	r0, #0
+ 80013ba:	f7ff fab7 	bl	800092c <led_set_color>
+  /* I2C context init (for SHT4x and SCD4x) */
+  i2c_context_t i2c_context;
+  i2c_context.i2c = I2C1;
+ 80013be:	4b0d      	ldr	r3, [pc, #52]	; (80013f4 <main+0xb4>)
+ 80013c0:	60fb      	str	r3, [r7, #12]
+  i2c_init(&i2c_context);
+ 80013c2:	230c      	movs	r3, #12
+ 80013c4:	18fb      	adds	r3, r7, r3
+ 80013c6:	0018      	movs	r0, r3
+ 80013c8:	f7ff f9bc 	bl	8000744 <i2c_init>
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  //scd4x_perform_factory_reset();
+  //LL_mDelay(2000);
+  scd4x_start_periodic_measurement();
+ 80013cc:	f000 fa52 	bl	8001874 <scd4x_start_periodic_measurement>
+  LL_mDelay(2000);
+ 80013d0:	23fa      	movs	r3, #250	; 0xfa
+ 80013d2:	00db      	lsls	r3, r3, #3
+ 80013d4:	0018      	movs	r0, r3
+ 80013d6:	f000 ff8b 	bl	80022f0 <LL_mDelay>
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+	  int co2, T, RH;
+	  scd4x_read_measurement(&co2, &T, &RH);
+ 80013da:	003a      	movs	r2, r7
+ 80013dc:	1d39      	adds	r1, r7, #4
+ 80013de:	2308      	movs	r3, #8
+ 80013e0:	18fb      	adds	r3, r7, r3
+ 80013e2:	0018      	movs	r0, r3
+ 80013e4:	f000 fa52 	bl	800188c <scd4x_read_measurement>
+
+	  LL_mDelay(1000);
+ 80013e8:	23fa      	movs	r3, #250	; 0xfa
+ 80013ea:	009b      	lsls	r3, r3, #2
+ 80013ec:	0018      	movs	r0, r3
+ 80013ee:	f000 ff7f 	bl	80022f0 <LL_mDelay>
+  {
+ 80013f2:	e7f2      	b.n	80013da <main+0x9a>
+ 80013f4:	40005400 	.word	0x40005400
+ 80013f8:	40004800 	.word	0x40004800
+
+080013fc <SystemClock_Config>:
 /**
   * @brief System Clock Configuration
   * @retval None
   */
 void SystemClock_Config(void)
 {
- 80008a8:	b510      	push	{r4, lr}
- 80008aa:	6819      	ldr	r1, [r3, #0]
- 80008ac:	4391      	bics	r1, r2
- 80008ae:	6019      	str	r1, [r3, #0]
-  *         @arg @ref LL_FLASH_LATENCY_0
-  *         @arg @ref LL_FLASH_LATENCY_1
-  */
-__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
-{
-  return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
- 80008b0:	6819      	ldr	r1, [r3, #0]
+ 80013fc:	b580      	push	{r7, lr}
+ 80013fe:	af00      	add	r7, sp, #0
   LL_FLASH_SetLatency(LL_FLASH_LATENCY_0);
+ 8001400:	2000      	movs	r0, #0
+ 8001402:	f7ff ff5b 	bl	80012bc <LL_FLASH_SetLatency>
   while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_0)
- 80008b2:	4211      	tst	r1, r2
- 80008b4:	d1fc      	bne.n	80008b0 <SystemClock_Config+0xc>
-  *         @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
-  * @retval None
-  */
-__STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
-{
-  MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
- 80008b6:	4921      	ldr	r1, [pc, #132]	; (800093c <SystemClock_Config+0x98>)
- 80008b8:	4a21      	ldr	r2, [pc, #132]	; (8000940 <SystemClock_Config+0x9c>)
- 80008ba:	680b      	ldr	r3, [r1, #0]
-  * @rmtoll CR           MSION         LL_RCC_MSI_Enable
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_MSI_Enable(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_MSION);
- 80008bc:	4c21      	ldr	r4, [pc, #132]	; (8000944 <SystemClock_Config+0xa0>)
- 80008be:	401a      	ands	r2, r3
- 80008c0:	2380      	movs	r3, #128	; 0x80
- 80008c2:	011b      	lsls	r3, r3, #4
- 80008c4:	4313      	orrs	r3, r2
- 80008c6:	600b      	str	r3, [r1, #0]
- 80008c8:	2380      	movs	r3, #128	; 0x80
- 80008ca:	6822      	ldr	r2, [r4, #0]
- 80008cc:	005b      	lsls	r3, r3, #1
- 80008ce:	4313      	orrs	r3, r2
- 80008d0:	6023      	str	r3, [r4, #0]
-  * @rmtoll CR           MSIRDY        LL_RCC_MSI_IsReady
-  * @retval State of bit (1 or 0).
-  */
-__STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void)
-{
-  return ((READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RCC_CR_MSIRDY) ? 1UL : 0UL);
- 80008d2:	2380      	movs	r3, #128	; 0x80
- 80008d4:	009b      	lsls	r3, r3, #2
- 80008d6:	6822      	ldr	r2, [r4, #0]
- 80008d8:	421a      	tst	r2, r3
- 80008da:	d0fc      	beq.n	80008d6 <SystemClock_Config+0x32>
-  *         @arg @ref LL_RCC_MSIRANGE_6
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_MSI_SetRange(uint32_t Range)
-{
-  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSIRANGE, Range);
- 80008dc:	6863      	ldr	r3, [r4, #4]
- 80008de:	4a1a      	ldr	r2, [pc, #104]	; (8000948 <SystemClock_Config+0xa4>)
- 80008e0:	401a      	ands	r2, r3
- 80008e2:	23a0      	movs	r3, #160	; 0xa0
- 80008e4:	021b      	lsls	r3, r3, #8
- 80008e6:	4313      	orrs	r3, r2
-  *         @arg @ref LL_RCC_SYSCLK_DIV_512
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
- 80008e8:	22f0      	movs	r2, #240	; 0xf0
-  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSIRANGE, Range);
- 80008ea:	6063      	str	r3, [r4, #4]
-  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, Value << RCC_ICSCR_MSITRIM_Pos);
- 80008ec:	6863      	ldr	r3, [r4, #4]
- 80008ee:	021b      	lsls	r3, r3, #8
- 80008f0:	0a1b      	lsrs	r3, r3, #8
- 80008f2:	6063      	str	r3, [r4, #4]
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
- 80008f4:	68e3      	ldr	r3, [r4, #12]
- 80008f6:	4393      	bics	r3, r2
- 80008f8:	60e3      	str	r3, [r4, #12]
-  *         @arg @ref LL_RCC_APB1_DIV_16
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
- 80008fa:	68e3      	ldr	r3, [r4, #12]
- 80008fc:	4a13      	ldr	r2, [pc, #76]	; (800094c <SystemClock_Config+0xa8>)
- 80008fe:	4013      	ands	r3, r2
- 8000900:	60e3      	str	r3, [r4, #12]
-  *         @arg @ref LL_RCC_APB2_DIV_16
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
-{
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
- 8000902:	68e3      	ldr	r3, [r4, #12]
- 8000904:	4a12      	ldr	r2, [pc, #72]	; (8000950 <SystemClock_Config+0xac>)
- 8000906:	4013      	ands	r3, r2
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
- 8000908:	2203      	movs	r2, #3
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
- 800090a:	60e3      	str	r3, [r4, #12]
-  MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
- 800090c:	68e3      	ldr	r3, [r4, #12]
- 800090e:	4393      	bics	r3, r2
- 8000910:	60e3      	str	r3, [r4, #12]
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
- 8000912:	230c      	movs	r3, #12
- 8000914:	68e2      	ldr	r2, [r4, #12]
+ 8001406:	46c0      	nop			; (mov r8, r8)
+ 8001408:	f7ff ff6c 	bl	80012e4 <LL_FLASH_GetLatency>
+ 800140c:	1e03      	subs	r3, r0, #0
+ 800140e:	d1fb      	bne.n	8001408 <SystemClock_Config+0xc>
+  {
+  }
+  LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
+ 8001410:	2380      	movs	r3, #128	; 0x80
+ 8001412:	011b      	lsls	r3, r3, #4
+ 8001414:	0018      	movs	r0, r3
+ 8001416:	f7ff ff71 	bl	80012fc <LL_PWR_SetRegulVoltageScaling>
+  LL_RCC_MSI_Enable();
+ 800141a:	f7ff fe19 	bl	8001050 <LL_RCC_MSI_Enable>
+
+   /* Wait till MSI is ready */
+  while(LL_RCC_MSI_IsReady() != 1)
+ 800141e:	46c0      	nop			; (mov r8, r8)
+ 8001420:	f7ff fe24 	bl	800106c <LL_RCC_MSI_IsReady>
+ 8001424:	0003      	movs	r3, r0
+ 8001426:	2b01      	cmp	r3, #1
+ 8001428:	d1fa      	bne.n	8001420 <SystemClock_Config+0x24>
+  {
+
+  }
+  LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_5);
+ 800142a:	23a0      	movs	r3, #160	; 0xa0
+ 800142c:	021b      	lsls	r3, r3, #8
+ 800142e:	0018      	movs	r0, r3
+ 8001430:	f7ff fe30 	bl	8001094 <LL_RCC_MSI_SetRange>
+  LL_RCC_MSI_SetCalibTrimming(0);
+ 8001434:	2000      	movs	r0, #0
+ 8001436:	f7ff fe43 	bl	80010c0 <LL_RCC_MSI_SetCalibTrimming>
+  LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+ 800143a:	2000      	movs	r0, #0
+ 800143c:	f7ff fe74 	bl	8001128 <LL_RCC_SetAHBPrescaler>
   LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+ 8001440:	2000      	movs	r0, #0
+ 8001442:	f7ff fe85 	bl	8001150 <LL_RCC_SetAPB1Prescaler>
   LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
+ 8001446:	2000      	movs	r0, #0
+ 8001448:	f7ff fe98 	bl	800117c <LL_RCC_SetAPB2Prescaler>
   LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_MSI);
+ 800144c:	2000      	movs	r0, #0
+ 800144e:	f7ff fe4b 	bl	80010e8 <LL_RCC_SetSysClkSource>
 
    /* Wait till System clock is ready */
   while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_MSI)
- 8000916:	421a      	tst	r2, r3
- 8000918:	d1fc      	bne.n	8000914 <SystemClock_Config+0x70>
+ 8001452:	46c0      	nop			; (mov r8, r8)
+ 8001454:	f7ff fe5c 	bl	8001110 <LL_RCC_GetSysClkSource>
+ 8001458:	1e03      	subs	r3, r0, #0
+ 800145a:	d1fb      	bne.n	8001454 <SystemClock_Config+0x58>
   {
 
   }
 
   LL_Init1msTick(2097000);
- 800091a:	480e      	ldr	r0, [pc, #56]	; (8000954 <SystemClock_Config+0xb0>)
- 800091c:	f000 fbce 	bl	80010bc <LL_Init1msTick>
+ 800145c:	4b09      	ldr	r3, [pc, #36]	; (8001484 <SystemClock_Config+0x88>)
+ 800145e:	0018      	movs	r0, r3
+ 8001460:	f000 ff36 	bl	80022d0 <LL_Init1msTick>
 
   LL_SetSystemCoreClock(2097000);
- 8000920:	480c      	ldr	r0, [pc, #48]	; (8000954 <SystemClock_Config+0xb0>)
- 8000922:	f000 fbf1 	bl	8001108 <LL_SetSystemCoreClock>
-  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource)
-{
-  MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource);
- 8000926:	6ce3      	ldr	r3, [r4, #76]	; 0x4c
- 8000928:	4a0b      	ldr	r2, [pc, #44]	; (8000958 <SystemClock_Config+0xb4>)
- 800092a:	4013      	ands	r3, r2
- 800092c:	64e3      	str	r3, [r4, #76]	; 0x4c
-  *         (*) value not defined in all devices.
-  * @retval None
-  */
-__STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource)
-{
-  MODIFY_REG(RCC->CCIPR, ((I2CxSource >> 4U) & 0x000FF000U), ((I2CxSource << 4U) & 0x000FF000U));
- 800092e:	6ce3      	ldr	r3, [r4, #76]	; 0x4c
- 8000930:	4a0a      	ldr	r2, [pc, #40]	; (800095c <SystemClock_Config+0xb8>)
- 8000932:	4013      	ands	r3, r2
- 8000934:	64e3      	str	r3, [r4, #76]	; 0x4c
+ 8001464:	4b07      	ldr	r3, [pc, #28]	; (8001484 <SystemClock_Config+0x88>)
+ 8001466:	0018      	movs	r0, r3
+ 8001468:	f000 ff64 	bl	8002334 <LL_SetSystemCoreClock>
   LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1);
+ 800146c:	2000      	movs	r0, #0
+ 800146e:	f7ff fe9b 	bl	80011a8 <LL_RCC_SetLPUARTClockSource>
   LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1);
+ 8001472:	23c0      	movs	r3, #192	; 0xc0
+ 8001474:	029b      	lsls	r3, r3, #10
+ 8001476:	0018      	movs	r0, r3
+ 8001478:	f7ff feac 	bl	80011d4 <LL_RCC_SetI2CClockSource>
 }
- 8000936:	bd10      	pop	{r4, pc}
- 8000938:	40022000 	.word	0x40022000
- 800093c:	40007000 	.word	0x40007000
- 8000940:	ffffe7ff 	.word	0xffffe7ff
- 8000944:	40021000 	.word	0x40021000
- 8000948:	ffff1fff 	.word	0xffff1fff
- 800094c:	fffff8ff 	.word	0xfffff8ff
- 8000950:	ffffc7ff 	.word	0xffffc7ff
- 8000954:	001fff68 	.word	0x001fff68
- 8000958:	fffff3ff 	.word	0xfffff3ff
- 800095c:	ffffcfff 	.word	0xffffcfff
+ 800147c:	46c0      	nop			; (mov r8, r8)
+ 800147e:	46bd      	mov	sp, r7
+ 8001480:	bd80      	pop	{r7, pc}
+ 8001482:	46c0      	nop			; (mov r8, r8)
+ 8001484:	001fff68 	.word	0x001fff68
 
-08000960 <main>:
+08001488 <MX_I2C1_Init>:
+  * @brief I2C1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C1_Init(void)
 {
- 8000960:	b5f0      	push	{r4, r5, r6, r7, lr}
-  SET_BIT(RCC->APB2ENR, Periphs);
- 8000962:	2501      	movs	r5, #1
-  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
- 8000964:	2080      	movs	r0, #128	; 0x80
- 8000966:	4eaf      	ldr	r6, [pc, #700]	; (8000c24 <main+0x2c4>)
+ 8001488:	b590      	push	{r4, r7, lr}
+ 800148a:	b08f      	sub	sp, #60	; 0x3c
+ 800148c:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN I2C1_Init 0 */
+
+  /* USER CODE END I2C1_Init 0 */
+
+  LL_I2C_InitTypeDef I2C_InitStruct = {0};
+ 800148e:	241c      	movs	r4, #28
+ 8001490:	193b      	adds	r3, r7, r4
+ 8001492:	0018      	movs	r0, r3
+ 8001494:	231c      	movs	r3, #28
+ 8001496:	001a      	movs	r2, r3
+ 8001498:	2100      	movs	r1, #0
+ 800149a:	f000 ff7d 	bl	8002398 <memset>
+
+  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 800149e:	1d3b      	adds	r3, r7, #4
+ 80014a0:	0018      	movs	r0, r3
+ 80014a2:	2318      	movs	r3, #24
+ 80014a4:	001a      	movs	r2, r3
+ 80014a6:	2100      	movs	r1, #0
+ 80014a8:	f000 ff76 	bl	8002398 <memset>
+
+  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
+ 80014ac:	2001      	movs	r0, #1
+ 80014ae:	f7ff feef 	bl	8001290 <LL_IOP_GRP1_EnableClock>
+  /**I2C1 GPIO Configuration
+  PA9   ------> I2C1_SCL
+  PA10   ------> I2C1_SDA
+  */
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
+ 80014b2:	1d3b      	adds	r3, r7, #4
+ 80014b4:	2280      	movs	r2, #128	; 0x80
+ 80014b6:	0092      	lsls	r2, r2, #2
+ 80014b8:	601a      	str	r2, [r3, #0]
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 80014ba:	1d3b      	adds	r3, r7, #4
+ 80014bc:	2202      	movs	r2, #2
+ 80014be:	605a      	str	r2, [r3, #4]
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 80014c0:	1d3b      	adds	r3, r7, #4
+ 80014c2:	2203      	movs	r2, #3
+ 80014c4:	609a      	str	r2, [r3, #8]
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
+ 80014c6:	1d3b      	adds	r3, r7, #4
+ 80014c8:	2201      	movs	r2, #1
+ 80014ca:	60da      	str	r2, [r3, #12]
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
+ 80014cc:	1d3b      	adds	r3, r7, #4
+ 80014ce:	2201      	movs	r2, #1
+ 80014d0:	611a      	str	r2, [r3, #16]
+  GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
+ 80014d2:	1d3b      	adds	r3, r7, #4
+ 80014d4:	2201      	movs	r2, #1
+ 80014d6:	615a      	str	r2, [r3, #20]
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 80014d8:	1d3a      	adds	r2, r7, #4
+ 80014da:	23a0      	movs	r3, #160	; 0xa0
+ 80014dc:	05db      	lsls	r3, r3, #23
+ 80014de:	0011      	movs	r1, r2
+ 80014e0:	0018      	movs	r0, r3
+ 80014e2:	f000 fb57 	bl	8001b94 <LL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
+ 80014e6:	1d3b      	adds	r3, r7, #4
+ 80014e8:	2280      	movs	r2, #128	; 0x80
+ 80014ea:	00d2      	lsls	r2, r2, #3
+ 80014ec:	601a      	str	r2, [r3, #0]
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 80014ee:	1d3b      	adds	r3, r7, #4
+ 80014f0:	2202      	movs	r2, #2
+ 80014f2:	605a      	str	r2, [r3, #4]
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 80014f4:	1d3b      	adds	r3, r7, #4
+ 80014f6:	2203      	movs	r2, #3
+ 80014f8:	609a      	str	r2, [r3, #8]
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
+ 80014fa:	1d3b      	adds	r3, r7, #4
+ 80014fc:	2201      	movs	r2, #1
+ 80014fe:	60da      	str	r2, [r3, #12]
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
+ 8001500:	1d3b      	adds	r3, r7, #4
+ 8001502:	2201      	movs	r2, #1
+ 8001504:	611a      	str	r2, [r3, #16]
+  GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
+ 8001506:	1d3b      	adds	r3, r7, #4
+ 8001508:	2201      	movs	r2, #1
+ 800150a:	615a      	str	r2, [r3, #20]
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 800150c:	1d3a      	adds	r2, r7, #4
+ 800150e:	23a0      	movs	r3, #160	; 0xa0
+ 8001510:	05db      	lsls	r3, r3, #23
+ 8001512:	0011      	movs	r1, r2
+ 8001514:	0018      	movs	r0, r3
+ 8001516:	f000 fb3d 	bl	8001b94 <LL_GPIO_Init>
+
+  /* Peripheral clock enable */
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
+ 800151a:	2380      	movs	r3, #128	; 0x80
+ 800151c:	039b      	lsls	r3, r3, #14
+ 800151e:	0018      	movs	r0, r3
+ 8001520:	f7ff fe8a 	bl	8001238 <LL_APB1_GRP1_EnableClock>
+  /* USER CODE BEGIN I2C1_Init 1 */
+
+  /* USER CODE END I2C1_Init 1 */
+  /** I2C Initialization
+  */
+  LL_I2C_EnableAutoEndMode(I2C1);
+ 8001524:	4b1b      	ldr	r3, [pc, #108]	; (8001594 <MX_I2C1_Init+0x10c>)
+ 8001526:	0018      	movs	r0, r3
+ 8001528:	f7ff fd28 	bl	8000f7c <LL_I2C_EnableAutoEndMode>
+  LL_I2C_DisableOwnAddress2(I2C1);
+ 800152c:	4b19      	ldr	r3, [pc, #100]	; (8001594 <MX_I2C1_Init+0x10c>)
+ 800152e:	0018      	movs	r0, r3
+ 8001530:	f7ff fd14 	bl	8000f5c <LL_I2C_DisableOwnAddress2>
+  LL_I2C_DisableGeneralCall(I2C1);
+ 8001534:	4b17      	ldr	r3, [pc, #92]	; (8001594 <MX_I2C1_Init+0x10c>)
+ 8001536:	0018      	movs	r0, r3
+ 8001538:	f7ff fcea 	bl	8000f10 <LL_I2C_DisableGeneralCall>
+  LL_I2C_EnableClockStretching(I2C1);
+ 800153c:	4b15      	ldr	r3, [pc, #84]	; (8001594 <MX_I2C1_Init+0x10c>)
+ 800153e:	0018      	movs	r0, r3
+ 8001540:	f7ff fcd6 	bl	8000ef0 <LL_I2C_EnableClockStretching>
+  I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C;
+ 8001544:	193b      	adds	r3, r7, r4
+ 8001546:	2200      	movs	r2, #0
+ 8001548:	601a      	str	r2, [r3, #0]
+  I2C_InitStruct.Timing = 0x00000708;
+ 800154a:	193b      	adds	r3, r7, r4
+ 800154c:	22e1      	movs	r2, #225	; 0xe1
+ 800154e:	00d2      	lsls	r2, r2, #3
+ 8001550:	605a      	str	r2, [r3, #4]
+  I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
+ 8001552:	0021      	movs	r1, r4
+ 8001554:	187b      	adds	r3, r7, r1
+ 8001556:	2200      	movs	r2, #0
+ 8001558:	609a      	str	r2, [r3, #8]
+  I2C_InitStruct.DigitalFilter = 0;
+ 800155a:	187b      	adds	r3, r7, r1
+ 800155c:	2200      	movs	r2, #0
+ 800155e:	60da      	str	r2, [r3, #12]
+  I2C_InitStruct.OwnAddress1 = 0;
+ 8001560:	187b      	adds	r3, r7, r1
+ 8001562:	2200      	movs	r2, #0
+ 8001564:	611a      	str	r2, [r3, #16]
+  I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK;
+ 8001566:	187b      	adds	r3, r7, r1
+ 8001568:	2200      	movs	r2, #0
+ 800156a:	615a      	str	r2, [r3, #20]
+  I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
+ 800156c:	187b      	adds	r3, r7, r1
+ 800156e:	2200      	movs	r2, #0
+ 8001570:	619a      	str	r2, [r3, #24]
+  LL_I2C_Init(I2C1, &I2C_InitStruct);
+ 8001572:	187b      	adds	r3, r7, r1
+ 8001574:	4a07      	ldr	r2, [pc, #28]	; (8001594 <MX_I2C1_Init+0x10c>)
+ 8001576:	0019      	movs	r1, r3
+ 8001578:	0010      	movs	r0, r2
+ 800157a:	f000 fc07 	bl	8001d8c <LL_I2C_Init>
+  LL_I2C_SetOwnAddress2(I2C1, 0, LL_I2C_OWNADDRESS2_NOMASK);
+ 800157e:	4b05      	ldr	r3, [pc, #20]	; (8001594 <MX_I2C1_Init+0x10c>)
+ 8001580:	2200      	movs	r2, #0
+ 8001582:	2100      	movs	r1, #0
+ 8001584:	0018      	movs	r0, r3
+ 8001586:	f7ff fcd3 	bl	8000f30 <LL_I2C_SetOwnAddress2>
+  /* USER CODE BEGIN I2C1_Init 2 */
+  /* USER CODE END I2C1_Init 2 */
+
+}
+ 800158a:	46c0      	nop			; (mov r8, r8)
+ 800158c:	46bd      	mov	sp, r7
+ 800158e:	b00f      	add	sp, #60	; 0x3c
+ 8001590:	bd90      	pop	{r4, r7, pc}
+ 8001592:	46c0      	nop			; (mov r8, r8)
+ 8001594:	40005400 	.word	0x40005400
+
+08001598 <MX_LPUART1_UART_Init>:
+  * @brief LPUART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LPUART1_UART_Init(void)
 {
- 8000968:	b093      	sub	sp, #76	; 0x4c
- 800096a:	6b73      	ldr	r3, [r6, #52]	; 0x34
-  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
- 800096c:	0540      	lsls	r0, r0, #21
- 800096e:	432b      	orrs	r3, r5
- 8000970:	6373      	str	r3, [r6, #52]	; 0x34
-  tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
- 8000972:	6b73      	ldr	r3, [r6, #52]	; 0x34
-  WRITE_REG(GPIOx->BSRR, PinMask);
- 8000974:	2780      	movs	r7, #128	; 0x80
- 8000976:	402b      	ands	r3, r5
- 8000978:	9303      	str	r3, [sp, #12]
-  (void)tmpreg;
- 800097a:	9b03      	ldr	r3, [sp, #12]
- 800097c:	f7ff ff76 	bl	800086c <LL_APB1_GRP1_EnableClock>
-  SystemClock_Config();
- 8000980:	f7ff ff90 	bl	80008a4 <SystemClock_Config>
+ 8001598:	b590      	push	{r4, r7, lr}
+ 800159a:	b08d      	sub	sp, #52	; 0x34
+ 800159c:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN LPUART1_Init 0 */
+
+  /* USER CODE END LPUART1_Init 0 */
+
+  LL_LPUART_InitTypeDef LPUART_InitStruct = {0};
+ 800159e:	2418      	movs	r4, #24
+ 80015a0:	193b      	adds	r3, r7, r4
+ 80015a2:	0018      	movs	r0, r3
+ 80015a4:	2318      	movs	r3, #24
+ 80015a6:	001a      	movs	r2, r3
+ 80015a8:	2100      	movs	r1, #0
+ 80015aa:	f000 fef5 	bl	8002398 <memset>
+
+  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 80015ae:	003b      	movs	r3, r7
+ 80015b0:	0018      	movs	r0, r3
+ 80015b2:	2318      	movs	r3, #24
+ 80015b4:	001a      	movs	r2, r3
+ 80015b6:	2100      	movs	r1, #0
+ 80015b8:	f000 feee 	bl	8002398 <memset>
+
+  /* Peripheral clock enable */
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1);
+ 80015bc:	2380      	movs	r3, #128	; 0x80
+ 80015be:	02db      	lsls	r3, r3, #11
+ 80015c0:	0018      	movs	r0, r3
+ 80015c2:	f7ff fe39 	bl	8001238 <LL_APB1_GRP1_EnableClock>
+
+  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
+ 80015c6:	2001      	movs	r0, #1
+ 80015c8:	f7ff fe62 	bl	8001290 <LL_IOP_GRP1_EnableClock>
+  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
+ 80015cc:	2002      	movs	r0, #2
+ 80015ce:	f7ff fe5f 	bl	8001290 <LL_IOP_GRP1_EnableClock>
+  /**LPUART1 GPIO Configuration
+  PA0-CK_IN   ------> LPUART1_RX
+  PA1   ------> LPUART1_TX
+  PB1   ------> LPUART1_DE
+  */
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_0;
+ 80015d2:	003b      	movs	r3, r7
+ 80015d4:	2201      	movs	r2, #1
+ 80015d6:	601a      	str	r2, [r3, #0]
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 80015d8:	003b      	movs	r3, r7
+ 80015da:	2202      	movs	r2, #2
+ 80015dc:	605a      	str	r2, [r3, #4]
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 80015de:	003b      	movs	r3, r7
+ 80015e0:	2203      	movs	r2, #3
+ 80015e2:	609a      	str	r2, [r3, #8]
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 80015e4:	003b      	movs	r3, r7
+ 80015e6:	2200      	movs	r2, #0
+ 80015e8:	60da      	str	r2, [r3, #12]
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 80015ea:	003b      	movs	r3, r7
+ 80015ec:	2200      	movs	r2, #0
+ 80015ee:	611a      	str	r2, [r3, #16]
+  GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
+ 80015f0:	003b      	movs	r3, r7
+ 80015f2:	2206      	movs	r2, #6
+ 80015f4:	615a      	str	r2, [r3, #20]
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 80015f6:	003a      	movs	r2, r7
+ 80015f8:	23a0      	movs	r3, #160	; 0xa0
+ 80015fa:	05db      	lsls	r3, r3, #23
+ 80015fc:	0011      	movs	r1, r2
+ 80015fe:	0018      	movs	r0, r3
+ 8001600:	f000 fac8 	bl	8001b94 <LL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
+ 8001604:	003b      	movs	r3, r7
+ 8001606:	2202      	movs	r2, #2
+ 8001608:	601a      	str	r2, [r3, #0]
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 800160a:	003b      	movs	r3, r7
+ 800160c:	2202      	movs	r2, #2
+ 800160e:	605a      	str	r2, [r3, #4]
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001610:	003b      	movs	r3, r7
+ 8001612:	2203      	movs	r2, #3
+ 8001614:	609a      	str	r2, [r3, #8]
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 8001616:	003b      	movs	r3, r7
+ 8001618:	2200      	movs	r2, #0
+ 800161a:	60da      	str	r2, [r3, #12]
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 800161c:	003b      	movs	r3, r7
+ 800161e:	2200      	movs	r2, #0
+ 8001620:	611a      	str	r2, [r3, #16]
+  GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
+ 8001622:	003b      	movs	r3, r7
+ 8001624:	2206      	movs	r2, #6
+ 8001626:	615a      	str	r2, [r3, #20]
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 8001628:	003a      	movs	r2, r7
+ 800162a:	23a0      	movs	r3, #160	; 0xa0
+ 800162c:	05db      	lsls	r3, r3, #23
+ 800162e:	0011      	movs	r1, r2
+ 8001630:	0018      	movs	r0, r3
+ 8001632:	f000 faaf 	bl	8001b94 <LL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
+ 8001636:	003b      	movs	r3, r7
+ 8001638:	2202      	movs	r2, #2
+ 800163a:	601a      	str	r2, [r3, #0]
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 800163c:	003b      	movs	r3, r7
+ 800163e:	2202      	movs	r2, #2
+ 8001640:	605a      	str	r2, [r3, #4]
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001642:	003b      	movs	r3, r7
+ 8001644:	2203      	movs	r2, #3
+ 8001646:	609a      	str	r2, [r3, #8]
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 8001648:	003b      	movs	r3, r7
+ 800164a:	2200      	movs	r2, #0
+ 800164c:	60da      	str	r2, [r3, #12]
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 800164e:	003b      	movs	r3, r7
+ 8001650:	2200      	movs	r2, #0
+ 8001652:	611a      	str	r2, [r3, #16]
+  GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
+ 8001654:	003b      	movs	r3, r7
+ 8001656:	2204      	movs	r2, #4
+ 8001658:	615a      	str	r2, [r3, #20]
+  LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 800165a:	003b      	movs	r3, r7
+ 800165c:	4a33      	ldr	r2, [pc, #204]	; (800172c <MX_LPUART1_UART_Init+0x194>)
+ 800165e:	0019      	movs	r1, r3
+ 8001660:	0010      	movs	r0, r2
+ 8001662:	f000 fa97 	bl	8001b94 <LL_GPIO_Init>
+
+  /* LPUART1 DMA Init */
+
+  /* LPUART1_RX Init */
+  LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_3, LL_DMA_REQUEST_5);
+ 8001666:	4b32      	ldr	r3, [pc, #200]	; (8001730 <MX_LPUART1_UART_Init+0x198>)
+ 8001668:	2205      	movs	r2, #5
+ 800166a:	2103      	movs	r1, #3
+ 800166c:	0018      	movs	r0, r3
+ 800166e:	f7ff fc11 	bl	8000e94 <LL_DMA_SetPeriphRequest>
+
+  LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_3, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
+ 8001672:	4b2f      	ldr	r3, [pc, #188]	; (8001730 <MX_LPUART1_UART_Init+0x198>)
+ 8001674:	2200      	movs	r2, #0
+ 8001676:	2103      	movs	r1, #3
+ 8001678:	0018      	movs	r0, r3
+ 800167a:	f7ff fb15 	bl	8000ca8 <LL_DMA_SetDataTransferDirection>
+
+  LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PRIORITY_MEDIUM);
+ 800167e:	2380      	movs	r3, #128	; 0x80
+ 8001680:	015b      	lsls	r3, r3, #5
+ 8001682:	482b      	ldr	r0, [pc, #172]	; (8001730 <MX_LPUART1_UART_Init+0x198>)
+ 8001684:	001a      	movs	r2, r3
+ 8001686:	2103      	movs	r1, #3
+ 8001688:	f7ff fbe0 	bl	8000e4c <LL_DMA_SetChannelPriorityLevel>
+
+  LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MODE_CIRCULAR);
+ 800168c:	4b28      	ldr	r3, [pc, #160]	; (8001730 <MX_LPUART1_UART_Init+0x198>)
+ 800168e:	2220      	movs	r2, #32
+ 8001690:	2103      	movs	r1, #3
+ 8001692:	0018      	movs	r0, r3
+ 8001694:	f7ff fb2c 	bl	8000cf0 <LL_DMA_SetMode>
+
+  LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PERIPH_NOINCREMENT);
+ 8001698:	4b25      	ldr	r3, [pc, #148]	; (8001730 <MX_LPUART1_UART_Init+0x198>)
+ 800169a:	2200      	movs	r2, #0
+ 800169c:	2103      	movs	r1, #3
+ 800169e:	0018      	movs	r0, r3
+ 80016a0:	f7ff fb48 	bl	8000d34 <LL_DMA_SetPeriphIncMode>
+
+  LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MEMORY_INCREMENT);
+ 80016a4:	4b22      	ldr	r3, [pc, #136]	; (8001730 <MX_LPUART1_UART_Init+0x198>)
+ 80016a6:	2280      	movs	r2, #128	; 0x80
+ 80016a8:	2103      	movs	r1, #3
+ 80016aa:	0018      	movs	r0, r3
+ 80016ac:	f7ff fb64 	bl	8000d78 <LL_DMA_SetMemoryIncMode>
+
+  LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PDATAALIGN_BYTE);
+ 80016b0:	4b1f      	ldr	r3, [pc, #124]	; (8001730 <MX_LPUART1_UART_Init+0x198>)
+ 80016b2:	2200      	movs	r2, #0
+ 80016b4:	2103      	movs	r1, #3
+ 80016b6:	0018      	movs	r0, r3
+ 80016b8:	f7ff fb80 	bl	8000dbc <LL_DMA_SetPeriphSize>
+
+  LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MDATAALIGN_BYTE);
+ 80016bc:	4b1c      	ldr	r3, [pc, #112]	; (8001730 <MX_LPUART1_UART_Init+0x198>)
+ 80016be:	2200      	movs	r2, #0
+ 80016c0:	2103      	movs	r1, #3
+ 80016c2:	0018      	movs	r0, r3
+ 80016c4:	f7ff fb9e 	bl	8000e04 <LL_DMA_SetMemorySize>
+
+  /* USER CODE BEGIN LPUART1_Init 1 */
+
+  /* USER CODE END LPUART1_Init 1 */
+  LPUART_InitStruct.BaudRate = 115200;
+ 80016c8:	193b      	adds	r3, r7, r4
+ 80016ca:	22e1      	movs	r2, #225	; 0xe1
+ 80016cc:	0252      	lsls	r2, r2, #9
+ 80016ce:	601a      	str	r2, [r3, #0]
+  LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_8B;
+ 80016d0:	0021      	movs	r1, r4
+ 80016d2:	187b      	adds	r3, r7, r1
+ 80016d4:	2200      	movs	r2, #0
+ 80016d6:	605a      	str	r2, [r3, #4]
+  LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1;
+ 80016d8:	187b      	adds	r3, r7, r1
+ 80016da:	2200      	movs	r2, #0
+ 80016dc:	609a      	str	r2, [r3, #8]
+  LPUART_InitStruct.Parity = LL_LPUART_PARITY_NONE;
+ 80016de:	187b      	adds	r3, r7, r1
+ 80016e0:	2200      	movs	r2, #0
+ 80016e2:	60da      	str	r2, [r3, #12]
+  LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX;
+ 80016e4:	187b      	adds	r3, r7, r1
+ 80016e6:	220c      	movs	r2, #12
+ 80016e8:	611a      	str	r2, [r3, #16]
+  LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE;
+ 80016ea:	187b      	adds	r3, r7, r1
+ 80016ec:	2200      	movs	r2, #0
+ 80016ee:	615a      	str	r2, [r3, #20]
+  LL_LPUART_Init(LPUART1, &LPUART_InitStruct);
+ 80016f0:	187b      	adds	r3, r7, r1
+ 80016f2:	4a10      	ldr	r2, [pc, #64]	; (8001734 <MX_LPUART1_UART_Init+0x19c>)
+ 80016f4:	0019      	movs	r1, r3
+ 80016f6:	0010      	movs	r0, r2
+ 80016f8:	f000 fbf6 	bl	8001ee8 <LL_LPUART_Init>
+  LL_LPUART_EnableDEMode(LPUART1);
+ 80016fc:	4b0d      	ldr	r3, [pc, #52]	; (8001734 <MX_LPUART1_UART_Init+0x19c>)
+ 80016fe:	0018      	movs	r0, r3
+ 8001700:	f7ff fc82 	bl	8001008 <LL_LPUART_EnableDEMode>
+  LL_LPUART_SetDESignalPolarity(LPUART1, LL_LPUART_DE_POLARITY_HIGH);
+ 8001704:	4b0b      	ldr	r3, [pc, #44]	; (8001734 <MX_LPUART1_UART_Init+0x19c>)
+ 8001706:	2100      	movs	r1, #0
+ 8001708:	0018      	movs	r0, r3
+ 800170a:	f7ff fc8d 	bl	8001028 <LL_LPUART_SetDESignalPolarity>
+  LL_LPUART_SetDEAssertionTime(LPUART1, 20);
+ 800170e:	4b09      	ldr	r3, [pc, #36]	; (8001734 <MX_LPUART1_UART_Init+0x19c>)
+ 8001710:	2114      	movs	r1, #20
+ 8001712:	0018      	movs	r0, r3
+ 8001714:	f7ff fc64 	bl	8000fe0 <LL_LPUART_SetDEAssertionTime>
+  LL_LPUART_SetDEDeassertionTime(LPUART1, 20);
+ 8001718:	4b06      	ldr	r3, [pc, #24]	; (8001734 <MX_LPUART1_UART_Init+0x19c>)
+ 800171a:	2114      	movs	r1, #20
+ 800171c:	0018      	movs	r0, r3
+ 800171e:	f7ff fc4b 	bl	8000fb8 <LL_LPUART_SetDEDeassertionTime>
+  /* USER CODE BEGIN LPUART1_Init 2 */
+
+  /* USER CODE END LPUART1_Init 2 */
+
+}
+ 8001722:	46c0      	nop			; (mov r8, r8)
+ 8001724:	46bd      	mov	sp, r7
+ 8001726:	b00d      	add	sp, #52	; 0x34
+ 8001728:	bd90      	pop	{r4, r7, pc}
+ 800172a:	46c0      	nop			; (mov r8, r8)
+ 800172c:	50000400 	.word	0x50000400
+ 8001730:	40020000 	.word	0x40020000
+ 8001734:	40004800 	.word	0x40004800
+
+08001738 <MX_DMA_Init>:
+
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+ 8001738:	b580      	push	{r7, lr}
+ 800173a:	af00      	add	r7, sp, #0
+
+  /* Init with LL driver */
+  /* DMA controller clock enable */
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
+ 800173c:	2001      	movs	r0, #1
+ 800173e:	f7ff fd65 	bl	800120c <LL_AHB1_GRP1_EnableClock>
+
+  /* DMA interrupt init */
+  /* DMA1_Channel2_3_IRQn interrupt configuration */
+  NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
+ 8001742:	2100      	movs	r1, #0
+ 8001744:	200a      	movs	r0, #10
+ 8001746:	f7ff fa41 	bl	8000bcc <__NVIC_SetPriority>
+  NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
+ 800174a:	200a      	movs	r0, #10
+ 800174c:	f7ff fa24 	bl	8000b98 <__NVIC_EnableIRQ>
+
+}
+ 8001750:	46c0      	nop			; (mov r8, r8)
+ 8001752:	46bd      	mov	sp, r7
+ 8001754:	bd80      	pop	{r7, pc}
+
+08001756 <MX_GPIO_Init>:
+  * @brief GPIO Initialization Function
   * @param None
   * @retval None
   */
 static void MX_GPIO_Init(void)
 {
+ 8001756:	b580      	push	{r7, lr}
+ 8001758:	b086      	sub	sp, #24
+ 800175a:	af00      	add	r7, sp, #0
   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000984:	2218      	movs	r2, #24
- 8000986:	2100      	movs	r1, #0
- 8000988:	a80b      	add	r0, sp, #44	; 0x2c
- 800098a:	f000 fbe7 	bl	800115c <memset>
+ 800175c:	003b      	movs	r3, r7
+ 800175e:	0018      	movs	r0, r3
+ 8001760:	2318      	movs	r3, #24
+ 8001762:	001a      	movs	r2, r3
+ 8001764:	2100      	movs	r1, #0
+ 8001766:	f000 fe17 	bl	8002398 <memset>
 
   /* GPIO Ports Clock Enable */
   LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
- 800098e:	0028      	movs	r0, r5
- 8000990:	f7ff ff7a 	bl	8000888 <LL_IOP_GRP1_EnableClock>
+ 800176a:	2001      	movs	r0, #1
+ 800176c:	f7ff fd90 	bl	8001290 <LL_IOP_GRP1_EnableClock>
   LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
- 8000994:	2002      	movs	r0, #2
- 8000996:	f7ff ff77 	bl	8000888 <LL_IOP_GRP1_EnableClock>
- 800099a:	23a0      	movs	r3, #160	; 0xa0
- 800099c:	2220      	movs	r2, #32
- 800099e:	2140      	movs	r1, #64	; 0x40
+ 8001770:	2002      	movs	r0, #2
+ 8001772:	f7ff fd8d 	bl	8001290 <LL_IOP_GRP1_EnableClock>
+
+  /**/
+  LL_GPIO_SetOutputPin(LED_B_GPIO_Port, LED_B_Pin);
+ 8001776:	23a0      	movs	r3, #160	; 0xa0
+ 8001778:	05db      	lsls	r3, r3, #23
+ 800177a:	2120      	movs	r1, #32
+ 800177c:	0018      	movs	r0, r3
+ 800177e:	f7ff fdd3 	bl	8001328 <LL_GPIO_SetOutputPin>
+
+  /**/
+  LL_GPIO_SetOutputPin(LED_G_GPIO_Port, LED_G_Pin);
+ 8001782:	23a0      	movs	r3, #160	; 0xa0
+ 8001784:	05db      	lsls	r3, r3, #23
+ 8001786:	2140      	movs	r1, #64	; 0x40
+ 8001788:	0018      	movs	r0, r3
+ 800178a:	f7ff fdcd 	bl	8001328 <LL_GPIO_SetOutputPin>
+
+  /**/
   LL_GPIO_SetOutputPin(LED_R_GPIO_Port, LED_R_Pin);
+ 800178e:	23a0      	movs	r3, #160	; 0xa0
+ 8001790:	05db      	lsls	r3, r3, #23
+ 8001792:	2180      	movs	r1, #128	; 0x80
+ 8001794:	0018      	movs	r0, r3
+ 8001796:	f7ff fdc7 	bl	8001328 <LL_GPIO_SetOutputPin>
 
   /**/
   GPIO_InitStruct.Pin = LED_B_Pin;
+ 800179a:	003b      	movs	r3, r7
+ 800179c:	2220      	movs	r2, #32
+ 800179e:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
+ 80017a0:	003b      	movs	r3, r7
+ 80017a2:	2201      	movs	r2, #1
+ 80017a4:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
- 80009a0:	2400      	movs	r4, #0
- 80009a2:	05db      	lsls	r3, r3, #23
+ 80017a6:	003b      	movs	r3, r7
+ 80017a8:	2200      	movs	r2, #0
+ 80017aa:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 80017ac:	003b      	movs	r3, r7
+ 80017ae:	2200      	movs	r2, #0
+ 80017b0:	60da      	str	r2, [r3, #12]
   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 80017b2:	003b      	movs	r3, r7
+ 80017b4:	2200      	movs	r2, #0
+ 80017b6:	611a      	str	r2, [r3, #16]
   LL_GPIO_Init(LED_B_GPIO_Port, &GPIO_InitStruct);
- 80009a4:	a80b      	add	r0, sp, #44	; 0x2c
- 80009a6:	619a      	str	r2, [r3, #24]
- 80009a8:	6199      	str	r1, [r3, #24]
- 80009aa:	619f      	str	r7, [r3, #24]
- 80009ac:	0001      	movs	r1, r0
- 80009ae:	0018      	movs	r0, r3
-  GPIO_InitStruct.Pin = LED_B_Pin;
- 80009b0:	920b      	str	r2, [sp, #44]	; 0x2c
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
- 80009b2:	950c      	str	r5, [sp, #48]	; 0x30
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
- 80009b4:	940d      	str	r4, [sp, #52]	; 0x34
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 80009b6:	940e      	str	r4, [sp, #56]	; 0x38
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 80009b8:	940f      	str	r4, [sp, #60]	; 0x3c
-  LL_GPIO_Init(LED_B_GPIO_Port, &GPIO_InitStruct);
- 80009ba:	f000 fa00 	bl	8000dbe <LL_GPIO_Init>
+ 80017b8:	003a      	movs	r2, r7
+ 80017ba:	23a0      	movs	r3, #160	; 0xa0
+ 80017bc:	05db      	lsls	r3, r3, #23
+ 80017be:	0011      	movs	r1, r2
+ 80017c0:	0018      	movs	r0, r3
+ 80017c2:	f000 f9e7 	bl	8001b94 <LL_GPIO_Init>
 
   /**/
   GPIO_InitStruct.Pin = LED_G_Pin;
- 80009be:	2040      	movs	r0, #64	; 0x40
- 80009c0:	900b      	str	r0, [sp, #44]	; 0x2c
+ 80017c6:	003b      	movs	r3, r7
+ 80017c8:	2240      	movs	r2, #64	; 0x40
+ 80017ca:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
+ 80017cc:	003b      	movs	r3, r7
+ 80017ce:	2201      	movs	r2, #1
+ 80017d0:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
+ 80017d2:	003b      	movs	r3, r7
+ 80017d4:	2200      	movs	r2, #0
+ 80017d6:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 80017d8:	003b      	movs	r3, r7
+ 80017da:	2200      	movs	r2, #0
+ 80017dc:	60da      	str	r2, [r3, #12]
   GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 80017de:	003b      	movs	r3, r7
+ 80017e0:	2200      	movs	r2, #0
+ 80017e2:	611a      	str	r2, [r3, #16]
   LL_GPIO_Init(LED_G_GPIO_Port, &GPIO_InitStruct);
- 80009c2:	20a0      	movs	r0, #160	; 0xa0
- 80009c4:	a90b      	add	r1, sp, #44	; 0x2c
- 80009c6:	05c0      	lsls	r0, r0, #23
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
- 80009c8:	950c      	str	r5, [sp, #48]	; 0x30
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
- 80009ca:	940d      	str	r4, [sp, #52]	; 0x34
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 80009cc:	940e      	str	r4, [sp, #56]	; 0x38
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 80009ce:	940f      	str	r4, [sp, #60]	; 0x3c
-  LL_GPIO_Init(LED_G_GPIO_Port, &GPIO_InitStruct);
- 80009d0:	f000 f9f5 	bl	8000dbe <LL_GPIO_Init>
-  GPIO_InitStruct.Pin = LED_R_Pin;
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-  LL_GPIO_Init(LED_R_GPIO_Port, &GPIO_InitStruct);
- 80009d4:	20a0      	movs	r0, #160	; 0xa0
- 80009d6:	a90b      	add	r1, sp, #44	; 0x2c
- 80009d8:	05c0      	lsls	r0, r0, #23
-  GPIO_InitStruct.Pin = LED_R_Pin;
- 80009da:	970b      	str	r7, [sp, #44]	; 0x2c
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
- 80009dc:	950c      	str	r5, [sp, #48]	; 0x30
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
- 80009de:	940d      	str	r4, [sp, #52]	; 0x34
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 80009e0:	940e      	str	r4, [sp, #56]	; 0x38
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 80009e2:	940f      	str	r4, [sp, #60]	; 0x3c
-  LL_GPIO_Init(LED_R_GPIO_Port, &GPIO_InitStruct);
- 80009e4:	f000 f9eb 	bl	8000dbe <LL_GPIO_Init>
-  SET_BIT(RCC->AHBENR, Periphs);
- 80009e8:	6b33      	ldr	r3, [r6, #48]	; 0x30
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 80009ea:	21c2      	movs	r1, #194	; 0xc2
- 80009ec:	432b      	orrs	r3, r5
- 80009ee:	6333      	str	r3, [r6, #48]	; 0x30
-  tmpreg = READ_BIT(RCC->AHBENR, Periphs);
- 80009f0:	6b33      	ldr	r3, [r6, #48]	; 0x30
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 80009f2:	2680      	movs	r6, #128	; 0x80
- 80009f4:	402b      	ands	r3, r5
- 80009f6:	9304      	str	r3, [sp, #16]
-  (void)tmpreg;
- 80009f8:	9b04      	ldr	r3, [sp, #16]
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 80009fa:	4b8b      	ldr	r3, [pc, #556]	; (8000c28 <main+0x2c8>)
- 80009fc:	0089      	lsls	r1, r1, #2
- 80009fe:	585a      	ldr	r2, [r3, r1]
- 8000a00:	488a      	ldr	r0, [pc, #552]	; (8000c2c <main+0x2cc>)
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 8000a02:	00f6      	lsls	r6, r6, #3
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 8000a04:	4002      	ands	r2, r0
- 8000a06:	505a      	str	r2, [r3, r1]
-  LL_I2C_InitTypeDef I2C_InitStruct = {0};
- 8000a08:	a80b      	add	r0, sp, #44	; 0x2c
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 8000a0a:	601e      	str	r6, [r3, #0]
- 8000a0c:	0021      	movs	r1, r4
- 8000a0e:	221c      	movs	r2, #28
- 8000a10:	f000 fba4 	bl	800115c <memset>
-  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000a14:	2218      	movs	r2, #24
- 8000a16:	0021      	movs	r1, r4
- 8000a18:	a805      	add	r0, sp, #20
- 8000a1a:	f000 fb9f 	bl	800115c <memset>
-  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
- 8000a1e:	0028      	movs	r0, r5
- 8000a20:	f7ff ff32 	bl	8000888 <LL_IOP_GRP1_EnableClock>
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000a24:	2003      	movs	r0, #3
-  GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
- 8000a26:	2380      	movs	r3, #128	; 0x80
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000a28:	9007      	str	r0, [sp, #28]
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000a2a:	20a0      	movs	r0, #160	; 0xa0
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8000a2c:	3f7e      	subs	r7, #126	; 0x7e
-  GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
- 8000a2e:	009b      	lsls	r3, r3, #2
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000a30:	a905      	add	r1, sp, #20
- 8000a32:	05c0      	lsls	r0, r0, #23
-  GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
- 8000a34:	9305      	str	r3, [sp, #20]
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8000a36:	9706      	str	r7, [sp, #24]
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
- 8000a38:	9508      	str	r5, [sp, #32]
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
- 8000a3a:	9509      	str	r5, [sp, #36]	; 0x24
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
- 8000a3c:	950a      	str	r5, [sp, #40]	; 0x28
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000a3e:	f000 f9be 	bl	8000dbe <LL_GPIO_Init>
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000a42:	2003      	movs	r0, #3
- 8000a44:	9007      	str	r0, [sp, #28]
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000a46:	20a0      	movs	r0, #160	; 0xa0
-  GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
- 8000a48:	9605      	str	r6, [sp, #20]
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000a4a:	ae05      	add	r6, sp, #20
- 8000a4c:	0031      	movs	r1, r6
- 8000a4e:	05c0      	lsls	r0, r0, #23
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8000a50:	9706      	str	r7, [sp, #24]
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
- 8000a52:	9508      	str	r5, [sp, #32]
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
- 8000a54:	9509      	str	r5, [sp, #36]	; 0x24
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
- 8000a56:	950a      	str	r5, [sp, #40]	; 0x28
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000a58:	f000 f9b1 	bl	8000dbe <LL_GPIO_Init>
-  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
- 8000a5c:	2080      	movs	r0, #128	; 0x80
- 8000a5e:	0380      	lsls	r0, r0, #14
- 8000a60:	f7ff ff04 	bl	800086c <LL_APB1_GRP1_EnableClock>
-  SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
- 8000a64:	2380      	movs	r3, #128	; 0x80
- 8000a66:	4e72      	ldr	r6, [pc, #456]	; (8000c30 <main+0x2d0>)
- 8000a68:	049b      	lsls	r3, r3, #18
- 8000a6a:	6872      	ldr	r2, [r6, #4]
-  LL_I2C_Init(I2C1, &I2C_InitStruct);
- 8000a6c:	a90b      	add	r1, sp, #44	; 0x2c
- 8000a6e:	4313      	orrs	r3, r2
- 8000a70:	6073      	str	r3, [r6, #4]
-  CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
- 8000a72:	68f3      	ldr	r3, [r6, #12]
- 8000a74:	4a6f      	ldr	r2, [pc, #444]	; (8000c34 <main+0x2d4>)
- 8000a76:	0030      	movs	r0, r6
- 8000a78:	4013      	ands	r3, r2
- 8000a7a:	60f3      	str	r3, [r6, #12]
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
- 8000a7c:	6833      	ldr	r3, [r6, #0]
- 8000a7e:	4a6e      	ldr	r2, [pc, #440]	; (8000c38 <main+0x2d8>)
- 8000a80:	4013      	ands	r3, r2
- 8000a82:	6033      	str	r3, [r6, #0]
-  CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
- 8000a84:	6833      	ldr	r3, [r6, #0]
- 8000a86:	4a6d      	ldr	r2, [pc, #436]	; (8000c3c <main+0x2dc>)
- 8000a88:	4013      	ands	r3, r2
- 8000a8a:	6033      	str	r3, [r6, #0]
-  I2C_InitStruct.Timing = 0x00000708;
- 8000a8c:	23e1      	movs	r3, #225	; 0xe1
- 8000a8e:	00db      	lsls	r3, r3, #3
-  I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C;
- 8000a90:	940b      	str	r4, [sp, #44]	; 0x2c
-  I2C_InitStruct.Timing = 0x00000708;
- 8000a92:	930c      	str	r3, [sp, #48]	; 0x30
-  I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
- 8000a94:	940d      	str	r4, [sp, #52]	; 0x34
-  I2C_InitStruct.DigitalFilter = 0;
- 8000a96:	940e      	str	r4, [sp, #56]	; 0x38
-  I2C_InitStruct.OwnAddress1 = 0;
- 8000a98:	940f      	str	r4, [sp, #60]	; 0x3c
-  I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK;
- 8000a9a:	9410      	str	r4, [sp, #64]	; 0x40
-  I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
- 8000a9c:	9411      	str	r4, [sp, #68]	; 0x44
-  LL_I2C_Init(I2C1, &I2C_InitStruct);
- 8000a9e:	f000 f9df 	bl	8000e60 <LL_I2C_Init>
-  MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask);
- 8000aa2:	68f3      	ldr	r3, [r6, #12]
- 8000aa4:	4a66      	ldr	r2, [pc, #408]	; (8000c40 <main+0x2e0>)
-  LL_LPUART_InitTypeDef LPUART_InitStruct = {0};
- 8000aa6:	0021      	movs	r1, r4
- 8000aa8:	4013      	ands	r3, r2
- 8000aaa:	60f3      	str	r3, [r6, #12]
- 8000aac:	ab05      	add	r3, sp, #20
- 8000aae:	2218      	movs	r2, #24
- 8000ab0:	0018      	movs	r0, r3
- 8000ab2:	f000 fb53 	bl	800115c <memset>
-  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000ab6:	ab0b      	add	r3, sp, #44	; 0x2c
- 8000ab8:	2218      	movs	r2, #24
- 8000aba:	0021      	movs	r1, r4
- 8000abc:	0018      	movs	r0, r3
- 8000abe:	f000 fb4d 	bl	800115c <memset>
-  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPUART1);
- 8000ac2:	2080      	movs	r0, #128	; 0x80
- 8000ac4:	02c0      	lsls	r0, r0, #11
- 8000ac6:	f7ff fed1 	bl	800086c <LL_APB1_GRP1_EnableClock>
-  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
- 8000aca:	0028      	movs	r0, r5
- 8000acc:	f7ff fedc 	bl	8000888 <LL_IOP_GRP1_EnableClock>
-  LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
- 8000ad0:	0038      	movs	r0, r7
- 8000ad2:	f7ff fed9 	bl	8000888 <LL_IOP_GRP1_EnableClock>
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000ad6:	2003      	movs	r0, #3
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
- 8000ad8:	2106      	movs	r1, #6
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000ada:	900d      	str	r0, [sp, #52]	; 0x34
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000adc:	20a0      	movs	r0, #160	; 0xa0
- 8000ade:	ab0b      	add	r3, sp, #44	; 0x2c
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
- 8000ae0:	9110      	str	r1, [sp, #64]	; 0x40
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000ae2:	05c0      	lsls	r0, r0, #23
- 8000ae4:	0019      	movs	r1, r3
-  GPIO_InitStruct.Pin = LL_GPIO_PIN_0;
- 8000ae6:	950b      	str	r5, [sp, #44]	; 0x2c
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8000ae8:	970c      	str	r7, [sp, #48]	; 0x30
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8000aea:	940e      	str	r4, [sp, #56]	; 0x38
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8000aec:	940f      	str	r4, [sp, #60]	; 0x3c
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000aee:	f000 f966 	bl	8000dbe <LL_GPIO_Init>
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000af2:	2003      	movs	r0, #3
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
- 8000af4:	2106      	movs	r1, #6
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000af6:	900d      	str	r0, [sp, #52]	; 0x34
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000af8:	20a0      	movs	r0, #160	; 0xa0
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
- 8000afa:	9110      	str	r1, [sp, #64]	; 0x40
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000afc:	05c0      	lsls	r0, r0, #23
- 8000afe:	a90b      	add	r1, sp, #44	; 0x2c
-  GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
- 8000b00:	970b      	str	r7, [sp, #44]	; 0x2c
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8000b02:	970c      	str	r7, [sp, #48]	; 0x30
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8000b04:	940e      	str	r4, [sp, #56]	; 0x38
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8000b06:	940f      	str	r4, [sp, #60]	; 0x3c
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000b08:	f000 f959 	bl	8000dbe <LL_GPIO_Init>
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000b0c:	2003      	movs	r0, #3
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
- 8000b0e:	2304      	movs	r3, #4
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 8000b10:	900d      	str	r0, [sp, #52]	; 0x34
-  LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8000b12:	a90b      	add	r1, sp, #44	; 0x2c
- 8000b14:	484b      	ldr	r0, [pc, #300]	; (8000c44 <main+0x2e4>)
-  GPIO_InitStruct.Pin = LL_GPIO_PIN_1;
- 8000b16:	970b      	str	r7, [sp, #44]	; 0x2c
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 8000b18:	970c      	str	r7, [sp, #48]	; 0x30
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 8000b1a:	940e      	str	r4, [sp, #56]	; 0x38
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 8000b1c:	940f      	str	r4, [sp, #60]	; 0x3c
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
- 8000b1e:	9310      	str	r3, [sp, #64]	; 0x40
-  LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8000b20:	f000 f94d 	bl	8000dbe <LL_GPIO_Init>
-  *         @arg @ref LL_DMA_REQUEST_15
-  * @retval None
-  */
-__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request)
-{
-  MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
- 8000b24:	4948      	ldr	r1, [pc, #288]	; (8000c48 <main+0x2e8>)
- 8000b26:	4a49      	ldr	r2, [pc, #292]	; (8000c4c <main+0x2ec>)
- 8000b28:	680b      	ldr	r3, [r1, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
- 8000b2a:	2040      	movs	r0, #64	; 0x40
-  MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
- 8000b2c:	401a      	ands	r2, r3
- 8000b2e:	23a0      	movs	r3, #160	; 0xa0
- 8000b30:	00db      	lsls	r3, r3, #3
- 8000b32:	4313      	orrs	r3, r2
- 8000b34:	600b      	str	r3, [r1, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
- 8000b36:	4b46      	ldr	r3, [pc, #280]	; (8000c50 <main+0x2f0>)
- 8000b38:	4946      	ldr	r1, [pc, #280]	; (8000c54 <main+0x2f4>)
- 8000b3a:	681a      	ldr	r2, [r3, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MINC,
- 8000b3c:	377e      	adds	r7, #126	; 0x7e
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
- 8000b3e:	400a      	ands	r2, r1
- 8000b40:	601a      	str	r2, [r3, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PL,
- 8000b42:	681a      	ldr	r2, [r3, #0]
- 8000b44:	4944      	ldr	r1, [pc, #272]	; (8000c58 <main+0x2f8>)
- 8000b46:	4011      	ands	r1, r2
- 8000b48:	2280      	movs	r2, #128	; 0x80
- 8000b4a:	0152      	lsls	r2, r2, #5
- 8000b4c:	430a      	orrs	r2, r1
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_CIRC,
- 8000b4e:	2120      	movs	r1, #32
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PL,
- 8000b50:	601a      	str	r2, [r3, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_CIRC,
- 8000b52:	681a      	ldr	r2, [r3, #0]
- 8000b54:	438a      	bics	r2, r1
- 8000b56:	430a      	orrs	r2, r1
- 8000b58:	601a      	str	r2, [r3, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
- 8000b5a:	681a      	ldr	r2, [r3, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PSIZE,
- 8000b5c:	493f      	ldr	r1, [pc, #252]	; (8000c5c <main+0x2fc>)
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
- 8000b5e:	4382      	bics	r2, r0
- 8000b60:	601a      	str	r2, [r3, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MINC,
- 8000b62:	681a      	ldr	r2, [r3, #0]
- 8000b64:	43ba      	bics	r2, r7
- 8000b66:	433a      	orrs	r2, r7
- 8000b68:	601a      	str	r2, [r3, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PSIZE,
- 8000b6a:	681a      	ldr	r2, [r3, #0]
-  LL_LPUART_Init(LPUART1, &LPUART_InitStruct);
- 8000b6c:	4f3c      	ldr	r7, [pc, #240]	; (8000c60 <main+0x300>)
- 8000b6e:	400a      	ands	r2, r1
- 8000b70:	601a      	str	r2, [r3, #0]
-  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MSIZE,
- 8000b72:	681a      	ldr	r2, [r3, #0]
- 8000b74:	493b      	ldr	r1, [pc, #236]	; (8000c64 <main+0x304>)
- 8000b76:	0038      	movs	r0, r7
- 8000b78:	400a      	ands	r2, r1
- 8000b7a:	601a      	str	r2, [r3, #0]
-  LPUART_InitStruct.BaudRate = 115200;
- 8000b7c:	23e1      	movs	r3, #225	; 0xe1
- 8000b7e:	025b      	lsls	r3, r3, #9
- 8000b80:	9305      	str	r3, [sp, #20]
-  LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX;
- 8000b82:	230c      	movs	r3, #12
-  LL_LPUART_Init(LPUART1, &LPUART_InitStruct);
- 8000b84:	a905      	add	r1, sp, #20
-  LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_8B;
- 8000b86:	9406      	str	r4, [sp, #24]
-  LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1;
- 8000b88:	9407      	str	r4, [sp, #28]
-  LPUART_InitStruct.Parity = LL_LPUART_PARITY_NONE;
- 8000b8a:	9408      	str	r4, [sp, #32]
-  LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX;
- 8000b8c:	9309      	str	r3, [sp, #36]	; 0x24
-  LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE;
- 8000b8e:	940a      	str	r4, [sp, #40]	; 0x28
-  LL_LPUART_Init(LPUART1, &LPUART_InitStruct);
- 8000b90:	f000 f9a0 	bl	8000ed4 <LL_LPUART_Init>
-  * @param  LPUARTx LPUART Instance
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
-{
-  SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
- 8000b94:	2380      	movs	r3, #128	; 0x80
- 8000b96:	68ba      	ldr	r2, [r7, #8]
- 8000b98:	01db      	lsls	r3, r3, #7
- 8000b9a:	4313      	orrs	r3, r2
- 8000b9c:	60bb      	str	r3, [r7, #8]
-  *         @arg @ref LL_LPUART_DE_POLARITY_LOW
-  * @retval None
-  */
-__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
-{
-  MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
- 8000b9e:	68bb      	ldr	r3, [r7, #8]
- 8000ba0:	4a24      	ldr	r2, [pc, #144]	; (8000c34 <main+0x2d4>)
-  led_context.green_led_pin = LED_G_Pin;
- 8000ba2:	2040      	movs	r0, #64	; 0x40
- 8000ba4:	4013      	ands	r3, r2
- 8000ba6:	60bb      	str	r3, [r7, #8]
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
- 8000ba8:	683b      	ldr	r3, [r7, #0]
- 8000baa:	4a2f      	ldr	r2, [pc, #188]	; (8000c68 <main+0x308>)
-  led_context.blue_led_pin = LED_B_Pin;
- 8000bac:	2120      	movs	r1, #32
- 8000bae:	401a      	ands	r2, r3
- 8000bb0:	23a0      	movs	r3, #160	; 0xa0
- 8000bb2:	049b      	lsls	r3, r3, #18
- 8000bb4:	4313      	orrs	r3, r2
- 8000bb6:	603b      	str	r3, [r7, #0]
-  MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
- 8000bb8:	683b      	ldr	r3, [r7, #0]
- 8000bba:	4a2c      	ldr	r2, [pc, #176]	; (8000c6c <main+0x30c>)
- 8000bbc:	401a      	ands	r2, r3
- 8000bbe:	23a0      	movs	r3, #160	; 0xa0
- 8000bc0:	035b      	lsls	r3, r3, #13
- 8000bc2:	4313      	orrs	r3, r2
- 8000bc4:	603b      	str	r3, [r7, #0]
-  SET_BIT(I2Cx->CR1, I2C_CR1_PE);
- 8000bc6:	6833      	ldr	r3, [r6, #0]
-  led_init(&led_context, 50, 1000);
- 8000bc8:	22fa      	movs	r2, #250	; 0xfa
- 8000bca:	432b      	orrs	r3, r5
- 8000bcc:	6033      	str	r3, [r6, #0]
-  SET_BIT(LPUARTx->CR1, USART_CR1_UE);
- 8000bce:	683b      	ldr	r3, [r7, #0]
- 8000bd0:	0092      	lsls	r2, r2, #2
- 8000bd2:	431d      	orrs	r5, r3
-  led_context.red_led_port = LED_R_GPIO_Port;
- 8000bd4:	23a0      	movs	r3, #160	; 0xa0
- 8000bd6:	603d      	str	r5, [r7, #0]
-  led_context.red_led_pin = LED_R_Pin;
- 8000bd8:	2780      	movs	r7, #128	; 0x80
-  led_context.red_led_port = LED_R_GPIO_Port;
- 8000bda:	05db      	lsls	r3, r3, #23
-  led_context.green_led_pin = LED_G_Pin;
- 8000bdc:	900e      	str	r0, [sp, #56]	; 0x38
-  led_context.blue_led_pin = LED_B_Pin;
- 8000bde:	9110      	str	r1, [sp, #64]	; 0x40
-  led_init(&led_context, 50, 1000);
- 8000be0:	a80b      	add	r0, sp, #44	; 0x2c
- 8000be2:	3112      	adds	r1, #18
-  led_context.red_led_port = LED_R_GPIO_Port;
- 8000be4:	930b      	str	r3, [sp, #44]	; 0x2c
-  led_context.green_led_port = LED_G_GPIO_Port;
- 8000be6:	930d      	str	r3, [sp, #52]	; 0x34
-  led_context.blue_led_port = LED_B_GPIO_Port;
- 8000be8:	930f      	str	r3, [sp, #60]	; 0x3c
-  led_context.red_led_pin = LED_R_Pin;
- 8000bea:	970c      	str	r7, [sp, #48]	; 0x30
-  led_init(&led_context, 50, 1000);
- 8000bec:	f7ff fe06 	bl	80007fc <led_init>
-  led_set_color(0, 20, 0);
- 8000bf0:	0022      	movs	r2, r4
- 8000bf2:	2114      	movs	r1, #20
- 8000bf4:	0020      	movs	r0, r4
- 8000bf6:	f7ff fd7d 	bl	80006f4 <led_set_color>
-  i2c_init(&i2c_context);
- 8000bfa:	4668      	mov	r0, sp
-  i2c_context.i2c = I2C1;
- 8000bfc:	9600      	str	r6, [sp, #0]
-  i2c_init(&i2c_context);
- 8000bfe:	f7ff fd0f 	bl	8000620 <i2c_init>
-  scd4x_start_periodic_measurement();
- 8000c02:	f000 f845 	bl	8000c90 <scd4x_start_periodic_measurement>
-  LL_mDelay(2000);
- 8000c06:	20fa      	movs	r0, #250	; 0xfa
-	  LL_mDelay(1000);
- 8000c08:	24fa      	movs	r4, #250	; 0xfa
-  LL_mDelay(2000);
- 8000c0a:	00c0      	lsls	r0, r0, #3
- 8000c0c:	f000 fa66 	bl	80010dc <LL_mDelay>
-	  LL_mDelay(1000);
- 8000c10:	00a4      	lsls	r4, r4, #2
-	  scd4x_read_measurement(&co2, &T, &RH);
- 8000c12:	aa05      	add	r2, sp, #20
- 8000c14:	a902      	add	r1, sp, #8
- 8000c16:	a801      	add	r0, sp, #4
- 8000c18:	f000 f842 	bl	8000ca0 <scd4x_read_measurement>
-	  LL_mDelay(1000);
- 8000c1c:	0020      	movs	r0, r4
- 8000c1e:	f000 fa5d 	bl	80010dc <LL_mDelay>
-  while (1)
- 8000c22:	e7f6      	b.n	8000c12 <main+0x2b2>
- 8000c24:	40021000 	.word	0x40021000
- 8000c28:	e000e100 	.word	0xe000e100
- 8000c2c:	ff00ffff 	.word	0xff00ffff
- 8000c30:	40005400 	.word	0x40005400
- 8000c34:	ffff7fff 	.word	0xffff7fff
- 8000c38:	fff7ffff 	.word	0xfff7ffff
- 8000c3c:	fffdffff 	.word	0xfffdffff
- 8000c40:	fffff801 	.word	0xfffff801
- 8000c44:	50000400 	.word	0x50000400
- 8000c48:	400200a8 	.word	0x400200a8
- 8000c4c:	fffff0ff 	.word	0xfffff0ff
- 8000c50:	40020030 	.word	0x40020030
- 8000c54:	ffffbfef 	.word	0xffffbfef
- 8000c58:	ffffcfff 	.word	0xffffcfff
- 8000c5c:	fffffcff 	.word	0xfffffcff
- 8000c60:	40004800 	.word	0x40004800
- 8000c64:	fffff3ff 	.word	0xfffff3ff
- 8000c68:	fc1fffff 	.word	0xfc1fffff
- 8000c6c:	ffe0ffff 	.word	0xffe0ffff
+ 80017e4:	003a      	movs	r2, r7
+ 80017e6:	23a0      	movs	r3, #160	; 0xa0
+ 80017e8:	05db      	lsls	r3, r3, #23
+ 80017ea:	0011      	movs	r1, r2
+ 80017ec:	0018      	movs	r0, r3
+ 80017ee:	f000 f9d1 	bl	8001b94 <LL_GPIO_Init>
 
-08000c70 <scd4x_send_cmd>:
+  /**/
+  GPIO_InitStruct.Pin = LED_R_Pin;
+ 80017f2:	003b      	movs	r3, r7
+ 80017f4:	2280      	movs	r2, #128	; 0x80
+ 80017f6:	601a      	str	r2, [r3, #0]
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
+ 80017f8:	003b      	movs	r3, r7
+ 80017fa:	2201      	movs	r2, #1
+ 80017fc:	605a      	str	r2, [r3, #4]
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
+ 80017fe:	003b      	movs	r3, r7
+ 8001800:	2200      	movs	r2, #0
+ 8001802:	609a      	str	r2, [r3, #8]
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 8001804:	003b      	movs	r3, r7
+ 8001806:	2200      	movs	r2, #0
+ 8001808:	60da      	str	r2, [r3, #12]
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 800180a:	003b      	movs	r3, r7
+ 800180c:	2200      	movs	r2, #0
+ 800180e:	611a      	str	r2, [r3, #16]
+  LL_GPIO_Init(LED_R_GPIO_Port, &GPIO_InitStruct);
+ 8001810:	003a      	movs	r2, r7
+ 8001812:	23a0      	movs	r3, #160	; 0xa0
+ 8001814:	05db      	lsls	r3, r3, #23
+ 8001816:	0011      	movs	r1, r2
+ 8001818:	0018      	movs	r0, r3
+ 800181a:	f000 f9bb 	bl	8001b94 <LL_GPIO_Init>
+
+}
+ 800181e:	46c0      	nop			; (mov r8, r8)
+ 8001820:	46bd      	mov	sp, r7
+ 8001822:	b006      	add	sp, #24
+ 8001824:	bd80      	pop	{r7, pc}
+
+08001826 <scd4x_send_cmd>:
  */
 
 #include "scd4x.h"
 
 int8_t scd4x_send_cmd(scd4x_cmd_t cmd)
 {
- 8000c70:	b500      	push	{lr}
- 8000c72:	b089      	sub	sp, #36	; 0x24
+ 8001826:	b580      	push	{r7, lr}
+ 8001828:	b08c      	sub	sp, #48	; 0x30
+ 800182a:	af00      	add	r7, sp, #0
+ 800182c:	0002      	movs	r2, r0
+ 800182e:	1dbb      	adds	r3, r7, #6
+ 8001830:	801a      	strh	r2, [r3, #0]
 	uint8_t buffer[32];
 	int result;
 
 	// start measurement
 	buffer[0] = cmd >> 8;
- 8000c74:	466a      	mov	r2, sp
- 8000c76:	0a03      	lsrs	r3, r0, #8
- 8000c78:	7013      	strb	r3, [r2, #0]
+ 8001832:	1dbb      	adds	r3, r7, #6
+ 8001834:	881b      	ldrh	r3, [r3, #0]
+ 8001836:	0a1b      	lsrs	r3, r3, #8
+ 8001838:	b29b      	uxth	r3, r3
+ 800183a:	b2da      	uxtb	r2, r3
+ 800183c:	210c      	movs	r1, #12
+ 800183e:	187b      	adds	r3, r7, r1
+ 8001840:	701a      	strb	r2, [r3, #0]
 	buffer[1] = cmd & 0x00ff;
- 8000c7a:	7050      	strb	r0, [r2, #1]
+ 8001842:	1dbb      	adds	r3, r7, #6
+ 8001844:	881b      	ldrh	r3, [r3, #0]
+ 8001846:	b2da      	uxtb	r2, r3
+ 8001848:	187b      	adds	r3, r7, r1
+ 800184a:	705a      	strb	r2, [r3, #1]
 	result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2);
- 8000c7c:	4669      	mov	r1, sp
- 8000c7e:	2202      	movs	r2, #2
- 8000c80:	20c4      	movs	r0, #196	; 0xc4
- 8000c82:	f7ff fcd9 	bl	8000638 <i2c_transmit>
+ 800184c:	187b      	adds	r3, r7, r1
+ 800184e:	2202      	movs	r2, #2
+ 8001850:	0019      	movs	r1, r3
+ 8001852:	20c4      	movs	r0, #196	; 0xc4
+ 8001854:	f7fe ff8a 	bl	800076c <i2c_transmit>
+ 8001858:	0003      	movs	r3, r0
+ 800185a:	62fb      	str	r3, [r7, #44]	; 0x2c
 	if (result != I2C_OK) {
- 8000c86:	1e43      	subs	r3, r0, #1
- 8000c88:	4198      	sbcs	r0, r3
- 8000c8a:	4240      	negs	r0, r0
+ 800185c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 800185e:	2b00      	cmp	r3, #0
+ 8001860:	d002      	beq.n	8001868 <scd4x_send_cmd+0x42>
 		return SCD4X_ERROR;
+ 8001862:	2301      	movs	r3, #1
+ 8001864:	425b      	negs	r3, r3
+ 8001866:	e000      	b.n	800186a <scd4x_send_cmd+0x44>
 	}
 
 	return SCD4X_OK;
+ 8001868:	2300      	movs	r3, #0
 }
- 8000c8c:	b009      	add	sp, #36	; 0x24
- 8000c8e:	bd00      	pop	{pc}
+ 800186a:	0018      	movs	r0, r3
+ 800186c:	46bd      	mov	sp, r7
+ 800186e:	b00c      	add	sp, #48	; 0x30
+ 8001870:	bd80      	pop	{r7, pc}
+	...
 
-08000c90 <scd4x_start_periodic_measurement>:
+08001874 <scd4x_start_periodic_measurement>:
 {
 
 }
 
 int8_t scd4x_start_periodic_measurement( void )
 {
- 8000c90:	b510      	push	{r4, lr}
+ 8001874:	b580      	push	{r7, lr}
+ 8001876:	af00      	add	r7, sp, #0
 	return scd4x_send_cmd(START_PERIODIC_MEASUREMENT);
- 8000c92:	4802      	ldr	r0, [pc, #8]	; (8000c9c <scd4x_start_periodic_measurement+0xc>)
- 8000c94:	f7ff ffec 	bl	8000c70 <scd4x_send_cmd>
+ 8001878:	4b03      	ldr	r3, [pc, #12]	; (8001888 <scd4x_start_periodic_measurement+0x14>)
+ 800187a:	0018      	movs	r0, r3
+ 800187c:	f7ff ffd3 	bl	8001826 <scd4x_send_cmd>
+ 8001880:	0003      	movs	r3, r0
 }
- 8000c98:	bd10      	pop	{r4, pc}
- 8000c9a:	46c0      	nop			; (mov r8, r8)
- 8000c9c:	000021b1 	.word	0x000021b1
+ 8001882:	0018      	movs	r0, r3
+ 8001884:	46bd      	mov	sp, r7
+ 8001886:	bd80      	pop	{r7, pc}
+ 8001888:	000021b1 	.word	0x000021b1
 
-08000ca0 <scd4x_read_measurement>:
+0800188c <scd4x_read_measurement>:
 {
 	return scd4x_send_cmd(PERFORM_FACTORY_RESET);
 }
 
 int8_t scd4x_read_measurement(int * co2, int *temperature, int *relative_humidity)
 {
- 8000ca0:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 800188c:	b590      	push	{r4, r7, lr}
+ 800188e:	b093      	sub	sp, #76	; 0x4c
+ 8001890:	af00      	add	r7, sp, #0
+ 8001892:	60f8      	str	r0, [r7, #12]
+ 8001894:	60b9      	str	r1, [r7, #8]
+ 8001896:	607a      	str	r2, [r7, #4]
 		return SCD4X_ERROR;
 	}*/
 
 
 	// start measurement
 	buffer[0] = READ_MEASUREMENT >> 8;
- 8000ca2:	4b1f      	ldr	r3, [pc, #124]	; (8000d20 <scd4x_read_measurement+0x80>)
-{
- 8000ca4:	b08b      	sub	sp, #44	; 0x2c
- 8000ca6:	0015      	movs	r5, r2
-	buffer[0] = READ_MEASUREMENT >> 8;
- 8000ca8:	aa02      	add	r2, sp, #8
-{
- 8000caa:	0007      	movs	r7, r0
- 8000cac:	000e      	movs	r6, r1
-	buffer[0] = READ_MEASUREMENT >> 8;
- 8000cae:	8013      	strh	r3, [r2, #0]
+ 8001898:	2410      	movs	r4, #16
+ 800189a:	193b      	adds	r3, r7, r4
+ 800189c:	22ec      	movs	r2, #236	; 0xec
+ 800189e:	701a      	strb	r2, [r3, #0]
 	buffer[1] = READ_MEASUREMENT & 0x00ff;
+ 80018a0:	193b      	adds	r3, r7, r4
+ 80018a2:	2205      	movs	r2, #5
+ 80018a4:	705a      	strb	r2, [r3, #1]
 	result = i2c_transmit(SCD4X_I2C_ADDRESS<<1, buffer, 2);
- 8000cb0:	20c4      	movs	r0, #196	; 0xc4
- 8000cb2:	2202      	movs	r2, #2
- 8000cb4:	a902      	add	r1, sp, #8
- 8000cb6:	f7ff fcbf 	bl	8000638 <i2c_transmit>
-	if (result != I2C_OK) {
- 8000cba:	2800      	cmp	r0, #0
- 8000cbc:	d003      	beq.n	8000cc6 <scd4x_read_measurement+0x26>
+ 80018a6:	193b      	adds	r3, r7, r4
+ 80018a8:	2202      	movs	r2, #2
+ 80018aa:	0019      	movs	r1, r3
+ 80018ac:	20c4      	movs	r0, #196	; 0xc4
+ 80018ae:	f7fe ff5d 	bl	800076c <i2c_transmit>
+ 80018b2:	0003      	movs	r3, r0
+ 80018b4:	643b      	str	r3, [r7, #64]	; 0x40
 		return SCD4X_ERROR;
- 8000cbe:	2001      	movs	r0, #1
- 8000cc0:	4240      	negs	r0, r0
-	*co2 = co2_ticks;
-	*temperature = t_degC;
-	*relative_humidity = rh_pRH;
+	}*/
 
-	return SCD4X_OK;
-}
- 8000cc2:	b00b      	add	sp, #44	; 0x2c
- 8000cc4:	bdf0      	pop	{r4, r5, r6, r7, pc}
-	LL_mDelay(10); // 10 ms should be enough
- 8000cc6:	200a      	movs	r0, #10
- 8000cc8:	f000 fa08 	bl	80010dc <LL_mDelay>
+	//LL_mDelay(1); // 10 ms should be enough
+	// read out
 	result = i2c_receive(SCD4X_I2C_ADDRESS<<1, buffer, 9);
- 8000ccc:	2209      	movs	r2, #9
- 8000cce:	20c4      	movs	r0, #196	; 0xc4
- 8000cd0:	a902      	add	r1, sp, #8
- 8000cd2:	f7ff fce3 	bl	800069c <i2c_receive>
- 8000cd6:	1e04      	subs	r4, r0, #0
+ 80018b6:	193b      	adds	r3, r7, r4
+ 80018b8:	2209      	movs	r2, #9
+ 80018ba:	0019      	movs	r1, r3
+ 80018bc:	20c4      	movs	r0, #196	; 0xc4
+ 80018be:	f7fe ffb3 	bl	8000828 <i2c_receive>
+ 80018c2:	0003      	movs	r3, r0
+ 80018c4:	643b      	str	r3, [r7, #64]	; 0x40
 	if (result != I2C_OK)
- 8000cd8:	d1f1      	bne.n	8000cbe <scd4x_read_measurement+0x1e>
-	uint32_t t_ticks = (buffer[3] << 8) + buffer[4];
- 8000cda:	ab02      	add	r3, sp, #8
- 8000cdc:	78d8      	ldrb	r0, [r3, #3]
- 8000cde:	791b      	ldrb	r3, [r3, #4]
- 8000ce0:	0200      	lsls	r0, r0, #8
- 8000ce2:	18c0      	adds	r0, r0, r3
-	int t_degC = -45 + 175 * t_ticks / 65535;
- 8000ce4:	23af      	movs	r3, #175	; 0xaf
- 8000ce6:	490f      	ldr	r1, [pc, #60]	; (8000d24 <scd4x_read_measurement+0x84>)
- 8000ce8:	4358      	muls	r0, r3
- 8000cea:	f7ff fa0d 	bl	8000108 <__udivsi3>
- 8000cee:	382d      	subs	r0, #45	; 0x2d
- 8000cf0:	9001      	str	r0, [sp, #4]
-	uint32_t rh_ticks = (buffer[6] << 8) + buffer[7];
- 8000cf2:	ab02      	add	r3, sp, #8
- 8000cf4:	7998      	ldrb	r0, [r3, #6]
- 8000cf6:	79db      	ldrb	r3, [r3, #7]
- 8000cf8:	0200      	lsls	r0, r0, #8
- 8000cfa:	18c0      	adds	r0, r0, r3
-	int rh_pRH = 100 * rh_ticks / 65535;
- 8000cfc:	2364      	movs	r3, #100	; 0x64
- 8000cfe:	4909      	ldr	r1, [pc, #36]	; (8000d24 <scd4x_read_measurement+0x84>)
- 8000d00:	4358      	muls	r0, r3
- 8000d02:	f7ff fa01 	bl	8000108 <__udivsi3>
-	uint32_t co2_ticks = (buffer[0] << 8) + buffer[1];
- 8000d06:	ab02      	add	r3, sp, #8
- 8000d08:	781b      	ldrb	r3, [r3, #0]
- 8000d0a:	aa02      	add	r2, sp, #8
- 8000d0c:	7852      	ldrb	r2, [r2, #1]
- 8000d0e:	021b      	lsls	r3, r3, #8
- 8000d10:	189b      	adds	r3, r3, r2
-	*co2 = co2_ticks;
- 8000d12:	603b      	str	r3, [r7, #0]
-	*temperature = t_degC;
- 8000d14:	9b01      	ldr	r3, [sp, #4]
- 8000d16:	6033      	str	r3, [r6, #0]
-	*relative_humidity = rh_pRH;
- 8000d18:	6028      	str	r0, [r5, #0]
-	return SCD4X_OK;
- 8000d1a:	0020      	movs	r0, r4
- 8000d1c:	e7d1      	b.n	8000cc2 <scd4x_read_measurement+0x22>
- 8000d1e:	46c0      	nop			; (mov r8, r8)
- 8000d20:	000005ec 	.word	0x000005ec
- 8000d24:	0000ffff 	.word	0x0000ffff
+ 80018c6:	6c3b      	ldr	r3, [r7, #64]	; 0x40
+ 80018c8:	2b00      	cmp	r3, #0
+ 80018ca:	d002      	beq.n	80018d2 <scd4x_read_measurement+0x46>
+	{
+		return SCD4X_ERROR;
+ 80018cc:	2301      	movs	r3, #1
+ 80018ce:	425b      	negs	r3, r3
+ 80018d0:	e03d      	b.n	800194e <scd4x_read_measurement+0xc2>
+	}
 
-08000d28 <NMI_Handler>:
+	// TODO checksum
+	// Convert to T and RH; taken directly from pseudocode in SHT4x datasheet, page 3
+	uint32_t co2_ticks = (buffer[0] << 8) + buffer[1];
+ 80018d2:	2110      	movs	r1, #16
+ 80018d4:	187b      	adds	r3, r7, r1
+ 80018d6:	781b      	ldrb	r3, [r3, #0]
+ 80018d8:	021b      	lsls	r3, r3, #8
+ 80018da:	187a      	adds	r2, r7, r1
+ 80018dc:	7852      	ldrb	r2, [r2, #1]
+ 80018de:	189b      	adds	r3, r3, r2
+ 80018e0:	63fb      	str	r3, [r7, #60]	; 0x3c
+	uint32_t t_ticks = (buffer[3] << 8) + buffer[4];
+ 80018e2:	187b      	adds	r3, r7, r1
+ 80018e4:	78db      	ldrb	r3, [r3, #3]
+ 80018e6:	021b      	lsls	r3, r3, #8
+ 80018e8:	187a      	adds	r2, r7, r1
+ 80018ea:	7912      	ldrb	r2, [r2, #4]
+ 80018ec:	189b      	adds	r3, r3, r2
+ 80018ee:	63bb      	str	r3, [r7, #56]	; 0x38
+	uint32_t rh_ticks = (buffer[6] << 8) + buffer[7];
+ 80018f0:	000a      	movs	r2, r1
+ 80018f2:	18bb      	adds	r3, r7, r2
+ 80018f4:	799b      	ldrb	r3, [r3, #6]
+ 80018f6:	021b      	lsls	r3, r3, #8
+ 80018f8:	18ba      	adds	r2, r7, r2
+ 80018fa:	79d2      	ldrb	r2, [r2, #7]
+ 80018fc:	189b      	adds	r3, r3, r2
+ 80018fe:	637b      	str	r3, [r7, #52]	; 0x34
+	int t_degC = -45 + 175 * t_ticks / 65535;
+ 8001900:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8001902:	22af      	movs	r2, #175	; 0xaf
+ 8001904:	4353      	muls	r3, r2
+ 8001906:	4914      	ldr	r1, [pc, #80]	; (8001958 <scd4x_read_measurement+0xcc>)
+ 8001908:	0018      	movs	r0, r3
+ 800190a:	f7fe fbfd 	bl	8000108 <__udivsi3>
+ 800190e:	0003      	movs	r3, r0
+ 8001910:	3b2d      	subs	r3, #45	; 0x2d
+ 8001912:	633b      	str	r3, [r7, #48]	; 0x30
+	int rh_pRH = 100 * rh_ticks / 65535;
+ 8001914:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 8001916:	2264      	movs	r2, #100	; 0x64
+ 8001918:	4353      	muls	r3, r2
+ 800191a:	490f      	ldr	r1, [pc, #60]	; (8001958 <scd4x_read_measurement+0xcc>)
+ 800191c:	0018      	movs	r0, r3
+ 800191e:	f7fe fbf3 	bl	8000108 <__udivsi3>
+ 8001922:	0003      	movs	r3, r0
+ 8001924:	647b      	str	r3, [r7, #68]	; 0x44
+	if (rh_pRH > 100) {
+ 8001926:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8001928:	2b64      	cmp	r3, #100	; 0x64
+ 800192a:	dd01      	ble.n	8001930 <scd4x_read_measurement+0xa4>
+			rh_pRH = 100;
+ 800192c:	2364      	movs	r3, #100	; 0x64
+ 800192e:	647b      	str	r3, [r7, #68]	; 0x44
+	}
+	if (rh_pRH < 0) {
+ 8001930:	6c7b      	ldr	r3, [r7, #68]	; 0x44
+ 8001932:	2b00      	cmp	r3, #0
+ 8001934:	da01      	bge.n	800193a <scd4x_read_measurement+0xae>
+		rh_pRH = 0;
+ 8001936:	2300      	movs	r3, #0
+ 8001938:	647b      	str	r3, [r7, #68]	; 0x44
+	}
+	*co2 = co2_ticks;
+ 800193a:	6bfa      	ldr	r2, [r7, #60]	; 0x3c
+ 800193c:	68fb      	ldr	r3, [r7, #12]
+ 800193e:	601a      	str	r2, [r3, #0]
+	*temperature = t_degC;
+ 8001940:	68bb      	ldr	r3, [r7, #8]
+ 8001942:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 8001944:	601a      	str	r2, [r3, #0]
+	*relative_humidity = rh_pRH;
+ 8001946:	687b      	ldr	r3, [r7, #4]
+ 8001948:	6c7a      	ldr	r2, [r7, #68]	; 0x44
+ 800194a:	601a      	str	r2, [r3, #0]
+
+	return SCD4X_OK;
+ 800194c:	2300      	movs	r3, #0
+}
+ 800194e:	0018      	movs	r0, r3
+ 8001950:	46bd      	mov	sp, r7
+ 8001952:	b013      	add	sp, #76	; 0x4c
+ 8001954:	bd90      	pop	{r4, r7, pc}
+ 8001956:	46c0      	nop			; (mov r8, r8)
+ 8001958:	0000ffff 	.word	0x0000ffff
+
+0800195c <NMI_Handler>:
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
 {
+ 800195c:	b580      	push	{r7, lr}
+ 800195e:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   while (1)
- 8000d28:	e7fe      	b.n	8000d28 <NMI_Handler>
+ 8001960:	e7fe      	b.n	8001960 <NMI_Handler+0x4>
 
-08000d2a <HardFault_Handler>:
+08001962 <HardFault_Handler>:
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
 void HardFault_Handler(void)
 {
+ 8001962:	b580      	push	{r7, lr}
+ 8001964:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
- 8000d2a:	e7fe      	b.n	8000d2a <HardFault_Handler>
+ 8001966:	e7fe      	b.n	8001966 <HardFault_Handler+0x4>
 
-08000d2c <SVC_Handler>:
+08001968 <SVC_Handler>:
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+ 8001968:	b580      	push	{r7, lr}
+ 800196a:	af00      	add	r7, sp, #0
 
   /* USER CODE END SVC_IRQn 0 */
   /* USER CODE BEGIN SVC_IRQn 1 */
 
   /* USER CODE END SVC_IRQn 1 */
 }
- 8000d2c:	4770      	bx	lr
+ 800196c:	46c0      	nop			; (mov r8, r8)
+ 800196e:	46bd      	mov	sp, r7
+ 8001970:	bd80      	pop	{r7, pc}
 
-08000d2e <PendSV_Handler>:
- 8000d2e:	4770      	bx	lr
+08001972 <PendSV_Handler>:
 
-08000d30 <SysTick_Handler>:
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+ 8001972:	b580      	push	{r7, lr}
+ 8001974:	af00      	add	r7, sp, #0
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+ 8001976:	46c0      	nop			; (mov r8, r8)
+ 8001978:	46bd      	mov	sp, r7
+ 800197a:	bd80      	pop	{r7, pc}
+
+0800197c <SysTick_Handler>:
 
 /**
   * @brief This function handles System tick timer.
   */
 void SysTick_Handler(void)
 {
- 8000d30:	b510      	push	{r4, lr}
+ 800197c:	b580      	push	{r7, lr}
+ 800197e:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN SysTick_IRQn 0 */
 
   /* USER CODE END SysTick_IRQn 0 */
 
   /* USER CODE BEGIN SysTick_IRQn 1 */
   led_pwm_handler();
- 8000d32:	f7ff fd01 	bl	8000738 <led_pwm_handler>
+ 8001980:	f7ff f830 	bl	80009e4 <led_pwm_handler>
   /* USER CODE END SysTick_IRQn 1 */
 }
- 8000d36:	bd10      	pop	{r4, pc}
+ 8001984:	46c0      	nop			; (mov r8, r8)
+ 8001986:	46bd      	mov	sp, r7
+ 8001988:	bd80      	pop	{r7, pc}
 
-08000d38 <DMA1_Channel2_3_IRQHandler>:
- 8000d38:	4770      	bx	lr
+0800198a <DMA1_Channel2_3_IRQHandler>:
 
-08000d3a <SystemInit>:
+/**
+  * @brief This function handles DMA1 channel 2 and channel 3 interrupts.
+  */
+void DMA1_Channel2_3_IRQHandler(void)
 {
+ 800198a:	b580      	push	{r7, lr}
+ 800198c:	af00      	add	r7, sp, #0
+  /* USER CODE END DMA1_Channel2_3_IRQn 0 */
+
+  /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel2_3_IRQn 1 */
+}
+ 800198e:	46c0      	nop			; (mov r8, r8)
+ 8001990:	46bd      	mov	sp, r7
+ 8001992:	bd80      	pop	{r7, pc}
+
+08001994 <SystemInit>:
+  * @brief  Setup the microcontroller system.
+  * @param  None
+  * @retval None
+  */
+void SystemInit (void)
+{
+ 8001994:	b580      	push	{r7, lr}
+ 8001996:	af00      	add	r7, sp, #0
   /* Configure the Vector Table location add offset address ------------------*/
 #if defined (USER_VECT_TAB_ADDRESS)
   SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #endif /* USER_VECT_TAB_ADDRESS */
 }
- 8000d3a:	4770      	bx	lr
+ 8001998:	46c0      	nop			; (mov r8, r8)
+ 800199a:	46bd      	mov	sp, r7
+ 800199c:	bd80      	pop	{r7, pc}
+	...
 
-08000d3c <Reset_Handler>:
+080019a0 <Reset_Handler>:
 
     .section  .text.Reset_Handler
   .weak  Reset_Handler
   .type  Reset_Handler, %function
 Reset_Handler:  
    ldr   r0, =_estack
- 8000d3c:	4813      	ldr	r0, [pc, #76]	; (8000d8c <LoopForever+0x2>)
+ 80019a0:	4813      	ldr	r0, [pc, #76]	; (80019f0 <LoopForever+0x2>)
    mov   sp, r0          /* set stack pointer */
- 8000d3e:	4685      	mov	sp, r0
+ 80019a2:	4685      	mov	sp, r0
 
 /*Check if boot space corresponds to system memory*/
 
     LDR R0,=0x00000004
- 8000d40:	4813      	ldr	r0, [pc, #76]	; (8000d90 <LoopForever+0x6>)
+ 80019a4:	4813      	ldr	r0, [pc, #76]	; (80019f4 <LoopForever+0x6>)
     LDR R1, [R0]
- 8000d42:	6801      	ldr	r1, [r0, #0]
+ 80019a6:	6801      	ldr	r1, [r0, #0]
     LSRS R1, R1, #24
- 8000d44:	0e09      	lsrs	r1, r1, #24
+ 80019a8:	0e09      	lsrs	r1, r1, #24
     LDR R2,=0x1F
- 8000d46:	4a13      	ldr	r2, [pc, #76]	; (8000d94 <LoopForever+0xa>)
+ 80019aa:	4a13      	ldr	r2, [pc, #76]	; (80019f8 <LoopForever+0xa>)
     CMP R1, R2
- 8000d48:	4291      	cmp	r1, r2
+ 80019ac:	4291      	cmp	r1, r2
     BNE ApplicationStart
- 8000d4a:	d105      	bne.n	8000d58 <ApplicationStart>
+ 80019ae:	d105      	bne.n	80019bc <ApplicationStart>
 
  /*SYSCFG clock enable*/
     LDR R0,=0x40021034
- 8000d4c:	4812      	ldr	r0, [pc, #72]	; (8000d98 <LoopForever+0xe>)
+ 80019b0:	4812      	ldr	r0, [pc, #72]	; (80019fc <LoopForever+0xe>)
     LDR R1,=0x00000001
- 8000d4e:	4913      	ldr	r1, [pc, #76]	; (8000d9c <LoopForever+0x12>)
+ 80019b2:	4913      	ldr	r1, [pc, #76]	; (8001a00 <LoopForever+0x12>)
     STR R1, [R0]
- 8000d50:	6001      	str	r1, [r0, #0]
+ 80019b4:	6001      	str	r1, [r0, #0]
 
 /*Set CFGR1 register with flash memory remap at address 0*/
     LDR R0,=0x40010000
- 8000d52:	4813      	ldr	r0, [pc, #76]	; (8000da0 <LoopForever+0x16>)
+ 80019b6:	4813      	ldr	r0, [pc, #76]	; (8001a04 <LoopForever+0x16>)
     LDR R1,=0x00000000
- 8000d54:	4913      	ldr	r1, [pc, #76]	; (8000da4 <LoopForever+0x1a>)
+ 80019b8:	4913      	ldr	r1, [pc, #76]	; (8001a08 <LoopForever+0x1a>)
     STR R1, [R0]
- 8000d56:	6001      	str	r1, [r0, #0]
+ 80019ba:	6001      	str	r1, [r0, #0]
 
-08000d58 <ApplicationStart>:
+080019bc <ApplicationStart>:
 
 ApplicationStart:
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
- 8000d58:	4813      	ldr	r0, [pc, #76]	; (8000da8 <LoopForever+0x1e>)
+ 80019bc:	4813      	ldr	r0, [pc, #76]	; (8001a0c <LoopForever+0x1e>)
   ldr r1, =_edata
- 8000d5a:	4914      	ldr	r1, [pc, #80]	; (8000dac <LoopForever+0x22>)
+ 80019be:	4914      	ldr	r1, [pc, #80]	; (8001a10 <LoopForever+0x22>)
   ldr r2, =_sidata
- 8000d5c:	4a14      	ldr	r2, [pc, #80]	; (8000db0 <LoopForever+0x26>)
+ 80019c0:	4a14      	ldr	r2, [pc, #80]	; (8001a14 <LoopForever+0x26>)
   movs r3, #0
- 8000d5e:	2300      	movs	r3, #0
+ 80019c2:	2300      	movs	r3, #0
   b LoopCopyDataInit
- 8000d60:	e002      	b.n	8000d68 <LoopCopyDataInit>
+ 80019c4:	e002      	b.n	80019cc <LoopCopyDataInit>
 
-08000d62 <CopyDataInit>:
+080019c6 <CopyDataInit>:
 
 CopyDataInit:
   ldr r4, [r2, r3]
- 8000d62:	58d4      	ldr	r4, [r2, r3]
+ 80019c6:	58d4      	ldr	r4, [r2, r3]
   str r4, [r0, r3]
- 8000d64:	50c4      	str	r4, [r0, r3]
+ 80019c8:	50c4      	str	r4, [r0, r3]
   adds r3, r3, #4
- 8000d66:	3304      	adds	r3, #4
+ 80019ca:	3304      	adds	r3, #4
 
-08000d68 <LoopCopyDataInit>:
+080019cc <LoopCopyDataInit>:
 
 LoopCopyDataInit:
   adds r4, r0, r3
- 8000d68:	18c4      	adds	r4, r0, r3
+ 80019cc:	18c4      	adds	r4, r0, r3
   cmp r4, r1
- 8000d6a:	428c      	cmp	r4, r1
+ 80019ce:	428c      	cmp	r4, r1
   bcc CopyDataInit
- 8000d6c:	d3f9      	bcc.n	8000d62 <CopyDataInit>
+ 80019d0:	d3f9      	bcc.n	80019c6 <CopyDataInit>
   
 /* Zero fill the bss segment. */
   ldr r2, =_sbss
- 8000d6e:	4a11      	ldr	r2, [pc, #68]	; (8000db4 <LoopForever+0x2a>)
+ 80019d2:	4a11      	ldr	r2, [pc, #68]	; (8001a18 <LoopForever+0x2a>)
   ldr r4, =_ebss
- 8000d70:	4c11      	ldr	r4, [pc, #68]	; (8000db8 <LoopForever+0x2e>)
+ 80019d4:	4c11      	ldr	r4, [pc, #68]	; (8001a1c <LoopForever+0x2e>)
   movs r3, #0
- 8000d72:	2300      	movs	r3, #0
+ 80019d6:	2300      	movs	r3, #0
   b LoopFillZerobss
- 8000d74:	e001      	b.n	8000d7a <LoopFillZerobss>
+ 80019d8:	e001      	b.n	80019de <LoopFillZerobss>
 
-08000d76 <FillZerobss>:
+080019da <FillZerobss>:
 
 FillZerobss:
   str  r3, [r2]
- 8000d76:	6013      	str	r3, [r2, #0]
+ 80019da:	6013      	str	r3, [r2, #0]
   adds r2, r2, #4
- 8000d78:	3204      	adds	r2, #4
+ 80019dc:	3204      	adds	r2, #4
 
-08000d7a <LoopFillZerobss>:
+080019de <LoopFillZerobss>:
 
 LoopFillZerobss:
   cmp r2, r4
- 8000d7a:	42a2      	cmp	r2, r4
+ 80019de:	42a2      	cmp	r2, r4
   bcc FillZerobss
- 8000d7c:	d3fb      	bcc.n	8000d76 <FillZerobss>
+ 80019e0:	d3fb      	bcc.n	80019da <FillZerobss>
 
 /* Call the clock system intitialization function.*/
   bl  SystemInit
- 8000d7e:	f7ff ffdc 	bl	8000d3a <SystemInit>
+ 80019e2:	f7ff ffd7 	bl	8001994 <SystemInit>
 /* Call static constructors */
     bl __libc_init_array
- 8000d82:	f000 f9c7 	bl	8001114 <__libc_init_array>
+ 80019e6:	f000 fcb3 	bl	8002350 <__libc_init_array>
 /* Call the application's entry point.*/
   bl  main
- 8000d86:	f7ff fdeb 	bl	8000960 <main>
+ 80019ea:	f7ff fca9 	bl	8001340 <main>
 
-08000d8a <LoopForever>:
+080019ee <LoopForever>:
 
 LoopForever:
     b LoopForever
- 8000d8a:	e7fe      	b.n	8000d8a <LoopForever>
+ 80019ee:	e7fe      	b.n	80019ee <LoopForever>
    ldr   r0, =_estack
- 8000d8c:	20000800 	.word	0x20000800
+ 80019f0:	20000800 	.word	0x20000800
     LDR R0,=0x00000004
- 8000d90:	00000004 	.word	0x00000004
+ 80019f4:	00000004 	.word	0x00000004
     LDR R2,=0x1F
- 8000d94:	0000001f 	.word	0x0000001f
+ 80019f8:	0000001f 	.word	0x0000001f
     LDR R0,=0x40021034
- 8000d98:	40021034 	.word	0x40021034
+ 80019fc:	40021034 	.word	0x40021034
     LDR R1,=0x00000001
- 8000d9c:	00000001 	.word	0x00000001
+ 8001a00:	00000001 	.word	0x00000001
     LDR R0,=0x40010000
- 8000da0:	40010000 	.word	0x40010000
+ 8001a04:	40010000 	.word	0x40010000
     LDR R1,=0x00000000
- 8000da4:	00000000 	.word	0x00000000
+ 8001a08:	00000000 	.word	0x00000000
   ldr r0, =_sdata
- 8000da8:	20000000 	.word	0x20000000
+ 8001a0c:	20000000 	.word	0x20000000
   ldr r1, =_edata
- 8000dac:	20000004 	.word	0x20000004
+ 8001a10:	20000004 	.word	0x20000004
   ldr r2, =_sidata
- 8000db0:	080011b8 	.word	0x080011b8
+ 8001a14:	080023fc 	.word	0x080023fc
   ldr r2, =_sbss
- 8000db4:	20000004 	.word	0x20000004
+ 8001a18:	20000004 	.word	0x20000004
   ldr r4, =_ebss
- 8000db8:	20000048 	.word	0x20000048
+ 8001a1c:	20000048 	.word	0x20000048
 
-08000dbc <ADC1_COMP_IRQHandler>:
+08001a20 <ADC1_COMP_IRQHandler>:
  * @retval : None
 */
     .section  .text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
   b  Infinite_Loop
- 8000dbc:	e7fe      	b.n	8000dbc <ADC1_COMP_IRQHandler>
+ 8001a20:	e7fe      	b.n	8001a20 <ADC1_COMP_IRQHandler>
 
-08000dbe <LL_GPIO_Init>:
+08001a22 <LL_GPIO_SetPinMode>:
+{
+ 8001a22:	b580      	push	{r7, lr}
+ 8001a24:	b084      	sub	sp, #16
+ 8001a26:	af00      	add	r7, sp, #0
+ 8001a28:	60f8      	str	r0, [r7, #12]
+ 8001a2a:	60b9      	str	r1, [r7, #8]
+ 8001a2c:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODE0), ((Pin * Pin) * Mode));
+ 8001a2e:	68fb      	ldr	r3, [r7, #12]
+ 8001a30:	6819      	ldr	r1, [r3, #0]
+ 8001a32:	68bb      	ldr	r3, [r7, #8]
+ 8001a34:	435b      	muls	r3, r3
+ 8001a36:	001a      	movs	r2, r3
+ 8001a38:	0013      	movs	r3, r2
+ 8001a3a:	005b      	lsls	r3, r3, #1
+ 8001a3c:	189b      	adds	r3, r3, r2
+ 8001a3e:	43db      	mvns	r3, r3
+ 8001a40:	400b      	ands	r3, r1
+ 8001a42:	001a      	movs	r2, r3
+ 8001a44:	68bb      	ldr	r3, [r7, #8]
+ 8001a46:	435b      	muls	r3, r3
+ 8001a48:	6879      	ldr	r1, [r7, #4]
+ 8001a4a:	434b      	muls	r3, r1
+ 8001a4c:	431a      	orrs	r2, r3
+ 8001a4e:	68fb      	ldr	r3, [r7, #12]
+ 8001a50:	601a      	str	r2, [r3, #0]
+}
+ 8001a52:	46c0      	nop			; (mov r8, r8)
+ 8001a54:	46bd      	mov	sp, r7
+ 8001a56:	b004      	add	sp, #16
+ 8001a58:	bd80      	pop	{r7, pc}
+
+08001a5a <LL_GPIO_SetPinOutputType>:
+{
+ 8001a5a:	b580      	push	{r7, lr}
+ 8001a5c:	b084      	sub	sp, #16
+ 8001a5e:	af00      	add	r7, sp, #0
+ 8001a60:	60f8      	str	r0, [r7, #12]
+ 8001a62:	60b9      	str	r1, [r7, #8]
+ 8001a64:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
+ 8001a66:	68fb      	ldr	r3, [r7, #12]
+ 8001a68:	685b      	ldr	r3, [r3, #4]
+ 8001a6a:	68ba      	ldr	r2, [r7, #8]
+ 8001a6c:	43d2      	mvns	r2, r2
+ 8001a6e:	401a      	ands	r2, r3
+ 8001a70:	68bb      	ldr	r3, [r7, #8]
+ 8001a72:	6879      	ldr	r1, [r7, #4]
+ 8001a74:	434b      	muls	r3, r1
+ 8001a76:	431a      	orrs	r2, r3
+ 8001a78:	68fb      	ldr	r3, [r7, #12]
+ 8001a7a:	605a      	str	r2, [r3, #4]
+}
+ 8001a7c:	46c0      	nop			; (mov r8, r8)
+ 8001a7e:	46bd      	mov	sp, r7
+ 8001a80:	b004      	add	sp, #16
+ 8001a82:	bd80      	pop	{r7, pc}
+
+08001a84 <LL_GPIO_SetPinSpeed>:
+{
+ 8001a84:	b580      	push	{r7, lr}
+ 8001a86:	b084      	sub	sp, #16
+ 8001a88:	af00      	add	r7, sp, #0
+ 8001a8a:	60f8      	str	r0, [r7, #12]
+ 8001a8c:	60b9      	str	r1, [r7, #8]
+ 8001a8e:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDER_OSPEED0), ((Pin * Pin) * Speed));
+ 8001a90:	68fb      	ldr	r3, [r7, #12]
+ 8001a92:	6899      	ldr	r1, [r3, #8]
+ 8001a94:	68bb      	ldr	r3, [r7, #8]
+ 8001a96:	435b      	muls	r3, r3
+ 8001a98:	001a      	movs	r2, r3
+ 8001a9a:	0013      	movs	r3, r2
+ 8001a9c:	005b      	lsls	r3, r3, #1
+ 8001a9e:	189b      	adds	r3, r3, r2
+ 8001aa0:	43db      	mvns	r3, r3
+ 8001aa2:	400b      	ands	r3, r1
+ 8001aa4:	001a      	movs	r2, r3
+ 8001aa6:	68bb      	ldr	r3, [r7, #8]
+ 8001aa8:	435b      	muls	r3, r3
+ 8001aaa:	6879      	ldr	r1, [r7, #4]
+ 8001aac:	434b      	muls	r3, r1
+ 8001aae:	431a      	orrs	r2, r3
+ 8001ab0:	68fb      	ldr	r3, [r7, #12]
+ 8001ab2:	609a      	str	r2, [r3, #8]
+}
+ 8001ab4:	46c0      	nop			; (mov r8, r8)
+ 8001ab6:	46bd      	mov	sp, r7
+ 8001ab8:	b004      	add	sp, #16
+ 8001aba:	bd80      	pop	{r7, pc}
+
+08001abc <LL_GPIO_SetPinPull>:
+{
+ 8001abc:	b580      	push	{r7, lr}
+ 8001abe:	b084      	sub	sp, #16
+ 8001ac0:	af00      	add	r7, sp, #0
+ 8001ac2:	60f8      	str	r0, [r7, #12]
+ 8001ac4:	60b9      	str	r1, [r7, #8]
+ 8001ac6:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPD0), ((Pin * Pin) * Pull));
+ 8001ac8:	68fb      	ldr	r3, [r7, #12]
+ 8001aca:	68d9      	ldr	r1, [r3, #12]
+ 8001acc:	68bb      	ldr	r3, [r7, #8]
+ 8001ace:	435b      	muls	r3, r3
+ 8001ad0:	001a      	movs	r2, r3
+ 8001ad2:	0013      	movs	r3, r2
+ 8001ad4:	005b      	lsls	r3, r3, #1
+ 8001ad6:	189b      	adds	r3, r3, r2
+ 8001ad8:	43db      	mvns	r3, r3
+ 8001ada:	400b      	ands	r3, r1
+ 8001adc:	001a      	movs	r2, r3
+ 8001ade:	68bb      	ldr	r3, [r7, #8]
+ 8001ae0:	435b      	muls	r3, r3
+ 8001ae2:	6879      	ldr	r1, [r7, #4]
+ 8001ae4:	434b      	muls	r3, r1
+ 8001ae6:	431a      	orrs	r2, r3
+ 8001ae8:	68fb      	ldr	r3, [r7, #12]
+ 8001aea:	60da      	str	r2, [r3, #12]
+}
+ 8001aec:	46c0      	nop			; (mov r8, r8)
+ 8001aee:	46bd      	mov	sp, r7
+ 8001af0:	b004      	add	sp, #16
+ 8001af2:	bd80      	pop	{r7, pc}
+
+08001af4 <LL_GPIO_SetAFPin_0_7>:
+{
+ 8001af4:	b580      	push	{r7, lr}
+ 8001af6:	b084      	sub	sp, #16
+ 8001af8:	af00      	add	r7, sp, #0
+ 8001afa:	60f8      	str	r0, [r7, #12]
+ 8001afc:	60b9      	str	r1, [r7, #8]
+ 8001afe:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0),
+ 8001b00:	68fb      	ldr	r3, [r7, #12]
+ 8001b02:	6a19      	ldr	r1, [r3, #32]
+ 8001b04:	68bb      	ldr	r3, [r7, #8]
+ 8001b06:	435b      	muls	r3, r3
+ 8001b08:	68ba      	ldr	r2, [r7, #8]
+ 8001b0a:	4353      	muls	r3, r2
+ 8001b0c:	68ba      	ldr	r2, [r7, #8]
+ 8001b0e:	435a      	muls	r2, r3
+ 8001b10:	0013      	movs	r3, r2
+ 8001b12:	011b      	lsls	r3, r3, #4
+ 8001b14:	1a9b      	subs	r3, r3, r2
+ 8001b16:	43db      	mvns	r3, r3
+ 8001b18:	400b      	ands	r3, r1
+ 8001b1a:	001a      	movs	r2, r3
+ 8001b1c:	68bb      	ldr	r3, [r7, #8]
+ 8001b1e:	435b      	muls	r3, r3
+ 8001b20:	68b9      	ldr	r1, [r7, #8]
+ 8001b22:	434b      	muls	r3, r1
+ 8001b24:	68b9      	ldr	r1, [r7, #8]
+ 8001b26:	434b      	muls	r3, r1
+ 8001b28:	6879      	ldr	r1, [r7, #4]
+ 8001b2a:	434b      	muls	r3, r1
+ 8001b2c:	431a      	orrs	r2, r3
+ 8001b2e:	68fb      	ldr	r3, [r7, #12]
+ 8001b30:	621a      	str	r2, [r3, #32]
+}
+ 8001b32:	46c0      	nop			; (mov r8, r8)
+ 8001b34:	46bd      	mov	sp, r7
+ 8001b36:	b004      	add	sp, #16
+ 8001b38:	bd80      	pop	{r7, pc}
+
+08001b3a <LL_GPIO_SetAFPin_8_15>:
+{
+ 8001b3a:	b580      	push	{r7, lr}
+ 8001b3c:	b084      	sub	sp, #16
+ 8001b3e:	af00      	add	r7, sp, #0
+ 8001b40:	60f8      	str	r0, [r7, #12]
+ 8001b42:	60b9      	str	r1, [r7, #8]
+ 8001b44:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8),
+ 8001b46:	68fb      	ldr	r3, [r7, #12]
+ 8001b48:	6a59      	ldr	r1, [r3, #36]	; 0x24
+ 8001b4a:	68bb      	ldr	r3, [r7, #8]
+ 8001b4c:	0a1b      	lsrs	r3, r3, #8
+ 8001b4e:	68ba      	ldr	r2, [r7, #8]
+ 8001b50:	0a12      	lsrs	r2, r2, #8
+ 8001b52:	4353      	muls	r3, r2
+ 8001b54:	68ba      	ldr	r2, [r7, #8]
+ 8001b56:	0a12      	lsrs	r2, r2, #8
+ 8001b58:	4353      	muls	r3, r2
+ 8001b5a:	68ba      	ldr	r2, [r7, #8]
+ 8001b5c:	0a12      	lsrs	r2, r2, #8
+ 8001b5e:	435a      	muls	r2, r3
+ 8001b60:	0013      	movs	r3, r2
+ 8001b62:	011b      	lsls	r3, r3, #4
+ 8001b64:	1a9b      	subs	r3, r3, r2
+ 8001b66:	43db      	mvns	r3, r3
+ 8001b68:	400b      	ands	r3, r1
+ 8001b6a:	001a      	movs	r2, r3
+ 8001b6c:	68bb      	ldr	r3, [r7, #8]
+ 8001b6e:	0a1b      	lsrs	r3, r3, #8
+ 8001b70:	68b9      	ldr	r1, [r7, #8]
+ 8001b72:	0a09      	lsrs	r1, r1, #8
+ 8001b74:	434b      	muls	r3, r1
+ 8001b76:	68b9      	ldr	r1, [r7, #8]
+ 8001b78:	0a09      	lsrs	r1, r1, #8
+ 8001b7a:	434b      	muls	r3, r1
+ 8001b7c:	68b9      	ldr	r1, [r7, #8]
+ 8001b7e:	0a09      	lsrs	r1, r1, #8
+ 8001b80:	434b      	muls	r3, r1
+ 8001b82:	6879      	ldr	r1, [r7, #4]
+ 8001b84:	434b      	muls	r3, r1
+ 8001b86:	431a      	orrs	r2, r3
+ 8001b88:	68fb      	ldr	r3, [r7, #12]
+ 8001b8a:	625a      	str	r2, [r3, #36]	; 0x24
+}
+ 8001b8c:	46c0      	nop			; (mov r8, r8)
+ 8001b8e:	46bd      	mov	sp, r7
+ 8001b90:	b004      	add	sp, #16
+ 8001b92:	bd80      	pop	{r7, pc}
+
+08001b94 <LL_GPIO_Init>:
   * @retval An ErrorStatus enumeration value:
   *          - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
   *          - ERROR:   Not applicable
   */
 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
 {
- 8000dbe:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+ 8001b94:	b580      	push	{r7, lr}
+ 8001b96:	b084      	sub	sp, #16
+ 8001b98:	af00      	add	r7, sp, #0
+ 8001b9a:	6078      	str	r0, [r7, #4]
+ 8001b9c:	6039      	str	r1, [r7, #0]
   uint32_t pinpos     = 0x00000000U;
- 8000dc0:	2300      	movs	r3, #0
-{
- 8000dc2:	0002      	movs	r2, r0
+ 8001b9e:	2300      	movs	r3, #0
+ 8001ba0:	60fb      	str	r3, [r7, #12]
+  uint32_t currentpin = 0x00000000U;
+ 8001ba2:	2300      	movs	r3, #0
+ 8001ba4:	60bb      	str	r3, [r7, #8]
   /* ------------------------- Configure the port pins ---------------- */
   /* Initialize  pinpos on first pin set */
   /* pinpos = 0; useless as already done in default initialization */
 
   /* Configure the port pins */
   while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U)
- 8000dc4:	680c      	ldr	r4, [r1, #0]
+ 8001ba6:	e048      	b.n	8001c3a <LL_GPIO_Init+0xa6>
+  {
+    /* Get current io position */
+    currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos);
+ 8001ba8:	683b      	ldr	r3, [r7, #0]
+ 8001baa:	681b      	ldr	r3, [r3, #0]
+ 8001bac:	2101      	movs	r1, #1
+ 8001bae:	68fa      	ldr	r2, [r7, #12]
+ 8001bb0:	4091      	lsls	r1, r2
+ 8001bb2:	000a      	movs	r2, r1
+ 8001bb4:	4013      	ands	r3, r2
+ 8001bb6:	60bb      	str	r3, [r7, #8]
+
+    if (currentpin)
+ 8001bb8:	68bb      	ldr	r3, [r7, #8]
+ 8001bba:	2b00      	cmp	r3, #0
+ 8001bbc:	d03a      	beq.n	8001c34 <LL_GPIO_Init+0xa0>
+    {
+      if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
+ 8001bbe:	683b      	ldr	r3, [r7, #0]
+ 8001bc0:	685b      	ldr	r3, [r3, #4]
+ 8001bc2:	2b01      	cmp	r3, #1
+ 8001bc4:	d003      	beq.n	8001bce <LL_GPIO_Init+0x3a>
+ 8001bc6:	683b      	ldr	r3, [r7, #0]
+ 8001bc8:	685b      	ldr	r3, [r3, #4]
+ 8001bca:	2b02      	cmp	r3, #2
+ 8001bcc:	d10e      	bne.n	8001bec <LL_GPIO_Init+0x58>
+      {
+        /* Check Speed mode parameters */
+        assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
+
+        /* Speed mode configuration */
+        LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
+ 8001bce:	683b      	ldr	r3, [r7, #0]
+ 8001bd0:	689a      	ldr	r2, [r3, #8]
+ 8001bd2:	68b9      	ldr	r1, [r7, #8]
+ 8001bd4:	687b      	ldr	r3, [r7, #4]
+ 8001bd6:	0018      	movs	r0, r3
+ 8001bd8:	f7ff ff54 	bl	8001a84 <LL_GPIO_SetPinSpeed>
+
+        /* Check Output mode parameters */
+        assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
+
+        /* Output mode configuration*/
+        LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
+ 8001bdc:	683b      	ldr	r3, [r7, #0]
+ 8001bde:	6819      	ldr	r1, [r3, #0]
+ 8001be0:	683b      	ldr	r3, [r7, #0]
+ 8001be2:	68da      	ldr	r2, [r3, #12]
+ 8001be4:	687b      	ldr	r3, [r7, #4]
+ 8001be6:	0018      	movs	r0, r3
+ 8001be8:	f7ff ff37 	bl	8001a5a <LL_GPIO_SetPinOutputType>
+      }
+
+      /* Pull-up Pull down resistor configuration*/
+      LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
+ 8001bec:	683b      	ldr	r3, [r7, #0]
+ 8001bee:	691a      	ldr	r2, [r3, #16]
+ 8001bf0:	68b9      	ldr	r1, [r7, #8]
+ 8001bf2:	687b      	ldr	r3, [r7, #4]
+ 8001bf4:	0018      	movs	r0, r3
+ 8001bf6:	f7ff ff61 	bl	8001abc <LL_GPIO_SetPinPull>
+
+      if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
+ 8001bfa:	683b      	ldr	r3, [r7, #0]
+ 8001bfc:	685b      	ldr	r3, [r3, #4]
+ 8001bfe:	2b02      	cmp	r3, #2
+ 8001c00:	d111      	bne.n	8001c26 <LL_GPIO_Init+0x92>
+      {
+        /* Check Alternate parameter */
+        assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
+
+        /* Speed mode configuration */
+        if (currentpin < LL_GPIO_PIN_8)
+ 8001c02:	68bb      	ldr	r3, [r7, #8]
+ 8001c04:	2bff      	cmp	r3, #255	; 0xff
+ 8001c06:	d807      	bhi.n	8001c18 <LL_GPIO_Init+0x84>
+        {
+          LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
+ 8001c08:	683b      	ldr	r3, [r7, #0]
+ 8001c0a:	695a      	ldr	r2, [r3, #20]
+ 8001c0c:	68b9      	ldr	r1, [r7, #8]
+ 8001c0e:	687b      	ldr	r3, [r7, #4]
+ 8001c10:	0018      	movs	r0, r3
+ 8001c12:	f7ff ff6f 	bl	8001af4 <LL_GPIO_SetAFPin_0_7>
+ 8001c16:	e006      	b.n	8001c26 <LL_GPIO_Init+0x92>
+        }
+        else
+        {
+          LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
+ 8001c18:	683b      	ldr	r3, [r7, #0]
+ 8001c1a:	695a      	ldr	r2, [r3, #20]
+ 8001c1c:	68b9      	ldr	r1, [r7, #8]
+ 8001c1e:	687b      	ldr	r3, [r7, #4]
+ 8001c20:	0018      	movs	r0, r3
+ 8001c22:	f7ff ff8a 	bl	8001b3a <LL_GPIO_SetAFPin_8_15>
+        }
       }
 
       /* Pin Mode configuration */
       LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
+ 8001c26:	683b      	ldr	r3, [r7, #0]
+ 8001c28:	685a      	ldr	r2, [r3, #4]
+ 8001c2a:	68b9      	ldr	r1, [r7, #8]
+ 8001c2c:	687b      	ldr	r3, [r7, #4]
+ 8001c2e:	0018      	movs	r0, r3
+ 8001c30:	f7ff fef7 	bl	8001a22 <LL_GPIO_SetPinMode>
     }
     pinpos++;
- 8000dc6:	9300      	str	r3, [sp, #0]
+ 8001c34:	68fb      	ldr	r3, [r7, #12]
+ 8001c36:	3301      	adds	r3, #1
+ 8001c38:	60fb      	str	r3, [r7, #12]
   while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U)
- 8000dc8:	0020      	movs	r0, r4
- 8000dca:	9b00      	ldr	r3, [sp, #0]
- 8000dcc:	40d8      	lsrs	r0, r3
- 8000dce:	d100      	bne.n	8000dd2 <LL_GPIO_Init+0x14>
+ 8001c3a:	683b      	ldr	r3, [r7, #0]
+ 8001c3c:	681a      	ldr	r2, [r3, #0]
+ 8001c3e:	68fb      	ldr	r3, [r7, #12]
+ 8001c40:	40da      	lsrs	r2, r3
+ 8001c42:	1e13      	subs	r3, r2, #0
+ 8001c44:	d1b0      	bne.n	8001ba8 <LL_GPIO_Init+0x14>
   }
 
 
   return (SUCCESS);
+ 8001c46:	2300      	movs	r3, #0
 }
- 8000dd0:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-    currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos);
- 8000dd2:	2001      	movs	r0, #1
- 8000dd4:	9b00      	ldr	r3, [sp, #0]
- 8000dd6:	4098      	lsls	r0, r3
- 8000dd8:	0023      	movs	r3, r4
- 8000dda:	4003      	ands	r3, r0
-    if (currentpin)
- 8000ddc:	4204      	tst	r4, r0
- 8000dde:	d031      	beq.n	8000e44 <LL_GPIO_Init+0x86>
-      if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
- 8000de0:	6848      	ldr	r0, [r1, #4]
- 8000de2:	2503      	movs	r5, #3
- 8000de4:	9001      	str	r0, [sp, #4]
- 8000de6:	0018      	movs	r0, r3
- 8000de8:	4358      	muls	r0, r3
- 8000dea:	4345      	muls	r5, r0
- 8000dec:	9e01      	ldr	r6, [sp, #4]
- 8000dee:	43ed      	mvns	r5, r5
- 8000df0:	1e77      	subs	r7, r6, #1
- 8000df2:	2f01      	cmp	r7, #1
- 8000df4:	d80b      	bhi.n	8000e0e <LL_GPIO_Init+0x50>
-  MODIFY_REG(GPIOx->OSPEEDR, ((Pin * Pin) * GPIO_OSPEEDER_OSPEED0), ((Pin * Pin) * Speed));
- 8000df6:	688f      	ldr	r7, [r1, #8]
- 8000df8:	6896      	ldr	r6, [r2, #8]
- 8000dfa:	4347      	muls	r7, r0
- 8000dfc:	402e      	ands	r6, r5
- 8000dfe:	4337      	orrs	r7, r6
- 8000e00:	6097      	str	r7, [r2, #8]
-  MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
- 8000e02:	6857      	ldr	r7, [r2, #4]
- 8000e04:	68ce      	ldr	r6, [r1, #12]
- 8000e06:	43a7      	bics	r7, r4
- 8000e08:	4374      	muls	r4, r6
- 8000e0a:	433c      	orrs	r4, r7
- 8000e0c:	6054      	str	r4, [r2, #4]
-  MODIFY_REG(GPIOx->PUPDR, ((Pin * Pin) * GPIO_PUPDR_PUPD0), ((Pin * Pin) * Pull));
- 8000e0e:	690c      	ldr	r4, [r1, #16]
- 8000e10:	68d7      	ldr	r7, [r2, #12]
- 8000e12:	4344      	muls	r4, r0
- 8000e14:	402f      	ands	r7, r5
- 8000e16:	433c      	orrs	r4, r7
- 8000e18:	60d4      	str	r4, [r2, #12]
-      if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
- 8000e1a:	9c01      	ldr	r4, [sp, #4]
- 8000e1c:	2c02      	cmp	r4, #2
- 8000e1e:	d10b      	bne.n	8000e38 <LL_GPIO_Init+0x7a>
-        if (currentpin < LL_GPIO_PIN_8)
- 8000e20:	694f      	ldr	r7, [r1, #20]
- 8000e22:	2bff      	cmp	r3, #255	; 0xff
- 8000e24:	d811      	bhi.n	8000e4a <LL_GPIO_Init+0x8c>
-  MODIFY_REG(GPIOx->AFR[0], ((((Pin * Pin) * Pin) * Pin) * GPIO_AFRL_AFSEL0),
- 8000e26:	0003      	movs	r3, r0
- 8000e28:	260f      	movs	r6, #15
- 8000e2a:	4343      	muls	r3, r0
- 8000e2c:	435e      	muls	r6, r3
- 8000e2e:	437b      	muls	r3, r7
- 8000e30:	6a14      	ldr	r4, [r2, #32]
- 8000e32:	43b4      	bics	r4, r6
- 8000e34:	431c      	orrs	r4, r3
- 8000e36:	6214      	str	r4, [r2, #32]
-  MODIFY_REG(GPIOx->MODER, ((Pin * Pin) * GPIO_MODER_MODE0), ((Pin * Pin) * Mode));
- 8000e38:	6813      	ldr	r3, [r2, #0]
- 8000e3a:	401d      	ands	r5, r3
- 8000e3c:	9b01      	ldr	r3, [sp, #4]
- 8000e3e:	4358      	muls	r0, r3
- 8000e40:	4305      	orrs	r5, r0
- 8000e42:	6015      	str	r5, [r2, #0]
-    pinpos++;
- 8000e44:	9b00      	ldr	r3, [sp, #0]
- 8000e46:	3301      	adds	r3, #1
- 8000e48:	e7bc      	b.n	8000dc4 <LL_GPIO_Init+0x6>
-  MODIFY_REG(GPIOx->AFR[1], (((((Pin >> 8U) * (Pin >> 8U)) * (Pin >> 8U)) * (Pin >> 8U)) * GPIO_AFRH_AFSEL8),
- 8000e4a:	260f      	movs	r6, #15
- 8000e4c:	0a1b      	lsrs	r3, r3, #8
- 8000e4e:	435b      	muls	r3, r3
- 8000e50:	435b      	muls	r3, r3
- 8000e52:	435e      	muls	r6, r3
- 8000e54:	437b      	muls	r3, r7
- 8000e56:	6a54      	ldr	r4, [r2, #36]	; 0x24
- 8000e58:	43b4      	bics	r4, r6
- 8000e5a:	431c      	orrs	r4, r3
- 8000e5c:	6254      	str	r4, [r2, #36]	; 0x24
-}
- 8000e5e:	e7eb      	b.n	8000e38 <LL_GPIO_Init+0x7a>
+ 8001c48:	0018      	movs	r0, r3
+ 8001c4a:	46bd      	mov	sp, r7
+ 8001c4c:	b004      	add	sp, #16
+ 8001c4e:	bd80      	pop	{r7, pc}
 
-08000e60 <LL_I2C_Init>:
+08001c50 <LL_I2C_Enable>:
+{
+ 8001c50:	b580      	push	{r7, lr}
+ 8001c52:	b082      	sub	sp, #8
+ 8001c54:	af00      	add	r7, sp, #0
+ 8001c56:	6078      	str	r0, [r7, #4]
+  SET_BIT(I2Cx->CR1, I2C_CR1_PE);
+ 8001c58:	687b      	ldr	r3, [r7, #4]
+ 8001c5a:	681b      	ldr	r3, [r3, #0]
+ 8001c5c:	2201      	movs	r2, #1
+ 8001c5e:	431a      	orrs	r2, r3
+ 8001c60:	687b      	ldr	r3, [r7, #4]
+ 8001c62:	601a      	str	r2, [r3, #0]
+}
+ 8001c64:	46c0      	nop			; (mov r8, r8)
+ 8001c66:	46bd      	mov	sp, r7
+ 8001c68:	b002      	add	sp, #8
+ 8001c6a:	bd80      	pop	{r7, pc}
+
+08001c6c <LL_I2C_Disable>:
+{
+ 8001c6c:	b580      	push	{r7, lr}
+ 8001c6e:	b082      	sub	sp, #8
+ 8001c70:	af00      	add	r7, sp, #0
+ 8001c72:	6078      	str	r0, [r7, #4]
   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
- 8000e60:	2201      	movs	r2, #1
- 8000e62:	6803      	ldr	r3, [r0, #0]
+ 8001c74:	687b      	ldr	r3, [r7, #4]
+ 8001c76:	681b      	ldr	r3, [r3, #0]
+ 8001c78:	2201      	movs	r2, #1
+ 8001c7a:	4393      	bics	r3, r2
+ 8001c7c:	001a      	movs	r2, r3
+ 8001c7e:	687b      	ldr	r3, [r7, #4]
+ 8001c80:	601a      	str	r2, [r3, #0]
+}
+ 8001c82:	46c0      	nop			; (mov r8, r8)
+ 8001c84:	46bd      	mov	sp, r7
+ 8001c86:	b002      	add	sp, #8
+ 8001c88:	bd80      	pop	{r7, pc}
+	...
+
+08001c8c <LL_I2C_ConfigFilters>:
+{
+ 8001c8c:	b580      	push	{r7, lr}
+ 8001c8e:	b084      	sub	sp, #16
+ 8001c90:	af00      	add	r7, sp, #0
+ 8001c92:	60f8      	str	r0, [r7, #12]
+ 8001c94:	60b9      	str	r1, [r7, #8]
+ 8001c96:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_Pos));
+ 8001c98:	68fb      	ldr	r3, [r7, #12]
+ 8001c9a:	681b      	ldr	r3, [r3, #0]
+ 8001c9c:	4a06      	ldr	r2, [pc, #24]	; (8001cb8 <LL_I2C_ConfigFilters+0x2c>)
+ 8001c9e:	401a      	ands	r2, r3
+ 8001ca0:	687b      	ldr	r3, [r7, #4]
+ 8001ca2:	0219      	lsls	r1, r3, #8
+ 8001ca4:	68bb      	ldr	r3, [r7, #8]
+ 8001ca6:	430b      	orrs	r3, r1
+ 8001ca8:	431a      	orrs	r2, r3
+ 8001caa:	68fb      	ldr	r3, [r7, #12]
+ 8001cac:	601a      	str	r2, [r3, #0]
+}
+ 8001cae:	46c0      	nop			; (mov r8, r8)
+ 8001cb0:	46bd      	mov	sp, r7
+ 8001cb2:	b004      	add	sp, #16
+ 8001cb4:	bd80      	pop	{r7, pc}
+ 8001cb6:	46c0      	nop			; (mov r8, r8)
+ 8001cb8:	ffffe0ff 	.word	0xffffe0ff
+
+08001cbc <LL_I2C_SetOwnAddress1>:
+{
+ 8001cbc:	b580      	push	{r7, lr}
+ 8001cbe:	b084      	sub	sp, #16
+ 8001cc0:	af00      	add	r7, sp, #0
+ 8001cc2:	60f8      	str	r0, [r7, #12]
+ 8001cc4:	60b9      	str	r1, [r7, #8]
+ 8001cc6:	607a      	str	r2, [r7, #4]
+  MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize);
+ 8001cc8:	68fb      	ldr	r3, [r7, #12]
+ 8001cca:	689b      	ldr	r3, [r3, #8]
+ 8001ccc:	0adb      	lsrs	r3, r3, #11
+ 8001cce:	02da      	lsls	r2, r3, #11
+ 8001cd0:	68b9      	ldr	r1, [r7, #8]
+ 8001cd2:	687b      	ldr	r3, [r7, #4]
+ 8001cd4:	430b      	orrs	r3, r1
+ 8001cd6:	431a      	orrs	r2, r3
+ 8001cd8:	68fb      	ldr	r3, [r7, #12]
+ 8001cda:	609a      	str	r2, [r3, #8]
+}
+ 8001cdc:	46c0      	nop			; (mov r8, r8)
+ 8001cde:	46bd      	mov	sp, r7
+ 8001ce0:	b004      	add	sp, #16
+ 8001ce2:	bd80      	pop	{r7, pc}
+
+08001ce4 <LL_I2C_EnableOwnAddress1>:
+{
+ 8001ce4:	b580      	push	{r7, lr}
+ 8001ce6:	b082      	sub	sp, #8
+ 8001ce8:	af00      	add	r7, sp, #0
+ 8001cea:	6078      	str	r0, [r7, #4]
+  SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
+ 8001cec:	687b      	ldr	r3, [r7, #4]
+ 8001cee:	689b      	ldr	r3, [r3, #8]
+ 8001cf0:	2280      	movs	r2, #128	; 0x80
+ 8001cf2:	0212      	lsls	r2, r2, #8
+ 8001cf4:	431a      	orrs	r2, r3
+ 8001cf6:	687b      	ldr	r3, [r7, #4]
+ 8001cf8:	609a      	str	r2, [r3, #8]
+}
+ 8001cfa:	46c0      	nop			; (mov r8, r8)
+ 8001cfc:	46bd      	mov	sp, r7
+ 8001cfe:	b002      	add	sp, #8
+ 8001d00:	bd80      	pop	{r7, pc}
+	...
+
+08001d04 <LL_I2C_DisableOwnAddress1>:
+{
+ 8001d04:	b580      	push	{r7, lr}
+ 8001d06:	b082      	sub	sp, #8
+ 8001d08:	af00      	add	r7, sp, #0
+ 8001d0a:	6078      	str	r0, [r7, #4]
+  CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
+ 8001d0c:	687b      	ldr	r3, [r7, #4]
+ 8001d0e:	689b      	ldr	r3, [r3, #8]
+ 8001d10:	4a03      	ldr	r2, [pc, #12]	; (8001d20 <LL_I2C_DisableOwnAddress1+0x1c>)
+ 8001d12:	401a      	ands	r2, r3
+ 8001d14:	687b      	ldr	r3, [r7, #4]
+ 8001d16:	609a      	str	r2, [r3, #8]
+}
+ 8001d18:	46c0      	nop			; (mov r8, r8)
+ 8001d1a:	46bd      	mov	sp, r7
+ 8001d1c:	b002      	add	sp, #8
+ 8001d1e:	bd80      	pop	{r7, pc}
+ 8001d20:	ffff7fff 	.word	0xffff7fff
+
+08001d24 <LL_I2C_SetTiming>:
+{
+ 8001d24:	b580      	push	{r7, lr}
+ 8001d26:	b082      	sub	sp, #8
+ 8001d28:	af00      	add	r7, sp, #0
+ 8001d2a:	6078      	str	r0, [r7, #4]
+ 8001d2c:	6039      	str	r1, [r7, #0]
+  WRITE_REG(I2Cx->TIMINGR, Timing);
+ 8001d2e:	687b      	ldr	r3, [r7, #4]
+ 8001d30:	683a      	ldr	r2, [r7, #0]
+ 8001d32:	611a      	str	r2, [r3, #16]
+}
+ 8001d34:	46c0      	nop			; (mov r8, r8)
+ 8001d36:	46bd      	mov	sp, r7
+ 8001d38:	b002      	add	sp, #8
+ 8001d3a:	bd80      	pop	{r7, pc}
+
+08001d3c <LL_I2C_SetMode>:
+{
+ 8001d3c:	b580      	push	{r7, lr}
+ 8001d3e:	b082      	sub	sp, #8
+ 8001d40:	af00      	add	r7, sp, #0
+ 8001d42:	6078      	str	r0, [r7, #4]
+ 8001d44:	6039      	str	r1, [r7, #0]
+  MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);
+ 8001d46:	687b      	ldr	r3, [r7, #4]
+ 8001d48:	681b      	ldr	r3, [r3, #0]
+ 8001d4a:	4a05      	ldr	r2, [pc, #20]	; (8001d60 <LL_I2C_SetMode+0x24>)
+ 8001d4c:	401a      	ands	r2, r3
+ 8001d4e:	683b      	ldr	r3, [r7, #0]
+ 8001d50:	431a      	orrs	r2, r3
+ 8001d52:	687b      	ldr	r3, [r7, #4]
+ 8001d54:	601a      	str	r2, [r3, #0]
+}
+ 8001d56:	46c0      	nop			; (mov r8, r8)
+ 8001d58:	46bd      	mov	sp, r7
+ 8001d5a:	b002      	add	sp, #8
+ 8001d5c:	bd80      	pop	{r7, pc}
+ 8001d5e:	46c0      	nop			; (mov r8, r8)
+ 8001d60:	ffcfffff 	.word	0xffcfffff
+
+08001d64 <LL_I2C_AcknowledgeNextData>:
+{
+ 8001d64:	b580      	push	{r7, lr}
+ 8001d66:	b082      	sub	sp, #8
+ 8001d68:	af00      	add	r7, sp, #0
+ 8001d6a:	6078      	str	r0, [r7, #4]
+ 8001d6c:	6039      	str	r1, [r7, #0]
+  MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
+ 8001d6e:	687b      	ldr	r3, [r7, #4]
+ 8001d70:	685b      	ldr	r3, [r3, #4]
+ 8001d72:	4a05      	ldr	r2, [pc, #20]	; (8001d88 <LL_I2C_AcknowledgeNextData+0x24>)
+ 8001d74:	401a      	ands	r2, r3
+ 8001d76:	683b      	ldr	r3, [r7, #0]
+ 8001d78:	431a      	orrs	r2, r3
+ 8001d7a:	687b      	ldr	r3, [r7, #4]
+ 8001d7c:	605a      	str	r2, [r3, #4]
+}
+ 8001d7e:	46c0      	nop			; (mov r8, r8)
+ 8001d80:	46bd      	mov	sp, r7
+ 8001d82:	b002      	add	sp, #8
+ 8001d84:	bd80      	pop	{r7, pc}
+ 8001d86:	46c0      	nop			; (mov r8, r8)
+ 8001d88:	ffff7fff 	.word	0xffff7fff
+
+08001d8c <LL_I2C_Init>:
   * @retval An ErrorStatus enumeration value:
   *          - SUCCESS: I2C registers are initialized
   *          - ERROR: Not applicable
   */
 ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
 {
- 8000e64:	b530      	push	{r4, r5, lr}
- 8000e66:	4393      	bics	r3, r2
- 8000e68:	6003      	str	r3, [r0, #0]
-  MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_Pos));
- 8000e6a:	68cb      	ldr	r3, [r1, #12]
- 8000e6c:	688d      	ldr	r5, [r1, #8]
- 8000e6e:	021b      	lsls	r3, r3, #8
- 8000e70:	6804      	ldr	r4, [r0, #0]
- 8000e72:	432b      	orrs	r3, r5
- 8000e74:	4d14      	ldr	r5, [pc, #80]	; (8000ec8 <LL_I2C_Init+0x68>)
- 8000e76:	402c      	ands	r4, r5
- 8000e78:	4323      	orrs	r3, r4
- 8000e7a:	6003      	str	r3, [r0, #0]
-  WRITE_REG(I2Cx->TIMINGR, Timing);
- 8000e7c:	684b      	ldr	r3, [r1, #4]
+ 8001d8c:	b580      	push	{r7, lr}
+ 8001d8e:	b082      	sub	sp, #8
+ 8001d90:	af00      	add	r7, sp, #0
+ 8001d92:	6078      	str	r0, [r7, #4]
+ 8001d94:	6039      	str	r1, [r7, #0]
+  assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
+  assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
+  assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
+
+  /* Disable the selected I2Cx Peripheral */
+  LL_I2C_Disable(I2Cx);
+ 8001d96:	687b      	ldr	r3, [r7, #4]
+ 8001d98:	0018      	movs	r0, r3
+ 8001d9a:	f7ff ff67 	bl	8001c6c <LL_I2C_Disable>
+  /*---------------------------- I2Cx CR1 Configuration ------------------------
+   * Configure the analog and digital noise filters with parameters :
+   * - AnalogFilter: I2C_CR1_ANFOFF bit
+   * - DigitalFilter: I2C_CR1_DNF[3:0] bits
+   */
+  LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
+ 8001d9e:	683b      	ldr	r3, [r7, #0]
+ 8001da0:	6899      	ldr	r1, [r3, #8]
+ 8001da2:	683b      	ldr	r3, [r7, #0]
+ 8001da4:	68da      	ldr	r2, [r3, #12]
+ 8001da6:	687b      	ldr	r3, [r7, #4]
+ 8001da8:	0018      	movs	r0, r3
+ 8001daa:	f7ff ff6f 	bl	8001c8c <LL_I2C_ConfigFilters>
+  /*---------------------------- I2Cx TIMINGR Configuration --------------------
+   * Configure the SDA setup, hold time and the SCL high, low period with parameter :
+   * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
+   *           I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
+   */
+  LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
+ 8001dae:	683b      	ldr	r3, [r7, #0]
+ 8001db0:	685a      	ldr	r2, [r3, #4]
+ 8001db2:	687b      	ldr	r3, [r7, #4]
+ 8001db4:	0011      	movs	r1, r2
+ 8001db6:	0018      	movs	r0, r3
+ 8001db8:	f7ff ffb4 	bl	8001d24 <LL_I2C_SetTiming>
+
+  /* Enable the selected I2Cx Peripheral */
+  LL_I2C_Enable(I2Cx);
+ 8001dbc:	687b      	ldr	r3, [r7, #4]
+ 8001dbe:	0018      	movs	r0, r3
+ 8001dc0:	f7ff ff46 	bl	8001c50 <LL_I2C_Enable>
+  /*---------------------------- I2Cx OAR1 Configuration -----------------------
    * Disable, Configure and Enable I2Cx device own address 1 with parameters :
    * - OwnAddress1:  I2C_OAR1_OA1[9:0] bits
    * - OwnAddrSize:  I2C_OAR1_OA1MODE bit
    */
   LL_I2C_DisableOwnAddress1(I2Cx);
+ 8001dc4:	687b      	ldr	r3, [r7, #4]
+ 8001dc6:	0018      	movs	r0, r3
+ 8001dc8:	f7ff ff9c 	bl	8001d04 <LL_I2C_DisableOwnAddress1>
   LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
- 8000e7e:	690d      	ldr	r5, [r1, #16]
- 8000e80:	6103      	str	r3, [r0, #16]
-  SET_BIT(I2Cx->CR1, I2C_CR1_PE);
- 8000e82:	6803      	ldr	r3, [r0, #0]
- 8000e84:	431a      	orrs	r2, r3
- 8000e86:	6002      	str	r2, [r0, #0]
-  CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
- 8000e88:	6882      	ldr	r2, [r0, #8]
- 8000e8a:	4b10      	ldr	r3, [pc, #64]	; (8000ecc <LL_I2C_Init+0x6c>)
- 8000e8c:	401a      	ands	r2, r3
- 8000e8e:	6082      	str	r2, [r0, #8]
-  MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize);
- 8000e90:	6884      	ldr	r4, [r0, #8]
- 8000e92:	698a      	ldr	r2, [r1, #24]
- 8000e94:	0ae4      	lsrs	r4, r4, #11
- 8000e96:	02e4      	lsls	r4, r4, #11
- 8000e98:	432a      	orrs	r2, r5
- 8000e9a:	4322      	orrs	r2, r4
- 8000e9c:	6082      	str	r2, [r0, #8]
+ 8001dcc:	683b      	ldr	r3, [r7, #0]
+ 8001dce:	6919      	ldr	r1, [r3, #16]
+ 8001dd0:	683b      	ldr	r3, [r7, #0]
+ 8001dd2:	699a      	ldr	r2, [r3, #24]
+ 8001dd4:	687b      	ldr	r3, [r7, #4]
+ 8001dd6:	0018      	movs	r0, r3
+ 8001dd8:	f7ff ff70 	bl	8001cbc <LL_I2C_SetOwnAddress1>
 
   /* OwnAdress1 == 0 is reserved for General Call address */
   if (I2C_InitStruct->OwnAddress1 != 0U)
- 8000e9e:	001c      	movs	r4, r3
- 8000ea0:	2d00      	cmp	r5, #0
- 8000ea2:	d004      	beq.n	8000eae <LL_I2C_Init+0x4e>
-  SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
- 8000ea4:	2380      	movs	r3, #128	; 0x80
- 8000ea6:	6882      	ldr	r2, [r0, #8]
- 8000ea8:	021b      	lsls	r3, r3, #8
- 8000eaa:	4313      	orrs	r3, r2
- 8000eac:	6083      	str	r3, [r0, #8]
-  MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);
- 8000eae:	6802      	ldr	r2, [r0, #0]
- 8000eb0:	4b07      	ldr	r3, [pc, #28]	; (8000ed0 <LL_I2C_Init+0x70>)
- 8000eb2:	401a      	ands	r2, r3
- 8000eb4:	680b      	ldr	r3, [r1, #0]
- 8000eb6:	431a      	orrs	r2, r3
- 8000eb8:	6002      	str	r2, [r0, #0]
-  MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
- 8000eba:	6843      	ldr	r3, [r0, #4]
- 8000ebc:	694a      	ldr	r2, [r1, #20]
- 8000ebe:	4023      	ands	r3, r4
- 8000ec0:	4313      	orrs	r3, r2
- 8000ec2:	6043      	str	r3, [r0, #4]
+ 8001ddc:	683b      	ldr	r3, [r7, #0]
+ 8001dde:	691b      	ldr	r3, [r3, #16]
+ 8001de0:	2b00      	cmp	r3, #0
+ 8001de2:	d003      	beq.n	8001dec <LL_I2C_Init+0x60>
+  {
+    LL_I2C_EnableOwnAddress1(I2Cx);
+ 8001de4:	687b      	ldr	r3, [r7, #4]
+ 8001de6:	0018      	movs	r0, r3
+ 8001de8:	f7ff ff7c 	bl	8001ce4 <LL_I2C_EnableOwnAddress1>
+
+  /*---------------------------- I2Cx MODE Configuration -----------------------
+  * Configure I2Cx peripheral mode with parameter :
+   * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
+   */
+  LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
+ 8001dec:	683b      	ldr	r3, [r7, #0]
+ 8001dee:	681a      	ldr	r2, [r3, #0]
+ 8001df0:	687b      	ldr	r3, [r7, #4]
+ 8001df2:	0011      	movs	r1, r2
+ 8001df4:	0018      	movs	r0, r3
+ 8001df6:	f7ff ffa1 	bl	8001d3c <LL_I2C_SetMode>
+  /*---------------------------- I2Cx CR2 Configuration ------------------------
+   * Configure the ACKnowledge or Non ACKnowledge condition
+   * after the address receive match code or next received byte with parameter :
    * - TypeAcknowledge: I2C_CR2_NACK bit
    */
   LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
+ 8001dfa:	683b      	ldr	r3, [r7, #0]
+ 8001dfc:	695a      	ldr	r2, [r3, #20]
+ 8001dfe:	687b      	ldr	r3, [r7, #4]
+ 8001e00:	0011      	movs	r1, r2
+ 8001e02:	0018      	movs	r0, r3
+ 8001e04:	f7ff ffae 	bl	8001d64 <LL_I2C_AcknowledgeNextData>
 
   return SUCCESS;
+ 8001e08:	2300      	movs	r3, #0
 }
- 8000ec4:	2000      	movs	r0, #0
- 8000ec6:	bd30      	pop	{r4, r5, pc}
- 8000ec8:	ffffe0ff 	.word	0xffffe0ff
- 8000ecc:	ffff7fff 	.word	0xffff7fff
- 8000ed0:	ffcfffff 	.word	0xffcfffff
+ 8001e0a:	0018      	movs	r0, r3
+ 8001e0c:	46bd      	mov	sp, r7
+ 8001e0e:	b002      	add	sp, #8
+ 8001e10:	bd80      	pop	{r7, pc}
 
-08000ed4 <LL_LPUART_Init>:
+08001e12 <LL_LPUART_IsEnabled>:
+{
+ 8001e12:	b580      	push	{r7, lr}
+ 8001e14:	b082      	sub	sp, #8
+ 8001e16:	af00      	add	r7, sp, #0
+ 8001e18:	6078      	str	r0, [r7, #4]
   return ((READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
- 8000ed4:	6802      	ldr	r2, [r0, #0]
+ 8001e1a:	687b      	ldr	r3, [r7, #4]
+ 8001e1c:	681b      	ldr	r3, [r3, #0]
+ 8001e1e:	2201      	movs	r2, #1
+ 8001e20:	4013      	ands	r3, r2
+ 8001e22:	2b01      	cmp	r3, #1
+ 8001e24:	d101      	bne.n	8001e2a <LL_LPUART_IsEnabled+0x18>
+ 8001e26:	2301      	movs	r3, #1
+ 8001e28:	e000      	b.n	8001e2c <LL_LPUART_IsEnabled+0x1a>
+ 8001e2a:	2300      	movs	r3, #0
+}
+ 8001e2c:	0018      	movs	r0, r3
+ 8001e2e:	46bd      	mov	sp, r7
+ 8001e30:	b002      	add	sp, #8
+ 8001e32:	bd80      	pop	{r7, pc}
+
+08001e34 <LL_LPUART_SetStopBitsLength>:
+{
+ 8001e34:	b580      	push	{r7, lr}
+ 8001e36:	b082      	sub	sp, #8
+ 8001e38:	af00      	add	r7, sp, #0
+ 8001e3a:	6078      	str	r0, [r7, #4]
+ 8001e3c:	6039      	str	r1, [r7, #0]
+  MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
+ 8001e3e:	687b      	ldr	r3, [r7, #4]
+ 8001e40:	685b      	ldr	r3, [r3, #4]
+ 8001e42:	4a05      	ldr	r2, [pc, #20]	; (8001e58 <LL_LPUART_SetStopBitsLength+0x24>)
+ 8001e44:	401a      	ands	r2, r3
+ 8001e46:	683b      	ldr	r3, [r7, #0]
+ 8001e48:	431a      	orrs	r2, r3
+ 8001e4a:	687b      	ldr	r3, [r7, #4]
+ 8001e4c:	605a      	str	r2, [r3, #4]
+}
+ 8001e4e:	46c0      	nop			; (mov r8, r8)
+ 8001e50:	46bd      	mov	sp, r7
+ 8001e52:	b002      	add	sp, #8
+ 8001e54:	bd80      	pop	{r7, pc}
+ 8001e56:	46c0      	nop			; (mov r8, r8)
+ 8001e58:	ffffcfff 	.word	0xffffcfff
+
+08001e5c <LL_LPUART_SetHWFlowCtrl>:
+{
+ 8001e5c:	b580      	push	{r7, lr}
+ 8001e5e:	b082      	sub	sp, #8
+ 8001e60:	af00      	add	r7, sp, #0
+ 8001e62:	6078      	str	r0, [r7, #4]
+ 8001e64:	6039      	str	r1, [r7, #0]
+  MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
+ 8001e66:	687b      	ldr	r3, [r7, #4]
+ 8001e68:	689b      	ldr	r3, [r3, #8]
+ 8001e6a:	4a05      	ldr	r2, [pc, #20]	; (8001e80 <LL_LPUART_SetHWFlowCtrl+0x24>)
+ 8001e6c:	401a      	ands	r2, r3
+ 8001e6e:	683b      	ldr	r3, [r7, #0]
+ 8001e70:	431a      	orrs	r2, r3
+ 8001e72:	687b      	ldr	r3, [r7, #4]
+ 8001e74:	609a      	str	r2, [r3, #8]
+}
+ 8001e76:	46c0      	nop			; (mov r8, r8)
+ 8001e78:	46bd      	mov	sp, r7
+ 8001e7a:	b002      	add	sp, #8
+ 8001e7c:	bd80      	pop	{r7, pc}
+ 8001e7e:	46c0      	nop			; (mov r8, r8)
+ 8001e80:	fffffcff 	.word	0xfffffcff
+
+08001e84 <LL_LPUART_SetBaudRate>:
+{
+ 8001e84:	b5b0      	push	{r4, r5, r7, lr}
+ 8001e86:	b08a      	sub	sp, #40	; 0x28
+ 8001e88:	af00      	add	r7, sp, #0
+ 8001e8a:	6278      	str	r0, [r7, #36]	; 0x24
+ 8001e8c:	6239      	str	r1, [r7, #32]
+ 8001e8e:	61fa      	str	r2, [r7, #28]
+  if (BaudRate != 0U)
+ 8001e90:	69fb      	ldr	r3, [r7, #28]
+ 8001e92:	2b00      	cmp	r3, #0
+ 8001e94:	d024      	beq.n	8001ee0 <LL_LPUART_SetBaudRate+0x5c>
+    LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
+ 8001e96:	6a3b      	ldr	r3, [r7, #32]
+ 8001e98:	613b      	str	r3, [r7, #16]
+ 8001e9a:	2300      	movs	r3, #0
+ 8001e9c:	617b      	str	r3, [r7, #20]
+ 8001e9e:	6939      	ldr	r1, [r7, #16]
+ 8001ea0:	697a      	ldr	r2, [r7, #20]
+ 8001ea2:	000b      	movs	r3, r1
+ 8001ea4:	0e1b      	lsrs	r3, r3, #24
+ 8001ea6:	0010      	movs	r0, r2
+ 8001ea8:	0205      	lsls	r5, r0, #8
+ 8001eaa:	431d      	orrs	r5, r3
+ 8001eac:	000b      	movs	r3, r1
+ 8001eae:	021c      	lsls	r4, r3, #8
+ 8001eb0:	69fb      	ldr	r3, [r7, #28]
+ 8001eb2:	085b      	lsrs	r3, r3, #1
+ 8001eb4:	60bb      	str	r3, [r7, #8]
+ 8001eb6:	2300      	movs	r3, #0
+ 8001eb8:	60fb      	str	r3, [r7, #12]
+ 8001eba:	68b8      	ldr	r0, [r7, #8]
+ 8001ebc:	68f9      	ldr	r1, [r7, #12]
+ 8001ebe:	1900      	adds	r0, r0, r4
+ 8001ec0:	4169      	adcs	r1, r5
+ 8001ec2:	69fb      	ldr	r3, [r7, #28]
+ 8001ec4:	603b      	str	r3, [r7, #0]
+ 8001ec6:	2300      	movs	r3, #0
+ 8001ec8:	607b      	str	r3, [r7, #4]
+ 8001eca:	683a      	ldr	r2, [r7, #0]
+ 8001ecc:	687b      	ldr	r3, [r7, #4]
+ 8001ece:	f7fe fa91 	bl	80003f4 <__aeabi_uldivmod>
+ 8001ed2:	0002      	movs	r2, r0
+ 8001ed4:	000b      	movs	r3, r1
+ 8001ed6:	0013      	movs	r3, r2
+ 8001ed8:	031b      	lsls	r3, r3, #12
+ 8001eda:	0b1a      	lsrs	r2, r3, #12
+ 8001edc:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8001ede:	60da      	str	r2, [r3, #12]
+}
+ 8001ee0:	46c0      	nop			; (mov r8, r8)
+ 8001ee2:	46bd      	mov	sp, r7
+ 8001ee4:	b00a      	add	sp, #40	; 0x28
+ 8001ee6:	bdb0      	pop	{r4, r5, r7, pc}
+
+08001ee8 <LL_LPUART_Init>:
   * @retval An ErrorStatus enumeration value:
   *          - SUCCESS: LPUART registers are initialized according to LPUART_InitStruct content
   *          - ERROR: Problem occurred during LPUART Registers initialization
   */
 ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct)
 {
- 8000ed6:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8000ed8:	2301      	movs	r3, #1
- 8000eda:	0015      	movs	r5, r2
- 8000edc:	0004      	movs	r4, r0
- 8000ede:	000e      	movs	r6, r1
- 8000ee0:	401d      	ands	r5, r3
+ 8001ee8:	b590      	push	{r4, r7, lr}
+ 8001eea:	b085      	sub	sp, #20
+ 8001eec:	af00      	add	r7, sp, #0
+ 8001eee:	6078      	str	r0, [r7, #4]
+ 8001ef0:	6039      	str	r1, [r7, #0]
+  ErrorStatus status = ERROR;
+ 8001ef2:	240f      	movs	r4, #15
+ 8001ef4:	193b      	adds	r3, r7, r4
+ 8001ef6:	2201      	movs	r2, #1
+ 8001ef8:	701a      	strb	r2, [r3, #0]
   assert_param(IS_LL_LPUART_DIRECTION(LPUART_InitStruct->TransferDirection));
   assert_param(IS_LL_LPUART_HWCONTROL(LPUART_InitStruct->HardwareFlowControl));
 
   /* LPUART needs to be in disabled state, in order to be able to configure some bits in
      CRx registers. Otherwise (LPUART not in Disabled state) => return ERROR */
   if (LL_LPUART_IsEnabled(LPUARTx) == 0U)
- 8000ee2:	421a      	tst	r2, r3
- 8000ee4:	d001      	beq.n	8000eea <LL_LPUART_Init+0x16>
-  ErrorStatus status = ERROR;
- 8000ee6:	2001      	movs	r0, #1
+ 8001efa:	687b      	ldr	r3, [r7, #4]
+ 8001efc:	0018      	movs	r0, r3
+ 8001efe:	f7ff ff88 	bl	8001e12 <LL_LPUART_IsEnabled>
+ 8001f02:	1e03      	subs	r3, r0, #0
+ 8001f04:	d134      	bne.n	8001f70 <LL_LPUART_Init+0x88>
+     * Configure LPUARTx CR1 (LPUART Word Length, Parity and Transfer Direction bits) with parameters:
+     * - DataWidth:          USART_CR1_M bits according to LPUART_InitStruct->DataWidth value
+     * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to LPUART_InitStruct->Parity value
+     * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to LPUART_InitStruct->TransferDirection value
+     */
+    MODIFY_REG(LPUARTx->CR1,
+ 8001f06:	687b      	ldr	r3, [r7, #4]
+ 8001f08:	681b      	ldr	r3, [r3, #0]
+ 8001f0a:	4a1d      	ldr	r2, [pc, #116]	; (8001f80 <LL_LPUART_Init+0x98>)
+ 8001f0c:	401a      	ands	r2, r3
+ 8001f0e:	683b      	ldr	r3, [r7, #0]
+ 8001f10:	6859      	ldr	r1, [r3, #4]
+ 8001f12:	683b      	ldr	r3, [r7, #0]
+ 8001f14:	68db      	ldr	r3, [r3, #12]
+ 8001f16:	4319      	orrs	r1, r3
+ 8001f18:	683b      	ldr	r3, [r7, #0]
+ 8001f1a:	691b      	ldr	r3, [r3, #16]
+ 8001f1c:	430b      	orrs	r3, r1
+ 8001f1e:	431a      	orrs	r2, r3
+ 8001f20:	687b      	ldr	r3, [r7, #4]
+ 8001f22:	601a      	str	r2, [r3, #0]
+
+    /*---------------------------- LPUART CR2 Configuration -----------------------
+     * Configure LPUARTx CR2 (Stop bits) with parameters:
+     * - Stop Bits:          USART_CR2_STOP bits according to LPUART_InitStruct->StopBits value.
+     */
+    LL_LPUART_SetStopBitsLength(LPUARTx, LPUART_InitStruct->StopBits);
+ 8001f24:	683b      	ldr	r3, [r7, #0]
+ 8001f26:	689a      	ldr	r2, [r3, #8]
+ 8001f28:	687b      	ldr	r3, [r7, #4]
+ 8001f2a:	0011      	movs	r1, r2
+ 8001f2c:	0018      	movs	r0, r3
+ 8001f2e:	f7ff ff81 	bl	8001e34 <LL_LPUART_SetStopBitsLength>
+    /*---------------------------- LPUART CR3 Configuration -----------------------
+     * Configure LPUARTx CR3 (Hardware Flow Control) with parameters:
+     * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according
+     *   to LPUART_InitStruct->HardwareFlowControl value.
+     */
+    LL_LPUART_SetHWFlowCtrl(LPUARTx, LPUART_InitStruct->HardwareFlowControl);
+ 8001f32:	683b      	ldr	r3, [r7, #0]
+ 8001f34:	695a      	ldr	r2, [r3, #20]
+ 8001f36:	687b      	ldr	r3, [r7, #4]
+ 8001f38:	0011      	movs	r1, r2
+ 8001f3a:	0018      	movs	r0, r3
+ 8001f3c:	f7ff ff8e 	bl	8001e5c <LL_LPUART_SetHWFlowCtrl>
+
+    /*---------------------------- LPUART BRR Configuration -----------------------
+     * Retrieve Clock frequency used for LPUART Peripheral
+     */
+    periphclk = LL_RCC_GetLPUARTClockFreq(LL_RCC_LPUART1_CLKSOURCE);
+ 8001f40:	23c0      	movs	r3, #192	; 0xc0
+ 8001f42:	011b      	lsls	r3, r3, #4
+ 8001f44:	0018      	movs	r0, r3
+ 8001f46:	f000 f8b3 	bl	80020b0 <LL_RCC_GetLPUARTClockFreq>
+ 8001f4a:	0003      	movs	r3, r0
+ 8001f4c:	60bb      	str	r3, [r7, #8]
+
+    /* Configure the LPUART Baud Rate :
+       - valid baud rate value (different from 0) is required
+       - Peripheral clock as returned by RCC service, should be valid (different from 0).
+    */
+    if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
+ 8001f4e:	68bb      	ldr	r3, [r7, #8]
+ 8001f50:	2b00      	cmp	r3, #0
+ 8001f52:	d00d      	beq.n	8001f70 <LL_LPUART_Init+0x88>
+        && (LPUART_InitStruct->BaudRate != 0U))
+ 8001f54:	683b      	ldr	r3, [r7, #0]
+ 8001f56:	681b      	ldr	r3, [r3, #0]
+ 8001f58:	2b00      	cmp	r3, #0
+ 8001f5a:	d009      	beq.n	8001f70 <LL_LPUART_Init+0x88>
+    {
+      status = SUCCESS;
+ 8001f5c:	193b      	adds	r3, r7, r4
+ 8001f5e:	2200      	movs	r2, #0
+ 8001f60:	701a      	strb	r2, [r3, #0]
+      LL_LPUART_SetBaudRate(LPUARTx,
+ 8001f62:	683b      	ldr	r3, [r7, #0]
+ 8001f64:	681a      	ldr	r2, [r3, #0]
+ 8001f66:	68b9      	ldr	r1, [r7, #8]
+ 8001f68:	687b      	ldr	r3, [r7, #4]
+ 8001f6a:	0018      	movs	r0, r3
+ 8001f6c:	f7ff ff8a 	bl	8001e84 <LL_LPUART_SetBaudRate>
+      assert_param(IS_LL_LPUART_BRR_MAX(LPUARTx->BRR));
     }
 
   }
 
   return (status);
+ 8001f70:	230f      	movs	r3, #15
+ 8001f72:	18fb      	adds	r3, r7, r3
+ 8001f74:	781b      	ldrb	r3, [r3, #0]
 }
- 8000ee8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
-    MODIFY_REG(LPUARTx->CR1,
- 8000eea:	684b      	ldr	r3, [r1, #4]
- 8000eec:	68c9      	ldr	r1, [r1, #12]
- 8000eee:	6802      	ldr	r2, [r0, #0]
- 8000ef0:	430b      	orrs	r3, r1
- 8000ef2:	6931      	ldr	r1, [r6, #16]
- 8000ef4:	430b      	orrs	r3, r1
- 8000ef6:	4913      	ldr	r1, [pc, #76]	; (8000f44 <LL_LPUART_Init+0x70>)
- 8000ef8:	400a      	ands	r2, r1
- 8000efa:	4313      	orrs	r3, r2
- 8000efc:	6003      	str	r3, [r0, #0]
-  MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
- 8000efe:	6843      	ldr	r3, [r0, #4]
- 8000f00:	4a11      	ldr	r2, [pc, #68]	; (8000f48 <LL_LPUART_Init+0x74>)
- 8000f02:	4013      	ands	r3, r2
- 8000f04:	68b2      	ldr	r2, [r6, #8]
- 8000f06:	4313      	orrs	r3, r2
- 8000f08:	6043      	str	r3, [r0, #4]
-  MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
- 8000f0a:	6883      	ldr	r3, [r0, #8]
- 8000f0c:	4a0f      	ldr	r2, [pc, #60]	; (8000f4c <LL_LPUART_Init+0x78>)
- 8000f0e:	4013      	ands	r3, r2
- 8000f10:	6972      	ldr	r2, [r6, #20]
- 8000f12:	4313      	orrs	r3, r2
- 8000f14:	6083      	str	r3, [r0, #8]
-    periphclk = LL_RCC_GetLPUARTClockFreq(LL_RCC_LPUART1_CLKSOURCE);
- 8000f16:	20c0      	movs	r0, #192	; 0xc0
- 8000f18:	0100      	lsls	r0, r0, #4
- 8000f1a:	f000 f899 	bl	8001050 <LL_RCC_GetLPUARTClockFreq>
-    if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
- 8000f1e:	2800      	cmp	r0, #0
- 8000f20:	d0e1      	beq.n	8000ee6 <LL_LPUART_Init+0x12>
-        && (LPUART_InitStruct->BaudRate != 0U))
- 8000f22:	6832      	ldr	r2, [r6, #0]
- 8000f24:	2a00      	cmp	r2, #0
- 8000f26:	d0de      	beq.n	8000ee6 <LL_LPUART_Init+0x12>
-    LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
- 8000f28:	0029      	movs	r1, r5
- 8000f2a:	0e07      	lsrs	r7, r0, #24
- 8000f2c:	0206      	lsls	r6, r0, #8
- 8000f2e:	0850      	lsrs	r0, r2, #1
- 8000f30:	1980      	adds	r0, r0, r6
- 8000f32:	4179      	adcs	r1, r7
- 8000f34:	002b      	movs	r3, r5
- 8000f36:	f7ff fa5d 	bl	80003f4 <__aeabi_uldivmod>
- 8000f3a:	0300      	lsls	r0, r0, #12
- 8000f3c:	0b00      	lsrs	r0, r0, #12
- 8000f3e:	60e0      	str	r0, [r4, #12]
-      status = SUCCESS;
- 8000f40:	0028      	movs	r0, r5
-}
- 8000f42:	e7d1      	b.n	8000ee8 <LL_LPUART_Init+0x14>
- 8000f44:	efffe9f3 	.word	0xefffe9f3
- 8000f48:	ffffcfff 	.word	0xffffcfff
- 8000f4c:	fffffcff 	.word	0xfffffcff
+ 8001f76:	0018      	movs	r0, r3
+ 8001f78:	46bd      	mov	sp, r7
+ 8001f7a:	b005      	add	sp, #20
+ 8001f7c:	bd90      	pop	{r4, r7, pc}
+ 8001f7e:	46c0      	nop			; (mov r8, r8)
+ 8001f80:	efffe9f3 	.word	0xefffe9f3
 
-08000f50 <LL_RCC_HSI_IsReady>:
+08001f84 <LL_RCC_HSI_IsReady>:
+{
+ 8001f84:	b580      	push	{r7, lr}
+ 8001f86:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RCC_CR_HSIRDY) ? 1UL : 0UL);
- 8000f50:	4b02      	ldr	r3, [pc, #8]	; (8000f5c <LL_RCC_HSI_IsReady+0xc>)
- 8000f52:	6818      	ldr	r0, [r3, #0]
- 8000f54:	0740      	lsls	r0, r0, #29
- 8000f56:	0fc0      	lsrs	r0, r0, #31
+ 8001f88:	4b05      	ldr	r3, [pc, #20]	; (8001fa0 <LL_RCC_HSI_IsReady+0x1c>)
+ 8001f8a:	681b      	ldr	r3, [r3, #0]
+ 8001f8c:	2204      	movs	r2, #4
+ 8001f8e:	4013      	ands	r3, r2
+ 8001f90:	2b04      	cmp	r3, #4
+ 8001f92:	d101      	bne.n	8001f98 <LL_RCC_HSI_IsReady+0x14>
+ 8001f94:	2301      	movs	r3, #1
+ 8001f96:	e000      	b.n	8001f9a <LL_RCC_HSI_IsReady+0x16>
+ 8001f98:	2300      	movs	r3, #0
 }
- 8000f58:	4770      	bx	lr
- 8000f5a:	46c0      	nop			; (mov r8, r8)
- 8000f5c:	40021000 	.word	0x40021000
+ 8001f9a:	0018      	movs	r0, r3
+ 8001f9c:	46bd      	mov	sp, r7
+ 8001f9e:	bd80      	pop	{r7, pc}
+ 8001fa0:	40021000 	.word	0x40021000
 
-08000f60 <LL_RCC_IsActiveFlag_HSIDIV>:
+08001fa4 <LL_RCC_LSE_IsReady>:
+{
+ 8001fa4:	b580      	push	{r7, lr}
+ 8001fa6:	af00      	add	r7, sp, #0
+  return ((READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == RCC_CSR_LSERDY) ? 1UL : 0UL);
+ 8001fa8:	4b07      	ldr	r3, [pc, #28]	; (8001fc8 <LL_RCC_LSE_IsReady+0x24>)
+ 8001faa:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8001fac:	2380      	movs	r3, #128	; 0x80
+ 8001fae:	009b      	lsls	r3, r3, #2
+ 8001fb0:	401a      	ands	r2, r3
+ 8001fb2:	2380      	movs	r3, #128	; 0x80
+ 8001fb4:	009b      	lsls	r3, r3, #2
+ 8001fb6:	429a      	cmp	r2, r3
+ 8001fb8:	d101      	bne.n	8001fbe <LL_RCC_LSE_IsReady+0x1a>
+ 8001fba:	2301      	movs	r3, #1
+ 8001fbc:	e000      	b.n	8001fc0 <LL_RCC_LSE_IsReady+0x1c>
+ 8001fbe:	2300      	movs	r3, #0
+}
+ 8001fc0:	0018      	movs	r0, r3
+ 8001fc2:	46bd      	mov	sp, r7
+ 8001fc4:	bd80      	pop	{r7, pc}
+ 8001fc6:	46c0      	nop			; (mov r8, r8)
+ 8001fc8:	40021000 	.word	0x40021000
+
+08001fcc <LL_RCC_MSI_GetRange>:
+{
+ 8001fcc:	b580      	push	{r7, lr}
+ 8001fce:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSIRANGE));
+ 8001fd0:	4b03      	ldr	r3, [pc, #12]	; (8001fe0 <LL_RCC_MSI_GetRange+0x14>)
+ 8001fd2:	685a      	ldr	r2, [r3, #4]
+ 8001fd4:	23e0      	movs	r3, #224	; 0xe0
+ 8001fd6:	021b      	lsls	r3, r3, #8
+ 8001fd8:	4013      	ands	r3, r2
+}
+ 8001fda:	0018      	movs	r0, r3
+ 8001fdc:	46bd      	mov	sp, r7
+ 8001fde:	bd80      	pop	{r7, pc}
+ 8001fe0:	40021000 	.word	0x40021000
+
+08001fe4 <LL_RCC_GetSysClkSource>:
+{
+ 8001fe4:	b580      	push	{r7, lr}
+ 8001fe6:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
+ 8001fe8:	4b03      	ldr	r3, [pc, #12]	; (8001ff8 <LL_RCC_GetSysClkSource+0x14>)
+ 8001fea:	68db      	ldr	r3, [r3, #12]
+ 8001fec:	220c      	movs	r2, #12
+ 8001fee:	4013      	ands	r3, r2
+}
+ 8001ff0:	0018      	movs	r0, r3
+ 8001ff2:	46bd      	mov	sp, r7
+ 8001ff4:	bd80      	pop	{r7, pc}
+ 8001ff6:	46c0      	nop			; (mov r8, r8)
+ 8001ff8:	40021000 	.word	0x40021000
+
+08001ffc <LL_RCC_GetAHBPrescaler>:
+{
+ 8001ffc:	b580      	push	{r7, lr}
+ 8001ffe:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
+ 8002000:	4b03      	ldr	r3, [pc, #12]	; (8002010 <LL_RCC_GetAHBPrescaler+0x14>)
+ 8002002:	68db      	ldr	r3, [r3, #12]
+ 8002004:	22f0      	movs	r2, #240	; 0xf0
+ 8002006:	4013      	ands	r3, r2
+}
+ 8002008:	0018      	movs	r0, r3
+ 800200a:	46bd      	mov	sp, r7
+ 800200c:	bd80      	pop	{r7, pc}
+ 800200e:	46c0      	nop			; (mov r8, r8)
+ 8002010:	40021000 	.word	0x40021000
+
+08002014 <LL_RCC_GetAPB1Prescaler>:
+{
+ 8002014:	b580      	push	{r7, lr}
+ 8002016:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
+ 8002018:	4b03      	ldr	r3, [pc, #12]	; (8002028 <LL_RCC_GetAPB1Prescaler+0x14>)
+ 800201a:	68da      	ldr	r2, [r3, #12]
+ 800201c:	23e0      	movs	r3, #224	; 0xe0
+ 800201e:	00db      	lsls	r3, r3, #3
+ 8002020:	4013      	ands	r3, r2
+}
+ 8002022:	0018      	movs	r0, r3
+ 8002024:	46bd      	mov	sp, r7
+ 8002026:	bd80      	pop	{r7, pc}
+ 8002028:	40021000 	.word	0x40021000
+
+0800202c <LL_RCC_GetLPUARTClockSource>:
+  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK
+  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
+  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetLPUARTClockSource(uint32_t LPUARTx)
+{
+ 800202c:	b580      	push	{r7, lr}
+ 800202e:	b082      	sub	sp, #8
+ 8002030:	af00      	add	r7, sp, #0
+ 8002032:	6078      	str	r0, [r7, #4]
+  return (uint32_t)(READ_BIT(RCC->CCIPR, LPUARTx));
+ 8002034:	4b03      	ldr	r3, [pc, #12]	; (8002044 <LL_RCC_GetLPUARTClockSource+0x18>)
+ 8002036:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8002038:	687a      	ldr	r2, [r7, #4]
+ 800203a:	4013      	ands	r3, r2
+}
+ 800203c:	0018      	movs	r0, r3
+ 800203e:	46bd      	mov	sp, r7
+ 8002040:	b002      	add	sp, #8
+ 8002042:	bd80      	pop	{r7, pc}
+ 8002044:	40021000 	.word	0x40021000
+
+08002048 <LL_RCC_PLL_GetMainSource>:
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_PLLSOURCE_HSI
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
+{
+ 8002048:	b580      	push	{r7, lr}
+ 800204a:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC));
+ 800204c:	4b03      	ldr	r3, [pc, #12]	; (800205c <LL_RCC_PLL_GetMainSource+0x14>)
+ 800204e:	68da      	ldr	r2, [r3, #12]
+ 8002050:	2380      	movs	r3, #128	; 0x80
+ 8002052:	025b      	lsls	r3, r3, #9
+ 8002054:	4013      	ands	r3, r2
+}
+ 8002056:	0018      	movs	r0, r3
+ 8002058:	46bd      	mov	sp, r7
+ 800205a:	bd80      	pop	{r7, pc}
+ 800205c:	40021000 	.word	0x40021000
+
+08002060 <LL_RCC_PLL_GetMultiplicator>:
+  *         @arg @ref LL_RCC_PLL_MUL_24
+  *         @arg @ref LL_RCC_PLL_MUL_32
+  *         @arg @ref LL_RCC_PLL_MUL_48
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void)
+{
+ 8002060:	b580      	push	{r7, lr}
+ 8002062:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL));
+ 8002064:	4b03      	ldr	r3, [pc, #12]	; (8002074 <LL_RCC_PLL_GetMultiplicator+0x14>)
+ 8002066:	68da      	ldr	r2, [r3, #12]
+ 8002068:	23f0      	movs	r3, #240	; 0xf0
+ 800206a:	039b      	lsls	r3, r3, #14
+ 800206c:	4013      	ands	r3, r2
+}
+ 800206e:	0018      	movs	r0, r3
+ 8002070:	46bd      	mov	sp, r7
+ 8002072:	bd80      	pop	{r7, pc}
+ 8002074:	40021000 	.word	0x40021000
+
+08002078 <LL_RCC_PLL_GetDivider>:
+  *         @arg @ref LL_RCC_PLL_DIV_2
+  *         @arg @ref LL_RCC_PLL_DIV_3
+  *         @arg @ref LL_RCC_PLL_DIV_4
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void)
+{
+ 8002078:	b580      	push	{r7, lr}
+ 800207a:	af00      	add	r7, sp, #0
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV));
+ 800207c:	4b03      	ldr	r3, [pc, #12]	; (800208c <LL_RCC_PLL_GetDivider+0x14>)
+ 800207e:	68da      	ldr	r2, [r3, #12]
+ 8002080:	23c0      	movs	r3, #192	; 0xc0
+ 8002082:	041b      	lsls	r3, r3, #16
+ 8002084:	4013      	ands	r3, r2
+}
+ 8002086:	0018      	movs	r0, r3
+ 8002088:	46bd      	mov	sp, r7
+ 800208a:	bd80      	pop	{r7, pc}
+ 800208c:	40021000 	.word	0x40021000
+
+08002090 <LL_RCC_IsActiveFlag_HSIDIV>:
+  * @brief  Check if HSI Divider is enabled (it divides by 4)
   * @rmtoll CR        HSIDIVF        LL_RCC_IsActiveFlag_HSIDIV
   * @retval State of bit (1 or 0).
   */
 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIDIV(void)
 {
+ 8002090:	b580      	push	{r7, lr}
+ 8002092:	af00      	add	r7, sp, #0
   return ((READ_BIT(RCC->CR, RCC_CR_HSIDIVF) == RCC_CR_HSIDIVF) ? 1UL : 0UL);
- 8000f60:	4b02      	ldr	r3, [pc, #8]	; (8000f6c <LL_RCC_IsActiveFlag_HSIDIV+0xc>)
- 8000f62:	6818      	ldr	r0, [r3, #0]
- 8000f64:	06c0      	lsls	r0, r0, #27
- 8000f66:	0fc0      	lsrs	r0, r0, #31
+ 8002094:	4b05      	ldr	r3, [pc, #20]	; (80020ac <LL_RCC_IsActiveFlag_HSIDIV+0x1c>)
+ 8002096:	681b      	ldr	r3, [r3, #0]
+ 8002098:	2210      	movs	r2, #16
+ 800209a:	4013      	ands	r3, r2
+ 800209c:	2b10      	cmp	r3, #16
+ 800209e:	d101      	bne.n	80020a4 <LL_RCC_IsActiveFlag_HSIDIV+0x14>
+ 80020a0:	2301      	movs	r3, #1
+ 80020a2:	e000      	b.n	80020a6 <LL_RCC_IsActiveFlag_HSIDIV+0x16>
+ 80020a4:	2300      	movs	r3, #0
 }
- 8000f68:	4770      	bx	lr
- 8000f6a:	46c0      	nop			; (mov r8, r8)
- 8000f6c:	40021000 	.word	0x40021000
+ 80020a6:	0018      	movs	r0, r3
+ 80020a8:	46bd      	mov	sp, r7
+ 80020aa:	bd80      	pop	{r7, pc}
+ 80020ac:	40021000 	.word	0x40021000
 
-08000f70 <RCC_GetHCLKClockFreq>:
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
- 8000f70:	4b03      	ldr	r3, [pc, #12]	; (8000f80 <RCC_GetHCLKClockFreq+0x10>)
+080020b0 <LL_RCC_GetLPUARTClockFreq>:
+  *         @arg @ref LL_RCC_LPUART1_CLKSOURCE
+  * @retval LPUART clock frequency (in Hz)
+  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
+  */
+uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource)
+{
+ 80020b0:	b580      	push	{r7, lr}
+ 80020b2:	b084      	sub	sp, #16
+ 80020b4:	af00      	add	r7, sp, #0
+ 80020b6:	6078      	str	r0, [r7, #4]
+  uint32_t lpuart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
+ 80020b8:	2300      	movs	r3, #0
+ 80020ba:	60fb      	str	r3, [r7, #12]
+
+  /* Check parameter */
+  assert_param(IS_LL_RCC_LPUART_CLKSOURCE(LPUARTxSource));
+
+  /* LPUART1CLK clock frequency */
+  switch (LL_RCC_GetLPUARTClockSource(LPUARTxSource))
+ 80020bc:	687b      	ldr	r3, [r7, #4]
+ 80020be:	0018      	movs	r0, r3
+ 80020c0:	f7ff ffb4 	bl	800202c <LL_RCC_GetLPUARTClockSource>
+ 80020c4:	0003      	movs	r3, r0
+ 80020c6:	22c0      	movs	r2, #192	; 0xc0
+ 80020c8:	0112      	lsls	r2, r2, #4
+ 80020ca:	4293      	cmp	r3, r2
+ 80020cc:	d01f      	beq.n	800210e <LL_RCC_GetLPUARTClockFreq+0x5e>
+ 80020ce:	22c0      	movs	r2, #192	; 0xc0
+ 80020d0:	0112      	lsls	r2, r2, #4
+ 80020d2:	4293      	cmp	r3, r2
+ 80020d4:	d823      	bhi.n	800211e <LL_RCC_GetLPUARTClockFreq+0x6e>
+ 80020d6:	2280      	movs	r2, #128	; 0x80
+ 80020d8:	00d2      	lsls	r2, r2, #3
+ 80020da:	4293      	cmp	r3, r2
+ 80020dc:	d004      	beq.n	80020e8 <LL_RCC_GetLPUARTClockFreq+0x38>
+ 80020de:	2280      	movs	r2, #128	; 0x80
+ 80020e0:	0112      	lsls	r2, r2, #4
+ 80020e2:	4293      	cmp	r3, r2
+ 80020e4:	d005      	beq.n	80020f2 <LL_RCC_GetLPUARTClockFreq+0x42>
+ 80020e6:	e01a      	b.n	800211e <LL_RCC_GetLPUARTClockFreq+0x6e>
+  {
+    case LL_RCC_LPUART1_CLKSOURCE_SYSCLK: /* LPUART1 Clock is System Clock */
+      lpuart_frequency = RCC_GetSystemClockFreq();
+ 80020e8:	f000 f832 	bl	8002150 <RCC_GetSystemClockFreq>
+ 80020ec:	0003      	movs	r3, r0
+ 80020ee:	60fb      	str	r3, [r7, #12]
+      break;
+ 80020f0:	e025      	b.n	800213e <LL_RCC_GetLPUARTClockFreq+0x8e>
+
+    case LL_RCC_LPUART1_CLKSOURCE_HSI:    /* LPUART1 Clock is HSI Osc. */
+      if (LL_RCC_HSI_IsReady() != 0U)
+ 80020f2:	f7ff ff47 	bl	8001f84 <LL_RCC_HSI_IsReady>
+ 80020f6:	1e03      	subs	r3, r0, #0
+ 80020f8:	d01e      	beq.n	8002138 <LL_RCC_GetLPUARTClockFreq+0x88>
+      {
+        if (LL_RCC_IsActiveFlag_HSIDIV() != 0U)
+ 80020fa:	f7ff ffc9 	bl	8002090 <LL_RCC_IsActiveFlag_HSIDIV>
+ 80020fe:	1e03      	subs	r3, r0, #0
+ 8002100:	d002      	beq.n	8002108 <LL_RCC_GetLPUARTClockFreq+0x58>
+        {
+          lpuart_frequency = (HSI_VALUE >> 2U);
+ 8002102:	4b11      	ldr	r3, [pc, #68]	; (8002148 <LL_RCC_GetLPUARTClockFreq+0x98>)
+ 8002104:	60fb      	str	r3, [r7, #12]
+        else
+        {
+          lpuart_frequency = HSI_VALUE;
+        }
+      }
+      break;
+ 8002106:	e017      	b.n	8002138 <LL_RCC_GetLPUARTClockFreq+0x88>
+          lpuart_frequency = HSI_VALUE;
+ 8002108:	4b10      	ldr	r3, [pc, #64]	; (800214c <LL_RCC_GetLPUARTClockFreq+0x9c>)
+ 800210a:	60fb      	str	r3, [r7, #12]
+      break;
+ 800210c:	e014      	b.n	8002138 <LL_RCC_GetLPUARTClockFreq+0x88>
+
+    case LL_RCC_LPUART1_CLKSOURCE_LSE:    /* LPUART1 Clock is LSE Osc. */
+      if (LL_RCC_LSE_IsReady() != 0U)
+ 800210e:	f7ff ff49 	bl	8001fa4 <LL_RCC_LSE_IsReady>
+ 8002112:	1e03      	subs	r3, r0, #0
+ 8002114:	d012      	beq.n	800213c <LL_RCC_GetLPUARTClockFreq+0x8c>
+      {
+        lpuart_frequency = LSE_VALUE;
+ 8002116:	2380      	movs	r3, #128	; 0x80
+ 8002118:	021b      	lsls	r3, r3, #8
+ 800211a:	60fb      	str	r3, [r7, #12]
+      }
+      break;
+ 800211c:	e00e      	b.n	800213c <LL_RCC_GetLPUARTClockFreq+0x8c>
+
+    case LL_RCC_LPUART1_CLKSOURCE_PCLK1:  /* LPUART1 Clock is PCLK1 */
+    default:
+      lpuart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
+ 800211e:	f000 f817 	bl	8002150 <RCC_GetSystemClockFreq>
+ 8002122:	0003      	movs	r3, r0
+ 8002124:	0018      	movs	r0, r3
+ 8002126:	f000 f857 	bl	80021d8 <RCC_GetHCLKClockFreq>
+ 800212a:	0003      	movs	r3, r0
+ 800212c:	0018      	movs	r0, r3
+ 800212e:	f000 f869 	bl	8002204 <RCC_GetPCLK1ClockFreq>
+ 8002132:	0003      	movs	r3, r0
+ 8002134:	60fb      	str	r3, [r7, #12]
+      break;
+ 8002136:	e002      	b.n	800213e <LL_RCC_GetLPUARTClockFreq+0x8e>
+      break;
+ 8002138:	46c0      	nop			; (mov r8, r8)
+ 800213a:	e000      	b.n	800213e <LL_RCC_GetLPUARTClockFreq+0x8e>
+      break;
+ 800213c:	46c0      	nop			; (mov r8, r8)
+  }
+
+  return lpuart_frequency;
+ 800213e:	68fb      	ldr	r3, [r7, #12]
+}
+ 8002140:	0018      	movs	r0, r3
+ 8002142:	46bd      	mov	sp, r7
+ 8002144:	b004      	add	sp, #16
+ 8002146:	bd80      	pop	{r7, pc}
+ 8002148:	003d0900 	.word	0x003d0900
+ 800214c:	00f42400 	.word	0x00f42400
+
+08002150 <RCC_GetSystemClockFreq>:
+/**
+  * @brief  Return SYSTEM clock frequency
+  * @retval SYSTEM clock frequency (in Hz)
+  */
+uint32_t RCC_GetSystemClockFreq(void)
+{
+ 8002150:	b580      	push	{r7, lr}
+ 8002152:	b082      	sub	sp, #8
+ 8002154:	af00      	add	r7, sp, #0
+  uint32_t frequency;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (LL_RCC_GetSysClkSource())
+ 8002156:	f7ff ff45 	bl	8001fe4 <LL_RCC_GetSysClkSource>
+ 800215a:	0003      	movs	r3, r0
+ 800215c:	2b0c      	cmp	r3, #12
+ 800215e:	d020      	beq.n	80021a2 <RCC_GetSystemClockFreq+0x52>
+ 8002160:	d824      	bhi.n	80021ac <RCC_GetSystemClockFreq+0x5c>
+ 8002162:	2b08      	cmp	r3, #8
+ 8002164:	d01a      	beq.n	800219c <RCC_GetSystemClockFreq+0x4c>
+ 8002166:	d821      	bhi.n	80021ac <RCC_GetSystemClockFreq+0x5c>
+ 8002168:	2b00      	cmp	r3, #0
+ 800216a:	d002      	beq.n	8002172 <RCC_GetSystemClockFreq+0x22>
+ 800216c:	2b04      	cmp	r3, #4
+ 800216e:	d00b      	beq.n	8002188 <RCC_GetSystemClockFreq+0x38>
+ 8002170:	e01c      	b.n	80021ac <RCC_GetSystemClockFreq+0x5c>
+  {
+    case LL_RCC_SYS_CLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
+      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
+ 8002172:	f7ff ff2b 	bl	8001fcc <LL_RCC_MSI_GetRange>
+ 8002176:	0003      	movs	r3, r0
+ 8002178:	0b5b      	lsrs	r3, r3, #13
+ 800217a:	3301      	adds	r3, #1
+ 800217c:	2280      	movs	r2, #128	; 0x80
+ 800217e:	0212      	lsls	r2, r2, #8
+ 8002180:	409a      	lsls	r2, r3
+ 8002182:	0013      	movs	r3, r2
+ 8002184:	607b      	str	r3, [r7, #4]
+      break;
+ 8002186:	e01c      	b.n	80021c2 <RCC_GetSystemClockFreq+0x72>
+
+    case LL_RCC_SYS_CLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
+      if (LL_RCC_IsActiveFlag_HSIDIV() != 0U)
+ 8002188:	f7ff ff82 	bl	8002090 <LL_RCC_IsActiveFlag_HSIDIV>
+ 800218c:	1e03      	subs	r3, r0, #0
+ 800218e:	d002      	beq.n	8002196 <RCC_GetSystemClockFreq+0x46>
+      {
+        frequency = (HSI_VALUE >> 2U);
+ 8002190:	4b0e      	ldr	r3, [pc, #56]	; (80021cc <RCC_GetSystemClockFreq+0x7c>)
+ 8002192:	607b      	str	r3, [r7, #4]
+      }
+      else
+      {
+        frequency = HSI_VALUE;
+      }
+      break;
+ 8002194:	e015      	b.n	80021c2 <RCC_GetSystemClockFreq+0x72>
+        frequency = HSI_VALUE;
+ 8002196:	4b0e      	ldr	r3, [pc, #56]	; (80021d0 <RCC_GetSystemClockFreq+0x80>)
+ 8002198:	607b      	str	r3, [r7, #4]
+      break;
+ 800219a:	e012      	b.n	80021c2 <RCC_GetSystemClockFreq+0x72>
+
+    case LL_RCC_SYS_CLKSOURCE_STATUS_HSE:  /* HSE used as system clock source */
+      frequency = HSE_VALUE;
+ 800219c:	4b0d      	ldr	r3, [pc, #52]	; (80021d4 <RCC_GetSystemClockFreq+0x84>)
+ 800219e:	607b      	str	r3, [r7, #4]
+      break;
+ 80021a0:	e00f      	b.n	80021c2 <RCC_GetSystemClockFreq+0x72>
+
+    case LL_RCC_SYS_CLKSOURCE_STATUS_PLL:  /* PLL used as system clock  source */
+      frequency = RCC_PLL_GetFreqDomain_SYS();
+ 80021a2:	f000 f843 	bl	800222c <RCC_PLL_GetFreqDomain_SYS>
+ 80021a6:	0003      	movs	r3, r0
+ 80021a8:	607b      	str	r3, [r7, #4]
+      break;
+ 80021aa:	e00a      	b.n	80021c2 <RCC_GetSystemClockFreq+0x72>
+
+    default:
+      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
+ 80021ac:	f7ff ff0e 	bl	8001fcc <LL_RCC_MSI_GetRange>
+ 80021b0:	0003      	movs	r3, r0
+ 80021b2:	0b5b      	lsrs	r3, r3, #13
+ 80021b4:	3301      	adds	r3, #1
+ 80021b6:	2280      	movs	r2, #128	; 0x80
+ 80021b8:	0212      	lsls	r2, r2, #8
+ 80021ba:	409a      	lsls	r2, r3
+ 80021bc:	0013      	movs	r3, r2
+ 80021be:	607b      	str	r3, [r7, #4]
+      break;
+ 80021c0:	46c0      	nop			; (mov r8, r8)
+  }
+
+  return frequency;
+ 80021c2:	687b      	ldr	r3, [r7, #4]
+}
+ 80021c4:	0018      	movs	r0, r3
+ 80021c6:	46bd      	mov	sp, r7
+ 80021c8:	b002      	add	sp, #8
+ 80021ca:	bd80      	pop	{r7, pc}
+ 80021cc:	003d0900 	.word	0x003d0900
+ 80021d0:	00f42400 	.word	0x00f42400
+ 80021d4:	007a1200 	.word	0x007a1200
+
+080021d8 <RCC_GetHCLKClockFreq>:
+  * @brief  Return HCLK clock frequency
+  * @param  SYSCLK_Frequency SYSCLK clock frequency
   * @retval HCLK clock frequency (in Hz)
   */
 uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
 {
+ 80021d8:	b580      	push	{r7, lr}
+ 80021da:	b082      	sub	sp, #8
+ 80021dc:	af00      	add	r7, sp, #0
+ 80021de:	6078      	str	r0, [r7, #4]
   /* HCLK clock frequency */
   return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
- 8000f72:	4a04      	ldr	r2, [pc, #16]	; (8000f84 <RCC_GetHCLKClockFreq+0x14>)
- 8000f74:	68db      	ldr	r3, [r3, #12]
- 8000f76:	061b      	lsls	r3, r3, #24
- 8000f78:	0f1b      	lsrs	r3, r3, #28
- 8000f7a:	5cd3      	ldrb	r3, [r2, r3]
- 8000f7c:	40d8      	lsrs	r0, r3
+ 80021e0:	f7ff ff0c 	bl	8001ffc <LL_RCC_GetAHBPrescaler>
+ 80021e4:	0003      	movs	r3, r0
+ 80021e6:	091b      	lsrs	r3, r3, #4
+ 80021e8:	220f      	movs	r2, #15
+ 80021ea:	4013      	ands	r3, r2
+ 80021ec:	4a04      	ldr	r2, [pc, #16]	; (8002200 <RCC_GetHCLKClockFreq+0x28>)
+ 80021ee:	5cd3      	ldrb	r3, [r2, r3]
+ 80021f0:	001a      	movs	r2, r3
+ 80021f2:	687b      	ldr	r3, [r7, #4]
+ 80021f4:	40d3      	lsrs	r3, r2
 }
- 8000f7e:	4770      	bx	lr
- 8000f80:	40021000 	.word	0x40021000
- 8000f84:	08001184 	.word	0x08001184
+ 80021f6:	0018      	movs	r0, r3
+ 80021f8:	46bd      	mov	sp, r7
+ 80021fa:	b002      	add	sp, #8
+ 80021fc:	bd80      	pop	{r7, pc}
+ 80021fe:	46c0      	nop			; (mov r8, r8)
+ 8002200:	080023c8 	.word	0x080023c8
 
-08000f88 <RCC_GetPCLK1ClockFreq>:
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
- 8000f88:	4b03      	ldr	r3, [pc, #12]	; (8000f98 <RCC_GetPCLK1ClockFreq+0x10>)
+08002204 <RCC_GetPCLK1ClockFreq>:
+  * @brief  Return PCLK1 clock frequency
+  * @param  HCLK_Frequency HCLK clock frequency
   * @retval PCLK1 clock frequency (in Hz)
   */
 uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
 {
+ 8002204:	b580      	push	{r7, lr}
+ 8002206:	b082      	sub	sp, #8
+ 8002208:	af00      	add	r7, sp, #0
+ 800220a:	6078      	str	r0, [r7, #4]
   /* PCLK1 clock frequency */
   return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
- 8000f8a:	4a04      	ldr	r2, [pc, #16]	; (8000f9c <RCC_GetPCLK1ClockFreq+0x14>)
- 8000f8c:	68db      	ldr	r3, [r3, #12]
- 8000f8e:	055b      	lsls	r3, r3, #21
- 8000f90:	0f5b      	lsrs	r3, r3, #29
- 8000f92:	5cd3      	ldrb	r3, [r2, r3]
- 8000f94:	40d8      	lsrs	r0, r3
+ 800220c:	f7ff ff02 	bl	8002014 <LL_RCC_GetAPB1Prescaler>
+ 8002210:	0003      	movs	r3, r0
+ 8002212:	0a1b      	lsrs	r3, r3, #8
+ 8002214:	4a04      	ldr	r2, [pc, #16]	; (8002228 <RCC_GetPCLK1ClockFreq+0x24>)
+ 8002216:	5cd3      	ldrb	r3, [r2, r3]
+ 8002218:	001a      	movs	r2, r3
+ 800221a:	687b      	ldr	r3, [r7, #4]
+ 800221c:	40d3      	lsrs	r3, r2
 }
- 8000f96:	4770      	bx	lr
- 8000f98:	40021000 	.word	0x40021000
- 8000f9c:	08001194 	.word	0x08001194
+ 800221e:	0018      	movs	r0, r3
+ 8002220:	46bd      	mov	sp, r7
+ 8002222:	b002      	add	sp, #8
+ 8002224:	bd80      	pop	{r7, pc}
+ 8002226:	46c0      	nop			; (mov r8, r8)
+ 8002228:	080023d8 	.word	0x080023d8
 
-08000fa0 <RCC_PLL_GetFreqDomain_SYS>:
+0800222c <RCC_PLL_GetFreqDomain_SYS>:
 /**
   * @brief  Return PLL clock frequency used for system domain
   * @retval PLL clock frequency (in Hz)
   */
 uint32_t RCC_PLL_GetFreqDomain_SYS(void)
 {
- 8000fa0:	b510      	push	{r4, lr}
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC));
- 8000fa2:	4c0e      	ldr	r4, [pc, #56]	; (8000fdc <RCC_PLL_GetFreqDomain_SYS+0x3c>)
- 8000fa4:	68e3      	ldr	r3, [r4, #12]
+ 800222c:	b590      	push	{r4, r7, lr}
+ 800222e:	b083      	sub	sp, #12
+ 8002230:	af00      	add	r7, sp, #0
+  uint32_t pllinputfreq, pllsource;
+
   /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL divider) * PLL Multiplicator */
 
   /* Get PLL source */
   pllsource = LL_RCC_PLL_GetMainSource();
+ 8002232:	f7ff ff09 	bl	8002048 <LL_RCC_PLL_GetMainSource>
+ 8002236:	0003      	movs	r3, r0
+ 8002238:	603b      	str	r3, [r7, #0]
 
   switch (pllsource)
- 8000fa6:	03db      	lsls	r3, r3, #15
- 8000fa8:	d415      	bmi.n	8000fd6 <RCC_PLL_GetFreqDomain_SYS+0x36>
+ 800223a:	683b      	ldr	r3, [r7, #0]
+ 800223c:	2b00      	cmp	r3, #0
+ 800223e:	d109      	bne.n	8002254 <RCC_PLL_GetFreqDomain_SYS+0x28>
   {
     case LL_RCC_PLLSOURCE_HSI:       /* HSI used as PLL clock source */
       if (LL_RCC_IsActiveFlag_HSIDIV() != 0U)
- 8000faa:	f7ff ffd9 	bl	8000f60 <LL_RCC_IsActiveFlag_HSIDIV>
+ 8002240:	f7ff ff26 	bl	8002090 <LL_RCC_IsActiveFlag_HSIDIV>
+ 8002244:	1e03      	subs	r3, r0, #0
+ 8002246:	d002      	beq.n	800224e <RCC_PLL_GetFreqDomain_SYS+0x22>
       {
         pllinputfreq = (HSI_VALUE >> 2U);
+ 8002248:	4b10      	ldr	r3, [pc, #64]	; (800228c <RCC_PLL_GetFreqDomain_SYS+0x60>)
+ 800224a:	607b      	str	r3, [r7, #4]
       }
       else
       {
         pllinputfreq = HSI_VALUE;
- 8000fae:	1e43      	subs	r3, r0, #1
- 8000fb0:	4198      	sbcs	r0, r3
- 8000fb2:	4b0b      	ldr	r3, [pc, #44]	; (8000fe0 <RCC_PLL_GetFreqDomain_SYS+0x40>)
- 8000fb4:	4240      	negs	r0, r0
- 8000fb6:	4018      	ands	r0, r3
- 8000fb8:	4b0a      	ldr	r3, [pc, #40]	; (8000fe4 <RCC_PLL_GetFreqDomain_SYS+0x44>)
- 8000fba:	18c0      	adds	r0, r0, r3
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL));
- 8000fbc:	68e3      	ldr	r3, [r4, #12]
+      }
+      break;
+ 800224c:	e005      	b.n	800225a <RCC_PLL_GetFreqDomain_SYS+0x2e>
+        pllinputfreq = HSI_VALUE;
+ 800224e:	4b10      	ldr	r3, [pc, #64]	; (8002290 <RCC_PLL_GetFreqDomain_SYS+0x64>)
+ 8002250:	607b      	str	r3, [r7, #4]
+      break;
+ 8002252:	e002      	b.n	800225a <RCC_PLL_GetFreqDomain_SYS+0x2e>
 
     default:       /* HSE used as PLL clock source */
       pllinputfreq = HSE_VALUE;
+ 8002254:	4b0f      	ldr	r3, [pc, #60]	; (8002294 <RCC_PLL_GetFreqDomain_SYS+0x68>)
+ 8002256:	607b      	str	r3, [r7, #4]
       break;
+ 8002258:	46c0      	nop			; (mov r8, r8)
   }
   return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator(), LL_RCC_PLL_GetDivider());
- 8000fbe:	4a0a      	ldr	r2, [pc, #40]	; (8000fe8 <RCC_PLL_GetFreqDomain_SYS+0x48>)
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV));
- 8000fc0:	68e1      	ldr	r1, [r4, #12]
- 8000fc2:	029b      	lsls	r3, r3, #10
- 8000fc4:	0f1b      	lsrs	r3, r3, #28
- 8000fc6:	5cd3      	ldrb	r3, [r2, r3]
- 8000fc8:	0209      	lsls	r1, r1, #8
- 8000fca:	0f89      	lsrs	r1, r1, #30
- 8000fcc:	4358      	muls	r0, r3
- 8000fce:	3101      	adds	r1, #1
- 8000fd0:	f7ff f89a 	bl	8000108 <__udivsi3>
+ 800225a:	f7ff ff01 	bl	8002060 <LL_RCC_PLL_GetMultiplicator>
+ 800225e:	0003      	movs	r3, r0
+ 8002260:	0c9b      	lsrs	r3, r3, #18
+ 8002262:	4a0d      	ldr	r2, [pc, #52]	; (8002298 <RCC_PLL_GetFreqDomain_SYS+0x6c>)
+ 8002264:	5cd3      	ldrb	r3, [r2, r3]
+ 8002266:	001a      	movs	r2, r3
+ 8002268:	687b      	ldr	r3, [r7, #4]
+ 800226a:	4353      	muls	r3, r2
+ 800226c:	001c      	movs	r4, r3
+ 800226e:	f7ff ff03 	bl	8002078 <LL_RCC_PLL_GetDivider>
+ 8002272:	0003      	movs	r3, r0
+ 8002274:	0d9b      	lsrs	r3, r3, #22
+ 8002276:	3301      	adds	r3, #1
+ 8002278:	0019      	movs	r1, r3
+ 800227a:	0020      	movs	r0, r4
+ 800227c:	f7fd ff44 	bl	8000108 <__udivsi3>
+ 8002280:	0003      	movs	r3, r0
 }
- 8000fd4:	bd10      	pop	{r4, pc}
-      pllinputfreq = HSE_VALUE;
- 8000fd6:	4805      	ldr	r0, [pc, #20]	; (8000fec <RCC_PLL_GetFreqDomain_SYS+0x4c>)
- 8000fd8:	e7f0      	b.n	8000fbc <RCC_PLL_GetFreqDomain_SYS+0x1c>
- 8000fda:	46c0      	nop			; (mov r8, r8)
- 8000fdc:	40021000 	.word	0x40021000
- 8000fe0:	ff48e500 	.word	0xff48e500
- 8000fe4:	00f42400 	.word	0x00f42400
- 8000fe8:	0800119c 	.word	0x0800119c
- 8000fec:	007a1200 	.word	0x007a1200
+ 8002282:	0018      	movs	r0, r3
+ 8002284:	46bd      	mov	sp, r7
+ 8002286:	b003      	add	sp, #12
+ 8002288:	bd90      	pop	{r4, r7, pc}
+ 800228a:	46c0      	nop			; (mov r8, r8)
+ 800228c:	003d0900 	.word	0x003d0900
+ 8002290:	00f42400 	.word	0x00f42400
+ 8002294:	007a1200 	.word	0x007a1200
+ 8002298:	080023e0 	.word	0x080023e0
 
-08000ff0 <RCC_GetSystemClockFreq>:
-  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
- 8000ff0:	210c      	movs	r1, #12
- 8000ff2:	4a13      	ldr	r2, [pc, #76]	; (8001040 <RCC_GetSystemClockFreq+0x50>)
-{
- 8000ff4:	b510      	push	{r4, lr}
- 8000ff6:	68d3      	ldr	r3, [r2, #12]
- 8000ff8:	400b      	ands	r3, r1
- 8000ffa:	0011      	movs	r1, r2
-  switch (LL_RCC_GetSysClkSource())
- 8000ffc:	2b08      	cmp	r3, #8
- 8000ffe:	d01d      	beq.n	800103c <RCC_GetSystemClockFreq+0x4c>
- 8001000:	d805      	bhi.n	800100e <RCC_GetSystemClockFreq+0x1e>
- 8001002:	2b00      	cmp	r3, #0
- 8001004:	d008      	beq.n	8001018 <RCC_GetSystemClockFreq+0x28>
- 8001006:	2b04      	cmp	r3, #4
- 8001008:	d00e      	beq.n	8001028 <RCC_GetSystemClockFreq+0x38>
-  return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSIRANGE));
- 800100a:	684b      	ldr	r3, [r1, #4]
- 800100c:	e005      	b.n	800101a <RCC_GetSystemClockFreq+0x2a>
- 800100e:	2b0c      	cmp	r3, #12
- 8001010:	d1fb      	bne.n	800100a <RCC_GetSystemClockFreq+0x1a>
-      frequency = RCC_PLL_GetFreqDomain_SYS();
- 8001012:	f7ff ffc5 	bl	8000fa0 <RCC_PLL_GetFreqDomain_SYS>
-      break;
- 8001016:	e010      	b.n	800103a <RCC_GetSystemClockFreq+0x4a>
- 8001018:	6853      	ldr	r3, [r2, #4]
-      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
- 800101a:	2080      	movs	r0, #128	; 0x80
- 800101c:	041b      	lsls	r3, r3, #16
- 800101e:	0f5b      	lsrs	r3, r3, #29
- 8001020:	3301      	adds	r3, #1
- 8001022:	0200      	lsls	r0, r0, #8
- 8001024:	4098      	lsls	r0, r3
-  return frequency;
- 8001026:	e008      	b.n	800103a <RCC_GetSystemClockFreq+0x4a>
-      if (LL_RCC_IsActiveFlag_HSIDIV() != 0U)
- 8001028:	f7ff ff9a 	bl	8000f60 <LL_RCC_IsActiveFlag_HSIDIV>
-        frequency = HSI_VALUE;
- 800102c:	1e43      	subs	r3, r0, #1
- 800102e:	4198      	sbcs	r0, r3
- 8001030:	4b04      	ldr	r3, [pc, #16]	; (8001044 <RCC_GetSystemClockFreq+0x54>)
- 8001032:	4240      	negs	r0, r0
- 8001034:	4018      	ands	r0, r3
- 8001036:	4b04      	ldr	r3, [pc, #16]	; (8001048 <RCC_GetSystemClockFreq+0x58>)
- 8001038:	18c0      	adds	r0, r0, r3
-}
- 800103a:	bd10      	pop	{r4, pc}
-  switch (LL_RCC_GetSysClkSource())
- 800103c:	4803      	ldr	r0, [pc, #12]	; (800104c <RCC_GetSystemClockFreq+0x5c>)
- 800103e:	e7fc      	b.n	800103a <RCC_GetSystemClockFreq+0x4a>
- 8001040:	40021000 	.word	0x40021000
- 8001044:	ff48e500 	.word	0xff48e500
- 8001048:	00f42400 	.word	0x00f42400
- 800104c:	007a1200 	.word	0x007a1200
-
-08001050 <LL_RCC_GetLPUARTClockFreq>:
-  return (uint32_t)(READ_BIT(RCC->CCIPR, LPUARTx));
- 8001050:	4a17      	ldr	r2, [pc, #92]	; (80010b0 <LL_RCC_GetLPUARTClockFreq+0x60>)
-{
- 8001052:	b510      	push	{r4, lr}
- 8001054:	6cd3      	ldr	r3, [r2, #76]	; 0x4c
- 8001056:	4018      	ands	r0, r3
-  switch (LL_RCC_GetLPUARTClockSource(LPUARTxSource))
- 8001058:	2380      	movs	r3, #128	; 0x80
- 800105a:	011b      	lsls	r3, r3, #4
- 800105c:	4298      	cmp	r0, r3
- 800105e:	d00a      	beq.n	8001076 <LL_RCC_GetLPUARTClockFreq+0x26>
- 8001060:	23c0      	movs	r3, #192	; 0xc0
- 8001062:	011b      	lsls	r3, r3, #4
- 8001064:	4298      	cmp	r0, r3
- 8001066:	d014      	beq.n	8001092 <LL_RCC_GetLPUARTClockFreq+0x42>
- 8001068:	2380      	movs	r3, #128	; 0x80
- 800106a:	00db      	lsls	r3, r3, #3
- 800106c:	4298      	cmp	r0, r3
- 800106e:	d115      	bne.n	800109c <LL_RCC_GetLPUARTClockFreq+0x4c>
-      lpuart_frequency = RCC_GetSystemClockFreq();
- 8001070:	f7ff ffbe 	bl	8000ff0 <RCC_GetSystemClockFreq>
-}
- 8001074:	bd10      	pop	{r4, pc}
-      if (LL_RCC_HSI_IsReady() != 0U)
- 8001076:	f7ff ff6b 	bl	8000f50 <LL_RCC_HSI_IsReady>
- 800107a:	2800      	cmp	r0, #0
- 800107c:	d00c      	beq.n	8001098 <LL_RCC_GetLPUARTClockFreq+0x48>
-        if (LL_RCC_IsActiveFlag_HSIDIV() != 0U)
- 800107e:	f7ff ff6f 	bl	8000f60 <LL_RCC_IsActiveFlag_HSIDIV>
-          lpuart_frequency = HSI_VALUE;
- 8001082:	1e43      	subs	r3, r0, #1
- 8001084:	4198      	sbcs	r0, r3
- 8001086:	4b0b      	ldr	r3, [pc, #44]	; (80010b4 <LL_RCC_GetLPUARTClockFreq+0x64>)
- 8001088:	4240      	negs	r0, r0
- 800108a:	4018      	ands	r0, r3
- 800108c:	4b0a      	ldr	r3, [pc, #40]	; (80010b8 <LL_RCC_GetLPUARTClockFreq+0x68>)
- 800108e:	18c0      	adds	r0, r0, r3
- 8001090:	e7f0      	b.n	8001074 <LL_RCC_GetLPUARTClockFreq+0x24>
-  return ((READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == RCC_CSR_LSERDY) ? 1UL : 0UL);
- 8001092:	6d13      	ldr	r3, [r2, #80]	; 0x50
- 8001094:	059b      	lsls	r3, r3, #22
- 8001096:	d408      	bmi.n	80010aa <LL_RCC_GetLPUARTClockFreq+0x5a>
-  uint32_t lpuart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
- 8001098:	2000      	movs	r0, #0
- 800109a:	e7eb      	b.n	8001074 <LL_RCC_GetLPUARTClockFreq+0x24>
-      lpuart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
- 800109c:	f7ff ffa8 	bl	8000ff0 <RCC_GetSystemClockFreq>
- 80010a0:	f7ff ff66 	bl	8000f70 <RCC_GetHCLKClockFreq>
- 80010a4:	f7ff ff70 	bl	8000f88 <RCC_GetPCLK1ClockFreq>
-      break;
- 80010a8:	e7e4      	b.n	8001074 <LL_RCC_GetLPUARTClockFreq+0x24>
-        lpuart_frequency = LSE_VALUE;
- 80010aa:	2080      	movs	r0, #128	; 0x80
- 80010ac:	0200      	lsls	r0, r0, #8
-  return lpuart_frequency;
- 80010ae:	e7e1      	b.n	8001074 <LL_RCC_GetLPUARTClockFreq+0x24>
- 80010b0:	40021000 	.word	0x40021000
- 80010b4:	ff48e500 	.word	0xff48e500
- 80010b8:	00f42400 	.word	0x00f42400
-
-080010bc <LL_Init1msTick>:
+0800229c <LL_InitTick>:
+  *         configuration by calling this function, for a delay use rather osDelay RTOS service.
+  * @param  Ticks Number of ticks
   * @retval None
   */
 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
 {
+ 800229c:	b580      	push	{r7, lr}
+ 800229e:	b082      	sub	sp, #8
+ 80022a0:	af00      	add	r7, sp, #0
+ 80022a2:	6078      	str	r0, [r7, #4]
+ 80022a4:	6039      	str	r1, [r7, #0]
   /* Configure the SysTick to have interrupt in 1ms time base */
   SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
- 80010bc:	21fa      	movs	r1, #250	; 0xfa
+ 80022a6:	6839      	ldr	r1, [r7, #0]
+ 80022a8:	6878      	ldr	r0, [r7, #4]
+ 80022aa:	f7fd ff2d 	bl	8000108 <__udivsi3>
+ 80022ae:	0003      	movs	r3, r0
+ 80022b0:	001a      	movs	r2, r3
+ 80022b2:	4b06      	ldr	r3, [pc, #24]	; (80022cc <LL_InitTick+0x30>)
+ 80022b4:	3a01      	subs	r2, #1
+ 80022b6:	605a      	str	r2, [r3, #4]
+  SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
+ 80022b8:	4b04      	ldr	r3, [pc, #16]	; (80022cc <LL_InitTick+0x30>)
+ 80022ba:	2200      	movs	r2, #0
+ 80022bc:	609a      	str	r2, [r3, #8]
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+ 80022be:	4b03      	ldr	r3, [pc, #12]	; (80022cc <LL_InitTick+0x30>)
+ 80022c0:	2207      	movs	r2, #7
+ 80022c2:	601a      	str	r2, [r3, #0]
+		  	  	   SysTick_CTRL_TICKINT_Msk |
+                   SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
+}
+ 80022c4:	46c0      	nop			; (mov r8, r8)
+ 80022c6:	46bd      	mov	sp, r7
+ 80022c8:	b002      	add	sp, #8
+ 80022ca:	bd80      	pop	{r7, pc}
+ 80022cc:	e000e010 	.word	0xe000e010
+
+080022d0 <LL_Init1msTick>:
   * @param  HCLKFrequency HCLK frequency in Hz
   * @note   HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq
   * @retval None
   */
 void LL_Init1msTick(uint32_t HCLKFrequency)
 {
- 80010be:	b510      	push	{r4, lr}
- 80010c0:	0089      	lsls	r1, r1, #2
- 80010c2:	f7ff f821 	bl	8000108 <__udivsi3>
-  SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
- 80010c6:	2200      	movs	r2, #0
-  SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
- 80010c8:	4b03      	ldr	r3, [pc, #12]	; (80010d8 <LL_Init1msTick+0x1c>)
- 80010ca:	3801      	subs	r0, #1
- 80010cc:	6058      	str	r0, [r3, #4]
-  SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
- 80010ce:	609a      	str	r2, [r3, #8]
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
- 80010d0:	3207      	adds	r2, #7
- 80010d2:	601a      	str	r2, [r3, #0]
+ 80022d0:	b580      	push	{r7, lr}
+ 80022d2:	b082      	sub	sp, #8
+ 80022d4:	af00      	add	r7, sp, #0
+ 80022d6:	6078      	str	r0, [r7, #4]
   /* Use frequency provided in argument */
   LL_InitTick(HCLKFrequency, 1000U);
+ 80022d8:	23fa      	movs	r3, #250	; 0xfa
+ 80022da:	009a      	lsls	r2, r3, #2
+ 80022dc:	687b      	ldr	r3, [r7, #4]
+ 80022de:	0011      	movs	r1, r2
+ 80022e0:	0018      	movs	r0, r3
+ 80022e2:	f7ff ffdb 	bl	800229c <LL_InitTick>
 }
- 80010d4:	bd10      	pop	{r4, pc}
- 80010d6:	46c0      	nop			; (mov r8, r8)
- 80010d8:	e000e010 	.word	0xe000e010
+ 80022e6:	46c0      	nop			; (mov r8, r8)
+ 80022e8:	46bd      	mov	sp, r7
+ 80022ea:	b002      	add	sp, #8
+ 80022ec:	bd80      	pop	{r7, pc}
+	...
 
-080010dc <LL_mDelay>:
+080022f0 <LL_mDelay>:
+  *         will configure Systick to 1ms
   * @param  Delay specifies the delay time length, in milliseconds.
   * @retval None
   */
 void LL_mDelay(uint32_t Delay)
 {
+ 80022f0:	b580      	push	{r7, lr}
+ 80022f2:	b084      	sub	sp, #16
+ 80022f4:	af00      	add	r7, sp, #0
+ 80022f6:	6078      	str	r0, [r7, #4]
   __IO uint32_t  tmp = SysTick->CTRL;  /* Clear the COUNTFLAG first */
- 80010dc:	4b09      	ldr	r3, [pc, #36]	; (8001104 <LL_mDelay+0x28>)
-{
- 80010de:	b082      	sub	sp, #8
-  __IO uint32_t  tmp = SysTick->CTRL;  /* Clear the COUNTFLAG first */
- 80010e0:	681a      	ldr	r2, [r3, #0]
- 80010e2:	9201      	str	r2, [sp, #4]
+ 80022f8:	4b0d      	ldr	r3, [pc, #52]	; (8002330 <LL_mDelay+0x40>)
+ 80022fa:	681b      	ldr	r3, [r3, #0]
+ 80022fc:	60fb      	str	r3, [r7, #12]
   /* Add this code to indicate that local variable is not used */
   ((void)tmp);
- 80010e4:	9a01      	ldr	r2, [sp, #4]
+ 80022fe:	68fb      	ldr	r3, [r7, #12]
 
   /* Add a period to guaranty minimum wait */
   if (Delay < LL_MAX_DELAY)
+ 8002300:	687b      	ldr	r3, [r7, #4]
+ 8002302:	3301      	adds	r3, #1
+ 8002304:	d00c      	beq.n	8002320 <LL_mDelay+0x30>
   {
     Delay++;
- 80010e6:	1c42      	adds	r2, r0, #1
- 80010e8:	1e51      	subs	r1, r2, #1
- 80010ea:	418a      	sbcs	r2, r1
- 80010ec:	1880      	adds	r0, r0, r2
+ 8002306:	687b      	ldr	r3, [r7, #4]
+ 8002308:	3301      	adds	r3, #1
+ 800230a:	607b      	str	r3, [r7, #4]
   }
 
   while (Delay)
+ 800230c:	e008      	b.n	8002320 <LL_mDelay+0x30>
   {
     if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U)
- 80010ee:	2280      	movs	r2, #128	; 0x80
- 80010f0:	0252      	lsls	r2, r2, #9
-  while (Delay)
- 80010f2:	2800      	cmp	r0, #0
- 80010f4:	d101      	bne.n	80010fa <LL_mDelay+0x1e>
+ 800230e:	4b08      	ldr	r3, [pc, #32]	; (8002330 <LL_mDelay+0x40>)
+ 8002310:	681a      	ldr	r2, [r3, #0]
+ 8002312:	2380      	movs	r3, #128	; 0x80
+ 8002314:	025b      	lsls	r3, r3, #9
+ 8002316:	4013      	ands	r3, r2
+ 8002318:	d002      	beq.n	8002320 <LL_mDelay+0x30>
     {
       Delay--;
+ 800231a:	687b      	ldr	r3, [r7, #4]
+ 800231c:	3b01      	subs	r3, #1
+ 800231e:	607b      	str	r3, [r7, #4]
+  while (Delay)
+ 8002320:	687b      	ldr	r3, [r7, #4]
+ 8002322:	2b00      	cmp	r3, #0
+ 8002324:	d1f3      	bne.n	800230e <LL_mDelay+0x1e>
     }
   }
 }
- 80010f6:	b002      	add	sp, #8
- 80010f8:	4770      	bx	lr
-    if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U)
- 80010fa:	6819      	ldr	r1, [r3, #0]
- 80010fc:	4211      	tst	r1, r2
- 80010fe:	d0f8      	beq.n	80010f2 <LL_mDelay+0x16>
-      Delay--;
- 8001100:	3801      	subs	r0, #1
- 8001102:	e7f6      	b.n	80010f2 <LL_mDelay+0x16>
- 8001104:	e000e010 	.word	0xe000e010
+ 8002326:	46c0      	nop			; (mov r8, r8)
+ 8002328:	46c0      	nop			; (mov r8, r8)
+ 800232a:	46bd      	mov	sp, r7
+ 800232c:	b004      	add	sp, #16
+ 800232e:	bd80      	pop	{r7, pc}
+ 8002330:	e000e010 	.word	0xe000e010
 
-08001108 <LL_SetSystemCoreClock>:
+08002334 <LL_SetSystemCoreClock>:
+  * @note   Variable can be calculated also through SystemCoreClockUpdate function.
+  * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
   * @retval None
   */
 void LL_SetSystemCoreClock(uint32_t HCLKFrequency)
 {
+ 8002334:	b580      	push	{r7, lr}
+ 8002336:	b082      	sub	sp, #8
+ 8002338:	af00      	add	r7, sp, #0
+ 800233a:	6078      	str	r0, [r7, #4]
   /* HCLK clock frequency */
   SystemCoreClock = HCLKFrequency;
- 8001108:	4b01      	ldr	r3, [pc, #4]	; (8001110 <LL_SetSystemCoreClock+0x8>)
- 800110a:	6018      	str	r0, [r3, #0]
+ 800233c:	4b03      	ldr	r3, [pc, #12]	; (800234c <LL_SetSystemCoreClock+0x18>)
+ 800233e:	687a      	ldr	r2, [r7, #4]
+ 8002340:	601a      	str	r2, [r3, #0]
 }
- 800110c:	4770      	bx	lr
- 800110e:	46c0      	nop			; (mov r8, r8)
- 8001110:	20000000 	.word	0x20000000
+ 8002342:	46c0      	nop			; (mov r8, r8)
+ 8002344:	46bd      	mov	sp, r7
+ 8002346:	b002      	add	sp, #8
+ 8002348:	bd80      	pop	{r7, pc}
+ 800234a:	46c0      	nop			; (mov r8, r8)
+ 800234c:	20000000 	.word	0x20000000
 
-08001114 <__libc_init_array>:
- 8001114:	b570      	push	{r4, r5, r6, lr}
- 8001116:	2600      	movs	r6, #0
- 8001118:	4d0c      	ldr	r5, [pc, #48]	; (800114c <__libc_init_array+0x38>)
- 800111a:	4c0d      	ldr	r4, [pc, #52]	; (8001150 <__libc_init_array+0x3c>)
- 800111c:	1b64      	subs	r4, r4, r5
- 800111e:	10a4      	asrs	r4, r4, #2
- 8001120:	42a6      	cmp	r6, r4
- 8001122:	d109      	bne.n	8001138 <__libc_init_array+0x24>
- 8001124:	2600      	movs	r6, #0
- 8001126:	f000 f821 	bl	800116c <_init>
- 800112a:	4d0a      	ldr	r5, [pc, #40]	; (8001154 <__libc_init_array+0x40>)
- 800112c:	4c0a      	ldr	r4, [pc, #40]	; (8001158 <__libc_init_array+0x44>)
- 800112e:	1b64      	subs	r4, r4, r5
- 8001130:	10a4      	asrs	r4, r4, #2
- 8001132:	42a6      	cmp	r6, r4
- 8001134:	d105      	bne.n	8001142 <__libc_init_array+0x2e>
- 8001136:	bd70      	pop	{r4, r5, r6, pc}
- 8001138:	00b3      	lsls	r3, r6, #2
- 800113a:	58eb      	ldr	r3, [r5, r3]
- 800113c:	4798      	blx	r3
- 800113e:	3601      	adds	r6, #1
- 8001140:	e7ee      	b.n	8001120 <__libc_init_array+0xc>
- 8001142:	00b3      	lsls	r3, r6, #2
- 8001144:	58eb      	ldr	r3, [r5, r3]
- 8001146:	4798      	blx	r3
- 8001148:	3601      	adds	r6, #1
- 800114a:	e7f2      	b.n	8001132 <__libc_init_array+0x1e>
- 800114c:	080011b0 	.word	0x080011b0
- 8001150:	080011b0 	.word	0x080011b0
- 8001154:	080011b0 	.word	0x080011b0
- 8001158:	080011b4 	.word	0x080011b4
+08002350 <__libc_init_array>:
+ 8002350:	b570      	push	{r4, r5, r6, lr}
+ 8002352:	2600      	movs	r6, #0
+ 8002354:	4d0c      	ldr	r5, [pc, #48]	; (8002388 <__libc_init_array+0x38>)
+ 8002356:	4c0d      	ldr	r4, [pc, #52]	; (800238c <__libc_init_array+0x3c>)
+ 8002358:	1b64      	subs	r4, r4, r5
+ 800235a:	10a4      	asrs	r4, r4, #2
+ 800235c:	42a6      	cmp	r6, r4
+ 800235e:	d109      	bne.n	8002374 <__libc_init_array+0x24>
+ 8002360:	2600      	movs	r6, #0
+ 8002362:	f000 f821 	bl	80023a8 <_init>
+ 8002366:	4d0a      	ldr	r5, [pc, #40]	; (8002390 <__libc_init_array+0x40>)
+ 8002368:	4c0a      	ldr	r4, [pc, #40]	; (8002394 <__libc_init_array+0x44>)
+ 800236a:	1b64      	subs	r4, r4, r5
+ 800236c:	10a4      	asrs	r4, r4, #2
+ 800236e:	42a6      	cmp	r6, r4
+ 8002370:	d105      	bne.n	800237e <__libc_init_array+0x2e>
+ 8002372:	bd70      	pop	{r4, r5, r6, pc}
+ 8002374:	00b3      	lsls	r3, r6, #2
+ 8002376:	58eb      	ldr	r3, [r5, r3]
+ 8002378:	4798      	blx	r3
+ 800237a:	3601      	adds	r6, #1
+ 800237c:	e7ee      	b.n	800235c <__libc_init_array+0xc>
+ 800237e:	00b3      	lsls	r3, r6, #2
+ 8002380:	58eb      	ldr	r3, [r5, r3]
+ 8002382:	4798      	blx	r3
+ 8002384:	3601      	adds	r6, #1
+ 8002386:	e7f2      	b.n	800236e <__libc_init_array+0x1e>
+ 8002388:	080023f4 	.word	0x080023f4
+ 800238c:	080023f4 	.word	0x080023f4
+ 8002390:	080023f4 	.word	0x080023f4
+ 8002394:	080023f8 	.word	0x080023f8
 
-0800115c <memset>:
- 800115c:	0003      	movs	r3, r0
- 800115e:	1882      	adds	r2, r0, r2
- 8001160:	4293      	cmp	r3, r2
- 8001162:	d100      	bne.n	8001166 <memset+0xa>
- 8001164:	4770      	bx	lr
- 8001166:	7019      	strb	r1, [r3, #0]
- 8001168:	3301      	adds	r3, #1
- 800116a:	e7f9      	b.n	8001160 <memset+0x4>
+08002398 <memset>:
+ 8002398:	0003      	movs	r3, r0
+ 800239a:	1882      	adds	r2, r0, r2
+ 800239c:	4293      	cmp	r3, r2
+ 800239e:	d100      	bne.n	80023a2 <memset+0xa>
+ 80023a0:	4770      	bx	lr
+ 80023a2:	7019      	strb	r1, [r3, #0]
+ 80023a4:	3301      	adds	r3, #1
+ 80023a6:	e7f9      	b.n	800239c <memset+0x4>
 
-0800116c <_init>:
- 800116c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800116e:	46c0      	nop			; (mov r8, r8)
- 8001170:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8001172:	bc08      	pop	{r3}
- 8001174:	469e      	mov	lr, r3
- 8001176:	4770      	bx	lr
+080023a8 <_init>:
+ 80023a8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 80023aa:	46c0      	nop			; (mov r8, r8)
+ 80023ac:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 80023ae:	bc08      	pop	{r3}
+ 80023b0:	469e      	mov	lr, r3
+ 80023b2:	4770      	bx	lr
 
-08001178 <_fini>:
- 8001178:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800117a:	46c0      	nop			; (mov r8, r8)
- 800117c:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 800117e:	bc08      	pop	{r3}
- 8001180:	469e      	mov	lr, r3
- 8001182:	4770      	bx	lr
+080023b4 <_fini>:
+ 80023b4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 80023b6:	46c0      	nop			; (mov r8, r8)
+ 80023b8:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 80023ba:	bc08      	pop	{r3}
+ 80023bc:	469e      	mov	lr, r3
+ 80023be:	4770      	bx	lr
diff --git a/fw/Debug/iaq_wired_sensor.map b/fw/Debug/iaq_wired_sensor.map
index 95a9324..006c6d6 100644
--- a/fw/Debug/iaq_wired_sensor.map
+++ b/fw/Debug/iaq_wired_sensor.map
@@ -16,20 +16,12 @@ Archive member included to satisfy reference by file (symbol)
                               Core/Src/led.o (__aeabi_idiv)
 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_dvmd_tls.o)
                               /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) (__aeabi_idiv0)
-/opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_aeabi_ldivmod.o)
-                              Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o (__aeabi_ldivmod)
 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_aeabi_uldivmod.o)
                               Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o (__aeabi_uldivmod)
 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o)
                               /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_aeabi_uldivmod.o) (__udivmoddi4)
-/opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(bpabi.o)
-                              /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_aeabi_ldivmod.o) (__gnu_ldivmod_helper)
 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_clzdi2.o)
                               /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o) (__clzdi2)
-/opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_muldi3.o)
-                              /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(bpabi.o) (__aeabi_lmul)
-/opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divdi3.o)
-                              /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(bpabi.o) (__divdi3)
 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_clzsi2.o)
                               /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_clzdi2.o) (__clzsi2)
 
@@ -72,15 +64,14 @@ Discarded input sections
  .data          0x0000000000000000        0x0 Core/Src/crc8.o
  .bss           0x0000000000000000        0x0 Core/Src/crc8.o
  .text.crc8_calculate
-                0x0000000000000000       0x36 Core/Src/crc8.o
- .debug_info    0x0000000000000000      0x124 Core/Src/crc8.o
- .debug_abbrev  0x0000000000000000       0xb7 Core/Src/crc8.o
- .debug_loc     0x0000000000000000       0xe1 Core/Src/crc8.o
+                0x0000000000000000       0xac Core/Src/crc8.o
+ .debug_info    0x0000000000000000      0x111 Core/Src/crc8.o
+ .debug_abbrev  0x0000000000000000       0x9d Core/Src/crc8.o
  .debug_aranges
                 0x0000000000000000       0x20 Core/Src/crc8.o
  .debug_ranges  0x0000000000000000       0x10 Core/Src/crc8.o
  .debug_macro   0x0000000000000000       0x72 Core/Src/crc8.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/crc8.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/crc8.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/crc8.o
  .debug_macro   0x0000000000000000       0x8e Core/Src/crc8.o
  .debug_macro   0x0000000000000000       0x51 Core/Src/crc8.o
@@ -88,8 +79,8 @@ Discarded input sections
  .debug_macro   0x0000000000000000       0x6a Core/Src/crc8.o
  .debug_macro   0x0000000000000000      0x1df Core/Src/crc8.o
  .debug_macro   0x0000000000000000       0x10 Core/Src/crc8.o
- .debug_line    0x0000000000000000      0x402 Core/Src/crc8.o
- .debug_str     0x0000000000000000     0x3d75 Core/Src/crc8.o
+ .debug_line    0x0000000000000000      0x3be Core/Src/crc8.o
+ .debug_str     0x0000000000000000     0x3d62 Core/Src/crc8.o
  .comment       0x0000000000000000       0x54 Core/Src/crc8.o
  .debug_frame   0x0000000000000000       0x30 Core/Src/crc8.o
  .ARM.attributes
@@ -114,7 +105,7 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Core/Src/i2c.o
  .data          0x0000000000000000        0x0 Core/Src/i2c.o
  .bss           0x0000000000000000        0x0 Core/Src/i2c.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/i2c.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/i2c.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/i2c.o
  .debug_macro   0x0000000000000000       0x8e Core/Src/i2c.o
  .debug_macro   0x0000000000000000       0x51 Core/Src/i2c.o
@@ -141,11 +132,9 @@ Discarded input sections
  .data          0x0000000000000000        0x0 Core/Src/led.o
  .bss           0x0000000000000000        0x0 Core/Src/led.o
  .text.led_gpio_off
-                0x0000000000000000        0x8 Core/Src/led.o
- .text.led_gpio_on
-                0x0000000000000000        0x8 Core/Src/led.o
- .text.led_off  0x0000000000000000       0x1c Core/Src/led.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/led.o
+                0x0000000000000000       0x34 Core/Src/led.o
+ .text.led_off  0x0000000000000000       0x28 Core/Src/led.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/led.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/led.o
  .debug_macro   0x0000000000000000       0x8e Core/Src/led.o
  .debug_macro   0x0000000000000000       0x51 Core/Src/led.o
@@ -194,8 +183,8 @@ Discarded input sections
  .data          0x0000000000000000        0x0 Core/Src/main.o
  .bss           0x0000000000000000        0x0 Core/Src/main.o
  .text.Error_Handler
-                0x0000000000000000        0x4 Core/Src/main.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/main.o
+                0x0000000000000000        0xa Core/Src/main.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/main.o
  .debug_macro   0x0000000000000000       0x2e Core/Src/main.o
  .debug_macro   0x0000000000000000       0x28 Core/Src/main.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/main.o
@@ -234,12 +223,12 @@ Discarded input sections
  .data          0x0000000000000000        0x0 Core/Src/scd4x.o
  .bss           0x0000000000000000        0x0 Core/Src/scd4x.o
  .text.scd4x_read_data
-                0x0000000000000000        0x2 Core/Src/scd4x.o
+                0x0000000000000000       0x14 Core/Src/scd4x.o
  .text.scd4x_stop_periodic_measurement
-                0x0000000000000000       0x10 Core/Src/scd4x.o
+                0x0000000000000000       0x18 Core/Src/scd4x.o
  .text.scd4x_perform_factory_reset
-                0x0000000000000000       0x10 Core/Src/scd4x.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/scd4x.o
+                0x0000000000000000       0x18 Core/Src/scd4x.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/scd4x.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/scd4x.o
  .debug_macro   0x0000000000000000       0x8e Core/Src/scd4x.o
  .debug_macro   0x0000000000000000       0x51 Core/Src/scd4x.o
@@ -292,7 +281,9 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Core/Src/stm32l0xx_it.o
  .data          0x0000000000000000        0x0 Core/Src/stm32l0xx_it.o
  .bss           0x0000000000000000        0x0 Core/Src/stm32l0xx_it.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/stm32l0xx_it.o
+ .rodata.CHANNEL_OFFSET_TAB
+                0x0000000000000000        0x5 Core/Src/stm32l0xx_it.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000       0x2e Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000       0x28 Core/Src/stm32l0xx_it.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/stm32l0xx_it.o
@@ -372,35 +363,34 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Core/Src/syscalls.o
  .data          0x0000000000000000        0x0 Core/Src/syscalls.o
  .bss           0x0000000000000000        0x0 Core/Src/syscalls.o
- .text.initialise_monitor_handles
-                0x0000000000000000        0x2 Core/Src/syscalls.o
- .text._getpid  0x0000000000000000        0x4 Core/Src/syscalls.o
- .text._kill    0x0000000000000000       0x10 Core/Src/syscalls.o
- .text._exit    0x0000000000000000        0xc Core/Src/syscalls.o
- .text._read    0x0000000000000000       0x1a Core/Src/syscalls.o
- .text._write   0x0000000000000000       0x1a Core/Src/syscalls.o
- .text._close   0x0000000000000000        0x6 Core/Src/syscalls.o
- .text._fstat   0x0000000000000000        0xa Core/Src/syscalls.o
- .text._isatty  0x0000000000000000        0x4 Core/Src/syscalls.o
- .text._lseek   0x0000000000000000        0x4 Core/Src/syscalls.o
- .text._open    0x0000000000000000        0xa Core/Src/syscalls.o
- .text._wait    0x0000000000000000       0x10 Core/Src/syscalls.o
- .text._unlink  0x0000000000000000       0x10 Core/Src/syscalls.o
- .text._times   0x0000000000000000        0x6 Core/Src/syscalls.o
- .text._stat    0x0000000000000000        0xa Core/Src/syscalls.o
- .text._link    0x0000000000000000       0x10 Core/Src/syscalls.o
- .text._fork    0x0000000000000000       0x10 Core/Src/syscalls.o
- .text._execve  0x0000000000000000       0x10 Core/Src/syscalls.o
  .bss.__env     0x0000000000000000        0x4 Core/Src/syscalls.o
  .data.environ  0x0000000000000000        0x4 Core/Src/syscalls.o
- .debug_info    0x0000000000000000     0x10e8 Core/Src/syscalls.o
- .debug_abbrev  0x0000000000000000      0x2fe Core/Src/syscalls.o
- .debug_loc     0x0000000000000000      0x491 Core/Src/syscalls.o
+ .text.initialise_monitor_handles
+                0x0000000000000000        0xa Core/Src/syscalls.o
+ .text._getpid  0x0000000000000000        0xc Core/Src/syscalls.o
+ .text._kill    0x0000000000000000       0x20 Core/Src/syscalls.o
+ .text._exit    0x0000000000000000       0x18 Core/Src/syscalls.o
+ .text._read    0x0000000000000000       0x3a Core/Src/syscalls.o
+ .text._write   0x0000000000000000       0x38 Core/Src/syscalls.o
+ .text._close   0x0000000000000000       0x14 Core/Src/syscalls.o
+ .text._fstat   0x0000000000000000       0x1c Core/Src/syscalls.o
+ .text._isatty  0x0000000000000000       0x12 Core/Src/syscalls.o
+ .text._lseek   0x0000000000000000       0x16 Core/Src/syscalls.o
+ .text._open    0x0000000000000000       0x1c Core/Src/syscalls.o
+ .text._wait    0x0000000000000000       0x1e Core/Src/syscalls.o
+ .text._unlink  0x0000000000000000       0x1e Core/Src/syscalls.o
+ .text._times   0x0000000000000000       0x14 Core/Src/syscalls.o
+ .text._stat    0x0000000000000000       0x1c Core/Src/syscalls.o
+ .text._link    0x0000000000000000       0x20 Core/Src/syscalls.o
+ .text._fork    0x0000000000000000       0x18 Core/Src/syscalls.o
+ .text._execve  0x0000000000000000       0x22 Core/Src/syscalls.o
+ .debug_info    0x0000000000000000      0xfb4 Core/Src/syscalls.o
+ .debug_abbrev  0x0000000000000000      0x297 Core/Src/syscalls.o
  .debug_aranges
                 0x0000000000000000       0xa8 Core/Src/syscalls.o
- .debug_ranges  0x0000000000000000       0xb0 Core/Src/syscalls.o
+ .debug_ranges  0x0000000000000000       0x98 Core/Src/syscalls.o
  .debug_macro   0x0000000000000000      0x24c Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x4c Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x18 Core/Src/syscalls.o
@@ -447,10 +437,10 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x189 Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x16 Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0xce Core/Src/syscalls.o
- .debug_line    0x0000000000000000      0x8a5 Core/Src/syscalls.o
- .debug_str     0x0000000000000000     0x8f1c Core/Src/syscalls.o
+ .debug_line    0x0000000000000000      0x7d5 Core/Src/syscalls.o
+ .debug_str     0x0000000000000000     0x8ee7 Core/Src/syscalls.o
  .comment       0x0000000000000000       0x54 Core/Src/syscalls.o
- .debug_frame   0x0000000000000000      0x184 Core/Src/syscalls.o
+ .debug_frame   0x0000000000000000      0x244 Core/Src/syscalls.o
  .ARM.attributes
                 0x0000000000000000       0x2c Core/Src/syscalls.o
  .group         0x0000000000000000        0xc Core/Src/sysmem.o
@@ -478,17 +468,16 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Core/Src/sysmem.o
  .data          0x0000000000000000        0x0 Core/Src/sysmem.o
  .bss           0x0000000000000000        0x0 Core/Src/sysmem.o
- .text._sbrk    0x0000000000000000       0x40 Core/Src/sysmem.o
  .bss.__sbrk_heap_end
                 0x0000000000000000        0x4 Core/Src/sysmem.o
- .debug_info    0x0000000000000000      0xa4e Core/Src/sysmem.o
- .debug_abbrev  0x0000000000000000      0x1f4 Core/Src/sysmem.o
- .debug_loc     0x0000000000000000       0x69 Core/Src/sysmem.o
+ .text._sbrk    0x0000000000000000       0x6c Core/Src/sysmem.o
+ .debug_info    0x0000000000000000      0xa25 Core/Src/sysmem.o
+ .debug_abbrev  0x0000000000000000      0x1bf Core/Src/sysmem.o
  .debug_aranges
                 0x0000000000000000       0x20 Core/Src/sysmem.o
  .debug_ranges  0x0000000000000000       0x10 Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0xff Core/Src/sysmem.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x10 Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x4c Core/Src/sysmem.o
@@ -510,10 +499,10 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x103 Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x6a Core/Src/sysmem.o
  .debug_macro   0x0000000000000000      0x1df Core/Src/sysmem.o
- .debug_line    0x0000000000000000      0x4f9 Core/Src/sysmem.o
- .debug_str     0x0000000000000000     0x62cb Core/Src/sysmem.o
+ .debug_line    0x0000000000000000      0x4cb Core/Src/sysmem.o
+ .debug_str     0x0000000000000000     0x62b0 Core/Src/sysmem.o
  .comment       0x0000000000000000       0x54 Core/Src/sysmem.o
- .debug_frame   0x0000000000000000       0x28 Core/Src/sysmem.o
+ .debug_frame   0x0000000000000000       0x30 Core/Src/sysmem.o
  .ARM.attributes
                 0x0000000000000000       0x2c Core/Src/sysmem.o
  .group         0x0000000000000000        0xc Core/Src/system_stm32l0xx.o
@@ -535,8 +524,8 @@ Discarded input sections
  .data          0x0000000000000000        0x0 Core/Src/system_stm32l0xx.o
  .bss           0x0000000000000000        0x0 Core/Src/system_stm32l0xx.o
  .text.SystemCoreClockUpdate
-                0x0000000000000000       0x9c Core/Src/system_stm32l0xx.o
- .debug_macro   0x0000000000000000      0xac6 Core/Src/system_stm32l0xx.o
+                0x0000000000000000      0x170 Core/Src/system_stm32l0xx.o
+ .debug_macro   0x0000000000000000      0xac0 Core/Src/system_stm32l0xx.o
  .debug_macro   0x0000000000000000       0x2e Core/Src/system_stm32l0xx.o
  .debug_macro   0x0000000000000000       0x28 Core/Src/system_stm32l0xx.o
  .debug_macro   0x0000000000000000       0x22 Core/Src/system_stm32l0xx.o
@@ -574,22 +563,45 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .data          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .bss           0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .text.LL_DMA_DeInit
-                0x0000000000000000       0xc8 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .text.LL_DMA_Init
-                0x0000000000000000       0x64 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .text.LL_DMA_StructInit
-                0x0000000000000000       0x1a Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .rodata.CHANNEL_OFFSET_TAB
                 0x0000000000000000        0x5 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .debug_info    0x0000000000000000      0x90a Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .debug_abbrev  0x0000000000000000      0x296 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .debug_loc     0x0000000000000000      0x3f7 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_ConfigTransfer
+                0x0000000000000000       0x48 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_SetDataLength
+                0x0000000000000000       0x40 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_SetMemoryAddress
+                0x0000000000000000       0x2c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_SetPeriphAddress
+                0x0000000000000000       0x2c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_SetPeriphRequest
+                0x0000000000000000       0x3e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_ClearFlag_GI1
+                0x0000000000000000       0x16 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_ClearFlag_GI2
+                0x0000000000000000       0x16 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_ClearFlag_GI3
+                0x0000000000000000       0x18 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_ClearFlag_GI4
+                0x0000000000000000       0x18 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_ClearFlag_GI5
+                0x0000000000000000       0x18 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_AHB1_GRP1_ForceReset
+                0x0000000000000000       0x20 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_AHB1_GRP1_ReleaseReset
+                0x0000000000000000       0x24 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_DeInit
+                0x0000000000000000      0x144 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_Init
+                0x0000000000000000       0x80 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .text.LL_DMA_StructInit
+                0x0000000000000000       0x52 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .debug_info    0x0000000000000000      0x73f Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .debug_abbrev  0x0000000000000000      0x1d3 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .debug_aranges
-                0x0000000000000000       0x30 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .debug_ranges  0x0000000000000000      0x128 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+                0x0000000000000000       0x90 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .debug_ranges  0x0000000000000000       0x80 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .debug_macro   0x0000000000000000      0x114 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .debug_macro   0x0000000000000000      0xac6 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .debug_macro   0x0000000000000000      0xac0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .debug_macro   0x0000000000000000       0x2e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .debug_macro   0x0000000000000000       0x28 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .debug_macro   0x0000000000000000       0x22 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
@@ -606,10 +618,10 @@ Discarded input sections
  .debug_macro   0x0000000000000000       0x3c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .debug_macro   0x0000000000000000      0x27f Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .debug_macro   0x0000000000000000       0xa7 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .debug_line    0x0000000000000000      0x7f0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .debug_str     0x0000000000000000    0x32330 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .debug_line    0x0000000000000000      0x6ef Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .debug_str     0x0000000000000000    0x3231d Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .comment       0x0000000000000000       0x54 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
- .debug_frame   0x0000000000000000       0x58 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
+ .debug_frame   0x0000000000000000      0x1f0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .ARM.attributes
                 0x0000000000000000       0x2c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_dma.o
  .group         0x0000000000000000        0xc Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
@@ -631,20 +643,35 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .data          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .bss           0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .text.LL_EXTI_DeInit
+ .text.LL_EXTI_EnableIT_0_31
+                0x0000000000000000       0x20 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .text.LL_EXTI_DisableIT_0_31
                 0x0000000000000000       0x24 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .text.LL_EXTI_EnableEvent_0_31
+                0x0000000000000000       0x20 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .text.LL_EXTI_DisableEvent_0_31
+                0x0000000000000000       0x24 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .text.LL_EXTI_EnableRisingTrig_0_31
+                0x0000000000000000       0x20 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .text.LL_EXTI_DisableRisingTrig_0_31
+                0x0000000000000000       0x24 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .text.LL_EXTI_EnableFallingTrig_0_31
+                0x0000000000000000       0x20 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .text.LL_EXTI_DisableFallingTrig_0_31
+                0x0000000000000000       0x24 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .text.LL_EXTI_DeInit
+                0x0000000000000000       0x3c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .text.LL_EXTI_Init
-                0x0000000000000000       0xa0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+                0x0000000000000000      0x112 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .text.LL_EXTI_StructInit
-                0x0000000000000000        0xc Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .debug_info    0x0000000000000000      0x4f8 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .debug_abbrev  0x0000000000000000      0x1de Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .debug_loc     0x0000000000000000      0x12c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+                0x0000000000000000       0x28 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .debug_info    0x0000000000000000      0x3cb Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .debug_abbrev  0x0000000000000000      0x180 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .debug_aranges
-                0x0000000000000000       0x30 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .debug_ranges  0x0000000000000000       0x68 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+                0x0000000000000000       0x70 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .debug_ranges  0x0000000000000000       0x60 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .debug_macro   0x0000000000000000       0xe1 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .debug_macro   0x0000000000000000      0xac6 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .debug_macro   0x0000000000000000      0xac0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .debug_macro   0x0000000000000000       0x2e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .debug_macro   0x0000000000000000       0x28 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .debug_macro   0x0000000000000000       0x22 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
@@ -660,10 +687,10 @@ Discarded input sections
  .debug_macro   0x0000000000000000     0x7b9c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .debug_macro   0x0000000000000000       0x3c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .debug_macro   0x0000000000000000      0x103 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .debug_line    0x0000000000000000      0x651 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .debug_str     0x0000000000000000    0x30c21 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .debug_line    0x0000000000000000      0x5db Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .debug_str     0x0000000000000000    0x30c0e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .comment       0x0000000000000000       0x54 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
- .debug_frame   0x0000000000000000       0x48 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
+ .debug_frame   0x0000000000000000      0x16c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .ARM.attributes
                 0x0000000000000000       0x2c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_exti.o
  .group         0x0000000000000000        0xc Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
@@ -686,11 +713,15 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
  .data          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
  .bss           0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .text.LL_IOP_GRP1_ForceReset
+                0x0000000000000000       0x20 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .text.LL_IOP_GRP1_ReleaseReset
+                0x0000000000000000       0x24 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
  .text.LL_GPIO_DeInit
-                0x0000000000000000       0x48 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+                0x0000000000000000       0x74 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
  .text.LL_GPIO_StructInit
-                0x0000000000000000       0x18 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_macro   0x0000000000000000      0xac6 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+                0x0000000000000000       0x38 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_macro   0x0000000000000000      0xac0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
  .debug_macro   0x0000000000000000       0x2e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
  .debug_macro   0x0000000000000000       0x28 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
  .debug_macro   0x0000000000000000       0x22 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
@@ -727,11 +758,15 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
  .data          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
  .bss           0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .text.LL_APB1_GRP1_ForceReset
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+ .text.LL_APB1_GRP1_ReleaseReset
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  .text.LL_I2C_DeInit
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  .text.LL_I2C_StructInit
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- .debug_macro   0x0000000000000000      0xac6 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+                0x0000000000000000       0x3c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_macro   0x0000000000000000      0xac0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
  .debug_macro   0x0000000000000000       0x2e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
  .debug_macro   0x0000000000000000       0x28 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
  .debug_macro   0x0000000000000000       0x22 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
@@ -769,11 +804,15 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
  .data          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
  .bss           0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+ .text.LL_APB1_GRP1_ForceReset
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+ .text.LL_APB1_GRP1_ReleaseReset
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  .text.LL_LPUART_DeInit
-                0x0000000000000000       0x30 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+                0x0000000000000000       0x48 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
  .text.LL_LPUART_StructInit
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- .debug_macro   0x0000000000000000      0xac6 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
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  .text          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
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- .debug_loc     0x0000000000000000       0x30 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
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  .debug_aranges
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- .debug_ranges  0x0000000000000000       0x40 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
+                0x0000000000000000       0x30 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
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  .debug_macro   0x0000000000000000       0xd2 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
- .debug_macro   0x0000000000000000      0xac6 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
+ .debug_macro   0x0000000000000000      0xac0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
  .debug_macro   0x0000000000000000       0x2e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
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  .debug_macro   0x0000000000000000       0x22 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
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  .debug_macro   0x0000000000000000       0x3c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
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- .debug_str     0x0000000000000000    0x30d87 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
+ .debug_line    0x0000000000000000      0x4d3 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
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  .comment       0x0000000000000000       0x54 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
- .debug_frame   0x0000000000000000       0x20 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
+ .debug_frame   0x0000000000000000       0x6c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
  .ARM.attributes
                 0x0000000000000000       0x2c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_pwr.o
  .group         0x0000000000000000        0xc Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
@@ -861,19 +903,45 @@ Discarded input sections
  .text          0x0000000000000000        0x0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
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-                0x0000000000000000       0x18 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .text.LL_RCC_GetSystemClocksFreq
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                 0x0000000000000000       0x20 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
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+ .text.LL_RCC_LSI_IsReady
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+ .text.LL_RCC_MSI_IsReady
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+ .text.LL_RCC_GetAPB2Prescaler
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+ .text.LL_RCC_GetUSARTClockSource
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  .text.LL_RCC_GetUSARTClockFreq
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  .text.LL_RCC_GetI2CClockFreq
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  .text.LL_RCC_GetLPTIMClockFreq
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- .debug_macro   0x0000000000000000      0xac6 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+                0x0000000000000000       0xbc Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
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@@ -910,15 +978,53 @@ Discarded input sections
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- .text.UTILS_EnablePLLAndSwitchSystem
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+ .text.UTILS_GetPLLOutputFrequency
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  .text          0x0000000000000000        0x0 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtend.o
@@ -1079,7 +1160,7 @@ LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.g
                 0x0000000008000000                g_pfnVectors
                 0x00000000080000c0                . = ALIGN (0x4)
 
-.text           0x00000000080000c0     0x10c4
+.text           0x00000000080000c0     0x2300
                 0x00000000080000c0                . = ALIGN (0x4)
  *(.text)
  .text          0x00000000080000c0       0x48 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
@@ -1103,215 +1184,394 @@ LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.g
  .text          0x00000000080005e4       0x3c /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_clzsi2.o)
                 0x00000000080005e4                __clzsi2
  *(.text*)
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+ .text.LL_I2C_IsActiveFlag_NACK
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+ .text.LL_I2C_IsActiveFlag_STOP
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+ .text.LL_I2C_ClearFlag_STOP
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+ .text.LL_I2C_HandleTransfer
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+ .text.LL_I2C_ReceiveData8
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+ .text.LL_I2C_TransmitData8
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  .text.i2c_init
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  .text.i2c_transmit
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-                0x0000000008000638                i2c_transmit
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  .text.i2c_receive
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-                0x000000000800069c                i2c_receive
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+ .text.LL_GPIO_WriteOutputPort
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+ .text.LL_GPIO_TogglePin
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  .text.led_set_color
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-                0x00000000080006f4                led_set_color
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+                0x000000000800092c                led_set_color
+ .text.led_gpio_on
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  .text.led_pwm_handler
-                0x0000000008000738       0xc4 Core/Src/led.o
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+                0x00000000080009e4                led_pwm_handler
  .text.led_init
-                0x00000000080007fc       0x70 Core/Src/led.o
-                0x00000000080007fc                led_init
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+                0x0000000008000aec                led_init
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+                0x0000000008000b98       0x34 Core/Src/main.o
+ .text.__NVIC_SetPriority
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+ .text.LL_DMA_SetDataTransferDirection
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+ .text.LL_DMA_SetMode
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+ .text.LL_DMA_SetPeriphIncMode
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+ .text.LL_DMA_SetMemoryIncMode
+                0x0000000008000d78       0x44 Core/Src/main.o
+ .text.LL_DMA_SetPeriphSize
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+ .text.LL_DMA_SetMemorySize
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+ .text.LL_DMA_SetChannelPriorityLevel
+                0x0000000008000e4c       0x48 Core/Src/main.o
+ .text.LL_DMA_SetPeriphRequest
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+ .text.LL_I2C_Enable
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+ *fill*         0x0000000008000eee        0x2 
+ .text.LL_I2C_EnableClockStretching
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+ .text.LL_I2C_DisableGeneralCall
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+ .text.LL_I2C_SetOwnAddress2
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+ .text.LL_I2C_DisableOwnAddress2
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+ .text.LL_I2C_EnableAutoEndMode
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+ .text.LL_LPUART_Enable
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+ *fill*         0x0000000008000fb6        0x2 
+ .text.LL_LPUART_SetDEDeassertionTime
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+ .text.LL_LPUART_SetDEAssertionTime
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+ .text.LL_LPUART_EnableDEMode
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+ *fill*         0x0000000008001026        0x2 
+ .text.LL_LPUART_SetDESignalPolarity
+                0x0000000008001028       0x28 Core/Src/main.o
+ .text.LL_RCC_MSI_Enable
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+ .text.LL_RCC_MSI_IsReady
+                0x000000000800106c       0x28 Core/Src/main.o
+ .text.LL_RCC_MSI_SetRange
+                0x0000000008001094       0x2c Core/Src/main.o
+ .text.LL_RCC_MSI_SetCalibTrimming
+                0x00000000080010c0       0x28 Core/Src/main.o
+ .text.LL_RCC_SetSysClkSource
+                0x00000000080010e8       0x28 Core/Src/main.o
+ .text.LL_RCC_GetSysClkSource
+                0x0000000008001110       0x18 Core/Src/main.o
+ .text.LL_RCC_SetAHBPrescaler
+                0x0000000008001128       0x28 Core/Src/main.o
+ .text.LL_RCC_SetAPB1Prescaler
+                0x0000000008001150       0x2c Core/Src/main.o
+ .text.LL_RCC_SetAPB2Prescaler
+                0x000000000800117c       0x2c Core/Src/main.o
+ .text.LL_RCC_SetLPUARTClockSource
+                0x00000000080011a8       0x2c Core/Src/main.o
+ .text.LL_RCC_SetI2CClockSource
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+ .text.LL_AHB1_GRP1_EnableClock
+                0x000000000800120c       0x2c Core/Src/main.o
  .text.LL_APB1_GRP1_EnableClock
-                0x000000000800086c       0x1c Core/Src/main.o
+                0x0000000008001238       0x2c Core/Src/main.o
+ .text.LL_APB2_GRP1_EnableClock
+                0x0000000008001264       0x2c Core/Src/main.o
  .text.LL_IOP_GRP1_EnableClock
-                0x0000000008000888       0x1c Core/Src/main.o
+                0x0000000008001290       0x2c Core/Src/main.o
+ .text.LL_FLASH_SetLatency
+                0x00000000080012bc       0x28 Core/Src/main.o
+ .text.LL_FLASH_GetLatency
+                0x00000000080012e4       0x18 Core/Src/main.o
+ .text.LL_PWR_SetRegulVoltageScaling
+                0x00000000080012fc       0x2c Core/Src/main.o
+ .text.LL_GPIO_SetOutputPin
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+ .text.main     0x0000000008001340       0xbc Core/Src/main.o
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  .text.SystemClock_Config
-                0x00000000080008a4       0xbc Core/Src/main.o
-                0x00000000080008a4                SystemClock_Config
- .text.startup.main
-                0x0000000008000960      0x310 Core/Src/main.o
-                0x0000000008000960                main
+                0x00000000080013fc       0x8c Core/Src/main.o
+                0x00000000080013fc                SystemClock_Config
+ .text.MX_I2C1_Init
+                0x0000000008001488      0x110 Core/Src/main.o
+ .text.MX_LPUART1_UART_Init
+                0x0000000008001598      0x1a0 Core/Src/main.o
+ .text.MX_DMA_Init
+                0x0000000008001738       0x1e Core/Src/main.o
+ .text.MX_GPIO_Init
+                0x0000000008001756       0xd0 Core/Src/main.o
  .text.scd4x_send_cmd
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-                0x0000000008000c70                scd4x_send_cmd
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  .text.scd4x_start_periodic_measurement
-                0x0000000008000c90       0x10 Core/Src/scd4x.o
-                0x0000000008000c90                scd4x_start_periodic_measurement
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  .text.scd4x_read_measurement
-                0x0000000008000ca0       0x88 Core/Src/scd4x.o
-                0x0000000008000ca0                scd4x_read_measurement
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  .text.NMI_Handler
-                0x0000000008000d28        0x2 Core/Src/stm32l0xx_it.o
-                0x0000000008000d28                NMI_Handler
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  .text.HardFault_Handler
-                0x0000000008000d2a        0x2 Core/Src/stm32l0xx_it.o
-                0x0000000008000d2a                HardFault_Handler
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  .text.SVC_Handler
-                0x0000000008000d2c        0x2 Core/Src/stm32l0xx_it.o
-                0x0000000008000d2c                SVC_Handler
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+                0x0000000008001968                SVC_Handler
  .text.PendSV_Handler
-                0x0000000008000d2e        0x2 Core/Src/stm32l0xx_it.o
-                0x0000000008000d2e                PendSV_Handler
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+                0x0000000008001972                PendSV_Handler
  .text.SysTick_Handler
-                0x0000000008000d30        0x8 Core/Src/stm32l0xx_it.o
-                0x0000000008000d30                SysTick_Handler
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  .text.DMA1_Channel2_3_IRQHandler
-                0x0000000008000d38        0x2 Core/Src/stm32l0xx_it.o
-                0x0000000008000d38                DMA1_Channel2_3_IRQHandler
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  .text.SystemInit
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  .text.Reset_Handler
-                0x0000000008000d3c       0x80 Core/Startup/startup_stm32l011f4ux.o
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  .text.Default_Handler
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-                0x0000000008000dbc                ADC1_COMP_IRQHandler
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+                0x0000000008001a20                FLASH_IRQHandler
+                0x0000000008001a20                LPTIM1_IRQHandler
+ .text.LL_GPIO_SetPinMode
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  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x00000000080011b0        0x4 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
-                0x00000000080011b4                PROVIDE (__init_array_end = .)
-                0x00000000080011b4                . = ALIGN (0x4)
+ .init_array    0x00000000080023f4        0x4 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
+                0x00000000080023f8                PROVIDE (__init_array_end = .)
+                0x00000000080023f8                . = ALIGN (0x4)
 
-.fini_array     0x00000000080011b4        0x4
-                0x00000000080011b4                . = ALIGN (0x4)
+.fini_array     0x00000000080023f8        0x4
+                0x00000000080023f8                . = ALIGN (0x4)
                 [!provide]                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x00000000080011b4        0x4 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
+ .fini_array    0x00000000080023f8        0x4 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x00000000080011b8                . = ALIGN (0x4)
-                0x00000000080011b8                _sidata = LOADADDR (.data)
+                0x00000000080023fc                . = ALIGN (0x4)
+                0x00000000080023fc                _sidata = LOADADDR (.data)
 
-.data           0x0000000020000000        0x4 load address 0x00000000080011b8
+.data           0x0000000020000000        0x4 load address 0x00000000080023fc
                 0x0000000020000000                . = ALIGN (0x4)
                 0x0000000020000000                _sdata = .
  *(.data)
@@ -1324,11 +1584,11 @@ LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.g
                 0x0000000020000004                . = ALIGN (0x4)
                 0x0000000020000004                _edata = .
 
-.igot.plt       0x0000000020000004        0x0 load address 0x00000000080011bc
+.igot.plt       0x0000000020000004        0x0 load address 0x0000000008002400
  .igot.plt      0x0000000020000004        0x0 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o
                 0x0000000020000004                . = ALIGN (0x4)
 
-.bss            0x0000000020000004       0x44 load address 0x00000000080011bc
+.bss            0x0000000020000004       0x44 load address 0x0000000008002400
                 0x0000000020000004                _sbss = .
                 0x0000000020000004                __bss_start__ = _sbss
  *(.bss)
@@ -1354,7 +1614,7 @@ LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.g
                 0x0000000020000048                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x0000000020000048      0x600 load address 0x00000000080011bc
+                0x0000000020000048      0x600 load address 0x0000000008002400
                 0x0000000020000048                . = ALIGN (0x8)
                 [!provide]                        PROVIDE (end = .)
                 0x0000000020000048                PROVIDE (_end = .)
@@ -1426,85 +1686,73 @@ LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.g
 LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libm.a
 LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a
 
-.debug_info     0x0000000000000000     0x61e6
- .debug_info    0x0000000000000000      0x661 Core/Src/i2c.o
- .debug_info    0x0000000000000661      0x86a Core/Src/led.o
- .debug_info    0x0000000000000ecb     0x1c58 Core/Src/main.o
- .debug_info    0x0000000000002b23      0x403 Core/Src/scd4x.o
- .debug_info    0x0000000000002f26      0x1ef Core/Src/stm32l0xx_it.o
- .debug_info    0x0000000000003115      0x31b Core/Src/system_stm32l0xx.o
- .debug_info    0x0000000000003430       0x22 Core/Startup/startup_stm32l011f4ux.o
- .debug_info    0x0000000000003452      0x7f9 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_info    0x0000000000003c4b      0x7d0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_info    0x000000000000441b      0x69a Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
- .debug_info    0x0000000000004ab5      0xaa9 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_info    0x000000000000555e      0xc88 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+.debug_info     0x0000000000000000     0x47c3
+ .debug_info    0x0000000000000000      0x496 Core/Src/i2c.o
+ .debug_info    0x0000000000000496      0x519 Core/Src/led.o
+ .debug_info    0x00000000000009af     0x1355 Core/Src/main.o
+ .debug_info    0x0000000000001d04      0x2fa Core/Src/scd4x.o
+ .debug_info    0x0000000000001ffe      0x1e3 Core/Src/stm32l0xx_it.o
+ .debug_info    0x00000000000021e1      0x302 Core/Src/system_stm32l0xx.o
+ .debug_info    0x00000000000024e3       0x22 Core/Startup/startup_stm32l011f4ux.o
+ .debug_info    0x0000000000002505      0x657 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_info    0x0000000000002b5c      0x668 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_info    0x00000000000031c4      0x59d Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+ .debug_info    0x0000000000003761      0x799 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_info    0x0000000000003efa      0x8c9 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
 
-.debug_abbrev   0x0000000000000000     0x189b
- .debug_abbrev  0x0000000000000000      0x1dc Core/Src/i2c.o
- .debug_abbrev  0x00000000000001dc      0x297 Core/Src/led.o
- .debug_abbrev  0x0000000000000473      0x3c8 Core/Src/main.o
- .debug_abbrev  0x000000000000083b      0x15e Core/Src/scd4x.o
- .debug_abbrev  0x0000000000000999      0x101 Core/Src/stm32l0xx_it.o
- .debug_abbrev  0x0000000000000a9a      0x11c Core/Src/system_stm32l0xx.o
- .debug_abbrev  0x0000000000000bb6       0x12 Core/Startup/startup_stm32l011f4ux.o
- .debug_abbrev  0x0000000000000bc8      0x213 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_abbrev  0x0000000000000ddb      0x1ea Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_abbrev  0x0000000000000fc5      0x236 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
- .debug_abbrev  0x00000000000011fb      0x322 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_abbrev  0x000000000000151d      0x37e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+.debug_abbrev   0x0000000000000000     0x128a
+ .debug_abbrev  0x0000000000000000      0x1bb Core/Src/i2c.o
+ .debug_abbrev  0x00000000000001bb      0x1c2 Core/Src/led.o
+ .debug_abbrev  0x000000000000037d      0x2c5 Core/Src/main.o
+ .debug_abbrev  0x0000000000000642      0x134 Core/Src/scd4x.o
+ .debug_abbrev  0x0000000000000776       0xad Core/Src/stm32l0xx_it.o
+ .debug_abbrev  0x0000000000000823      0x116 Core/Src/system_stm32l0xx.o
+ .debug_abbrev  0x0000000000000939       0x12 Core/Startup/startup_stm32l011f4ux.o
+ .debug_abbrev  0x000000000000094b      0x1b5 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_abbrev  0x0000000000000b00      0x193 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_abbrev  0x0000000000000c93      0x1af Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+ .debug_abbrev  0x0000000000000e42      0x1f8 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_abbrev  0x000000000000103a      0x250 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
 
-.debug_loc      0x0000000000000000     0x2616
- .debug_loc     0x0000000000000000      0x39c Core/Src/i2c.o
- .debug_loc     0x000000000000039c      0x5f6 Core/Src/led.o
- .debug_loc     0x0000000000000992      0x5d1 Core/Src/main.o
- .debug_loc     0x0000000000000f63      0x24c Core/Src/scd4x.o
- .debug_loc     0x00000000000011af      0x178 Core/Src/system_stm32l0xx.o
- .debug_loc     0x0000000000001327      0x333 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_loc     0x000000000000165a      0x1f3 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_loc     0x000000000000184d      0x21e Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
- .debug_loc     0x0000000000001a6b      0x468 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_loc     0x0000000000001ed3      0x743 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+.debug_aranges  0x0000000000000000      0x6b8
+ .debug_aranges
+                0x0000000000000000       0x70 Core/Src/i2c.o
+ .debug_aranges
+                0x0000000000000070       0x60 Core/Src/led.o
+ .debug_aranges
+                0x00000000000000d0      0x190 Core/Src/main.o
+ .debug_aranges
+                0x0000000000000260       0x48 Core/Src/scd4x.o
+ .debug_aranges
+                0x00000000000002a8       0x48 Core/Src/stm32l0xx_it.o
+ .debug_aranges
+                0x00000000000002f0       0x28 Core/Src/system_stm32l0xx.o
+ .debug_aranges
+                0x0000000000000318       0x28 Core/Startup/startup_stm32l011f4ux.o
+ .debug_aranges
+                0x0000000000000340       0x70 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_aranges
+                0x00000000000003b0       0x88 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_aranges
+                0x0000000000000438       0x60 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+ .debug_aranges
+                0x0000000000000498      0x130 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_aranges
+                0x00000000000005c8       0xf0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
 
-.debug_aranges  0x0000000000000000      0x2e8
- .debug_aranges
-                0x0000000000000000       0x30 Core/Src/i2c.o
- .debug_aranges
-                0x0000000000000030       0x48 Core/Src/led.o
- .debug_aranges
-                0x0000000000000078       0x40 Core/Src/main.o
- .debug_aranges
-                0x00000000000000b8       0x48 Core/Src/scd4x.o
- .debug_aranges
-                0x0000000000000100       0x38 Core/Src/stm32l0xx_it.o
- .debug_aranges
-                0x0000000000000138       0x28 Core/Src/system_stm32l0xx.o
- .debug_aranges
-                0x0000000000000160       0x28 Core/Startup/startup_stm32l011f4ux.o
- .debug_aranges
-                0x0000000000000188       0x30 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_aranges
-                0x00000000000001b8       0x30 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_aranges
-                0x00000000000001e8       0x30 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
- .debug_aranges
-                0x0000000000000218       0x80 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_aranges
-                0x0000000000000298       0x50 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
-
-.debug_ranges   0x0000000000000000      0xbd8
- .debug_ranges  0x0000000000000000       0xb8 Core/Src/i2c.o
- .debug_ranges  0x00000000000000b8       0x80 Core/Src/led.o
- .debug_ranges  0x0000000000000138      0x440 Core/Src/main.o
- .debug_ranges  0x0000000000000578       0x38 Core/Src/scd4x.o
- .debug_ranges  0x00000000000005b0       0x28 Core/Src/stm32l0xx_it.o
- .debug_ranges  0x00000000000005d8       0x18 Core/Src/system_stm32l0xx.o
- .debug_ranges  0x00000000000005f0       0x20 Core/Startup/startup_stm32l011f4ux.o
- .debug_ranges  0x0000000000000610       0x38 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_ranges  0x0000000000000648       0x68 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_ranges  0x00000000000006b0       0x58 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
- .debug_ranges  0x0000000000000708      0x210 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_ranges  0x0000000000000918      0x2c0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+.debug_ranges   0x0000000000000000      0x600
+ .debug_ranges  0x0000000000000000       0x60 Core/Src/i2c.o
+ .debug_ranges  0x0000000000000060       0x50 Core/Src/led.o
+ .debug_ranges  0x00000000000000b0      0x180 Core/Src/main.o
+ .debug_ranges  0x0000000000000230       0x38 Core/Src/scd4x.o
+ .debug_ranges  0x0000000000000268       0x38 Core/Src/stm32l0xx_it.o
+ .debug_ranges  0x00000000000002a0       0x18 Core/Src/system_stm32l0xx.o
+ .debug_ranges  0x00000000000002b8       0x20 Core/Startup/startup_stm32l011f4ux.o
+ .debug_ranges  0x00000000000002d8       0x60 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_ranges  0x0000000000000338       0x78 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_ranges  0x00000000000003b0       0x50 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+ .debug_ranges  0x0000000000000400      0x120 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_ranges  0x0000000000000520       0xe0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
 
 .debug_macro    0x0000000000000000     0xa637
  .debug_macro   0x0000000000000000       0xd8 Core/Src/i2c.o
@@ -1547,45 +1795,45 @@ LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.g
  .debug_macro   0x000000000000a127      0x3ae Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
  .debug_macro   0x000000000000a4d5      0x162 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
 
-.debug_line     0x0000000000000000     0x583d
- .debug_line    0x0000000000000000      0x64c Core/Src/i2c.o
- .debug_line    0x000000000000064c      0x7df Core/Src/led.o
- .debug_line    0x0000000000000e2b      0xe7c Core/Src/main.o
- .debug_line    0x0000000000001ca7      0x616 Core/Src/scd4x.o
- .debug_line    0x00000000000022bd      0x620 Core/Src/stm32l0xx_it.o
- .debug_line    0x00000000000028dd      0x534 Core/Src/system_stm32l0xx.o
- .debug_line    0x0000000000002e11       0x9b Core/Startup/startup_stm32l011f4ux.o
- .debug_line    0x0000000000002eac      0x681 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_line    0x000000000000352d      0x643 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_line    0x0000000000003b70      0x62c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
- .debug_line    0x000000000000419c      0xb31 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_line    0x0000000000004ccd      0xb70 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+.debug_line     0x0000000000000000     0x4f6d
+ .debug_line    0x0000000000000000      0x64b Core/Src/i2c.o
+ .debug_line    0x000000000000064b      0x624 Core/Src/led.o
+ .debug_line    0x0000000000000c6f      0xc82 Core/Src/main.o
+ .debug_line    0x00000000000018f1      0x590 Core/Src/scd4x.o
+ .debug_line    0x0000000000001e81      0x625 Core/Src/stm32l0xx_it.o
+ .debug_line    0x00000000000024a6      0x4f2 Core/Src/system_stm32l0xx.o
+ .debug_line    0x0000000000002998       0x9b Core/Startup/startup_stm32l011f4ux.o
+ .debug_line    0x0000000000002a33      0x612 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_line    0x0000000000003045      0x60c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_line    0x0000000000003651      0x5d5 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+ .debug_line    0x0000000000003c26      0xa32 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_line    0x0000000000004658      0x915 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
 
-.debug_str      0x0000000000000000    0x397bb
- .debug_str     0x0000000000000000    0x31334 Core/Src/i2c.o
-                                      0x3153f (size before relaxing)
- .debug_str     0x0000000000031334      0x98b Core/Src/led.o
-                                      0x30d00 (size before relaxing)
- .debug_str     0x0000000000031cbf     0x5837 Core/Src/main.o
-                                      0x375d1 (size before relaxing)
- .debug_str     0x00000000000374f6      0x144 Core/Src/scd4x.o
-                                      0x31694 (size before relaxing)
- .debug_str     0x000000000003763a       0x91 Core/Src/stm32l0xx_it.o
-                                      0x36b17 (size before relaxing)
- .debug_str     0x00000000000376cb       0x61 Core/Src/system_stm32l0xx.o
-                                      0x3045a (size before relaxing)
- .debug_str     0x000000000003772c       0x36 Core/Startup/startup_stm32l011f4ux.o
+.debug_str      0x0000000000000000    0x39797
+ .debug_str     0x0000000000000000    0x31321 Core/Src/i2c.o
+                                      0x3152c (size before relaxing)
+ .debug_str     0x0000000000031321      0x98b Core/Src/led.o
+                                      0x30ced (size before relaxing)
+ .debug_str     0x0000000000031cac     0x5797 Core/Src/main.o
+                                      0x374f7 (size before relaxing)
+ .debug_str     0x0000000000037443      0x17c Core/Src/scd4x.o
+                                      0x3165e (size before relaxing)
+ .debug_str     0x00000000000375bf       0x91 Core/Src/stm32l0xx_it.o
+                                      0x36af4 (size before relaxing)
+ .debug_str     0x0000000000037650       0x61 Core/Src/system_stm32l0xx.o
+                                      0x30447 (size before relaxing)
+ .debug_str     0x00000000000376b1       0x36 Core/Startup/startup_stm32l011f4ux.o
                                          0x92 (size before relaxing)
- .debug_str     0x0000000000037762      0x578 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
-                                      0x3157a (size before relaxing)
- .debug_str     0x0000000000037cda      0x3e1 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
-                                      0x31cef (size before relaxing)
- .debug_str     0x00000000000380bb      0x521 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
-                                      0x33365 (size before relaxing)
- .debug_str     0x00000000000385dc      0x4f5 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
-                                      0x3226f (size before relaxing)
- .debug_str     0x0000000000038ad1      0xcea Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
-                                      0x33996 (size before relaxing)
+ .debug_str     0x00000000000376e7      0x585 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+                                      0x31567 (size before relaxing)
+ .debug_str     0x0000000000037c6c      0x3ed Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+                                      0x31cdc (size before relaxing)
+ .debug_str     0x0000000000038059      0x516 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+                                      0x33338 (size before relaxing)
+ .debug_str     0x000000000003856f      0x50f Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+                                      0x3225c (size before relaxing)
+ .debug_str     0x0000000000038a7e      0xd19 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+                                      0x33983 (size before relaxing)
 
 .comment        0x0000000000000000       0x53
  .comment       0x0000000000000000       0x53 Core/Src/i2c.o
@@ -1601,20 +1849,20 @@ LOAD /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.g
  .comment       0x0000000000000053       0x54 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
  .comment       0x0000000000000053       0x54 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
 
-.debug_frame    0x0000000000000000      0x664
- .debug_frame   0x0000000000000000       0x5c Core/Src/i2c.o
- .debug_frame   0x000000000000005c       0x98 Core/Src/led.o
- .debug_frame   0x00000000000000f4       0x80 Core/Src/main.o
- .debug_frame   0x0000000000000174       0xa0 Core/Src/scd4x.o
- .debug_frame   0x0000000000000214       0x78 Core/Src/stm32l0xx_it.o
- .debug_frame   0x000000000000028c       0x3c Core/Src/system_stm32l0xx.o
- .debug_frame   0x00000000000002c8       0x54 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
- .debug_frame   0x000000000000031c       0x4c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
- .debug_frame   0x0000000000000368       0x50 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
- .debug_frame   0x00000000000003b8      0x124 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
- .debug_frame   0x00000000000004dc       0xc0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
- .debug_frame   0x000000000000059c       0x2c /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o)
- .debug_frame   0x00000000000005c8       0x20 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o)
- .debug_frame   0x00000000000005e8       0x20 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o)
- .debug_frame   0x0000000000000608       0x20 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o)
- .debug_frame   0x0000000000000628       0x3c /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o)
+.debug_frame    0x0000000000000000     0x16e4
+ .debug_frame   0x0000000000000000      0x170 Core/Src/i2c.o
+ .debug_frame   0x0000000000000170      0x12c Core/Src/led.o
+ .debug_frame   0x000000000000029c      0x5d4 Core/Src/main.o
+ .debug_frame   0x0000000000000870       0xc4 Core/Src/scd4x.o
+ .debug_frame   0x0000000000000934       0xb8 Core/Src/stm32l0xx_it.o
+ .debug_frame   0x00000000000009ec       0x4c Core/Src/system_stm32l0xx.o
+ .debug_frame   0x0000000000000a38      0x170 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_gpio.o
+ .debug_frame   0x0000000000000ba8      0x1d0 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_i2c.o
+ .debug_frame   0x0000000000000d78      0x134 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.o
+ .debug_frame   0x0000000000000eac      0x42c Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_rcc.o
+ .debug_frame   0x00000000000012d8      0x344 Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_utils.o
+ .debug_frame   0x000000000000161c       0x2c /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o)
+ .debug_frame   0x0000000000001648       0x20 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o)
+ .debug_frame   0x0000000000001668       0x20 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o)
+ .debug_frame   0x0000000000001688       0x20 /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o)
+ .debug_frame   0x00000000000016a8       0x3c /opt/st/stm32cubeide_1.6.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.linux64_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o)